bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 2 | * RAM allocation and memory access |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
Chetan Pant | 61f3c91 | 2020-10-23 12:44:24 +0000 | [diff] [blame] | 9 | * version 2.1 of the License, or (at your option) any later version. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
Markus Armbruster | 14a48c1 | 2019-05-23 16:35:05 +0200 | [diff] [blame] | 19 | |
Peter Maydell | 7b31bbc | 2016-01-26 18:16:56 +0000 | [diff] [blame] | 20 | #include "qemu/osdep.h" |
Marc-André Lureau | ec5f7ca | 2022-03-23 19:57:34 +0400 | [diff] [blame] | 21 | #include "exec/page-vary.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 22 | #include "qapi/error.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 23 | |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 24 | #include "qemu/cutils.h" |
Richard Henderson | 084cfca | 2020-12-14 08:02:33 -0600 | [diff] [blame] | 25 | #include "qemu/cacheflush.h" |
Markus Armbruster | e2c1c34 | 2022-12-21 14:35:49 +0100 | [diff] [blame] | 26 | #include "qemu/hbitmap.h" |
Peter Maydell | b85ea5f | 2022-02-08 20:08:52 +0000 | [diff] [blame] | 27 | #include "qemu/madvise.h" |
Claudio Fontana | 7827168 | 2021-02-04 17:39:23 +0100 | [diff] [blame] | 28 | |
| 29 | #ifdef CONFIG_TCG |
| 30 | #include "hw/core/tcg-cpu-ops.h" |
| 31 | #endif /* CONFIG_TCG */ |
| 32 | |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 33 | #include "exec/exec-all.h" |
Juan Quintela | 5118042 | 2017-04-24 20:50:19 +0200 | [diff] [blame] | 34 | #include "exec/target_page.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 35 | #include "hw/qdev-core.h" |
Fam Zheng | c7e002c | 2017-07-14 10:15:08 +0800 | [diff] [blame] | 36 | #include "hw/qdev-properties.h" |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 37 | #include "hw/boards.h" |
Paolo Bonzini | 33c1187 | 2016-03-15 16:58:45 +0100 | [diff] [blame] | 38 | #include "hw/xen/xen.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 39 | #include "sysemu/kvm.h" |
Markus Armbruster | 14a48c1 | 2019-05-23 16:35:05 +0200 | [diff] [blame] | 40 | #include "sysemu/tcg.h" |
Alexander Bulekov | a028ede | 2020-02-19 23:11:09 -0500 | [diff] [blame] | 41 | #include "sysemu/qtest.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 42 | #include "qemu/timer.h" |
| 43 | #include "qemu/config-file.h" |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 44 | #include "qemu/error-report.h" |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 45 | #include "qemu/qemu-print.h" |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 46 | #include "qemu/log.h" |
Peter Maydell | 5df022c | 2022-02-26 18:07:23 +0000 | [diff] [blame] | 47 | #include "qemu/memalign.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 48 | #include "exec/memory.h" |
Paolo Bonzini | df43d49 | 2016-03-16 10:24:54 +0100 | [diff] [blame] | 49 | #include "exec/ioport.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 50 | #include "sysemu/dma.h" |
Markus Armbruster | b58c5c2 | 2019-08-12 07:23:55 +0200 | [diff] [blame] | 51 | #include "sysemu/hostmem.h" |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 52 | #include "sysemu/hw_accel.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 53 | #include "sysemu/xen-mapcache.h" |
Paolo Bonzini | 243af02 | 2020-02-04 12:20:10 +0100 | [diff] [blame] | 54 | #include "trace/trace-root.h" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 55 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 56 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 57 | #include <linux/falloc.h> |
| 58 | #endif |
| 59 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 60 | #include "qemu/rcu_queue.h" |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 61 | #include "qemu/main-loop.h" |
Paolo Bonzini | 3b9bd3f | 2020-12-16 13:27:58 +0100 | [diff] [blame] | 62 | #include "exec/translate-all.h" |
Pavel Dovgalyuk | 7615936 | 2015-09-17 19:25:07 +0300 | [diff] [blame] | 63 | #include "sysemu/replay.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 64 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 65 | #include "exec/memory-internal.h" |
Juan Quintela | 220c3eb | 2013-10-14 17:13:59 +0200 | [diff] [blame] | 66 | #include "exec/ram_addr.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 67 | |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 68 | #include "qemu/pmem.h" |
| 69 | |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 70 | #include "migration/vmstate.h" |
| 71 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 72 | #include "qemu/range.h" |
Michael S. Tsirkin | 794e8f3 | 2015-09-24 14:41:17 +0300 | [diff] [blame] | 73 | #ifndef _WIN32 |
| 74 | #include "qemu/mmap-alloc.h" |
| 75 | #endif |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 76 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 77 | #include "monitor/monitor.h" |
| 78 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 79 | #ifdef CONFIG_LIBDAXCTL |
| 80 | #include <daxctl/libdaxctl.h> |
| 81 | #endif |
| 82 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 83 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 84 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 85 | /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes |
| 86 | * are protected by the ramlist lock. |
| 87 | */ |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 88 | RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 89 | |
| 90 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 91 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 92 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 93 | AddressSpace address_space_io; |
| 94 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 95 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 96 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 97 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 98 | typedef struct PhysPageEntry PhysPageEntry; |
| 99 | |
| 100 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 101 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 102 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 103 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 104 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 105 | }; |
| 106 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 107 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 108 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 109 | /* Size of the L2 (and L3, etc) page tables. */ |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 110 | #define ADDR_SPACE_BITS 64 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 111 | |
Michael S. Tsirkin | 026736c | 2013-11-13 20:13:03 +0200 | [diff] [blame] | 112 | #define P_L2_BITS 9 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 113 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 114 | |
| 115 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 116 | |
| 117 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 118 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 119 | typedef struct PhysPageMap { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 120 | struct rcu_head rcu; |
| 121 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 122 | unsigned sections_nb; |
| 123 | unsigned sections_nb_alloc; |
| 124 | unsigned nodes_nb; |
| 125 | unsigned nodes_nb_alloc; |
| 126 | Node *nodes; |
| 127 | MemoryRegionSection *sections; |
| 128 | } PhysPageMap; |
| 129 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 130 | struct AddressSpaceDispatch { |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 131 | MemoryRegionSection *mru_section; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 132 | /* This is a multi-level map on the physical address space. |
| 133 | * The bottom level has pointers to MemoryRegionSections. |
| 134 | */ |
| 135 | PhysPageEntry phys_map; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 136 | PhysPageMap map; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 137 | }; |
| 138 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 139 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 140 | typedef struct subpage_t { |
| 141 | MemoryRegion iomem; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 142 | FlatView *fv; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 143 | hwaddr base; |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 144 | uint16_t sub_section[]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 145 | } subpage_t; |
| 146 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 147 | #define PHYS_SECTION_UNASSIGNED 0 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 148 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 149 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 150 | static void memory_map_init(void); |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 151 | static void tcg_log_global_after_sync(MemoryListener *listener); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 152 | static void tcg_commit(MemoryListener *listener); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 153 | |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 154 | /** |
| 155 | * CPUAddressSpace: all the information a CPU needs about an AddressSpace |
| 156 | * @cpu: the CPU whose AddressSpace this is |
| 157 | * @as: the AddressSpace itself |
| 158 | * @memory_dispatch: its dispatch pointer (cached, RCU protected) |
| 159 | * @tcg_as_listener: listener for tracking changes to the AddressSpace |
| 160 | */ |
| 161 | struct CPUAddressSpace { |
| 162 | CPUState *cpu; |
| 163 | AddressSpace *as; |
| 164 | struct AddressSpaceDispatch *memory_dispatch; |
| 165 | MemoryListener tcg_as_listener; |
| 166 | }; |
| 167 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 168 | struct DirtyBitmapSnapshot { |
| 169 | ram_addr_t start; |
| 170 | ram_addr_t end; |
| 171 | unsigned long dirty[]; |
| 172 | }; |
| 173 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 174 | static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 175 | { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 176 | static unsigned alloc_hint = 16; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 177 | if (map->nodes_nb + nodes > map->nodes_nb_alloc) { |
Wei Yang | c95cfd0 | 2019-03-21 16:25:52 +0800 | [diff] [blame] | 178 | map->nodes_nb_alloc = MAX(alloc_hint, map->nodes_nb + nodes); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 179 | map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc); |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 180 | alloc_hint = map->nodes_nb_alloc; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 181 | } |
| 182 | } |
| 183 | |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 184 | static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 185 | { |
| 186 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 187 | uint32_t ret; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 188 | PhysPageEntry e; |
| 189 | PhysPageEntry *p; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 190 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 191 | ret = map->nodes_nb++; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 192 | p = map->nodes[ret]; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 193 | assert(ret != PHYS_MAP_NODE_NIL); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 194 | assert(ret != map->nodes_nb_alloc); |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 195 | |
| 196 | e.skip = leaf ? 0 : 1; |
| 197 | e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 198 | for (i = 0; i < P_L2_SIZE; ++i) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 199 | memcpy(&p[i], &e, sizeof(e)); |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 200 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 201 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 202 | } |
| 203 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 204 | static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp, |
Wei Yang | 56b1507 | 2019-03-21 16:25:50 +0800 | [diff] [blame] | 205 | hwaddr *index, uint64_t *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 206 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 207 | { |
| 208 | PhysPageEntry *p; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 209 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 210 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 211 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 212 | lp->ptr = phys_map_node_alloc(map, level == 0); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 213 | } |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 214 | p = map->nodes[lp->ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 215 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 216 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 217 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 218 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 219 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 220 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 221 | *index += step; |
| 222 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 223 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 224 | phys_page_set_level(map, lp, index, nb, leaf, level - 1); |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 225 | } |
| 226 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 227 | } |
| 228 | } |
| 229 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 230 | static void phys_page_set(AddressSpaceDispatch *d, |
Wei Yang | 56b1507 | 2019-03-21 16:25:50 +0800 | [diff] [blame] | 231 | hwaddr index, uint64_t nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 232 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 233 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 234 | /* Wildly overreserve - it doesn't matter much. */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 235 | phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 236 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 237 | phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 238 | } |
| 239 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 240 | /* Compact a non leaf page entry. Simply detect that the entry has a single child, |
| 241 | * and update our entry so we can skip it and go directly to the destination. |
| 242 | */ |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 243 | static void phys_page_compact(PhysPageEntry *lp, Node *nodes) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 244 | { |
| 245 | unsigned valid_ptr = P_L2_SIZE; |
| 246 | int valid = 0; |
| 247 | PhysPageEntry *p; |
| 248 | int i; |
| 249 | |
| 250 | if (lp->ptr == PHYS_MAP_NODE_NIL) { |
| 251 | return; |
| 252 | } |
| 253 | |
| 254 | p = nodes[lp->ptr]; |
| 255 | for (i = 0; i < P_L2_SIZE; i++) { |
| 256 | if (p[i].ptr == PHYS_MAP_NODE_NIL) { |
| 257 | continue; |
| 258 | } |
| 259 | |
| 260 | valid_ptr = i; |
| 261 | valid++; |
| 262 | if (p[i].skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 263 | phys_page_compact(&p[i], nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 264 | } |
| 265 | } |
| 266 | |
| 267 | /* We can only compress if there's only one child. */ |
| 268 | if (valid != 1) { |
| 269 | return; |
| 270 | } |
| 271 | |
| 272 | assert(valid_ptr < P_L2_SIZE); |
| 273 | |
| 274 | /* Don't compress if it won't fit in the # of bits we have. */ |
Wei Yang | 526ca23 | 2019-03-21 16:25:55 +0800 | [diff] [blame] | 275 | if (P_L2_LEVELS >= (1 << 6) && |
| 276 | lp->skip + p[valid_ptr].skip >= (1 << 6)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 277 | return; |
| 278 | } |
| 279 | |
| 280 | lp->ptr = p[valid_ptr].ptr; |
| 281 | if (!p[valid_ptr].skip) { |
| 282 | /* If our only child is a leaf, make this a leaf. */ |
| 283 | /* By design, we should have made this node a leaf to begin with so we |
| 284 | * should never reach here. |
| 285 | * But since it's so simple to handle this, let's do it just in case we |
| 286 | * change this rule. |
| 287 | */ |
| 288 | lp->skip = 0; |
| 289 | } else { |
| 290 | lp->skip += p[valid_ptr].skip; |
| 291 | } |
| 292 | } |
| 293 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 294 | void address_space_dispatch_compact(AddressSpaceDispatch *d) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 295 | { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 296 | if (d->phys_map.skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 297 | phys_page_compact(&d->phys_map, d->map.nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 298 | } |
| 299 | } |
| 300 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 301 | static inline bool section_covers_addr(const MemoryRegionSection *section, |
| 302 | hwaddr addr) |
| 303 | { |
| 304 | /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means |
| 305 | * the section must cover the entire address space. |
| 306 | */ |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 307 | return int128_gethi(section->size) || |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 308 | range_covers_byte(section->offset_within_address_space, |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 309 | int128_getlo(section->size), addr); |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 310 | } |
| 311 | |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 312 | static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 313 | { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 314 | PhysPageEntry lp = d->phys_map, *p; |
| 315 | Node *nodes = d->map.nodes; |
| 316 | MemoryRegionSection *sections = d->map.sections; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 317 | hwaddr index = addr >> TARGET_PAGE_BITS; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 318 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 319 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 320 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 321 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 322 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 323 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 324 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 325 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 326 | } |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 327 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 328 | if (section_covers_addr(§ions[lp.ptr], addr)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 329 | return §ions[lp.ptr]; |
| 330 | } else { |
| 331 | return §ions[PHYS_SECTION_UNASSIGNED]; |
| 332 | } |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 333 | } |
| 334 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 335 | /* Called from RCU critical section */ |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 336 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 337 | hwaddr addr, |
| 338 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 339 | { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 340 | MemoryRegionSection *section = qatomic_read(&d->mru_section); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 341 | subpage_t *subpage; |
| 342 | |
Paolo Bonzini | 07c114b | 2017-11-15 15:11:03 +0100 | [diff] [blame] | 343 | if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] || |
| 344 | !section_covers_addr(section, addr)) { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 345 | section = phys_page_find(d, addr); |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 346 | qatomic_set(&d->mru_section, section); |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 347 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 348 | if (resolve_subpage && section->mr->subpage) { |
| 349 | subpage = container_of(section->mr, subpage_t, iomem); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 350 | section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 351 | } |
| 352 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 353 | } |
| 354 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 355 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 356 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 357 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 358 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 359 | { |
| 360 | MemoryRegionSection *section; |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 361 | MemoryRegion *mr; |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 362 | Int128 diff; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 363 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 364 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 365 | /* Compute offset within MemoryRegionSection */ |
| 366 | addr -= section->offset_within_address_space; |
| 367 | |
| 368 | /* Compute offset within MemoryRegion */ |
| 369 | *xlat = addr + section->offset_within_region; |
| 370 | |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 371 | mr = section->mr; |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 372 | |
| 373 | /* MMIO registers can be expected to perform full-width accesses based only |
| 374 | * on their address, without considering adjacent registers that could |
| 375 | * decode to completely different MemoryRegions. When such registers |
| 376 | * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO |
| 377 | * regions overlap wildly. For this reason we cannot clamp the accesses |
| 378 | * here. |
| 379 | * |
| 380 | * If the length is small (as is the case for address_space_ldl/stl), |
| 381 | * everything works fine. If the incoming length is large, however, |
| 382 | * the caller really has to do the clamping through memory_access_size. |
| 383 | */ |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 384 | if (memory_region_is_ram(mr)) { |
Paolo Bonzini | e4a511f | 2015-06-17 10:36:54 +0200 | [diff] [blame] | 385 | diff = int128_sub(section->size, int128_make64(addr)); |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 386 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
| 387 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 388 | return section; |
| 389 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 390 | |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 391 | /** |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 392 | * address_space_translate_iommu - translate an address through an IOMMU |
| 393 | * memory region and then through the target address space. |
| 394 | * |
| 395 | * @iommu_mr: the IOMMU memory region that we start the translation from |
| 396 | * @addr: the address to be translated through the MMU |
| 397 | * @xlat: the translated address offset within the destination memory region. |
| 398 | * It cannot be %NULL. |
| 399 | * @plen_out: valid read/write length of the translated address. It |
| 400 | * cannot be %NULL. |
| 401 | * @page_mask_out: page mask for the translated address. This |
| 402 | * should only be meaningful for IOMMU translated |
| 403 | * addresses, since there may be huge pages that this bit |
| 404 | * would tell. It can be %NULL if we don't care about it. |
| 405 | * @is_write: whether the translation operation is for write |
| 406 | * @is_mmio: whether this can be MMIO, set true if it can |
| 407 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 408 | * @attrs: transaction attributes |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 409 | * |
| 410 | * This function is called from RCU critical section. It is the common |
| 411 | * part of flatview_do_translate and address_space_translate_cached. |
| 412 | */ |
| 413 | static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr, |
| 414 | hwaddr *xlat, |
| 415 | hwaddr *plen_out, |
| 416 | hwaddr *page_mask_out, |
| 417 | bool is_write, |
| 418 | bool is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 419 | AddressSpace **target_as, |
| 420 | MemTxAttrs attrs) |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 421 | { |
| 422 | MemoryRegionSection *section; |
| 423 | hwaddr page_mask = (hwaddr)-1; |
| 424 | |
| 425 | do { |
| 426 | hwaddr addr = *xlat; |
| 427 | IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
Peter Maydell | 2c91bcf | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 428 | int iommu_idx = 0; |
| 429 | IOMMUTLBEntry iotlb; |
| 430 | |
| 431 | if (imrc->attrs_to_index) { |
| 432 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 433 | } |
| 434 | |
| 435 | iotlb = imrc->translate(iommu_mr, addr, is_write ? |
| 436 | IOMMU_WO : IOMMU_RO, iommu_idx); |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 437 | |
| 438 | if (!(iotlb.perm & (1 << is_write))) { |
| 439 | goto unassigned; |
| 440 | } |
| 441 | |
| 442 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 443 | | (addr & iotlb.addr_mask)); |
| 444 | page_mask &= iotlb.addr_mask; |
| 445 | *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1); |
| 446 | *target_as = iotlb.target_as; |
| 447 | |
| 448 | section = address_space_translate_internal( |
| 449 | address_space_to_dispatch(iotlb.target_as), addr, xlat, |
| 450 | plen_out, is_mmio); |
| 451 | |
| 452 | iommu_mr = memory_region_get_iommu(section->mr); |
| 453 | } while (unlikely(iommu_mr)); |
| 454 | |
| 455 | if (page_mask_out) { |
| 456 | *page_mask_out = page_mask; |
| 457 | } |
| 458 | return *section; |
| 459 | |
| 460 | unassigned: |
| 461 | return (MemoryRegionSection) { .mr = &io_mem_unassigned }; |
| 462 | } |
| 463 | |
| 464 | /** |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 465 | * flatview_do_translate - translate an address in FlatView |
| 466 | * |
| 467 | * @fv: the flat view that we want to translate on |
| 468 | * @addr: the address to be translated in above address space |
| 469 | * @xlat: the translated address offset within memory region. It |
| 470 | * cannot be @NULL. |
| 471 | * @plen_out: valid read/write length of the translated address. It |
| 472 | * can be @NULL when we don't care about it. |
| 473 | * @page_mask_out: page mask for the translated address. This |
| 474 | * should only be meaningful for IOMMU translated |
| 475 | * addresses, since there may be huge pages that this bit |
| 476 | * would tell. It can be @NULL if we don't care about it. |
| 477 | * @is_write: whether the translation operation is for write |
| 478 | * @is_mmio: whether this can be MMIO, set true if it can |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 479 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 480 | * @attrs: memory transaction attributes |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 481 | * |
| 482 | * This function is called from RCU critical section |
| 483 | */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 484 | static MemoryRegionSection flatview_do_translate(FlatView *fv, |
| 485 | hwaddr addr, |
| 486 | hwaddr *xlat, |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 487 | hwaddr *plen_out, |
| 488 | hwaddr *page_mask_out, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 489 | bool is_write, |
| 490 | bool is_mmio, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 491 | AddressSpace **target_as, |
| 492 | MemTxAttrs attrs) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 493 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 494 | MemoryRegionSection *section; |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 495 | IOMMUMemoryRegion *iommu_mr; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 496 | hwaddr plen = (hwaddr)(-1); |
| 497 | |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 498 | if (!plen_out) { |
| 499 | plen_out = &plen; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 500 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 501 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 502 | section = address_space_translate_internal( |
| 503 | flatview_to_dispatch(fv), addr, xlat, |
| 504 | plen_out, is_mmio); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 505 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 506 | iommu_mr = memory_region_get_iommu(section->mr); |
| 507 | if (unlikely(iommu_mr)) { |
| 508 | return address_space_translate_iommu(iommu_mr, xlat, |
| 509 | plen_out, page_mask_out, |
| 510 | is_write, is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 511 | target_as, attrs); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 512 | } |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 513 | if (page_mask_out) { |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 514 | /* Not behind an IOMMU, use default page size. */ |
| 515 | *page_mask_out = ~TARGET_PAGE_MASK; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 516 | } |
| 517 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 518 | return *section; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | /* Called from RCU critical section */ |
| 522 | IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, |
Peter Maydell | 7446eb0 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 523 | bool is_write, MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 524 | { |
| 525 | MemoryRegionSection section; |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 526 | hwaddr xlat, page_mask; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 527 | |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 528 | /* |
| 529 | * This can never be MMIO, and we don't really care about plen, |
| 530 | * but page mask. |
| 531 | */ |
| 532 | section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 533 | NULL, &page_mask, is_write, false, &as, |
| 534 | attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 535 | |
| 536 | /* Illegal translation */ |
| 537 | if (section.mr == &io_mem_unassigned) { |
| 538 | goto iotlb_fail; |
| 539 | } |
| 540 | |
| 541 | /* Convert memory region offset into address space offset */ |
| 542 | xlat += section.offset_within_address_space - |
| 543 | section.offset_within_region; |
| 544 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 545 | return (IOMMUTLBEntry) { |
Alexey Kardashevskiy | e76bb18 | 2017-09-21 18:50:53 +1000 | [diff] [blame] | 546 | .target_as = as, |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 547 | .iova = addr & ~page_mask, |
| 548 | .translated_addr = xlat & ~page_mask, |
| 549 | .addr_mask = page_mask, |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 550 | /* IOTLBs are for DMAs, and DMA only allows on RAMs. */ |
| 551 | .perm = IOMMU_RW, |
| 552 | }; |
| 553 | |
| 554 | iotlb_fail: |
| 555 | return (IOMMUTLBEntry) {0}; |
| 556 | } |
| 557 | |
| 558 | /* Called from RCU critical section */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 559 | MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 560 | hwaddr *plen, bool is_write, |
| 561 | MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 562 | { |
| 563 | MemoryRegion *mr; |
| 564 | MemoryRegionSection section; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 565 | AddressSpace *as = NULL; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 566 | |
| 567 | /* This can be MMIO, so setup MMIO bit. */ |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 568 | section = flatview_do_translate(fv, addr, xlat, plen, NULL, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 569 | is_write, true, &as, attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 570 | mr = section.mr; |
| 571 | |
Alexey Kardashevskiy | fe680d0 | 2014-05-07 13:40:39 +0000 | [diff] [blame] | 572 | if (xen_enabled() && memory_access_is_direct(mr, is_write)) { |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 573 | hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; |
Peter Crosthwaite | 23820db | 2015-03-16 22:35:54 -0700 | [diff] [blame] | 574 | *plen = MIN(page, *plen); |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 575 | } |
| 576 | |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 577 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 578 | } |
| 579 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 580 | typedef struct TCGIOMMUNotifier { |
| 581 | IOMMUNotifier n; |
| 582 | MemoryRegion *mr; |
| 583 | CPUState *cpu; |
| 584 | int iommu_idx; |
| 585 | bool active; |
| 586 | } TCGIOMMUNotifier; |
| 587 | |
| 588 | static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) |
| 589 | { |
| 590 | TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n); |
| 591 | |
| 592 | if (!notifier->active) { |
| 593 | return; |
| 594 | } |
| 595 | tlb_flush(notifier->cpu); |
| 596 | notifier->active = false; |
| 597 | /* We leave the notifier struct on the list to avoid reallocating it later. |
| 598 | * Generally the number of IOMMUs a CPU deals with will be small. |
| 599 | * In any case we can't unregister the iommu notifier from a notify |
| 600 | * callback. |
| 601 | */ |
| 602 | } |
| 603 | |
| 604 | static void tcg_register_iommu_notifier(CPUState *cpu, |
| 605 | IOMMUMemoryRegion *iommu_mr, |
| 606 | int iommu_idx) |
| 607 | { |
| 608 | /* Make sure this CPU has an IOMMU notifier registered for this |
| 609 | * IOMMU/IOMMU index combination, so that we can flush its TLB |
| 610 | * when the IOMMU tells us the mappings we've cached have changed. |
| 611 | */ |
| 612 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
Philippe Mathieu-Daudé | bbf9019 | 2021-01-17 18:04:11 +0100 | [diff] [blame] | 613 | TCGIOMMUNotifier *notifier = NULL; |
Markus Armbruster | 805d449 | 2020-07-22 10:40:48 +0200 | [diff] [blame] | 614 | int i; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 615 | |
| 616 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 617 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 618 | if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) { |
| 619 | break; |
| 620 | } |
| 621 | } |
| 622 | if (i == cpu->iommu_notifiers->len) { |
| 623 | /* Not found, add a new entry at the end of the array */ |
| 624 | cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 625 | notifier = g_new0(TCGIOMMUNotifier, 1); |
| 626 | g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 627 | |
| 628 | notifier->mr = mr; |
| 629 | notifier->iommu_idx = iommu_idx; |
| 630 | notifier->cpu = cpu; |
| 631 | /* Rather than trying to register interest in the specific part |
| 632 | * of the iommu's address space that we've accessed and then |
| 633 | * expand it later as subsequent accesses touch more of it, we |
| 634 | * just register interest in the whole thing, on the assumption |
| 635 | * that iommu reconfiguration will be rare. |
| 636 | */ |
| 637 | iommu_notifier_init(¬ifier->n, |
| 638 | tcg_iommu_unmap_notify, |
| 639 | IOMMU_NOTIFIER_UNMAP, |
| 640 | 0, |
| 641 | HWADDR_MAX, |
| 642 | iommu_idx); |
Markus Armbruster | 805d449 | 2020-07-22 10:40:48 +0200 | [diff] [blame] | 643 | memory_region_register_iommu_notifier(notifier->mr, ¬ifier->n, |
| 644 | &error_fatal); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 645 | } |
| 646 | |
| 647 | if (!notifier->active) { |
| 648 | notifier->active = true; |
| 649 | } |
| 650 | } |
| 651 | |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 652 | void tcg_iommu_free_notifier_list(CPUState *cpu) |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 653 | { |
| 654 | /* Destroy the CPU's notifier list */ |
| 655 | int i; |
| 656 | TCGIOMMUNotifier *notifier; |
| 657 | |
| 658 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 659 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 660 | memory_region_unregister_iommu_notifier(notifier->mr, ¬ifier->n); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 661 | g_free(notifier); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 662 | } |
| 663 | g_array_free(cpu->iommu_notifiers, true); |
| 664 | } |
| 665 | |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 666 | void tcg_iommu_init_notifier_list(CPUState *cpu) |
| 667 | { |
| 668 | cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *)); |
| 669 | } |
| 670 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 671 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 672 | MemoryRegionSection * |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 673 | address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr, |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 674 | hwaddr *xlat, hwaddr *plen, |
| 675 | MemTxAttrs attrs, int *prot) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 676 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 677 | MemoryRegionSection *section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 678 | IOMMUMemoryRegion *iommu_mr; |
| 679 | IOMMUMemoryRegionClass *imrc; |
| 680 | IOMMUTLBEntry iotlb; |
| 681 | int iommu_idx; |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 682 | hwaddr addr = orig_addr; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 683 | AddressSpaceDispatch *d = cpu->cpu_ases[asidx].memory_dispatch; |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 684 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 685 | for (;;) { |
| 686 | section = address_space_translate_internal(d, addr, &addr, plen, false); |
| 687 | |
| 688 | iommu_mr = memory_region_get_iommu(section->mr); |
| 689 | if (!iommu_mr) { |
| 690 | break; |
| 691 | } |
| 692 | |
| 693 | imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
| 694 | |
| 695 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 696 | tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx); |
| 697 | /* We need all the permissions, so pass IOMMU_NONE so the IOMMU |
| 698 | * doesn't short-cut its translation table walk. |
| 699 | */ |
| 700 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx); |
| 701 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 702 | | (addr & iotlb.addr_mask)); |
| 703 | /* Update the caller's prot bits to remove permissions the IOMMU |
| 704 | * is giving us a failure response for. If we get down to no |
| 705 | * permissions left at all we can give up now. |
| 706 | */ |
| 707 | if (!(iotlb.perm & IOMMU_RO)) { |
| 708 | *prot &= ~(PAGE_READ | PAGE_EXEC); |
| 709 | } |
| 710 | if (!(iotlb.perm & IOMMU_WO)) { |
| 711 | *prot &= ~PAGE_WRITE; |
| 712 | } |
| 713 | |
| 714 | if (!*prot) { |
| 715 | goto translate_fail; |
| 716 | } |
| 717 | |
| 718 | d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as)); |
| 719 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 720 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 721 | assert(!memory_region_is_iommu(section->mr)); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 722 | *xlat = addr; |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 723 | return section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 724 | |
| 725 | translate_fail: |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 726 | /* |
| 727 | * We should be given a page-aligned address -- certainly |
| 728 | * tlb_set_page_with_attrs() does so. The page offset of xlat |
| 729 | * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0. |
| 730 | * The page portion of xlat will be logged by memory_region_access_valid() |
| 731 | * when this memory access is rejected, so use the original untranslated |
| 732 | * physical address. |
| 733 | */ |
| 734 | assert((orig_addr & ~TARGET_PAGE_MASK) == 0); |
| 735 | *xlat = orig_addr; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 736 | return &d->map.sections[PHYS_SECTION_UNASSIGNED]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 737 | } |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 738 | |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 739 | void cpu_address_space_init(CPUState *cpu, int asidx, |
| 740 | const char *prefix, MemoryRegion *mr) |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 741 | { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 742 | CPUAddressSpace *newas; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 743 | AddressSpace *as = g_new0(AddressSpace, 1); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 744 | char *as_name; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 745 | |
| 746 | assert(mr); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 747 | as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index); |
| 748 | address_space_init(as, mr, as_name); |
| 749 | g_free(as_name); |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 750 | |
| 751 | /* Target code should have set num_ases before calling us */ |
| 752 | assert(asidx < cpu->num_ases); |
| 753 | |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 754 | if (asidx == 0) { |
| 755 | /* address space 0 gets the convenience alias */ |
| 756 | cpu->as = as; |
| 757 | } |
| 758 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 759 | /* KVM cannot currently support multiple address spaces. */ |
| 760 | assert(asidx == 0 || !kvm_enabled()); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 761 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 762 | if (!cpu->cpu_ases) { |
| 763 | cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 764 | } |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 765 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 766 | newas = &cpu->cpu_ases[asidx]; |
| 767 | newas->cpu = cpu; |
| 768 | newas->as = as; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 769 | if (tcg_enabled()) { |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 770 | newas->tcg_as_listener.log_global_after_sync = tcg_log_global_after_sync; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 771 | newas->tcg_as_listener.commit = tcg_commit; |
Peter Xu | 142518b | 2021-08-16 21:35:52 -0400 | [diff] [blame] | 772 | newas->tcg_as_listener.name = "tcg"; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 773 | memory_listener_register(&newas->tcg_as_listener, as); |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 774 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 775 | } |
Peter Maydell | 651a5bc | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 776 | |
| 777 | AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) |
| 778 | { |
| 779 | /* Return the AddressSpace corresponding to the specified index */ |
| 780 | return cpu->cpu_ases[asidx].as; |
| 781 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 782 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 783 | /* Called from RCU critical section */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 784 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 785 | { |
| 786 | RAMBlock *block; |
| 787 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 788 | block = qatomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 789 | if (block && addr - block->offset < block->max_length) { |
Paolo Bonzini | 68851b9 | 2015-10-22 13:51:30 +0200 | [diff] [blame] | 790 | return block; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 791 | } |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 792 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 793 | if (addr - block->offset < block->max_length) { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 794 | goto found; |
| 795 | } |
| 796 | } |
| 797 | |
| 798 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 799 | abort(); |
| 800 | |
| 801 | found: |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 802 | /* It is safe to write mru_block outside the iothread lock. This |
| 803 | * is what happens: |
| 804 | * |
| 805 | * mru_block = xxx |
| 806 | * rcu_read_unlock() |
| 807 | * xxx removed from list |
| 808 | * rcu_read_lock() |
| 809 | * read mru_block |
| 810 | * mru_block = NULL; |
| 811 | * call_rcu(reclaim_ramblock, xxx); |
| 812 | * rcu_read_unlock() |
| 813 | * |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 814 | * qatomic_rcu_set is not needed here. The block was already published |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 815 | * when it was placed into the list. Here we're just making an extra |
| 816 | * copy of the pointer. |
| 817 | */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 818 | ram_list.mru_block = block; |
| 819 | return block; |
| 820 | } |
| 821 | |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 822 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 823 | { |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 824 | CPUState *cpu; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 825 | ram_addr_t start1; |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 826 | RAMBlock *block; |
| 827 | ram_addr_t end; |
| 828 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 829 | assert(tcg_enabled()); |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 830 | end = TARGET_PAGE_ALIGN(start + length); |
| 831 | start &= TARGET_PAGE_MASK; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 832 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 833 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 834 | block = qemu_get_ram_block(start); |
| 835 | assert(block == qemu_get_ram_block(end - 1)); |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 836 | start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 837 | CPU_FOREACH(cpu) { |
| 838 | tlb_reset_dirty(cpu, start1, length); |
| 839 | } |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 840 | } |
| 841 | |
| 842 | /* Note: start and end must be within the same ram block. */ |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 843 | bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, |
| 844 | ram_addr_t length, |
| 845 | unsigned client) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 846 | { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 847 | DirtyMemoryBlocks *blocks; |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 848 | unsigned long end, page, start_page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 849 | bool dirty = false; |
Peter Xu | 077874e | 2019-06-03 14:50:51 +0800 | [diff] [blame] | 850 | RAMBlock *ramblock; |
| 851 | uint64_t mr_offset, mr_size; |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 852 | |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 853 | if (length == 0) { |
| 854 | return false; |
| 855 | } |
| 856 | |
| 857 | end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 858 | start_page = start >> TARGET_PAGE_BITS; |
| 859 | page = start_page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 860 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 861 | WITH_RCU_READ_LOCK_GUARD() { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 862 | blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 863 | ramblock = qemu_get_ram_block(start); |
| 864 | /* Range sanity check on the ramblock */ |
| 865 | assert(start >= ramblock->offset && |
| 866 | start + length <= ramblock->offset + ramblock->used_length); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 867 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 868 | while (page < end) { |
| 869 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 870 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 871 | unsigned long num = MIN(end - page, |
| 872 | DIRTY_MEMORY_BLOCK_SIZE - offset); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 873 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 874 | dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx], |
| 875 | offset, num); |
| 876 | page += num; |
| 877 | } |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 878 | |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 879 | mr_offset = (ram_addr_t)(start_page << TARGET_PAGE_BITS) - ramblock->offset; |
| 880 | mr_size = (end - start_page) << TARGET_PAGE_BITS; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 881 | memory_region_clear_dirty_bitmap(ramblock->mr, mr_offset, mr_size); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 882 | } |
| 883 | |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 884 | if (dirty && tcg_enabled()) { |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 885 | tlb_reset_dirty_range_all(start, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 886 | } |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 887 | |
| 888 | return dirty; |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 889 | } |
| 890 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 891 | DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty |
Peter Xu | 5dea407 | 2019-06-03 14:50:50 +0800 | [diff] [blame] | 892 | (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client) |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 893 | { |
| 894 | DirtyMemoryBlocks *blocks; |
Peter Xu | 5dea407 | 2019-06-03 14:50:50 +0800 | [diff] [blame] | 895 | ram_addr_t start = memory_region_get_ram_addr(mr) + offset; |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 896 | unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL); |
| 897 | ram_addr_t first = QEMU_ALIGN_DOWN(start, align); |
| 898 | ram_addr_t last = QEMU_ALIGN_UP(start + length, align); |
| 899 | DirtyBitmapSnapshot *snap; |
| 900 | unsigned long page, end, dest; |
| 901 | |
| 902 | snap = g_malloc0(sizeof(*snap) + |
| 903 | ((last - first) >> (TARGET_PAGE_BITS + 3))); |
| 904 | snap->start = first; |
| 905 | snap->end = last; |
| 906 | |
| 907 | page = first >> TARGET_PAGE_BITS; |
| 908 | end = last >> TARGET_PAGE_BITS; |
| 909 | dest = 0; |
| 910 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 911 | WITH_RCU_READ_LOCK_GUARD() { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 912 | blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 913 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 914 | while (page < end) { |
| 915 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 916 | unsigned long ofs = page % DIRTY_MEMORY_BLOCK_SIZE; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 917 | unsigned long num = MIN(end - page, |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 918 | DIRTY_MEMORY_BLOCK_SIZE - ofs); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 919 | |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 920 | assert(QEMU_IS_ALIGNED(ofs, (1 << BITS_PER_LEVEL))); |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 921 | assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL))); |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 922 | ofs >>= BITS_PER_LEVEL; |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 923 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 924 | bitmap_copy_and_clear_atomic(snap->dirty + dest, |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 925 | blocks->blocks[idx] + ofs, |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 926 | num); |
| 927 | page += num; |
| 928 | dest += num >> BITS_PER_LEVEL; |
| 929 | } |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 930 | } |
| 931 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 932 | if (tcg_enabled()) { |
| 933 | tlb_reset_dirty_range_all(start, length); |
| 934 | } |
| 935 | |
Peter Xu | 077874e | 2019-06-03 14:50:51 +0800 | [diff] [blame] | 936 | memory_region_clear_dirty_bitmap(mr, offset, length); |
| 937 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 938 | return snap; |
| 939 | } |
| 940 | |
| 941 | bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, |
| 942 | ram_addr_t start, |
| 943 | ram_addr_t length) |
| 944 | { |
| 945 | unsigned long page, end; |
| 946 | |
| 947 | assert(start >= snap->start); |
| 948 | assert(start + length <= snap->end); |
| 949 | |
| 950 | end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS; |
| 951 | page = (start - snap->start) >> TARGET_PAGE_BITS; |
| 952 | |
| 953 | while (page < end) { |
| 954 | if (test_bit(page, snap->dirty)) { |
| 955 | return true; |
| 956 | } |
| 957 | page++; |
| 958 | } |
| 959 | return false; |
| 960 | } |
| 961 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 962 | /* Called from RCU critical section */ |
Andreas Färber | bb0e627 | 2013-09-03 13:32:01 +0200 | [diff] [blame] | 963 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, |
Richard Henderson | 8f5db64 | 2019-09-19 21:09:58 -0700 | [diff] [blame] | 964 | MemoryRegionSection *section) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 965 | { |
Richard Henderson | 8f5db64 | 2019-09-19 21:09:58 -0700 | [diff] [blame] | 966 | AddressSpaceDispatch *d = flatview_to_dispatch(section->fv); |
| 967 | return section - d->map.sections; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 968 | } |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 969 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 970 | static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, |
| 971 | uint16_t section); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 972 | static subpage_t *subpage_init(FlatView *fv, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 973 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 974 | static uint16_t phys_section_add(PhysPageMap *map, |
| 975 | MemoryRegionSection *section) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 976 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 977 | /* The physical section number is ORed with a page-aligned |
| 978 | * pointer to produce the iotlb entries. Thus it should |
| 979 | * never overflow into the page-aligned value. |
| 980 | */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 981 | assert(map->sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 982 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 983 | if (map->sections_nb == map->sections_nb_alloc) { |
| 984 | map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16); |
| 985 | map->sections = g_renew(MemoryRegionSection, map->sections, |
| 986 | map->sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 987 | } |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 988 | map->sections[map->sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 989 | memory_region_ref(section->mr); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 990 | return map->sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 991 | } |
| 992 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 993 | static void phys_section_destroy(MemoryRegion *mr) |
| 994 | { |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 995 | bool have_sub_page = mr->subpage; |
| 996 | |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 997 | memory_region_unref(mr); |
| 998 | |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 999 | if (have_sub_page) { |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1000 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 1001 | object_unref(OBJECT(&subpage->iomem)); |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1002 | g_free(subpage); |
| 1003 | } |
| 1004 | } |
| 1005 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1006 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1007 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1008 | while (map->sections_nb > 0) { |
| 1009 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1010 | phys_section_destroy(section->mr); |
| 1011 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1012 | g_free(map->sections); |
| 1013 | g_free(map->nodes); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1014 | } |
| 1015 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1016 | static void register_subpage(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1017 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1018 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1019 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1020 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1021 | & TARGET_PAGE_MASK; |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 1022 | MemoryRegionSection *existing = phys_page_find(d, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1023 | MemoryRegionSection subsection = { |
| 1024 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1025 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1026 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1027 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1028 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1029 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1030 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1031 | if (!(existing->mr->subpage)) { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1032 | subpage = subpage_init(fv, base); |
| 1033 | subsection.fv = fv; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1034 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1035 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1036 | phys_section_add(&d->map, &subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1037 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1038 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1039 | } |
| 1040 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1041 | end = start + int128_get64(section->size) - 1; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1042 | subpage_register(subpage, start, end, |
| 1043 | phys_section_add(&d->map, section)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1044 | } |
| 1045 | |
| 1046 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1047 | static void register_multipage(FlatView *fv, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1048 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1049 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1050 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1051 | hwaddr start_addr = section->offset_within_address_space; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1052 | uint16_t section_index = phys_section_add(&d->map, section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1053 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 1054 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 1055 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1056 | assert(num_pages); |
| 1057 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1058 | } |
| 1059 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1060 | /* |
| 1061 | * The range in *section* may look like this: |
| 1062 | * |
| 1063 | * |s|PPPPPPP|s| |
| 1064 | * |
| 1065 | * where s stands for subpage and P for page. |
| 1066 | */ |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 1067 | void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1068 | { |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1069 | MemoryRegionSection remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1070 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1071 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1072 | /* register first subpage */ |
| 1073 | if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 1074 | uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space) |
| 1075 | - remain.offset_within_address_space; |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1076 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1077 | MemoryRegionSection now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1078 | now.size = int128_min(int128_make64(left), now.size); |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1079 | register_subpage(fv, &now); |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1080 | if (int128_eq(remain.size, now.size)) { |
| 1081 | return; |
| 1082 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1083 | remain.size = int128_sub(remain.size, now.size); |
| 1084 | remain.offset_within_address_space += int128_get64(now.size); |
| 1085 | remain.offset_within_region += int128_get64(now.size); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1086 | } |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1087 | |
| 1088 | /* register whole pages */ |
| 1089 | if (int128_ge(remain.size, page_size)) { |
| 1090 | MemoryRegionSection now = remain; |
| 1091 | now.size = int128_and(now.size, int128_neg(page_size)); |
| 1092 | register_multipage(fv, &now); |
| 1093 | if (int128_eq(remain.size, now.size)) { |
| 1094 | return; |
| 1095 | } |
| 1096 | remain.size = int128_sub(remain.size, now.size); |
| 1097 | remain.offset_within_address_space += int128_get64(now.size); |
| 1098 | remain.offset_within_region += int128_get64(now.size); |
| 1099 | } |
| 1100 | |
| 1101 | /* register last subpage */ |
| 1102 | register_subpage(fv, &remain); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1103 | } |
| 1104 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 1105 | void qemu_flush_coalesced_mmio_buffer(void) |
| 1106 | { |
| 1107 | if (kvm_enabled()) |
| 1108 | kvm_flush_coalesced_mmio_buffer(); |
| 1109 | } |
| 1110 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1111 | void qemu_mutex_lock_ramlist(void) |
| 1112 | { |
| 1113 | qemu_mutex_lock(&ram_list.mutex); |
| 1114 | } |
| 1115 | |
| 1116 | void qemu_mutex_unlock_ramlist(void) |
| 1117 | { |
| 1118 | qemu_mutex_unlock(&ram_list.mutex); |
| 1119 | } |
| 1120 | |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1121 | GString *ram_block_format(void) |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1122 | { |
| 1123 | RAMBlock *block; |
| 1124 | char *psize; |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1125 | GString *buf = g_string_new(""); |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1126 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 1127 | RCU_READ_LOCK_GUARD(); |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1128 | g_string_append_printf(buf, "%24s %8s %18s %18s %18s %18s %3s\n", |
| 1129 | "Block Name", "PSize", "Offset", "Used", "Total", |
| 1130 | "HVA", "RO"); |
| 1131 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1132 | RAMBLOCK_FOREACH(block) { |
| 1133 | psize = size_to_str(block->page_size); |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1134 | g_string_append_printf(buf, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64 |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1135 | " 0x%016" PRIx64 " 0x%016" PRIx64 " %3s\n", |
| 1136 | block->idstr, psize, |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1137 | (uint64_t)block->offset, |
| 1138 | (uint64_t)block->used_length, |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1139 | (uint64_t)block->max_length, |
| 1140 | (uint64_t)(uintptr_t)block->host, |
| 1141 | block->mr->readonly ? "ro" : "rw"); |
| 1142 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1143 | g_free(psize); |
| 1144 | } |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1145 | |
| 1146 | return buf; |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1147 | } |
| 1148 | |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1149 | static int find_min_backend_pagesize(Object *obj, void *opaque) |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1150 | { |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1151 | long *hpsize_min = opaque; |
| 1152 | |
| 1153 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
David Gibson | 7d5489e | 2019-03-26 14:33:33 +1100 | [diff] [blame] | 1154 | HostMemoryBackend *backend = MEMORY_BACKEND(obj); |
| 1155 | long hpsize = host_memory_backend_pagesize(backend); |
David Gibson | 2b10808 | 2018-04-03 15:05:45 +1000 | [diff] [blame] | 1156 | |
David Gibson | 7d5489e | 2019-03-26 14:33:33 +1100 | [diff] [blame] | 1157 | if (host_memory_backend_is_mapped(backend) && (hpsize < *hpsize_min)) { |
David Gibson | 0de6e2a | 2018-04-03 14:55:11 +1000 | [diff] [blame] | 1158 | *hpsize_min = hpsize; |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1159 | } |
| 1160 | } |
| 1161 | |
| 1162 | return 0; |
| 1163 | } |
| 1164 | |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1165 | static int find_max_backend_pagesize(Object *obj, void *opaque) |
| 1166 | { |
| 1167 | long *hpsize_max = opaque; |
| 1168 | |
| 1169 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
| 1170 | HostMemoryBackend *backend = MEMORY_BACKEND(obj); |
| 1171 | long hpsize = host_memory_backend_pagesize(backend); |
| 1172 | |
| 1173 | if (host_memory_backend_is_mapped(backend) && (hpsize > *hpsize_max)) { |
| 1174 | *hpsize_max = hpsize; |
| 1175 | } |
| 1176 | } |
| 1177 | |
| 1178 | return 0; |
| 1179 | } |
| 1180 | |
| 1181 | /* |
| 1182 | * TODO: We assume right now that all mapped host memory backends are |
| 1183 | * used as RAM, however some might be used for different purposes. |
| 1184 | */ |
| 1185 | long qemu_minrampagesize(void) |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1186 | { |
| 1187 | long hpsize = LONG_MAX; |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1188 | Object *memdev_root = object_resolve_path("/objects", NULL); |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1189 | |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1190 | object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize); |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1191 | return hpsize; |
| 1192 | } |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1193 | |
| 1194 | long qemu_maxrampagesize(void) |
| 1195 | { |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1196 | long pagesize = 0; |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1197 | Object *memdev_root = object_resolve_path("/objects", NULL); |
| 1198 | |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1199 | object_child_foreach(memdev_root, find_max_backend_pagesize, &pagesize); |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1200 | return pagesize; |
| 1201 | } |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1202 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 1203 | #ifdef CONFIG_POSIX |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1204 | static int64_t get_file_size(int fd) |
| 1205 | { |
Stefan Hajnoczi | 72d41eb | 2019-08-30 10:30:56 +0100 | [diff] [blame] | 1206 | int64_t size; |
| 1207 | #if defined(__linux__) |
| 1208 | struct stat st; |
| 1209 | |
| 1210 | if (fstat(fd, &st) < 0) { |
| 1211 | return -errno; |
| 1212 | } |
| 1213 | |
| 1214 | /* Special handling for devdax character devices */ |
| 1215 | if (S_ISCHR(st.st_mode)) { |
| 1216 | g_autofree char *subsystem_path = NULL; |
| 1217 | g_autofree char *subsystem = NULL; |
| 1218 | |
| 1219 | subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem", |
| 1220 | major(st.st_rdev), minor(st.st_rdev)); |
| 1221 | subsystem = g_file_read_link(subsystem_path, NULL); |
| 1222 | |
| 1223 | if (subsystem && g_str_has_suffix(subsystem, "/dax")) { |
| 1224 | g_autofree char *size_path = NULL; |
| 1225 | g_autofree char *size_str = NULL; |
| 1226 | |
| 1227 | size_path = g_strdup_printf("/sys/dev/char/%d:%d/size", |
| 1228 | major(st.st_rdev), minor(st.st_rdev)); |
| 1229 | |
| 1230 | if (g_file_get_contents(size_path, &size_str, NULL, NULL)) { |
| 1231 | return g_ascii_strtoll(size_str, NULL, 0); |
| 1232 | } |
| 1233 | } |
| 1234 | } |
| 1235 | #endif /* defined(__linux__) */ |
| 1236 | |
| 1237 | /* st.st_size may be zero for special files yet lseek(2) works */ |
| 1238 | size = lseek(fd, 0, SEEK_END); |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1239 | if (size < 0) { |
| 1240 | return -errno; |
| 1241 | } |
| 1242 | return size; |
| 1243 | } |
| 1244 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1245 | static int64_t get_file_align(int fd) |
| 1246 | { |
| 1247 | int64_t align = -1; |
| 1248 | #if defined(__linux__) && defined(CONFIG_LIBDAXCTL) |
| 1249 | struct stat st; |
| 1250 | |
| 1251 | if (fstat(fd, &st) < 0) { |
| 1252 | return -errno; |
| 1253 | } |
| 1254 | |
| 1255 | /* Special handling for devdax character devices */ |
| 1256 | if (S_ISCHR(st.st_mode)) { |
| 1257 | g_autofree char *path = NULL; |
| 1258 | g_autofree char *rpath = NULL; |
| 1259 | struct daxctl_ctx *ctx; |
| 1260 | struct daxctl_region *region; |
| 1261 | int rc = 0; |
| 1262 | |
| 1263 | path = g_strdup_printf("/sys/dev/char/%d:%d", |
| 1264 | major(st.st_rdev), minor(st.st_rdev)); |
| 1265 | rpath = realpath(path, NULL); |
Peter Maydell | 8efdb7b | 2021-08-12 16:15:25 +0100 | [diff] [blame] | 1266 | if (!rpath) { |
| 1267 | return -errno; |
| 1268 | } |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1269 | |
| 1270 | rc = daxctl_new(&ctx); |
| 1271 | if (rc) { |
| 1272 | return -1; |
| 1273 | } |
| 1274 | |
| 1275 | daxctl_region_foreach(ctx, region) { |
| 1276 | if (strstr(rpath, daxctl_region_get_path(region))) { |
| 1277 | align = daxctl_region_get_align(region); |
| 1278 | break; |
| 1279 | } |
| 1280 | } |
| 1281 | daxctl_unref(ctx); |
| 1282 | } |
| 1283 | #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */ |
| 1284 | |
| 1285 | return align; |
| 1286 | } |
| 1287 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1288 | static int file_ram_open(const char *path, |
| 1289 | const char *region_name, |
Stefan Hajnoczi | 369d6dc | 2021-01-04 17:13:18 +0000 | [diff] [blame] | 1290 | bool readonly, |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1291 | bool *created) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1292 | { |
| 1293 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1294 | char *sanitized_name; |
| 1295 | char *c; |
Paolo Bonzini | 5c3ece7 | 2016-03-17 15:53:13 +0100 | [diff] [blame] | 1296 | int fd = -1; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1297 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1298 | *created = false; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1299 | for (;;) { |
Stefan Hajnoczi | 369d6dc | 2021-01-04 17:13:18 +0000 | [diff] [blame] | 1300 | fd = open(path, readonly ? O_RDONLY : O_RDWR); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1301 | if (fd >= 0) { |
David Hildenbrand | ca01f1b | 2023-09-06 14:04:59 +0200 | [diff] [blame] | 1302 | /* |
| 1303 | * open(O_RDONLY) won't fail with EISDIR. Check manually if we |
| 1304 | * opened a directory and fail similarly to how we fail ENOENT |
| 1305 | * in readonly mode. Note that mkstemp() would imply O_RDWR. |
| 1306 | */ |
| 1307 | if (readonly) { |
| 1308 | struct stat file_stat; |
| 1309 | |
| 1310 | if (fstat(fd, &file_stat)) { |
| 1311 | close(fd); |
| 1312 | if (errno == EINTR) { |
| 1313 | continue; |
| 1314 | } |
| 1315 | return -errno; |
| 1316 | } else if (S_ISDIR(file_stat.st_mode)) { |
| 1317 | close(fd); |
| 1318 | return -EISDIR; |
| 1319 | } |
| 1320 | } |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1321 | /* @path names an existing file, use it */ |
| 1322 | break; |
| 1323 | } |
| 1324 | if (errno == ENOENT) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1325 | if (readonly) { |
| 1326 | /* Refuse to create new, readonly files. */ |
| 1327 | return -ENOENT; |
| 1328 | } |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1329 | /* @path names a file that doesn't exist, create it */ |
| 1330 | fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644); |
| 1331 | if (fd >= 0) { |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1332 | *created = true; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1333 | break; |
| 1334 | } |
| 1335 | } else if (errno == EISDIR) { |
| 1336 | /* @path names a directory, create a file there */ |
| 1337 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1338 | sanitized_name = g_strdup(region_name); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1339 | for (c = sanitized_name; *c != '\0'; c++) { |
| 1340 | if (*c == '/') { |
| 1341 | *c = '_'; |
| 1342 | } |
| 1343 | } |
| 1344 | |
| 1345 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 1346 | sanitized_name); |
| 1347 | g_free(sanitized_name); |
| 1348 | |
| 1349 | fd = mkstemp(filename); |
| 1350 | if (fd >= 0) { |
| 1351 | unlink(filename); |
| 1352 | g_free(filename); |
| 1353 | break; |
| 1354 | } |
| 1355 | g_free(filename); |
| 1356 | } |
| 1357 | if (errno != EEXIST && errno != EINTR) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1358 | return -errno; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1359 | } |
| 1360 | /* |
| 1361 | * Try again on EINTR and EEXIST. The latter happens when |
| 1362 | * something else creates the file between our two open(). |
| 1363 | */ |
| 1364 | } |
| 1365 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1366 | return fd; |
| 1367 | } |
| 1368 | |
| 1369 | static void *file_ram_alloc(RAMBlock *block, |
| 1370 | ram_addr_t memory, |
| 1371 | int fd, |
| 1372 | bool truncate, |
Jagannathan Raman | 44a4ff3 | 2021-01-29 11:46:04 -0500 | [diff] [blame] | 1373 | off_t offset, |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1374 | Error **errp) |
| 1375 | { |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1376 | uint32_t qemu_map_flags; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1377 | void *area; |
| 1378 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1379 | block->page_size = qemu_fd_getpagesize(fd); |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1380 | if (block->mr->align % block->page_size) { |
| 1381 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1382 | " must be multiples of page size 0x%zx", |
| 1383 | block->mr->align, block->page_size); |
| 1384 | return NULL; |
David Hildenbrand | 61362b7 | 2018-06-07 17:47:05 +0200 | [diff] [blame] | 1385 | } else if (block->mr->align && !is_power_of_2(block->mr->align)) { |
| 1386 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1387 | " must be a power of two", block->mr->align); |
| 1388 | return NULL; |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1389 | } else if (offset % block->page_size) { |
| 1390 | error_setg(errp, "offset 0x%" PRIx64 |
| 1391 | " must be multiples of page size 0x%zx", |
| 1392 | offset, block->page_size); |
| 1393 | return NULL; |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1394 | } |
| 1395 | block->mr->align = MAX(block->page_size, block->mr->align); |
Haozhong Zhang | 8360668 | 2016-10-24 20:49:37 +0800 | [diff] [blame] | 1396 | #if defined(__s390x__) |
| 1397 | if (kvm_enabled()) { |
| 1398 | block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN); |
| 1399 | } |
| 1400 | #endif |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1401 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1402 | if (memory < block->page_size) { |
Hu Tao | 557529d | 2014-09-09 13:28:00 +0800 | [diff] [blame] | 1403 | error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to " |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1404 | "or larger than page size 0x%zx", |
| 1405 | memory, block->page_size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1406 | return NULL; |
Haozhong Zhang | 1775f11 | 2016-11-02 09:05:51 +0800 | [diff] [blame] | 1407 | } |
| 1408 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1409 | memory = ROUND_UP(memory, block->page_size); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1410 | |
| 1411 | /* |
| 1412 | * ftruncate is not supported by hugetlbfs in older |
| 1413 | * hosts, so don't bother bailing out on errors. |
| 1414 | * If anything goes wrong with it under other filesystems, |
| 1415 | * mmap will fail. |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1416 | * |
| 1417 | * Do not truncate the non-empty backend file to avoid corrupting |
| 1418 | * the existing data in the file. Disabling shrinking is not |
| 1419 | * enough. For example, the current vNVDIMM implementation stores |
| 1420 | * the guest NVDIMM labels at the end of the backend file. If the |
| 1421 | * backend file is later extended, QEMU will not be able to find |
| 1422 | * those labels. Therefore, extending the non-empty backend file |
| 1423 | * is disabled as well. |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1424 | */ |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1425 | if (truncate && ftruncate(fd, offset + memory)) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1426 | perror("ftruncate"); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1427 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1428 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1429 | qemu_map_flags = (block->flags & RAM_READONLY) ? QEMU_MAP_READONLY : 0; |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1430 | qemu_map_flags |= (block->flags & RAM_SHARED) ? QEMU_MAP_SHARED : 0; |
| 1431 | qemu_map_flags |= (block->flags & RAM_PMEM) ? QEMU_MAP_SYNC : 0; |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1432 | qemu_map_flags |= (block->flags & RAM_NORESERVE) ? QEMU_MAP_NORESERVE : 0; |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1433 | area = qemu_ram_mmap(fd, memory, block->mr->align, qemu_map_flags, offset); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1434 | if (area == MAP_FAILED) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1435 | error_setg_errno(errp, errno, |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1436 | "unable to map backing store for guest RAM"); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1437 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1438 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1439 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1440 | block->fd = fd; |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1441 | block->fd_offset = offset; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1442 | return area; |
| 1443 | } |
| 1444 | #endif |
| 1445 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1446 | /* Allocate space within the ram_addr_t space that governs the |
| 1447 | * dirty bitmaps. |
| 1448 | * Called with the ramlist lock held. |
| 1449 | */ |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1450 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1451 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1452 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1453 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1454 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1455 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1456 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1457 | if (QLIST_EMPTY_RCU(&ram_list.blocks)) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1458 | return 0; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1459 | } |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1460 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1461 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1462 | ram_addr_t candidate, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1463 | |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1464 | /* Align blocks to start on a 'long' in the bitmap |
| 1465 | * which makes the bitmap sync'ing take the fast path. |
| 1466 | */ |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1467 | candidate = block->offset + block->max_length; |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1468 | candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1469 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1470 | /* Search for the closest following block |
| 1471 | * and find the gap. |
| 1472 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1473 | RAMBLOCK_FOREACH(next_block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1474 | if (next_block->offset >= candidate) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1475 | next = MIN(next, next_block->offset); |
| 1476 | } |
| 1477 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1478 | |
| 1479 | /* If it fits remember our place and remember the size |
| 1480 | * of gap, but keep going so that we might find a smaller |
| 1481 | * gap to fill so avoiding fragmentation. |
| 1482 | */ |
| 1483 | if (next - candidate >= size && next - candidate < mingap) { |
| 1484 | offset = candidate; |
| 1485 | mingap = next - candidate; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1486 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1487 | |
| 1488 | trace_find_ram_offset_loop(size, candidate, offset, next, mingap); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1489 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1490 | |
| 1491 | if (offset == RAM_ADDR_MAX) { |
| 1492 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1493 | (uint64_t)size); |
| 1494 | abort(); |
| 1495 | } |
| 1496 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1497 | trace_find_ram_offset(size, offset); |
| 1498 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1499 | return offset; |
| 1500 | } |
| 1501 | |
David Hildenbrand | c136180 | 2018-06-20 22:27:36 +0200 | [diff] [blame] | 1502 | static unsigned long last_ram_page(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1503 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1504 | RAMBlock *block; |
| 1505 | ram_addr_t last = 0; |
| 1506 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 1507 | RCU_READ_LOCK_GUARD(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1508 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1509 | last = MAX(last, block->offset + block->max_length); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1510 | } |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1511 | return last >> TARGET_PAGE_BITS; |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1512 | } |
| 1513 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1514 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1515 | { |
| 1516 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1517 | |
| 1518 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 1519 | if (!machine_dump_guest_core(current_machine)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1520 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1521 | if (ret) { |
| 1522 | perror("qemu_madvise"); |
| 1523 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1524 | "but dump_guest_core=off specified\n"); |
| 1525 | } |
| 1526 | } |
| 1527 | } |
| 1528 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 1529 | const char *qemu_ram_get_idstr(RAMBlock *rb) |
| 1530 | { |
| 1531 | return rb->idstr; |
| 1532 | } |
| 1533 | |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 1534 | void *qemu_ram_get_host_addr(RAMBlock *rb) |
| 1535 | { |
| 1536 | return rb->host; |
| 1537 | } |
| 1538 | |
| 1539 | ram_addr_t qemu_ram_get_offset(RAMBlock *rb) |
| 1540 | { |
| 1541 | return rb->offset; |
| 1542 | } |
| 1543 | |
| 1544 | ram_addr_t qemu_ram_get_used_length(RAMBlock *rb) |
| 1545 | { |
| 1546 | return rb->used_length; |
| 1547 | } |
| 1548 | |
David Hildenbrand | 082851a | 2021-04-29 13:26:59 +0200 | [diff] [blame] | 1549 | ram_addr_t qemu_ram_get_max_length(RAMBlock *rb) |
| 1550 | { |
| 1551 | return rb->max_length; |
| 1552 | } |
| 1553 | |
Dr. David Alan Gilbert | 463a4ac | 2017-03-07 18:36:36 +0000 | [diff] [blame] | 1554 | bool qemu_ram_is_shared(RAMBlock *rb) |
| 1555 | { |
| 1556 | return rb->flags & RAM_SHARED; |
| 1557 | } |
| 1558 | |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1559 | bool qemu_ram_is_noreserve(RAMBlock *rb) |
| 1560 | { |
| 1561 | return rb->flags & RAM_NORESERVE; |
| 1562 | } |
| 1563 | |
Dr. David Alan Gilbert | 2ce1664 | 2018-03-12 17:20:58 +0000 | [diff] [blame] | 1564 | /* Note: Only set at the start of postcopy */ |
| 1565 | bool qemu_ram_is_uf_zeroable(RAMBlock *rb) |
| 1566 | { |
| 1567 | return rb->flags & RAM_UF_ZEROPAGE; |
| 1568 | } |
| 1569 | |
| 1570 | void qemu_ram_set_uf_zeroable(RAMBlock *rb) |
| 1571 | { |
| 1572 | rb->flags |= RAM_UF_ZEROPAGE; |
| 1573 | } |
| 1574 | |
Cédric Le Goater | b895de5 | 2018-05-14 08:57:00 +0200 | [diff] [blame] | 1575 | bool qemu_ram_is_migratable(RAMBlock *rb) |
| 1576 | { |
| 1577 | return rb->flags & RAM_MIGRATABLE; |
| 1578 | } |
| 1579 | |
| 1580 | void qemu_ram_set_migratable(RAMBlock *rb) |
| 1581 | { |
| 1582 | rb->flags |= RAM_MIGRATABLE; |
| 1583 | } |
| 1584 | |
| 1585 | void qemu_ram_unset_migratable(RAMBlock *rb) |
| 1586 | { |
| 1587 | rb->flags &= ~RAM_MIGRATABLE; |
| 1588 | } |
| 1589 | |
Steve Sistare | b0182e5 | 2023-06-07 08:18:36 -0700 | [diff] [blame] | 1590 | bool qemu_ram_is_named_file(RAMBlock *rb) |
| 1591 | { |
| 1592 | return rb->flags & RAM_NAMED_FILE; |
| 1593 | } |
| 1594 | |
Stefan Hajnoczi | 6d998f3 | 2022-10-13 14:59:05 -0400 | [diff] [blame] | 1595 | int qemu_ram_get_fd(RAMBlock *rb) |
| 1596 | { |
| 1597 | return rb->fd; |
| 1598 | } |
| 1599 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1600 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1601 | void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1602 | { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1603 | RAMBlock *block; |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1604 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1605 | assert(new_block); |
| 1606 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1607 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1608 | if (dev) { |
| 1609 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1610 | if (id) { |
| 1611 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1612 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1613 | } |
| 1614 | } |
| 1615 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1616 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 1617 | RCU_READ_LOCK_GUARD(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1618 | RAMBLOCK_FOREACH(block) { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1619 | if (block != new_block && |
| 1620 | !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1621 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1622 | new_block->idstr); |
| 1623 | abort(); |
| 1624 | } |
| 1625 | } |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1626 | } |
| 1627 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1628 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1629 | void qemu_ram_unset_idstr(RAMBlock *block) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1630 | { |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1631 | /* FIXME: arch_init.c assumes that this is not called throughout |
| 1632 | * migration. Ignore the problem since hot-unplug during migration |
| 1633 | * does not work anyway. |
| 1634 | */ |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1635 | if (block) { |
| 1636 | memset(block->idstr, 0, sizeof(block->idstr)); |
| 1637 | } |
| 1638 | } |
| 1639 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1640 | size_t qemu_ram_pagesize(RAMBlock *rb) |
| 1641 | { |
| 1642 | return rb->page_size; |
| 1643 | } |
| 1644 | |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1645 | /* Returns the largest size of page in use */ |
| 1646 | size_t qemu_ram_pagesize_largest(void) |
| 1647 | { |
| 1648 | RAMBlock *block; |
| 1649 | size_t largest = 0; |
| 1650 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1651 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1652 | largest = MAX(largest, qemu_ram_pagesize(block)); |
| 1653 | } |
| 1654 | |
| 1655 | return largest; |
| 1656 | } |
| 1657 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1658 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1659 | { |
Marcel Apfelbaum | 75cc7f0 | 2015-02-04 17:43:55 +0200 | [diff] [blame] | 1660 | if (!machine_mem_merge(current_machine)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1661 | /* disabled by the user */ |
| 1662 | return 0; |
| 1663 | } |
| 1664 | |
| 1665 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1666 | } |
| 1667 | |
David Hildenbrand | c7c0e72 | 2021-04-29 13:27:02 +0200 | [diff] [blame] | 1668 | /* |
| 1669 | * Resizing RAM while migrating can result in the migration being canceled. |
| 1670 | * Care has to be taken if the guest might have already detected the memory. |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1671 | * |
| 1672 | * As memory core doesn't know how is memory accessed, it is up to |
| 1673 | * resize callback to update device state and/or add assertions to detect |
| 1674 | * misuse, if necessary. |
| 1675 | */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1676 | int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp) |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1677 | { |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1678 | const ram_addr_t oldsize = block->used_length; |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1679 | const ram_addr_t unaligned_size = newsize; |
| 1680 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1681 | assert(block); |
| 1682 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 1683 | newsize = HOST_PAGE_ALIGN(newsize); |
Michael S. Tsirkin | 129ddaf | 2015-02-17 10:15:30 +0100 | [diff] [blame] | 1684 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1685 | if (block->used_length == newsize) { |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1686 | /* |
| 1687 | * We don't have to resize the ram block (which only knows aligned |
| 1688 | * sizes), however, we have to notify if the unaligned size changed. |
| 1689 | */ |
| 1690 | if (unaligned_size != memory_region_size(block->mr)) { |
| 1691 | memory_region_set_size(block->mr, unaligned_size); |
| 1692 | if (block->resized) { |
| 1693 | block->resized(block->idstr, unaligned_size, block->host); |
| 1694 | } |
| 1695 | } |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1696 | return 0; |
| 1697 | } |
| 1698 | |
| 1699 | if (!(block->flags & RAM_RESIZEABLE)) { |
| 1700 | error_setg_errno(errp, EINVAL, |
Pankaj Gupta | a3a9290 | 2020-10-22 13:13:02 +0200 | [diff] [blame] | 1701 | "Size mismatch: %s: 0x" RAM_ADDR_FMT |
| 1702 | " != 0x" RAM_ADDR_FMT, block->idstr, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1703 | newsize, block->used_length); |
| 1704 | return -EINVAL; |
| 1705 | } |
| 1706 | |
| 1707 | if (block->max_length < newsize) { |
| 1708 | error_setg_errno(errp, EINVAL, |
Pankaj Gupta | a3a9290 | 2020-10-22 13:13:02 +0200 | [diff] [blame] | 1709 | "Size too large: %s: 0x" RAM_ADDR_FMT |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1710 | " > 0x" RAM_ADDR_FMT, block->idstr, |
| 1711 | newsize, block->max_length); |
| 1712 | return -EINVAL; |
| 1713 | } |
| 1714 | |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1715 | /* Notify before modifying the ram block and touching the bitmaps. */ |
| 1716 | if (block->host) { |
| 1717 | ram_block_notify_resize(block->host, oldsize, newsize); |
| 1718 | } |
| 1719 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1720 | cpu_physical_memory_clear_dirty_range(block->offset, block->used_length); |
| 1721 | block->used_length = newsize; |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1722 | cpu_physical_memory_set_dirty_range(block->offset, block->used_length, |
| 1723 | DIRTY_CLIENTS_ALL); |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1724 | memory_region_set_size(block->mr, unaligned_size); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1725 | if (block->resized) { |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1726 | block->resized(block->idstr, unaligned_size, block->host); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1727 | } |
| 1728 | return 0; |
| 1729 | } |
| 1730 | |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1731 | /* |
| 1732 | * Trigger sync on the given ram block for range [start, start + length] |
| 1733 | * with the backing store if one is available. |
| 1734 | * Otherwise no-op. |
| 1735 | * @Note: this is supposed to be a synchronous op. |
| 1736 | */ |
Philippe Mathieu-Daudé | ab7e41e | 2020-05-08 08:24:56 +0200 | [diff] [blame] | 1737 | void qemu_ram_msync(RAMBlock *block, ram_addr_t start, ram_addr_t length) |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1738 | { |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1739 | /* The requested range should fit in within the block range */ |
| 1740 | g_assert((start + length) <= block->used_length); |
| 1741 | |
| 1742 | #ifdef CONFIG_LIBPMEM |
| 1743 | /* The lack of support for pmem should not block the sync */ |
| 1744 | if (ramblock_is_pmem(block)) { |
Anthony PERARD | 5d4c954 | 2019-12-19 15:43:22 +0000 | [diff] [blame] | 1745 | void *addr = ramblock_ptr(block, start); |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1746 | pmem_persist(addr, length); |
| 1747 | return; |
| 1748 | } |
| 1749 | #endif |
| 1750 | if (block->fd >= 0) { |
| 1751 | /** |
| 1752 | * Case there is no support for PMEM or the memory has not been |
| 1753 | * specified as persistent (or is not one) - use the msync. |
| 1754 | * Less optimal but still achieves the same goal |
| 1755 | */ |
Anthony PERARD | 5d4c954 | 2019-12-19 15:43:22 +0000 | [diff] [blame] | 1756 | void *addr = ramblock_ptr(block, start); |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1757 | if (qemu_msync(addr, length, block->fd)) { |
| 1758 | warn_report("%s: failed to sync memory range: start: " |
| 1759 | RAM_ADDR_FMT " length: " RAM_ADDR_FMT, |
| 1760 | __func__, start, length); |
| 1761 | } |
| 1762 | } |
| 1763 | } |
| 1764 | |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1765 | /* Called with ram_list.mutex held */ |
| 1766 | static void dirty_memory_extend(ram_addr_t old_ram_size, |
| 1767 | ram_addr_t new_ram_size) |
| 1768 | { |
| 1769 | ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size, |
| 1770 | DIRTY_MEMORY_BLOCK_SIZE); |
| 1771 | ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size, |
| 1772 | DIRTY_MEMORY_BLOCK_SIZE); |
| 1773 | int i; |
| 1774 | |
| 1775 | /* Only need to extend if block count increased */ |
| 1776 | if (new_num_blocks <= old_num_blocks) { |
| 1777 | return; |
| 1778 | } |
| 1779 | |
| 1780 | for (i = 0; i < DIRTY_MEMORY_NUM; i++) { |
| 1781 | DirtyMemoryBlocks *old_blocks; |
| 1782 | DirtyMemoryBlocks *new_blocks; |
| 1783 | int j; |
| 1784 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 1785 | old_blocks = qatomic_rcu_read(&ram_list.dirty_memory[i]); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1786 | new_blocks = g_malloc(sizeof(*new_blocks) + |
| 1787 | sizeof(new_blocks->blocks[0]) * new_num_blocks); |
| 1788 | |
| 1789 | if (old_num_blocks) { |
| 1790 | memcpy(new_blocks->blocks, old_blocks->blocks, |
| 1791 | old_num_blocks * sizeof(old_blocks->blocks[0])); |
| 1792 | } |
| 1793 | |
| 1794 | for (j = old_num_blocks; j < new_num_blocks; j++) { |
| 1795 | new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE); |
| 1796 | } |
| 1797 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 1798 | qatomic_rcu_set(&ram_list.dirty_memory[i], new_blocks); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1799 | |
| 1800 | if (old_blocks) { |
| 1801 | g_free_rcu(old_blocks, rcu); |
| 1802 | } |
| 1803 | } |
| 1804 | } |
| 1805 | |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 1806 | static void ram_block_add(RAMBlock *new_block, Error **errp) |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1807 | { |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1808 | const bool noreserve = qemu_ram_is_noreserve(new_block); |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 1809 | const bool shared = qemu_ram_is_shared(new_block); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1810 | RAMBlock *block; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1811 | RAMBlock *last_block = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1812 | ram_addr_t old_ram_size, new_ram_size; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1813 | Error *err = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1814 | |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1815 | old_ram_size = last_ram_page(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1816 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1817 | qemu_mutex_lock_ramlist(); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1818 | new_block->offset = find_ram_offset(new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1819 | |
| 1820 | if (!new_block->host) { |
| 1821 | if (xen_enabled()) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1822 | xen_ram_alloc(new_block->offset, new_block->max_length, |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1823 | new_block->mr, &err); |
| 1824 | if (err) { |
| 1825 | error_propagate(errp, err); |
| 1826 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1827 | return; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1828 | } |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1829 | } else { |
David Hildenbrand | 25459eb | 2021-03-03 14:09:16 +0100 | [diff] [blame] | 1830 | new_block->host = qemu_anon_ram_alloc(new_block->max_length, |
| 1831 | &new_block->mr->align, |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1832 | shared, noreserve); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1833 | if (!new_block->host) { |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1834 | error_setg_errno(errp, errno, |
| 1835 | "cannot set up guest memory '%s'", |
| 1836 | memory_region_name(new_block->mr)); |
| 1837 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1838 | return; |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1839 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1840 | memory_try_enable_merging(new_block->host, new_block->max_length); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1841 | } |
| 1842 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1843 | |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 1844 | new_ram_size = MAX(old_ram_size, |
| 1845 | (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS); |
| 1846 | if (new_ram_size > old_ram_size) { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1847 | dirty_memory_extend(old_ram_size, new_ram_size); |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 1848 | } |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1849 | /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ, |
| 1850 | * QLIST (which has an RCU-friendly variant) does not have insertion at |
| 1851 | * tail, so save the last element in last_block. |
| 1852 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1853 | RAMBLOCK_FOREACH(block) { |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1854 | last_block = block; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1855 | if (block->max_length < new_block->max_length) { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1856 | break; |
| 1857 | } |
| 1858 | } |
| 1859 | if (block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1860 | QLIST_INSERT_BEFORE_RCU(block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1861 | } else if (last_block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1862 | QLIST_INSERT_AFTER_RCU(last_block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1863 | } else { /* list is empty */ |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1864 | QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next); |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1865 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1866 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1867 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1868 | /* Write list before version */ |
| 1869 | smp_wmb(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1870 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1871 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1872 | |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1873 | cpu_physical_memory_set_dirty_range(new_block->offset, |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1874 | new_block->used_length, |
| 1875 | DIRTY_CLIENTS_ALL); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1876 | |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 1877 | if (new_block->host) { |
| 1878 | qemu_ram_setup_dump(new_block->host, new_block->max_length); |
| 1879 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE); |
Alexander Bulekov | a028ede | 2020-02-19 23:11:09 -0500 | [diff] [blame] | 1880 | /* |
| 1881 | * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU |
| 1882 | * Configure it unless the machine is a qtest server, in which case |
| 1883 | * KVM is not used and it may be forked (eg for fuzzing purposes). |
| 1884 | */ |
| 1885 | if (!qtest_enabled()) { |
| 1886 | qemu_madvise(new_block->host, new_block->max_length, |
| 1887 | QEMU_MADV_DONTFORK); |
| 1888 | } |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1889 | ram_block_notify_add(new_block->host, new_block->used_length, |
| 1890 | new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1891 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1892 | } |
| 1893 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 1894 | #ifdef CONFIG_POSIX |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1895 | RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, |
Jagannathan Raman | 44a4ff3 | 2021-01-29 11:46:04 -0500 | [diff] [blame] | 1896 | uint32_t ram_flags, int fd, off_t offset, |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1897 | Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1898 | { |
| 1899 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1900 | Error *local_err = NULL; |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1901 | int64_t file_size, file_align; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1902 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 1903 | /* Just support these ram flags by now. */ |
Sean Christopherson | 56918a1 | 2021-07-19 19:21:04 +0800 | [diff] [blame] | 1904 | assert((ram_flags & ~(RAM_SHARED | RAM_PMEM | RAM_NORESERVE | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1905 | RAM_PROTECTED | RAM_NAMED_FILE | RAM_READONLY | |
| 1906 | RAM_READONLY_FD)) == 0); |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 1907 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1908 | if (xen_enabled()) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1909 | error_setg(errp, "-mem-path not supported with Xen"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1910 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1911 | } |
| 1912 | |
Marc-André Lureau | e45e7ae | 2017-06-02 18:12:21 +0400 | [diff] [blame] | 1913 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 1914 | error_setg(errp, |
| 1915 | "host lacks kvm mmu notifiers, -mem-path unsupported"); |
| 1916 | return NULL; |
| 1917 | } |
| 1918 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 1919 | size = HOST_PAGE_ALIGN(size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1920 | file_size = get_file_size(fd); |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1921 | if (file_size > offset && file_size < (offset + size)) { |
Igor Mammedov | c001c3b | 2020-02-19 11:09:48 -0500 | [diff] [blame] | 1922 | error_setg(errp, "backing store size 0x%" PRIx64 |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1923 | " does not match 'size' option 0x" RAM_ADDR_FMT, |
Igor Mammedov | c001c3b | 2020-02-19 11:09:48 -0500 | [diff] [blame] | 1924 | file_size, size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1925 | return NULL; |
| 1926 | } |
| 1927 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1928 | file_align = get_file_align(fd); |
Peter Maydell | 8f1bdb0 | 2021-08-12 16:06:24 +0100 | [diff] [blame] | 1929 | if (file_align > 0 && file_align > mr->align) { |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1930 | error_setg(errp, "backing store align 0x%" PRIx64 |
Jingqi Liu | 5f50975 | 2020-04-29 16:50:10 +0800 | [diff] [blame] | 1931 | " is larger than 'align' option 0x%" PRIx64, |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1932 | file_align, mr->align); |
| 1933 | return NULL; |
| 1934 | } |
| 1935 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1936 | new_block = g_malloc0(sizeof(*new_block)); |
| 1937 | new_block->mr = mr; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1938 | new_block->used_length = size; |
| 1939 | new_block->max_length = size; |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 1940 | new_block->flags = ram_flags; |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1941 | new_block->host = file_ram_alloc(new_block, size, fd, !file_size, offset, |
| 1942 | errp); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1943 | if (!new_block->host) { |
| 1944 | g_free(new_block); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1945 | return NULL; |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1946 | } |
| 1947 | |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 1948 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1949 | if (local_err) { |
| 1950 | g_free(new_block); |
| 1951 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1952 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1953 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1954 | return new_block; |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1955 | |
| 1956 | } |
| 1957 | |
| 1958 | |
| 1959 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 1960 | uint32_t ram_flags, const char *mem_path, |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1961 | off_t offset, Error **errp) |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1962 | { |
| 1963 | int fd; |
| 1964 | bool created; |
| 1965 | RAMBlock *block; |
| 1966 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1967 | fd = file_ram_open(mem_path, memory_region_name(mr), |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1968 | !!(ram_flags & RAM_READONLY_FD), &created); |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1969 | if (fd < 0) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1970 | error_setg_errno(errp, -fd, "can't open backing store %s for guest RAM", |
| 1971 | mem_path); |
David Hildenbrand | 6da4b1c | 2023-09-06 14:05:02 +0200 | [diff] [blame] | 1972 | if (!(ram_flags & RAM_READONLY_FD) && !(ram_flags & RAM_SHARED) && |
| 1973 | fd == -EACCES) { |
| 1974 | /* |
| 1975 | * If we can open the file R/O (note: will never create a new file) |
| 1976 | * and we are dealing with a private mapping, there are still ways |
| 1977 | * to consume such files and get RAM instead of ROM. |
| 1978 | */ |
| 1979 | fd = file_ram_open(mem_path, memory_region_name(mr), true, |
| 1980 | &created); |
| 1981 | if (fd < 0) { |
| 1982 | return NULL; |
| 1983 | } |
| 1984 | assert(!created); |
| 1985 | close(fd); |
| 1986 | error_append_hint(errp, "Consider opening the backing store" |
| 1987 | " read-only but still creating writable RAM using" |
| 1988 | " '-object memory-backend-file,readonly=on,rom=off...'" |
| 1989 | " (see \"VM templating\" documentation)\n"); |
| 1990 | } |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1991 | return NULL; |
| 1992 | } |
| 1993 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1994 | block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset, errp); |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1995 | if (!block) { |
| 1996 | if (created) { |
| 1997 | unlink(mem_path); |
| 1998 | } |
| 1999 | close(fd); |
| 2000 | return NULL; |
| 2001 | } |
| 2002 | |
| 2003 | return block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2004 | } |
Paolo Bonzini | 0b183fc | 2014-05-14 17:43:19 +0800 | [diff] [blame] | 2005 | #endif |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2006 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2007 | static |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2008 | RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size, |
| 2009 | void (*resized)(const char*, |
| 2010 | uint64_t length, |
| 2011 | void *host), |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2012 | void *host, uint32_t ram_flags, |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2013 | MemoryRegion *mr, Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2014 | { |
| 2015 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2016 | Error *local_err = NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2017 | |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 2018 | assert((ram_flags & ~(RAM_SHARED | RAM_RESIZEABLE | RAM_PREALLOC | |
| 2019 | RAM_NORESERVE)) == 0); |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2020 | assert(!host ^ (ram_flags & RAM_PREALLOC)); |
| 2021 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 2022 | size = HOST_PAGE_ALIGN(size); |
| 2023 | max_size = HOST_PAGE_ALIGN(max_size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2024 | new_block = g_malloc0(sizeof(*new_block)); |
| 2025 | new_block->mr = mr; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2026 | new_block->resized = resized; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2027 | new_block->used_length = size; |
| 2028 | new_block->max_length = max_size; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2029 | assert(max_size >= size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2030 | new_block->fd = -1; |
Marc-André Lureau | 8e3b0cb | 2022-03-23 19:57:22 +0400 | [diff] [blame] | 2031 | new_block->page_size = qemu_real_host_page_size(); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2032 | new_block->host = host; |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2033 | new_block->flags = ram_flags; |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 2034 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2035 | if (local_err) { |
| 2036 | g_free(new_block); |
| 2037 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2038 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2039 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2040 | return new_block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2041 | } |
| 2042 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2043 | RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2044 | MemoryRegion *mr, Error **errp) |
| 2045 | { |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2046 | return qemu_ram_alloc_internal(size, size, NULL, host, RAM_PREALLOC, mr, |
| 2047 | errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2048 | } |
| 2049 | |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2050 | RAMBlock *qemu_ram_alloc(ram_addr_t size, uint32_t ram_flags, |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2051 | MemoryRegion *mr, Error **errp) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2052 | { |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 2053 | assert((ram_flags & ~(RAM_SHARED | RAM_NORESERVE)) == 0); |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2054 | return qemu_ram_alloc_internal(size, size, NULL, NULL, ram_flags, mr, errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2055 | } |
| 2056 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2057 | RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2058 | void (*resized)(const char*, |
| 2059 | uint64_t length, |
| 2060 | void *host), |
| 2061 | MemoryRegion *mr, Error **errp) |
| 2062 | { |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2063 | return qemu_ram_alloc_internal(size, maxsz, resized, NULL, |
| 2064 | RAM_RESIZEABLE, mr, errp); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2065 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2066 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2067 | static void reclaim_ramblock(RAMBlock *block) |
| 2068 | { |
| 2069 | if (block->flags & RAM_PREALLOC) { |
| 2070 | ; |
| 2071 | } else if (xen_enabled()) { |
| 2072 | xen_invalidate_map_cache_entry(block->host); |
| 2073 | #ifndef _WIN32 |
| 2074 | } else if (block->fd >= 0) { |
Murilo Opsfelder Araujo | 53adb9d | 2019-01-30 21:36:05 -0200 | [diff] [blame] | 2075 | qemu_ram_munmap(block->fd, block->host, block->max_length); |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2076 | close(block->fd); |
| 2077 | #endif |
| 2078 | } else { |
| 2079 | qemu_anon_ram_free(block->host, block->max_length); |
| 2080 | } |
| 2081 | g_free(block); |
| 2082 | } |
| 2083 | |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2084 | void qemu_ram_free(RAMBlock *block) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2085 | { |
Marc-André Lureau | 85bc2a1 | 2016-03-29 13:20:51 +0200 | [diff] [blame] | 2086 | if (!block) { |
| 2087 | return; |
| 2088 | } |
| 2089 | |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2090 | if (block->host) { |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 2091 | ram_block_notify_remove(block->host, block->used_length, |
| 2092 | block->max_length); |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2093 | } |
| 2094 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2095 | qemu_mutex_lock_ramlist(); |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2096 | QLIST_REMOVE_RCU(block, next); |
| 2097 | ram_list.mru_block = NULL; |
| 2098 | /* Write list before version */ |
| 2099 | smp_wmb(); |
| 2100 | ram_list.version++; |
| 2101 | call_rcu(block, reclaim_ramblock, rcu); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2102 | qemu_mutex_unlock_ramlist(); |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2103 | } |
| 2104 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2105 | #ifndef _WIN32 |
| 2106 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 2107 | { |
| 2108 | RAMBlock *block; |
| 2109 | ram_addr_t offset; |
| 2110 | int flags; |
| 2111 | void *area, *vaddr; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2112 | int prot; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2113 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2114 | RAMBLOCK_FOREACH(block) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2115 | offset = addr - block->offset; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2116 | if (offset < block->max_length) { |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 2117 | vaddr = ramblock_ptr(block, offset); |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2118 | if (block->flags & RAM_PREALLOC) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2119 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 2120 | } else if (xen_enabled()) { |
| 2121 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2122 | } else { |
| 2123 | flags = MAP_FIXED; |
David Hildenbrand | dbb92ee | 2021-04-06 10:01:26 +0200 | [diff] [blame] | 2124 | flags |= block->flags & RAM_SHARED ? |
| 2125 | MAP_SHARED : MAP_PRIVATE; |
David Hildenbrand | d94e0bc | 2021-05-10 13:43:22 +0200 | [diff] [blame] | 2126 | flags |= block->flags & RAM_NORESERVE ? MAP_NORESERVE : 0; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2127 | prot = PROT_READ; |
| 2128 | prot |= block->flags & RAM_READONLY ? 0 : PROT_WRITE; |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2129 | if (block->fd >= 0) { |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2130 | area = mmap(vaddr, length, prot, flags, block->fd, |
| 2131 | offset + block->fd_offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2132 | } else { |
David Hildenbrand | dbb92ee | 2021-04-06 10:01:26 +0200 | [diff] [blame] | 2133 | flags |= MAP_ANONYMOUS; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2134 | area = mmap(vaddr, length, prot, flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2135 | } |
| 2136 | if (area != vaddr) { |
Alistair Francis | 493d89b | 2018-02-03 09:43:14 +0100 | [diff] [blame] | 2137 | error_report("Could not remap addr: " |
| 2138 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "", |
| 2139 | length, addr); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2140 | exit(1); |
| 2141 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2142 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 2143 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2144 | } |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2145 | } |
| 2146 | } |
| 2147 | } |
| 2148 | #endif /* !_WIN32 */ |
| 2149 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2150 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2151 | * This should not be used for general purpose DMA. Use address_space_map |
| 2152 | * or address_space_rw instead. For local memory (e.g. video ram) that the |
| 2153 | * device owns, use memory_region_get_ram_ptr. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2154 | * |
Paolo Bonzini | 49b24af | 2015-12-16 10:30:47 +0100 | [diff] [blame] | 2155 | * Called within RCU critical section. |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2156 | */ |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2157 | void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr) |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2158 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2159 | RAMBlock *block = ram_block; |
| 2160 | |
| 2161 | if (block == NULL) { |
| 2162 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2163 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2164 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2165 | |
| 2166 | if (xen_enabled() && block->host == NULL) { |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2167 | /* We need to check if the requested address is in the RAM |
| 2168 | * because we don't want to map the entire memory in QEMU. |
| 2169 | * In that case just map until the end of the page. |
| 2170 | */ |
| 2171 | if (block->offset == 0) { |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2172 | return xen_map_cache(addr, 0, 0, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2173 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2174 | |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2175 | block->host = xen_map_cache(block->offset, block->max_length, 1, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2176 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2177 | return ramblock_ptr(block, addr); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 2178 | } |
| 2179 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2180 | /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2181 | * but takes a size argument. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2182 | * |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2183 | * Called within RCU critical section. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2184 | */ |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2185 | static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr, |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2186 | hwaddr *size, bool lock) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2187 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2188 | RAMBlock *block = ram_block; |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2189 | if (*size == 0) { |
| 2190 | return NULL; |
| 2191 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2192 | |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2193 | if (block == NULL) { |
| 2194 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2195 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2196 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2197 | *size = MIN(*size, block->max_length - addr); |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2198 | |
| 2199 | if (xen_enabled() && block->host == NULL) { |
| 2200 | /* We need to check if the requested address is in the RAM |
| 2201 | * because we don't want to map the entire memory in QEMU. |
| 2202 | * In that case just map the requested area. |
| 2203 | */ |
| 2204 | if (block->offset == 0) { |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2205 | return xen_map_cache(addr, *size, lock, lock); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2206 | } |
| 2207 | |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2208 | block->host = xen_map_cache(block->offset, block->max_length, 1, lock); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2209 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2210 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2211 | return ramblock_ptr(block, addr); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2212 | } |
| 2213 | |
Dr. David Alan Gilbert | f90bb71 | 2018-03-12 17:20:57 +0000 | [diff] [blame] | 2214 | /* Return the offset of a hostpointer within a ramblock */ |
| 2215 | ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host) |
| 2216 | { |
| 2217 | ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host; |
| 2218 | assert((uintptr_t)host >= (uintptr_t)rb->host); |
| 2219 | assert(res < rb->max_length); |
| 2220 | |
| 2221 | return res; |
| 2222 | } |
| 2223 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2224 | RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2225 | ram_addr_t *offset) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2226 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2227 | RAMBlock *block; |
| 2228 | uint8_t *host = ptr; |
| 2229 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2230 | if (xen_enabled()) { |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2231 | ram_addr_t ram_addr; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2232 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2233 | ram_addr = xen_ram_addr_from_mapcache(ptr); |
| 2234 | block = qemu_get_ram_block(ram_addr); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2235 | if (block) { |
Anthony PERARD | d6b6aec | 2016-06-09 16:56:17 +0100 | [diff] [blame] | 2236 | *offset = ram_addr - block->offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2237 | } |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2238 | return block; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 2239 | } |
| 2240 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2241 | RCU_READ_LOCK_GUARD(); |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 2242 | block = qatomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2243 | if (block && block->host && host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2244 | goto found; |
| 2245 | } |
| 2246 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2247 | RAMBLOCK_FOREACH(block) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2248 | /* This case append when the block is not mapped. */ |
| 2249 | if (block->host == NULL) { |
| 2250 | continue; |
| 2251 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2252 | if (host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2253 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2254 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2255 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2256 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2257 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2258 | |
| 2259 | found: |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2260 | *offset = (host - block->host); |
| 2261 | if (round_offset) { |
| 2262 | *offset &= TARGET_PAGE_MASK; |
| 2263 | } |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2264 | return block; |
| 2265 | } |
| 2266 | |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2267 | /* |
| 2268 | * Finds the named RAMBlock |
| 2269 | * |
| 2270 | * name: The name of RAMBlock to find |
| 2271 | * |
| 2272 | * Returns: RAMBlock (or NULL if not found) |
| 2273 | */ |
| 2274 | RAMBlock *qemu_ram_block_by_name(const char *name) |
| 2275 | { |
| 2276 | RAMBlock *block; |
| 2277 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2278 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2279 | if (!strcmp(name, block->idstr)) { |
| 2280 | return block; |
| 2281 | } |
| 2282 | } |
| 2283 | |
| 2284 | return NULL; |
| 2285 | } |
| 2286 | |
Philippe Mathieu-Daudé | 8d7f2e7 | 2023-10-04 11:06:28 +0200 | [diff] [blame] | 2287 | /* |
| 2288 | * Some of the system routines need to translate from a host pointer |
| 2289 | * (typically a TLB entry) back to a ram offset. |
| 2290 | */ |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2291 | ram_addr_t qemu_ram_addr_from_host(void *ptr) |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2292 | { |
| 2293 | RAMBlock *block; |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2294 | ram_addr_t offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2295 | |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2296 | block = qemu_ram_block_from_host(ptr, false, &offset); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2297 | if (!block) { |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2298 | return RAM_ADDR_INVALID; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2299 | } |
| 2300 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2301 | return block->offset + offset; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 2302 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2303 | |
Richard Henderson | 97e0346 | 2022-08-10 12:04:15 -0700 | [diff] [blame] | 2304 | ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr) |
| 2305 | { |
| 2306 | ram_addr_t ram_addr; |
| 2307 | |
| 2308 | ram_addr = qemu_ram_addr_from_host(ptr); |
| 2309 | if (ram_addr == RAM_ADDR_INVALID) { |
| 2310 | error_report("Bad ram pointer %p", ptr); |
| 2311 | abort(); |
| 2312 | } |
| 2313 | return ram_addr; |
| 2314 | } |
| 2315 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2316 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2317 | MemTxAttrs attrs, void *buf, hwaddr len); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2318 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2319 | const void *buf, hwaddr len); |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2320 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2321 | bool is_write, MemTxAttrs attrs); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2322 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2323 | static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, |
| 2324 | unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2325 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2326 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2327 | uint8_t buf[8]; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2328 | MemTxResult res; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2329 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2330 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2331 | printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2332 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2333 | #endif |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2334 | res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len); |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2335 | if (res) { |
| 2336 | return res; |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2337 | } |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2338 | *data = ldn_p(buf, len); |
| 2339 | return MEMTX_OK; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2340 | } |
| 2341 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2342 | static MemTxResult subpage_write(void *opaque, hwaddr addr, |
| 2343 | uint64_t value, unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2344 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2345 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2346 | uint8_t buf[8]; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2347 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2348 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2349 | printf("%s: subpage %p len %u addr " HWADDR_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2350 | " value %"PRIx64"\n", |
| 2351 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2352 | #endif |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2353 | stn_p(buf, len, value); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2354 | return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2355 | } |
| 2356 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2357 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Peter Maydell | 8372d38 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2358 | unsigned len, bool is_write, |
| 2359 | MemTxAttrs attrs) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2360 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2361 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2362 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2363 | printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2364 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2365 | #endif |
| 2366 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2367 | return flatview_access_valid(subpage->fv, addr + subpage->base, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2368 | len, is_write, attrs); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2369 | } |
| 2370 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2371 | static const MemoryRegionOps subpage_ops = { |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2372 | .read_with_attrs = subpage_read, |
| 2373 | .write_with_attrs = subpage_write, |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2374 | .impl.min_access_size = 1, |
| 2375 | .impl.max_access_size = 8, |
| 2376 | .valid.min_access_size = 1, |
| 2377 | .valid.max_access_size = 8, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2378 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2379 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2380 | }; |
| 2381 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 2382 | static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, |
| 2383 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2384 | { |
| 2385 | int idx, eidx; |
| 2386 | |
| 2387 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 2388 | return -1; |
| 2389 | idx = SUBPAGE_IDX(start); |
| 2390 | eidx = SUBPAGE_IDX(end); |
| 2391 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2392 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 2393 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2394 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2395 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2396 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2397 | } |
| 2398 | |
| 2399 | return 0; |
| 2400 | } |
| 2401 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2402 | static subpage_t *subpage_init(FlatView *fv, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2403 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2404 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2405 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 2406 | /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */ |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 2407 | mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t)); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2408 | mmio->fv = fv; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 2409 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2410 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 2411 | NULL, TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 2412 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2413 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2414 | printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2415 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2416 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2417 | |
| 2418 | return mmio; |
| 2419 | } |
| 2420 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2421 | static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2422 | { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2423 | assert(fv); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2424 | MemoryRegionSection section = { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2425 | .fv = fv, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2426 | .mr = mr, |
| 2427 | .offset_within_address_space = 0, |
| 2428 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 2429 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2430 | }; |
| 2431 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2432 | return phys_section_add(map, §ion); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2433 | } |
| 2434 | |
Peter Maydell | 2d54f19 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2435 | MemoryRegionSection *iotlb_to_section(CPUState *cpu, |
| 2436 | hwaddr index, MemTxAttrs attrs) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2437 | { |
Peter Maydell | a54c87b | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 2438 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 2439 | CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2440 | AddressSpaceDispatch *d = cpuas->memory_dispatch; |
Richard Henderson | 86e4f93 | 2023-08-25 14:06:58 -0700 | [diff] [blame] | 2441 | int section_index = index & ~TARGET_PAGE_MASK; |
| 2442 | MemoryRegionSection *ret; |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 2443 | |
Richard Henderson | 86e4f93 | 2023-08-25 14:06:58 -0700 | [diff] [blame] | 2444 | assert(section_index < d->map.sections_nb); |
| 2445 | ret = d->map.sections + section_index; |
| 2446 | assert(ret->mr); |
| 2447 | assert(ret->mr->ops); |
| 2448 | |
| 2449 | return ret; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2450 | } |
| 2451 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2452 | static void io_mem_init(void) |
| 2453 | { |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2454 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2455 | NULL, UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2456 | } |
| 2457 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 2458 | AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2459 | { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2460 | AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1); |
| 2461 | uint16_t n; |
| 2462 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2463 | n = dummy_section(&d->map, fv, &io_mem_unassigned); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2464 | assert(n == PHYS_SECTION_UNASSIGNED); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2465 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 2466 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 2467 | |
| 2468 | return d; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2469 | } |
| 2470 | |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 2471 | void address_space_dispatch_free(AddressSpaceDispatch *d) |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2472 | { |
| 2473 | phys_sections_free(&d->map); |
| 2474 | g_free(d); |
| 2475 | } |
| 2476 | |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 2477 | static void do_nothing(CPUState *cpu, run_on_cpu_data d) |
| 2478 | { |
| 2479 | } |
| 2480 | |
| 2481 | static void tcg_log_global_after_sync(MemoryListener *listener) |
| 2482 | { |
| 2483 | CPUAddressSpace *cpuas; |
| 2484 | |
| 2485 | /* Wait for the CPU to end the current TB. This avoids the following |
| 2486 | * incorrect race: |
| 2487 | * |
| 2488 | * vCPU migration |
| 2489 | * ---------------------- ------------------------- |
| 2490 | * TLB check -> slow path |
| 2491 | * notdirty_mem_write |
| 2492 | * write to RAM |
| 2493 | * mark dirty |
| 2494 | * clear dirty flag |
| 2495 | * TLB check -> fast path |
| 2496 | * read memory |
| 2497 | * write to RAM |
| 2498 | * |
| 2499 | * by pushing the migration thread's memory read after the vCPU thread has |
| 2500 | * written the memory. |
| 2501 | */ |
Pavel Dovgalyuk | 86cf9e1 | 2019-09-17 12:54:06 +0300 | [diff] [blame] | 2502 | if (replay_mode == REPLAY_MODE_NONE) { |
| 2503 | /* |
| 2504 | * VGA can make calls to this function while updating the screen. |
| 2505 | * In record/replay mode this causes a deadlock, because |
| 2506 | * run_on_cpu waits for rr mutex. Therefore no races are possible |
| 2507 | * in this case and no need for making run_on_cpu when |
Greg Kurz | f18d403 | 2021-10-15 11:29:44 +0200 | [diff] [blame] | 2508 | * record/replay is enabled. |
Pavel Dovgalyuk | 86cf9e1 | 2019-09-17 12:54:06 +0300 | [diff] [blame] | 2509 | */ |
| 2510 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
| 2511 | run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL); |
| 2512 | } |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 2513 | } |
| 2514 | |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2515 | static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) |
| 2516 | { |
| 2517 | CPUAddressSpace *cpuas = data.host_ptr; |
| 2518 | |
| 2519 | cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); |
| 2520 | tlb_flush(cpu); |
| 2521 | } |
| 2522 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 2523 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2524 | { |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2525 | CPUAddressSpace *cpuas; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2526 | CPUState *cpu; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 2527 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 2528 | assert(tcg_enabled()); |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 2529 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 2530 | reset the modified entries */ |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2531 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2532 | cpu = cpuas->cpu; |
| 2533 | |
| 2534 | /* |
| 2535 | * Defer changes to as->memory_dispatch until the cpu is quiescent. |
| 2536 | * Otherwise we race between (1) other cpu threads and (2) ongoing |
| 2537 | * i/o for the current cpu thread, with data cached by mmu_lookup(). |
| 2538 | * |
| 2539 | * In addition, queueing the work function will kick the cpu back to |
| 2540 | * the main loop, which will end the RCU critical section and reclaim |
| 2541 | * the memory data structures. |
| 2542 | * |
| 2543 | * That said, the listener is also called during realize, before |
| 2544 | * all of the tcg machinery for run-on is initialized: thus halt_cond. |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2545 | */ |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2546 | if (cpu->halt_cond) { |
| 2547 | async_run_on_cpu(cpu, tcg_commit_cpu, RUN_ON_CPU_HOST_PTR(cpuas)); |
| 2548 | } else { |
| 2549 | tcg_commit_cpu(cpu, RUN_ON_CPU_HOST_PTR(cpuas)); |
| 2550 | } |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2551 | } |
| 2552 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2553 | static void memory_map_init(void) |
| 2554 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2555 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 2556 | |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 2557 | memory_region_init(system_memory, NULL, "system", UINT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2558 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2559 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2560 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 2561 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 2562 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2563 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2564 | } |
| 2565 | |
| 2566 | MemoryRegion *get_system_memory(void) |
| 2567 | { |
| 2568 | return system_memory; |
| 2569 | } |
| 2570 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2571 | MemoryRegion *get_system_io(void) |
| 2572 | { |
| 2573 | return system_io; |
| 2574 | } |
| 2575 | |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 2576 | static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2577 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2578 | { |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2579 | uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2580 | addr += memory_region_get_ram_addr(mr); |
| 2581 | |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2582 | /* No early return if dirty_log_mask is or becomes 0, because |
| 2583 | * cpu_physical_memory_set_dirty_range will still call |
| 2584 | * xen_modified_memory. |
| 2585 | */ |
| 2586 | if (dirty_log_mask) { |
| 2587 | dirty_log_mask = |
| 2588 | cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2589 | } |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2590 | if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) { |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2591 | assert(tcg_enabled()); |
Richard Henderson | e506ad6 | 2023-03-06 04:30:11 +0300 | [diff] [blame] | 2592 | tb_invalidate_phys_range(addr, addr + length - 1); |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2593 | dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE); |
| 2594 | } |
| 2595 | cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2596 | } |
| 2597 | |
Stefan Hajnoczi | 047be4e | 2019-01-29 11:46:04 +0000 | [diff] [blame] | 2598 | void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size) |
| 2599 | { |
| 2600 | /* |
| 2601 | * In principle this function would work on other memory region types too, |
| 2602 | * but the ROM device use case is the only one where this operation is |
| 2603 | * necessary. Other memory regions should use the |
| 2604 | * address_space_read/write() APIs. |
| 2605 | */ |
| 2606 | assert(memory_region_is_romd(mr)); |
| 2607 | |
| 2608 | invalidate_and_set_dirty(mr, addr, size); |
| 2609 | } |
| 2610 | |
Jagannathan Raman | 3123f93 | 2022-06-13 16:26:32 -0400 | [diff] [blame] | 2611 | int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2612 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 2613 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2614 | |
| 2615 | /* Regions are assumed to support 1-4 byte accesses unless |
| 2616 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2617 | if (access_size_max == 0) { |
| 2618 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2619 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2620 | |
| 2621 | /* Bound the maximum access by the alignment of the address. */ |
| 2622 | if (!mr->ops->impl.unaligned) { |
| 2623 | unsigned align_size_max = addr & -addr; |
| 2624 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 2625 | access_size_max = align_size_max; |
| 2626 | } |
| 2627 | } |
| 2628 | |
| 2629 | /* Don't attempt accesses larger than the maximum. */ |
| 2630 | if (l > access_size_max) { |
| 2631 | l = access_size_max; |
| 2632 | } |
Peter Maydell | 6554f5c | 2015-07-24 13:33:10 +0100 | [diff] [blame] | 2633 | l = pow2floor(l); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2634 | |
| 2635 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2636 | } |
| 2637 | |
Jagannathan Raman | 3123f93 | 2022-06-13 16:26:32 -0400 | [diff] [blame] | 2638 | bool prepare_mmio_access(MemoryRegion *mr) |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2639 | { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2640 | bool release_lock = false; |
| 2641 | |
Philippe Mathieu-Daudé | 3792185 | 2020-10-30 16:37:52 +0100 | [diff] [blame] | 2642 | if (!qemu_mutex_iothread_locked()) { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2643 | qemu_mutex_lock_iothread(); |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2644 | release_lock = true; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2645 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2646 | if (mr->flush_coalesced_mmio) { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2647 | qemu_flush_coalesced_mmio_buffer(); |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2648 | } |
| 2649 | |
| 2650 | return release_lock; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2651 | } |
| 2652 | |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2653 | /** |
| 2654 | * flatview_access_allowed |
| 2655 | * @mr: #MemoryRegion to be accessed |
| 2656 | * @attrs: memory transaction attributes |
| 2657 | * @addr: address within that memory region |
| 2658 | * @len: the number of bytes to access |
| 2659 | * |
| 2660 | * Check if a memory transaction is allowed. |
| 2661 | * |
| 2662 | * Returns: true if transaction is allowed, false if denied. |
| 2663 | */ |
| 2664 | static bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs, |
| 2665 | hwaddr addr, hwaddr len) |
| 2666 | { |
| 2667 | if (likely(!attrs.memory)) { |
| 2668 | return true; |
| 2669 | } |
| 2670 | if (memory_region_is_ram(mr)) { |
| 2671 | return true; |
| 2672 | } |
| 2673 | qemu_log_mask(LOG_GUEST_ERROR, |
| 2674 | "Invalid access to non-RAM device at " |
| 2675 | "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", " |
| 2676 | "region '%s'\n", addr, len, memory_region_name(mr)); |
| 2677 | return false; |
| 2678 | } |
| 2679 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2680 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2681 | static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, |
| 2682 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2683 | const void *ptr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2684 | hwaddr len, hwaddr addr1, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2685 | hwaddr l, MemoryRegion *mr) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2686 | { |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2687 | uint8_t *ram_ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2688 | uint64_t val; |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2689 | MemTxResult result = MEMTX_OK; |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2690 | bool release_lock = false; |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2691 | const uint8_t *buf = ptr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2692 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2693 | for (;;) { |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2694 | if (!flatview_access_allowed(mr, attrs, addr1, l)) { |
| 2695 | result |= MEMTX_ACCESS_ERROR; |
| 2696 | /* Keep going. */ |
| 2697 | } else if (!memory_access_is_direct(mr, true)) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2698 | release_lock |= prepare_mmio_access(mr); |
| 2699 | l = memory_access_size(mr, l, addr1); |
| 2700 | /* XXX: could force current_cpu to NULL to avoid |
| 2701 | potential bugs */ |
Tony Nguyen | 9bf825b | 2019-08-24 04:36:54 +1000 | [diff] [blame] | 2702 | val = ldn_he_p(buf, l); |
Tony Nguyen | 3d9e7c3 | 2019-08-24 04:36:46 +1000 | [diff] [blame] | 2703 | result |= memory_region_dispatch_write(mr, addr1, val, |
Tony Nguyen | 9bf825b | 2019-08-24 04:36:54 +1000 | [diff] [blame] | 2704 | size_memop(l), attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2705 | } else { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2706 | /* RAM case */ |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2707 | ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); |
Akihiko Odaki | 4a73aee | 2023-01-31 12:01:55 +0900 | [diff] [blame] | 2708 | memmove(ram_ptr, buf, l); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2709 | invalidate_and_set_dirty(mr, addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2710 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2711 | |
| 2712 | if (release_lock) { |
| 2713 | qemu_mutex_unlock_iothread(); |
| 2714 | release_lock = false; |
| 2715 | } |
| 2716 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2717 | len -= l; |
| 2718 | buf += l; |
| 2719 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2720 | |
| 2721 | if (!len) { |
| 2722 | break; |
| 2723 | } |
| 2724 | |
| 2725 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2726 | mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2727 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2728 | |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2729 | return result; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2730 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2731 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2732 | /* Called from RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2733 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2734 | const void *buf, hwaddr len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2735 | { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2736 | hwaddr l; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2737 | hwaddr addr1; |
| 2738 | MemoryRegion *mr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2739 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2740 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2741 | mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2742 | if (!flatview_access_allowed(mr, attrs, addr, len)) { |
| 2743 | return MEMTX_ACCESS_ERROR; |
| 2744 | } |
Philippe Mathieu-Daudé | 58e7468 | 2021-12-15 19:24:20 +0100 | [diff] [blame] | 2745 | return flatview_write_continue(fv, addr, attrs, buf, len, |
| 2746 | addr1, l, mr); |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2747 | } |
| 2748 | |
| 2749 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2750 | MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2751 | MemTxAttrs attrs, void *ptr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2752 | hwaddr len, hwaddr addr1, hwaddr l, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2753 | MemoryRegion *mr) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2754 | { |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2755 | uint8_t *ram_ptr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2756 | uint64_t val; |
| 2757 | MemTxResult result = MEMTX_OK; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2758 | bool release_lock = false; |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2759 | uint8_t *buf = ptr; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2760 | |
Alexander Bulekov | 7cac7fe | 2021-03-15 10:05:12 -0400 | [diff] [blame] | 2761 | fuzz_dma_read_cb(addr, len, mr); |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2762 | for (;;) { |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2763 | if (!flatview_access_allowed(mr, attrs, addr1, l)) { |
| 2764 | result |= MEMTX_ACCESS_ERROR; |
| 2765 | /* Keep going. */ |
| 2766 | } else if (!memory_access_is_direct(mr, false)) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2767 | /* I/O case */ |
| 2768 | release_lock |= prepare_mmio_access(mr); |
| 2769 | l = memory_access_size(mr, l, addr1); |
Tony Nguyen | 3d9e7c3 | 2019-08-24 04:36:46 +1000 | [diff] [blame] | 2770 | result |= memory_region_dispatch_read(mr, addr1, &val, |
Tony Nguyen | 9bf825b | 2019-08-24 04:36:54 +1000 | [diff] [blame] | 2771 | size_memop(l), attrs); |
| 2772 | stn_he_p(buf, l, val); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2773 | } else { |
| 2774 | /* RAM case */ |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2775 | ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); |
| 2776 | memcpy(buf, ram_ptr, l); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2777 | } |
| 2778 | |
| 2779 | if (release_lock) { |
| 2780 | qemu_mutex_unlock_iothread(); |
| 2781 | release_lock = false; |
| 2782 | } |
| 2783 | |
| 2784 | len -= l; |
| 2785 | buf += l; |
| 2786 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2787 | |
| 2788 | if (!len) { |
| 2789 | break; |
| 2790 | } |
| 2791 | |
| 2792 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2793 | mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2794 | } |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2795 | |
| 2796 | return result; |
| 2797 | } |
| 2798 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2799 | /* Called from RCU critical section. */ |
| 2800 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2801 | MemTxAttrs attrs, void *buf, hwaddr len) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2802 | { |
| 2803 | hwaddr l; |
| 2804 | hwaddr addr1; |
| 2805 | MemoryRegion *mr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2806 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2807 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2808 | mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2809 | if (!flatview_access_allowed(mr, attrs, addr, len)) { |
| 2810 | return MEMTX_ACCESS_ERROR; |
| 2811 | } |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2812 | return flatview_read_continue(fv, addr, attrs, buf, len, |
| 2813 | addr1, l, mr); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2814 | } |
| 2815 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2816 | MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2817 | MemTxAttrs attrs, void *buf, hwaddr len) |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2818 | { |
| 2819 | MemTxResult result = MEMTX_OK; |
| 2820 | FlatView *fv; |
| 2821 | |
| 2822 | if (len > 0) { |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2823 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2824 | fv = address_space_to_flatview(as); |
| 2825 | result = flatview_read(fv, addr, attrs, buf, len); |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2826 | } |
| 2827 | |
| 2828 | return result; |
| 2829 | } |
| 2830 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2831 | MemTxResult address_space_write(AddressSpace *as, hwaddr addr, |
| 2832 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2833 | const void *buf, hwaddr len) |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2834 | { |
| 2835 | MemTxResult result = MEMTX_OK; |
| 2836 | FlatView *fv; |
| 2837 | |
| 2838 | if (len > 0) { |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2839 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2840 | fv = address_space_to_flatview(as); |
| 2841 | result = flatview_write(fv, addr, attrs, buf, len); |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2842 | } |
| 2843 | |
| 2844 | return result; |
| 2845 | } |
| 2846 | |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 2847 | MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2848 | void *buf, hwaddr len, bool is_write) |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 2849 | { |
| 2850 | if (is_write) { |
| 2851 | return address_space_write(as, addr, attrs, buf, len); |
| 2852 | } else { |
| 2853 | return address_space_read_full(as, addr, attrs, buf, len); |
| 2854 | } |
| 2855 | } |
| 2856 | |
Philippe Mathieu-Daudé | 75f01c6 | 2022-01-15 21:37:23 +0100 | [diff] [blame] | 2857 | MemTxResult address_space_set(AddressSpace *as, hwaddr addr, |
| 2858 | uint8_t c, hwaddr len, MemTxAttrs attrs) |
| 2859 | { |
| 2860 | #define FILLBUF_SIZE 512 |
| 2861 | uint8_t fillbuf[FILLBUF_SIZE]; |
| 2862 | int l; |
| 2863 | MemTxResult error = MEMTX_OK; |
| 2864 | |
| 2865 | memset(fillbuf, c, FILLBUF_SIZE); |
| 2866 | while (len > 0) { |
| 2867 | l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; |
| 2868 | error |= address_space_write(as, addr, attrs, fillbuf, l); |
| 2869 | len -= l; |
| 2870 | addr += l; |
| 2871 | } |
| 2872 | |
| 2873 | return error; |
| 2874 | } |
| 2875 | |
Philippe Mathieu-Daudé | d7ef71e | 2020-02-19 20:02:11 +0100 | [diff] [blame] | 2876 | void cpu_physical_memory_rw(hwaddr addr, void *buf, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 2877 | hwaddr len, bool is_write) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2878 | { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2879 | address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, |
| 2880 | buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2881 | } |
| 2882 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2883 | enum write_rom_type { |
| 2884 | WRITE_DATA, |
| 2885 | FLUSH_CACHE, |
| 2886 | }; |
| 2887 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2888 | static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, |
| 2889 | hwaddr addr, |
| 2890 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2891 | const void *ptr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2892 | hwaddr len, |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2893 | enum write_rom_type type) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2894 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2895 | hwaddr l; |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2896 | uint8_t *ram_ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2897 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2898 | MemoryRegion *mr; |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2899 | const uint8_t *buf = ptr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2900 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2901 | RCU_READ_LOCK_GUARD(); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2902 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2903 | l = len; |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2904 | mr = address_space_translate(as, addr, &addr1, &l, true, attrs); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2905 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2906 | if (!(memory_region_is_ram(mr) || |
| 2907 | memory_region_is_romd(mr))) { |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 2908 | l = memory_access_size(mr, l, addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2909 | } else { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2910 | /* ROM/RAM case */ |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2911 | ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2912 | switch (type) { |
| 2913 | case WRITE_DATA: |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 2914 | memcpy(ram_ptr, buf, l); |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 2915 | invalidate_and_set_dirty(mr, addr1, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2916 | break; |
| 2917 | case FLUSH_CACHE: |
Richard Henderson | 1da8de3 | 2020-12-12 10:38:21 -0600 | [diff] [blame] | 2918 | flush_idcache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2919 | break; |
| 2920 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2921 | } |
| 2922 | len -= l; |
| 2923 | buf += l; |
| 2924 | addr += l; |
| 2925 | } |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2926 | return MEMTX_OK; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2927 | } |
| 2928 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2929 | /* used for ROM loading : can write in RAM and ROM */ |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2930 | MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, |
| 2931 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2932 | const void *buf, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2933 | { |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2934 | return address_space_write_rom_internal(as, addr, attrs, |
| 2935 | buf, len, WRITE_DATA); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2936 | } |
| 2937 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2938 | void cpu_flush_icache_range(hwaddr start, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2939 | { |
| 2940 | /* |
| 2941 | * This function should do the same thing as an icache flush that was |
| 2942 | * triggered from within the guest. For TCG we are always cache coherent, |
| 2943 | * so there is no need to flush anything. For KVM / Xen we need to flush |
| 2944 | * the host's instruction cache at least. |
| 2945 | */ |
| 2946 | if (tcg_enabled()) { |
| 2947 | return; |
| 2948 | } |
| 2949 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 2950 | address_space_write_rom_internal(&address_space_memory, |
| 2951 | start, MEMTXATTRS_UNSPECIFIED, |
| 2952 | NULL, len, FLUSH_CACHE); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2953 | } |
| 2954 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2955 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2956 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2957 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2958 | hwaddr addr; |
| 2959 | hwaddr len; |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 2960 | bool in_use; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2961 | } BounceBuffer; |
| 2962 | |
| 2963 | static BounceBuffer bounce; |
| 2964 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2965 | typedef struct MapClient { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 2966 | QEMUBH *bh; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2967 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2968 | } MapClient; |
| 2969 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 2970 | QemuMutex map_client_list_lock; |
Paolo Bonzini | b58deb3 | 2018-12-06 11:58:10 +0100 | [diff] [blame] | 2971 | static QLIST_HEAD(, MapClient) map_client_list |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2972 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2973 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 2974 | static void cpu_unregister_map_client_do(MapClient *client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2975 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2976 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2977 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2978 | } |
| 2979 | |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 2980 | static void cpu_notify_map_clients_locked(void) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2981 | { |
| 2982 | MapClient *client; |
| 2983 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2984 | while (!QLIST_EMPTY(&map_client_list)) { |
| 2985 | client = QLIST_FIRST(&map_client_list); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 2986 | qemu_bh_schedule(client->bh); |
| 2987 | cpu_unregister_map_client_do(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2988 | } |
| 2989 | } |
| 2990 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 2991 | void cpu_register_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2992 | { |
| 2993 | MapClient *client = g_malloc(sizeof(*client)); |
| 2994 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 2995 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 2996 | client->bh = bh; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2997 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
Paolo Bonzini | 33828ca | 2023-03-03 14:36:32 +0100 | [diff] [blame] | 2998 | /* Write map_client_list before reading in_use. */ |
| 2999 | smp_mb(); |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 3000 | if (!qatomic_read(&bounce.in_use)) { |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3001 | cpu_notify_map_clients_locked(); |
| 3002 | } |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3003 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3004 | } |
| 3005 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3006 | void cpu_exec_init_all(void) |
| 3007 | { |
| 3008 | qemu_mutex_init(&ram_list.mutex); |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 3009 | /* The data structures we set up here depend on knowing the page size, |
| 3010 | * so no more changes can be made after this point. |
| 3011 | * In an ideal world, nothing we did before we had finished the |
| 3012 | * machine setup would care about the target page size, and we could |
| 3013 | * do this much later, rather than requiring board models to state |
| 3014 | * up front what their requirements are. |
| 3015 | */ |
| 3016 | finalize_target_page_bits(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3017 | io_mem_init(); |
Paolo Bonzini | 680a478 | 2015-11-02 09:23:52 +0100 | [diff] [blame] | 3018 | memory_map_init(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3019 | qemu_mutex_init(&map_client_list_lock); |
| 3020 | } |
| 3021 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3022 | void cpu_unregister_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3023 | { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3024 | MapClient *client; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3025 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3026 | qemu_mutex_lock(&map_client_list_lock); |
| 3027 | QLIST_FOREACH(client, &map_client_list, link) { |
| 3028 | if (client->bh == bh) { |
| 3029 | cpu_unregister_map_client_do(client); |
| 3030 | break; |
| 3031 | } |
| 3032 | } |
| 3033 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3034 | } |
| 3035 | |
| 3036 | static void cpu_notify_map_clients(void) |
| 3037 | { |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3038 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3039 | cpu_notify_map_clients_locked(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3040 | qemu_mutex_unlock(&map_client_list_lock); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3041 | } |
| 3042 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3043 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3044 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3045 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3046 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3047 | hwaddr l, xlat; |
| 3048 | |
| 3049 | while (len > 0) { |
| 3050 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3051 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3052 | if (!memory_access_is_direct(mr, is_write)) { |
| 3053 | l = memory_access_size(mr, l, addr); |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3054 | if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3055 | return false; |
| 3056 | } |
| 3057 | } |
| 3058 | |
| 3059 | len -= l; |
| 3060 | addr += l; |
| 3061 | } |
| 3062 | return true; |
| 3063 | } |
| 3064 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3065 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3066 | hwaddr len, bool is_write, |
Peter Maydell | fddffa4 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3067 | MemTxAttrs attrs) |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3068 | { |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3069 | FlatView *fv; |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3070 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3071 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3072 | fv = address_space_to_flatview(as); |
Philippe Mathieu-Daudé | 58e7468 | 2021-12-15 19:24:20 +0100 | [diff] [blame] | 3073 | return flatview_access_valid(fv, addr, len, is_write, attrs); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3074 | } |
| 3075 | |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3076 | static hwaddr |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3077 | flatview_extend_translation(FlatView *fv, hwaddr addr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3078 | hwaddr target_len, |
| 3079 | MemoryRegion *mr, hwaddr base, hwaddr len, |
| 3080 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3081 | { |
| 3082 | hwaddr done = 0; |
| 3083 | hwaddr xlat; |
| 3084 | MemoryRegion *this_mr; |
| 3085 | |
| 3086 | for (;;) { |
| 3087 | target_len -= len; |
| 3088 | addr += len; |
| 3089 | done += len; |
| 3090 | if (target_len == 0) { |
| 3091 | return done; |
| 3092 | } |
| 3093 | |
| 3094 | len = target_len; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3095 | this_mr = flatview_translate(fv, addr, &xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3096 | &len, is_write, attrs); |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3097 | if (this_mr != mr || xlat != base + done) { |
| 3098 | return done; |
| 3099 | } |
| 3100 | } |
| 3101 | } |
| 3102 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3103 | /* Map a physical memory region into a host virtual address. |
| 3104 | * May map a subset of the requested range, given by and returned in *plen. |
| 3105 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 3106 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3107 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 3108 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3109 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3110 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3111 | hwaddr addr, |
| 3112 | hwaddr *plen, |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3113 | bool is_write, |
| 3114 | MemTxAttrs attrs) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3115 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3116 | hwaddr len = *plen; |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3117 | hwaddr l, xlat; |
| 3118 | MemoryRegion *mr; |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3119 | FlatView *fv; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3120 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3121 | if (len == 0) { |
| 3122 | return NULL; |
| 3123 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3124 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3125 | l = len; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3126 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3127 | fv = address_space_to_flatview(as); |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3128 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3129 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3130 | if (!memory_access_is_direct(mr, is_write)) { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 3131 | if (qatomic_xchg(&bounce.in_use, true)) { |
Prasad J Pandit | 77f55ea | 2020-05-26 16:47:43 +0530 | [diff] [blame] | 3132 | *plen = 0; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3133 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3134 | } |
Kevin Wolf | e85d9db | 2013-07-22 14:30:23 +0200 | [diff] [blame] | 3135 | /* Avoid unbounded allocations */ |
| 3136 | l = MIN(l, TARGET_PAGE_SIZE); |
| 3137 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3138 | bounce.addr = addr; |
| 3139 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3140 | |
| 3141 | memory_region_ref(mr); |
| 3142 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3143 | if (!is_write) { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3144 | flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED, |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3145 | bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 3146 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3147 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3148 | *plen = l; |
| 3149 | return bounce.buffer; |
| 3150 | } |
| 3151 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3152 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3153 | memory_region_ref(mr); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3154 | *plen = flatview_extend_translation(fv, addr, len, mr, xlat, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3155 | l, is_write, attrs); |
Alexander Bulekov | fc1c834 | 2021-01-20 01:02:55 -0500 | [diff] [blame] | 3156 | fuzz_dma_read_cb(addr, *plen, mr); |
Markus Armbruster | 66997c4 | 2022-11-22 14:49:16 +0100 | [diff] [blame] | 3157 | return qemu_ram_ptr_length(mr->ram_block, xlat, plen, true); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3158 | } |
| 3159 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3160 | /* Unmaps a memory region previously mapped by address_space_map(). |
Philippe Mathieu-Daudé | ae5883a | 2020-02-19 20:12:01 +0100 | [diff] [blame] | 3161 | * Will also mark the memory as dirty if is_write is true. access_len gives |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3162 | * the amount of memory that was actually read or written by the caller. |
| 3163 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3164 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
Philippe Mathieu-Daudé | ae5883a | 2020-02-19 20:12:01 +0100 | [diff] [blame] | 3165 | bool is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3166 | { |
| 3167 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3168 | MemoryRegion *mr; |
| 3169 | ram_addr_t addr1; |
| 3170 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 3171 | mr = memory_region_from_host(buffer, &addr1); |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3172 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3173 | if (is_write) { |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3174 | invalidate_and_set_dirty(mr, addr1, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3175 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 3176 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 3177 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 3178 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3179 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3180 | return; |
| 3181 | } |
| 3182 | if (is_write) { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3183 | address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED, |
| 3184 | bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3185 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 3186 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3187 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3188 | memory_region_unref(bounce.mr); |
Paolo Bonzini | 33828ca | 2023-03-03 14:36:32 +0100 | [diff] [blame] | 3189 | /* Clear in_use before reading map_client_list. */ |
Paolo Bonzini | 0683100 | 2023-03-03 14:37:51 +0100 | [diff] [blame] | 3190 | qatomic_set_mb(&bounce.in_use, false); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3191 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3192 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3193 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3194 | void *cpu_physical_memory_map(hwaddr addr, |
| 3195 | hwaddr *plen, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 3196 | bool is_write) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3197 | { |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3198 | return address_space_map(&address_space_memory, addr, plen, is_write, |
| 3199 | MEMTXATTRS_UNSPECIFIED); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3200 | } |
| 3201 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3202 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 3203 | bool is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3204 | { |
| 3205 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 3206 | } |
| 3207 | |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3208 | #define ARG1_DECL AddressSpace *as |
| 3209 | #define ARG1 as |
| 3210 | #define SUFFIX |
| 3211 | #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__) |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3212 | #define RCU_READ_LOCK(...) rcu_read_lock() |
| 3213 | #define RCU_READ_UNLOCK(...) rcu_read_unlock() |
Paolo Bonzini | 139c183 | 2020-02-04 12:41:01 +0100 | [diff] [blame] | 3214 | #include "memory_ldst.c.inc" |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 3215 | |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3216 | int64_t address_space_cache_init(MemoryRegionCache *cache, |
| 3217 | AddressSpace *as, |
| 3218 | hwaddr addr, |
| 3219 | hwaddr len, |
| 3220 | bool is_write) |
| 3221 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3222 | AddressSpaceDispatch *d; |
| 3223 | hwaddr l; |
| 3224 | MemoryRegion *mr; |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3225 | Int128 diff; |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3226 | |
| 3227 | assert(len > 0); |
| 3228 | |
| 3229 | l = len; |
| 3230 | cache->fv = address_space_get_flatview(as); |
| 3231 | d = flatview_to_dispatch(cache->fv); |
| 3232 | cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true); |
| 3233 | |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3234 | /* |
| 3235 | * cache->xlat is now relative to cache->mrs.mr, not to the section itself. |
| 3236 | * Take that into account to compute how many bytes are there between |
| 3237 | * cache->xlat and the end of the section. |
| 3238 | */ |
| 3239 | diff = int128_sub(cache->mrs.size, |
Yeqi Fu | 48805df | 2023-03-15 11:26:49 +0800 | [diff] [blame] | 3240 | int128_make64(cache->xlat - cache->mrs.offset_within_region)); |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3241 | l = int128_get64(int128_min(diff, int128_make64(l))); |
| 3242 | |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3243 | mr = cache->mrs.mr; |
| 3244 | memory_region_ref(mr); |
| 3245 | if (memory_access_is_direct(mr, is_write)) { |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3246 | /* We don't care about the memory attributes here as we're only |
| 3247 | * doing this if we found actual RAM, which behaves the same |
| 3248 | * regardless of attributes; so UNSPECIFIED is fine. |
| 3249 | */ |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3250 | l = flatview_extend_translation(cache->fv, addr, len, mr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3251 | cache->xlat, l, is_write, |
| 3252 | MEMTXATTRS_UNSPECIFIED); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3253 | cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true); |
| 3254 | } else { |
| 3255 | cache->ptr = NULL; |
| 3256 | } |
| 3257 | |
| 3258 | cache->len = l; |
| 3259 | cache->is_write = is_write; |
| 3260 | return l; |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3261 | } |
| 3262 | |
| 3263 | void address_space_cache_invalidate(MemoryRegionCache *cache, |
| 3264 | hwaddr addr, |
| 3265 | hwaddr access_len) |
| 3266 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3267 | assert(cache->is_write); |
| 3268 | if (likely(cache->ptr)) { |
| 3269 | invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len); |
| 3270 | } |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3271 | } |
| 3272 | |
| 3273 | void address_space_cache_destroy(MemoryRegionCache *cache) |
| 3274 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3275 | if (!cache->mrs.mr) { |
| 3276 | return; |
| 3277 | } |
| 3278 | |
| 3279 | if (xen_enabled()) { |
| 3280 | xen_invalidate_map_cache_entry(cache->ptr); |
| 3281 | } |
| 3282 | memory_region_unref(cache->mrs.mr); |
| 3283 | flatview_unref(cache->fv); |
| 3284 | cache->mrs.mr = NULL; |
| 3285 | cache->fv = NULL; |
| 3286 | } |
| 3287 | |
| 3288 | /* Called from RCU critical section. This function has the same |
| 3289 | * semantics as address_space_translate, but it only works on a |
| 3290 | * predefined range of a MemoryRegion that was mapped with |
| 3291 | * address_space_cache_init. |
| 3292 | */ |
| 3293 | static inline MemoryRegion *address_space_translate_cached( |
| 3294 | MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3295 | hwaddr *plen, bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3296 | { |
| 3297 | MemoryRegionSection section; |
| 3298 | MemoryRegion *mr; |
| 3299 | IOMMUMemoryRegion *iommu_mr; |
| 3300 | AddressSpace *target_as; |
| 3301 | |
| 3302 | assert(!cache->ptr); |
| 3303 | *xlat = addr + cache->xlat; |
| 3304 | |
| 3305 | mr = cache->mrs.mr; |
| 3306 | iommu_mr = memory_region_get_iommu(mr); |
| 3307 | if (!iommu_mr) { |
| 3308 | /* MMIO region. */ |
| 3309 | return mr; |
| 3310 | } |
| 3311 | |
| 3312 | section = address_space_translate_iommu(iommu_mr, xlat, plen, |
| 3313 | NULL, is_write, true, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 3314 | &target_as, attrs); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3315 | return section.mr; |
| 3316 | } |
| 3317 | |
| 3318 | /* Called from RCU critical section. address_space_read_cached uses this |
| 3319 | * out of line function when the target is an MMIO or IOMMU region. |
| 3320 | */ |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3321 | MemTxResult |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3322 | address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3323 | void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3324 | { |
| 3325 | hwaddr addr1, l; |
| 3326 | MemoryRegion *mr; |
| 3327 | |
| 3328 | l = len; |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3329 | mr = address_space_translate_cached(cache, addr, &addr1, &l, false, |
| 3330 | MEMTXATTRS_UNSPECIFIED); |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3331 | return flatview_read_continue(cache->fv, |
| 3332 | addr, MEMTXATTRS_UNSPECIFIED, buf, len, |
| 3333 | addr1, l, mr); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3334 | } |
| 3335 | |
| 3336 | /* Called from RCU critical section. address_space_write_cached uses this |
| 3337 | * out of line function when the target is an MMIO or IOMMU region. |
| 3338 | */ |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3339 | MemTxResult |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3340 | address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3341 | const void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3342 | { |
| 3343 | hwaddr addr1, l; |
| 3344 | MemoryRegion *mr; |
| 3345 | |
| 3346 | l = len; |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3347 | mr = address_space_translate_cached(cache, addr, &addr1, &l, true, |
| 3348 | MEMTXATTRS_UNSPECIFIED); |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3349 | return flatview_write_continue(cache->fv, |
| 3350 | addr, MEMTXATTRS_UNSPECIFIED, buf, len, |
| 3351 | addr1, l, mr); |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3352 | } |
| 3353 | |
| 3354 | #define ARG1_DECL MemoryRegionCache *cache |
| 3355 | #define ARG1 cache |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3356 | #define SUFFIX _cached_slow |
| 3357 | #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3358 | #define RCU_READ_LOCK() ((void)0) |
| 3359 | #define RCU_READ_UNLOCK() ((void)0) |
Paolo Bonzini | 139c183 | 2020-02-04 12:41:01 +0100 | [diff] [blame] | 3360 | #include "memory_ldst.c.inc" |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3361 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3362 | /* virtual memory access for debug (includes writing to ROM) */ |
Philippe Mathieu-Daudé | 73842ef | 2022-02-03 02:13:28 +0100 | [diff] [blame] | 3363 | int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, |
| 3364 | void *ptr, size_t len, bool is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3365 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3366 | hwaddr phys_addr; |
Philippe Mathieu-Daudé | 73842ef | 2022-02-03 02:13:28 +0100 | [diff] [blame] | 3367 | vaddr l, page; |
Philippe Mathieu-Daudé | d7ef71e | 2020-02-19 20:02:11 +0100 | [diff] [blame] | 3368 | uint8_t *buf = ptr; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3369 | |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 3370 | cpu_synchronize_state(cpu); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3371 | while (len > 0) { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3372 | int asidx; |
| 3373 | MemTxAttrs attrs; |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3374 | MemTxResult res; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3375 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3376 | page = addr & TARGET_PAGE_MASK; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3377 | phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs); |
| 3378 | asidx = cpu_asidx_from_attrs(cpu, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3379 | /* if no physical page mapped, return an error */ |
| 3380 | if (phys_addr == -1) |
| 3381 | return -1; |
| 3382 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 3383 | if (l > len) |
| 3384 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3385 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3386 | if (is_write) { |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3387 | res = address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, |
| 3388 | attrs, buf, l); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3389 | } else { |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3390 | res = address_space_read(cpu->cpu_ases[asidx].as, phys_addr, |
| 3391 | attrs, buf, l); |
| 3392 | } |
| 3393 | if (res != MEMTX_OK) { |
| 3394 | return -1; |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3395 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3396 | len -= l; |
| 3397 | buf += l; |
| 3398 | addr += l; |
| 3399 | } |
| 3400 | return 0; |
| 3401 | } |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3402 | |
| 3403 | /* |
| 3404 | * Allows code that needs to deal with migration bitmaps etc to still be built |
| 3405 | * target independent. |
| 3406 | */ |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3407 | size_t qemu_target_page_size(void) |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3408 | { |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3409 | return TARGET_PAGE_SIZE; |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3410 | } |
| 3411 | |
Philippe Mathieu-Daudé | b3b408f | 2023-05-24 11:37:35 +0200 | [diff] [blame] | 3412 | int qemu_target_page_mask(void) |
| 3413 | { |
| 3414 | return TARGET_PAGE_MASK; |
| 3415 | } |
| 3416 | |
Juan Quintela | 46d702b | 2017-04-24 21:03:48 +0200 | [diff] [blame] | 3417 | int qemu_target_page_bits(void) |
| 3418 | { |
| 3419 | return TARGET_PAGE_BITS; |
| 3420 | } |
| 3421 | |
| 3422 | int qemu_target_page_bits_min(void) |
| 3423 | { |
| 3424 | return TARGET_PAGE_BITS_MIN; |
| 3425 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3426 | |
Juan Quintela | 62c5e18 | 2023-05-11 16:12:04 +0200 | [diff] [blame] | 3427 | /* Convert target pages to MiB (2**20). */ |
| 3428 | size_t qemu_target_pages_to_MiB(size_t pages) |
| 3429 | { |
| 3430 | int page_bits = TARGET_PAGE_BITS; |
| 3431 | |
| 3432 | /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ |
| 3433 | g_assert(page_bits < 20); |
| 3434 | |
| 3435 | return pages >> (20 - page_bits); |
| 3436 | } |
| 3437 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3438 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3439 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3440 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3441 | hwaddr l = 1; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3442 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3443 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3444 | mr = address_space_translate(&address_space_memory, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3445 | phys_addr, &phys_addr, &l, false, |
| 3446 | MEMTXATTRS_UNSPECIFIED); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3447 | |
Markus Armbruster | 66997c4 | 2022-11-22 14:49:16 +0100 | [diff] [blame] | 3448 | return !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3449 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3450 | |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3451 | int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3452 | { |
| 3453 | RAMBlock *block; |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3454 | int ret = 0; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3455 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3456 | RCU_READ_LOCK_GUARD(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 3457 | RAMBLOCK_FOREACH(block) { |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 3458 | ret = func(block, opaque); |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3459 | if (ret) { |
| 3460 | break; |
| 3461 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3462 | } |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3463 | return ret; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3464 | } |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3465 | |
| 3466 | /* |
| 3467 | * Unmap pages of memory from start to start+length such that |
| 3468 | * they a) read as 0, b) Trigger whatever fault mechanism |
| 3469 | * the OS provides for postcopy. |
| 3470 | * The pages must be unmapped by the end of the function. |
| 3471 | * Returns: 0 on success, none-0 on failure |
| 3472 | * |
| 3473 | */ |
| 3474 | int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length) |
| 3475 | { |
| 3476 | int ret = -1; |
| 3477 | |
| 3478 | uint8_t *host_startaddr = rb->host + start; |
| 3479 | |
Marc-André Lureau | 619bd31 | 2020-01-03 11:39:58 +0400 | [diff] [blame] | 3480 | if (!QEMU_PTR_IS_ALIGNED(host_startaddr, rb->page_size)) { |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3481 | error_report("ram_block_discard_range: Unaligned start address: %p", |
| 3482 | host_startaddr); |
| 3483 | goto err; |
| 3484 | } |
| 3485 | |
David Hildenbrand | dcdc460 | 2021-04-29 13:27:03 +0200 | [diff] [blame] | 3486 | if ((start + length) <= rb->max_length) { |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3487 | bool need_madvise, need_fallocate; |
Marc-André Lureau | 619bd31 | 2020-01-03 11:39:58 +0400 | [diff] [blame] | 3488 | if (!QEMU_IS_ALIGNED(length, rb->page_size)) { |
Wei Yang | 72821d9 | 2019-07-12 11:27:04 +0800 | [diff] [blame] | 3489 | error_report("ram_block_discard_range: Unaligned length: %zx", |
| 3490 | length); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3491 | goto err; |
| 3492 | } |
| 3493 | |
| 3494 | errno = ENOTSUP; /* If we are missing MADVISE etc */ |
| 3495 | |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3496 | /* The logic here is messy; |
| 3497 | * madvise DONTNEED fails for hugepages |
| 3498 | * fallocate works on hugepages and shmem |
David Hildenbrand | cdfa56c | 2021-04-06 10:01:25 +0200 | [diff] [blame] | 3499 | * shared anonymous memory requires madvise REMOVE |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3500 | */ |
| 3501 | need_madvise = (rb->page_size == qemu_host_page_size); |
| 3502 | need_fallocate = rb->fd != -1; |
| 3503 | if (need_fallocate) { |
| 3504 | /* For a file, this causes the area of the file to be zero'd |
| 3505 | * if read, and for hugetlbfs also causes it to be unmapped |
| 3506 | * so a userfault will trigger. |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3507 | */ |
| 3508 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3509 | /* |
David Hildenbrand | b2cccb5 | 2023-09-06 14:04:57 +0200 | [diff] [blame] | 3510 | * fallocate() will fail with readonly files. Let's print a |
| 3511 | * proper error message. |
| 3512 | */ |
| 3513 | if (rb->flags & RAM_READONLY_FD) { |
| 3514 | error_report("ram_block_discard_range: Discarding RAM" |
| 3515 | " with readonly files is not supported"); |
| 3516 | goto err; |
| 3517 | |
| 3518 | } |
| 3519 | /* |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3520 | * We'll discard data from the actual file, even though we only |
| 3521 | * have a MAP_PRIVATE mapping, possibly messing with other |
| 3522 | * MAP_PRIVATE/MAP_SHARED mappings. There is no easy way to |
| 3523 | * change that behavior whithout violating the promised |
| 3524 | * semantics of ram_block_discard_range(). |
| 3525 | * |
| 3526 | * Only warn, because it works as long as nobody else uses that |
| 3527 | * file. |
| 3528 | */ |
| 3529 | if (!qemu_ram_is_shared(rb)) { |
| 3530 | warn_report_once("ram_block_discard_range: Discarding RAM" |
| 3531 | " in private file mappings is possibly" |
| 3532 | " dangerous, because it will modify the" |
| 3533 | " underlying file and will affect other" |
| 3534 | " users of the file"); |
| 3535 | } |
| 3536 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3537 | ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, |
| 3538 | start, length); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3539 | if (ret) { |
| 3540 | ret = -errno; |
| 3541 | error_report("ram_block_discard_range: Failed to fallocate " |
| 3542 | "%s:%" PRIx64 " +%zx (%d)", |
| 3543 | rb->idstr, start, length, ret); |
| 3544 | goto err; |
| 3545 | } |
| 3546 | #else |
| 3547 | ret = -ENOSYS; |
| 3548 | error_report("ram_block_discard_range: fallocate not available/file" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3549 | "%s:%" PRIx64 " +%zx (%d)", |
| 3550 | rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3551 | goto err; |
| 3552 | #endif |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3553 | } |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3554 | if (need_madvise) { |
| 3555 | /* For normal RAM this causes it to be unmapped, |
| 3556 | * for shared memory it causes the local mapping to disappear |
| 3557 | * and to fall back on the file contents (which we just |
| 3558 | * fallocate'd away). |
| 3559 | */ |
| 3560 | #if defined(CONFIG_MADVISE) |
David Hildenbrand | cdfa56c | 2021-04-06 10:01:25 +0200 | [diff] [blame] | 3561 | if (qemu_ram_is_shared(rb) && rb->fd < 0) { |
| 3562 | ret = madvise(host_startaddr, length, QEMU_MADV_REMOVE); |
| 3563 | } else { |
| 3564 | ret = madvise(host_startaddr, length, QEMU_MADV_DONTNEED); |
| 3565 | } |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3566 | if (ret) { |
| 3567 | ret = -errno; |
| 3568 | error_report("ram_block_discard_range: Failed to discard range " |
| 3569 | "%s:%" PRIx64 " +%zx (%d)", |
| 3570 | rb->idstr, start, length, ret); |
| 3571 | goto err; |
| 3572 | } |
| 3573 | #else |
| 3574 | ret = -ENOSYS; |
| 3575 | error_report("ram_block_discard_range: MADVISE not available" |
| 3576 | "%s:%" PRIx64 " +%zx (%d)", |
| 3577 | rb->idstr, start, length, ret); |
| 3578 | goto err; |
| 3579 | #endif |
| 3580 | } |
| 3581 | trace_ram_block_discard_range(rb->idstr, host_startaddr, length, |
| 3582 | need_madvise, need_fallocate, ret); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3583 | } else { |
| 3584 | error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64 |
| 3585 | "/%zx/" RAM_ADDR_FMT")", |
David Hildenbrand | dcdc460 | 2021-04-29 13:27:03 +0200 | [diff] [blame] | 3586 | rb->idstr, start, length, rb->max_length); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3587 | } |
| 3588 | |
| 3589 | err: |
| 3590 | return ret; |
| 3591 | } |
| 3592 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 3593 | bool ramblock_is_pmem(RAMBlock *rb) |
| 3594 | { |
| 3595 | return rb->flags & RAM_PMEM; |
| 3596 | } |
| 3597 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3598 | static void mtree_print_phys_entries(int start, int end, int skip, int ptr) |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3599 | { |
| 3600 | if (start == end - 1) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3601 | qemu_printf("\t%3d ", start); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3602 | } else { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3603 | qemu_printf("\t%3d..%-3d ", start, end - 1); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3604 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3605 | qemu_printf(" skip=%d ", skip); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3606 | if (ptr == PHYS_MAP_NODE_NIL) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3607 | qemu_printf(" ptr=NIL"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3608 | } else if (!skip) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3609 | qemu_printf(" ptr=#%d", ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3610 | } else { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3611 | qemu_printf(" ptr=[%d]", ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3612 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3613 | qemu_printf("\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3614 | } |
| 3615 | |
| 3616 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
| 3617 | int128_sub((size), int128_one())) : 0) |
| 3618 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3619 | void mtree_print_dispatch(AddressSpaceDispatch *d, MemoryRegion *root) |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3620 | { |
| 3621 | int i; |
| 3622 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3623 | qemu_printf(" Dispatch\n"); |
| 3624 | qemu_printf(" Physical sections\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3625 | |
| 3626 | for (i = 0; i < d->map.sections_nb; ++i) { |
| 3627 | MemoryRegionSection *s = d->map.sections + i; |
| 3628 | const char *names[] = { " [unassigned]", " [not dirty]", |
| 3629 | " [ROM]", " [watch]" }; |
| 3630 | |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 3631 | qemu_printf(" #%d @" HWADDR_FMT_plx ".." HWADDR_FMT_plx |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3632 | " %s%s%s%s%s", |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3633 | i, |
| 3634 | s->offset_within_address_space, |
Zhenzhong Duan | f9c307c | 2022-06-22 17:59:12 +0800 | [diff] [blame] | 3635 | s->offset_within_address_space + MR_SIZE(s->size), |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3636 | s->mr->name ? s->mr->name : "(noname)", |
| 3637 | i < ARRAY_SIZE(names) ? names[i] : "", |
| 3638 | s->mr == root ? " [ROOT]" : "", |
| 3639 | s == d->mru_section ? " [MRU]" : "", |
| 3640 | s->mr->is_iommu ? " [iommu]" : ""); |
| 3641 | |
| 3642 | if (s->mr->alias) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3643 | qemu_printf(" alias=%s", s->mr->alias->name ? |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3644 | s->mr->alias->name : "noname"); |
| 3645 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3646 | qemu_printf("\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3647 | } |
| 3648 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3649 | qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n", |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3650 | P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip); |
| 3651 | for (i = 0; i < d->map.nodes_nb; ++i) { |
| 3652 | int j, jprev; |
| 3653 | PhysPageEntry prev; |
| 3654 | Node *n = d->map.nodes + i; |
| 3655 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3656 | qemu_printf(" [%d]\n", i); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3657 | |
| 3658 | for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) { |
| 3659 | PhysPageEntry *pe = *n + j; |
| 3660 | |
| 3661 | if (pe->ptr == prev.ptr && pe->skip == prev.skip) { |
| 3662 | continue; |
| 3663 | } |
| 3664 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3665 | mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3666 | |
| 3667 | jprev = j; |
| 3668 | prev = *pe; |
| 3669 | } |
| 3670 | |
| 3671 | if (jprev != ARRAY_SIZE(*n)) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3672 | mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3673 | } |
| 3674 | } |
| 3675 | } |
| 3676 | |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3677 | /* Require any discards to work. */ |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3678 | static unsigned int ram_block_discard_required_cnt; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3679 | /* Require only coordinated discards to work. */ |
| 3680 | static unsigned int ram_block_coordinated_discard_required_cnt; |
| 3681 | /* Disable any discards. */ |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3682 | static unsigned int ram_block_discard_disabled_cnt; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3683 | /* Disable only uncoordinated discards. */ |
| 3684 | static unsigned int ram_block_uncoordinated_discard_disabled_cnt; |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3685 | static QemuMutex ram_block_discard_disable_mutex; |
| 3686 | |
| 3687 | static void ram_block_discard_disable_mutex_lock(void) |
| 3688 | { |
| 3689 | static gsize initialized; |
| 3690 | |
| 3691 | if (g_once_init_enter(&initialized)) { |
| 3692 | qemu_mutex_init(&ram_block_discard_disable_mutex); |
| 3693 | g_once_init_leave(&initialized, 1); |
| 3694 | } |
| 3695 | qemu_mutex_lock(&ram_block_discard_disable_mutex); |
| 3696 | } |
| 3697 | |
| 3698 | static void ram_block_discard_disable_mutex_unlock(void) |
| 3699 | { |
| 3700 | qemu_mutex_unlock(&ram_block_discard_disable_mutex); |
| 3701 | } |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3702 | |
| 3703 | int ram_block_discard_disable(bool state) |
| 3704 | { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3705 | int ret = 0; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3706 | |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3707 | ram_block_discard_disable_mutex_lock(); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3708 | if (!state) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3709 | ram_block_discard_disabled_cnt--; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3710 | } else if (ram_block_discard_required_cnt || |
| 3711 | ram_block_coordinated_discard_required_cnt) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3712 | ret = -EBUSY; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3713 | } else { |
| 3714 | ram_block_discard_disabled_cnt++; |
| 3715 | } |
| 3716 | ram_block_discard_disable_mutex_unlock(); |
| 3717 | return ret; |
| 3718 | } |
| 3719 | |
| 3720 | int ram_block_uncoordinated_discard_disable(bool state) |
| 3721 | { |
| 3722 | int ret = 0; |
| 3723 | |
| 3724 | ram_block_discard_disable_mutex_lock(); |
| 3725 | if (!state) { |
| 3726 | ram_block_uncoordinated_discard_disabled_cnt--; |
| 3727 | } else if (ram_block_discard_required_cnt) { |
| 3728 | ret = -EBUSY; |
| 3729 | } else { |
| 3730 | ram_block_uncoordinated_discard_disabled_cnt++; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3731 | } |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3732 | ram_block_discard_disable_mutex_unlock(); |
| 3733 | return ret; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3734 | } |
| 3735 | |
| 3736 | int ram_block_discard_require(bool state) |
| 3737 | { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3738 | int ret = 0; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3739 | |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3740 | ram_block_discard_disable_mutex_lock(); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3741 | if (!state) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3742 | ram_block_discard_required_cnt--; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3743 | } else if (ram_block_discard_disabled_cnt || |
| 3744 | ram_block_uncoordinated_discard_disabled_cnt) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3745 | ret = -EBUSY; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3746 | } else { |
| 3747 | ram_block_discard_required_cnt++; |
| 3748 | } |
| 3749 | ram_block_discard_disable_mutex_unlock(); |
| 3750 | return ret; |
| 3751 | } |
| 3752 | |
| 3753 | int ram_block_coordinated_discard_require(bool state) |
| 3754 | { |
| 3755 | int ret = 0; |
| 3756 | |
| 3757 | ram_block_discard_disable_mutex_lock(); |
| 3758 | if (!state) { |
| 3759 | ram_block_coordinated_discard_required_cnt--; |
| 3760 | } else if (ram_block_discard_disabled_cnt) { |
| 3761 | ret = -EBUSY; |
| 3762 | } else { |
| 3763 | ram_block_coordinated_discard_required_cnt++; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3764 | } |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3765 | ram_block_discard_disable_mutex_unlock(); |
| 3766 | return ret; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3767 | } |
| 3768 | |
| 3769 | bool ram_block_discard_is_disabled(void) |
| 3770 | { |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3771 | return qatomic_read(&ram_block_discard_disabled_cnt) || |
| 3772 | qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3773 | } |
| 3774 | |
| 3775 | bool ram_block_discard_is_required(void) |
| 3776 | { |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3777 | return qatomic_read(&ram_block_discard_required_cnt) || |
| 3778 | qatomic_read(&ram_block_coordinated_discard_required_cnt); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3779 | } |