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bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
bellard67b915a2004-03-31 23:37:16 +000019#include "config.h"
bellardd5a8f072004-09-29 21:15:28 +000020#ifdef _WIN32
21#include <windows.h>
22#else
bellarda98d49b2004-11-14 16:22:05 +000023#include <sys/types.h>
bellardd5a8f072004-09-29 21:15:28 +000024#include <sys/mman.h>
25#endif
bellard54936002003-05-13 00:25:15 +000026
Stefan Weil055403b2010-10-22 23:03:32 +020027#include "qemu-common.h"
bellard6180a182003-09-30 21:04:53 +000028#include "cpu.h"
bellardb67d9a52008-05-23 09:57:34 +000029#include "tcg.h"
pbrookb3c77242008-06-30 16:31:04 +000030#include "hw/hw.h"
Alex Williamsoncc9e98c2010-06-25 11:09:43 -060031#include "hw/qdev.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010032#include "qemu/osdep.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Markus Armbruster2ff3de62013-07-04 15:09:22 +020034#include "sysemu/sysemu.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010035#include "hw/xen/xen.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010036#include "qemu/timer.h"
37#include "qemu/config-file.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010038#include "exec/memory.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010039#include "sysemu/dma.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010040#include "exec/address-spaces.h"
pbrook53a59602006-03-25 19:31:22 +000041#if defined(CONFIG_USER_ONLY)
42#include <qemu.h>
Jun Nakajima432d2682010-08-31 16:41:25 +010043#else /* !CONFIG_USER_ONLY */
Paolo Bonzini9c17d612012-12-17 18:20:04 +010044#include "sysemu/xen-mapcache.h"
Stefano Stabellini6506e4f2011-05-19 18:35:44 +010045#include "trace.h"
pbrook53a59602006-03-25 19:31:22 +000046#endif
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +010047#include "exec/cpu-all.h"
bellard54936002003-05-13 00:25:15 +000048
Paolo Bonzini022c62c2012-12-17 18:19:49 +010049#include "exec/cputlb.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000050#include "translate-all.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000051
Paolo Bonzini022c62c2012-12-17 18:19:49 +010052#include "exec/memory-internal.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020053
blueswir1db7b5422007-05-26 17:36:03 +000054//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000055
pbrook99773bd2006-04-16 15:14:59 +000056#if !defined(CONFIG_USER_ONLY)
aliguori74576192008-10-06 14:02:03 +000057static int in_migration;
pbrook94a6b542009-04-11 17:15:54 +000058
Paolo Bonzinia3161032012-11-14 15:54:48 +010059RAMList ram_list = { .blocks = QTAILQ_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030060
61static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030062static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030063
Avi Kivityf6790af2012-10-02 20:13:51 +020064AddressSpace address_space_io;
65AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020066
Paolo Bonzini0844e002013-05-24 14:37:28 +020067MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020068static MemoryRegion io_mem_unassigned;
Avi Kivity0e0df1e2012-01-02 00:32:15 +020069
pbrooke2eef172008-06-08 01:09:01 +000070#endif
bellard9fa3e852004-01-04 18:06:42 +000071
Andreas Färberbdc44642013-06-24 23:50:24 +020072struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
bellard6a00d602005-11-21 23:25:50 +000073/* current CPU in the current thread. It is only valid inside
74 cpu_exec() */
Andreas Färber4917cf42013-05-27 05:17:50 +020075DEFINE_TLS(CPUState *, current_cpu);
pbrook2e70f6e2008-06-29 01:03:05 +000076/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +000077 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +000078 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +010079int use_icount;
bellard6a00d602005-11-21 23:25:50 +000080
pbrooke2eef172008-06-08 01:09:01 +000081#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +020082
Paolo Bonzini1db8abb2013-05-21 12:07:21 +020083typedef struct PhysPageEntry PhysPageEntry;
84
85struct PhysPageEntry {
86 uint16_t is_leaf : 1;
87 /* index into phys_sections (is_leaf) or phys_map_nodes (!is_leaf) */
88 uint16_t ptr : 15;
89};
90
Paolo Bonzini0475d942013-05-29 12:28:21 +020091typedef PhysPageEntry Node[L2_SIZE];
92
Paolo Bonzini1db8abb2013-05-21 12:07:21 +020093struct AddressSpaceDispatch {
94 /* This is a multi-level map on the physical address space.
95 * The bottom level has pointers to MemoryRegionSections.
96 */
97 PhysPageEntry phys_map;
Paolo Bonzini0475d942013-05-29 12:28:21 +020098 Node *nodes;
99 MemoryRegionSection *sections;
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200100 AddressSpace *as;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200101};
102
Jan Kiszka90260c62013-05-26 21:46:51 +0200103#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
104typedef struct subpage_t {
105 MemoryRegion iomem;
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200106 AddressSpace *as;
Jan Kiszka90260c62013-05-26 21:46:51 +0200107 hwaddr base;
108 uint16_t sub_section[TARGET_PAGE_SIZE];
109} subpage_t;
110
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200111#define PHYS_SECTION_UNASSIGNED 0
112#define PHYS_SECTION_NOTDIRTY 1
113#define PHYS_SECTION_ROM 2
114#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200115
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200116typedef struct PhysPageMap {
117 unsigned sections_nb;
118 unsigned sections_nb_alloc;
119 unsigned nodes_nb;
120 unsigned nodes_nb_alloc;
121 Node *nodes;
122 MemoryRegionSection *sections;
123} PhysPageMap;
124
Paolo Bonzini60926662013-05-29 12:30:26 +0200125static PhysPageMap *prev_map;
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200126static PhysPageMap next_map;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200127
Avi Kivity07f07b32012-02-13 20:45:32 +0200128#define PHYS_MAP_NODE_NIL (((uint16_t)~0) >> 1)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200129
pbrooke2eef172008-06-08 01:09:01 +0000130static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300131static void memory_map_init(void);
Blue Swirl8b9c99d2012-10-28 11:04:51 +0000132static void *qemu_safe_ram_ptr(ram_addr_t addr);
pbrooke2eef172008-06-08 01:09:01 +0000133
Avi Kivity1ec9b902012-01-02 12:47:48 +0200134static MemoryRegion io_mem_watch;
pbrook6658ffb2007-03-16 23:58:11 +0000135#endif
bellard54936002003-05-13 00:25:15 +0000136
Paul Brook6d9a1302010-02-28 23:55:53 +0000137#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200138
Avi Kivityf7bf5462012-02-13 20:12:05 +0200139static void phys_map_node_reserve(unsigned nodes)
140{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200141 if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) {
142 next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2,
143 16);
144 next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc,
145 next_map.nodes_nb + nodes);
146 next_map.nodes = g_renew(Node, next_map.nodes,
147 next_map.nodes_nb_alloc);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200148 }
149}
150
151static uint16_t phys_map_node_alloc(void)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200152{
153 unsigned i;
154 uint16_t ret;
155
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200156 ret = next_map.nodes_nb++;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200157 assert(ret != PHYS_MAP_NODE_NIL);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200158 assert(ret != next_map.nodes_nb_alloc);
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200159 for (i = 0; i < L2_SIZE; ++i) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200160 next_map.nodes[ret][i].is_leaf = 0;
161 next_map.nodes[ret][i].ptr = PHYS_MAP_NODE_NIL;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200162 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200163 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200164}
165
Avi Kivitya8170e52012-10-23 12:30:10 +0200166static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
167 hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200168 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200169{
170 PhysPageEntry *p;
171 int i;
Avi Kivitya8170e52012-10-23 12:30:10 +0200172 hwaddr step = (hwaddr)1 << (level * L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200173
Avi Kivity07f07b32012-02-13 20:45:32 +0200174 if (!lp->is_leaf && lp->ptr == PHYS_MAP_NODE_NIL) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200175 lp->ptr = phys_map_node_alloc();
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200176 p = next_map.nodes[lp->ptr];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200177 if (level == 0) {
178 for (i = 0; i < L2_SIZE; i++) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200179 p[i].is_leaf = 1;
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200180 p[i].ptr = PHYS_SECTION_UNASSIGNED;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200181 }
182 }
183 } else {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200184 p = next_map.nodes[lp->ptr];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200185 }
Avi Kivity29990972012-02-13 20:21:20 +0200186 lp = &p[(*index >> (level * L2_BITS)) & (L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200187
Avi Kivity29990972012-02-13 20:21:20 +0200188 while (*nb && lp < &p[L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200189 if ((*index & (step - 1)) == 0 && *nb >= step) {
190 lp->is_leaf = true;
Avi Kivityc19e8802012-02-13 20:25:31 +0200191 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200192 *index += step;
193 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200194 } else {
195 phys_page_set_level(lp, index, nb, leaf, level - 1);
196 }
197 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200198 }
199}
200
Avi Kivityac1970f2012-10-03 16:22:53 +0200201static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200202 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200203 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000204{
Avi Kivity29990972012-02-13 20:21:20 +0200205 /* Wildly overreserve - it doesn't matter much. */
Avi Kivity07f07b32012-02-13 20:45:32 +0200206 phys_map_node_reserve(3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000207
Avi Kivityac1970f2012-10-03 16:22:53 +0200208 phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000209}
210
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200211static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr index,
212 Node *nodes, MemoryRegionSection *sections)
bellard92e873b2004-05-21 14:52:29 +0000213{
Avi Kivity31ab2b42012-02-13 16:44:19 +0200214 PhysPageEntry *p;
215 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200216
Avi Kivity07f07b32012-02-13 20:45:32 +0200217 for (i = P_L2_LEVELS - 1; i >= 0 && !lp.is_leaf; i--) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200218 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200219 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200220 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200221 p = nodes[lp.ptr];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200222 lp = p[(index >> (i * L2_BITS)) & (L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200223 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200224 return &sections[lp.ptr];
Avi Kivityf3705d52012-03-08 16:16:34 +0200225}
226
Blue Swirle5548612012-04-21 13:08:33 +0000227bool memory_region_is_unassigned(MemoryRegion *mr)
228{
Paolo Bonzini2a8e7492013-05-24 14:34:08 +0200229 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
Blue Swirle5548612012-04-21 13:08:33 +0000230 && mr != &io_mem_watch;
231}
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200232
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200233static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
Jan Kiszka90260c62013-05-26 21:46:51 +0200234 hwaddr addr,
235 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200236{
Jan Kiszka90260c62013-05-26 21:46:51 +0200237 MemoryRegionSection *section;
238 subpage_t *subpage;
239
Paolo Bonzini0475d942013-05-29 12:28:21 +0200240 section = phys_page_find(d->phys_map, addr >> TARGET_PAGE_BITS,
241 d->nodes, d->sections);
Jan Kiszka90260c62013-05-26 21:46:51 +0200242 if (resolve_subpage && section->mr->subpage) {
243 subpage = container_of(section->mr, subpage_t, iomem);
Paolo Bonzini0475d942013-05-29 12:28:21 +0200244 section = &d->sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200245 }
246 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200247}
248
Jan Kiszka90260c62013-05-26 21:46:51 +0200249static MemoryRegionSection *
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200250address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
Jan Kiszka90260c62013-05-26 21:46:51 +0200251 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200252{
253 MemoryRegionSection *section;
254 Int128 diff;
255
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200256 section = address_space_lookup_region(d, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200257 /* Compute offset within MemoryRegionSection */
258 addr -= section->offset_within_address_space;
259
260 /* Compute offset within MemoryRegion */
261 *xlat = addr + section->offset_within_region;
262
263 diff = int128_sub(section->mr->size, int128_make64(addr));
Peter Maydell3752a032013-06-20 15:18:04 +0100264 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200265 return section;
266}
Jan Kiszka90260c62013-05-26 21:46:51 +0200267
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +0200268MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
269 hwaddr *xlat, hwaddr *plen,
270 bool is_write)
Jan Kiszka90260c62013-05-26 21:46:51 +0200271{
Avi Kivity30951152012-10-30 13:47:46 +0200272 IOMMUTLBEntry iotlb;
273 MemoryRegionSection *section;
274 MemoryRegion *mr;
275 hwaddr len = *plen;
276
277 for (;;) {
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200278 section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true);
Avi Kivity30951152012-10-30 13:47:46 +0200279 mr = section->mr;
280
281 if (!mr->iommu_ops) {
282 break;
283 }
284
285 iotlb = mr->iommu_ops->translate(mr, addr);
286 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
287 | (addr & iotlb.addr_mask));
288 len = MIN(len, (addr | iotlb.addr_mask) - addr + 1);
289 if (!(iotlb.perm & (1 << is_write))) {
290 mr = &io_mem_unassigned;
291 break;
292 }
293
294 as = iotlb.target_as;
295 }
296
297 *plen = len;
298 *xlat = addr;
299 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200300}
301
302MemoryRegionSection *
303address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
304 hwaddr *plen)
305{
Avi Kivity30951152012-10-30 13:47:46 +0200306 MemoryRegionSection *section;
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200307 section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false);
Avi Kivity30951152012-10-30 13:47:46 +0200308
309 assert(!section->mr->iommu_ops);
310 return section;
Jan Kiszka90260c62013-05-26 21:46:51 +0200311}
bellard9fa3e852004-01-04 18:06:42 +0000312#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000313
Jan Kiszkad5ab9712011-08-02 16:10:21 +0200314void cpu_exec_init_all(void)
315{
316#if !defined(CONFIG_USER_ONLY)
Umesh Deshpandeb2a86582011-08-17 00:01:33 -0700317 qemu_mutex_init(&ram_list.mutex);
Jan Kiszkad5ab9712011-08-02 16:10:21 +0200318 memory_map_init();
319 io_mem_init();
320#endif
321}
322
Andreas Färberb170fce2013-01-20 20:23:22 +0100323#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000324
Juan Quintelae59fb372009-09-29 22:48:21 +0200325static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200326{
Andreas Färber259186a2013-01-17 18:51:17 +0100327 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200328
aurel323098dba2009-03-07 21:28:24 +0000329 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
330 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100331 cpu->interrupt_request &= ~0x01;
332 tlb_flush(cpu->env_ptr, 1);
pbrook9656f322008-07-01 20:01:19 +0000333
334 return 0;
335}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200336
Andreas Färber1a1562f2013-06-17 04:09:11 +0200337const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200338 .name = "cpu_common",
339 .version_id = 1,
340 .minimum_version_id = 1,
341 .minimum_version_id_old = 1,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200342 .post_load = cpu_common_post_load,
343 .fields = (VMStateField []) {
Andreas Färber259186a2013-01-17 18:51:17 +0100344 VMSTATE_UINT32(halted, CPUState),
345 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200346 VMSTATE_END_OF_LIST()
347 }
348};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200349
pbrook9656f322008-07-01 20:01:19 +0000350#endif
351
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100352CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400353{
Andreas Färberbdc44642013-06-24 23:50:24 +0200354 CPUState *cpu;
Glauber Costa950f1472009-06-09 12:15:18 -0400355
Andreas Färberbdc44642013-06-24 23:50:24 +0200356 CPU_FOREACH(cpu) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100357 if (cpu->cpu_index == index) {
Andreas Färberbdc44642013-06-24 23:50:24 +0200358 return cpu;
Andreas Färber55e5c282012-12-17 06:18:02 +0100359 }
Glauber Costa950f1472009-06-09 12:15:18 -0400360 }
361
Andreas Färberbdc44642013-06-24 23:50:24 +0200362 return NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400363}
364
Andreas Färber9349b4f2012-03-14 01:38:32 +0100365void cpu_exec_init(CPUArchState *env)
bellardfd6ce8f2003-05-14 19:00:11 +0000366{
Andreas Färber9f09e182012-05-03 06:59:07 +0200367 CPUState *cpu = ENV_GET_CPU(env);
Andreas Färberb170fce2013-01-20 20:23:22 +0100368 CPUClass *cc = CPU_GET_CLASS(cpu);
Andreas Färberbdc44642013-06-24 23:50:24 +0200369 CPUState *some_cpu;
bellard6a00d602005-11-21 23:25:50 +0000370 int cpu_index;
371
pbrookc2764712009-03-07 15:24:59 +0000372#if defined(CONFIG_USER_ONLY)
373 cpu_list_lock();
374#endif
bellard6a00d602005-11-21 23:25:50 +0000375 cpu_index = 0;
Andreas Färberbdc44642013-06-24 23:50:24 +0200376 CPU_FOREACH(some_cpu) {
bellard6a00d602005-11-21 23:25:50 +0000377 cpu_index++;
378 }
Andreas Färber55e5c282012-12-17 06:18:02 +0100379 cpu->cpu_index = cpu_index;
Andreas Färber1b1ed8d2012-12-17 04:22:03 +0100380 cpu->numa_node = 0;
Blue Swirl72cf2d42009-09-12 07:36:22 +0000381 QTAILQ_INIT(&env->breakpoints);
382 QTAILQ_INIT(&env->watchpoints);
Jan Kiszkadc7a09c2011-03-15 12:26:31 +0100383#ifndef CONFIG_USER_ONLY
Andreas Färber9f09e182012-05-03 06:59:07 +0200384 cpu->thread_id = qemu_get_thread_id();
Jan Kiszkadc7a09c2011-03-15 12:26:31 +0100385#endif
Andreas Färberbdc44642013-06-24 23:50:24 +0200386 QTAILQ_INSERT_TAIL(&cpus, cpu, node);
pbrookc2764712009-03-07 15:24:59 +0000387#if defined(CONFIG_USER_ONLY)
388 cpu_list_unlock();
389#endif
Andreas Färbere0d47942013-07-29 04:07:50 +0200390 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
391 vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
392 }
pbrookb3c77242008-06-30 16:31:04 +0000393#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
Alex Williamson0be71e32010-06-25 11:09:07 -0600394 register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
pbrookb3c77242008-06-30 16:31:04 +0000395 cpu_save, cpu_load, env);
Andreas Färberb170fce2013-01-20 20:23:22 +0100396 assert(cc->vmsd == NULL);
Andreas Färbere0d47942013-07-29 04:07:50 +0200397 assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
pbrookb3c77242008-06-30 16:31:04 +0000398#endif
Andreas Färberb170fce2013-01-20 20:23:22 +0100399 if (cc->vmsd != NULL) {
400 vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
401 }
bellardfd6ce8f2003-05-14 19:00:11 +0000402}
403
bellard1fddef42005-04-17 19:16:13 +0000404#if defined(TARGET_HAS_ICE)
Paul Brook94df27f2010-02-28 23:47:45 +0000405#if defined(CONFIG_USER_ONLY)
Andreas Färber00b941e2013-06-29 18:55:54 +0200406static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
Paul Brook94df27f2010-02-28 23:47:45 +0000407{
408 tb_invalidate_phys_page_range(pc, pc + 1, 0);
409}
410#else
Andreas Färber00b941e2013-06-29 18:55:54 +0200411static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
Max Filippov1e7855a2012-04-10 02:48:17 +0400412{
Andreas Färber00b941e2013-06-29 18:55:54 +0200413 tb_invalidate_phys_addr(cpu_get_phys_page_debug(cpu, pc) |
Max Filippov9d70c4b2012-05-27 20:21:08 +0400414 (pc & ~TARGET_PAGE_MASK));
Max Filippov1e7855a2012-04-10 02:48:17 +0400415}
bellardc27004e2005-01-03 23:35:10 +0000416#endif
Paul Brook94df27f2010-02-28 23:47:45 +0000417#endif /* TARGET_HAS_ICE */
bellardd720b932004-04-25 17:57:43 +0000418
Paul Brookc527ee82010-03-01 03:31:14 +0000419#if defined(CONFIG_USER_ONLY)
Andreas Färber9349b4f2012-03-14 01:38:32 +0100420void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +0000421
422{
423}
424
Andreas Färber9349b4f2012-03-14 01:38:32 +0100425int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
Paul Brookc527ee82010-03-01 03:31:14 +0000426 int flags, CPUWatchpoint **watchpoint)
427{
428 return -ENOSYS;
429}
430#else
pbrook6658ffb2007-03-16 23:58:11 +0000431/* Add a watchpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100432int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
aliguoria1d1bb32008-11-18 20:07:32 +0000433 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +0000434{
aliguorib4051332008-11-18 20:14:20 +0000435 target_ulong len_mask = ~(len - 1);
aliguoric0ce9982008-11-25 22:13:57 +0000436 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000437
aliguorib4051332008-11-18 20:14:20 +0000438 /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */
Max Filippov0dc23822012-01-29 03:15:23 +0400439 if ((len & (len - 1)) || (addr & ~len_mask) ||
440 len == 0 || len > TARGET_PAGE_SIZE) {
aliguorib4051332008-11-18 20:14:20 +0000441 fprintf(stderr, "qemu: tried to set invalid watchpoint at "
442 TARGET_FMT_lx ", len=" TARGET_FMT_lu "\n", addr, len);
443 return -EINVAL;
444 }
Anthony Liguori7267c092011-08-20 22:09:37 -0500445 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +0000446
aliguoria1d1bb32008-11-18 20:07:32 +0000447 wp->vaddr = addr;
aliguorib4051332008-11-18 20:14:20 +0000448 wp->len_mask = len_mask;
aliguoria1d1bb32008-11-18 20:07:32 +0000449 wp->flags = flags;
450
aliguori2dc9f412008-11-18 20:56:59 +0000451 /* keep all GDB-injected watchpoints in front */
aliguoric0ce9982008-11-25 22:13:57 +0000452 if (flags & BP_GDB)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000453 QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry);
aliguoric0ce9982008-11-25 22:13:57 +0000454 else
Blue Swirl72cf2d42009-09-12 07:36:22 +0000455 QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry);
aliguoria1d1bb32008-11-18 20:07:32 +0000456
pbrook6658ffb2007-03-16 23:58:11 +0000457 tlb_flush_page(env, addr);
aliguoria1d1bb32008-11-18 20:07:32 +0000458
459 if (watchpoint)
460 *watchpoint = wp;
461 return 0;
pbrook6658ffb2007-03-16 23:58:11 +0000462}
463
aliguoria1d1bb32008-11-18 20:07:32 +0000464/* Remove a specific watchpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100465int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len,
aliguoria1d1bb32008-11-18 20:07:32 +0000466 int flags)
pbrook6658ffb2007-03-16 23:58:11 +0000467{
aliguorib4051332008-11-18 20:14:20 +0000468 target_ulong len_mask = ~(len - 1);
aliguoria1d1bb32008-11-18 20:07:32 +0000469 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000470
Blue Swirl72cf2d42009-09-12 07:36:22 +0000471 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguorib4051332008-11-18 20:14:20 +0000472 if (addr == wp->vaddr && len_mask == wp->len_mask
aliguori6e140f22008-11-18 20:37:55 +0000473 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
aliguoria1d1bb32008-11-18 20:07:32 +0000474 cpu_watchpoint_remove_by_ref(env, wp);
pbrook6658ffb2007-03-16 23:58:11 +0000475 return 0;
476 }
477 }
aliguoria1d1bb32008-11-18 20:07:32 +0000478 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +0000479}
480
aliguoria1d1bb32008-11-18 20:07:32 +0000481/* Remove a specific watchpoint by reference. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100482void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +0000483{
Blue Swirl72cf2d42009-09-12 07:36:22 +0000484 QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +0000485
aliguoria1d1bb32008-11-18 20:07:32 +0000486 tlb_flush_page(env, watchpoint->vaddr);
487
Anthony Liguori7267c092011-08-20 22:09:37 -0500488 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +0000489}
490
aliguoria1d1bb32008-11-18 20:07:32 +0000491/* Remove all matching watchpoints. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100492void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +0000493{
aliguoric0ce9982008-11-25 22:13:57 +0000494 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +0000495
Blue Swirl72cf2d42009-09-12 07:36:22 +0000496 QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) {
aliguoria1d1bb32008-11-18 20:07:32 +0000497 if (wp->flags & mask)
498 cpu_watchpoint_remove_by_ref(env, wp);
aliguoric0ce9982008-11-25 22:13:57 +0000499 }
aliguoria1d1bb32008-11-18 20:07:32 +0000500}
Paul Brookc527ee82010-03-01 03:31:14 +0000501#endif
aliguoria1d1bb32008-11-18 20:07:32 +0000502
503/* Add a breakpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100504int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +0000505 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +0000506{
bellard1fddef42005-04-17 19:16:13 +0000507#if defined(TARGET_HAS_ICE)
aliguoric0ce9982008-11-25 22:13:57 +0000508 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +0000509
Anthony Liguori7267c092011-08-20 22:09:37 -0500510 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +0000511
512 bp->pc = pc;
513 bp->flags = flags;
514
aliguori2dc9f412008-11-18 20:56:59 +0000515 /* keep all GDB-injected breakpoints in front */
Andreas Färber00b941e2013-06-29 18:55:54 +0200516 if (flags & BP_GDB) {
Blue Swirl72cf2d42009-09-12 07:36:22 +0000517 QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +0200518 } else {
Blue Swirl72cf2d42009-09-12 07:36:22 +0000519 QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +0200520 }
aliguoria1d1bb32008-11-18 20:07:32 +0000521
Andreas Färber00b941e2013-06-29 18:55:54 +0200522 breakpoint_invalidate(ENV_GET_CPU(env), pc);
aliguoria1d1bb32008-11-18 20:07:32 +0000523
Andreas Färber00b941e2013-06-29 18:55:54 +0200524 if (breakpoint) {
aliguoria1d1bb32008-11-18 20:07:32 +0000525 *breakpoint = bp;
Andreas Färber00b941e2013-06-29 18:55:54 +0200526 }
aliguoria1d1bb32008-11-18 20:07:32 +0000527 return 0;
528#else
529 return -ENOSYS;
530#endif
531}
532
533/* Remove a specific breakpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100534int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +0000535{
536#if defined(TARGET_HAS_ICE)
537 CPUBreakpoint *bp;
538
Blue Swirl72cf2d42009-09-12 07:36:22 +0000539 QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +0000540 if (bp->pc == pc && bp->flags == flags) {
541 cpu_breakpoint_remove_by_ref(env, bp);
bellard4c3a88a2003-07-26 12:06:08 +0000542 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +0000543 }
bellard4c3a88a2003-07-26 12:06:08 +0000544 }
aliguoria1d1bb32008-11-18 20:07:32 +0000545 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +0000546#else
aliguoria1d1bb32008-11-18 20:07:32 +0000547 return -ENOSYS;
bellard4c3a88a2003-07-26 12:06:08 +0000548#endif
549}
550
aliguoria1d1bb32008-11-18 20:07:32 +0000551/* Remove a specific breakpoint by reference. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100552void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +0000553{
bellard1fddef42005-04-17 19:16:13 +0000554#if defined(TARGET_HAS_ICE)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000555 QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry);
bellardd720b932004-04-25 17:57:43 +0000556
Andreas Färber00b941e2013-06-29 18:55:54 +0200557 breakpoint_invalidate(ENV_GET_CPU(env), breakpoint->pc);
aliguoria1d1bb32008-11-18 20:07:32 +0000558
Anthony Liguori7267c092011-08-20 22:09:37 -0500559 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +0000560#endif
561}
562
563/* Remove all matching breakpoints. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100564void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +0000565{
566#if defined(TARGET_HAS_ICE)
aliguoric0ce9982008-11-25 22:13:57 +0000567 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +0000568
Blue Swirl72cf2d42009-09-12 07:36:22 +0000569 QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) {
aliguoria1d1bb32008-11-18 20:07:32 +0000570 if (bp->flags & mask)
571 cpu_breakpoint_remove_by_ref(env, bp);
aliguoric0ce9982008-11-25 22:13:57 +0000572 }
bellard4c3a88a2003-07-26 12:06:08 +0000573#endif
574}
575
bellardc33a3462003-07-29 20:50:33 +0000576/* enable or disable single step mode. EXCP_DEBUG is returned by the
577 CPU loop after each instruction */
Andreas Färber3825b282013-06-24 18:41:06 +0200578void cpu_single_step(CPUState *cpu, int enabled)
bellardc33a3462003-07-29 20:50:33 +0000579{
bellard1fddef42005-04-17 19:16:13 +0000580#if defined(TARGET_HAS_ICE)
Andreas Färbered2803d2013-06-21 20:20:45 +0200581 if (cpu->singlestep_enabled != enabled) {
582 cpu->singlestep_enabled = enabled;
583 if (kvm_enabled()) {
Stefan Weil38e478e2013-07-25 20:50:21 +0200584 kvm_update_guest_debug(cpu, 0);
Andreas Färbered2803d2013-06-21 20:20:45 +0200585 } else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +0100586 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +0000587 /* XXX: only flush what is necessary */
Stefan Weil38e478e2013-07-25 20:50:21 +0200588 CPUArchState *env = cpu->env_ptr;
aliguorie22a25c2009-03-12 20:12:48 +0000589 tb_flush(env);
590 }
bellardc33a3462003-07-29 20:50:33 +0000591 }
592#endif
593}
594
Andreas Färber9349b4f2012-03-14 01:38:32 +0100595void cpu_abort(CPUArchState *env, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +0000596{
Andreas Färber878096e2013-05-27 01:33:50 +0200597 CPUState *cpu = ENV_GET_CPU(env);
bellard75012672003-06-21 13:11:07 +0000598 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +0000599 va_list ap2;
bellard75012672003-06-21 13:11:07 +0000600
601 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +0000602 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +0000603 fprintf(stderr, "qemu: fatal: ");
604 vfprintf(stderr, fmt, ap);
605 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +0200606 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori93fcfe32009-01-15 22:34:14 +0000607 if (qemu_log_enabled()) {
608 qemu_log("qemu: fatal: ");
609 qemu_log_vprintf(fmt, ap2);
610 qemu_log("\n");
Andreas Färbera0762852013-06-16 07:28:50 +0200611 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +0000612 qemu_log_flush();
aliguori93fcfe32009-01-15 22:34:14 +0000613 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +0000614 }
pbrook493ae1f2007-11-23 16:53:59 +0000615 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +0000616 va_end(ap);
Riku Voipiofd052bf2010-01-25 14:30:49 +0200617#if defined(CONFIG_USER_ONLY)
618 {
619 struct sigaction act;
620 sigfillset(&act.sa_mask);
621 act.sa_handler = SIG_DFL;
622 sigaction(SIGABRT, &act, NULL);
623 }
624#endif
bellard75012672003-06-21 13:11:07 +0000625 abort();
626}
627
Andreas Färber9349b4f2012-03-14 01:38:32 +0100628CPUArchState *cpu_copy(CPUArchState *env)
thsc5be9f02007-02-28 20:20:53 +0000629{
Andreas Färber9349b4f2012-03-14 01:38:32 +0100630 CPUArchState *new_env = cpu_init(env->cpu_model_str);
aliguori5a38f082009-01-15 20:16:51 +0000631#if defined(TARGET_HAS_ICE)
632 CPUBreakpoint *bp;
633 CPUWatchpoint *wp;
634#endif
635
Alexander Grafb24c8822013-07-06 14:17:51 +0200636 /* Reset non arch specific state */
637 cpu_reset(ENV_GET_CPU(new_env));
638
639 /* Copy arch specific state into the new CPU */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100640 memcpy(new_env, env, sizeof(CPUArchState));
aliguori5a38f082009-01-15 20:16:51 +0000641
aliguori5a38f082009-01-15 20:16:51 +0000642 /* Clone all break/watchpoints.
643 Note: Once we support ptrace with hw-debug register access, make sure
644 BP_CPU break/watchpoints are handled correctly on clone. */
Blue Swirl72cf2d42009-09-12 07:36:22 +0000645 QTAILQ_INIT(&env->breakpoints);
646 QTAILQ_INIT(&env->watchpoints);
aliguori5a38f082009-01-15 20:16:51 +0000647#if defined(TARGET_HAS_ICE)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000648 QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
aliguori5a38f082009-01-15 20:16:51 +0000649 cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);
650 }
Blue Swirl72cf2d42009-09-12 07:36:22 +0000651 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguori5a38f082009-01-15 20:16:51 +0000652 cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,
653 wp->flags, NULL);
654 }
655#endif
656
thsc5be9f02007-02-28 20:20:53 +0000657 return new_env;
658}
659
bellard01243112004-01-04 15:48:17 +0000660#if !defined(CONFIG_USER_ONLY)
Juan Quintelad24981d2012-05-22 00:42:40 +0200661static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end,
662 uintptr_t length)
bellard1ccde1c2004-02-06 19:46:14 +0000663{
Juan Quintelad24981d2012-05-22 00:42:40 +0200664 uintptr_t start1;
bellardf23db162005-08-21 19:12:28 +0000665
bellard1ccde1c2004-02-06 19:46:14 +0000666 /* we modify the TLB cache so that the dirty bit will be set again
667 when accessing the range */
Stefan Weil8efe0ca2012-04-12 15:42:19 +0200668 start1 = (uintptr_t)qemu_safe_ram_ptr(start);
Stefan Weila57d23e2011-04-30 22:49:26 +0200669 /* Check that we don't span multiple blocks - this breaks the
pbrook5579c7f2009-04-11 14:47:08 +0000670 address comparisons below. */
Stefan Weil8efe0ca2012-04-12 15:42:19 +0200671 if ((uintptr_t)qemu_safe_ram_ptr(end - 1) - start1
pbrook5579c7f2009-04-11 14:47:08 +0000672 != (end - 1) - start) {
673 abort();
674 }
Blue Swirle5548612012-04-21 13:08:33 +0000675 cpu_tlb_reset_dirty_all(start1, length);
Juan Quintelad24981d2012-05-22 00:42:40 +0200676
677}
678
679/* Note: start and end must be within the same ram block. */
680void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
681 int dirty_flags)
682{
683 uintptr_t length;
684
685 start &= TARGET_PAGE_MASK;
686 end = TARGET_PAGE_ALIGN(end);
687
688 length = end - start;
689 if (length == 0)
690 return;
691 cpu_physical_memory_mask_dirty_range(start, length, dirty_flags);
692
693 if (tcg_enabled()) {
694 tlb_reset_dirty_range_all(start, end, length);
695 }
bellard1ccde1c2004-02-06 19:46:14 +0000696}
697
Blue Swirl8b9c99d2012-10-28 11:04:51 +0000698static int cpu_physical_memory_set_dirty_tracking(int enable)
aliguori74576192008-10-06 14:02:03 +0000699{
Michael S. Tsirkinf6f3fbc2010-01-27 22:06:57 +0200700 int ret = 0;
aliguori74576192008-10-06 14:02:03 +0000701 in_migration = enable;
Michael S. Tsirkinf6f3fbc2010-01-27 22:06:57 +0200702 return ret;
aliguori74576192008-10-06 14:02:03 +0000703}
704
Avi Kivitya8170e52012-10-23 12:30:10 +0200705hwaddr memory_region_section_get_iotlb(CPUArchState *env,
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200706 MemoryRegionSection *section,
707 target_ulong vaddr,
708 hwaddr paddr, hwaddr xlat,
709 int prot,
710 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +0000711{
Avi Kivitya8170e52012-10-23 12:30:10 +0200712 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +0000713 CPUWatchpoint *wp;
714
Blue Swirlcc5bea62012-04-14 14:56:48 +0000715 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +0000716 /* Normal RAM. */
717 iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200718 + xlat;
Blue Swirle5548612012-04-21 13:08:33 +0000719 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200720 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +0000721 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200722 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +0000723 }
724 } else {
Paolo Bonzini0475d942013-05-29 12:28:21 +0200725 iotlb = section - address_space_memory.dispatch->sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200726 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +0000727 }
728
729 /* Make accesses to pages with watchpoints go via the
730 watchpoint trap routines. */
731 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
732 if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
733 /* Avoid trapping reads of pages with a write breakpoint. */
734 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200735 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +0000736 *address |= TLB_MMIO;
737 break;
738 }
739 }
740 }
741
742 return iotlb;
743}
bellard9fa3e852004-01-04 18:06:42 +0000744#endif /* defined(CONFIG_USER_ONLY) */
745
pbrooke2eef172008-06-08 01:09:01 +0000746#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +0000747
Anthony Liguoric227f092009-10-01 16:12:16 -0500748static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +0200749 uint16_t section);
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200750static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +0200751
Avi Kivity5312bd82012-02-12 18:32:55 +0200752static uint16_t phys_section_add(MemoryRegionSection *section)
753{
Paolo Bonzini68f3f652013-05-07 11:30:23 +0200754 /* The physical section number is ORed with a page-aligned
755 * pointer to produce the iotlb entries. Thus it should
756 * never overflow into the page-aligned value.
757 */
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200758 assert(next_map.sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +0200759
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200760 if (next_map.sections_nb == next_map.sections_nb_alloc) {
761 next_map.sections_nb_alloc = MAX(next_map.sections_nb_alloc * 2,
762 16);
763 next_map.sections = g_renew(MemoryRegionSection, next_map.sections,
764 next_map.sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +0200765 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200766 next_map.sections[next_map.sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200767 memory_region_ref(section->mr);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200768 return next_map.sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +0200769}
770
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200771static void phys_section_destroy(MemoryRegion *mr)
772{
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200773 memory_region_unref(mr);
774
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200775 if (mr->subpage) {
776 subpage_t *subpage = container_of(mr, subpage_t, iomem);
777 memory_region_destroy(&subpage->iomem);
778 g_free(subpage);
779 }
780}
781
Paolo Bonzini60926662013-05-29 12:30:26 +0200782static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +0200783{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200784 while (map->sections_nb > 0) {
785 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200786 phys_section_destroy(section->mr);
787 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200788 g_free(map->sections);
789 g_free(map->nodes);
Paolo Bonzini60926662013-05-29 12:30:26 +0200790 g_free(map);
Avi Kivity5312bd82012-02-12 18:32:55 +0200791}
792
Avi Kivityac1970f2012-10-03 16:22:53 +0200793static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +0200794{
795 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +0200796 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +0200797 & TARGET_PAGE_MASK;
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200798 MemoryRegionSection *existing = phys_page_find(d->phys_map, base >> TARGET_PAGE_BITS,
799 next_map.nodes, next_map.sections);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200800 MemoryRegionSection subsection = {
801 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200802 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +0200803 };
Avi Kivitya8170e52012-10-23 12:30:10 +0200804 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +0200805
Avi Kivityf3705d52012-03-08 16:16:34 +0200806 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200807
Avi Kivityf3705d52012-03-08 16:16:34 +0200808 if (!(existing->mr->subpage)) {
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200809 subpage = subpage_init(d->as, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200810 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +0200811 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Avi Kivity29990972012-02-13 20:21:20 +0200812 phys_section_add(&subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +0200813 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +0200814 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200815 }
816 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200817 end = start + int128_get64(section->size) - 1;
Avi Kivity0f0cb162012-02-13 17:14:32 +0200818 subpage_register(subpage, start, end, phys_section_add(section));
819}
820
821
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200822static void register_multipage(AddressSpaceDispatch *d,
823 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +0000824{
Avi Kivitya8170e52012-10-23 12:30:10 +0200825 hwaddr start_addr = section->offset_within_address_space;
Avi Kivity5312bd82012-02-12 18:32:55 +0200826 uint16_t section_index = phys_section_add(section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200827 uint64_t num_pages = int128_get64(int128_rshift(section->size,
828 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +0200829
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200830 assert(num_pages);
831 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +0000832}
833
Avi Kivityac1970f2012-10-03 16:22:53 +0200834static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +0200835{
Paolo Bonzini89ae3372013-06-02 10:39:07 +0200836 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini00752702013-05-29 12:13:54 +0200837 AddressSpaceDispatch *d = as->next_dispatch;
Paolo Bonzini99b9cc02013-05-27 13:18:01 +0200838 MemoryRegionSection now = *section, remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200839 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200840
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200841 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
842 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
843 - now.offset_within_address_space;
844
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200845 now.size = int128_min(int128_make64(left), now.size);
Avi Kivityac1970f2012-10-03 16:22:53 +0200846 register_subpage(d, &now);
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200847 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200848 now.size = int128_zero();
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200849 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200850 while (int128_ne(remain.size, now.size)) {
851 remain.size = int128_sub(remain.size, now.size);
852 remain.offset_within_address_space += int128_get64(now.size);
853 remain.offset_within_region += int128_get64(now.size);
Tyler Hall69b67642012-07-25 18:45:04 -0400854 now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200855 if (int128_lt(remain.size, page_size)) {
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200856 register_subpage(d, &now);
Hu Tao88266242013-08-29 18:21:16 +0800857 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200858 now.size = page_size;
Avi Kivityac1970f2012-10-03 16:22:53 +0200859 register_subpage(d, &now);
Tyler Hall69b67642012-07-25 18:45:04 -0400860 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200861 now.size = int128_and(now.size, int128_neg(page_size));
Avi Kivityac1970f2012-10-03 16:22:53 +0200862 register_multipage(d, &now);
Tyler Hall69b67642012-07-25 18:45:04 -0400863 }
Avi Kivity0f0cb162012-02-13 17:14:32 +0200864 }
865}
866
Sheng Yang62a27442010-01-26 19:21:16 +0800867void qemu_flush_coalesced_mmio_buffer(void)
868{
869 if (kvm_enabled())
870 kvm_flush_coalesced_mmio_buffer();
871}
872
Umesh Deshpandeb2a86582011-08-17 00:01:33 -0700873void qemu_mutex_lock_ramlist(void)
874{
875 qemu_mutex_lock(&ram_list.mutex);
876}
877
878void qemu_mutex_unlock_ramlist(void)
879{
880 qemu_mutex_unlock(&ram_list.mutex);
881}
882
Marcelo Tosattic9027602010-03-01 20:25:08 -0300883#if defined(__linux__) && !defined(TARGET_S390X)
884
885#include <sys/vfs.h>
886
887#define HUGETLBFS_MAGIC 0x958458f6
888
889static long gethugepagesize(const char *path)
890{
891 struct statfs fs;
892 int ret;
893
894 do {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900895 ret = statfs(path, &fs);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300896 } while (ret != 0 && errno == EINTR);
897
898 if (ret != 0) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900899 perror(path);
900 return 0;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300901 }
902
903 if (fs.f_type != HUGETLBFS_MAGIC)
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900904 fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300905
906 return fs.f_bsize;
907}
908
Alex Williamson04b16652010-07-02 11:13:17 -0600909static void *file_ram_alloc(RAMBlock *block,
910 ram_addr_t memory,
911 const char *path)
Marcelo Tosattic9027602010-03-01 20:25:08 -0300912{
913 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -0500914 char *sanitized_name;
915 char *c;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300916 void *area;
917 int fd;
918#ifdef MAP_POPULATE
919 int flags;
920#endif
921 unsigned long hpagesize;
922
923 hpagesize = gethugepagesize(path);
924 if (!hpagesize) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900925 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300926 }
927
928 if (memory < hpagesize) {
929 return NULL;
930 }
931
932 if (kvm_enabled() && !kvm_has_sync_mmu()) {
933 fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n");
934 return NULL;
935 }
936
Peter Feiner8ca761f2013-03-04 13:54:25 -0500937 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
938 sanitized_name = g_strdup(block->mr->name);
939 for (c = sanitized_name; *c != '\0'; c++) {
940 if (*c == '/')
941 *c = '_';
942 }
943
944 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
945 sanitized_name);
946 g_free(sanitized_name);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300947
948 fd = mkstemp(filename);
949 if (fd < 0) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900950 perror("unable to create backing store for hugepages");
Stefan Weile4ada482013-01-16 18:37:23 +0100951 g_free(filename);
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900952 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300953 }
954 unlink(filename);
Stefan Weile4ada482013-01-16 18:37:23 +0100955 g_free(filename);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300956
957 memory = (memory+hpagesize-1) & ~(hpagesize-1);
958
959 /*
960 * ftruncate is not supported by hugetlbfs in older
961 * hosts, so don't bother bailing out on errors.
962 * If anything goes wrong with it under other filesystems,
963 * mmap will fail.
964 */
965 if (ftruncate(fd, memory))
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900966 perror("ftruncate");
Marcelo Tosattic9027602010-03-01 20:25:08 -0300967
968#ifdef MAP_POPULATE
969 /* NB: MAP_POPULATE won't exhaustively alloc all phys pages in the case
970 * MAP_PRIVATE is requested. For mem_prealloc we mmap as MAP_SHARED
971 * to sidestep this quirk.
972 */
973 flags = mem_prealloc ? MAP_POPULATE | MAP_SHARED : MAP_PRIVATE;
974 area = mmap(0, memory, PROT_READ | PROT_WRITE, flags, fd, 0);
975#else
976 area = mmap(0, memory, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0);
977#endif
978 if (area == MAP_FAILED) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900979 perror("file_ram_alloc: can't mmap RAM pages");
980 close(fd);
981 return (NULL);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300982 }
Alex Williamson04b16652010-07-02 11:13:17 -0600983 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300984 return area;
985}
986#endif
987
Alex Williamsond17b5282010-06-25 11:08:38 -0600988static ram_addr_t find_ram_offset(ram_addr_t size)
989{
Alex Williamson04b16652010-07-02 11:13:17 -0600990 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -0600991 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -0600992
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +0100993 assert(size != 0); /* it would hand out same offset multiple times */
994
Paolo Bonzinia3161032012-11-14 15:54:48 +0100995 if (QTAILQ_EMPTY(&ram_list.blocks))
Alex Williamson04b16652010-07-02 11:13:17 -0600996 return 0;
997
Paolo Bonzinia3161032012-11-14 15:54:48 +0100998 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Anthony PERARDf15fbc42011-07-20 08:17:42 +0000999 ram_addr_t end, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001000
1001 end = block->offset + block->length;
1002
Paolo Bonzinia3161032012-11-14 15:54:48 +01001003 QTAILQ_FOREACH(next_block, &ram_list.blocks, next) {
Alex Williamson04b16652010-07-02 11:13:17 -06001004 if (next_block->offset >= end) {
1005 next = MIN(next, next_block->offset);
1006 }
1007 }
1008 if (next - end >= size && next - end < mingap) {
Alex Williamson3e837b22011-10-31 08:54:09 -06001009 offset = end;
Alex Williamson04b16652010-07-02 11:13:17 -06001010 mingap = next - end;
1011 }
1012 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001013
1014 if (offset == RAM_ADDR_MAX) {
1015 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1016 (uint64_t)size);
1017 abort();
1018 }
1019
Alex Williamson04b16652010-07-02 11:13:17 -06001020 return offset;
1021}
1022
Juan Quintela652d7ec2012-07-20 10:37:54 +02001023ram_addr_t last_ram_offset(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001024{
Alex Williamsond17b5282010-06-25 11:08:38 -06001025 RAMBlock *block;
1026 ram_addr_t last = 0;
1027
Paolo Bonzinia3161032012-11-14 15:54:48 +01001028 QTAILQ_FOREACH(block, &ram_list.blocks, next)
Alex Williamsond17b5282010-06-25 11:08:38 -06001029 last = MAX(last, block->offset + block->length);
1030
1031 return last;
1032}
1033
Jason Baronddb97f12012-08-02 15:44:16 -04001034static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1035{
1036 int ret;
Jason Baronddb97f12012-08-02 15:44:16 -04001037
1038 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
Markus Armbruster2ff3de62013-07-04 15:09:22 +02001039 if (!qemu_opt_get_bool(qemu_get_machine_opts(),
1040 "dump-guest-core", true)) {
Jason Baronddb97f12012-08-02 15:44:16 -04001041 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1042 if (ret) {
1043 perror("qemu_madvise");
1044 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1045 "but dump_guest_core=off specified\n");
1046 }
1047 }
1048}
1049
Avi Kivityc5705a72011-12-20 15:59:12 +02001050void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev)
Cam Macdonell84b89d72010-07-26 18:10:57 -06001051{
1052 RAMBlock *new_block, *block;
1053
Avi Kivityc5705a72011-12-20 15:59:12 +02001054 new_block = NULL;
Paolo Bonzinia3161032012-11-14 15:54:48 +01001055 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Avi Kivityc5705a72011-12-20 15:59:12 +02001056 if (block->offset == addr) {
1057 new_block = block;
1058 break;
1059 }
1060 }
1061 assert(new_block);
1062 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001063
Anthony Liguori09e5ab62012-02-03 12:28:43 -06001064 if (dev) {
1065 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001066 if (id) {
1067 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05001068 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001069 }
1070 }
1071 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1072
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001073 /* This assumes the iothread lock is taken here too. */
1074 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001075 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Avi Kivityc5705a72011-12-20 15:59:12 +02001076 if (block != new_block && !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06001077 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1078 new_block->idstr);
1079 abort();
1080 }
1081 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001082 qemu_mutex_unlock_ramlist();
Avi Kivityc5705a72011-12-20 15:59:12 +02001083}
1084
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001085static int memory_try_enable_merging(void *addr, size_t len)
1086{
Markus Armbruster2ff3de62013-07-04 15:09:22 +02001087 if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) {
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001088 /* disabled by the user */
1089 return 0;
1090 }
1091
1092 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1093}
1094
Avi Kivityc5705a72011-12-20 15:59:12 +02001095ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
1096 MemoryRegion *mr)
1097{
Paolo Bonziniabb26d62012-11-14 16:00:51 +01001098 RAMBlock *block, *new_block;
Avi Kivityc5705a72011-12-20 15:59:12 +02001099
1100 size = TARGET_PAGE_ALIGN(size);
1101 new_block = g_malloc0(sizeof(*new_block));
Markus Armbruster3435f392013-07-31 15:11:07 +02001102 new_block->fd = -1;
Cam Macdonell84b89d72010-07-26 18:10:57 -06001103
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001104 /* This assumes the iothread lock is taken here too. */
1105 qemu_mutex_lock_ramlist();
Avi Kivity7c637362011-12-21 13:09:49 +02001106 new_block->mr = mr;
Jun Nakajima432d2682010-08-31 16:41:25 +01001107 new_block->offset = find_ram_offset(size);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001108 if (host) {
1109 new_block->host = host;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001110 new_block->flags |= RAM_PREALLOC_MASK;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02001111 } else if (xen_enabled()) {
1112 if (mem_path) {
1113 fprintf(stderr, "-mem-path not supported with Xen\n");
1114 exit(1);
1115 }
1116 xen_ram_alloc(new_block->offset, size, mr);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001117 } else {
1118 if (mem_path) {
1119#if defined (__linux__) && !defined(TARGET_S390X)
1120 new_block->host = file_ram_alloc(new_block, size, mem_path);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001121#else
1122 fprintf(stderr, "-mem-path option unsupported\n");
1123 exit(1);
1124#endif
Markus Armbruster0628c182013-07-31 15:11:06 +02001125 }
1126 if (!new_block->host) {
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02001127 if (kvm_enabled()) {
Christian Borntraegerfdec9912012-06-15 05:10:30 +00001128 /* some s390/kvm configurations have special constraints */
Paolo Bonzini6eebf952013-05-13 16:19:55 +02001129 new_block->host = kvm_ram_alloc(size);
Jun Nakajima432d2682010-08-31 16:41:25 +01001130 } else {
Paolo Bonzini6eebf952013-05-13 16:19:55 +02001131 new_block->host = qemu_anon_ram_alloc(size);
Jun Nakajima432d2682010-08-31 16:41:25 +01001132 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001133 memory_try_enable_merging(new_block->host, size);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001134 }
1135 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06001136 new_block->length = size;
1137
Paolo Bonziniabb26d62012-11-14 16:00:51 +01001138 /* Keep the list sorted from biggest to smallest block. */
1139 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
1140 if (block->length < new_block->length) {
1141 break;
1142 }
1143 }
1144 if (block) {
1145 QTAILQ_INSERT_BEFORE(block, new_block, next);
1146 } else {
1147 QTAILQ_INSERT_TAIL(&ram_list.blocks, new_block, next);
1148 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001149 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06001150
Umesh Deshpandef798b072011-08-18 11:41:17 -07001151 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001152 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07001153
Anthony Liguori7267c092011-08-20 22:09:37 -05001154 ram_list.phys_dirty = g_realloc(ram_list.phys_dirty,
Cam Macdonell84b89d72010-07-26 18:10:57 -06001155 last_ram_offset() >> TARGET_PAGE_BITS);
Igor Mitsyanko5fda0432012-08-10 18:45:11 +04001156 memset(ram_list.phys_dirty + (new_block->offset >> TARGET_PAGE_BITS),
1157 0, size >> TARGET_PAGE_BITS);
Juan Quintela1720aee2012-06-22 13:14:17 +02001158 cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001159
Jason Baronddb97f12012-08-02 15:44:16 -04001160 qemu_ram_setup_dump(new_block->host, size);
Luiz Capitulinoad0b5322012-10-05 16:47:57 -03001161 qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE);
Jason Baronddb97f12012-08-02 15:44:16 -04001162
Cam Macdonell84b89d72010-07-26 18:10:57 -06001163 if (kvm_enabled())
1164 kvm_setup_guest_memory(new_block->host, size);
1165
1166 return new_block->offset;
1167}
1168
Avi Kivityc5705a72011-12-20 15:59:12 +02001169ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr)
pbrook94a6b542009-04-11 17:15:54 +00001170{
Avi Kivityc5705a72011-12-20 15:59:12 +02001171 return qemu_ram_alloc_from_ptr(size, NULL, mr);
pbrook94a6b542009-04-11 17:15:54 +00001172}
bellarde9a1ab12007-02-08 23:08:38 +00001173
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001174void qemu_ram_free_from_ptr(ram_addr_t addr)
1175{
1176 RAMBlock *block;
1177
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001178 /* This assumes the iothread lock is taken here too. */
1179 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001180 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001181 if (addr == block->offset) {
Paolo Bonzinia3161032012-11-14 15:54:48 +01001182 QTAILQ_REMOVE(&ram_list.blocks, block, next);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001183 ram_list.mru_block = NULL;
Umesh Deshpandef798b072011-08-18 11:41:17 -07001184 ram_list.version++;
Anthony Liguori7267c092011-08-20 22:09:37 -05001185 g_free(block);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001186 break;
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001187 }
1188 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001189 qemu_mutex_unlock_ramlist();
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001190}
1191
Anthony Liguoric227f092009-10-01 16:12:16 -05001192void qemu_ram_free(ram_addr_t addr)
bellarde9a1ab12007-02-08 23:08:38 +00001193{
Alex Williamson04b16652010-07-02 11:13:17 -06001194 RAMBlock *block;
1195
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001196 /* This assumes the iothread lock is taken here too. */
1197 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001198 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamson04b16652010-07-02 11:13:17 -06001199 if (addr == block->offset) {
Paolo Bonzinia3161032012-11-14 15:54:48 +01001200 QTAILQ_REMOVE(&ram_list.blocks, block, next);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001201 ram_list.mru_block = NULL;
Umesh Deshpandef798b072011-08-18 11:41:17 -07001202 ram_list.version++;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001203 if (block->flags & RAM_PREALLOC_MASK) {
1204 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02001205 } else if (xen_enabled()) {
1206 xen_invalidate_map_cache_entry(block->host);
Markus Armbruster3435f392013-07-31 15:11:07 +02001207 } else if (block->fd >= 0) {
1208 munmap(block->host, block->length);
1209 close(block->fd);
Alex Williamson04b16652010-07-02 11:13:17 -06001210 } else {
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02001211 qemu_anon_ram_free(block->host, block->length);
Alex Williamson04b16652010-07-02 11:13:17 -06001212 }
Anthony Liguori7267c092011-08-20 22:09:37 -05001213 g_free(block);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001214 break;
Alex Williamson04b16652010-07-02 11:13:17 -06001215 }
1216 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001217 qemu_mutex_unlock_ramlist();
Alex Williamson04b16652010-07-02 11:13:17 -06001218
bellarde9a1ab12007-02-08 23:08:38 +00001219}
1220
Huang Yingcd19cfa2011-03-02 08:56:19 +01001221#ifndef _WIN32
1222void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
1223{
1224 RAMBlock *block;
1225 ram_addr_t offset;
1226 int flags;
1227 void *area, *vaddr;
1228
Paolo Bonzinia3161032012-11-14 15:54:48 +01001229 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01001230 offset = addr - block->offset;
1231 if (offset < block->length) {
1232 vaddr = block->host + offset;
1233 if (block->flags & RAM_PREALLOC_MASK) {
1234 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02001235 } else if (xen_enabled()) {
1236 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01001237 } else {
1238 flags = MAP_FIXED;
1239 munmap(vaddr, length);
Markus Armbruster3435f392013-07-31 15:11:07 +02001240 if (block->fd >= 0) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01001241#ifdef MAP_POPULATE
Markus Armbruster3435f392013-07-31 15:11:07 +02001242 flags |= mem_prealloc ? MAP_POPULATE | MAP_SHARED :
1243 MAP_PRIVATE;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001244#else
Markus Armbruster3435f392013-07-31 15:11:07 +02001245 flags |= MAP_PRIVATE;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001246#endif
Markus Armbruster3435f392013-07-31 15:11:07 +02001247 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1248 flags, block->fd, offset);
Huang Yingcd19cfa2011-03-02 08:56:19 +01001249 } else {
1250#if defined(TARGET_S390X) && defined(CONFIG_KVM)
1251 flags |= MAP_SHARED | MAP_ANONYMOUS;
1252 area = mmap(vaddr, length, PROT_EXEC|PROT_READ|PROT_WRITE,
1253 flags, -1, 0);
1254#else
1255 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
1256 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1257 flags, -1, 0);
1258#endif
1259 }
1260 if (area != vaddr) {
Anthony PERARDf15fbc42011-07-20 08:17:42 +00001261 fprintf(stderr, "Could not remap addr: "
1262 RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n",
Huang Yingcd19cfa2011-03-02 08:56:19 +01001263 length, addr);
1264 exit(1);
1265 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001266 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04001267 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01001268 }
1269 return;
1270 }
1271 }
1272}
1273#endif /* !_WIN32 */
1274
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001275static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
pbrookdc828ca2009-04-09 22:21:07 +00001276{
pbrook94a6b542009-04-11 17:15:54 +00001277 RAMBlock *block;
1278
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001279 /* The list is protected by the iothread lock here. */
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001280 block = ram_list.mru_block;
1281 if (block && addr - block->offset < block->length) {
1282 goto found;
1283 }
Paolo Bonzinia3161032012-11-14 15:54:48 +01001284 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamsonf471a172010-06-11 11:11:42 -06001285 if (addr - block->offset < block->length) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001286 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06001287 }
pbrook94a6b542009-04-11 17:15:54 +00001288 }
Alex Williamsonf471a172010-06-11 11:11:42 -06001289
1290 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1291 abort();
1292
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001293found:
1294 ram_list.mru_block = block;
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001295 return block;
1296}
1297
1298/* Return a host pointer to ram allocated with qemu_ram_alloc.
1299 With the exception of the softmmu code in this file, this should
1300 only be used for local memory (e.g. video ram) that the device owns,
1301 and knows it isn't going to access beyond the end of the block.
1302
1303 It should not be used for general purpose DMA.
1304 Use cpu_physical_memory_map/cpu_physical_memory_rw instead.
1305 */
1306void *qemu_get_ram_ptr(ram_addr_t addr)
1307{
1308 RAMBlock *block = qemu_get_ram_block(addr);
1309
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001310 if (xen_enabled()) {
1311 /* We need to check if the requested address is in the RAM
1312 * because we don't want to map the entire memory in QEMU.
1313 * In that case just map until the end of the page.
1314 */
1315 if (block->offset == 0) {
1316 return xen_map_cache(addr, 0, 0);
1317 } else if (block->host == NULL) {
1318 block->host =
1319 xen_map_cache(block->offset, block->length, 1);
1320 }
1321 }
1322 return block->host + (addr - block->offset);
pbrookdc828ca2009-04-09 22:21:07 +00001323}
1324
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001325/* Return a host pointer to ram allocated with qemu_ram_alloc. Same as
1326 * qemu_get_ram_ptr but do not touch ram_list.mru_block.
1327 *
1328 * ??? Is this still necessary?
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001329 */
Blue Swirl8b9c99d2012-10-28 11:04:51 +00001330static void *qemu_safe_ram_ptr(ram_addr_t addr)
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001331{
1332 RAMBlock *block;
1333
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001334 /* The list is protected by the iothread lock here. */
Paolo Bonzinia3161032012-11-14 15:54:48 +01001335 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001336 if (addr - block->offset < block->length) {
Jan Kiszka868bb332011-06-21 22:59:09 +02001337 if (xen_enabled()) {
Jun Nakajima432d2682010-08-31 16:41:25 +01001338 /* We need to check if the requested address is in the RAM
1339 * because we don't want to map the entire memory in QEMU.
Stefano Stabellini712c2b42011-05-19 18:35:46 +01001340 * In that case just map until the end of the page.
Jun Nakajima432d2682010-08-31 16:41:25 +01001341 */
1342 if (block->offset == 0) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001343 return xen_map_cache(addr, 0, 0);
Jun Nakajima432d2682010-08-31 16:41:25 +01001344 } else if (block->host == NULL) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001345 block->host =
1346 xen_map_cache(block->offset, block->length, 1);
Jun Nakajima432d2682010-08-31 16:41:25 +01001347 }
1348 }
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001349 return block->host + (addr - block->offset);
1350 }
1351 }
1352
1353 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1354 abort();
1355
1356 return NULL;
1357}
1358
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001359/* Return a host pointer to guest's ram. Similar to qemu_get_ram_ptr
1360 * but takes a size argument */
Peter Maydellcb85f7a2013-07-08 09:44:04 +01001361static void *qemu_ram_ptr_length(ram_addr_t addr, hwaddr *size)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001362{
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01001363 if (*size == 0) {
1364 return NULL;
1365 }
Jan Kiszka868bb332011-06-21 22:59:09 +02001366 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001367 return xen_map_cache(addr, *size, 1);
Jan Kiszka868bb332011-06-21 22:59:09 +02001368 } else {
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001369 RAMBlock *block;
1370
Paolo Bonzinia3161032012-11-14 15:54:48 +01001371 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001372 if (addr - block->offset < block->length) {
1373 if (addr - block->offset + *size > block->length)
1374 *size = block->length - addr + block->offset;
1375 return block->host + (addr - block->offset);
1376 }
1377 }
1378
1379 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1380 abort();
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001381 }
1382}
1383
Paolo Bonzini7443b432013-06-03 12:44:02 +02001384/* Some of the softmmu routines need to translate from a host pointer
1385 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001386MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
pbrook5579c7f2009-04-11 14:47:08 +00001387{
pbrook94a6b542009-04-11 17:15:54 +00001388 RAMBlock *block;
1389 uint8_t *host = ptr;
1390
Jan Kiszka868bb332011-06-21 22:59:09 +02001391 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001392 *ram_addr = xen_ram_addr_from_mapcache(ptr);
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001393 return qemu_get_ram_block(*ram_addr)->mr;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01001394 }
1395
Paolo Bonzini23887b72013-05-06 14:28:39 +02001396 block = ram_list.mru_block;
1397 if (block && block->host && host - block->host < block->length) {
1398 goto found;
1399 }
1400
Paolo Bonzinia3161032012-11-14 15:54:48 +01001401 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Jun Nakajima432d2682010-08-31 16:41:25 +01001402 /* This case append when the block is not mapped. */
1403 if (block->host == NULL) {
1404 continue;
1405 }
Alex Williamsonf471a172010-06-11 11:11:42 -06001406 if (host - block->host < block->length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02001407 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06001408 }
pbrook94a6b542009-04-11 17:15:54 +00001409 }
Jun Nakajima432d2682010-08-31 16:41:25 +01001410
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001411 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02001412
1413found:
1414 *ram_addr = block->offset + (host - block->host);
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001415 return block->mr;
Marcelo Tosattie8902612010-10-11 15:31:19 -03001416}
Alex Williamsonf471a172010-06-11 11:11:42 -06001417
Avi Kivitya8170e52012-10-23 12:30:10 +02001418static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001419 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00001420{
bellard3a7d9292005-08-21 09:26:42 +00001421 int dirty_flags;
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001422 dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr);
bellard3a7d9292005-08-21 09:26:42 +00001423 if (!(dirty_flags & CODE_DIRTY_FLAG)) {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001424 tb_invalidate_phys_page_fast(ram_addr, size);
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001425 dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr);
bellard3a7d9292005-08-21 09:26:42 +00001426 }
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001427 switch (size) {
1428 case 1:
1429 stb_p(qemu_get_ram_ptr(ram_addr), val);
1430 break;
1431 case 2:
1432 stw_p(qemu_get_ram_ptr(ram_addr), val);
1433 break;
1434 case 4:
1435 stl_p(qemu_get_ram_ptr(ram_addr), val);
1436 break;
1437 default:
1438 abort();
1439 }
bellardf23db162005-08-21 19:12:28 +00001440 dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001441 cpu_physical_memory_set_dirty_flags(ram_addr, dirty_flags);
bellardf23db162005-08-21 19:12:28 +00001442 /* we remove the notdirty callback only if the code has been
1443 flushed */
Andreas Färber4917cf42013-05-27 05:17:50 +02001444 if (dirty_flags == 0xff) {
1445 CPUArchState *env = current_cpu->env_ptr;
1446 tlb_set_dirty(env, env->mem_io_vaddr);
1447 }
bellard1ccde1c2004-02-06 19:46:14 +00001448}
1449
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02001450static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
1451 unsigned size, bool is_write)
1452{
1453 return is_write;
1454}
1455
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001456static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001457 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02001458 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001459 .endianness = DEVICE_NATIVE_ENDIAN,
bellard1ccde1c2004-02-06 19:46:14 +00001460};
1461
pbrook0f459d12008-06-09 00:20:13 +00001462/* Generate a debug exception if a watchpoint has been hit. */
aliguorib4051332008-11-18 20:14:20 +00001463static void check_watchpoint(int offset, int len_mask, int flags)
pbrook0f459d12008-06-09 00:20:13 +00001464{
Andreas Färber4917cf42013-05-27 05:17:50 +02001465 CPUArchState *env = current_cpu->env_ptr;
aliguori06d55cc2008-11-18 20:24:06 +00001466 target_ulong pc, cs_base;
pbrook0f459d12008-06-09 00:20:13 +00001467 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00001468 CPUWatchpoint *wp;
aliguori06d55cc2008-11-18 20:24:06 +00001469 int cpu_flags;
pbrook0f459d12008-06-09 00:20:13 +00001470
aliguori06d55cc2008-11-18 20:24:06 +00001471 if (env->watchpoint_hit) {
1472 /* We re-entered the check after replacing the TB. Now raise
1473 * the debug interrupt so that is will trigger after the
1474 * current instruction. */
Andreas Färberc3affe52013-01-18 15:03:43 +01001475 cpu_interrupt(ENV_GET_CPU(env), CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00001476 return;
1477 }
pbrook2e70f6e2008-06-29 01:03:05 +00001478 vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Blue Swirl72cf2d42009-09-12 07:36:22 +00001479 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguorib4051332008-11-18 20:14:20 +00001480 if ((vaddr == (wp->vaddr & len_mask) ||
1481 (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) {
aliguori6e140f22008-11-18 20:37:55 +00001482 wp->flags |= BP_WATCHPOINT_HIT;
1483 if (!env->watchpoint_hit) {
1484 env->watchpoint_hit = wp;
Blue Swirl5a316522012-12-02 21:28:09 +00001485 tb_check_watchpoint(env);
aliguori6e140f22008-11-18 20:37:55 +00001486 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
1487 env->exception_index = EXCP_DEBUG;
Max Filippov488d6572012-01-29 02:24:39 +04001488 cpu_loop_exit(env);
aliguori6e140f22008-11-18 20:37:55 +00001489 } else {
1490 cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
1491 tb_gen_code(env, pc, cs_base, cpu_flags, 1);
Max Filippov488d6572012-01-29 02:24:39 +04001492 cpu_resume_from_signal(env, NULL);
aliguori6e140f22008-11-18 20:37:55 +00001493 }
aliguori06d55cc2008-11-18 20:24:06 +00001494 }
aliguori6e140f22008-11-18 20:37:55 +00001495 } else {
1496 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00001497 }
1498 }
1499}
1500
pbrook6658ffb2007-03-16 23:58:11 +00001501/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
1502 so these check for a hit then pass through to the normal out-of-line
1503 phys routines. */
Avi Kivitya8170e52012-10-23 12:30:10 +02001504static uint64_t watch_mem_read(void *opaque, hwaddr addr,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001505 unsigned size)
pbrook6658ffb2007-03-16 23:58:11 +00001506{
Avi Kivity1ec9b902012-01-02 12:47:48 +02001507 check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ);
1508 switch (size) {
1509 case 1: return ldub_phys(addr);
1510 case 2: return lduw_phys(addr);
1511 case 4: return ldl_phys(addr);
1512 default: abort();
1513 }
pbrook6658ffb2007-03-16 23:58:11 +00001514}
1515
Avi Kivitya8170e52012-10-23 12:30:10 +02001516static void watch_mem_write(void *opaque, hwaddr addr,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001517 uint64_t val, unsigned size)
pbrook6658ffb2007-03-16 23:58:11 +00001518{
Avi Kivity1ec9b902012-01-02 12:47:48 +02001519 check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_WRITE);
1520 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04001521 case 1:
1522 stb_phys(addr, val);
1523 break;
1524 case 2:
1525 stw_phys(addr, val);
1526 break;
1527 case 4:
1528 stl_phys(addr, val);
1529 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02001530 default: abort();
1531 }
pbrook6658ffb2007-03-16 23:58:11 +00001532}
1533
Avi Kivity1ec9b902012-01-02 12:47:48 +02001534static const MemoryRegionOps watch_mem_ops = {
1535 .read = watch_mem_read,
1536 .write = watch_mem_write,
1537 .endianness = DEVICE_NATIVE_ENDIAN,
pbrook6658ffb2007-03-16 23:58:11 +00001538};
pbrook6658ffb2007-03-16 23:58:11 +00001539
Avi Kivitya8170e52012-10-23 12:30:10 +02001540static uint64_t subpage_read(void *opaque, hwaddr addr,
Avi Kivity70c68e42012-01-02 12:32:48 +02001541 unsigned len)
blueswir1db7b5422007-05-26 17:36:03 +00001542{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001543 subpage_t *subpage = opaque;
1544 uint8_t buf[4];
Paolo Bonzini791af8c2013-05-24 16:10:39 +02001545
blueswir1db7b5422007-05-26 17:36:03 +00001546#if defined(DEBUG_SUBPAGE)
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001547 printf("%s: subpage %p len %d addr " TARGET_FMT_plx "\n", __func__,
1548 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00001549#endif
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001550 address_space_read(subpage->as, addr + subpage->base, buf, len);
1551 switch (len) {
1552 case 1:
1553 return ldub_p(buf);
1554 case 2:
1555 return lduw_p(buf);
1556 case 4:
1557 return ldl_p(buf);
1558 default:
1559 abort();
1560 }
blueswir1db7b5422007-05-26 17:36:03 +00001561}
1562
Avi Kivitya8170e52012-10-23 12:30:10 +02001563static void subpage_write(void *opaque, hwaddr addr,
Avi Kivity70c68e42012-01-02 12:32:48 +02001564 uint64_t value, unsigned len)
blueswir1db7b5422007-05-26 17:36:03 +00001565{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001566 subpage_t *subpage = opaque;
1567 uint8_t buf[4];
1568
blueswir1db7b5422007-05-26 17:36:03 +00001569#if defined(DEBUG_SUBPAGE)
Avi Kivity70c68e42012-01-02 12:32:48 +02001570 printf("%s: subpage %p len %d addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001571 " value %"PRIx64"\n",
1572 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00001573#endif
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001574 switch (len) {
1575 case 1:
1576 stb_p(buf, value);
1577 break;
1578 case 2:
1579 stw_p(buf, value);
1580 break;
1581 case 4:
1582 stl_p(buf, value);
1583 break;
1584 default:
1585 abort();
1586 }
1587 address_space_write(subpage->as, addr + subpage->base, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00001588}
1589
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001590static bool subpage_accepts(void *opaque, hwaddr addr,
1591 unsigned size, bool is_write)
1592{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001593 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001594#if defined(DEBUG_SUBPAGE)
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001595 printf("%s: subpage %p %c len %d addr " TARGET_FMT_plx "\n",
1596 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001597#endif
1598
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001599 return address_space_access_valid(subpage->as, addr + subpage->base,
1600 size, is_write);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001601}
1602
Avi Kivity70c68e42012-01-02 12:32:48 +02001603static const MemoryRegionOps subpage_ops = {
1604 .read = subpage_read,
1605 .write = subpage_write,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001606 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02001607 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00001608};
1609
Anthony Liguoric227f092009-10-01 16:12:16 -05001610static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001611 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00001612{
1613 int idx, eidx;
1614
1615 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
1616 return -1;
1617 idx = SUBPAGE_IDX(start);
1618 eidx = SUBPAGE_IDX(end);
1619#if defined(DEBUG_SUBPAGE)
Blue Swirl0bf9e312009-07-20 17:19:25 +00001620 printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__,
blueswir1db7b5422007-05-26 17:36:03 +00001621 mmio, start, end, idx, eidx, memory);
1622#endif
blueswir1db7b5422007-05-26 17:36:03 +00001623 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02001624 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00001625 }
1626
1627 return 0;
1628}
1629
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001630static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00001631{
Anthony Liguoric227f092009-10-01 16:12:16 -05001632 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00001633
Anthony Liguori7267c092011-08-20 22:09:37 -05001634 mmio = g_malloc0(sizeof(subpage_t));
aliguori1eec6142009-02-05 22:06:18 +00001635
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001636 mmio->as = as;
aliguori1eec6142009-02-05 22:06:18 +00001637 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001638 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Avi Kivity70c68e42012-01-02 12:32:48 +02001639 "subpage", TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02001640 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00001641#if defined(DEBUG_SUBPAGE)
aliguori1eec6142009-02-05 22:06:18 +00001642 printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,
1643 mmio, base, TARGET_PAGE_SIZE, subpage_memory);
blueswir1db7b5422007-05-26 17:36:03 +00001644#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001645 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00001646
1647 return mmio;
1648}
1649
Avi Kivity5312bd82012-02-12 18:32:55 +02001650static uint16_t dummy_section(MemoryRegion *mr)
1651{
1652 MemoryRegionSection section = {
1653 .mr = mr,
1654 .offset_within_address_space = 0,
1655 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001656 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02001657 };
1658
1659 return phys_section_add(&section);
1660}
1661
Avi Kivitya8170e52012-10-23 12:30:10 +02001662MemoryRegion *iotlb_to_region(hwaddr index)
Avi Kivityaa102232012-03-08 17:06:55 +02001663{
Paolo Bonzini0475d942013-05-29 12:28:21 +02001664 return address_space_memory.dispatch->sections[index & ~TARGET_PAGE_MASK].mr;
Avi Kivityaa102232012-03-08 17:06:55 +02001665}
1666
Avi Kivitye9179ce2009-06-14 11:38:52 +03001667static void io_mem_init(void)
1668{
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001669 memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX);
1670 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001671 "unassigned", UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001672 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001673 "notdirty", UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001674 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001675 "watch", UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03001676}
1677
Avi Kivityac1970f2012-10-03 16:22:53 +02001678static void mem_begin(MemoryListener *listener)
1679{
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001680 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini00752702013-05-29 12:13:54 +02001681 AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1);
1682
1683 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 };
1684 d->as = as;
1685 as->next_dispatch = d;
1686}
1687
1688static void mem_commit(MemoryListener *listener)
1689{
1690 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini0475d942013-05-29 12:28:21 +02001691 AddressSpaceDispatch *cur = as->dispatch;
1692 AddressSpaceDispatch *next = as->next_dispatch;
Avi Kivityac1970f2012-10-03 16:22:53 +02001693
Paolo Bonzini0475d942013-05-29 12:28:21 +02001694 next->nodes = next_map.nodes;
1695 next->sections = next_map.sections;
1696
1697 as->dispatch = next;
1698 g_free(cur);
Avi Kivityac1970f2012-10-03 16:22:53 +02001699}
1700
Avi Kivity50c1e142012-02-08 21:36:02 +02001701static void core_begin(MemoryListener *listener)
1702{
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001703 uint16_t n;
1704
Paolo Bonzini60926662013-05-29 12:30:26 +02001705 prev_map = g_new(PhysPageMap, 1);
1706 *prev_map = next_map;
1707
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001708 memset(&next_map, 0, sizeof(next_map));
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001709 n = dummy_section(&io_mem_unassigned);
1710 assert(n == PHYS_SECTION_UNASSIGNED);
1711 n = dummy_section(&io_mem_notdirty);
1712 assert(n == PHYS_SECTION_NOTDIRTY);
1713 n = dummy_section(&io_mem_rom);
1714 assert(n == PHYS_SECTION_ROM);
1715 n = dummy_section(&io_mem_watch);
1716 assert(n == PHYS_SECTION_WATCH);
Avi Kivity50c1e142012-02-08 21:36:02 +02001717}
1718
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001719/* This listener's commit run after the other AddressSpaceDispatch listeners'.
1720 * All AddressSpaceDispatch instances have switched to the next map.
1721 */
1722static void core_commit(MemoryListener *listener)
1723{
Paolo Bonzini60926662013-05-29 12:30:26 +02001724 phys_sections_free(prev_map);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001725}
1726
Avi Kivity1d711482012-10-02 18:54:45 +02001727static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02001728{
Andreas Färber182735e2013-05-29 22:29:20 +02001729 CPUState *cpu;
Avi Kivity117712c2012-02-12 21:23:17 +02001730
1731 /* since each CPU stores ram addresses in its TLB cache, we must
1732 reset the modified entries */
1733 /* XXX: slow ! */
Andreas Färberbdc44642013-06-24 23:50:24 +02001734 CPU_FOREACH(cpu) {
Andreas Färber182735e2013-05-29 22:29:20 +02001735 CPUArchState *env = cpu->env_ptr;
1736
Avi Kivity117712c2012-02-12 21:23:17 +02001737 tlb_flush(env, 1);
1738 }
Avi Kivity50c1e142012-02-08 21:36:02 +02001739}
1740
Avi Kivity93632742012-02-08 16:54:16 +02001741static void core_log_global_start(MemoryListener *listener)
1742{
1743 cpu_physical_memory_set_dirty_tracking(1);
1744}
1745
1746static void core_log_global_stop(MemoryListener *listener)
1747{
1748 cpu_physical_memory_set_dirty_tracking(0);
1749}
1750
Avi Kivity93632742012-02-08 16:54:16 +02001751static MemoryListener core_memory_listener = {
Avi Kivity50c1e142012-02-08 21:36:02 +02001752 .begin = core_begin,
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001753 .commit = core_commit,
Avi Kivity93632742012-02-08 16:54:16 +02001754 .log_global_start = core_log_global_start,
1755 .log_global_stop = core_log_global_stop,
Avi Kivityac1970f2012-10-03 16:22:53 +02001756 .priority = 1,
Avi Kivity93632742012-02-08 16:54:16 +02001757};
1758
Avi Kivity1d711482012-10-02 18:54:45 +02001759static MemoryListener tcg_memory_listener = {
1760 .commit = tcg_commit,
1761};
1762
Avi Kivityac1970f2012-10-03 16:22:53 +02001763void address_space_init_dispatch(AddressSpace *as)
1764{
Paolo Bonzini00752702013-05-29 12:13:54 +02001765 as->dispatch = NULL;
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001766 as->dispatch_listener = (MemoryListener) {
Avi Kivityac1970f2012-10-03 16:22:53 +02001767 .begin = mem_begin,
Paolo Bonzini00752702013-05-29 12:13:54 +02001768 .commit = mem_commit,
Avi Kivityac1970f2012-10-03 16:22:53 +02001769 .region_add = mem_add,
1770 .region_nop = mem_add,
1771 .priority = 0,
1772 };
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001773 memory_listener_register(&as->dispatch_listener, as);
Avi Kivityac1970f2012-10-03 16:22:53 +02001774}
1775
Avi Kivity83f3c252012-10-07 12:59:55 +02001776void address_space_destroy_dispatch(AddressSpace *as)
1777{
1778 AddressSpaceDispatch *d = as->dispatch;
1779
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001780 memory_listener_unregister(&as->dispatch_listener);
Avi Kivity83f3c252012-10-07 12:59:55 +02001781 g_free(d);
1782 as->dispatch = NULL;
1783}
1784
Avi Kivity62152b82011-07-26 14:26:14 +03001785static void memory_map_init(void)
1786{
Anthony Liguori7267c092011-08-20 22:09:37 -05001787 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001788 memory_region_init(system_memory, NULL, "system", INT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00001789 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03001790
Anthony Liguori7267c092011-08-20 22:09:37 -05001791 system_io = g_malloc(sizeof(*system_io));
Jan Kiszka3bb28b72013-09-02 18:43:30 +02001792 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
1793 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00001794 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity93632742012-02-08 16:54:16 +02001795
Avi Kivityf6790af2012-10-02 20:13:51 +02001796 memory_listener_register(&core_memory_listener, &address_space_memory);
liguang26416892013-09-04 14:37:33 +08001797 if (tcg_enabled()) {
1798 memory_listener_register(&tcg_memory_listener, &address_space_memory);
1799 }
Avi Kivity62152b82011-07-26 14:26:14 +03001800}
1801
1802MemoryRegion *get_system_memory(void)
1803{
1804 return system_memory;
1805}
1806
Avi Kivity309cb472011-08-08 16:09:03 +03001807MemoryRegion *get_system_io(void)
1808{
1809 return system_io;
1810}
1811
pbrooke2eef172008-06-08 01:09:01 +00001812#endif /* !defined(CONFIG_USER_ONLY) */
1813
bellard13eb76e2004-01-24 15:23:36 +00001814/* physical memory access (slow version, mainly for debug) */
1815#if defined(CONFIG_USER_ONLY)
Andreas Färberf17ec442013-06-29 19:40:58 +02001816int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Paul Brooka68fe892010-03-01 00:08:59 +00001817 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00001818{
1819 int l, flags;
1820 target_ulong page;
pbrook53a59602006-03-25 19:31:22 +00001821 void * p;
bellard13eb76e2004-01-24 15:23:36 +00001822
1823 while (len > 0) {
1824 page = addr & TARGET_PAGE_MASK;
1825 l = (page + TARGET_PAGE_SIZE) - addr;
1826 if (l > len)
1827 l = len;
1828 flags = page_get_flags(page);
1829 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00001830 return -1;
bellard13eb76e2004-01-24 15:23:36 +00001831 if (is_write) {
1832 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00001833 return -1;
bellard579a97f2007-11-11 14:26:47 +00001834 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00001835 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00001836 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00001837 memcpy(p, buf, l);
1838 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00001839 } else {
1840 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00001841 return -1;
bellard579a97f2007-11-11 14:26:47 +00001842 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00001843 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00001844 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00001845 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00001846 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00001847 }
1848 len -= l;
1849 buf += l;
1850 addr += l;
1851 }
Paul Brooka68fe892010-03-01 00:08:59 +00001852 return 0;
bellard13eb76e2004-01-24 15:23:36 +00001853}
bellard8df1cd02005-01-28 22:37:22 +00001854
bellard13eb76e2004-01-24 15:23:36 +00001855#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001856
Avi Kivitya8170e52012-10-23 12:30:10 +02001857static void invalidate_and_set_dirty(hwaddr addr,
1858 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001859{
1860 if (!cpu_physical_memory_is_dirty(addr)) {
1861 /* invalidate code */
1862 tb_invalidate_phys_page_range(addr, addr + length, 0);
1863 /* set dirty bit */
1864 cpu_physical_memory_set_dirty_flags(addr, (0xff & ~CODE_DIRTY_FLAG));
1865 }
Anthony PERARDe2269392012-10-03 13:49:22 +00001866 xen_modified_memory(addr, length);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001867}
1868
Paolo Bonzini2bbfa052013-05-24 12:29:54 +02001869static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
1870{
1871 if (memory_region_is_ram(mr)) {
1872 return !(is_write && mr->readonly);
1873 }
1874 if (memory_region_is_romd(mr)) {
1875 return !is_write;
1876 }
1877
1878 return false;
1879}
1880
Richard Henderson23326162013-07-08 14:55:59 -07001881static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02001882{
Paolo Bonzinie1622f42013-07-17 13:17:41 +02001883 unsigned access_size_max = mr->ops->valid.max_access_size;
Richard Henderson23326162013-07-08 14:55:59 -07001884
1885 /* Regions are assumed to support 1-4 byte accesses unless
1886 otherwise specified. */
Richard Henderson23326162013-07-08 14:55:59 -07001887 if (access_size_max == 0) {
1888 access_size_max = 4;
Paolo Bonzini82f25632013-05-24 11:59:43 +02001889 }
Richard Henderson23326162013-07-08 14:55:59 -07001890
1891 /* Bound the maximum access by the alignment of the address. */
1892 if (!mr->ops->impl.unaligned) {
1893 unsigned align_size_max = addr & -addr;
1894 if (align_size_max != 0 && align_size_max < access_size_max) {
1895 access_size_max = align_size_max;
1896 }
1897 }
1898
1899 /* Don't attempt accesses larger than the maximum. */
1900 if (l > access_size_max) {
1901 l = access_size_max;
1902 }
Paolo Bonzini098178f2013-07-29 14:27:39 +02001903 if (l & (l - 1)) {
1904 l = 1 << (qemu_fls(l) - 1);
1905 }
Richard Henderson23326162013-07-08 14:55:59 -07001906
1907 return l;
Paolo Bonzini82f25632013-05-24 11:59:43 +02001908}
1909
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001910bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02001911 int len, bool is_write)
bellard13eb76e2004-01-24 15:23:36 +00001912{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001913 hwaddr l;
bellard13eb76e2004-01-24 15:23:36 +00001914 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02001915 uint64_t val;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001916 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001917 MemoryRegion *mr;
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001918 bool error = false;
ths3b46e622007-09-17 08:09:54 +00001919
bellard13eb76e2004-01-24 15:23:36 +00001920 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001921 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001922 mr = address_space_translate(as, addr, &addr1, &l, is_write);
ths3b46e622007-09-17 08:09:54 +00001923
bellard13eb76e2004-01-24 15:23:36 +00001924 if (is_write) {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001925 if (!memory_access_is_direct(mr, is_write)) {
1926 l = memory_access_size(mr, l, addr1);
Andreas Färber4917cf42013-05-27 05:17:50 +02001927 /* XXX: could force current_cpu to NULL to avoid
bellard6a00d602005-11-21 23:25:50 +00001928 potential bugs */
Richard Henderson23326162013-07-08 14:55:59 -07001929 switch (l) {
1930 case 8:
1931 /* 64 bit write access */
1932 val = ldq_p(buf);
1933 error |= io_mem_write(mr, addr1, val, 8);
1934 break;
1935 case 4:
bellard1c213d12005-09-03 10:49:04 +00001936 /* 32 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001937 val = ldl_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001938 error |= io_mem_write(mr, addr1, val, 4);
Richard Henderson23326162013-07-08 14:55:59 -07001939 break;
1940 case 2:
bellard1c213d12005-09-03 10:49:04 +00001941 /* 16 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001942 val = lduw_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001943 error |= io_mem_write(mr, addr1, val, 2);
Richard Henderson23326162013-07-08 14:55:59 -07001944 break;
1945 case 1:
bellard1c213d12005-09-03 10:49:04 +00001946 /* 8 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001947 val = ldub_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001948 error |= io_mem_write(mr, addr1, val, 1);
Richard Henderson23326162013-07-08 14:55:59 -07001949 break;
1950 default:
1951 abort();
bellard13eb76e2004-01-24 15:23:36 +00001952 }
Paolo Bonzini2bbfa052013-05-24 12:29:54 +02001953 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001954 addr1 += memory_region_get_ram_addr(mr);
bellard13eb76e2004-01-24 15:23:36 +00001955 /* RAM case */
pbrook5579c7f2009-04-11 14:47:08 +00001956 ptr = qemu_get_ram_ptr(addr1);
bellard13eb76e2004-01-24 15:23:36 +00001957 memcpy(ptr, buf, l);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001958 invalidate_and_set_dirty(addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00001959 }
1960 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001961 if (!memory_access_is_direct(mr, is_write)) {
bellard13eb76e2004-01-24 15:23:36 +00001962 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001963 l = memory_access_size(mr, l, addr1);
Richard Henderson23326162013-07-08 14:55:59 -07001964 switch (l) {
1965 case 8:
1966 /* 64 bit read access */
1967 error |= io_mem_read(mr, addr1, &val, 8);
1968 stq_p(buf, val);
1969 break;
1970 case 4:
bellard13eb76e2004-01-24 15:23:36 +00001971 /* 32 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001972 error |= io_mem_read(mr, addr1, &val, 4);
bellardc27004e2005-01-03 23:35:10 +00001973 stl_p(buf, val);
Richard Henderson23326162013-07-08 14:55:59 -07001974 break;
1975 case 2:
bellard13eb76e2004-01-24 15:23:36 +00001976 /* 16 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001977 error |= io_mem_read(mr, addr1, &val, 2);
bellardc27004e2005-01-03 23:35:10 +00001978 stw_p(buf, val);
Richard Henderson23326162013-07-08 14:55:59 -07001979 break;
1980 case 1:
bellard1c213d12005-09-03 10:49:04 +00001981 /* 8 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001982 error |= io_mem_read(mr, addr1, &val, 1);
bellardc27004e2005-01-03 23:35:10 +00001983 stb_p(buf, val);
Richard Henderson23326162013-07-08 14:55:59 -07001984 break;
1985 default:
1986 abort();
bellard13eb76e2004-01-24 15:23:36 +00001987 }
1988 } else {
1989 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001990 ptr = qemu_get_ram_ptr(mr->ram_addr + addr1);
Avi Kivityf3705d52012-03-08 16:16:34 +02001991 memcpy(buf, ptr, l);
bellard13eb76e2004-01-24 15:23:36 +00001992 }
1993 }
1994 len -= l;
1995 buf += l;
1996 addr += l;
1997 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001998
1999 return error;
bellard13eb76e2004-01-24 15:23:36 +00002000}
bellard8df1cd02005-01-28 22:37:22 +00002001
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002002bool address_space_write(AddressSpace *as, hwaddr addr,
Avi Kivityac1970f2012-10-03 16:22:53 +02002003 const uint8_t *buf, int len)
2004{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002005 return address_space_rw(as, addr, (uint8_t *)buf, len, true);
Avi Kivityac1970f2012-10-03 16:22:53 +02002006}
2007
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002008bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
Avi Kivityac1970f2012-10-03 16:22:53 +02002009{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002010 return address_space_rw(as, addr, buf, len, false);
Avi Kivityac1970f2012-10-03 16:22:53 +02002011}
2012
2013
Avi Kivitya8170e52012-10-23 12:30:10 +02002014void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02002015 int len, int is_write)
2016{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002017 address_space_rw(&address_space_memory, addr, buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02002018}
2019
bellardd0ecd2a2006-04-23 17:14:48 +00002020/* used for ROM loading : can write in RAM and ROM */
Avi Kivitya8170e52012-10-23 12:30:10 +02002021void cpu_physical_memory_write_rom(hwaddr addr,
bellardd0ecd2a2006-04-23 17:14:48 +00002022 const uint8_t *buf, int len)
2023{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002024 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00002025 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002026 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002027 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00002028
bellardd0ecd2a2006-04-23 17:14:48 +00002029 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002030 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002031 mr = address_space_translate(&address_space_memory,
2032 addr, &addr1, &l, true);
ths3b46e622007-09-17 08:09:54 +00002033
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002034 if (!(memory_region_is_ram(mr) ||
2035 memory_region_is_romd(mr))) {
bellardd0ecd2a2006-04-23 17:14:48 +00002036 /* do nothing */
2037 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002038 addr1 += memory_region_get_ram_addr(mr);
bellardd0ecd2a2006-04-23 17:14:48 +00002039 /* ROM/RAM case */
pbrook5579c7f2009-04-11 14:47:08 +00002040 ptr = qemu_get_ram_ptr(addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00002041 memcpy(ptr, buf, l);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002042 invalidate_and_set_dirty(addr1, l);
bellardd0ecd2a2006-04-23 17:14:48 +00002043 }
2044 len -= l;
2045 buf += l;
2046 addr += l;
2047 }
2048}
2049
aliguori6d16c2f2009-01-22 16:59:11 +00002050typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002051 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00002052 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02002053 hwaddr addr;
2054 hwaddr len;
aliguori6d16c2f2009-01-22 16:59:11 +00002055} BounceBuffer;
2056
2057static BounceBuffer bounce;
2058
aliguoriba223c22009-01-22 16:59:16 +00002059typedef struct MapClient {
2060 void *opaque;
2061 void (*callback)(void *opaque);
Blue Swirl72cf2d42009-09-12 07:36:22 +00002062 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00002063} MapClient;
2064
Blue Swirl72cf2d42009-09-12 07:36:22 +00002065static QLIST_HEAD(map_client_list, MapClient) map_client_list
2066 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00002067
2068void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque))
2069{
Anthony Liguori7267c092011-08-20 22:09:37 -05002070 MapClient *client = g_malloc(sizeof(*client));
aliguoriba223c22009-01-22 16:59:16 +00002071
2072 client->opaque = opaque;
2073 client->callback = callback;
Blue Swirl72cf2d42009-09-12 07:36:22 +00002074 QLIST_INSERT_HEAD(&map_client_list, client, link);
aliguoriba223c22009-01-22 16:59:16 +00002075 return client;
2076}
2077
Blue Swirl8b9c99d2012-10-28 11:04:51 +00002078static void cpu_unregister_map_client(void *_client)
aliguoriba223c22009-01-22 16:59:16 +00002079{
2080 MapClient *client = (MapClient *)_client;
2081
Blue Swirl72cf2d42009-09-12 07:36:22 +00002082 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05002083 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00002084}
2085
2086static void cpu_notify_map_clients(void)
2087{
2088 MapClient *client;
2089
Blue Swirl72cf2d42009-09-12 07:36:22 +00002090 while (!QLIST_EMPTY(&map_client_list)) {
2091 client = QLIST_FIRST(&map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00002092 client->callback(client->opaque);
Isaku Yamahata34d5e942009-06-26 18:57:18 +09002093 cpu_unregister_map_client(client);
aliguoriba223c22009-01-22 16:59:16 +00002094 }
2095}
2096
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002097bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
2098{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002099 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002100 hwaddr l, xlat;
2101
2102 while (len > 0) {
2103 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002104 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2105 if (!memory_access_is_direct(mr, is_write)) {
2106 l = memory_access_size(mr, l, addr);
2107 if (!memory_region_access_valid(mr, xlat, l, is_write)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002108 return false;
2109 }
2110 }
2111
2112 len -= l;
2113 addr += l;
2114 }
2115 return true;
2116}
2117
aliguori6d16c2f2009-01-22 16:59:11 +00002118/* Map a physical memory region into a host virtual address.
2119 * May map a subset of the requested range, given by and returned in *plen.
2120 * May return NULL if resources needed to perform the mapping are exhausted.
2121 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00002122 * Use cpu_register_map_client() to know when retrying the map operation is
2123 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00002124 */
Avi Kivityac1970f2012-10-03 16:22:53 +02002125void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02002126 hwaddr addr,
2127 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02002128 bool is_write)
aliguori6d16c2f2009-01-22 16:59:11 +00002129{
Avi Kivitya8170e52012-10-23 12:30:10 +02002130 hwaddr len = *plen;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002131 hwaddr done = 0;
2132 hwaddr l, xlat, base;
2133 MemoryRegion *mr, *this_mr;
2134 ram_addr_t raddr;
aliguori6d16c2f2009-01-22 16:59:11 +00002135
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002136 if (len == 0) {
2137 return NULL;
2138 }
aliguori6d16c2f2009-01-22 16:59:11 +00002139
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002140 l = len;
2141 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2142 if (!memory_access_is_direct(mr, is_write)) {
2143 if (bounce.buffer) {
2144 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00002145 }
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002146 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE);
2147 bounce.addr = addr;
2148 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002149
2150 memory_region_ref(mr);
2151 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002152 if (!is_write) {
2153 address_space_read(as, addr, bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002154 }
aliguori6d16c2f2009-01-22 16:59:11 +00002155
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002156 *plen = l;
2157 return bounce.buffer;
2158 }
2159
2160 base = xlat;
2161 raddr = memory_region_get_ram_addr(mr);
2162
2163 for (;;) {
aliguori6d16c2f2009-01-22 16:59:11 +00002164 len -= l;
2165 addr += l;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002166 done += l;
2167 if (len == 0) {
2168 break;
2169 }
2170
2171 l = len;
2172 this_mr = address_space_translate(as, addr, &xlat, &l, is_write);
2173 if (this_mr != mr || xlat != base + done) {
2174 break;
2175 }
aliguori6d16c2f2009-01-22 16:59:11 +00002176 }
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002177
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002178 memory_region_ref(mr);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002179 *plen = done;
2180 return qemu_ram_ptr_length(raddr + base, plen);
aliguori6d16c2f2009-01-22 16:59:11 +00002181}
2182
Avi Kivityac1970f2012-10-03 16:22:53 +02002183/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00002184 * Will also mark the memory as dirty if is_write == 1. access_len gives
2185 * the amount of memory that was actually read or written by the caller.
2186 */
Avi Kivitya8170e52012-10-23 12:30:10 +02002187void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
2188 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00002189{
2190 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002191 MemoryRegion *mr;
2192 ram_addr_t addr1;
2193
2194 mr = qemu_ram_addr_from_host(buffer, &addr1);
2195 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00002196 if (is_write) {
aliguori6d16c2f2009-01-22 16:59:11 +00002197 while (access_len) {
2198 unsigned l;
2199 l = TARGET_PAGE_SIZE;
2200 if (l > access_len)
2201 l = access_len;
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002202 invalidate_and_set_dirty(addr1, l);
aliguori6d16c2f2009-01-22 16:59:11 +00002203 addr1 += l;
2204 access_len -= l;
2205 }
2206 }
Jan Kiszka868bb332011-06-21 22:59:09 +02002207 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02002208 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01002209 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002210 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00002211 return;
2212 }
2213 if (is_write) {
Avi Kivityac1970f2012-10-03 16:22:53 +02002214 address_space_write(as, bounce.addr, bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00002215 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00002216 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00002217 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002218 memory_region_unref(bounce.mr);
aliguoriba223c22009-01-22 16:59:16 +00002219 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00002220}
bellardd0ecd2a2006-04-23 17:14:48 +00002221
Avi Kivitya8170e52012-10-23 12:30:10 +02002222void *cpu_physical_memory_map(hwaddr addr,
2223 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02002224 int is_write)
2225{
2226 return address_space_map(&address_space_memory, addr, plen, is_write);
2227}
2228
Avi Kivitya8170e52012-10-23 12:30:10 +02002229void cpu_physical_memory_unmap(void *buffer, hwaddr len,
2230 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02002231{
2232 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
2233}
2234
bellard8df1cd02005-01-28 22:37:22 +00002235/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002236static inline uint32_t ldl_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002237 enum device_endian endian)
bellard8df1cd02005-01-28 22:37:22 +00002238{
bellard8df1cd02005-01-28 22:37:22 +00002239 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002240 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002241 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002242 hwaddr l = 4;
2243 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002244
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002245 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2246 false);
2247 if (l < 4 || !memory_access_is_direct(mr, false)) {
bellard8df1cd02005-01-28 22:37:22 +00002248 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002249 io_mem_read(mr, addr1, &val, 4);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002250#if defined(TARGET_WORDS_BIGENDIAN)
2251 if (endian == DEVICE_LITTLE_ENDIAN) {
2252 val = bswap32(val);
2253 }
2254#else
2255 if (endian == DEVICE_BIG_ENDIAN) {
2256 val = bswap32(val);
2257 }
2258#endif
bellard8df1cd02005-01-28 22:37:22 +00002259 } else {
2260 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002261 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002262 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002263 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002264 switch (endian) {
2265 case DEVICE_LITTLE_ENDIAN:
2266 val = ldl_le_p(ptr);
2267 break;
2268 case DEVICE_BIG_ENDIAN:
2269 val = ldl_be_p(ptr);
2270 break;
2271 default:
2272 val = ldl_p(ptr);
2273 break;
2274 }
bellard8df1cd02005-01-28 22:37:22 +00002275 }
2276 return val;
2277}
2278
Avi Kivitya8170e52012-10-23 12:30:10 +02002279uint32_t ldl_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002280{
2281 return ldl_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2282}
2283
Avi Kivitya8170e52012-10-23 12:30:10 +02002284uint32_t ldl_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002285{
2286 return ldl_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2287}
2288
Avi Kivitya8170e52012-10-23 12:30:10 +02002289uint32_t ldl_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002290{
2291 return ldl_phys_internal(addr, DEVICE_BIG_ENDIAN);
2292}
2293
bellard84b7b8e2005-11-28 21:19:04 +00002294/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002295static inline uint64_t ldq_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002296 enum device_endian endian)
bellard84b7b8e2005-11-28 21:19:04 +00002297{
bellard84b7b8e2005-11-28 21:19:04 +00002298 uint8_t *ptr;
2299 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002300 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002301 hwaddr l = 8;
2302 hwaddr addr1;
bellard84b7b8e2005-11-28 21:19:04 +00002303
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002304 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2305 false);
2306 if (l < 8 || !memory_access_is_direct(mr, false)) {
bellard84b7b8e2005-11-28 21:19:04 +00002307 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002308 io_mem_read(mr, addr1, &val, 8);
Paolo Bonzini968a5622013-05-24 17:58:37 +02002309#if defined(TARGET_WORDS_BIGENDIAN)
2310 if (endian == DEVICE_LITTLE_ENDIAN) {
2311 val = bswap64(val);
2312 }
2313#else
2314 if (endian == DEVICE_BIG_ENDIAN) {
2315 val = bswap64(val);
2316 }
2317#endif
bellard84b7b8e2005-11-28 21:19:04 +00002318 } else {
2319 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002320 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002321 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002322 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002323 switch (endian) {
2324 case DEVICE_LITTLE_ENDIAN:
2325 val = ldq_le_p(ptr);
2326 break;
2327 case DEVICE_BIG_ENDIAN:
2328 val = ldq_be_p(ptr);
2329 break;
2330 default:
2331 val = ldq_p(ptr);
2332 break;
2333 }
bellard84b7b8e2005-11-28 21:19:04 +00002334 }
2335 return val;
2336}
2337
Avi Kivitya8170e52012-10-23 12:30:10 +02002338uint64_t ldq_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002339{
2340 return ldq_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2341}
2342
Avi Kivitya8170e52012-10-23 12:30:10 +02002343uint64_t ldq_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002344{
2345 return ldq_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2346}
2347
Avi Kivitya8170e52012-10-23 12:30:10 +02002348uint64_t ldq_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002349{
2350 return ldq_phys_internal(addr, DEVICE_BIG_ENDIAN);
2351}
2352
bellardaab33092005-10-30 20:48:42 +00002353/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002354uint32_t ldub_phys(hwaddr addr)
bellardaab33092005-10-30 20:48:42 +00002355{
2356 uint8_t val;
2357 cpu_physical_memory_read(addr, &val, 1);
2358 return val;
2359}
2360
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002361/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002362static inline uint32_t lduw_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002363 enum device_endian endian)
bellardaab33092005-10-30 20:48:42 +00002364{
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002365 uint8_t *ptr;
2366 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002367 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002368 hwaddr l = 2;
2369 hwaddr addr1;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002370
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002371 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2372 false);
2373 if (l < 2 || !memory_access_is_direct(mr, false)) {
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002374 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002375 io_mem_read(mr, addr1, &val, 2);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002376#if defined(TARGET_WORDS_BIGENDIAN)
2377 if (endian == DEVICE_LITTLE_ENDIAN) {
2378 val = bswap16(val);
2379 }
2380#else
2381 if (endian == DEVICE_BIG_ENDIAN) {
2382 val = bswap16(val);
2383 }
2384#endif
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002385 } else {
2386 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002387 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002388 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002389 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002390 switch (endian) {
2391 case DEVICE_LITTLE_ENDIAN:
2392 val = lduw_le_p(ptr);
2393 break;
2394 case DEVICE_BIG_ENDIAN:
2395 val = lduw_be_p(ptr);
2396 break;
2397 default:
2398 val = lduw_p(ptr);
2399 break;
2400 }
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002401 }
2402 return val;
bellardaab33092005-10-30 20:48:42 +00002403}
2404
Avi Kivitya8170e52012-10-23 12:30:10 +02002405uint32_t lduw_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002406{
2407 return lduw_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2408}
2409
Avi Kivitya8170e52012-10-23 12:30:10 +02002410uint32_t lduw_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002411{
2412 return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2413}
2414
Avi Kivitya8170e52012-10-23 12:30:10 +02002415uint32_t lduw_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002416{
2417 return lduw_phys_internal(addr, DEVICE_BIG_ENDIAN);
2418}
2419
bellard8df1cd02005-01-28 22:37:22 +00002420/* warning: addr must be aligned. The ram page is not masked as dirty
2421 and the code inside is not invalidated. It is useful if the dirty
2422 bits are used to track modified PTEs */
Avi Kivitya8170e52012-10-23 12:30:10 +02002423void stl_phys_notdirty(hwaddr addr, uint32_t val)
bellard8df1cd02005-01-28 22:37:22 +00002424{
bellard8df1cd02005-01-28 22:37:22 +00002425 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002426 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002427 hwaddr l = 4;
2428 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002429
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002430 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2431 true);
2432 if (l < 4 || !memory_access_is_direct(mr, true)) {
2433 io_mem_write(mr, addr1, val, 4);
bellard8df1cd02005-01-28 22:37:22 +00002434 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002435 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
pbrook5579c7f2009-04-11 14:47:08 +00002436 ptr = qemu_get_ram_ptr(addr1);
bellard8df1cd02005-01-28 22:37:22 +00002437 stl_p(ptr, val);
aliguori74576192008-10-06 14:02:03 +00002438
2439 if (unlikely(in_migration)) {
2440 if (!cpu_physical_memory_is_dirty(addr1)) {
2441 /* invalidate code */
2442 tb_invalidate_phys_page_range(addr1, addr1 + 4, 0);
2443 /* set dirty bit */
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09002444 cpu_physical_memory_set_dirty_flags(
2445 addr1, (0xff & ~CODE_DIRTY_FLAG));
aliguori74576192008-10-06 14:02:03 +00002446 }
2447 }
bellard8df1cd02005-01-28 22:37:22 +00002448 }
2449}
2450
2451/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002452static inline void stl_phys_internal(hwaddr addr, uint32_t val,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002453 enum device_endian endian)
bellard8df1cd02005-01-28 22:37:22 +00002454{
bellard8df1cd02005-01-28 22:37:22 +00002455 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002456 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002457 hwaddr l = 4;
2458 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002459
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002460 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2461 true);
2462 if (l < 4 || !memory_access_is_direct(mr, true)) {
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002463#if defined(TARGET_WORDS_BIGENDIAN)
2464 if (endian == DEVICE_LITTLE_ENDIAN) {
2465 val = bswap32(val);
2466 }
2467#else
2468 if (endian == DEVICE_BIG_ENDIAN) {
2469 val = bswap32(val);
2470 }
2471#endif
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002472 io_mem_write(mr, addr1, val, 4);
bellard8df1cd02005-01-28 22:37:22 +00002473 } else {
bellard8df1cd02005-01-28 22:37:22 +00002474 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002475 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
pbrook5579c7f2009-04-11 14:47:08 +00002476 ptr = qemu_get_ram_ptr(addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002477 switch (endian) {
2478 case DEVICE_LITTLE_ENDIAN:
2479 stl_le_p(ptr, val);
2480 break;
2481 case DEVICE_BIG_ENDIAN:
2482 stl_be_p(ptr, val);
2483 break;
2484 default:
2485 stl_p(ptr, val);
2486 break;
2487 }
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002488 invalidate_and_set_dirty(addr1, 4);
bellard8df1cd02005-01-28 22:37:22 +00002489 }
2490}
2491
Avi Kivitya8170e52012-10-23 12:30:10 +02002492void stl_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002493{
2494 stl_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN);
2495}
2496
Avi Kivitya8170e52012-10-23 12:30:10 +02002497void stl_le_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002498{
2499 stl_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN);
2500}
2501
Avi Kivitya8170e52012-10-23 12:30:10 +02002502void stl_be_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002503{
2504 stl_phys_internal(addr, val, DEVICE_BIG_ENDIAN);
2505}
2506
bellardaab33092005-10-30 20:48:42 +00002507/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002508void stb_phys(hwaddr addr, uint32_t val)
bellardaab33092005-10-30 20:48:42 +00002509{
2510 uint8_t v = val;
2511 cpu_physical_memory_write(addr, &v, 1);
2512}
2513
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002514/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002515static inline void stw_phys_internal(hwaddr addr, uint32_t val,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002516 enum device_endian endian)
bellardaab33092005-10-30 20:48:42 +00002517{
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002518 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002519 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002520 hwaddr l = 2;
2521 hwaddr addr1;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002522
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002523 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2524 true);
2525 if (l < 2 || !memory_access_is_direct(mr, true)) {
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002526#if defined(TARGET_WORDS_BIGENDIAN)
2527 if (endian == DEVICE_LITTLE_ENDIAN) {
2528 val = bswap16(val);
2529 }
2530#else
2531 if (endian == DEVICE_BIG_ENDIAN) {
2532 val = bswap16(val);
2533 }
2534#endif
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002535 io_mem_write(mr, addr1, val, 2);
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002536 } else {
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002537 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002538 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002539 ptr = qemu_get_ram_ptr(addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002540 switch (endian) {
2541 case DEVICE_LITTLE_ENDIAN:
2542 stw_le_p(ptr, val);
2543 break;
2544 case DEVICE_BIG_ENDIAN:
2545 stw_be_p(ptr, val);
2546 break;
2547 default:
2548 stw_p(ptr, val);
2549 break;
2550 }
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002551 invalidate_and_set_dirty(addr1, 2);
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002552 }
bellardaab33092005-10-30 20:48:42 +00002553}
2554
Avi Kivitya8170e52012-10-23 12:30:10 +02002555void stw_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002556{
2557 stw_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN);
2558}
2559
Avi Kivitya8170e52012-10-23 12:30:10 +02002560void stw_le_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002561{
2562 stw_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN);
2563}
2564
Avi Kivitya8170e52012-10-23 12:30:10 +02002565void stw_be_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002566{
2567 stw_phys_internal(addr, val, DEVICE_BIG_ENDIAN);
2568}
2569
bellardaab33092005-10-30 20:48:42 +00002570/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002571void stq_phys(hwaddr addr, uint64_t val)
bellardaab33092005-10-30 20:48:42 +00002572{
2573 val = tswap64(val);
Stefan Weil71d2b722011-03-26 21:06:56 +01002574 cpu_physical_memory_write(addr, &val, 8);
bellardaab33092005-10-30 20:48:42 +00002575}
2576
Avi Kivitya8170e52012-10-23 12:30:10 +02002577void stq_le_phys(hwaddr addr, uint64_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002578{
2579 val = cpu_to_le64(val);
2580 cpu_physical_memory_write(addr, &val, 8);
2581}
2582
Avi Kivitya8170e52012-10-23 12:30:10 +02002583void stq_be_phys(hwaddr addr, uint64_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002584{
2585 val = cpu_to_be64(val);
2586 cpu_physical_memory_write(addr, &val, 8);
2587}
2588
aliguori5e2972f2009-03-28 17:51:36 +00002589/* virtual memory access for debug (includes writing to ROM) */
Andreas Färberf17ec442013-06-29 19:40:58 +02002590int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
bellardb448f2f2004-02-25 23:24:04 +00002591 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00002592{
2593 int l;
Avi Kivitya8170e52012-10-23 12:30:10 +02002594 hwaddr phys_addr;
j_mayer9b3c35e2007-04-07 11:21:28 +00002595 target_ulong page;
bellard13eb76e2004-01-24 15:23:36 +00002596
2597 while (len > 0) {
2598 page = addr & TARGET_PAGE_MASK;
Andreas Färberf17ec442013-06-29 19:40:58 +02002599 phys_addr = cpu_get_phys_page_debug(cpu, page);
bellard13eb76e2004-01-24 15:23:36 +00002600 /* if no physical page mapped, return an error */
2601 if (phys_addr == -1)
2602 return -1;
2603 l = (page + TARGET_PAGE_SIZE) - addr;
2604 if (l > len)
2605 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00002606 phys_addr += (addr & ~TARGET_PAGE_MASK);
aliguori5e2972f2009-03-28 17:51:36 +00002607 if (is_write)
2608 cpu_physical_memory_write_rom(phys_addr, buf, l);
2609 else
aliguori5e2972f2009-03-28 17:51:36 +00002610 cpu_physical_memory_rw(phys_addr, buf, l, is_write);
bellard13eb76e2004-01-24 15:23:36 +00002611 len -= l;
2612 buf += l;
2613 addr += l;
2614 }
2615 return 0;
2616}
Paul Brooka68fe892010-03-01 00:08:59 +00002617#endif
bellard13eb76e2004-01-24 15:23:36 +00002618
Blue Swirl8e4a4242013-01-06 18:30:17 +00002619#if !defined(CONFIG_USER_ONLY)
2620
2621/*
2622 * A helper function for the _utterly broken_ virtio device model to find out if
2623 * it's running on a big endian machine. Don't do this at home kids!
2624 */
2625bool virtio_is_big_endian(void);
2626bool virtio_is_big_endian(void)
2627{
2628#if defined(TARGET_WORDS_BIGENDIAN)
2629 return true;
2630#else
2631 return false;
2632#endif
2633}
2634
2635#endif
2636
Wen Congyang76f35532012-05-07 12:04:18 +08002637#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02002638bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08002639{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002640 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002641 hwaddr l = 1;
Wen Congyang76f35532012-05-07 12:04:18 +08002642
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002643 mr = address_space_translate(&address_space_memory,
2644 phys_addr, &phys_addr, &l, false);
Wen Congyang76f35532012-05-07 12:04:18 +08002645
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002646 return !(memory_region_is_ram(mr) ||
2647 memory_region_is_romd(mr));
Wen Congyang76f35532012-05-07 12:04:18 +08002648}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04002649
2650void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
2651{
2652 RAMBlock *block;
2653
2654 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
2655 func(block->host, block->offset, block->length, opaque);
2656 }
2657}
Peter Maydellec3f8c92013-06-27 20:53:38 +01002658#endif