bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 2 | * Virtual page mapping |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
bellard | 67b915a | 2004-03-31 23:37:16 +0000 | [diff] [blame] | 19 | #include "config.h" |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 20 | #ifdef _WIN32 |
| 21 | #include <windows.h> |
| 22 | #else |
bellard | a98d49b | 2004-11-14 16:22:05 +0000 | [diff] [blame] | 23 | #include <sys/types.h> |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 24 | #include <sys/mman.h> |
| 25 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 26 | |
Stefan Weil | 055403b | 2010-10-22 23:03:32 +0200 | [diff] [blame] | 27 | #include "qemu-common.h" |
bellard | 6180a18 | 2003-09-30 21:04:53 +0000 | [diff] [blame] | 28 | #include "cpu.h" |
bellard | b67d9a5 | 2008-05-23 09:57:34 +0000 | [diff] [blame] | 29 | #include "tcg.h" |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 30 | #include "hw/hw.h" |
Alex Williamson | cc9e98c | 2010-06-25 11:09:43 -0600 | [diff] [blame] | 31 | #include "hw/qdev.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 32 | #include "qemu/osdep.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 33 | #include "sysemu/kvm.h" |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 34 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 35 | #include "hw/xen/xen.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 36 | #include "qemu/timer.h" |
| 37 | #include "qemu/config-file.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 38 | #include "exec/memory.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 39 | #include "sysemu/dma.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 40 | #include "exec/address-spaces.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 41 | #if defined(CONFIG_USER_ONLY) |
| 42 | #include <qemu.h> |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 43 | #else /* !CONFIG_USER_ONLY */ |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 44 | #include "sysemu/xen-mapcache.h" |
Stefano Stabellini | 6506e4f | 2011-05-19 18:35:44 +0100 | [diff] [blame] | 45 | #include "trace.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 46 | #endif |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 47 | #include "exec/cpu-all.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 48 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 49 | #include "exec/cputlb.h" |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 50 | #include "translate-all.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 51 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 52 | #include "exec/memory-internal.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 53 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 54 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 55 | |
pbrook | 99773bd | 2006-04-16 15:14:59 +0000 | [diff] [blame] | 56 | #if !defined(CONFIG_USER_ONLY) |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 57 | static int in_migration; |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 58 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 59 | RAMList ram_list = { .blocks = QTAILQ_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 60 | |
| 61 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 62 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 63 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 64 | AddressSpace address_space_io; |
| 65 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 66 | |
Paolo Bonzini | 0844e00 | 2013-05-24 14:37:28 +0200 | [diff] [blame] | 67 | MemoryRegion io_mem_rom, io_mem_notdirty; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 68 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 69 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 70 | #endif |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 71 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 72 | struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 73 | /* current CPU in the current thread. It is only valid inside |
| 74 | cpu_exec() */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 75 | DEFINE_TLS(CPUState *, current_cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 76 | /* 0 = Do not count executed instructions. |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 77 | 1 = Precise instruction counting. |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 78 | 2 = Adaptive rate instruction counting. */ |
Paolo Bonzini | 5708fc6 | 2012-11-26 15:36:40 +0100 | [diff] [blame] | 79 | int use_icount; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 80 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 81 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 82 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 83 | typedef struct PhysPageEntry PhysPageEntry; |
| 84 | |
| 85 | struct PhysPageEntry { |
| 86 | uint16_t is_leaf : 1; |
| 87 | /* index into phys_sections (is_leaf) or phys_map_nodes (!is_leaf) */ |
| 88 | uint16_t ptr : 15; |
| 89 | }; |
| 90 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 91 | typedef PhysPageEntry Node[L2_SIZE]; |
| 92 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 93 | struct AddressSpaceDispatch { |
| 94 | /* This is a multi-level map on the physical address space. |
| 95 | * The bottom level has pointers to MemoryRegionSections. |
| 96 | */ |
| 97 | PhysPageEntry phys_map; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 98 | Node *nodes; |
| 99 | MemoryRegionSection *sections; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 100 | AddressSpace *as; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 101 | }; |
| 102 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 103 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 104 | typedef struct subpage_t { |
| 105 | MemoryRegion iomem; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 106 | AddressSpace *as; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 107 | hwaddr base; |
| 108 | uint16_t sub_section[TARGET_PAGE_SIZE]; |
| 109 | } subpage_t; |
| 110 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 111 | #define PHYS_SECTION_UNASSIGNED 0 |
| 112 | #define PHYS_SECTION_NOTDIRTY 1 |
| 113 | #define PHYS_SECTION_ROM 2 |
| 114 | #define PHYS_SECTION_WATCH 3 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 115 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 116 | typedef struct PhysPageMap { |
| 117 | unsigned sections_nb; |
| 118 | unsigned sections_nb_alloc; |
| 119 | unsigned nodes_nb; |
| 120 | unsigned nodes_nb_alloc; |
| 121 | Node *nodes; |
| 122 | MemoryRegionSection *sections; |
| 123 | } PhysPageMap; |
| 124 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 125 | static PhysPageMap *prev_map; |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 126 | static PhysPageMap next_map; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 127 | |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 128 | #define PHYS_MAP_NODE_NIL (((uint16_t)~0) >> 1) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 129 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 130 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 131 | static void memory_map_init(void); |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 132 | static void *qemu_safe_ram_ptr(ram_addr_t addr); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 133 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 134 | static MemoryRegion io_mem_watch; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 135 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 136 | |
Paul Brook | 6d9a130 | 2010-02-28 23:55:53 +0000 | [diff] [blame] | 137 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 138 | |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 139 | static void phys_map_node_reserve(unsigned nodes) |
| 140 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 141 | if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) { |
| 142 | next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2, |
| 143 | 16); |
| 144 | next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc, |
| 145 | next_map.nodes_nb + nodes); |
| 146 | next_map.nodes = g_renew(Node, next_map.nodes, |
| 147 | next_map.nodes_nb_alloc); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 148 | } |
| 149 | } |
| 150 | |
| 151 | static uint16_t phys_map_node_alloc(void) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 152 | { |
| 153 | unsigned i; |
| 154 | uint16_t ret; |
| 155 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 156 | ret = next_map.nodes_nb++; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 157 | assert(ret != PHYS_MAP_NODE_NIL); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 158 | assert(ret != next_map.nodes_nb_alloc); |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 159 | for (i = 0; i < L2_SIZE; ++i) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 160 | next_map.nodes[ret][i].is_leaf = 0; |
| 161 | next_map.nodes[ret][i].ptr = PHYS_MAP_NODE_NIL; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 162 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 163 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 164 | } |
| 165 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 166 | static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index, |
| 167 | hwaddr *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 168 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 169 | { |
| 170 | PhysPageEntry *p; |
| 171 | int i; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 172 | hwaddr step = (hwaddr)1 << (level * L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 173 | |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 174 | if (!lp->is_leaf && lp->ptr == PHYS_MAP_NODE_NIL) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 175 | lp->ptr = phys_map_node_alloc(); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 176 | p = next_map.nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 177 | if (level == 0) { |
| 178 | for (i = 0; i < L2_SIZE; i++) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 179 | p[i].is_leaf = 1; |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 180 | p[i].ptr = PHYS_SECTION_UNASSIGNED; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 181 | } |
| 182 | } |
| 183 | } else { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 184 | p = next_map.nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 185 | } |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 186 | lp = &p[(*index >> (level * L2_BITS)) & (L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 187 | |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 188 | while (*nb && lp < &p[L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 189 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
| 190 | lp->is_leaf = true; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 191 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 192 | *index += step; |
| 193 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 194 | } else { |
| 195 | phys_page_set_level(lp, index, nb, leaf, level - 1); |
| 196 | } |
| 197 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 198 | } |
| 199 | } |
| 200 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 201 | static void phys_page_set(AddressSpaceDispatch *d, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 202 | hwaddr index, hwaddr nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 203 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 204 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 205 | /* Wildly overreserve - it doesn't matter much. */ |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 206 | phys_map_node_reserve(3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 207 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 208 | phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 209 | } |
| 210 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 211 | static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr index, |
| 212 | Node *nodes, MemoryRegionSection *sections) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 213 | { |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 214 | PhysPageEntry *p; |
| 215 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 216 | |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 217 | for (i = P_L2_LEVELS - 1; i >= 0 && !lp.is_leaf; i--) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 218 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 219 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 220 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 221 | p = nodes[lp.ptr]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 222 | lp = p[(index >> (i * L2_BITS)) & (L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 223 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 224 | return §ions[lp.ptr]; |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 225 | } |
| 226 | |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 227 | bool memory_region_is_unassigned(MemoryRegion *mr) |
| 228 | { |
Paolo Bonzini | 2a8e749 | 2013-05-24 14:34:08 +0200 | [diff] [blame] | 229 | return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 230 | && mr != &io_mem_watch; |
| 231 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 232 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 233 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 234 | hwaddr addr, |
| 235 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 236 | { |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 237 | MemoryRegionSection *section; |
| 238 | subpage_t *subpage; |
| 239 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 240 | section = phys_page_find(d->phys_map, addr >> TARGET_PAGE_BITS, |
| 241 | d->nodes, d->sections); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 242 | if (resolve_subpage && section->mr->subpage) { |
| 243 | subpage = container_of(section->mr, subpage_t, iomem); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 244 | section = &d->sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 245 | } |
| 246 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 247 | } |
| 248 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 249 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 250 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 251 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 252 | { |
| 253 | MemoryRegionSection *section; |
| 254 | Int128 diff; |
| 255 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 256 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 257 | /* Compute offset within MemoryRegionSection */ |
| 258 | addr -= section->offset_within_address_space; |
| 259 | |
| 260 | /* Compute offset within MemoryRegion */ |
| 261 | *xlat = addr + section->offset_within_region; |
| 262 | |
| 263 | diff = int128_sub(section->mr->size, int128_make64(addr)); |
Peter Maydell | 3752a03 | 2013-06-20 15:18:04 +0100 | [diff] [blame] | 264 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 265 | return section; |
| 266 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 267 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 268 | MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, |
| 269 | hwaddr *xlat, hwaddr *plen, |
| 270 | bool is_write) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 271 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 272 | IOMMUTLBEntry iotlb; |
| 273 | MemoryRegionSection *section; |
| 274 | MemoryRegion *mr; |
| 275 | hwaddr len = *plen; |
| 276 | |
| 277 | for (;;) { |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 278 | section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 279 | mr = section->mr; |
| 280 | |
| 281 | if (!mr->iommu_ops) { |
| 282 | break; |
| 283 | } |
| 284 | |
| 285 | iotlb = mr->iommu_ops->translate(mr, addr); |
| 286 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 287 | | (addr & iotlb.addr_mask)); |
| 288 | len = MIN(len, (addr | iotlb.addr_mask) - addr + 1); |
| 289 | if (!(iotlb.perm & (1 << is_write))) { |
| 290 | mr = &io_mem_unassigned; |
| 291 | break; |
| 292 | } |
| 293 | |
| 294 | as = iotlb.target_as; |
| 295 | } |
| 296 | |
| 297 | *plen = len; |
| 298 | *xlat = addr; |
| 299 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | MemoryRegionSection * |
| 303 | address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, |
| 304 | hwaddr *plen) |
| 305 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 306 | MemoryRegionSection *section; |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 307 | section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 308 | |
| 309 | assert(!section->mr->iommu_ops); |
| 310 | return section; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 311 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 312 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 313 | |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 314 | void cpu_exec_init_all(void) |
| 315 | { |
| 316 | #if !defined(CONFIG_USER_ONLY) |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 317 | qemu_mutex_init(&ram_list.mutex); |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 318 | memory_map_init(); |
| 319 | io_mem_init(); |
| 320 | #endif |
| 321 | } |
| 322 | |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 323 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 324 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 325 | static int cpu_common_post_load(void *opaque, int version_id) |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 326 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 327 | CPUState *cpu = opaque; |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 328 | |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 329 | /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the |
| 330 | version_id is increased. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 331 | cpu->interrupt_request &= ~0x01; |
| 332 | tlb_flush(cpu->env_ptr, 1); |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 333 | |
| 334 | return 0; |
| 335 | } |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 336 | |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 337 | const VMStateDescription vmstate_cpu_common = { |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 338 | .name = "cpu_common", |
| 339 | .version_id = 1, |
| 340 | .minimum_version_id = 1, |
| 341 | .minimum_version_id_old = 1, |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 342 | .post_load = cpu_common_post_load, |
| 343 | .fields = (VMStateField []) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 344 | VMSTATE_UINT32(halted, CPUState), |
| 345 | VMSTATE_UINT32(interrupt_request, CPUState), |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 346 | VMSTATE_END_OF_LIST() |
| 347 | } |
| 348 | }; |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 349 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 350 | #endif |
| 351 | |
Andreas Färber | 38d8f5c | 2012-12-17 19:47:15 +0100 | [diff] [blame] | 352 | CPUState *qemu_get_cpu(int index) |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 353 | { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 354 | CPUState *cpu; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 355 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 356 | CPU_FOREACH(cpu) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 357 | if (cpu->cpu_index == index) { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 358 | return cpu; |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 359 | } |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 360 | } |
| 361 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 362 | return NULL; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 363 | } |
| 364 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 365 | void cpu_exec_init(CPUArchState *env) |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 366 | { |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 367 | CPUState *cpu = ENV_GET_CPU(env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 368 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 369 | CPUState *some_cpu; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 370 | int cpu_index; |
| 371 | |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 372 | #if defined(CONFIG_USER_ONLY) |
| 373 | cpu_list_lock(); |
| 374 | #endif |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 375 | cpu_index = 0; |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 376 | CPU_FOREACH(some_cpu) { |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 377 | cpu_index++; |
| 378 | } |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 379 | cpu->cpu_index = cpu_index; |
Andreas Färber | 1b1ed8d | 2012-12-17 04:22:03 +0100 | [diff] [blame] | 380 | cpu->numa_node = 0; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 381 | QTAILQ_INIT(&env->breakpoints); |
| 382 | QTAILQ_INIT(&env->watchpoints); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 383 | #ifndef CONFIG_USER_ONLY |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 384 | cpu->thread_id = qemu_get_thread_id(); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 385 | #endif |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 386 | QTAILQ_INSERT_TAIL(&cpus, cpu, node); |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 387 | #if defined(CONFIG_USER_ONLY) |
| 388 | cpu_list_unlock(); |
| 389 | #endif |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 390 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
| 391 | vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu); |
| 392 | } |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 393 | #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 394 | register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION, |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 395 | cpu_save, cpu_load, env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 396 | assert(cc->vmsd == NULL); |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 397 | assert(qdev_get_vmsd(DEVICE(cpu)) == NULL); |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 398 | #endif |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 399 | if (cc->vmsd != NULL) { |
| 400 | vmstate_register(NULL, cpu_index, cc->vmsd, cpu); |
| 401 | } |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 402 | } |
| 403 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 404 | #if defined(TARGET_HAS_ICE) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 405 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 406 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 407 | { |
| 408 | tb_invalidate_phys_page_range(pc, pc + 1, 0); |
| 409 | } |
| 410 | #else |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 411 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 412 | { |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 413 | tb_invalidate_phys_addr(cpu_get_phys_page_debug(cpu, pc) | |
Max Filippov | 9d70c4b | 2012-05-27 20:21:08 +0400 | [diff] [blame] | 414 | (pc & ~TARGET_PAGE_MASK)); |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 415 | } |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 416 | #endif |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 417 | #endif /* TARGET_HAS_ICE */ |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 418 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 419 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 420 | void cpu_watchpoint_remove_all(CPUArchState *env, int mask) |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 421 | |
| 422 | { |
| 423 | } |
| 424 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 425 | int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 426 | int flags, CPUWatchpoint **watchpoint) |
| 427 | { |
| 428 | return -ENOSYS; |
| 429 | } |
| 430 | #else |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 431 | /* Add a watchpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 432 | int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 433 | int flags, CPUWatchpoint **watchpoint) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 434 | { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 435 | target_ulong len_mask = ~(len - 1); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 436 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 437 | |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 438 | /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */ |
Max Filippov | 0dc2382 | 2012-01-29 03:15:23 +0400 | [diff] [blame] | 439 | if ((len & (len - 1)) || (addr & ~len_mask) || |
| 440 | len == 0 || len > TARGET_PAGE_SIZE) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 441 | fprintf(stderr, "qemu: tried to set invalid watchpoint at " |
| 442 | TARGET_FMT_lx ", len=" TARGET_FMT_lu "\n", addr, len); |
| 443 | return -EINVAL; |
| 444 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 445 | wp = g_malloc(sizeof(*wp)); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 446 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 447 | wp->vaddr = addr; |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 448 | wp->len_mask = len_mask; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 449 | wp->flags = flags; |
| 450 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 451 | /* keep all GDB-injected watchpoints in front */ |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 452 | if (flags & BP_GDB) |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 453 | QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 454 | else |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 455 | QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 456 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 457 | tlb_flush_page(env, addr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 458 | |
| 459 | if (watchpoint) |
| 460 | *watchpoint = wp; |
| 461 | return 0; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 462 | } |
| 463 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 464 | /* Remove a specific watchpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 465 | int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 466 | int flags) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 467 | { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 468 | target_ulong len_mask = ~(len - 1); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 469 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 470 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 471 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 472 | if (addr == wp->vaddr && len_mask == wp->len_mask |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 473 | && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 474 | cpu_watchpoint_remove_by_ref(env, wp); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 475 | return 0; |
| 476 | } |
| 477 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 478 | return -ENOENT; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 479 | } |
| 480 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 481 | /* Remove a specific watchpoint by reference. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 482 | void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 483 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 484 | QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 485 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 486 | tlb_flush_page(env, watchpoint->vaddr); |
| 487 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 488 | g_free(watchpoint); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 489 | } |
| 490 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 491 | /* Remove all matching watchpoints. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 492 | void cpu_watchpoint_remove_all(CPUArchState *env, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 493 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 494 | CPUWatchpoint *wp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 495 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 496 | QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 497 | if (wp->flags & mask) |
| 498 | cpu_watchpoint_remove_by_ref(env, wp); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 499 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 500 | } |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 501 | #endif |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 502 | |
| 503 | /* Add a breakpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 504 | int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 505 | CPUBreakpoint **breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 506 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 507 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 508 | CPUBreakpoint *bp; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 509 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 510 | bp = g_malloc(sizeof(*bp)); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 511 | |
| 512 | bp->pc = pc; |
| 513 | bp->flags = flags; |
| 514 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 515 | /* keep all GDB-injected breakpoints in front */ |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 516 | if (flags & BP_GDB) { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 517 | QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 518 | } else { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 519 | QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 520 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 521 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 522 | breakpoint_invalidate(ENV_GET_CPU(env), pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 523 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 524 | if (breakpoint) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 525 | *breakpoint = bp; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 526 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 527 | return 0; |
| 528 | #else |
| 529 | return -ENOSYS; |
| 530 | #endif |
| 531 | } |
| 532 | |
| 533 | /* Remove a specific breakpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 534 | int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 535 | { |
| 536 | #if defined(TARGET_HAS_ICE) |
| 537 | CPUBreakpoint *bp; |
| 538 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 539 | QTAILQ_FOREACH(bp, &env->breakpoints, entry) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 540 | if (bp->pc == pc && bp->flags == flags) { |
| 541 | cpu_breakpoint_remove_by_ref(env, bp); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 542 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 543 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 544 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 545 | return -ENOENT; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 546 | #else |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 547 | return -ENOSYS; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 548 | #endif |
| 549 | } |
| 550 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 551 | /* Remove a specific breakpoint by reference. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 552 | void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 553 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 554 | #if defined(TARGET_HAS_ICE) |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 555 | QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry); |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 556 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 557 | breakpoint_invalidate(ENV_GET_CPU(env), breakpoint->pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 558 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 559 | g_free(breakpoint); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 560 | #endif |
| 561 | } |
| 562 | |
| 563 | /* Remove all matching breakpoints. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 564 | void cpu_breakpoint_remove_all(CPUArchState *env, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 565 | { |
| 566 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 567 | CPUBreakpoint *bp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 568 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 569 | QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 570 | if (bp->flags & mask) |
| 571 | cpu_breakpoint_remove_by_ref(env, bp); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 572 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 573 | #endif |
| 574 | } |
| 575 | |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 576 | /* enable or disable single step mode. EXCP_DEBUG is returned by the |
| 577 | CPU loop after each instruction */ |
Andreas Färber | 3825b28 | 2013-06-24 18:41:06 +0200 | [diff] [blame] | 578 | void cpu_single_step(CPUState *cpu, int enabled) |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 579 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 580 | #if defined(TARGET_HAS_ICE) |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 581 | if (cpu->singlestep_enabled != enabled) { |
| 582 | cpu->singlestep_enabled = enabled; |
| 583 | if (kvm_enabled()) { |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 584 | kvm_update_guest_debug(cpu, 0); |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 585 | } else { |
Stuart Brady | ccbb4d4 | 2009-05-03 12:15:06 +0100 | [diff] [blame] | 586 | /* must flush all the translated code to avoid inconsistencies */ |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 587 | /* XXX: only flush what is necessary */ |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 588 | CPUArchState *env = cpu->env_ptr; |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 589 | tb_flush(env); |
| 590 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 591 | } |
| 592 | #endif |
| 593 | } |
| 594 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 595 | void cpu_abort(CPUArchState *env, const char *fmt, ...) |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 596 | { |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 597 | CPUState *cpu = ENV_GET_CPU(env); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 598 | va_list ap; |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 599 | va_list ap2; |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 600 | |
| 601 | va_start(ap, fmt); |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 602 | va_copy(ap2, ap); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 603 | fprintf(stderr, "qemu: fatal: "); |
| 604 | vfprintf(stderr, fmt, ap); |
| 605 | fprintf(stderr, "\n"); |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 606 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 607 | if (qemu_log_enabled()) { |
| 608 | qemu_log("qemu: fatal: "); |
| 609 | qemu_log_vprintf(fmt, ap2); |
| 610 | qemu_log("\n"); |
Andreas Färber | a076285 | 2013-06-16 07:28:50 +0200 | [diff] [blame] | 611 | log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 31b1a7b | 2009-01-15 22:35:09 +0000 | [diff] [blame] | 612 | qemu_log_flush(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 613 | qemu_log_close(); |
balrog | 924edca | 2007-06-10 14:07:13 +0000 | [diff] [blame] | 614 | } |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 615 | va_end(ap2); |
j_mayer | f937329 | 2007-09-29 12:18:20 +0000 | [diff] [blame] | 616 | va_end(ap); |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 617 | #if defined(CONFIG_USER_ONLY) |
| 618 | { |
| 619 | struct sigaction act; |
| 620 | sigfillset(&act.sa_mask); |
| 621 | act.sa_handler = SIG_DFL; |
| 622 | sigaction(SIGABRT, &act, NULL); |
| 623 | } |
| 624 | #endif |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 625 | abort(); |
| 626 | } |
| 627 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 628 | CPUArchState *cpu_copy(CPUArchState *env) |
ths | c5be9f0 | 2007-02-28 20:20:53 +0000 | [diff] [blame] | 629 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 630 | CPUArchState *new_env = cpu_init(env->cpu_model_str); |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 631 | #if defined(TARGET_HAS_ICE) |
| 632 | CPUBreakpoint *bp; |
| 633 | CPUWatchpoint *wp; |
| 634 | #endif |
| 635 | |
Alexander Graf | b24c882 | 2013-07-06 14:17:51 +0200 | [diff] [blame] | 636 | /* Reset non arch specific state */ |
| 637 | cpu_reset(ENV_GET_CPU(new_env)); |
| 638 | |
| 639 | /* Copy arch specific state into the new CPU */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 640 | memcpy(new_env, env, sizeof(CPUArchState)); |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 641 | |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 642 | /* Clone all break/watchpoints. |
| 643 | Note: Once we support ptrace with hw-debug register access, make sure |
| 644 | BP_CPU break/watchpoints are handled correctly on clone. */ |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 645 | QTAILQ_INIT(&env->breakpoints); |
| 646 | QTAILQ_INIT(&env->watchpoints); |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 647 | #if defined(TARGET_HAS_ICE) |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 648 | QTAILQ_FOREACH(bp, &env->breakpoints, entry) { |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 649 | cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL); |
| 650 | } |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 651 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
aliguori | 5a38f08 | 2009-01-15 20:16:51 +0000 | [diff] [blame] | 652 | cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1, |
| 653 | wp->flags, NULL); |
| 654 | } |
| 655 | #endif |
| 656 | |
ths | c5be9f0 | 2007-02-28 20:20:53 +0000 | [diff] [blame] | 657 | return new_env; |
| 658 | } |
| 659 | |
bellard | 0124311 | 2004-01-04 15:48:17 +0000 | [diff] [blame] | 660 | #if !defined(CONFIG_USER_ONLY) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 661 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end, |
| 662 | uintptr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 663 | { |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 664 | uintptr_t start1; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 665 | |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 666 | /* we modify the TLB cache so that the dirty bit will be set again |
| 667 | when accessing the range */ |
Stefan Weil | 8efe0ca | 2012-04-12 15:42:19 +0200 | [diff] [blame] | 668 | start1 = (uintptr_t)qemu_safe_ram_ptr(start); |
Stefan Weil | a57d23e | 2011-04-30 22:49:26 +0200 | [diff] [blame] | 669 | /* Check that we don't span multiple blocks - this breaks the |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 670 | address comparisons below. */ |
Stefan Weil | 8efe0ca | 2012-04-12 15:42:19 +0200 | [diff] [blame] | 671 | if ((uintptr_t)qemu_safe_ram_ptr(end - 1) - start1 |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 672 | != (end - 1) - start) { |
| 673 | abort(); |
| 674 | } |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 675 | cpu_tlb_reset_dirty_all(start1, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 676 | |
| 677 | } |
| 678 | |
| 679 | /* Note: start and end must be within the same ram block. */ |
| 680 | void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, |
| 681 | int dirty_flags) |
| 682 | { |
| 683 | uintptr_t length; |
| 684 | |
| 685 | start &= TARGET_PAGE_MASK; |
| 686 | end = TARGET_PAGE_ALIGN(end); |
| 687 | |
| 688 | length = end - start; |
| 689 | if (length == 0) |
| 690 | return; |
| 691 | cpu_physical_memory_mask_dirty_range(start, length, dirty_flags); |
| 692 | |
| 693 | if (tcg_enabled()) { |
| 694 | tlb_reset_dirty_range_all(start, end, length); |
| 695 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 696 | } |
| 697 | |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 698 | static int cpu_physical_memory_set_dirty_tracking(int enable) |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 699 | { |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 700 | int ret = 0; |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 701 | in_migration = enable; |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 702 | return ret; |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 703 | } |
| 704 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 705 | hwaddr memory_region_section_get_iotlb(CPUArchState *env, |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 706 | MemoryRegionSection *section, |
| 707 | target_ulong vaddr, |
| 708 | hwaddr paddr, hwaddr xlat, |
| 709 | int prot, |
| 710 | target_ulong *address) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 711 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 712 | hwaddr iotlb; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 713 | CPUWatchpoint *wp; |
| 714 | |
Blue Swirl | cc5bea6 | 2012-04-14 14:56:48 +0000 | [diff] [blame] | 715 | if (memory_region_is_ram(section->mr)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 716 | /* Normal RAM. */ |
| 717 | iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 718 | + xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 719 | if (!section->readonly) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 720 | iotlb |= PHYS_SECTION_NOTDIRTY; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 721 | } else { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 722 | iotlb |= PHYS_SECTION_ROM; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 723 | } |
| 724 | } else { |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 725 | iotlb = section - address_space_memory.dispatch->sections; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 726 | iotlb += xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 727 | } |
| 728 | |
| 729 | /* Make accesses to pages with watchpoints go via the |
| 730 | watchpoint trap routines. */ |
| 731 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
| 732 | if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) { |
| 733 | /* Avoid trapping reads of pages with a write breakpoint. */ |
| 734 | if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 735 | iotlb = PHYS_SECTION_WATCH + paddr; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 736 | *address |= TLB_MMIO; |
| 737 | break; |
| 738 | } |
| 739 | } |
| 740 | } |
| 741 | |
| 742 | return iotlb; |
| 743 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 744 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 745 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 746 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 747 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 748 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 749 | uint16_t section); |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 750 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 751 | |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 752 | static uint16_t phys_section_add(MemoryRegionSection *section) |
| 753 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 754 | /* The physical section number is ORed with a page-aligned |
| 755 | * pointer to produce the iotlb entries. Thus it should |
| 756 | * never overflow into the page-aligned value. |
| 757 | */ |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 758 | assert(next_map.sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 759 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 760 | if (next_map.sections_nb == next_map.sections_nb_alloc) { |
| 761 | next_map.sections_nb_alloc = MAX(next_map.sections_nb_alloc * 2, |
| 762 | 16); |
| 763 | next_map.sections = g_renew(MemoryRegionSection, next_map.sections, |
| 764 | next_map.sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 765 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 766 | next_map.sections[next_map.sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 767 | memory_region_ref(section->mr); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 768 | return next_map.sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 769 | } |
| 770 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 771 | static void phys_section_destroy(MemoryRegion *mr) |
| 772 | { |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 773 | memory_region_unref(mr); |
| 774 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 775 | if (mr->subpage) { |
| 776 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
| 777 | memory_region_destroy(&subpage->iomem); |
| 778 | g_free(subpage); |
| 779 | } |
| 780 | } |
| 781 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 782 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 783 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 784 | while (map->sections_nb > 0) { |
| 785 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 786 | phys_section_destroy(section->mr); |
| 787 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 788 | g_free(map->sections); |
| 789 | g_free(map->nodes); |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 790 | g_free(map); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 791 | } |
| 792 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 793 | static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 794 | { |
| 795 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 796 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 797 | & TARGET_PAGE_MASK; |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 798 | MemoryRegionSection *existing = phys_page_find(d->phys_map, base >> TARGET_PAGE_BITS, |
| 799 | next_map.nodes, next_map.sections); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 800 | MemoryRegionSection subsection = { |
| 801 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 802 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 803 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 804 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 805 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 806 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 807 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 808 | if (!(existing->mr->subpage)) { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 809 | subpage = subpage_init(d->as, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 810 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 811 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 812 | phys_section_add(&subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 813 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 814 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 815 | } |
| 816 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 817 | end = start + int128_get64(section->size) - 1; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 818 | subpage_register(subpage, start, end, phys_section_add(section)); |
| 819 | } |
| 820 | |
| 821 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 822 | static void register_multipage(AddressSpaceDispatch *d, |
| 823 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 824 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 825 | hwaddr start_addr = section->offset_within_address_space; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 826 | uint16_t section_index = phys_section_add(section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 827 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 828 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 829 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 830 | assert(num_pages); |
| 831 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 832 | } |
| 833 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 834 | static void mem_add(MemoryListener *listener, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 835 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 836 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 837 | AddressSpaceDispatch *d = as->next_dispatch; |
Paolo Bonzini | 99b9cc0 | 2013-05-27 13:18:01 +0200 | [diff] [blame] | 838 | MemoryRegionSection now = *section, remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 839 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 840 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 841 | if (now.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 842 | uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space) |
| 843 | - now.offset_within_address_space; |
| 844 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 845 | now.size = int128_min(int128_make64(left), now.size); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 846 | register_subpage(d, &now); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 847 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 848 | now.size = int128_zero(); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 849 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 850 | while (int128_ne(remain.size, now.size)) { |
| 851 | remain.size = int128_sub(remain.size, now.size); |
| 852 | remain.offset_within_address_space += int128_get64(now.size); |
| 853 | remain.offset_within_region += int128_get64(now.size); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 854 | now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 855 | if (int128_lt(remain.size, page_size)) { |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 856 | register_subpage(d, &now); |
Hu Tao | 8826624 | 2013-08-29 18:21:16 +0800 | [diff] [blame] | 857 | } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 858 | now.size = page_size; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 859 | register_subpage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 860 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 861 | now.size = int128_and(now.size, int128_neg(page_size)); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 862 | register_multipage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 863 | } |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 864 | } |
| 865 | } |
| 866 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 867 | void qemu_flush_coalesced_mmio_buffer(void) |
| 868 | { |
| 869 | if (kvm_enabled()) |
| 870 | kvm_flush_coalesced_mmio_buffer(); |
| 871 | } |
| 872 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 873 | void qemu_mutex_lock_ramlist(void) |
| 874 | { |
| 875 | qemu_mutex_lock(&ram_list.mutex); |
| 876 | } |
| 877 | |
| 878 | void qemu_mutex_unlock_ramlist(void) |
| 879 | { |
| 880 | qemu_mutex_unlock(&ram_list.mutex); |
| 881 | } |
| 882 | |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 883 | #if defined(__linux__) && !defined(TARGET_S390X) |
| 884 | |
| 885 | #include <sys/vfs.h> |
| 886 | |
| 887 | #define HUGETLBFS_MAGIC 0x958458f6 |
| 888 | |
| 889 | static long gethugepagesize(const char *path) |
| 890 | { |
| 891 | struct statfs fs; |
| 892 | int ret; |
| 893 | |
| 894 | do { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 895 | ret = statfs(path, &fs); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 896 | } while (ret != 0 && errno == EINTR); |
| 897 | |
| 898 | if (ret != 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 899 | perror(path); |
| 900 | return 0; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 901 | } |
| 902 | |
| 903 | if (fs.f_type != HUGETLBFS_MAGIC) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 904 | fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 905 | |
| 906 | return fs.f_bsize; |
| 907 | } |
| 908 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 909 | static void *file_ram_alloc(RAMBlock *block, |
| 910 | ram_addr_t memory, |
| 911 | const char *path) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 912 | { |
| 913 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 914 | char *sanitized_name; |
| 915 | char *c; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 916 | void *area; |
| 917 | int fd; |
| 918 | #ifdef MAP_POPULATE |
| 919 | int flags; |
| 920 | #endif |
| 921 | unsigned long hpagesize; |
| 922 | |
| 923 | hpagesize = gethugepagesize(path); |
| 924 | if (!hpagesize) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 925 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 926 | } |
| 927 | |
| 928 | if (memory < hpagesize) { |
| 929 | return NULL; |
| 930 | } |
| 931 | |
| 932 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 933 | fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n"); |
| 934 | return NULL; |
| 935 | } |
| 936 | |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 937 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
| 938 | sanitized_name = g_strdup(block->mr->name); |
| 939 | for (c = sanitized_name; *c != '\0'; c++) { |
| 940 | if (*c == '/') |
| 941 | *c = '_'; |
| 942 | } |
| 943 | |
| 944 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 945 | sanitized_name); |
| 946 | g_free(sanitized_name); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 947 | |
| 948 | fd = mkstemp(filename); |
| 949 | if (fd < 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 950 | perror("unable to create backing store for hugepages"); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 951 | g_free(filename); |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 952 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 953 | } |
| 954 | unlink(filename); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 955 | g_free(filename); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 956 | |
| 957 | memory = (memory+hpagesize-1) & ~(hpagesize-1); |
| 958 | |
| 959 | /* |
| 960 | * ftruncate is not supported by hugetlbfs in older |
| 961 | * hosts, so don't bother bailing out on errors. |
| 962 | * If anything goes wrong with it under other filesystems, |
| 963 | * mmap will fail. |
| 964 | */ |
| 965 | if (ftruncate(fd, memory)) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 966 | perror("ftruncate"); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 967 | |
| 968 | #ifdef MAP_POPULATE |
| 969 | /* NB: MAP_POPULATE won't exhaustively alloc all phys pages in the case |
| 970 | * MAP_PRIVATE is requested. For mem_prealloc we mmap as MAP_SHARED |
| 971 | * to sidestep this quirk. |
| 972 | */ |
| 973 | flags = mem_prealloc ? MAP_POPULATE | MAP_SHARED : MAP_PRIVATE; |
| 974 | area = mmap(0, memory, PROT_READ | PROT_WRITE, flags, fd, 0); |
| 975 | #else |
| 976 | area = mmap(0, memory, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0); |
| 977 | #endif |
| 978 | if (area == MAP_FAILED) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 979 | perror("file_ram_alloc: can't mmap RAM pages"); |
| 980 | close(fd); |
| 981 | return (NULL); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 982 | } |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 983 | block->fd = fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 984 | return area; |
| 985 | } |
| 986 | #endif |
| 987 | |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 988 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 989 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 990 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 991 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 992 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 993 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 994 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 995 | if (QTAILQ_EMPTY(&ram_list.blocks)) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 996 | return 0; |
| 997 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 998 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 999 | ram_addr_t end, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1000 | |
| 1001 | end = block->offset + block->length; |
| 1002 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1003 | QTAILQ_FOREACH(next_block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1004 | if (next_block->offset >= end) { |
| 1005 | next = MIN(next, next_block->offset); |
| 1006 | } |
| 1007 | } |
| 1008 | if (next - end >= size && next - end < mingap) { |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1009 | offset = end; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1010 | mingap = next - end; |
| 1011 | } |
| 1012 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1013 | |
| 1014 | if (offset == RAM_ADDR_MAX) { |
| 1015 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1016 | (uint64_t)size); |
| 1017 | abort(); |
| 1018 | } |
| 1019 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1020 | return offset; |
| 1021 | } |
| 1022 | |
Juan Quintela | 652d7ec | 2012-07-20 10:37:54 +0200 | [diff] [blame] | 1023 | ram_addr_t last_ram_offset(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1024 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1025 | RAMBlock *block; |
| 1026 | ram_addr_t last = 0; |
| 1027 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1028 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1029 | last = MAX(last, block->offset + block->length); |
| 1030 | |
| 1031 | return last; |
| 1032 | } |
| 1033 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1034 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1035 | { |
| 1036 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1037 | |
| 1038 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1039 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), |
| 1040 | "dump-guest-core", true)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1041 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1042 | if (ret) { |
| 1043 | perror("qemu_madvise"); |
| 1044 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1045 | "but dump_guest_core=off specified\n"); |
| 1046 | } |
| 1047 | } |
| 1048 | } |
| 1049 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1050 | void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev) |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1051 | { |
| 1052 | RAMBlock *new_block, *block; |
| 1053 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1054 | new_block = NULL; |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1055 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1056 | if (block->offset == addr) { |
| 1057 | new_block = block; |
| 1058 | break; |
| 1059 | } |
| 1060 | } |
| 1061 | assert(new_block); |
| 1062 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1063 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1064 | if (dev) { |
| 1065 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1066 | if (id) { |
| 1067 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1068 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1069 | } |
| 1070 | } |
| 1071 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1072 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1073 | /* This assumes the iothread lock is taken here too. */ |
| 1074 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1075 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1076 | if (block != new_block && !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1077 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1078 | new_block->idstr); |
| 1079 | abort(); |
| 1080 | } |
| 1081 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1082 | qemu_mutex_unlock_ramlist(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1083 | } |
| 1084 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1085 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1086 | { |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1087 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1088 | /* disabled by the user */ |
| 1089 | return 0; |
| 1090 | } |
| 1091 | |
| 1092 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1093 | } |
| 1094 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1095 | ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
| 1096 | MemoryRegion *mr) |
| 1097 | { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1098 | RAMBlock *block, *new_block; |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1099 | |
| 1100 | size = TARGET_PAGE_ALIGN(size); |
| 1101 | new_block = g_malloc0(sizeof(*new_block)); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1102 | new_block->fd = -1; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1103 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1104 | /* This assumes the iothread lock is taken here too. */ |
| 1105 | qemu_mutex_lock_ramlist(); |
Avi Kivity | 7c63736 | 2011-12-21 13:09:49 +0200 | [diff] [blame] | 1106 | new_block->mr = mr; |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1107 | new_block->offset = find_ram_offset(size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1108 | if (host) { |
| 1109 | new_block->host = host; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1110 | new_block->flags |= RAM_PREALLOC_MASK; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1111 | } else if (xen_enabled()) { |
| 1112 | if (mem_path) { |
| 1113 | fprintf(stderr, "-mem-path not supported with Xen\n"); |
| 1114 | exit(1); |
| 1115 | } |
| 1116 | xen_ram_alloc(new_block->offset, size, mr); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1117 | } else { |
| 1118 | if (mem_path) { |
| 1119 | #if defined (__linux__) && !defined(TARGET_S390X) |
| 1120 | new_block->host = file_ram_alloc(new_block, size, mem_path); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1121 | #else |
| 1122 | fprintf(stderr, "-mem-path option unsupported\n"); |
| 1123 | exit(1); |
| 1124 | #endif |
Markus Armbruster | 0628c18 | 2013-07-31 15:11:06 +0200 | [diff] [blame] | 1125 | } |
| 1126 | if (!new_block->host) { |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1127 | if (kvm_enabled()) { |
Christian Borntraeger | fdec991 | 2012-06-15 05:10:30 +0000 | [diff] [blame] | 1128 | /* some s390/kvm configurations have special constraints */ |
Paolo Bonzini | 6eebf95 | 2013-05-13 16:19:55 +0200 | [diff] [blame] | 1129 | new_block->host = kvm_ram_alloc(size); |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1130 | } else { |
Paolo Bonzini | 6eebf95 | 2013-05-13 16:19:55 +0200 | [diff] [blame] | 1131 | new_block->host = qemu_anon_ram_alloc(size); |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1132 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1133 | memory_try_enable_merging(new_block->host, size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1134 | } |
| 1135 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1136 | new_block->length = size; |
| 1137 | |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1138 | /* Keep the list sorted from biggest to smallest block. */ |
| 1139 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 1140 | if (block->length < new_block->length) { |
| 1141 | break; |
| 1142 | } |
| 1143 | } |
| 1144 | if (block) { |
| 1145 | QTAILQ_INSERT_BEFORE(block, new_block, next); |
| 1146 | } else { |
| 1147 | QTAILQ_INSERT_TAIL(&ram_list.blocks, new_block, next); |
| 1148 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1149 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1150 | |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1151 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1152 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1153 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1154 | ram_list.phys_dirty = g_realloc(ram_list.phys_dirty, |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1155 | last_ram_offset() >> TARGET_PAGE_BITS); |
Igor Mitsyanko | 5fda043 | 2012-08-10 18:45:11 +0400 | [diff] [blame] | 1156 | memset(ram_list.phys_dirty + (new_block->offset >> TARGET_PAGE_BITS), |
| 1157 | 0, size >> TARGET_PAGE_BITS); |
Juan Quintela | 1720aee | 2012-06-22 13:14:17 +0200 | [diff] [blame] | 1158 | cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1159 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1160 | qemu_ram_setup_dump(new_block->host, size); |
Luiz Capitulino | ad0b532 | 2012-10-05 16:47:57 -0300 | [diff] [blame] | 1161 | qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1162 | |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1163 | if (kvm_enabled()) |
| 1164 | kvm_setup_guest_memory(new_block->host, size); |
| 1165 | |
| 1166 | return new_block->offset; |
| 1167 | } |
| 1168 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1169 | ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1170 | { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1171 | return qemu_ram_alloc_from_ptr(size, NULL, mr); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1172 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1173 | |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1174 | void qemu_ram_free_from_ptr(ram_addr_t addr) |
| 1175 | { |
| 1176 | RAMBlock *block; |
| 1177 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1178 | /* This assumes the iothread lock is taken here too. */ |
| 1179 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1180 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1181 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1182 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1183 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1184 | ram_list.version++; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1185 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1186 | break; |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1187 | } |
| 1188 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1189 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1190 | } |
| 1191 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1192 | void qemu_ram_free(ram_addr_t addr) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1193 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1194 | RAMBlock *block; |
| 1195 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1196 | /* This assumes the iothread lock is taken here too. */ |
| 1197 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1198 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1199 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1200 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1201 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1202 | ram_list.version++; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1203 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1204 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1205 | } else if (xen_enabled()) { |
| 1206 | xen_invalidate_map_cache_entry(block->host); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1207 | } else if (block->fd >= 0) { |
| 1208 | munmap(block->host, block->length); |
| 1209 | close(block->fd); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1210 | } else { |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1211 | qemu_anon_ram_free(block->host, block->length); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1212 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1213 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1214 | break; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1215 | } |
| 1216 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1217 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1218 | |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1219 | } |
| 1220 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1221 | #ifndef _WIN32 |
| 1222 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 1223 | { |
| 1224 | RAMBlock *block; |
| 1225 | ram_addr_t offset; |
| 1226 | int flags; |
| 1227 | void *area, *vaddr; |
| 1228 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1229 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1230 | offset = addr - block->offset; |
| 1231 | if (offset < block->length) { |
| 1232 | vaddr = block->host + offset; |
| 1233 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1234 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1235 | } else if (xen_enabled()) { |
| 1236 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1237 | } else { |
| 1238 | flags = MAP_FIXED; |
| 1239 | munmap(vaddr, length); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1240 | if (block->fd >= 0) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1241 | #ifdef MAP_POPULATE |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1242 | flags |= mem_prealloc ? MAP_POPULATE | MAP_SHARED : |
| 1243 | MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1244 | #else |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1245 | flags |= MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1246 | #endif |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame^] | 1247 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1248 | flags, block->fd, offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1249 | } else { |
| 1250 | #if defined(TARGET_S390X) && defined(CONFIG_KVM) |
| 1251 | flags |= MAP_SHARED | MAP_ANONYMOUS; |
| 1252 | area = mmap(vaddr, length, PROT_EXEC|PROT_READ|PROT_WRITE, |
| 1253 | flags, -1, 0); |
| 1254 | #else |
| 1255 | flags |= MAP_PRIVATE | MAP_ANONYMOUS; |
| 1256 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1257 | flags, -1, 0); |
| 1258 | #endif |
| 1259 | } |
| 1260 | if (area != vaddr) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1261 | fprintf(stderr, "Could not remap addr: " |
| 1262 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n", |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1263 | length, addr); |
| 1264 | exit(1); |
| 1265 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1266 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1267 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1268 | } |
| 1269 | return; |
| 1270 | } |
| 1271 | } |
| 1272 | } |
| 1273 | #endif /* !_WIN32 */ |
| 1274 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1275 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 1276 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1277 | RAMBlock *block; |
| 1278 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1279 | /* The list is protected by the iothread lock here. */ |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1280 | block = ram_list.mru_block; |
| 1281 | if (block && addr - block->offset < block->length) { |
| 1282 | goto found; |
| 1283 | } |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1284 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1285 | if (addr - block->offset < block->length) { |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1286 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1287 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1288 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1289 | |
| 1290 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1291 | abort(); |
| 1292 | |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1293 | found: |
| 1294 | ram_list.mru_block = block; |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1295 | return block; |
| 1296 | } |
| 1297 | |
| 1298 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
| 1299 | With the exception of the softmmu code in this file, this should |
| 1300 | only be used for local memory (e.g. video ram) that the device owns, |
| 1301 | and knows it isn't going to access beyond the end of the block. |
| 1302 | |
| 1303 | It should not be used for general purpose DMA. |
| 1304 | Use cpu_physical_memory_map/cpu_physical_memory_rw instead. |
| 1305 | */ |
| 1306 | void *qemu_get_ram_ptr(ram_addr_t addr) |
| 1307 | { |
| 1308 | RAMBlock *block = qemu_get_ram_block(addr); |
| 1309 | |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1310 | if (xen_enabled()) { |
| 1311 | /* We need to check if the requested address is in the RAM |
| 1312 | * because we don't want to map the entire memory in QEMU. |
| 1313 | * In that case just map until the end of the page. |
| 1314 | */ |
| 1315 | if (block->offset == 0) { |
| 1316 | return xen_map_cache(addr, 0, 0); |
| 1317 | } else if (block->host == NULL) { |
| 1318 | block->host = |
| 1319 | xen_map_cache(block->offset, block->length, 1); |
| 1320 | } |
| 1321 | } |
| 1322 | return block->host + (addr - block->offset); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 1323 | } |
| 1324 | |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1325 | /* Return a host pointer to ram allocated with qemu_ram_alloc. Same as |
| 1326 | * qemu_get_ram_ptr but do not touch ram_list.mru_block. |
| 1327 | * |
| 1328 | * ??? Is this still necessary? |
Michael S. Tsirkin | b2e0a13 | 2010-11-22 19:52:34 +0200 | [diff] [blame] | 1329 | */ |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 1330 | static void *qemu_safe_ram_ptr(ram_addr_t addr) |
Michael S. Tsirkin | b2e0a13 | 2010-11-22 19:52:34 +0200 | [diff] [blame] | 1331 | { |
| 1332 | RAMBlock *block; |
| 1333 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1334 | /* The list is protected by the iothread lock here. */ |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1335 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Michael S. Tsirkin | b2e0a13 | 2010-11-22 19:52:34 +0200 | [diff] [blame] | 1336 | if (addr - block->offset < block->length) { |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1337 | if (xen_enabled()) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1338 | /* We need to check if the requested address is in the RAM |
| 1339 | * because we don't want to map the entire memory in QEMU. |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 1340 | * In that case just map until the end of the page. |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1341 | */ |
| 1342 | if (block->offset == 0) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1343 | return xen_map_cache(addr, 0, 0); |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1344 | } else if (block->host == NULL) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1345 | block->host = |
| 1346 | xen_map_cache(block->offset, block->length, 1); |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1347 | } |
| 1348 | } |
Michael S. Tsirkin | b2e0a13 | 2010-11-22 19:52:34 +0200 | [diff] [blame] | 1349 | return block->host + (addr - block->offset); |
| 1350 | } |
| 1351 | } |
| 1352 | |
| 1353 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1354 | abort(); |
| 1355 | |
| 1356 | return NULL; |
| 1357 | } |
| 1358 | |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1359 | /* Return a host pointer to guest's ram. Similar to qemu_get_ram_ptr |
| 1360 | * but takes a size argument */ |
Peter Maydell | cb85f7a | 2013-07-08 09:44:04 +0100 | [diff] [blame] | 1361 | static void *qemu_ram_ptr_length(ram_addr_t addr, hwaddr *size) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1362 | { |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 1363 | if (*size == 0) { |
| 1364 | return NULL; |
| 1365 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1366 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1367 | return xen_map_cache(addr, *size, 1); |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1368 | } else { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1369 | RAMBlock *block; |
| 1370 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1371 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1372 | if (addr - block->offset < block->length) { |
| 1373 | if (addr - block->offset + *size > block->length) |
| 1374 | *size = block->length - addr + block->offset; |
| 1375 | return block->host + (addr - block->offset); |
| 1376 | } |
| 1377 | } |
| 1378 | |
| 1379 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1380 | abort(); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1381 | } |
| 1382 | } |
| 1383 | |
Paolo Bonzini | 7443b43 | 2013-06-03 12:44:02 +0200 | [diff] [blame] | 1384 | /* Some of the softmmu routines need to translate from a host pointer |
| 1385 | (typically a TLB entry) back to a ram offset. */ |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1386 | MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 1387 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1388 | RAMBlock *block; |
| 1389 | uint8_t *host = ptr; |
| 1390 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1391 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1392 | *ram_addr = xen_ram_addr_from_mapcache(ptr); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1393 | return qemu_get_ram_block(*ram_addr)->mr; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 1394 | } |
| 1395 | |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1396 | block = ram_list.mru_block; |
| 1397 | if (block && block->host && host - block->host < block->length) { |
| 1398 | goto found; |
| 1399 | } |
| 1400 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1401 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1402 | /* This case append when the block is not mapped. */ |
| 1403 | if (block->host == NULL) { |
| 1404 | continue; |
| 1405 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1406 | if (host - block->host < block->length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1407 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1408 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1409 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1410 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1411 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1412 | |
| 1413 | found: |
| 1414 | *ram_addr = block->offset + (host - block->host); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1415 | return block->mr; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 1416 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1417 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1418 | static void notdirty_mem_write(void *opaque, hwaddr ram_addr, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1419 | uint64_t val, unsigned size) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1420 | { |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1421 | int dirty_flags; |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1422 | dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1423 | if (!(dirty_flags & CODE_DIRTY_FLAG)) { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1424 | tb_invalidate_phys_page_fast(ram_addr, size); |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1425 | dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1426 | } |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1427 | switch (size) { |
| 1428 | case 1: |
| 1429 | stb_p(qemu_get_ram_ptr(ram_addr), val); |
| 1430 | break; |
| 1431 | case 2: |
| 1432 | stw_p(qemu_get_ram_ptr(ram_addr), val); |
| 1433 | break; |
| 1434 | case 4: |
| 1435 | stl_p(qemu_get_ram_ptr(ram_addr), val); |
| 1436 | break; |
| 1437 | default: |
| 1438 | abort(); |
| 1439 | } |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1440 | dirty_flags |= (0xff & ~CODE_DIRTY_FLAG); |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1441 | cpu_physical_memory_set_dirty_flags(ram_addr, dirty_flags); |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1442 | /* we remove the notdirty callback only if the code has been |
| 1443 | flushed */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1444 | if (dirty_flags == 0xff) { |
| 1445 | CPUArchState *env = current_cpu->env_ptr; |
| 1446 | tlb_set_dirty(env, env->mem_io_vaddr); |
| 1447 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1448 | } |
| 1449 | |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1450 | static bool notdirty_mem_accepts(void *opaque, hwaddr addr, |
| 1451 | unsigned size, bool is_write) |
| 1452 | { |
| 1453 | return is_write; |
| 1454 | } |
| 1455 | |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1456 | static const MemoryRegionOps notdirty_mem_ops = { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1457 | .write = notdirty_mem_write, |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1458 | .valid.accepts = notdirty_mem_accepts, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1459 | .endianness = DEVICE_NATIVE_ENDIAN, |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1460 | }; |
| 1461 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1462 | /* Generate a debug exception if a watchpoint has been hit. */ |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1463 | static void check_watchpoint(int offset, int len_mask, int flags) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1464 | { |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1465 | CPUArchState *env = current_cpu->env_ptr; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1466 | target_ulong pc, cs_base; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1467 | target_ulong vaddr; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1468 | CPUWatchpoint *wp; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1469 | int cpu_flags; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1470 | |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1471 | if (env->watchpoint_hit) { |
| 1472 | /* We re-entered the check after replacing the TB. Now raise |
| 1473 | * the debug interrupt so that is will trigger after the |
| 1474 | * current instruction. */ |
Andreas Färber | c3affe5 | 2013-01-18 15:03:43 +0100 | [diff] [blame] | 1475 | cpu_interrupt(ENV_GET_CPU(env), CPU_INTERRUPT_DEBUG); |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1476 | return; |
| 1477 | } |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 1478 | vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 1479 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1480 | if ((vaddr == (wp->vaddr & len_mask) || |
| 1481 | (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) { |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1482 | wp->flags |= BP_WATCHPOINT_HIT; |
| 1483 | if (!env->watchpoint_hit) { |
| 1484 | env->watchpoint_hit = wp; |
Blue Swirl | 5a31652 | 2012-12-02 21:28:09 +0000 | [diff] [blame] | 1485 | tb_check_watchpoint(env); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1486 | if (wp->flags & BP_STOP_BEFORE_ACCESS) { |
| 1487 | env->exception_index = EXCP_DEBUG; |
Max Filippov | 488d657 | 2012-01-29 02:24:39 +0400 | [diff] [blame] | 1488 | cpu_loop_exit(env); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1489 | } else { |
| 1490 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); |
| 1491 | tb_gen_code(env, pc, cs_base, cpu_flags, 1); |
Max Filippov | 488d657 | 2012-01-29 02:24:39 +0400 | [diff] [blame] | 1492 | cpu_resume_from_signal(env, NULL); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1493 | } |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1494 | } |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1495 | } else { |
| 1496 | wp->flags &= ~BP_WATCHPOINT_HIT; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1497 | } |
| 1498 | } |
| 1499 | } |
| 1500 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1501 | /* Watchpoint access routines. Watchpoints are inserted using TLB tricks, |
| 1502 | so these check for a hit then pass through to the normal out-of-line |
| 1503 | phys routines. */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1504 | static uint64_t watch_mem_read(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1505 | unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1506 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1507 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ); |
| 1508 | switch (size) { |
| 1509 | case 1: return ldub_phys(addr); |
| 1510 | case 2: return lduw_phys(addr); |
| 1511 | case 4: return ldl_phys(addr); |
| 1512 | default: abort(); |
| 1513 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1514 | } |
| 1515 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1516 | static void watch_mem_write(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1517 | uint64_t val, unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1518 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1519 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_WRITE); |
| 1520 | switch (size) { |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1521 | case 1: |
| 1522 | stb_phys(addr, val); |
| 1523 | break; |
| 1524 | case 2: |
| 1525 | stw_phys(addr, val); |
| 1526 | break; |
| 1527 | case 4: |
| 1528 | stl_phys(addr, val); |
| 1529 | break; |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1530 | default: abort(); |
| 1531 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1532 | } |
| 1533 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1534 | static const MemoryRegionOps watch_mem_ops = { |
| 1535 | .read = watch_mem_read, |
| 1536 | .write = watch_mem_write, |
| 1537 | .endianness = DEVICE_NATIVE_ENDIAN, |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1538 | }; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1539 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1540 | static uint64_t subpage_read(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1541 | unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1542 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1543 | subpage_t *subpage = opaque; |
| 1544 | uint8_t buf[4]; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 1545 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1546 | #if defined(DEBUG_SUBPAGE) |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1547 | printf("%s: subpage %p len %d addr " TARGET_FMT_plx "\n", __func__, |
| 1548 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1549 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1550 | address_space_read(subpage->as, addr + subpage->base, buf, len); |
| 1551 | switch (len) { |
| 1552 | case 1: |
| 1553 | return ldub_p(buf); |
| 1554 | case 2: |
| 1555 | return lduw_p(buf); |
| 1556 | case 4: |
| 1557 | return ldl_p(buf); |
| 1558 | default: |
| 1559 | abort(); |
| 1560 | } |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1561 | } |
| 1562 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1563 | static void subpage_write(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1564 | uint64_t value, unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1565 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1566 | subpage_t *subpage = opaque; |
| 1567 | uint8_t buf[4]; |
| 1568 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1569 | #if defined(DEBUG_SUBPAGE) |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1570 | printf("%s: subpage %p len %d addr " TARGET_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1571 | " value %"PRIx64"\n", |
| 1572 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1573 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1574 | switch (len) { |
| 1575 | case 1: |
| 1576 | stb_p(buf, value); |
| 1577 | break; |
| 1578 | case 2: |
| 1579 | stw_p(buf, value); |
| 1580 | break; |
| 1581 | case 4: |
| 1582 | stl_p(buf, value); |
| 1583 | break; |
| 1584 | default: |
| 1585 | abort(); |
| 1586 | } |
| 1587 | address_space_write(subpage->as, addr + subpage->base, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1588 | } |
| 1589 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1590 | static bool subpage_accepts(void *opaque, hwaddr addr, |
| 1591 | unsigned size, bool is_write) |
| 1592 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1593 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1594 | #if defined(DEBUG_SUBPAGE) |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1595 | printf("%s: subpage %p %c len %d addr " TARGET_FMT_plx "\n", |
| 1596 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1597 | #endif |
| 1598 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1599 | return address_space_access_valid(subpage->as, addr + subpage->base, |
| 1600 | size, is_write); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1601 | } |
| 1602 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1603 | static const MemoryRegionOps subpage_ops = { |
| 1604 | .read = subpage_read, |
| 1605 | .write = subpage_write, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1606 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1607 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1608 | }; |
| 1609 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1610 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1611 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1612 | { |
| 1613 | int idx, eidx; |
| 1614 | |
| 1615 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 1616 | return -1; |
| 1617 | idx = SUBPAGE_IDX(start); |
| 1618 | eidx = SUBPAGE_IDX(end); |
| 1619 | #if defined(DEBUG_SUBPAGE) |
Blue Swirl | 0bf9e31 | 2009-07-20 17:19:25 +0000 | [diff] [blame] | 1620 | printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1621 | mmio, start, end, idx, eidx, memory); |
| 1622 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1623 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1624 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1625 | } |
| 1626 | |
| 1627 | return 0; |
| 1628 | } |
| 1629 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1630 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1631 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1632 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1633 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1634 | mmio = g_malloc0(sizeof(subpage_t)); |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1635 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1636 | mmio->as = as; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1637 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1638 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1639 | "subpage", TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 1640 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1641 | #if defined(DEBUG_SUBPAGE) |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1642 | printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__, |
| 1643 | mmio, base, TARGET_PAGE_SIZE, subpage_memory); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1644 | #endif |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1645 | subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1646 | |
| 1647 | return mmio; |
| 1648 | } |
| 1649 | |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1650 | static uint16_t dummy_section(MemoryRegion *mr) |
| 1651 | { |
| 1652 | MemoryRegionSection section = { |
| 1653 | .mr = mr, |
| 1654 | .offset_within_address_space = 0, |
| 1655 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1656 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1657 | }; |
| 1658 | |
| 1659 | return phys_section_add(§ion); |
| 1660 | } |
| 1661 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1662 | MemoryRegion *iotlb_to_region(hwaddr index) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1663 | { |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1664 | return address_space_memory.dispatch->sections[index & ~TARGET_PAGE_MASK].mr; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1665 | } |
| 1666 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1667 | static void io_mem_init(void) |
| 1668 | { |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1669 | memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX); |
| 1670 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1671 | "unassigned", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1672 | memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1673 | "notdirty", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1674 | memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1675 | "watch", UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1676 | } |
| 1677 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1678 | static void mem_begin(MemoryListener *listener) |
| 1679 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1680 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1681 | AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1); |
| 1682 | |
| 1683 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 }; |
| 1684 | d->as = as; |
| 1685 | as->next_dispatch = d; |
| 1686 | } |
| 1687 | |
| 1688 | static void mem_commit(MemoryListener *listener) |
| 1689 | { |
| 1690 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1691 | AddressSpaceDispatch *cur = as->dispatch; |
| 1692 | AddressSpaceDispatch *next = as->next_dispatch; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1693 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1694 | next->nodes = next_map.nodes; |
| 1695 | next->sections = next_map.sections; |
| 1696 | |
| 1697 | as->dispatch = next; |
| 1698 | g_free(cur); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1699 | } |
| 1700 | |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1701 | static void core_begin(MemoryListener *listener) |
| 1702 | { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1703 | uint16_t n; |
| 1704 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1705 | prev_map = g_new(PhysPageMap, 1); |
| 1706 | *prev_map = next_map; |
| 1707 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1708 | memset(&next_map, 0, sizeof(next_map)); |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1709 | n = dummy_section(&io_mem_unassigned); |
| 1710 | assert(n == PHYS_SECTION_UNASSIGNED); |
| 1711 | n = dummy_section(&io_mem_notdirty); |
| 1712 | assert(n == PHYS_SECTION_NOTDIRTY); |
| 1713 | n = dummy_section(&io_mem_rom); |
| 1714 | assert(n == PHYS_SECTION_ROM); |
| 1715 | n = dummy_section(&io_mem_watch); |
| 1716 | assert(n == PHYS_SECTION_WATCH); |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1717 | } |
| 1718 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1719 | /* This listener's commit run after the other AddressSpaceDispatch listeners'. |
| 1720 | * All AddressSpaceDispatch instances have switched to the next map. |
| 1721 | */ |
| 1722 | static void core_commit(MemoryListener *listener) |
| 1723 | { |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1724 | phys_sections_free(prev_map); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1725 | } |
| 1726 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 1727 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1728 | { |
Andreas Färber | 182735e | 2013-05-29 22:29:20 +0200 | [diff] [blame] | 1729 | CPUState *cpu; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1730 | |
| 1731 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 1732 | reset the modified entries */ |
| 1733 | /* XXX: slow ! */ |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 1734 | CPU_FOREACH(cpu) { |
Andreas Färber | 182735e | 2013-05-29 22:29:20 +0200 | [diff] [blame] | 1735 | CPUArchState *env = cpu->env_ptr; |
| 1736 | |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1737 | tlb_flush(env, 1); |
| 1738 | } |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1739 | } |
| 1740 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1741 | static void core_log_global_start(MemoryListener *listener) |
| 1742 | { |
| 1743 | cpu_physical_memory_set_dirty_tracking(1); |
| 1744 | } |
| 1745 | |
| 1746 | static void core_log_global_stop(MemoryListener *listener) |
| 1747 | { |
| 1748 | cpu_physical_memory_set_dirty_tracking(0); |
| 1749 | } |
| 1750 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1751 | static MemoryListener core_memory_listener = { |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1752 | .begin = core_begin, |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1753 | .commit = core_commit, |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1754 | .log_global_start = core_log_global_start, |
| 1755 | .log_global_stop = core_log_global_stop, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1756 | .priority = 1, |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1757 | }; |
| 1758 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 1759 | static MemoryListener tcg_memory_listener = { |
| 1760 | .commit = tcg_commit, |
| 1761 | }; |
| 1762 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1763 | void address_space_init_dispatch(AddressSpace *as) |
| 1764 | { |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1765 | as->dispatch = NULL; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1766 | as->dispatch_listener = (MemoryListener) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1767 | .begin = mem_begin, |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1768 | .commit = mem_commit, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1769 | .region_add = mem_add, |
| 1770 | .region_nop = mem_add, |
| 1771 | .priority = 0, |
| 1772 | }; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1773 | memory_listener_register(&as->dispatch_listener, as); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1774 | } |
| 1775 | |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1776 | void address_space_destroy_dispatch(AddressSpace *as) |
| 1777 | { |
| 1778 | AddressSpaceDispatch *d = as->dispatch; |
| 1779 | |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1780 | memory_listener_unregister(&as->dispatch_listener); |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1781 | g_free(d); |
| 1782 | as->dispatch = NULL; |
| 1783 | } |
| 1784 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1785 | static void memory_map_init(void) |
| 1786 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1787 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1788 | memory_region_init(system_memory, NULL, "system", INT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1789 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1790 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1791 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 1792 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 1793 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1794 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1795 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 1796 | memory_listener_register(&core_memory_listener, &address_space_memory); |
liguang | 2641689 | 2013-09-04 14:37:33 +0800 | [diff] [blame] | 1797 | if (tcg_enabled()) { |
| 1798 | memory_listener_register(&tcg_memory_listener, &address_space_memory); |
| 1799 | } |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1800 | } |
| 1801 | |
| 1802 | MemoryRegion *get_system_memory(void) |
| 1803 | { |
| 1804 | return system_memory; |
| 1805 | } |
| 1806 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1807 | MemoryRegion *get_system_io(void) |
| 1808 | { |
| 1809 | return system_io; |
| 1810 | } |
| 1811 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 1812 | #endif /* !defined(CONFIG_USER_ONLY) */ |
| 1813 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1814 | /* physical memory access (slow version, mainly for debug) */ |
| 1815 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 1816 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1817 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1818 | { |
| 1819 | int l, flags; |
| 1820 | target_ulong page; |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 1821 | void * p; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1822 | |
| 1823 | while (len > 0) { |
| 1824 | page = addr & TARGET_PAGE_MASK; |
| 1825 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 1826 | if (l > len) |
| 1827 | l = len; |
| 1828 | flags = page_get_flags(page); |
| 1829 | if (!(flags & PAGE_VALID)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1830 | return -1; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1831 | if (is_write) { |
| 1832 | if (!(flags & PAGE_WRITE)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1833 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1834 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1835 | if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1836 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1837 | memcpy(p, buf, l); |
| 1838 | unlock_user(p, addr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1839 | } else { |
| 1840 | if (!(flags & PAGE_READ)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1841 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1842 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1843 | if (!(p = lock_user(VERIFY_READ, addr, l, 1))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1844 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1845 | memcpy(buf, p, l); |
aurel32 | 5b25757 | 2008-04-28 08:54:59 +0000 | [diff] [blame] | 1846 | unlock_user(p, addr, 0); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1847 | } |
| 1848 | len -= l; |
| 1849 | buf += l; |
| 1850 | addr += l; |
| 1851 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1852 | return 0; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1853 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 1854 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1855 | #else |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1856 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1857 | static void invalidate_and_set_dirty(hwaddr addr, |
| 1858 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1859 | { |
| 1860 | if (!cpu_physical_memory_is_dirty(addr)) { |
| 1861 | /* invalidate code */ |
| 1862 | tb_invalidate_phys_page_range(addr, addr + length, 0); |
| 1863 | /* set dirty bit */ |
| 1864 | cpu_physical_memory_set_dirty_flags(addr, (0xff & ~CODE_DIRTY_FLAG)); |
| 1865 | } |
Anthony PERARD | e226939 | 2012-10-03 13:49:22 +0000 | [diff] [blame] | 1866 | xen_modified_memory(addr, length); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1867 | } |
| 1868 | |
Paolo Bonzini | 2bbfa05 | 2013-05-24 12:29:54 +0200 | [diff] [blame] | 1869 | static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) |
| 1870 | { |
| 1871 | if (memory_region_is_ram(mr)) { |
| 1872 | return !(is_write && mr->readonly); |
| 1873 | } |
| 1874 | if (memory_region_is_romd(mr)) { |
| 1875 | return !is_write; |
| 1876 | } |
| 1877 | |
| 1878 | return false; |
| 1879 | } |
| 1880 | |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1881 | static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1882 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 1883 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1884 | |
| 1885 | /* Regions are assumed to support 1-4 byte accesses unless |
| 1886 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1887 | if (access_size_max == 0) { |
| 1888 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1889 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1890 | |
| 1891 | /* Bound the maximum access by the alignment of the address. */ |
| 1892 | if (!mr->ops->impl.unaligned) { |
| 1893 | unsigned align_size_max = addr & -addr; |
| 1894 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 1895 | access_size_max = align_size_max; |
| 1896 | } |
| 1897 | } |
| 1898 | |
| 1899 | /* Don't attempt accesses larger than the maximum. */ |
| 1900 | if (l > access_size_max) { |
| 1901 | l = access_size_max; |
| 1902 | } |
Paolo Bonzini | 098178f | 2013-07-29 14:27:39 +0200 | [diff] [blame] | 1903 | if (l & (l - 1)) { |
| 1904 | l = 1 << (qemu_fls(l) - 1); |
| 1905 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1906 | |
| 1907 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1908 | } |
| 1909 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1910 | bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1911 | int len, bool is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1912 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1913 | hwaddr l; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1914 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 1915 | uint64_t val; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1916 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1917 | MemoryRegion *mr; |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1918 | bool error = false; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 1919 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1920 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1921 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1922 | mr = address_space_translate(as, addr, &addr1, &l, is_write); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 1923 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1924 | if (is_write) { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1925 | if (!memory_access_is_direct(mr, is_write)) { |
| 1926 | l = memory_access_size(mr, l, addr1); |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1927 | /* XXX: could force current_cpu to NULL to avoid |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 1928 | potential bugs */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1929 | switch (l) { |
| 1930 | case 8: |
| 1931 | /* 64 bit write access */ |
| 1932 | val = ldq_p(buf); |
| 1933 | error |= io_mem_write(mr, addr1, val, 8); |
| 1934 | break; |
| 1935 | case 4: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1936 | /* 32 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1937 | val = ldl_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1938 | error |= io_mem_write(mr, addr1, val, 4); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1939 | break; |
| 1940 | case 2: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1941 | /* 16 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1942 | val = lduw_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1943 | error |= io_mem_write(mr, addr1, val, 2); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1944 | break; |
| 1945 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1946 | /* 8 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1947 | val = ldub_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1948 | error |= io_mem_write(mr, addr1, val, 1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1949 | break; |
| 1950 | default: |
| 1951 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1952 | } |
Paolo Bonzini | 2bbfa05 | 2013-05-24 12:29:54 +0200 | [diff] [blame] | 1953 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1954 | addr1 += memory_region_get_ram_addr(mr); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1955 | /* RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 1956 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1957 | memcpy(ptr, buf, l); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1958 | invalidate_and_set_dirty(addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1959 | } |
| 1960 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1961 | if (!memory_access_is_direct(mr, is_write)) { |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1962 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1963 | l = memory_access_size(mr, l, addr1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1964 | switch (l) { |
| 1965 | case 8: |
| 1966 | /* 64 bit read access */ |
| 1967 | error |= io_mem_read(mr, addr1, &val, 8); |
| 1968 | stq_p(buf, val); |
| 1969 | break; |
| 1970 | case 4: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1971 | /* 32 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1972 | error |= io_mem_read(mr, addr1, &val, 4); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1973 | stl_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1974 | break; |
| 1975 | case 2: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1976 | /* 16 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1977 | error |= io_mem_read(mr, addr1, &val, 2); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1978 | stw_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1979 | break; |
| 1980 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1981 | /* 8 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1982 | error |= io_mem_read(mr, addr1, &val, 1); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1983 | stb_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1984 | break; |
| 1985 | default: |
| 1986 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1987 | } |
| 1988 | } else { |
| 1989 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1990 | ptr = qemu_get_ram_ptr(mr->ram_addr + addr1); |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1991 | memcpy(buf, ptr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1992 | } |
| 1993 | } |
| 1994 | len -= l; |
| 1995 | buf += l; |
| 1996 | addr += l; |
| 1997 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1998 | |
| 1999 | return error; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2000 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2001 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2002 | bool address_space_write(AddressSpace *as, hwaddr addr, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2003 | const uint8_t *buf, int len) |
| 2004 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2005 | return address_space_rw(as, addr, (uint8_t *)buf, len, true); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2006 | } |
| 2007 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2008 | bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2009 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2010 | return address_space_rw(as, addr, buf, len, false); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2011 | } |
| 2012 | |
| 2013 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2014 | void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2015 | int len, int is_write) |
| 2016 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2017 | address_space_rw(&address_space_memory, addr, buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2018 | } |
| 2019 | |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2020 | /* used for ROM loading : can write in RAM and ROM */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2021 | void cpu_physical_memory_write_rom(hwaddr addr, |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2022 | const uint8_t *buf, int len) |
| 2023 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2024 | hwaddr l; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2025 | uint8_t *ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2026 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2027 | MemoryRegion *mr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2028 | |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2029 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2030 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2031 | mr = address_space_translate(&address_space_memory, |
| 2032 | addr, &addr1, &l, true); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2033 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2034 | if (!(memory_region_is_ram(mr) || |
| 2035 | memory_region_is_romd(mr))) { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2036 | /* do nothing */ |
| 2037 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2038 | addr1 += memory_region_get_ram_addr(mr); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2039 | /* ROM/RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2040 | ptr = qemu_get_ram_ptr(addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2041 | memcpy(ptr, buf, l); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2042 | invalidate_and_set_dirty(addr1, l); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2043 | } |
| 2044 | len -= l; |
| 2045 | buf += l; |
| 2046 | addr += l; |
| 2047 | } |
| 2048 | } |
| 2049 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2050 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2051 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2052 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2053 | hwaddr addr; |
| 2054 | hwaddr len; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2055 | } BounceBuffer; |
| 2056 | |
| 2057 | static BounceBuffer bounce; |
| 2058 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2059 | typedef struct MapClient { |
| 2060 | void *opaque; |
| 2061 | void (*callback)(void *opaque); |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2062 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2063 | } MapClient; |
| 2064 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2065 | static QLIST_HEAD(map_client_list, MapClient) map_client_list |
| 2066 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2067 | |
| 2068 | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)) |
| 2069 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2070 | MapClient *client = g_malloc(sizeof(*client)); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2071 | |
| 2072 | client->opaque = opaque; |
| 2073 | client->callback = callback; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2074 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2075 | return client; |
| 2076 | } |
| 2077 | |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 2078 | static void cpu_unregister_map_client(void *_client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2079 | { |
| 2080 | MapClient *client = (MapClient *)_client; |
| 2081 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2082 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2083 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2084 | } |
| 2085 | |
| 2086 | static void cpu_notify_map_clients(void) |
| 2087 | { |
| 2088 | MapClient *client; |
| 2089 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2090 | while (!QLIST_EMPTY(&map_client_list)) { |
| 2091 | client = QLIST_FIRST(&map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2092 | client->callback(client->opaque); |
Isaku Yamahata | 34d5e94 | 2009-06-26 18:57:18 +0900 | [diff] [blame] | 2093 | cpu_unregister_map_client(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2094 | } |
| 2095 | } |
| 2096 | |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2097 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write) |
| 2098 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2099 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2100 | hwaddr l, xlat; |
| 2101 | |
| 2102 | while (len > 0) { |
| 2103 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2104 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2105 | if (!memory_access_is_direct(mr, is_write)) { |
| 2106 | l = memory_access_size(mr, l, addr); |
| 2107 | if (!memory_region_access_valid(mr, xlat, l, is_write)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2108 | return false; |
| 2109 | } |
| 2110 | } |
| 2111 | |
| 2112 | len -= l; |
| 2113 | addr += l; |
| 2114 | } |
| 2115 | return true; |
| 2116 | } |
| 2117 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2118 | /* Map a physical memory region into a host virtual address. |
| 2119 | * May map a subset of the requested range, given by and returned in *plen. |
| 2120 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 2121 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2122 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 2123 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2124 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2125 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2126 | hwaddr addr, |
| 2127 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2128 | bool is_write) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2129 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2130 | hwaddr len = *plen; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2131 | hwaddr done = 0; |
| 2132 | hwaddr l, xlat, base; |
| 2133 | MemoryRegion *mr, *this_mr; |
| 2134 | ram_addr_t raddr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2135 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2136 | if (len == 0) { |
| 2137 | return NULL; |
| 2138 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2139 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2140 | l = len; |
| 2141 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2142 | if (!memory_access_is_direct(mr, is_write)) { |
| 2143 | if (bounce.buffer) { |
| 2144 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2145 | } |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2146 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE); |
| 2147 | bounce.addr = addr; |
| 2148 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2149 | |
| 2150 | memory_region_ref(mr); |
| 2151 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2152 | if (!is_write) { |
| 2153 | address_space_read(as, addr, bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2154 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2155 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2156 | *plen = l; |
| 2157 | return bounce.buffer; |
| 2158 | } |
| 2159 | |
| 2160 | base = xlat; |
| 2161 | raddr = memory_region_get_ram_addr(mr); |
| 2162 | |
| 2163 | for (;;) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2164 | len -= l; |
| 2165 | addr += l; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2166 | done += l; |
| 2167 | if (len == 0) { |
| 2168 | break; |
| 2169 | } |
| 2170 | |
| 2171 | l = len; |
| 2172 | this_mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2173 | if (this_mr != mr || xlat != base + done) { |
| 2174 | break; |
| 2175 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2176 | } |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2177 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2178 | memory_region_ref(mr); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2179 | *plen = done; |
| 2180 | return qemu_ram_ptr_length(raddr + base, plen); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2181 | } |
| 2182 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2183 | /* Unmaps a memory region previously mapped by address_space_map(). |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2184 | * Will also mark the memory as dirty if is_write == 1. access_len gives |
| 2185 | * the amount of memory that was actually read or written by the caller. |
| 2186 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2187 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
| 2188 | int is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2189 | { |
| 2190 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2191 | MemoryRegion *mr; |
| 2192 | ram_addr_t addr1; |
| 2193 | |
| 2194 | mr = qemu_ram_addr_from_host(buffer, &addr1); |
| 2195 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2196 | if (is_write) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2197 | while (access_len) { |
| 2198 | unsigned l; |
| 2199 | l = TARGET_PAGE_SIZE; |
| 2200 | if (l > access_len) |
| 2201 | l = access_len; |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2202 | invalidate_and_set_dirty(addr1, l); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2203 | addr1 += l; |
| 2204 | access_len -= l; |
| 2205 | } |
| 2206 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2207 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 2208 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 2209 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2210 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2211 | return; |
| 2212 | } |
| 2213 | if (is_write) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2214 | address_space_write(as, bounce.addr, bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2215 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 2216 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2217 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2218 | memory_region_unref(bounce.mr); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2219 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2220 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2221 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2222 | void *cpu_physical_memory_map(hwaddr addr, |
| 2223 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2224 | int is_write) |
| 2225 | { |
| 2226 | return address_space_map(&address_space_memory, addr, plen, is_write); |
| 2227 | } |
| 2228 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2229 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
| 2230 | int is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2231 | { |
| 2232 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 2233 | } |
| 2234 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2235 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2236 | static inline uint32_t ldl_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2237 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2238 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2239 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2240 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2241 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2242 | hwaddr l = 4; |
| 2243 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2244 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2245 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2246 | false); |
| 2247 | if (l < 4 || !memory_access_is_direct(mr, false)) { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2248 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2249 | io_mem_read(mr, addr1, &val, 4); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2250 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2251 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2252 | val = bswap32(val); |
| 2253 | } |
| 2254 | #else |
| 2255 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2256 | val = bswap32(val); |
| 2257 | } |
| 2258 | #endif |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2259 | } else { |
| 2260 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2261 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2262 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2263 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2264 | switch (endian) { |
| 2265 | case DEVICE_LITTLE_ENDIAN: |
| 2266 | val = ldl_le_p(ptr); |
| 2267 | break; |
| 2268 | case DEVICE_BIG_ENDIAN: |
| 2269 | val = ldl_be_p(ptr); |
| 2270 | break; |
| 2271 | default: |
| 2272 | val = ldl_p(ptr); |
| 2273 | break; |
| 2274 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2275 | } |
| 2276 | return val; |
| 2277 | } |
| 2278 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2279 | uint32_t ldl_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2280 | { |
| 2281 | return ldl_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2282 | } |
| 2283 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2284 | uint32_t ldl_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2285 | { |
| 2286 | return ldl_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2287 | } |
| 2288 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2289 | uint32_t ldl_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2290 | { |
| 2291 | return ldl_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2292 | } |
| 2293 | |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2294 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2295 | static inline uint64_t ldq_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2296 | enum device_endian endian) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2297 | { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2298 | uint8_t *ptr; |
| 2299 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2300 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2301 | hwaddr l = 8; |
| 2302 | hwaddr addr1; |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2303 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2304 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2305 | false); |
| 2306 | if (l < 8 || !memory_access_is_direct(mr, false)) { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2307 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2308 | io_mem_read(mr, addr1, &val, 8); |
Paolo Bonzini | 968a562 | 2013-05-24 17:58:37 +0200 | [diff] [blame] | 2309 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2310 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2311 | val = bswap64(val); |
| 2312 | } |
| 2313 | #else |
| 2314 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2315 | val = bswap64(val); |
| 2316 | } |
| 2317 | #endif |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2318 | } else { |
| 2319 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2320 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2321 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2322 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2323 | switch (endian) { |
| 2324 | case DEVICE_LITTLE_ENDIAN: |
| 2325 | val = ldq_le_p(ptr); |
| 2326 | break; |
| 2327 | case DEVICE_BIG_ENDIAN: |
| 2328 | val = ldq_be_p(ptr); |
| 2329 | break; |
| 2330 | default: |
| 2331 | val = ldq_p(ptr); |
| 2332 | break; |
| 2333 | } |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2334 | } |
| 2335 | return val; |
| 2336 | } |
| 2337 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2338 | uint64_t ldq_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2339 | { |
| 2340 | return ldq_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2341 | } |
| 2342 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2343 | uint64_t ldq_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2344 | { |
| 2345 | return ldq_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2346 | } |
| 2347 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2348 | uint64_t ldq_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2349 | { |
| 2350 | return ldq_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2351 | } |
| 2352 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2353 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2354 | uint32_t ldub_phys(hwaddr addr) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2355 | { |
| 2356 | uint8_t val; |
| 2357 | cpu_physical_memory_read(addr, &val, 1); |
| 2358 | return val; |
| 2359 | } |
| 2360 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2361 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2362 | static inline uint32_t lduw_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2363 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2364 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2365 | uint8_t *ptr; |
| 2366 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2367 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2368 | hwaddr l = 2; |
| 2369 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2370 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2371 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2372 | false); |
| 2373 | if (l < 2 || !memory_access_is_direct(mr, false)) { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2374 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2375 | io_mem_read(mr, addr1, &val, 2); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2376 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2377 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2378 | val = bswap16(val); |
| 2379 | } |
| 2380 | #else |
| 2381 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2382 | val = bswap16(val); |
| 2383 | } |
| 2384 | #endif |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2385 | } else { |
| 2386 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2387 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2388 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2389 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2390 | switch (endian) { |
| 2391 | case DEVICE_LITTLE_ENDIAN: |
| 2392 | val = lduw_le_p(ptr); |
| 2393 | break; |
| 2394 | case DEVICE_BIG_ENDIAN: |
| 2395 | val = lduw_be_p(ptr); |
| 2396 | break; |
| 2397 | default: |
| 2398 | val = lduw_p(ptr); |
| 2399 | break; |
| 2400 | } |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2401 | } |
| 2402 | return val; |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2403 | } |
| 2404 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2405 | uint32_t lduw_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2406 | { |
| 2407 | return lduw_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2408 | } |
| 2409 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2410 | uint32_t lduw_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2411 | { |
| 2412 | return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2413 | } |
| 2414 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2415 | uint32_t lduw_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2416 | { |
| 2417 | return lduw_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2418 | } |
| 2419 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2420 | /* warning: addr must be aligned. The ram page is not masked as dirty |
| 2421 | and the code inside is not invalidated. It is useful if the dirty |
| 2422 | bits are used to track modified PTEs */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2423 | void stl_phys_notdirty(hwaddr addr, uint32_t val) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2424 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2425 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2426 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2427 | hwaddr l = 4; |
| 2428 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2429 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2430 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2431 | true); |
| 2432 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
| 2433 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2434 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2435 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2436 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2437 | stl_p(ptr, val); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2438 | |
| 2439 | if (unlikely(in_migration)) { |
| 2440 | if (!cpu_physical_memory_is_dirty(addr1)) { |
| 2441 | /* invalidate code */ |
| 2442 | tb_invalidate_phys_page_range(addr1, addr1 + 4, 0); |
| 2443 | /* set dirty bit */ |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 2444 | cpu_physical_memory_set_dirty_flags( |
| 2445 | addr1, (0xff & ~CODE_DIRTY_FLAG)); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2446 | } |
| 2447 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2448 | } |
| 2449 | } |
| 2450 | |
| 2451 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2452 | static inline void stl_phys_internal(hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2453 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2454 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2455 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2456 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2457 | hwaddr l = 4; |
| 2458 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2459 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2460 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2461 | true); |
| 2462 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2463 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2464 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2465 | val = bswap32(val); |
| 2466 | } |
| 2467 | #else |
| 2468 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2469 | val = bswap32(val); |
| 2470 | } |
| 2471 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2472 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2473 | } else { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2474 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2475 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2476 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2477 | switch (endian) { |
| 2478 | case DEVICE_LITTLE_ENDIAN: |
| 2479 | stl_le_p(ptr, val); |
| 2480 | break; |
| 2481 | case DEVICE_BIG_ENDIAN: |
| 2482 | stl_be_p(ptr, val); |
| 2483 | break; |
| 2484 | default: |
| 2485 | stl_p(ptr, val); |
| 2486 | break; |
| 2487 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2488 | invalidate_and_set_dirty(addr1, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2489 | } |
| 2490 | } |
| 2491 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2492 | void stl_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2493 | { |
| 2494 | stl_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN); |
| 2495 | } |
| 2496 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2497 | void stl_le_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2498 | { |
| 2499 | stl_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN); |
| 2500 | } |
| 2501 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2502 | void stl_be_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2503 | { |
| 2504 | stl_phys_internal(addr, val, DEVICE_BIG_ENDIAN); |
| 2505 | } |
| 2506 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2507 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2508 | void stb_phys(hwaddr addr, uint32_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2509 | { |
| 2510 | uint8_t v = val; |
| 2511 | cpu_physical_memory_write(addr, &v, 1); |
| 2512 | } |
| 2513 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2514 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2515 | static inline void stw_phys_internal(hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2516 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2517 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2518 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2519 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2520 | hwaddr l = 2; |
| 2521 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2522 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2523 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2524 | true); |
| 2525 | if (l < 2 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2526 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2527 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2528 | val = bswap16(val); |
| 2529 | } |
| 2530 | #else |
| 2531 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2532 | val = bswap16(val); |
| 2533 | } |
| 2534 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2535 | io_mem_write(mr, addr1, val, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2536 | } else { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2537 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2538 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2539 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2540 | switch (endian) { |
| 2541 | case DEVICE_LITTLE_ENDIAN: |
| 2542 | stw_le_p(ptr, val); |
| 2543 | break; |
| 2544 | case DEVICE_BIG_ENDIAN: |
| 2545 | stw_be_p(ptr, val); |
| 2546 | break; |
| 2547 | default: |
| 2548 | stw_p(ptr, val); |
| 2549 | break; |
| 2550 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2551 | invalidate_and_set_dirty(addr1, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2552 | } |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2553 | } |
| 2554 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2555 | void stw_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2556 | { |
| 2557 | stw_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN); |
| 2558 | } |
| 2559 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2560 | void stw_le_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2561 | { |
| 2562 | stw_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN); |
| 2563 | } |
| 2564 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2565 | void stw_be_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2566 | { |
| 2567 | stw_phys_internal(addr, val, DEVICE_BIG_ENDIAN); |
| 2568 | } |
| 2569 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2570 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2571 | void stq_phys(hwaddr addr, uint64_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2572 | { |
| 2573 | val = tswap64(val); |
Stefan Weil | 71d2b72 | 2011-03-26 21:06:56 +0100 | [diff] [blame] | 2574 | cpu_physical_memory_write(addr, &val, 8); |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2575 | } |
| 2576 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2577 | void stq_le_phys(hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2578 | { |
| 2579 | val = cpu_to_le64(val); |
| 2580 | cpu_physical_memory_write(addr, &val, 8); |
| 2581 | } |
| 2582 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2583 | void stq_be_phys(hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2584 | { |
| 2585 | val = cpu_to_be64(val); |
| 2586 | cpu_physical_memory_write(addr, &val, 8); |
| 2587 | } |
| 2588 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2589 | /* virtual memory access for debug (includes writing to ROM) */ |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2590 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
bellard | b448f2f | 2004-02-25 23:24:04 +0000 | [diff] [blame] | 2591 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2592 | { |
| 2593 | int l; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2594 | hwaddr phys_addr; |
j_mayer | 9b3c35e | 2007-04-07 11:21:28 +0000 | [diff] [blame] | 2595 | target_ulong page; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2596 | |
| 2597 | while (len > 0) { |
| 2598 | page = addr & TARGET_PAGE_MASK; |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2599 | phys_addr = cpu_get_phys_page_debug(cpu, page); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2600 | /* if no physical page mapped, return an error */ |
| 2601 | if (phys_addr == -1) |
| 2602 | return -1; |
| 2603 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 2604 | if (l > len) |
| 2605 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2606 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2607 | if (is_write) |
| 2608 | cpu_physical_memory_write_rom(phys_addr, buf, l); |
| 2609 | else |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2610 | cpu_physical_memory_rw(phys_addr, buf, l, is_write); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2611 | len -= l; |
| 2612 | buf += l; |
| 2613 | addr += l; |
| 2614 | } |
| 2615 | return 0; |
| 2616 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2617 | #endif |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2618 | |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 2619 | #if !defined(CONFIG_USER_ONLY) |
| 2620 | |
| 2621 | /* |
| 2622 | * A helper function for the _utterly broken_ virtio device model to find out if |
| 2623 | * it's running on a big endian machine. Don't do this at home kids! |
| 2624 | */ |
| 2625 | bool virtio_is_big_endian(void); |
| 2626 | bool virtio_is_big_endian(void) |
| 2627 | { |
| 2628 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2629 | return true; |
| 2630 | #else |
| 2631 | return false; |
| 2632 | #endif |
| 2633 | } |
| 2634 | |
| 2635 | #endif |
| 2636 | |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2637 | #ifndef CONFIG_USER_ONLY |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2638 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2639 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2640 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2641 | hwaddr l = 1; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2642 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2643 | mr = address_space_translate(&address_space_memory, |
| 2644 | phys_addr, &phys_addr, &l, false); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2645 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2646 | return !(memory_region_is_ram(mr) || |
| 2647 | memory_region_is_romd(mr)); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2648 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 2649 | |
| 2650 | void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
| 2651 | { |
| 2652 | RAMBlock *block; |
| 2653 | |
| 2654 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 2655 | func(block->host, block->offset, block->length, opaque); |
| 2656 | } |
| 2657 | } |
Peter Maydell | ec3f8c9 | 2013-06-27 20:53:38 +0100 | [diff] [blame] | 2658 | #endif |