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bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
Peter Maydell7b31bbc2016-01-26 18:16:56 +000019#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010020#include "qapi/error.h"
bellard54936002003-05-13 00:25:15 +000021
Veronia Bahaaf348b6d2016-03-20 19:16:19 +020022#include "qemu/cutils.h"
bellard6180a182003-09-30 21:04:53 +000023#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010024#include "exec/exec-all.h"
Juan Quintela51180422017-04-24 20:50:19 +020025#include "exec/target_page.h"
bellardb67d9a52008-05-23 09:57:34 +000026#include "tcg.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020027#include "hw/qdev-core.h"
Fam Zhengc7e002c2017-07-14 10:15:08 +080028#include "hw/qdev-properties.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010029#if !defined(CONFIG_USER_ONLY)
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +020030#include "hw/boards.h"
Paolo Bonzini33c11872016-03-15 16:58:45 +010031#include "hw/xen/xen.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010032#endif
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Markus Armbruster2ff3de62013-07-04 15:09:22 +020034#include "sysemu/sysemu.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/timer.h"
36#include "qemu/config-file.h"
Andreas Färber75a34032013-09-02 16:57:02 +020037#include "qemu/error-report.h"
pbrook53a59602006-03-25 19:31:22 +000038#if defined(CONFIG_USER_ONLY)
Markus Armbrustera9c94272016-06-22 19:11:19 +020039#include "qemu.h"
Jun Nakajima432d2682010-08-31 16:41:25 +010040#else /* !CONFIG_USER_ONLY */
Paolo Bonzini741da0d2014-06-27 08:40:04 +020041#include "hw/hw.h"
42#include "exec/memory.h"
Paolo Bonzinidf43d492016-03-16 10:24:54 +010043#include "exec/ioport.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020044#include "sysemu/dma.h"
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +110045#include "sysemu/numa.h"
Christian Borntraeger79ca7a12017-03-07 15:19:08 +010046#include "sysemu/hw_accel.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020047#include "exec/address-spaces.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010048#include "sysemu/xen-mapcache.h"
Daniel P. Berrange0ab8ed12017-01-25 16:14:15 +000049#include "trace-root.h"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +000050
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000051#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000052#include <linux/falloc.h>
53#endif
54
pbrook53a59602006-03-25 19:31:22 +000055#endif
Mike Day0dc3f442013-09-05 14:41:35 -040056#include "qemu/rcu_queue.h"
Jan Kiszka4840f102015-06-18 18:47:22 +020057#include "qemu/main-loop.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000058#include "translate-all.h"
Pavel Dovgalyuk76159362015-09-17 19:25:07 +030059#include "sysemu/replay.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000060
Paolo Bonzini022c62c2012-12-17 18:19:49 +010061#include "exec/memory-internal.h"
Juan Quintela220c3eb2013-10-14 17:13:59 +020062#include "exec/ram_addr.h"
Paolo Bonzini508127e2016-01-07 16:55:28 +030063#include "exec/log.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020064
Bharata B Rao9dfeca72016-05-12 09:18:12 +053065#include "migration/vmstate.h"
66
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020067#include "qemu/range.h"
Michael S. Tsirkin794e8f32015-09-24 14:41:17 +030068#ifndef _WIN32
69#include "qemu/mmap-alloc.h"
70#endif
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020071
Peter Xube9b23c2017-05-12 12:17:41 +080072#include "monitor/monitor.h"
73
blueswir1db7b5422007-05-26 17:36:03 +000074//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000075
pbrook99773bd2006-04-16 15:14:59 +000076#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -040077/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
78 * are protected by the ramlist lock.
79 */
Mike Day0d53d9f2015-01-21 13:45:24 +010080RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030081
82static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030083static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030084
Avi Kivityf6790af2012-10-02 20:13:51 +020085AddressSpace address_space_io;
86AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020087
Paolo Bonzini0844e002013-05-24 14:37:28 +020088MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020089static MemoryRegion io_mem_unassigned;
Avi Kivity0e0df1e2012-01-02 00:32:15 +020090
Paolo Bonzini7bd4f432014-05-14 17:43:22 +080091/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
92#define RAM_PREALLOC (1 << 0)
93
Paolo Bonzinidbcb8982014-06-10 19:15:24 +080094/* RAM is mmap-ed with MAP_SHARED */
95#define RAM_SHARED (1 << 1)
96
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +020097/* Only a portion of RAM (used_length) is actually used, and migrated.
98 * This used_length size can change across reboots.
99 */
100#define RAM_RESIZEABLE (1 << 2)
101
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +0000102/* UFFDIO_ZEROPAGE is available on this RAMBlock to atomically
103 * zero the page and wake waiting processes.
104 * (Set during postcopy)
105 */
106#define RAM_UF_ZEROPAGE (1 << 3)
Cédric Le Goaterb895de52018-05-14 08:57:00 +0200107
108/* RAM can be migrated */
109#define RAM_MIGRATABLE (1 << 4)
pbrooke2eef172008-06-08 01:09:01 +0000110#endif
bellard9fa3e852004-01-04 18:06:42 +0000111
Peter Maydell20bccb82016-10-24 16:26:49 +0100112#ifdef TARGET_PAGE_BITS_VARY
113int target_page_bits;
114bool target_page_bits_decided;
115#endif
116
Andreas Färberbdc44642013-06-24 23:50:24 +0200117struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
bellard6a00d602005-11-21 23:25:50 +0000118/* current CPU in the current thread. It is only valid inside
119 cpu_exec() */
Paolo Bonzinif240eb62015-08-26 00:17:58 +0200120__thread CPUState *current_cpu;
pbrook2e70f6e2008-06-29 01:03:05 +0000121/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +0000122 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +0000123 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +0100124int use_icount;
bellard6a00d602005-11-21 23:25:50 +0000125
Yang Zhonga0be0c52017-07-03 18:12:13 +0800126uintptr_t qemu_host_page_size;
127intptr_t qemu_host_page_mask;
Yang Zhonga0be0c52017-07-03 18:12:13 +0800128
Peter Maydell20bccb82016-10-24 16:26:49 +0100129bool set_preferred_target_page_bits(int bits)
130{
131 /* The target page size is the lowest common denominator for all
132 * the CPUs in the system, so we can only make it smaller, never
133 * larger. And we can't make it smaller once we've committed to
134 * a particular size.
135 */
136#ifdef TARGET_PAGE_BITS_VARY
137 assert(bits >= TARGET_PAGE_BITS_MIN);
138 if (target_page_bits == 0 || target_page_bits > bits) {
139 if (target_page_bits_decided) {
140 return false;
141 }
142 target_page_bits = bits;
143 }
144#endif
145 return true;
146}
147
pbrooke2eef172008-06-08 01:09:01 +0000148#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +0200149
Peter Maydell20bccb82016-10-24 16:26:49 +0100150static void finalize_target_page_bits(void)
151{
152#ifdef TARGET_PAGE_BITS_VARY
153 if (target_page_bits == 0) {
154 target_page_bits = TARGET_PAGE_BITS_MIN;
155 }
156 target_page_bits_decided = true;
157#endif
158}
159
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200160typedef struct PhysPageEntry PhysPageEntry;
161
162struct PhysPageEntry {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200163 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200164 uint32_t skip : 6;
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200165 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200166 uint32_t ptr : 26;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200167};
168
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200169#define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
170
Paolo Bonzini03f49952013-11-07 17:14:36 +0100171/* Size of the L2 (and L3, etc) page tables. */
Paolo Bonzini57271d62013-11-07 17:14:37 +0100172#define ADDR_SPACE_BITS 64
Paolo Bonzini03f49952013-11-07 17:14:36 +0100173
Michael S. Tsirkin026736c2013-11-13 20:13:03 +0200174#define P_L2_BITS 9
Paolo Bonzini03f49952013-11-07 17:14:36 +0100175#define P_L2_SIZE (1 << P_L2_BITS)
176
177#define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
178
179typedef PhysPageEntry Node[P_L2_SIZE];
Paolo Bonzini0475d942013-05-29 12:28:21 +0200180
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200181typedef struct PhysPageMap {
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100182 struct rcu_head rcu;
183
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200184 unsigned sections_nb;
185 unsigned sections_nb_alloc;
186 unsigned nodes_nb;
187 unsigned nodes_nb_alloc;
188 Node *nodes;
189 MemoryRegionSection *sections;
190} PhysPageMap;
191
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200192struct AddressSpaceDispatch {
Fam Zheng729633c2016-03-01 14:18:24 +0800193 MemoryRegionSection *mru_section;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200194 /* This is a multi-level map on the physical address space.
195 * The bottom level has pointers to MemoryRegionSections.
196 */
197 PhysPageEntry phys_map;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200198 PhysPageMap map;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200199};
200
Jan Kiszka90260c62013-05-26 21:46:51 +0200201#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
202typedef struct subpage_t {
203 MemoryRegion iomem;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000204 FlatView *fv;
Jan Kiszka90260c62013-05-26 21:46:51 +0200205 hwaddr base;
Vijaya Kumar K2615fab2016-10-24 16:26:49 +0100206 uint16_t sub_section[];
Jan Kiszka90260c62013-05-26 21:46:51 +0200207} subpage_t;
208
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200209#define PHYS_SECTION_UNASSIGNED 0
210#define PHYS_SECTION_NOTDIRTY 1
211#define PHYS_SECTION_ROM 2
212#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200213
pbrooke2eef172008-06-08 01:09:01 +0000214static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300215static void memory_map_init(void);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000216static void tcg_commit(MemoryListener *listener);
pbrooke2eef172008-06-08 01:09:01 +0000217
Avi Kivity1ec9b902012-01-02 12:47:48 +0200218static MemoryRegion io_mem_watch;
Peter Maydell32857f42015-10-01 15:29:50 +0100219
220/**
221 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
222 * @cpu: the CPU whose AddressSpace this is
223 * @as: the AddressSpace itself
224 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
225 * @tcg_as_listener: listener for tracking changes to the AddressSpace
226 */
227struct CPUAddressSpace {
228 CPUState *cpu;
229 AddressSpace *as;
230 struct AddressSpaceDispatch *memory_dispatch;
231 MemoryListener tcg_as_listener;
232};
233
Gerd Hoffmann8deaf122017-04-21 11:16:25 +0200234struct DirtyBitmapSnapshot {
235 ram_addr_t start;
236 ram_addr_t end;
237 unsigned long dirty[];
238};
239
pbrook6658ffb2007-03-16 23:58:11 +0000240#endif
bellard54936002003-05-13 00:25:15 +0000241
Paul Brook6d9a1302010-02-28 23:55:53 +0000242#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200243
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200244static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200245{
Peter Lieven101420b2016-07-15 12:03:50 +0200246 static unsigned alloc_hint = 16;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200247 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
Peter Lieven101420b2016-07-15 12:03:50 +0200248 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200249 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
250 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
Peter Lieven101420b2016-07-15 12:03:50 +0200251 alloc_hint = map->nodes_nb_alloc;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200252 }
253}
254
Paolo Bonzinidb946042015-05-21 15:12:29 +0200255static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200256{
257 unsigned i;
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200258 uint32_t ret;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200259 PhysPageEntry e;
260 PhysPageEntry *p;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200261
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200262 ret = map->nodes_nb++;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200263 p = map->nodes[ret];
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200264 assert(ret != PHYS_MAP_NODE_NIL);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200265 assert(ret != map->nodes_nb_alloc);
Paolo Bonzinidb946042015-05-21 15:12:29 +0200266
267 e.skip = leaf ? 0 : 1;
268 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100269 for (i = 0; i < P_L2_SIZE; ++i) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200270 memcpy(&p[i], &e, sizeof(e));
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200271 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200272 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200273}
274
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200275static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
276 hwaddr *index, hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200277 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200278{
279 PhysPageEntry *p;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100280 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200281
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200282 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200283 lp->ptr = phys_map_node_alloc(map, level == 0);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200284 }
Paolo Bonzinidb946042015-05-21 15:12:29 +0200285 p = map->nodes[lp->ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100286 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200287
Paolo Bonzini03f49952013-11-07 17:14:36 +0100288 while (*nb && lp < &p[P_L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200289 if ((*index & (step - 1)) == 0 && *nb >= step) {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200290 lp->skip = 0;
Avi Kivityc19e8802012-02-13 20:25:31 +0200291 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200292 *index += step;
293 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200294 } else {
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200295 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
Avi Kivity29990972012-02-13 20:21:20 +0200296 }
297 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200298 }
299}
300
Avi Kivityac1970f2012-10-03 16:22:53 +0200301static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200302 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200303 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000304{
Avi Kivity29990972012-02-13 20:21:20 +0200305 /* Wildly overreserve - it doesn't matter much. */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200306 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000307
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200308 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000309}
310
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200311/* Compact a non leaf page entry. Simply detect that the entry has a single child,
312 * and update our entry so we can skip it and go directly to the destination.
313 */
Marc-André Lureauefee6782016-09-28 16:37:20 +0400314static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200315{
316 unsigned valid_ptr = P_L2_SIZE;
317 int valid = 0;
318 PhysPageEntry *p;
319 int i;
320
321 if (lp->ptr == PHYS_MAP_NODE_NIL) {
322 return;
323 }
324
325 p = nodes[lp->ptr];
326 for (i = 0; i < P_L2_SIZE; i++) {
327 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
328 continue;
329 }
330
331 valid_ptr = i;
332 valid++;
333 if (p[i].skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400334 phys_page_compact(&p[i], nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200335 }
336 }
337
338 /* We can only compress if there's only one child. */
339 if (valid != 1) {
340 return;
341 }
342
343 assert(valid_ptr < P_L2_SIZE);
344
345 /* Don't compress if it won't fit in the # of bits we have. */
346 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
347 return;
348 }
349
350 lp->ptr = p[valid_ptr].ptr;
351 if (!p[valid_ptr].skip) {
352 /* If our only child is a leaf, make this a leaf. */
353 /* By design, we should have made this node a leaf to begin with so we
354 * should never reach here.
355 * But since it's so simple to handle this, let's do it just in case we
356 * change this rule.
357 */
358 lp->skip = 0;
359 } else {
360 lp->skip += p[valid_ptr].skip;
361 }
362}
363
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +1000364void address_space_dispatch_compact(AddressSpaceDispatch *d)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200365{
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200366 if (d->phys_map.skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400367 phys_page_compact(&d->phys_map, d->map.nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200368 }
369}
370
Fam Zheng29cb5332016-03-01 14:18:23 +0800371static inline bool section_covers_addr(const MemoryRegionSection *section,
372 hwaddr addr)
373{
374 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
375 * the section must cover the entire address space.
376 */
Richard Henderson258dfaa2016-06-29 15:48:03 -0700377 return int128_gethi(section->size) ||
Fam Zheng29cb5332016-03-01 14:18:23 +0800378 range_covers_byte(section->offset_within_address_space,
Richard Henderson258dfaa2016-06-29 15:48:03 -0700379 int128_getlo(section->size), addr);
Fam Zheng29cb5332016-03-01 14:18:23 +0800380}
381
Peter Xu003a0cf2017-05-15 16:50:57 +0800382static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
bellard92e873b2004-05-21 14:52:29 +0000383{
Peter Xu003a0cf2017-05-15 16:50:57 +0800384 PhysPageEntry lp = d->phys_map, *p;
385 Node *nodes = d->map.nodes;
386 MemoryRegionSection *sections = d->map.sections;
Michael S. Tsirkin97115a82013-11-13 20:08:19 +0200387 hwaddr index = addr >> TARGET_PAGE_BITS;
Avi Kivity31ab2b42012-02-13 16:44:19 +0200388 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200389
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200390 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200391 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200392 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200393 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200394 p = nodes[lp.ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100395 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200396 }
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200397
Fam Zheng29cb5332016-03-01 14:18:23 +0800398 if (section_covers_addr(&sections[lp.ptr], addr)) {
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200399 return &sections[lp.ptr];
400 } else {
401 return &sections[PHYS_SECTION_UNASSIGNED];
402 }
Avi Kivityf3705d52012-03-08 16:16:34 +0200403}
404
Blue Swirle5548612012-04-21 13:08:33 +0000405bool memory_region_is_unassigned(MemoryRegion *mr)
406{
Paolo Bonzini2a8e7492013-05-24 14:34:08 +0200407 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
Blue Swirle5548612012-04-21 13:08:33 +0000408 && mr != &io_mem_watch;
409}
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200410
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100411/* Called from RCU critical section */
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200412static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
Jan Kiszka90260c62013-05-26 21:46:51 +0200413 hwaddr addr,
414 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200415{
Fam Zheng729633c2016-03-01 14:18:24 +0800416 MemoryRegionSection *section = atomic_read(&d->mru_section);
Jan Kiszka90260c62013-05-26 21:46:51 +0200417 subpage_t *subpage;
418
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100419 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
420 !section_covers_addr(section, addr)) {
Peter Xu003a0cf2017-05-15 16:50:57 +0800421 section = phys_page_find(d, addr);
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100422 atomic_set(&d->mru_section, section);
Fam Zheng729633c2016-03-01 14:18:24 +0800423 }
Jan Kiszka90260c62013-05-26 21:46:51 +0200424 if (resolve_subpage && section->mr->subpage) {
425 subpage = container_of(section->mr, subpage_t, iomem);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200426 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200427 }
428 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200429}
430
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100431/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200432static MemoryRegionSection *
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200433address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
Jan Kiszka90260c62013-05-26 21:46:51 +0200434 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200435{
436 MemoryRegionSection *section;
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200437 MemoryRegion *mr;
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100438 Int128 diff;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200439
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200440 section = address_space_lookup_region(d, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200441 /* Compute offset within MemoryRegionSection */
442 addr -= section->offset_within_address_space;
443
444 /* Compute offset within MemoryRegion */
445 *xlat = addr + section->offset_within_region;
446
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200447 mr = section->mr;
Paolo Bonzinib242e0e2015-07-04 00:24:51 +0200448
449 /* MMIO registers can be expected to perform full-width accesses based only
450 * on their address, without considering adjacent registers that could
451 * decode to completely different MemoryRegions. When such registers
452 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
453 * regions overlap wildly. For this reason we cannot clamp the accesses
454 * here.
455 *
456 * If the length is small (as is the case for address_space_ldl/stl),
457 * everything works fine. If the incoming length is large, however,
458 * the caller really has to do the clamping through memory_access_size.
459 */
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200460 if (memory_region_is_ram(mr)) {
Paolo Bonzinie4a511f2015-06-17 10:36:54 +0200461 diff = int128_sub(section->size, int128_make64(addr));
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200462 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
463 }
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200464 return section;
465}
Jan Kiszka90260c62013-05-26 21:46:51 +0200466
Peter Xud5e5faf2017-10-10 11:42:45 +0200467/**
Paolo Bonzinia411c842018-03-03 17:24:04 +0100468 * address_space_translate_iommu - translate an address through an IOMMU
469 * memory region and then through the target address space.
470 *
471 * @iommu_mr: the IOMMU memory region that we start the translation from
472 * @addr: the address to be translated through the MMU
473 * @xlat: the translated address offset within the destination memory region.
474 * It cannot be %NULL.
475 * @plen_out: valid read/write length of the translated address. It
476 * cannot be %NULL.
477 * @page_mask_out: page mask for the translated address. This
478 * should only be meaningful for IOMMU translated
479 * addresses, since there may be huge pages that this bit
480 * would tell. It can be %NULL if we don't care about it.
481 * @is_write: whether the translation operation is for write
482 * @is_mmio: whether this can be MMIO, set true if it can
483 * @target_as: the address space targeted by the IOMMU
Peter Maydell2f7b0092018-05-31 14:50:53 +0100484 * @attrs: transaction attributes
Paolo Bonzinia411c842018-03-03 17:24:04 +0100485 *
486 * This function is called from RCU critical section. It is the common
487 * part of flatview_do_translate and address_space_translate_cached.
488 */
489static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
490 hwaddr *xlat,
491 hwaddr *plen_out,
492 hwaddr *page_mask_out,
493 bool is_write,
494 bool is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100495 AddressSpace **target_as,
496 MemTxAttrs attrs)
Paolo Bonzinia411c842018-03-03 17:24:04 +0100497{
498 MemoryRegionSection *section;
499 hwaddr page_mask = (hwaddr)-1;
500
501 do {
502 hwaddr addr = *xlat;
503 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
504 IOMMUTLBEntry iotlb = imrc->translate(iommu_mr, addr, is_write ?
505 IOMMU_WO : IOMMU_RO);
506
507 if (!(iotlb.perm & (1 << is_write))) {
508 goto unassigned;
509 }
510
511 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
512 | (addr & iotlb.addr_mask));
513 page_mask &= iotlb.addr_mask;
514 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
515 *target_as = iotlb.target_as;
516
517 section = address_space_translate_internal(
518 address_space_to_dispatch(iotlb.target_as), addr, xlat,
519 plen_out, is_mmio);
520
521 iommu_mr = memory_region_get_iommu(section->mr);
522 } while (unlikely(iommu_mr));
523
524 if (page_mask_out) {
525 *page_mask_out = page_mask;
526 }
527 return *section;
528
529unassigned:
530 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
531}
532
533/**
Peter Xud5e5faf2017-10-10 11:42:45 +0200534 * flatview_do_translate - translate an address in FlatView
535 *
536 * @fv: the flat view that we want to translate on
537 * @addr: the address to be translated in above address space
538 * @xlat: the translated address offset within memory region. It
539 * cannot be @NULL.
540 * @plen_out: valid read/write length of the translated address. It
541 * can be @NULL when we don't care about it.
542 * @page_mask_out: page mask for the translated address. This
543 * should only be meaningful for IOMMU translated
544 * addresses, since there may be huge pages that this bit
545 * would tell. It can be @NULL if we don't care about it.
546 * @is_write: whether the translation operation is for write
547 * @is_mmio: whether this can be MMIO, set true if it can
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200548 * @target_as: the address space targeted by the IOMMU
Peter Maydell49e14aa2018-05-31 14:50:53 +0100549 * @attrs: memory transaction attributes
Peter Xud5e5faf2017-10-10 11:42:45 +0200550 *
551 * This function is called from RCU critical section
552 */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000553static MemoryRegionSection flatview_do_translate(FlatView *fv,
554 hwaddr addr,
555 hwaddr *xlat,
Peter Xud5e5faf2017-10-10 11:42:45 +0200556 hwaddr *plen_out,
557 hwaddr *page_mask_out,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000558 bool is_write,
559 bool is_mmio,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100560 AddressSpace **target_as,
561 MemTxAttrs attrs)
Jan Kiszka90260c62013-05-26 21:46:51 +0200562{
Avi Kivity30951152012-10-30 13:47:46 +0200563 MemoryRegionSection *section;
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000564 IOMMUMemoryRegion *iommu_mr;
Peter Xud5e5faf2017-10-10 11:42:45 +0200565 hwaddr plen = (hwaddr)(-1);
566
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200567 if (!plen_out) {
568 plen_out = &plen;
Peter Xud5e5faf2017-10-10 11:42:45 +0200569 }
Avi Kivity30951152012-10-30 13:47:46 +0200570
Paolo Bonzinia411c842018-03-03 17:24:04 +0100571 section = address_space_translate_internal(
572 flatview_to_dispatch(fv), addr, xlat,
573 plen_out, is_mmio);
Avi Kivity30951152012-10-30 13:47:46 +0200574
Paolo Bonzinia411c842018-03-03 17:24:04 +0100575 iommu_mr = memory_region_get_iommu(section->mr);
576 if (unlikely(iommu_mr)) {
577 return address_space_translate_iommu(iommu_mr, xlat,
578 plen_out, page_mask_out,
579 is_write, is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100580 target_as, attrs);
Avi Kivity30951152012-10-30 13:47:46 +0200581 }
Peter Xud5e5faf2017-10-10 11:42:45 +0200582 if (page_mask_out) {
Paolo Bonzinia411c842018-03-03 17:24:04 +0100583 /* Not behind an IOMMU, use default page size. */
584 *page_mask_out = ~TARGET_PAGE_MASK;
Peter Xud5e5faf2017-10-10 11:42:45 +0200585 }
586
Peter Xua7640402017-05-17 16:57:42 +0800587 return *section;
Peter Xua7640402017-05-17 16:57:42 +0800588}
589
590/* Called from RCU critical section */
591IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
Peter Maydell7446eb02018-05-31 14:50:53 +0100592 bool is_write, MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800593{
594 MemoryRegionSection section;
Peter Xu076a93d2017-10-10 11:42:46 +0200595 hwaddr xlat, page_mask;
Peter Xua7640402017-05-17 16:57:42 +0800596
Peter Xu076a93d2017-10-10 11:42:46 +0200597 /*
598 * This can never be MMIO, and we don't really care about plen,
599 * but page mask.
600 */
601 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100602 NULL, &page_mask, is_write, false, &as,
603 attrs);
Peter Xua7640402017-05-17 16:57:42 +0800604
605 /* Illegal translation */
606 if (section.mr == &io_mem_unassigned) {
607 goto iotlb_fail;
608 }
609
610 /* Convert memory region offset into address space offset */
611 xlat += section.offset_within_address_space -
612 section.offset_within_region;
613
Peter Xua7640402017-05-17 16:57:42 +0800614 return (IOMMUTLBEntry) {
Alexey Kardashevskiye76bb182017-09-21 18:50:53 +1000615 .target_as = as,
Peter Xu076a93d2017-10-10 11:42:46 +0200616 .iova = addr & ~page_mask,
617 .translated_addr = xlat & ~page_mask,
618 .addr_mask = page_mask,
Peter Xua7640402017-05-17 16:57:42 +0800619 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
620 .perm = IOMMU_RW,
621 };
622
623iotlb_fail:
624 return (IOMMUTLBEntry) {0};
625}
626
627/* Called from RCU critical section */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000628MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +0100629 hwaddr *plen, bool is_write,
630 MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800631{
632 MemoryRegion *mr;
633 MemoryRegionSection section;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000634 AddressSpace *as = NULL;
Peter Xua7640402017-05-17 16:57:42 +0800635
636 /* This can be MMIO, so setup MMIO bit. */
Peter Xud5e5faf2017-10-10 11:42:45 +0200637 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100638 is_write, true, &as, attrs);
Peter Xua7640402017-05-17 16:57:42 +0800639 mr = section.mr;
640
Alexey Kardashevskiyfe680d02014-05-07 13:40:39 +0000641 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100642 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
Peter Crosthwaite23820db2015-03-16 22:35:54 -0700643 *plen = MIN(page, *plen);
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100644 }
645
Avi Kivity30951152012-10-30 13:47:46 +0200646 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200647}
648
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100649/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200650MemoryRegionSection *
Peter Maydelld7898cd2016-01-21 14:15:05 +0000651address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
Paolo Bonzini9d82b5a2013-08-16 08:26:30 +0200652 hwaddr *xlat, hwaddr *plen)
Jan Kiszka90260c62013-05-26 21:46:51 +0200653{
Avi Kivity30951152012-10-30 13:47:46 +0200654 MemoryRegionSection *section;
Alex Bennéef35e44e2016-10-21 16:34:18 +0100655 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
Peter Maydelld7898cd2016-01-21 14:15:05 +0000656
657 section = address_space_translate_internal(d, addr, xlat, plen, false);
Avi Kivity30951152012-10-30 13:47:46 +0200658
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000659 assert(!memory_region_is_iommu(section->mr));
Avi Kivity30951152012-10-30 13:47:46 +0200660 return section;
Jan Kiszka90260c62013-05-26 21:46:51 +0200661}
bellard9fa3e852004-01-04 18:06:42 +0000662#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000663
Andreas Färberb170fce2013-01-20 20:23:22 +0100664#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000665
Juan Quintelae59fb372009-09-29 22:48:21 +0200666static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200667{
Andreas Färber259186a2013-01-17 18:51:17 +0100668 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200669
aurel323098dba2009-03-07 21:28:24 +0000670 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
671 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100672 cpu->interrupt_request &= ~0x01;
Alex Bennéed10eb082016-11-14 14:17:28 +0000673 tlb_flush(cpu);
pbrook9656f322008-07-01 20:01:19 +0000674
Pavel Dovgalyuk15a356c2018-01-10 16:48:46 +0300675 /* loadvm has just updated the content of RAM, bypassing the
676 * usual mechanisms that ensure we flush TBs for writes to
677 * memory we've translated code from. So we must flush all TBs,
678 * which will now be stale.
679 */
680 tb_flush(cpu);
681
pbrook9656f322008-07-01 20:01:19 +0000682 return 0;
683}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200684
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400685static int cpu_common_pre_load(void *opaque)
686{
687 CPUState *cpu = opaque;
688
Paolo Bonziniadee6422014-12-19 12:53:14 +0100689 cpu->exception_index = -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400690
691 return 0;
692}
693
694static bool cpu_common_exception_index_needed(void *opaque)
695{
696 CPUState *cpu = opaque;
697
Paolo Bonziniadee6422014-12-19 12:53:14 +0100698 return tcg_enabled() && cpu->exception_index != -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400699}
700
701static const VMStateDescription vmstate_cpu_common_exception_index = {
702 .name = "cpu_common/exception_index",
703 .version_id = 1,
704 .minimum_version_id = 1,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200705 .needed = cpu_common_exception_index_needed,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400706 .fields = (VMStateField[]) {
707 VMSTATE_INT32(exception_index, CPUState),
708 VMSTATE_END_OF_LIST()
709 }
710};
711
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300712static bool cpu_common_crash_occurred_needed(void *opaque)
713{
714 CPUState *cpu = opaque;
715
716 return cpu->crash_occurred;
717}
718
719static const VMStateDescription vmstate_cpu_common_crash_occurred = {
720 .name = "cpu_common/crash_occurred",
721 .version_id = 1,
722 .minimum_version_id = 1,
723 .needed = cpu_common_crash_occurred_needed,
724 .fields = (VMStateField[]) {
725 VMSTATE_BOOL(crash_occurred, CPUState),
726 VMSTATE_END_OF_LIST()
727 }
728};
729
Andreas Färber1a1562f2013-06-17 04:09:11 +0200730const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200731 .name = "cpu_common",
732 .version_id = 1,
733 .minimum_version_id = 1,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400734 .pre_load = cpu_common_pre_load,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200735 .post_load = cpu_common_post_load,
Juan Quintela35d08452014-04-16 16:01:33 +0200736 .fields = (VMStateField[]) {
Andreas Färber259186a2013-01-17 18:51:17 +0100737 VMSTATE_UINT32(halted, CPUState),
738 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200739 VMSTATE_END_OF_LIST()
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400740 },
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200741 .subsections = (const VMStateDescription*[]) {
742 &vmstate_cpu_common_exception_index,
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300743 &vmstate_cpu_common_crash_occurred,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200744 NULL
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200745 }
746};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200747
pbrook9656f322008-07-01 20:01:19 +0000748#endif
749
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100750CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400751{
Andreas Färberbdc44642013-06-24 23:50:24 +0200752 CPUState *cpu;
Glauber Costa950f1472009-06-09 12:15:18 -0400753
Andreas Färberbdc44642013-06-24 23:50:24 +0200754 CPU_FOREACH(cpu) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100755 if (cpu->cpu_index == index) {
Andreas Färberbdc44642013-06-24 23:50:24 +0200756 return cpu;
Andreas Färber55e5c282012-12-17 06:18:02 +0100757 }
Glauber Costa950f1472009-06-09 12:15:18 -0400758 }
759
Andreas Färberbdc44642013-06-24 23:50:24 +0200760 return NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400761}
762
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000763#if !defined(CONFIG_USER_ONLY)
Peter Xu80ceb072017-11-23 17:23:32 +0800764void cpu_address_space_init(CPUState *cpu, int asidx,
765 const char *prefix, MemoryRegion *mr)
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000766{
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000767 CPUAddressSpace *newas;
Peter Xu80ceb072017-11-23 17:23:32 +0800768 AddressSpace *as = g_new0(AddressSpace, 1);
Peter Xu87a621d2017-11-23 17:23:33 +0800769 char *as_name;
Peter Xu80ceb072017-11-23 17:23:32 +0800770
771 assert(mr);
Peter Xu87a621d2017-11-23 17:23:33 +0800772 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
773 address_space_init(as, mr, as_name);
774 g_free(as_name);
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000775
776 /* Target code should have set num_ases before calling us */
777 assert(asidx < cpu->num_ases);
778
Peter Maydell56943e82016-01-21 14:15:04 +0000779 if (asidx == 0) {
780 /* address space 0 gets the convenience alias */
781 cpu->as = as;
782 }
783
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000784 /* KVM cannot currently support multiple address spaces. */
785 assert(asidx == 0 || !kvm_enabled());
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000786
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000787 if (!cpu->cpu_ases) {
788 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000789 }
Peter Maydell32857f42015-10-01 15:29:50 +0100790
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000791 newas = &cpu->cpu_ases[asidx];
792 newas->cpu = cpu;
793 newas->as = as;
Peter Maydell56943e82016-01-21 14:15:04 +0000794 if (tcg_enabled()) {
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000795 newas->tcg_as_listener.commit = tcg_commit;
796 memory_listener_register(&newas->tcg_as_listener, as);
Peter Maydell56943e82016-01-21 14:15:04 +0000797 }
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000798}
Peter Maydell651a5bc2016-01-21 14:15:05 +0000799
800AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
801{
802 /* Return the AddressSpace corresponding to the specified index */
803 return cpu->cpu_ases[asidx].as;
804}
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000805#endif
806
Laurent Vivier7bbc1242016-10-20 13:26:04 +0200807void cpu_exec_unrealizefn(CPUState *cpu)
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530808{
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530809 CPUClass *cc = CPU_GET_CLASS(cpu);
810
Paolo Bonzini267f6852016-08-28 03:45:14 +0200811 cpu_list_remove(cpu);
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530812
813 if (cc->vmsd != NULL) {
814 vmstate_unregister(NULL, cc->vmsd, cpu);
815 }
816 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
817 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
818 }
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530819}
820
Fam Zhengc7e002c2017-07-14 10:15:08 +0800821Property cpu_common_props[] = {
822#ifndef CONFIG_USER_ONLY
823 /* Create a memory property for softmmu CPU object,
824 * so users can wire up its memory. (This can't go in qom/cpu.c
825 * because that file is compiled only once for both user-mode
826 * and system builds.) The default if no link is set up is to use
827 * the system address space.
828 */
829 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
830 MemoryRegion *),
831#endif
832 DEFINE_PROP_END_OF_LIST(),
833};
834
Laurent Vivier39e329e2016-10-20 13:26:02 +0200835void cpu_exec_initfn(CPUState *cpu)
bellardfd6ce8f2003-05-14 19:00:11 +0000836{
Peter Maydell56943e82016-01-21 14:15:04 +0000837 cpu->as = NULL;
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000838 cpu->num_ases = 0;
Peter Maydell56943e82016-01-21 14:15:04 +0000839
Eduardo Habkost291135b2015-04-27 17:00:33 -0300840#ifndef CONFIG_USER_ONLY
Eduardo Habkost291135b2015-04-27 17:00:33 -0300841 cpu->thread_id = qemu_get_thread_id();
Peter Crosthwaite6731d862016-01-21 14:15:06 +0000842 cpu->memory = system_memory;
843 object_ref(OBJECT(cpu->memory));
Eduardo Habkost291135b2015-04-27 17:00:33 -0300844#endif
Laurent Vivier39e329e2016-10-20 13:26:02 +0200845}
846
Laurent Vivierce5b1bb2016-10-20 13:26:03 +0200847void cpu_exec_realizefn(CPUState *cpu, Error **errp)
Laurent Vivier39e329e2016-10-20 13:26:02 +0200848{
Richard Henderson55c3cee2017-10-15 19:02:42 -0700849 CPUClass *cc = CPU_GET_CLASS(cpu);
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000850 static bool tcg_target_initialized;
Eduardo Habkost291135b2015-04-27 17:00:33 -0300851
Paolo Bonzini267f6852016-08-28 03:45:14 +0200852 cpu_list_add(cpu);
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200853
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000854 if (tcg_enabled() && !tcg_target_initialized) {
855 tcg_target_initialized = true;
Richard Henderson55c3cee2017-10-15 19:02:42 -0700856 cc->tcg_initialize();
857 }
858
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200859#ifndef CONFIG_USER_ONLY
Andreas Färbere0d47942013-07-29 04:07:50 +0200860 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200861 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
Andreas Färbere0d47942013-07-29 04:07:50 +0200862 }
Andreas Färberb170fce2013-01-20 20:23:22 +0100863 if (cc->vmsd != NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200864 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
Andreas Färberb170fce2013-01-20 20:23:22 +0100865 }
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200866#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000867}
868
Igor Mammedov2278b932018-02-07 11:40:26 +0100869const char *parse_cpu_model(const char *cpu_model)
870{
871 ObjectClass *oc;
872 CPUClass *cc;
873 gchar **model_pieces;
874 const char *cpu_type;
875
876 model_pieces = g_strsplit(cpu_model, ",", 2);
877
878 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
879 if (oc == NULL) {
880 error_report("unable to find CPU model '%s'", model_pieces[0]);
881 g_strfreev(model_pieces);
882 exit(EXIT_FAILURE);
883 }
884
885 cpu_type = object_class_get_name(oc);
886 cc = CPU_CLASS(oc);
887 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
888 g_strfreev(model_pieces);
889 return cpu_type;
890}
891
Pranith Kumar406bc332017-07-12 17:51:42 -0400892#if defined(CONFIG_USER_ONLY)
Andreas Färber00b941e2013-06-29 18:55:54 +0200893static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
Paul Brook94df27f2010-02-28 23:47:45 +0000894{
Pranith Kumar406bc332017-07-12 17:51:42 -0400895 mmap_lock();
896 tb_lock();
897 tb_invalidate_phys_page_range(pc, pc + 1, 0);
898 tb_unlock();
899 mmap_unlock();
Paul Brook94df27f2010-02-28 23:47:45 +0000900}
Pranith Kumar406bc332017-07-12 17:51:42 -0400901#else
902static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
903{
904 MemTxAttrs attrs;
905 hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
906 int asidx = cpu_asidx_from_attrs(cpu, attrs);
907 if (phys != -1) {
908 /* Locks grabbed by tb_invalidate_phys_addr */
909 tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
Peter Maydellc874dc42018-05-31 14:50:52 +0100910 phys | (pc & ~TARGET_PAGE_MASK), attrs);
Pranith Kumar406bc332017-07-12 17:51:42 -0400911 }
912}
913#endif
bellardd720b932004-04-25 17:57:43 +0000914
Paul Brookc527ee82010-03-01 03:31:14 +0000915#if defined(CONFIG_USER_ONLY)
Andreas Färber75a34032013-09-02 16:57:02 +0200916void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +0000917
918{
919}
920
Peter Maydell3ee887e2014-09-12 14:06:48 +0100921int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
922 int flags)
923{
924 return -ENOSYS;
925}
926
927void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
928{
929}
930
Andreas Färber75a34032013-09-02 16:57:02 +0200931int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
Paul Brookc527ee82010-03-01 03:31:14 +0000932 int flags, CPUWatchpoint **watchpoint)
933{
934 return -ENOSYS;
935}
936#else
pbrook6658ffb2007-03-16 23:58:11 +0000937/* Add a watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +0200938int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +0000939 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +0000940{
aliguoric0ce9982008-11-25 22:13:57 +0000941 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000942
Peter Maydell05068c02014-09-12 14:06:48 +0100943 /* forbid ranges which are empty or run off the end of the address space */
Max Filippov07e28632014-09-17 22:03:36 -0700944 if (len == 0 || (addr + len - 1) < addr) {
Andreas Färber75a34032013-09-02 16:57:02 +0200945 error_report("tried to set invalid watchpoint at %"
946 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
aliguorib4051332008-11-18 20:14:20 +0000947 return -EINVAL;
948 }
Anthony Liguori7267c092011-08-20 22:09:37 -0500949 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +0000950
aliguoria1d1bb32008-11-18 20:07:32 +0000951 wp->vaddr = addr;
Peter Maydell05068c02014-09-12 14:06:48 +0100952 wp->len = len;
aliguoria1d1bb32008-11-18 20:07:32 +0000953 wp->flags = flags;
954
aliguori2dc9f412008-11-18 20:56:59 +0000955 /* keep all GDB-injected watchpoints in front */
Andreas Färberff4700b2013-08-26 18:23:18 +0200956 if (flags & BP_GDB) {
957 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
958 } else {
959 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
960 }
aliguoria1d1bb32008-11-18 20:07:32 +0000961
Andreas Färber31b030d2013-09-04 01:29:02 +0200962 tlb_flush_page(cpu, addr);
aliguoria1d1bb32008-11-18 20:07:32 +0000963
964 if (watchpoint)
965 *watchpoint = wp;
966 return 0;
pbrook6658ffb2007-03-16 23:58:11 +0000967}
968
aliguoria1d1bb32008-11-18 20:07:32 +0000969/* Remove a specific watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +0200970int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +0000971 int flags)
pbrook6658ffb2007-03-16 23:58:11 +0000972{
aliguoria1d1bb32008-11-18 20:07:32 +0000973 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000974
Andreas Färberff4700b2013-08-26 18:23:18 +0200975 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +0100976 if (addr == wp->vaddr && len == wp->len
aliguori6e140f22008-11-18 20:37:55 +0000977 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
Andreas Färber75a34032013-09-02 16:57:02 +0200978 cpu_watchpoint_remove_by_ref(cpu, wp);
pbrook6658ffb2007-03-16 23:58:11 +0000979 return 0;
980 }
981 }
aliguoria1d1bb32008-11-18 20:07:32 +0000982 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +0000983}
984
aliguoria1d1bb32008-11-18 20:07:32 +0000985/* Remove a specific watchpoint by reference. */
Andreas Färber75a34032013-09-02 16:57:02 +0200986void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +0000987{
Andreas Färberff4700b2013-08-26 18:23:18 +0200988 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +0000989
Andreas Färber31b030d2013-09-04 01:29:02 +0200990 tlb_flush_page(cpu, watchpoint->vaddr);
aliguoria1d1bb32008-11-18 20:07:32 +0000991
Anthony Liguori7267c092011-08-20 22:09:37 -0500992 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +0000993}
994
aliguoria1d1bb32008-11-18 20:07:32 +0000995/* Remove all matching watchpoints. */
Andreas Färber75a34032013-09-02 16:57:02 +0200996void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +0000997{
aliguoric0ce9982008-11-25 22:13:57 +0000998 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +0000999
Andreas Färberff4700b2013-08-26 18:23:18 +02001000 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
Andreas Färber75a34032013-09-02 16:57:02 +02001001 if (wp->flags & mask) {
1002 cpu_watchpoint_remove_by_ref(cpu, wp);
1003 }
aliguoric0ce9982008-11-25 22:13:57 +00001004 }
aliguoria1d1bb32008-11-18 20:07:32 +00001005}
Peter Maydell05068c02014-09-12 14:06:48 +01001006
1007/* Return true if this watchpoint address matches the specified
1008 * access (ie the address range covered by the watchpoint overlaps
1009 * partially or completely with the address range covered by the
1010 * access).
1011 */
1012static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
1013 vaddr addr,
1014 vaddr len)
1015{
1016 /* We know the lengths are non-zero, but a little caution is
1017 * required to avoid errors in the case where the range ends
1018 * exactly at the top of the address space and so addr + len
1019 * wraps round to zero.
1020 */
1021 vaddr wpend = wp->vaddr + wp->len - 1;
1022 vaddr addrend = addr + len - 1;
1023
1024 return !(addr > wpend || wp->vaddr > addrend);
1025}
1026
Paul Brookc527ee82010-03-01 03:31:14 +00001027#endif
aliguoria1d1bb32008-11-18 20:07:32 +00001028
1029/* Add a breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001030int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +00001031 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001032{
aliguoric0ce9982008-11-25 22:13:57 +00001033 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +00001034
Anthony Liguori7267c092011-08-20 22:09:37 -05001035 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +00001036
1037 bp->pc = pc;
1038 bp->flags = flags;
1039
aliguori2dc9f412008-11-18 20:56:59 +00001040 /* keep all GDB-injected breakpoints in front */
Andreas Färber00b941e2013-06-29 18:55:54 +02001041 if (flags & BP_GDB) {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001042 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001043 } else {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001044 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001045 }
aliguoria1d1bb32008-11-18 20:07:32 +00001046
Andreas Färberf0c3c502013-08-26 21:22:53 +02001047 breakpoint_invalidate(cpu, pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001048
Andreas Färber00b941e2013-06-29 18:55:54 +02001049 if (breakpoint) {
aliguoria1d1bb32008-11-18 20:07:32 +00001050 *breakpoint = bp;
Andreas Färber00b941e2013-06-29 18:55:54 +02001051 }
aliguoria1d1bb32008-11-18 20:07:32 +00001052 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001053}
1054
1055/* Remove a specific breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001056int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +00001057{
aliguoria1d1bb32008-11-18 20:07:32 +00001058 CPUBreakpoint *bp;
1059
Andreas Färberf0c3c502013-08-26 21:22:53 +02001060 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +00001061 if (bp->pc == pc && bp->flags == flags) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001062 cpu_breakpoint_remove_by_ref(cpu, bp);
bellard4c3a88a2003-07-26 12:06:08 +00001063 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001064 }
bellard4c3a88a2003-07-26 12:06:08 +00001065 }
aliguoria1d1bb32008-11-18 20:07:32 +00001066 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +00001067}
1068
aliguoria1d1bb32008-11-18 20:07:32 +00001069/* Remove a specific breakpoint by reference. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001070void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001071{
Andreas Färberf0c3c502013-08-26 21:22:53 +02001072 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
1073
1074 breakpoint_invalidate(cpu, breakpoint->pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001075
Anthony Liguori7267c092011-08-20 22:09:37 -05001076 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +00001077}
1078
1079/* Remove all matching breakpoints. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001080void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001081{
aliguoric0ce9982008-11-25 22:13:57 +00001082 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001083
Andreas Färberf0c3c502013-08-26 21:22:53 +02001084 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001085 if (bp->flags & mask) {
1086 cpu_breakpoint_remove_by_ref(cpu, bp);
1087 }
aliguoric0ce9982008-11-25 22:13:57 +00001088 }
bellard4c3a88a2003-07-26 12:06:08 +00001089}
1090
bellardc33a3462003-07-29 20:50:33 +00001091/* enable or disable single step mode. EXCP_DEBUG is returned by the
1092 CPU loop after each instruction */
Andreas Färber3825b282013-06-24 18:41:06 +02001093void cpu_single_step(CPUState *cpu, int enabled)
bellardc33a3462003-07-29 20:50:33 +00001094{
Andreas Färbered2803d2013-06-21 20:20:45 +02001095 if (cpu->singlestep_enabled != enabled) {
1096 cpu->singlestep_enabled = enabled;
1097 if (kvm_enabled()) {
Stefan Weil38e478e2013-07-25 20:50:21 +02001098 kvm_update_guest_debug(cpu, 0);
Andreas Färbered2803d2013-06-21 20:20:45 +02001099 } else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +01001100 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +00001101 /* XXX: only flush what is necessary */
Peter Crosthwaitebbd77c12015-06-23 19:31:15 -07001102 tb_flush(cpu);
aliguorie22a25c2009-03-12 20:12:48 +00001103 }
bellardc33a3462003-07-29 20:50:33 +00001104 }
bellardc33a3462003-07-29 20:50:33 +00001105}
1106
Andreas Färbera47dddd2013-09-03 17:38:47 +02001107void cpu_abort(CPUState *cpu, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +00001108{
1109 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +00001110 va_list ap2;
bellard75012672003-06-21 13:11:07 +00001111
1112 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +00001113 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +00001114 fprintf(stderr, "qemu: fatal: ");
1115 vfprintf(stderr, fmt, ap);
1116 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +02001117 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
Paolo Bonzini013a2942015-11-13 13:16:27 +01001118 if (qemu_log_separate()) {
Richard Henderson1ee73212016-09-22 15:17:10 -07001119 qemu_log_lock();
aliguori93fcfe32009-01-15 22:34:14 +00001120 qemu_log("qemu: fatal: ");
1121 qemu_log_vprintf(fmt, ap2);
1122 qemu_log("\n");
Andreas Färbera0762852013-06-16 07:28:50 +02001123 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +00001124 qemu_log_flush();
Richard Henderson1ee73212016-09-22 15:17:10 -07001125 qemu_log_unlock();
aliguori93fcfe32009-01-15 22:34:14 +00001126 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +00001127 }
pbrook493ae1f2007-11-23 16:53:59 +00001128 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +00001129 va_end(ap);
Pavel Dovgalyuk76159362015-09-17 19:25:07 +03001130 replay_finish();
Riku Voipiofd052bf2010-01-25 14:30:49 +02001131#if defined(CONFIG_USER_ONLY)
1132 {
1133 struct sigaction act;
1134 sigfillset(&act.sa_mask);
1135 act.sa_handler = SIG_DFL;
1136 sigaction(SIGABRT, &act, NULL);
1137 }
1138#endif
bellard75012672003-06-21 13:11:07 +00001139 abort();
1140}
1141
bellard01243112004-01-04 15:48:17 +00001142#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -04001143/* Called from RCU critical section */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001144static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
1145{
1146 RAMBlock *block;
1147
Paolo Bonzini43771532013-09-09 17:58:40 +02001148 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001149 if (block && addr - block->offset < block->max_length) {
Paolo Bonzini68851b92015-10-22 13:51:30 +02001150 return block;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001151 }
Peter Xu99e15582017-05-12 12:17:39 +08001152 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001153 if (addr - block->offset < block->max_length) {
Paolo Bonzini041603f2013-09-09 17:49:45 +02001154 goto found;
1155 }
1156 }
1157
1158 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1159 abort();
1160
1161found:
Paolo Bonzini43771532013-09-09 17:58:40 +02001162 /* It is safe to write mru_block outside the iothread lock. This
1163 * is what happens:
1164 *
1165 * mru_block = xxx
1166 * rcu_read_unlock()
1167 * xxx removed from list
1168 * rcu_read_lock()
1169 * read mru_block
1170 * mru_block = NULL;
1171 * call_rcu(reclaim_ramblock, xxx);
1172 * rcu_read_unlock()
1173 *
1174 * atomic_rcu_set is not needed here. The block was already published
1175 * when it was placed into the list. Here we're just making an extra
1176 * copy of the pointer.
1177 */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001178 ram_list.mru_block = block;
1179 return block;
1180}
1181
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001182static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
bellard1ccde1c2004-02-06 19:46:14 +00001183{
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001184 CPUState *cpu;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001185 ram_addr_t start1;
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001186 RAMBlock *block;
1187 ram_addr_t end;
1188
1189 end = TARGET_PAGE_ALIGN(start + length);
1190 start &= TARGET_PAGE_MASK;
bellardf23db162005-08-21 19:12:28 +00001191
Mike Day0dc3f442013-09-05 14:41:35 -04001192 rcu_read_lock();
Paolo Bonzini041603f2013-09-09 17:49:45 +02001193 block = qemu_get_ram_block(start);
1194 assert(block == qemu_get_ram_block(end - 1));
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02001195 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001196 CPU_FOREACH(cpu) {
1197 tlb_reset_dirty(cpu, start1, length);
1198 }
Mike Day0dc3f442013-09-05 14:41:35 -04001199 rcu_read_unlock();
Juan Quintelad24981d2012-05-22 00:42:40 +02001200}
1201
1202/* Note: start and end must be within the same ram block. */
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001203bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1204 ram_addr_t length,
1205 unsigned client)
Juan Quintelad24981d2012-05-22 00:42:40 +02001206{
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001207 DirtyMemoryBlocks *blocks;
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001208 unsigned long end, page;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001209 bool dirty = false;
Juan Quintelad24981d2012-05-22 00:42:40 +02001210
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001211 if (length == 0) {
1212 return false;
1213 }
1214
1215 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1216 page = start >> TARGET_PAGE_BITS;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001217
1218 rcu_read_lock();
1219
1220 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1221
1222 while (page < end) {
1223 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1224 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1225 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1226
1227 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1228 offset, num);
1229 page += num;
1230 }
1231
1232 rcu_read_unlock();
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001233
1234 if (dirty && tcg_enabled()) {
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001235 tlb_reset_dirty_range_all(start, length);
Juan Quintelad24981d2012-05-22 00:42:40 +02001236 }
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001237
1238 return dirty;
bellard1ccde1c2004-02-06 19:46:14 +00001239}
1240
Gerd Hoffmann8deaf122017-04-21 11:16:25 +02001241DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
1242 (ram_addr_t start, ram_addr_t length, unsigned client)
1243{
1244 DirtyMemoryBlocks *blocks;
1245 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
1246 ram_addr_t first = QEMU_ALIGN_DOWN(start, align);
1247 ram_addr_t last = QEMU_ALIGN_UP(start + length, align);
1248 DirtyBitmapSnapshot *snap;
1249 unsigned long page, end, dest;
1250
1251 snap = g_malloc0(sizeof(*snap) +
1252 ((last - first) >> (TARGET_PAGE_BITS + 3)));
1253 snap->start = first;
1254 snap->end = last;
1255
1256 page = first >> TARGET_PAGE_BITS;
1257 end = last >> TARGET_PAGE_BITS;
1258 dest = 0;
1259
1260 rcu_read_lock();
1261
1262 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1263
1264 while (page < end) {
1265 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1266 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1267 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1268
1269 assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL)));
1270 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
1271 offset >>= BITS_PER_LEVEL;
1272
1273 bitmap_copy_and_clear_atomic(snap->dirty + dest,
1274 blocks->blocks[idx] + offset,
1275 num);
1276 page += num;
1277 dest += num >> BITS_PER_LEVEL;
1278 }
1279
1280 rcu_read_unlock();
1281
1282 if (tcg_enabled()) {
1283 tlb_reset_dirty_range_all(start, length);
1284 }
1285
1286 return snap;
1287}
1288
1289bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
1290 ram_addr_t start,
1291 ram_addr_t length)
1292{
1293 unsigned long page, end;
1294
1295 assert(start >= snap->start);
1296 assert(start + length <= snap->end);
1297
1298 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
1299 page = (start - snap->start) >> TARGET_PAGE_BITS;
1300
1301 while (page < end) {
1302 if (test_bit(page, snap->dirty)) {
1303 return true;
1304 }
1305 page++;
1306 }
1307 return false;
1308}
1309
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01001310/* Called from RCU critical section */
Andreas Färberbb0e6272013-09-03 13:32:01 +02001311hwaddr memory_region_section_get_iotlb(CPUState *cpu,
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001312 MemoryRegionSection *section,
1313 target_ulong vaddr,
1314 hwaddr paddr, hwaddr xlat,
1315 int prot,
1316 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +00001317{
Avi Kivitya8170e52012-10-23 12:30:10 +02001318 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +00001319 CPUWatchpoint *wp;
1320
Blue Swirlcc5bea62012-04-14 14:56:48 +00001321 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +00001322 /* Normal RAM. */
Paolo Bonzinie4e69792016-03-01 10:44:50 +01001323 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001324 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001325 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +00001326 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001327 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +00001328 }
1329 } else {
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001330 AddressSpaceDispatch *d;
1331
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001332 d = flatview_to_dispatch(section->fv);
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001333 iotlb = section - d->map.sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001334 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001335 }
1336
1337 /* Make accesses to pages with watchpoints go via the
1338 watchpoint trap routines. */
Andreas Färberff4700b2013-08-26 18:23:18 +02001339 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001340 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
Blue Swirle5548612012-04-21 13:08:33 +00001341 /* Avoid trapping reads of pages with a write breakpoint. */
1342 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001343 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +00001344 *address |= TLB_MMIO;
1345 break;
1346 }
1347 }
1348 }
1349
1350 return iotlb;
1351}
bellard9fa3e852004-01-04 18:06:42 +00001352#endif /* defined(CONFIG_USER_ONLY) */
1353
pbrooke2eef172008-06-08 01:09:01 +00001354#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +00001355
Anthony Liguoric227f092009-10-01 16:12:16 -05001356static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001357 uint16_t section);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001358static subpage_t *subpage_init(FlatView *fv, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +02001359
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001360static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
Igor Mammedova2b257d2014-10-31 16:38:37 +00001361 qemu_anon_ram_alloc;
Markus Armbruster91138032013-07-31 15:11:08 +02001362
1363/*
1364 * Set a custom physical guest memory alloator.
1365 * Accelerators with unusual needs may need this. Hopefully, we can
1366 * get rid of it eventually.
1367 */
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001368void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared))
Markus Armbruster91138032013-07-31 15:11:08 +02001369{
1370 phys_mem_alloc = alloc;
1371}
1372
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001373static uint16_t phys_section_add(PhysPageMap *map,
1374 MemoryRegionSection *section)
Avi Kivity5312bd82012-02-12 18:32:55 +02001375{
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001376 /* The physical section number is ORed with a page-aligned
1377 * pointer to produce the iotlb entries. Thus it should
1378 * never overflow into the page-aligned value.
1379 */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001380 assert(map->sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001381
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001382 if (map->sections_nb == map->sections_nb_alloc) {
1383 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1384 map->sections = g_renew(MemoryRegionSection, map->sections,
1385 map->sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +02001386 }
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001387 map->sections[map->sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001388 memory_region_ref(section->mr);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001389 return map->sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +02001390}
1391
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001392static void phys_section_destroy(MemoryRegion *mr)
1393{
Don Slutz55b4e802015-11-30 17:11:04 -05001394 bool have_sub_page = mr->subpage;
1395
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001396 memory_region_unref(mr);
1397
Don Slutz55b4e802015-11-30 17:11:04 -05001398 if (have_sub_page) {
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001399 subpage_t *subpage = container_of(mr, subpage_t, iomem);
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07001400 object_unref(OBJECT(&subpage->iomem));
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001401 g_free(subpage);
1402 }
1403}
1404
Paolo Bonzini60926662013-05-29 12:30:26 +02001405static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +02001406{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001407 while (map->sections_nb > 0) {
1408 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001409 phys_section_destroy(section->mr);
1410 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001411 g_free(map->sections);
1412 g_free(map->nodes);
Avi Kivity5312bd82012-02-12 18:32:55 +02001413}
1414
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001415static void register_subpage(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001416{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001417 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001418 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +02001419 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +02001420 & TARGET_PAGE_MASK;
Peter Xu003a0cf2017-05-15 16:50:57 +08001421 MemoryRegionSection *existing = phys_page_find(d, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001422 MemoryRegionSection subsection = {
1423 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001424 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +02001425 };
Avi Kivitya8170e52012-10-23 12:30:10 +02001426 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001427
Avi Kivityf3705d52012-03-08 16:16:34 +02001428 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001429
Avi Kivityf3705d52012-03-08 16:16:34 +02001430 if (!(existing->mr->subpage)) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001431 subpage = subpage_init(fv, base);
1432 subsection.fv = fv;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001433 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +02001434 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001435 phys_section_add(&d->map, &subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001436 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +02001437 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001438 }
1439 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001440 end = start + int128_get64(section->size) - 1;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001441 subpage_register(subpage, start, end,
1442 phys_section_add(&d->map, section));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001443}
1444
1445
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001446static void register_multipage(FlatView *fv,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001447 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +00001448{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001449 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivitya8170e52012-10-23 12:30:10 +02001450 hwaddr start_addr = section->offset_within_address_space;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001451 uint16_t section_index = phys_section_add(&d->map, section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001452 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1453 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +02001454
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001455 assert(num_pages);
1456 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +00001457}
1458
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10001459void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001460{
Paolo Bonzini99b9cc02013-05-27 13:18:01 +02001461 MemoryRegionSection now = *section, remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001462 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001463
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001464 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
1465 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
1466 - now.offset_within_address_space;
1467
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001468 now.size = int128_min(int128_make64(left), now.size);
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001469 register_subpage(fv, &now);
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001470 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001471 now.size = int128_zero();
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001472 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001473 while (int128_ne(remain.size, now.size)) {
1474 remain.size = int128_sub(remain.size, now.size);
1475 remain.offset_within_address_space += int128_get64(now.size);
1476 remain.offset_within_region += int128_get64(now.size);
Tyler Hall69b67642012-07-25 18:45:04 -04001477 now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001478 if (int128_lt(remain.size, page_size)) {
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001479 register_subpage(fv, &now);
Hu Tao88266242013-08-29 18:21:16 +08001480 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001481 now.size = page_size;
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001482 register_subpage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001483 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001484 now.size = int128_and(now.size, int128_neg(page_size));
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001485 register_multipage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001486 }
Avi Kivity0f0cb162012-02-13 17:14:32 +02001487 }
1488}
1489
Sheng Yang62a27442010-01-26 19:21:16 +08001490void qemu_flush_coalesced_mmio_buffer(void)
1491{
1492 if (kvm_enabled())
1493 kvm_flush_coalesced_mmio_buffer();
1494}
1495
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001496void qemu_mutex_lock_ramlist(void)
1497{
1498 qemu_mutex_lock(&ram_list.mutex);
1499}
1500
1501void qemu_mutex_unlock_ramlist(void)
1502{
1503 qemu_mutex_unlock(&ram_list.mutex);
1504}
1505
Peter Xube9b23c2017-05-12 12:17:41 +08001506void ram_block_dump(Monitor *mon)
1507{
1508 RAMBlock *block;
1509 char *psize;
1510
1511 rcu_read_lock();
1512 monitor_printf(mon, "%24s %8s %18s %18s %18s\n",
1513 "Block Name", "PSize", "Offset", "Used", "Total");
1514 RAMBLOCK_FOREACH(block) {
1515 psize = size_to_str(block->page_size);
1516 monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1517 " 0x%016" PRIx64 "\n", block->idstr, psize,
1518 (uint64_t)block->offset,
1519 (uint64_t)block->used_length,
1520 (uint64_t)block->max_length);
1521 g_free(psize);
1522 }
1523 rcu_read_unlock();
1524}
1525
Markus Armbrustere1e84ba2013-07-31 15:11:10 +02001526#ifdef __linux__
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001527/*
1528 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1529 * may or may not name the same files / on the same filesystem now as
1530 * when we actually open and map them. Iterate over the file
1531 * descriptors instead, and use qemu_fd_getpagesize().
1532 */
1533static int find_max_supported_pagesize(Object *obj, void *opaque)
1534{
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001535 long *hpsize_min = opaque;
1536
1537 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
David Gibson2b108082018-04-03 15:05:45 +10001538 long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj));
1539
David Gibson0de6e2a2018-04-03 14:55:11 +10001540 if (hpsize < *hpsize_min) {
1541 *hpsize_min = hpsize;
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001542 }
1543 }
1544
1545 return 0;
1546}
1547
1548long qemu_getrampagesize(void)
1549{
1550 long hpsize = LONG_MAX;
1551 long mainrampagesize;
1552 Object *memdev_root;
1553
David Gibson0de6e2a2018-04-03 14:55:11 +10001554 mainrampagesize = qemu_mempath_getpagesize(mem_path);
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001555
1556 /* it's possible we have memory-backend objects with
1557 * hugepage-backed RAM. these may get mapped into system
1558 * address space via -numa parameters or memory hotplug
1559 * hooks. we want to take these into account, but we
1560 * also want to make sure these supported hugepage
1561 * sizes are applicable across the entire range of memory
1562 * we may boot from, so we take the min across all
1563 * backends, and assume normal pages in cases where a
1564 * backend isn't backed by hugepages.
1565 */
1566 memdev_root = object_resolve_path("/objects", NULL);
1567 if (memdev_root) {
1568 object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize);
1569 }
1570 if (hpsize == LONG_MAX) {
1571 /* No additional memory regions found ==> Report main RAM page size */
1572 return mainrampagesize;
1573 }
1574
1575 /* If NUMA is disabled or the NUMA nodes are not backed with a
1576 * memory-backend, then there is at least one node using "normal" RAM,
1577 * so if its page size is smaller we have got to report that size instead.
1578 */
1579 if (hpsize > mainrampagesize &&
1580 (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) {
1581 static bool warned;
1582 if (!warned) {
1583 error_report("Huge page support disabled (n/a for main memory).");
1584 warned = true;
1585 }
1586 return mainrampagesize;
1587 }
1588
1589 return hpsize;
1590}
1591#else
1592long qemu_getrampagesize(void)
1593{
1594 return getpagesize();
1595}
1596#endif
1597
1598#ifdef __linux__
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001599static int64_t get_file_size(int fd)
1600{
1601 int64_t size = lseek(fd, 0, SEEK_END);
1602 if (size < 0) {
1603 return -errno;
1604 }
1605 return size;
1606}
1607
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001608static int file_ram_open(const char *path,
1609 const char *region_name,
1610 bool *created,
1611 Error **errp)
Marcelo Tosattic9027602010-03-01 20:25:08 -03001612{
1613 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -05001614 char *sanitized_name;
1615 char *c;
Paolo Bonzini5c3ece72016-03-17 15:53:13 +01001616 int fd = -1;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001617
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001618 *created = false;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001619 for (;;) {
1620 fd = open(path, O_RDWR);
1621 if (fd >= 0) {
1622 /* @path names an existing file, use it */
1623 break;
1624 }
1625 if (errno == ENOENT) {
1626 /* @path names a file that doesn't exist, create it */
1627 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1628 if (fd >= 0) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001629 *created = true;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001630 break;
1631 }
1632 } else if (errno == EISDIR) {
1633 /* @path names a directory, create a file there */
1634 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001635 sanitized_name = g_strdup(region_name);
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001636 for (c = sanitized_name; *c != '\0'; c++) {
1637 if (*c == '/') {
1638 *c = '_';
1639 }
1640 }
1641
1642 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1643 sanitized_name);
1644 g_free(sanitized_name);
1645
1646 fd = mkstemp(filename);
1647 if (fd >= 0) {
1648 unlink(filename);
1649 g_free(filename);
1650 break;
1651 }
1652 g_free(filename);
1653 }
1654 if (errno != EEXIST && errno != EINTR) {
1655 error_setg_errno(errp, errno,
1656 "can't open backing store %s for guest RAM",
1657 path);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001658 return -1;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001659 }
1660 /*
1661 * Try again on EINTR and EEXIST. The latter happens when
1662 * something else creates the file between our two open().
1663 */
1664 }
1665
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001666 return fd;
1667}
1668
1669static void *file_ram_alloc(RAMBlock *block,
1670 ram_addr_t memory,
1671 int fd,
1672 bool truncate,
1673 Error **errp)
1674{
1675 void *area;
1676
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001677 block->page_size = qemu_fd_getpagesize(fd);
Haozhong Zhang98376842017-12-11 15:28:04 +08001678 if (block->mr->align % block->page_size) {
1679 error_setg(errp, "alignment 0x%" PRIx64
1680 " must be multiples of page size 0x%zx",
1681 block->mr->align, block->page_size);
1682 return NULL;
1683 }
1684 block->mr->align = MAX(block->page_size, block->mr->align);
Haozhong Zhang83606682016-10-24 20:49:37 +08001685#if defined(__s390x__)
1686 if (kvm_enabled()) {
1687 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1688 }
1689#endif
Marcelo Tosattic9027602010-03-01 20:25:08 -03001690
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001691 if (memory < block->page_size) {
Hu Tao557529d2014-09-09 13:28:00 +08001692 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001693 "or larger than page size 0x%zx",
1694 memory, block->page_size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001695 return NULL;
Haozhong Zhang1775f112016-11-02 09:05:51 +08001696 }
1697
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001698 memory = ROUND_UP(memory, block->page_size);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001699
1700 /*
1701 * ftruncate is not supported by hugetlbfs in older
1702 * hosts, so don't bother bailing out on errors.
1703 * If anything goes wrong with it under other filesystems,
1704 * mmap will fail.
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001705 *
1706 * Do not truncate the non-empty backend file to avoid corrupting
1707 * the existing data in the file. Disabling shrinking is not
1708 * enough. For example, the current vNVDIMM implementation stores
1709 * the guest NVDIMM labels at the end of the backend file. If the
1710 * backend file is later extended, QEMU will not be able to find
1711 * those labels. Therefore, extending the non-empty backend file
1712 * is disabled as well.
Marcelo Tosattic9027602010-03-01 20:25:08 -03001713 */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001714 if (truncate && ftruncate(fd, memory)) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +09001715 perror("ftruncate");
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001716 }
Marcelo Tosattic9027602010-03-01 20:25:08 -03001717
Dominik Dingeld2f39ad2016-04-25 13:55:38 +02001718 area = qemu_ram_mmap(fd, memory, block->mr->align,
1719 block->flags & RAM_SHARED);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001720 if (area == MAP_FAILED) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001721 error_setg_errno(errp, errno,
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001722 "unable to map backing store for guest RAM");
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001723 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001724 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001725
1726 if (mem_prealloc) {
Jitendra Kolhe1e356fc2017-02-24 09:01:43 +05301727 os_mem_prealloc(fd, area, memory, smp_cpus, errp);
Igor Mammedov056b68a2016-07-20 11:54:03 +02001728 if (errp && *errp) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001729 qemu_ram_munmap(area, memory);
1730 return NULL;
Igor Mammedov056b68a2016-07-20 11:54:03 +02001731 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001732 }
1733
Alex Williamson04b16652010-07-02 11:13:17 -06001734 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001735 return area;
1736}
1737#endif
1738
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001739/* Allocate space within the ram_addr_t space that governs the
1740 * dirty bitmaps.
1741 * Called with the ramlist lock held.
1742 */
Alex Williamsond17b5282010-06-25 11:08:38 -06001743static ram_addr_t find_ram_offset(ram_addr_t size)
1744{
Alex Williamson04b16652010-07-02 11:13:17 -06001745 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -06001746 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001747
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +01001748 assert(size != 0); /* it would hand out same offset multiple times */
1749
Mike Day0dc3f442013-09-05 14:41:35 -04001750 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
Alex Williamson04b16652010-07-02 11:13:17 -06001751 return 0;
Mike Day0d53d9f2015-01-21 13:45:24 +01001752 }
Alex Williamson04b16652010-07-02 11:13:17 -06001753
Peter Xu99e15582017-05-12 12:17:39 +08001754 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001755 ram_addr_t candidate, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001756
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001757 /* Align blocks to start on a 'long' in the bitmap
1758 * which makes the bitmap sync'ing take the fast path.
1759 */
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001760 candidate = block->offset + block->max_length;
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001761 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
Alex Williamson04b16652010-07-02 11:13:17 -06001762
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001763 /* Search for the closest following block
1764 * and find the gap.
1765 */
Peter Xu99e15582017-05-12 12:17:39 +08001766 RAMBLOCK_FOREACH(next_block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001767 if (next_block->offset >= candidate) {
Alex Williamson04b16652010-07-02 11:13:17 -06001768 next = MIN(next, next_block->offset);
1769 }
1770 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001771
1772 /* If it fits remember our place and remember the size
1773 * of gap, but keep going so that we might find a smaller
1774 * gap to fill so avoiding fragmentation.
1775 */
1776 if (next - candidate >= size && next - candidate < mingap) {
1777 offset = candidate;
1778 mingap = next - candidate;
Alex Williamson04b16652010-07-02 11:13:17 -06001779 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001780
1781 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
Alex Williamson04b16652010-07-02 11:13:17 -06001782 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001783
1784 if (offset == RAM_ADDR_MAX) {
1785 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1786 (uint64_t)size);
1787 abort();
1788 }
1789
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001790 trace_find_ram_offset(size, offset);
1791
Alex Williamson04b16652010-07-02 11:13:17 -06001792 return offset;
1793}
1794
Juan Quintelab8c48992017-03-21 17:44:30 +01001795unsigned long last_ram_page(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001796{
Alex Williamsond17b5282010-06-25 11:08:38 -06001797 RAMBlock *block;
1798 ram_addr_t last = 0;
1799
Mike Day0dc3f442013-09-05 14:41:35 -04001800 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08001801 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001802 last = MAX(last, block->offset + block->max_length);
Mike Day0d53d9f2015-01-21 13:45:24 +01001803 }
Mike Day0dc3f442013-09-05 14:41:35 -04001804 rcu_read_unlock();
Juan Quintelab8c48992017-03-21 17:44:30 +01001805 return last >> TARGET_PAGE_BITS;
Alex Williamsond17b5282010-06-25 11:08:38 -06001806}
1807
Jason Baronddb97f12012-08-02 15:44:16 -04001808static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1809{
1810 int ret;
Jason Baronddb97f12012-08-02 15:44:16 -04001811
1812 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +02001813 if (!machine_dump_guest_core(current_machine)) {
Jason Baronddb97f12012-08-02 15:44:16 -04001814 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1815 if (ret) {
1816 perror("qemu_madvise");
1817 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1818 "but dump_guest_core=off specified\n");
1819 }
1820 }
1821}
1822
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00001823const char *qemu_ram_get_idstr(RAMBlock *rb)
1824{
1825 return rb->idstr;
1826}
1827
Dr. David Alan Gilbert463a4ac2017-03-07 18:36:36 +00001828bool qemu_ram_is_shared(RAMBlock *rb)
1829{
1830 return rb->flags & RAM_SHARED;
1831}
1832
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +00001833/* Note: Only set at the start of postcopy */
1834bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
1835{
1836 return rb->flags & RAM_UF_ZEROPAGE;
1837}
1838
1839void qemu_ram_set_uf_zeroable(RAMBlock *rb)
1840{
1841 rb->flags |= RAM_UF_ZEROPAGE;
1842}
1843
Cédric Le Goaterb895de52018-05-14 08:57:00 +02001844bool qemu_ram_is_migratable(RAMBlock *rb)
1845{
1846 return rb->flags & RAM_MIGRATABLE;
1847}
1848
1849void qemu_ram_set_migratable(RAMBlock *rb)
1850{
1851 rb->flags |= RAM_MIGRATABLE;
1852}
1853
1854void qemu_ram_unset_migratable(RAMBlock *rb)
1855{
1856 rb->flags &= ~RAM_MIGRATABLE;
1857}
1858
Mike Dayae3a7042013-09-05 14:41:35 -04001859/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08001860void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
Hu Tao20cfe882014-04-02 15:13:26 +08001861{
Gongleifa53a0e2016-05-10 10:04:59 +08001862 RAMBlock *block;
Hu Tao20cfe882014-04-02 15:13:26 +08001863
Avi Kivityc5705a72011-12-20 15:59:12 +02001864 assert(new_block);
1865 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001866
Anthony Liguori09e5ab62012-02-03 12:28:43 -06001867 if (dev) {
1868 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001869 if (id) {
1870 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05001871 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001872 }
1873 }
1874 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1875
Gongleiab0a9952016-05-10 10:05:00 +08001876 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08001877 RAMBLOCK_FOREACH(block) {
Gongleifa53a0e2016-05-10 10:04:59 +08001878 if (block != new_block &&
1879 !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06001880 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1881 new_block->idstr);
1882 abort();
1883 }
1884 }
Mike Day0dc3f442013-09-05 14:41:35 -04001885 rcu_read_unlock();
Avi Kivityc5705a72011-12-20 15:59:12 +02001886}
1887
Mike Dayae3a7042013-09-05 14:41:35 -04001888/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08001889void qemu_ram_unset_idstr(RAMBlock *block)
Hu Tao20cfe882014-04-02 15:13:26 +08001890{
Mike Dayae3a7042013-09-05 14:41:35 -04001891 /* FIXME: arch_init.c assumes that this is not called throughout
1892 * migration. Ignore the problem since hot-unplug during migration
1893 * does not work anyway.
1894 */
Hu Tao20cfe882014-04-02 15:13:26 +08001895 if (block) {
1896 memset(block->idstr, 0, sizeof(block->idstr));
1897 }
1898}
1899
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001900size_t qemu_ram_pagesize(RAMBlock *rb)
1901{
1902 return rb->page_size;
1903}
1904
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00001905/* Returns the largest size of page in use */
1906size_t qemu_ram_pagesize_largest(void)
1907{
1908 RAMBlock *block;
1909 size_t largest = 0;
1910
Peter Xu99e15582017-05-12 12:17:39 +08001911 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00001912 largest = MAX(largest, qemu_ram_pagesize(block));
1913 }
1914
1915 return largest;
1916}
1917
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001918static int memory_try_enable_merging(void *addr, size_t len)
1919{
Marcel Apfelbaum75cc7f02015-02-04 17:43:55 +02001920 if (!machine_mem_merge(current_machine)) {
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001921 /* disabled by the user */
1922 return 0;
1923 }
1924
1925 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1926}
1927
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001928/* Only legal before guest might have detected the memory size: e.g. on
1929 * incoming migration, or right after reset.
1930 *
1931 * As memory core doesn't know how is memory accessed, it is up to
1932 * resize callback to update device state and/or add assertions to detect
1933 * misuse, if necessary.
1934 */
Gongleifa53a0e2016-05-10 10:04:59 +08001935int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001936{
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001937 assert(block);
1938
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00001939 newsize = HOST_PAGE_ALIGN(newsize);
Michael S. Tsirkin129ddaf2015-02-17 10:15:30 +01001940
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001941 if (block->used_length == newsize) {
1942 return 0;
1943 }
1944
1945 if (!(block->flags & RAM_RESIZEABLE)) {
1946 error_setg_errno(errp, EINVAL,
1947 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1948 " in != 0x" RAM_ADDR_FMT, block->idstr,
1949 newsize, block->used_length);
1950 return -EINVAL;
1951 }
1952
1953 if (block->max_length < newsize) {
1954 error_setg_errno(errp, EINVAL,
1955 "Length too large: %s: 0x" RAM_ADDR_FMT
1956 " > 0x" RAM_ADDR_FMT, block->idstr,
1957 newsize, block->max_length);
1958 return -EINVAL;
1959 }
1960
1961 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
1962 block->used_length = newsize;
Paolo Bonzini58d27072015-03-23 11:56:01 +01001963 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
1964 DIRTY_CLIENTS_ALL);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001965 memory_region_set_size(block->mr, newsize);
1966 if (block->resized) {
1967 block->resized(block->idstr, newsize, block->host);
1968 }
1969 return 0;
1970}
1971
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001972/* Called with ram_list.mutex held */
1973static void dirty_memory_extend(ram_addr_t old_ram_size,
1974 ram_addr_t new_ram_size)
1975{
1976 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
1977 DIRTY_MEMORY_BLOCK_SIZE);
1978 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
1979 DIRTY_MEMORY_BLOCK_SIZE);
1980 int i;
1981
1982 /* Only need to extend if block count increased */
1983 if (new_num_blocks <= old_num_blocks) {
1984 return;
1985 }
1986
1987 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
1988 DirtyMemoryBlocks *old_blocks;
1989 DirtyMemoryBlocks *new_blocks;
1990 int j;
1991
1992 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
1993 new_blocks = g_malloc(sizeof(*new_blocks) +
1994 sizeof(new_blocks->blocks[0]) * new_num_blocks);
1995
1996 if (old_num_blocks) {
1997 memcpy(new_blocks->blocks, old_blocks->blocks,
1998 old_num_blocks * sizeof(old_blocks->blocks[0]));
1999 }
2000
2001 for (j = old_num_blocks; j < new_num_blocks; j++) {
2002 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
2003 }
2004
2005 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
2006
2007 if (old_blocks) {
2008 g_free_rcu(old_blocks, rcu);
2009 }
2010 }
2011}
2012
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002013static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared)
Avi Kivityc5705a72011-12-20 15:59:12 +02002014{
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002015 RAMBlock *block;
Mike Day0d53d9f2015-01-21 13:45:24 +01002016 RAMBlock *last_block = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002017 ram_addr_t old_ram_size, new_ram_size;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002018 Error *err = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002019
Juan Quintelab8c48992017-03-21 17:44:30 +01002020 old_ram_size = last_ram_page();
Avi Kivityc5705a72011-12-20 15:59:12 +02002021
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002022 qemu_mutex_lock_ramlist();
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002023 new_block->offset = find_ram_offset(new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002024
2025 if (!new_block->host) {
2026 if (xen_enabled()) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002027 xen_ram_alloc(new_block->offset, new_block->max_length,
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002028 new_block->mr, &err);
2029 if (err) {
2030 error_propagate(errp, err);
2031 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002032 return;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002033 }
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002034 } else {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002035 new_block->host = phys_mem_alloc(new_block->max_length,
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002036 &new_block->mr->align, shared);
Markus Armbruster39228252013-07-31 15:11:11 +02002037 if (!new_block->host) {
Hu Taoef701d72014-09-09 13:27:54 +08002038 error_setg_errno(errp, errno,
2039 "cannot set up guest memory '%s'",
2040 memory_region_name(new_block->mr));
2041 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002042 return;
Markus Armbruster39228252013-07-31 15:11:11 +02002043 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002044 memory_try_enable_merging(new_block->host, new_block->max_length);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09002045 }
2046 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002047
Li Zhijiandd631692015-07-02 20:18:06 +08002048 new_ram_size = MAX(old_ram_size,
2049 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
2050 if (new_ram_size > old_ram_size) {
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002051 dirty_memory_extend(old_ram_size, new_ram_size);
Li Zhijiandd631692015-07-02 20:18:06 +08002052 }
Mike Day0d53d9f2015-01-21 13:45:24 +01002053 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2054 * QLIST (which has an RCU-friendly variant) does not have insertion at
2055 * tail, so save the last element in last_block.
2056 */
Peter Xu99e15582017-05-12 12:17:39 +08002057 RAMBLOCK_FOREACH(block) {
Mike Day0d53d9f2015-01-21 13:45:24 +01002058 last_block = block;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002059 if (block->max_length < new_block->max_length) {
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002060 break;
2061 }
2062 }
2063 if (block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002064 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002065 } else if (last_block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002066 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002067 } else { /* list is empty */
Mike Day0dc3f442013-09-05 14:41:35 -04002068 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002069 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002070 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06002071
Mike Day0dc3f442013-09-05 14:41:35 -04002072 /* Write list before version */
2073 smp_wmb();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002074 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002075 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002076
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002077 cpu_physical_memory_set_dirty_range(new_block->offset,
Paolo Bonzini58d27072015-03-23 11:56:01 +01002078 new_block->used_length,
2079 DIRTY_CLIENTS_ALL);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002080
Paolo Bonzinia904c912015-01-21 16:18:35 +01002081 if (new_block->host) {
2082 qemu_ram_setup_dump(new_block->host, new_block->max_length);
2083 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
Cao jinc2cd6272016-09-12 14:34:56 +08002084 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
Paolo Bonzinia904c912015-01-21 16:18:35 +01002085 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
Paolo Bonzini0987d732016-12-21 00:31:36 +08002086 ram_block_notify_add(new_block->host, new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002087 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002088}
2089
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002090#ifdef __linux__
Marc-André Lureau38b33622017-06-02 18:12:23 +04002091RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
2092 bool share, int fd,
2093 Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002094{
2095 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002096 Error *local_err = NULL;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002097 int64_t file_size;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002098
2099 if (xen_enabled()) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002100 error_setg(errp, "-mem-path not supported with Xen");
Fam Zheng528f46a2016-03-01 14:18:18 +08002101 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002102 }
2103
Marc-André Lureaue45e7ae2017-06-02 18:12:21 +04002104 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2105 error_setg(errp,
2106 "host lacks kvm mmu notifiers, -mem-path unsupported");
2107 return NULL;
2108 }
2109
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002110 if (phys_mem_alloc != qemu_anon_ram_alloc) {
2111 /*
2112 * file_ram_alloc() needs to allocate just like
2113 * phys_mem_alloc, but we haven't bothered to provide
2114 * a hook there.
2115 */
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002116 error_setg(errp,
2117 "-mem-path not supported with this accelerator");
Fam Zheng528f46a2016-03-01 14:18:18 +08002118 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002119 }
2120
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002121 size = HOST_PAGE_ALIGN(size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002122 file_size = get_file_size(fd);
2123 if (file_size > 0 && file_size < size) {
2124 error_setg(errp, "backing store %s size 0x%" PRIx64
2125 " does not match 'size' option 0x" RAM_ADDR_FMT,
2126 mem_path, file_size, size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002127 return NULL;
2128 }
2129
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002130 new_block = g_malloc0(sizeof(*new_block));
2131 new_block->mr = mr;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002132 new_block->used_length = size;
2133 new_block->max_length = size;
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002134 new_block->flags = share ? RAM_SHARED : 0;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002135 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp);
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002136 if (!new_block->host) {
2137 g_free(new_block);
Fam Zheng528f46a2016-03-01 14:18:18 +08002138 return NULL;
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002139 }
2140
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002141 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002142 if (local_err) {
2143 g_free(new_block);
2144 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002145 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002146 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002147 return new_block;
Marc-André Lureau38b33622017-06-02 18:12:23 +04002148
2149}
2150
2151
2152RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
2153 bool share, const char *mem_path,
2154 Error **errp)
2155{
2156 int fd;
2157 bool created;
2158 RAMBlock *block;
2159
2160 fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp);
2161 if (fd < 0) {
2162 return NULL;
2163 }
2164
2165 block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
2166 if (!block) {
2167 if (created) {
2168 unlink(mem_path);
2169 }
2170 close(fd);
2171 return NULL;
2172 }
2173
2174 return block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002175}
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002176#endif
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002177
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002178static
Fam Zheng528f46a2016-03-01 14:18:18 +08002179RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2180 void (*resized)(const char*,
2181 uint64_t length,
2182 void *host),
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002183 void *host, bool resizeable, bool share,
Fam Zheng528f46a2016-03-01 14:18:18 +08002184 MemoryRegion *mr, Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002185{
2186 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002187 Error *local_err = NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002188
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002189 size = HOST_PAGE_ALIGN(size);
2190 max_size = HOST_PAGE_ALIGN(max_size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002191 new_block = g_malloc0(sizeof(*new_block));
2192 new_block->mr = mr;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002193 new_block->resized = resized;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002194 new_block->used_length = size;
2195 new_block->max_length = max_size;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002196 assert(max_size >= size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002197 new_block->fd = -1;
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002198 new_block->page_size = getpagesize();
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002199 new_block->host = host;
2200 if (host) {
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002201 new_block->flags |= RAM_PREALLOC;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002202 }
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002203 if (resizeable) {
2204 new_block->flags |= RAM_RESIZEABLE;
2205 }
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002206 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002207 if (local_err) {
2208 g_free(new_block);
2209 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002210 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002211 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002212 return new_block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002213}
2214
Fam Zheng528f46a2016-03-01 14:18:18 +08002215RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002216 MemoryRegion *mr, Error **errp)
2217{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002218 return qemu_ram_alloc_internal(size, size, NULL, host, false,
2219 false, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002220}
2221
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002222RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share,
2223 MemoryRegion *mr, Error **errp)
pbrook94a6b542009-04-11 17:15:54 +00002224{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002225 return qemu_ram_alloc_internal(size, size, NULL, NULL, false,
2226 share, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002227}
2228
Fam Zheng528f46a2016-03-01 14:18:18 +08002229RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002230 void (*resized)(const char*,
2231 uint64_t length,
2232 void *host),
2233 MemoryRegion *mr, Error **errp)
2234{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002235 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true,
2236 false, mr, errp);
pbrook94a6b542009-04-11 17:15:54 +00002237}
bellarde9a1ab12007-02-08 23:08:38 +00002238
Paolo Bonzini43771532013-09-09 17:58:40 +02002239static void reclaim_ramblock(RAMBlock *block)
2240{
2241 if (block->flags & RAM_PREALLOC) {
2242 ;
2243 } else if (xen_enabled()) {
2244 xen_invalidate_map_cache_entry(block->host);
2245#ifndef _WIN32
2246 } else if (block->fd >= 0) {
Eduardo Habkost2f3a2bb2015-11-06 20:11:21 -02002247 qemu_ram_munmap(block->host, block->max_length);
Paolo Bonzini43771532013-09-09 17:58:40 +02002248 close(block->fd);
2249#endif
2250 } else {
2251 qemu_anon_ram_free(block->host, block->max_length);
2252 }
2253 g_free(block);
2254}
2255
Fam Zhengf1060c52016-03-01 14:18:22 +08002256void qemu_ram_free(RAMBlock *block)
bellarde9a1ab12007-02-08 23:08:38 +00002257{
Marc-André Lureau85bc2a12016-03-29 13:20:51 +02002258 if (!block) {
2259 return;
2260 }
2261
Paolo Bonzini0987d732016-12-21 00:31:36 +08002262 if (block->host) {
2263 ram_block_notify_remove(block->host, block->max_length);
2264 }
2265
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002266 qemu_mutex_lock_ramlist();
Fam Zhengf1060c52016-03-01 14:18:22 +08002267 QLIST_REMOVE_RCU(block, next);
2268 ram_list.mru_block = NULL;
2269 /* Write list before version */
2270 smp_wmb();
2271 ram_list.version++;
2272 call_rcu(block, reclaim_ramblock, rcu);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002273 qemu_mutex_unlock_ramlist();
bellarde9a1ab12007-02-08 23:08:38 +00002274}
2275
Huang Yingcd19cfa2011-03-02 08:56:19 +01002276#ifndef _WIN32
2277void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2278{
2279 RAMBlock *block;
2280 ram_addr_t offset;
2281 int flags;
2282 void *area, *vaddr;
2283
Peter Xu99e15582017-05-12 12:17:39 +08002284 RAMBLOCK_FOREACH(block) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002285 offset = addr - block->offset;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002286 if (offset < block->max_length) {
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02002287 vaddr = ramblock_ptr(block, offset);
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002288 if (block->flags & RAM_PREALLOC) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002289 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02002290 } else if (xen_enabled()) {
2291 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01002292 } else {
2293 flags = MAP_FIXED;
Markus Armbruster3435f392013-07-31 15:11:07 +02002294 if (block->fd >= 0) {
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002295 flags |= (block->flags & RAM_SHARED ?
2296 MAP_SHARED : MAP_PRIVATE);
Markus Armbruster3435f392013-07-31 15:11:07 +02002297 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2298 flags, block->fd, offset);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002299 } else {
Markus Armbruster2eb9fba2013-07-31 15:11:09 +02002300 /*
2301 * Remap needs to match alloc. Accelerators that
2302 * set phys_mem_alloc never remap. If they did,
2303 * we'd need a remap hook here.
2304 */
2305 assert(phys_mem_alloc == qemu_anon_ram_alloc);
2306
Huang Yingcd19cfa2011-03-02 08:56:19 +01002307 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
2308 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2309 flags, -1, 0);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002310 }
2311 if (area != vaddr) {
Alistair Francis493d89b2018-02-03 09:43:14 +01002312 error_report("Could not remap addr: "
2313 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2314 length, addr);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002315 exit(1);
2316 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002317 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04002318 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002319 }
Huang Yingcd19cfa2011-03-02 08:56:19 +01002320 }
2321 }
2322}
2323#endif /* !_WIN32 */
2324
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002325/* Return a host pointer to ram allocated with qemu_ram_alloc.
Mike Dayae3a7042013-09-05 14:41:35 -04002326 * This should not be used for general purpose DMA. Use address_space_map
2327 * or address_space_rw instead. For local memory (e.g. video ram) that the
2328 * device owns, use memory_region_get_ram_ptr.
Mike Day0dc3f442013-09-05 14:41:35 -04002329 *
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002330 * Called within RCU critical section.
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002331 */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002332void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002333{
Gonglei3655cb92016-02-20 10:35:20 +08002334 RAMBlock *block = ram_block;
2335
2336 if (block == NULL) {
2337 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002338 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002339 }
Mike Dayae3a7042013-09-05 14:41:35 -04002340
2341 if (xen_enabled() && block->host == NULL) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002342 /* We need to check if the requested address is in the RAM
2343 * because we don't want to map the entire memory in QEMU.
2344 * In that case just map until the end of the page.
2345 */
2346 if (block->offset == 0) {
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002347 return xen_map_cache(addr, 0, 0, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002348 }
Mike Dayae3a7042013-09-05 14:41:35 -04002349
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002350 block->host = xen_map_cache(block->offset, block->max_length, 1, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002351 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002352 return ramblock_ptr(block, addr);
pbrookdc828ca2009-04-09 22:21:07 +00002353}
2354
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002355/* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
Mike Dayae3a7042013-09-05 14:41:35 -04002356 * but takes a size argument.
Mike Day0dc3f442013-09-05 14:41:35 -04002357 *
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002358 * Called within RCU critical section.
Mike Dayae3a7042013-09-05 14:41:35 -04002359 */
Gonglei3655cb92016-02-20 10:35:20 +08002360static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002361 hwaddr *size, bool lock)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002362{
Gonglei3655cb92016-02-20 10:35:20 +08002363 RAMBlock *block = ram_block;
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002364 if (*size == 0) {
2365 return NULL;
2366 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002367
Gonglei3655cb92016-02-20 10:35:20 +08002368 if (block == NULL) {
2369 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002370 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002371 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002372 *size = MIN(*size, block->max_length - addr);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002373
2374 if (xen_enabled() && block->host == NULL) {
2375 /* We need to check if the requested address is in the RAM
2376 * because we don't want to map the entire memory in QEMU.
2377 * In that case just map the requested area.
2378 */
2379 if (block->offset == 0) {
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002380 return xen_map_cache(addr, *size, lock, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002381 }
2382
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002383 block->host = xen_map_cache(block->offset, block->max_length, 1, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002384 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002385
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002386 return ramblock_ptr(block, addr);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002387}
2388
Dr. David Alan Gilbertf90bb712018-03-12 17:20:57 +00002389/* Return the offset of a hostpointer within a ramblock */
2390ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2391{
2392 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2393 assert((uintptr_t)host >= (uintptr_t)rb->host);
2394 assert(res < rb->max_length);
2395
2396 return res;
2397}
2398
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002399/*
2400 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2401 * in that RAMBlock.
2402 *
2403 * ptr: Host pointer to look up
2404 * round_offset: If true round the result offset down to a page boundary
2405 * *ram_addr: set to result ram_addr
2406 * *offset: set to result offset within the RAMBlock
2407 *
2408 * Returns: RAMBlock (or NULL if not found)
Mike Dayae3a7042013-09-05 14:41:35 -04002409 *
2410 * By the time this function returns, the returned pointer is not protected
2411 * by RCU anymore. If the caller is not within an RCU critical section and
2412 * does not hold the iothread lock, it must have other means of protecting the
2413 * pointer, such as a reference to the region that includes the incoming
2414 * ram_addr_t.
2415 */
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002416RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002417 ram_addr_t *offset)
pbrook5579c7f2009-04-11 14:47:08 +00002418{
pbrook94a6b542009-04-11 17:15:54 +00002419 RAMBlock *block;
2420 uint8_t *host = ptr;
2421
Jan Kiszka868bb332011-06-21 22:59:09 +02002422 if (xen_enabled()) {
Paolo Bonzinif615f392016-05-26 10:07:50 +02002423 ram_addr_t ram_addr;
Mike Day0dc3f442013-09-05 14:41:35 -04002424 rcu_read_lock();
Paolo Bonzinif615f392016-05-26 10:07:50 +02002425 ram_addr = xen_ram_addr_from_mapcache(ptr);
2426 block = qemu_get_ram_block(ram_addr);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002427 if (block) {
Anthony PERARDd6b6aec2016-06-09 16:56:17 +01002428 *offset = ram_addr - block->offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002429 }
Mike Day0dc3f442013-09-05 14:41:35 -04002430 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002431 return block;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01002432 }
2433
Mike Day0dc3f442013-09-05 14:41:35 -04002434 rcu_read_lock();
2435 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002436 if (block && block->host && host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002437 goto found;
2438 }
2439
Peter Xu99e15582017-05-12 12:17:39 +08002440 RAMBLOCK_FOREACH(block) {
Jun Nakajima432d2682010-08-31 16:41:25 +01002441 /* This case append when the block is not mapped. */
2442 if (block->host == NULL) {
2443 continue;
2444 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002445 if (host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002446 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06002447 }
pbrook94a6b542009-04-11 17:15:54 +00002448 }
Jun Nakajima432d2682010-08-31 16:41:25 +01002449
Mike Day0dc3f442013-09-05 14:41:35 -04002450 rcu_read_unlock();
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002451 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02002452
2453found:
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002454 *offset = (host - block->host);
2455 if (round_offset) {
2456 *offset &= TARGET_PAGE_MASK;
2457 }
Mike Day0dc3f442013-09-05 14:41:35 -04002458 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002459 return block;
2460}
2461
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002462/*
2463 * Finds the named RAMBlock
2464 *
2465 * name: The name of RAMBlock to find
2466 *
2467 * Returns: RAMBlock (or NULL if not found)
2468 */
2469RAMBlock *qemu_ram_block_by_name(const char *name)
2470{
2471 RAMBlock *block;
2472
Peter Xu99e15582017-05-12 12:17:39 +08002473 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002474 if (!strcmp(name, block->idstr)) {
2475 return block;
2476 }
2477 }
2478
2479 return NULL;
2480}
2481
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002482/* Some of the softmmu routines need to translate from a host pointer
2483 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002484ram_addr_t qemu_ram_addr_from_host(void *ptr)
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002485{
2486 RAMBlock *block;
Paolo Bonzinif615f392016-05-26 10:07:50 +02002487 ram_addr_t offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002488
Paolo Bonzinif615f392016-05-26 10:07:50 +02002489 block = qemu_ram_block_from_host(ptr, false, &offset);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002490 if (!block) {
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002491 return RAM_ADDR_INVALID;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002492 }
2493
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002494 return block->offset + offset;
Marcelo Tosattie8902612010-10-11 15:31:19 -03002495}
Alex Williamsonf471a172010-06-11 11:11:42 -06002496
Peter Maydell27266272017-11-20 18:08:27 +00002497/* Called within RCU critical section. */
2498void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
2499 CPUState *cpu,
2500 vaddr mem_vaddr,
2501 ram_addr_t ram_addr,
2502 unsigned size)
2503{
2504 ndi->cpu = cpu;
2505 ndi->ram_addr = ram_addr;
2506 ndi->mem_vaddr = mem_vaddr;
2507 ndi->size = size;
2508 ndi->locked = false;
2509
2510 assert(tcg_enabled());
2511 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
2512 ndi->locked = true;
2513 tb_lock();
2514 tb_invalidate_phys_page_fast(ram_addr, size);
2515 }
2516}
2517
2518/* Called within RCU critical section. */
2519void memory_notdirty_write_complete(NotDirtyInfo *ndi)
2520{
2521 if (ndi->locked) {
2522 tb_unlock();
2523 }
2524
2525 /* Set both VGA and migration bits for simplicity and to remove
2526 * the notdirty callback faster.
2527 */
2528 cpu_physical_memory_set_dirty_range(ndi->ram_addr, ndi->size,
2529 DIRTY_CLIENTS_NOCODE);
2530 /* we remove the notdirty callback only if the code has been
2531 flushed */
2532 if (!cpu_physical_memory_is_clean(ndi->ram_addr)) {
2533 tlb_set_dirty(ndi->cpu, ndi->mem_vaddr);
2534 }
2535}
2536
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002537/* Called within RCU critical section. */
Avi Kivitya8170e52012-10-23 12:30:10 +02002538static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002539 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00002540{
Peter Maydell27266272017-11-20 18:08:27 +00002541 NotDirtyInfo ndi;
Alex Bennéeba051fb2016-10-27 16:10:16 +01002542
Peter Maydell27266272017-11-20 18:08:27 +00002543 memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr,
2544 ram_addr, size);
2545
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002546 switch (size) {
2547 case 1:
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002548 stb_p(qemu_map_ram_ptr(NULL, ram_addr), val);
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002549 break;
2550 case 2:
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002551 stw_p(qemu_map_ram_ptr(NULL, ram_addr), val);
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002552 break;
2553 case 4:
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002554 stl_p(qemu_map_ram_ptr(NULL, ram_addr), val);
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002555 break;
Andrew Baumannad528782017-10-13 11:19:13 -07002556 case 8:
2557 stq_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2558 break;
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002559 default:
2560 abort();
2561 }
Peter Maydell27266272017-11-20 18:08:27 +00002562 memory_notdirty_write_complete(&ndi);
bellard1ccde1c2004-02-06 19:46:14 +00002563}
2564
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002565static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002566 unsigned size, bool is_write,
2567 MemTxAttrs attrs)
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002568{
2569 return is_write;
2570}
2571
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002572static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002573 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002574 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002575 .endianness = DEVICE_NATIVE_ENDIAN,
Andrew Baumannad528782017-10-13 11:19:13 -07002576 .valid = {
2577 .min_access_size = 1,
2578 .max_access_size = 8,
2579 .unaligned = false,
2580 },
2581 .impl = {
2582 .min_access_size = 1,
2583 .max_access_size = 8,
2584 .unaligned = false,
2585 },
bellard1ccde1c2004-02-06 19:46:14 +00002586};
2587
pbrook0f459d12008-06-09 00:20:13 +00002588/* Generate a debug exception if a watchpoint has been hit. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002589static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
pbrook0f459d12008-06-09 00:20:13 +00002590{
Andreas Färber93afead2013-08-26 03:41:01 +02002591 CPUState *cpu = current_cpu;
Sergey Fedorov568496c2016-02-11 11:17:32 +00002592 CPUClass *cc = CPU_GET_CLASS(cpu);
pbrook0f459d12008-06-09 00:20:13 +00002593 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00002594 CPUWatchpoint *wp;
pbrook0f459d12008-06-09 00:20:13 +00002595
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02002596 assert(tcg_enabled());
Andreas Färberff4700b2013-08-26 18:23:18 +02002597 if (cpu->watchpoint_hit) {
aliguori06d55cc2008-11-18 20:24:06 +00002598 /* We re-entered the check after replacing the TB. Now raise
2599 * the debug interrupt so that is will trigger after the
2600 * current instruction. */
Andreas Färber93afead2013-08-26 03:41:01 +02002601 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00002602 return;
2603 }
Andreas Färber93afead2013-08-26 03:41:01 +02002604 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Julian Brown40612002017-02-07 18:29:59 +00002605 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
Andreas Färberff4700b2013-08-26 18:23:18 +02002606 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01002607 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2608 && (wp->flags & flags)) {
Peter Maydell08225672014-09-12 14:06:48 +01002609 if (flags == BP_MEM_READ) {
2610 wp->flags |= BP_WATCHPOINT_HIT_READ;
2611 } else {
2612 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2613 }
2614 wp->hitaddr = vaddr;
Peter Maydell66b9b432015-04-26 16:49:24 +01002615 wp->hitattrs = attrs;
Andreas Färberff4700b2013-08-26 18:23:18 +02002616 if (!cpu->watchpoint_hit) {
Sergey Fedorov568496c2016-02-11 11:17:32 +00002617 if (wp->flags & BP_CPU &&
2618 !cc->debug_check_watchpoint(cpu, wp)) {
2619 wp->flags &= ~BP_WATCHPOINT_HIT;
2620 continue;
2621 }
Andreas Färberff4700b2013-08-26 18:23:18 +02002622 cpu->watchpoint_hit = wp;
KONRAD Frederica5e99822016-10-27 16:10:06 +01002623
Jan Kiszka8d04fb52017-02-23 18:29:11 +00002624 /* Both tb_lock and iothread_mutex will be reset when
2625 * cpu_loop_exit or cpu_loop_exit_noexc longjmp
2626 * back into the cpu_exec main loop.
KONRAD Frederica5e99822016-10-27 16:10:06 +01002627 */
2628 tb_lock();
Andreas Färber239c51a2013-09-01 17:12:23 +02002629 tb_check_watchpoint(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002630 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
Andreas Färber27103422013-08-26 08:31:06 +02002631 cpu->exception_index = EXCP_DEBUG;
Andreas Färber5638d182013-08-27 17:52:12 +02002632 cpu_loop_exit(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002633 } else {
Richard Henderson9b990ee2017-10-13 10:50:02 -07002634 /* Force execution of one insn next time. */
2635 cpu->cflags_next_tb = 1 | curr_cflags();
Peter Maydell6886b982016-05-17 15:18:04 +01002636 cpu_loop_exit_noexc(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002637 }
aliguori06d55cc2008-11-18 20:24:06 +00002638 }
aliguori6e140f22008-11-18 20:37:55 +00002639 } else {
2640 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00002641 }
2642 }
2643}
2644
pbrook6658ffb2007-03-16 23:58:11 +00002645/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2646 so these check for a hit then pass through to the normal out-of-line
2647 phys routines. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002648static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2649 unsigned size, MemTxAttrs attrs)
pbrook6658ffb2007-03-16 23:58:11 +00002650{
Peter Maydell66b9b432015-04-26 16:49:24 +01002651 MemTxResult res;
2652 uint64_t data;
Peter Maydell79ed0412016-01-21 14:15:06 +00002653 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2654 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
pbrook6658ffb2007-03-16 23:58:11 +00002655
Peter Maydell66b9b432015-04-26 16:49:24 +01002656 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
Avi Kivity1ec9b902012-01-02 12:47:48 +02002657 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04002658 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002659 data = address_space_ldub(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002660 break;
2661 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002662 data = address_space_lduw(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002663 break;
2664 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002665 data = address_space_ldl(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002666 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002667 case 8:
2668 data = address_space_ldq(as, addr, attrs, &res);
2669 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02002670 default: abort();
2671 }
Peter Maydell66b9b432015-04-26 16:49:24 +01002672 *pdata = data;
2673 return res;
2674}
2675
2676static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2677 uint64_t val, unsigned size,
2678 MemTxAttrs attrs)
2679{
2680 MemTxResult res;
Peter Maydell79ed0412016-01-21 14:15:06 +00002681 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2682 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
Peter Maydell66b9b432015-04-26 16:49:24 +01002683
2684 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2685 switch (size) {
2686 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002687 address_space_stb(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002688 break;
2689 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002690 address_space_stw(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002691 break;
2692 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002693 address_space_stl(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002694 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002695 case 8:
2696 address_space_stq(as, addr, val, attrs, &res);
2697 break;
Peter Maydell66b9b432015-04-26 16:49:24 +01002698 default: abort();
2699 }
2700 return res;
pbrook6658ffb2007-03-16 23:58:11 +00002701}
2702
Avi Kivity1ec9b902012-01-02 12:47:48 +02002703static const MemoryRegionOps watch_mem_ops = {
Peter Maydell66b9b432015-04-26 16:49:24 +01002704 .read_with_attrs = watch_mem_read,
2705 .write_with_attrs = watch_mem_write,
Avi Kivity1ec9b902012-01-02 12:47:48 +02002706 .endianness = DEVICE_NATIVE_ENDIAN,
Paolo Bonzini306526b2017-10-17 14:16:05 +02002707 .valid = {
2708 .min_access_size = 1,
2709 .max_access_size = 8,
2710 .unaligned = false,
2711 },
2712 .impl = {
2713 .min_access_size = 1,
2714 .max_access_size = 8,
2715 .unaligned = false,
2716 },
pbrook6658ffb2007-03-16 23:58:11 +00002717};
pbrook6658ffb2007-03-16 23:58:11 +00002718
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01002719static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2720 MemTxAttrs attrs, uint8_t *buf, int len);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002721static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2722 const uint8_t *buf, int len);
2723static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01002724 bool is_write, MemTxAttrs attrs);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002725
Peter Maydellf25a49e2015-04-26 16:49:24 +01002726static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2727 unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002728{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002729 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002730 uint8_t buf[8];
Peter Maydell5c9eb022015-04-26 16:49:24 +01002731 MemTxResult res;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002732
blueswir1db7b5422007-05-26 17:36:03 +00002733#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002734 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002735 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00002736#endif
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002737 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
Peter Maydell5c9eb022015-04-26 16:49:24 +01002738 if (res) {
2739 return res;
Peter Maydellf25a49e2015-04-26 16:49:24 +01002740 }
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002741 switch (len) {
2742 case 1:
Peter Maydellf25a49e2015-04-26 16:49:24 +01002743 *data = ldub_p(buf);
2744 return MEMTX_OK;
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002745 case 2:
Peter Maydellf25a49e2015-04-26 16:49:24 +01002746 *data = lduw_p(buf);
2747 return MEMTX_OK;
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002748 case 4:
Peter Maydellf25a49e2015-04-26 16:49:24 +01002749 *data = ldl_p(buf);
2750 return MEMTX_OK;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002751 case 8:
Peter Maydellf25a49e2015-04-26 16:49:24 +01002752 *data = ldq_p(buf);
2753 return MEMTX_OK;
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002754 default:
2755 abort();
2756 }
blueswir1db7b5422007-05-26 17:36:03 +00002757}
2758
Peter Maydellf25a49e2015-04-26 16:49:24 +01002759static MemTxResult subpage_write(void *opaque, hwaddr addr,
2760 uint64_t value, unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002761{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002762 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002763 uint8_t buf[8];
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002764
blueswir1db7b5422007-05-26 17:36:03 +00002765#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002766 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002767 " value %"PRIx64"\n",
2768 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00002769#endif
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002770 switch (len) {
2771 case 1:
2772 stb_p(buf, value);
2773 break;
2774 case 2:
2775 stw_p(buf, value);
2776 break;
2777 case 4:
2778 stl_p(buf, value);
2779 break;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002780 case 8:
2781 stq_p(buf, value);
2782 break;
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002783 default:
2784 abort();
2785 }
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002786 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00002787}
2788
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002789static bool subpage_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002790 unsigned len, bool is_write,
2791 MemTxAttrs attrs)
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002792{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002793 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002794#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002795 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002796 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002797#endif
2798
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002799 return flatview_access_valid(subpage->fv, addr + subpage->base,
Peter Maydelleace72b2018-05-31 14:50:52 +01002800 len, is_write, attrs);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002801}
2802
Avi Kivity70c68e42012-01-02 12:32:48 +02002803static const MemoryRegionOps subpage_ops = {
Peter Maydellf25a49e2015-04-26 16:49:24 +01002804 .read_with_attrs = subpage_read,
2805 .write_with_attrs = subpage_write,
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002806 .impl.min_access_size = 1,
2807 .impl.max_access_size = 8,
2808 .valid.min_access_size = 1,
2809 .valid.max_access_size = 8,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002810 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02002811 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00002812};
2813
Anthony Liguoric227f092009-10-01 16:12:16 -05002814static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02002815 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00002816{
2817 int idx, eidx;
2818
2819 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2820 return -1;
2821 idx = SUBPAGE_IDX(start);
2822 eidx = SUBPAGE_IDX(end);
2823#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002824 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2825 __func__, mmio, start, end, idx, eidx, section);
blueswir1db7b5422007-05-26 17:36:03 +00002826#endif
blueswir1db7b5422007-05-26 17:36:03 +00002827 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02002828 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00002829 }
2830
2831 return 0;
2832}
2833
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002834static subpage_t *subpage_init(FlatView *fv, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00002835{
Anthony Liguoric227f092009-10-01 16:12:16 -05002836 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00002837
Vijaya Kumar K2615fab2016-10-24 16:26:49 +01002838 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002839 mmio->fv = fv;
aliguori1eec6142009-02-05 22:06:18 +00002840 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002841 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07002842 NULL, TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02002843 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00002844#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002845 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2846 mmio, base, TARGET_PAGE_SIZE);
blueswir1db7b5422007-05-26 17:36:03 +00002847#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02002848 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00002849
2850 return mmio;
2851}
2852
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002853static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
Avi Kivity5312bd82012-02-12 18:32:55 +02002854{
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002855 assert(fv);
Avi Kivity5312bd82012-02-12 18:32:55 +02002856 MemoryRegionSection section = {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002857 .fv = fv,
Avi Kivity5312bd82012-02-12 18:32:55 +02002858 .mr = mr,
2859 .offset_within_address_space = 0,
2860 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02002861 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02002862 };
2863
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002864 return phys_section_add(map, &section);
Avi Kivity5312bd82012-02-12 18:32:55 +02002865}
2866
Peter Maydell8af36742017-12-13 17:52:28 +00002867static void readonly_mem_write(void *opaque, hwaddr addr,
2868 uint64_t val, unsigned size)
2869{
2870 /* Ignore any write to ROM. */
2871}
2872
2873static bool readonly_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002874 unsigned size, bool is_write,
2875 MemTxAttrs attrs)
Peter Maydell8af36742017-12-13 17:52:28 +00002876{
2877 return is_write;
2878}
2879
2880/* This will only be used for writes, because reads are special cased
2881 * to directly access the underlying host ram.
2882 */
2883static const MemoryRegionOps readonly_mem_ops = {
2884 .write = readonly_mem_write,
2885 .valid.accepts = readonly_mem_accepts,
2886 .endianness = DEVICE_NATIVE_ENDIAN,
2887 .valid = {
2888 .min_access_size = 1,
2889 .max_access_size = 8,
2890 .unaligned = false,
2891 },
2892 .impl = {
2893 .min_access_size = 1,
2894 .max_access_size = 8,
2895 .unaligned = false,
2896 },
2897};
2898
Peter Maydella54c87b2016-01-21 14:15:05 +00002899MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
Avi Kivityaa102232012-03-08 17:06:55 +02002900{
Peter Maydella54c87b2016-01-21 14:15:05 +00002901 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2902 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
Peter Maydell32857f42015-10-01 15:29:50 +01002903 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01002904 MemoryRegionSection *sections = d->map.sections;
Paolo Bonzini9d82b5a2013-08-16 08:26:30 +02002905
2906 return sections[index & ~TARGET_PAGE_MASK].mr;
Avi Kivityaa102232012-03-08 17:06:55 +02002907}
2908
Avi Kivitye9179ce2009-06-14 11:38:52 +03002909static void io_mem_init(void)
2910{
Peter Maydell8af36742017-12-13 17:52:28 +00002911 memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops,
2912 NULL, NULL, UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002913 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02002914 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00002915
2916 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
2917 * which can be called without the iothread mutex.
2918 */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002919 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02002920 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00002921 memory_region_clear_global_locking(&io_mem_notdirty);
2922
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002923 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02002924 NULL, UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03002925}
2926
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10002927AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
Avi Kivityac1970f2012-10-03 16:22:53 +02002928{
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002929 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
2930 uint16_t n;
2931
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002932 n = dummy_section(&d->map, fv, &io_mem_unassigned);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002933 assert(n == PHYS_SECTION_UNASSIGNED);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002934 n = dummy_section(&d->map, fv, &io_mem_notdirty);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002935 assert(n == PHYS_SECTION_NOTDIRTY);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002936 n = dummy_section(&d->map, fv, &io_mem_rom);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002937 assert(n == PHYS_SECTION_ROM);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002938 n = dummy_section(&d->map, fv, &io_mem_watch);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002939 assert(n == PHYS_SECTION_WATCH);
Paolo Bonzini00752702013-05-29 12:13:54 +02002940
Michael S. Tsirkin9736e552013-11-11 14:42:43 +02002941 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10002942
2943 return d;
Paolo Bonzini00752702013-05-29 12:13:54 +02002944}
2945
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10002946void address_space_dispatch_free(AddressSpaceDispatch *d)
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01002947{
2948 phys_sections_free(&d->map);
2949 g_free(d);
2950}
2951
Avi Kivity1d711482012-10-02 18:54:45 +02002952static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02002953{
Peter Maydell32857f42015-10-01 15:29:50 +01002954 CPUAddressSpace *cpuas;
2955 AddressSpaceDispatch *d;
Avi Kivity117712c2012-02-12 21:23:17 +02002956
2957 /* since each CPU stores ram addresses in its TLB cache, we must
2958 reset the modified entries */
Peter Maydell32857f42015-10-01 15:29:50 +01002959 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2960 cpu_reloading_memory_map();
2961 /* The CPU and TLB are protected by the iothread lock.
2962 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2963 * may have split the RCU critical section.
2964 */
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10002965 d = address_space_to_dispatch(cpuas->as);
Alex Bennéef35e44e2016-10-21 16:34:18 +01002966 atomic_rcu_set(&cpuas->memory_dispatch, d);
Alex Bennéed10eb082016-11-14 14:17:28 +00002967 tlb_flush(cpuas->cpu);
Avi Kivity50c1e142012-02-08 21:36:02 +02002968}
2969
Avi Kivity62152b82011-07-26 14:26:14 +03002970static void memory_map_init(void)
2971{
Anthony Liguori7267c092011-08-20 22:09:37 -05002972 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini03f49952013-11-07 17:14:36 +01002973
Paolo Bonzini57271d62013-11-07 17:14:37 +01002974 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00002975 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03002976
Anthony Liguori7267c092011-08-20 22:09:37 -05002977 system_io = g_malloc(sizeof(*system_io));
Jan Kiszka3bb28b72013-09-02 18:43:30 +02002978 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
2979 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00002980 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity62152b82011-07-26 14:26:14 +03002981}
2982
2983MemoryRegion *get_system_memory(void)
2984{
2985 return system_memory;
2986}
2987
Avi Kivity309cb472011-08-08 16:09:03 +03002988MemoryRegion *get_system_io(void)
2989{
2990 return system_io;
2991}
2992
pbrooke2eef172008-06-08 01:09:01 +00002993#endif /* !defined(CONFIG_USER_ONLY) */
2994
bellard13eb76e2004-01-24 15:23:36 +00002995/* physical memory access (slow version, mainly for debug) */
2996#if defined(CONFIG_USER_ONLY)
Andreas Färberf17ec442013-06-29 19:40:58 +02002997int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Paul Brooka68fe892010-03-01 00:08:59 +00002998 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00002999{
3000 int l, flags;
3001 target_ulong page;
pbrook53a59602006-03-25 19:31:22 +00003002 void * p;
bellard13eb76e2004-01-24 15:23:36 +00003003
3004 while (len > 0) {
3005 page = addr & TARGET_PAGE_MASK;
3006 l = (page + TARGET_PAGE_SIZE) - addr;
3007 if (l > len)
3008 l = len;
3009 flags = page_get_flags(page);
3010 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00003011 return -1;
bellard13eb76e2004-01-24 15:23:36 +00003012 if (is_write) {
3013 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00003014 return -1;
bellard579a97f2007-11-11 14:26:47 +00003015 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003016 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00003017 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003018 memcpy(p, buf, l);
3019 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00003020 } else {
3021 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00003022 return -1;
bellard579a97f2007-11-11 14:26:47 +00003023 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003024 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00003025 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003026 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00003027 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00003028 }
3029 len -= l;
3030 buf += l;
3031 addr += l;
3032 }
Paul Brooka68fe892010-03-01 00:08:59 +00003033 return 0;
bellard13eb76e2004-01-24 15:23:36 +00003034}
bellard8df1cd02005-01-28 22:37:22 +00003035
bellard13eb76e2004-01-24 15:23:36 +00003036#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003037
Paolo Bonzini845b6212015-03-23 11:45:53 +01003038static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
Avi Kivitya8170e52012-10-23 12:30:10 +02003039 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003040{
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003041 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003042 addr += memory_region_get_ram_addr(mr);
3043
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003044 /* No early return if dirty_log_mask is or becomes 0, because
3045 * cpu_physical_memory_set_dirty_range will still call
3046 * xen_modified_memory.
3047 */
3048 if (dirty_log_mask) {
3049 dirty_log_mask =
3050 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003051 }
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003052 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02003053 assert(tcg_enabled());
Alex Bennéeba051fb2016-10-27 16:10:16 +01003054 tb_lock();
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003055 tb_invalidate_phys_range(addr, addr + length);
Alex Bennéeba051fb2016-10-27 16:10:16 +01003056 tb_unlock();
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003057 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
3058 }
3059 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003060}
3061
Richard Henderson23326162013-07-08 14:55:59 -07003062static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02003063{
Paolo Bonzinie1622f42013-07-17 13:17:41 +02003064 unsigned access_size_max = mr->ops->valid.max_access_size;
Richard Henderson23326162013-07-08 14:55:59 -07003065
3066 /* Regions are assumed to support 1-4 byte accesses unless
3067 otherwise specified. */
Richard Henderson23326162013-07-08 14:55:59 -07003068 if (access_size_max == 0) {
3069 access_size_max = 4;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003070 }
Richard Henderson23326162013-07-08 14:55:59 -07003071
3072 /* Bound the maximum access by the alignment of the address. */
3073 if (!mr->ops->impl.unaligned) {
3074 unsigned align_size_max = addr & -addr;
3075 if (align_size_max != 0 && align_size_max < access_size_max) {
3076 access_size_max = align_size_max;
3077 }
3078 }
3079
3080 /* Don't attempt accesses larger than the maximum. */
3081 if (l > access_size_max) {
3082 l = access_size_max;
3083 }
Peter Maydell6554f5c2015-07-24 13:33:10 +01003084 l = pow2floor(l);
Richard Henderson23326162013-07-08 14:55:59 -07003085
3086 return l;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003087}
3088
Jan Kiszka4840f102015-06-18 18:47:22 +02003089static bool prepare_mmio_access(MemoryRegion *mr)
Paolo Bonzini125b3802015-06-18 18:47:21 +02003090{
Jan Kiszka4840f102015-06-18 18:47:22 +02003091 bool unlocked = !qemu_mutex_iothread_locked();
3092 bool release_lock = false;
3093
3094 if (unlocked && mr->global_locking) {
3095 qemu_mutex_lock_iothread();
3096 unlocked = false;
3097 release_lock = true;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003098 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003099 if (mr->flush_coalesced_mmio) {
3100 if (unlocked) {
3101 qemu_mutex_lock_iothread();
3102 }
3103 qemu_flush_coalesced_mmio_buffer();
3104 if (unlocked) {
3105 qemu_mutex_unlock_iothread();
3106 }
3107 }
3108
3109 return release_lock;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003110}
3111
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003112/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003113static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
3114 MemTxAttrs attrs,
3115 const uint8_t *buf,
3116 int len, hwaddr addr1,
3117 hwaddr l, MemoryRegion *mr)
bellard13eb76e2004-01-24 15:23:36 +00003118{
bellard13eb76e2004-01-24 15:23:36 +00003119 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02003120 uint64_t val;
Peter Maydell3b643492015-04-26 16:49:23 +01003121 MemTxResult result = MEMTX_OK;
Jan Kiszka4840f102015-06-18 18:47:22 +02003122 bool release_lock = false;
ths3b46e622007-09-17 08:09:54 +00003123
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003124 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003125 if (!memory_access_is_direct(mr, true)) {
3126 release_lock |= prepare_mmio_access(mr);
3127 l = memory_access_size(mr, l, addr1);
3128 /* XXX: could force current_cpu to NULL to avoid
3129 potential bugs */
3130 switch (l) {
3131 case 8:
3132 /* 64 bit write access */
3133 val = ldq_p(buf);
3134 result |= memory_region_dispatch_write(mr, addr1, val, 8,
3135 attrs);
3136 break;
3137 case 4:
3138 /* 32 bit write access */
Ladi Prosek6da67de2017-01-26 15:22:37 +01003139 val = (uint32_t)ldl_p(buf);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003140 result |= memory_region_dispatch_write(mr, addr1, val, 4,
3141 attrs);
3142 break;
3143 case 2:
3144 /* 16 bit write access */
3145 val = lduw_p(buf);
3146 result |= memory_region_dispatch_write(mr, addr1, val, 2,
3147 attrs);
3148 break;
3149 case 1:
3150 /* 8 bit write access */
3151 val = ldub_p(buf);
3152 result |= memory_region_dispatch_write(mr, addr1, val, 1,
3153 attrs);
3154 break;
3155 default:
3156 abort();
bellard13eb76e2004-01-24 15:23:36 +00003157 }
3158 } else {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003159 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003160 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003161 memcpy(ptr, buf, l);
3162 invalidate_and_set_dirty(mr, addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00003163 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003164
3165 if (release_lock) {
3166 qemu_mutex_unlock_iothread();
3167 release_lock = false;
3168 }
3169
bellard13eb76e2004-01-24 15:23:36 +00003170 len -= l;
3171 buf += l;
3172 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003173
3174 if (!len) {
3175 break;
3176 }
3177
3178 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003179 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003180 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02003181
Peter Maydell3b643492015-04-26 16:49:23 +01003182 return result;
bellard13eb76e2004-01-24 15:23:36 +00003183}
bellard8df1cd02005-01-28 22:37:22 +00003184
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003185/* Called from RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003186static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
3187 const uint8_t *buf, int len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003188{
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003189 hwaddr l;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003190 hwaddr addr1;
3191 MemoryRegion *mr;
3192 MemTxResult result = MEMTX_OK;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003193
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003194 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003195 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003196 result = flatview_write_continue(fv, addr, attrs, buf, len,
3197 addr1, l, mr);
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003198
3199 return result;
3200}
3201
3202/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003203MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
3204 MemTxAttrs attrs, uint8_t *buf,
3205 int len, hwaddr addr1, hwaddr l,
3206 MemoryRegion *mr)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003207{
3208 uint8_t *ptr;
3209 uint64_t val;
3210 MemTxResult result = MEMTX_OK;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003211 bool release_lock = false;
3212
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003213 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003214 if (!memory_access_is_direct(mr, false)) {
3215 /* I/O case */
3216 release_lock |= prepare_mmio_access(mr);
3217 l = memory_access_size(mr, l, addr1);
3218 switch (l) {
3219 case 8:
3220 /* 64 bit read access */
3221 result |= memory_region_dispatch_read(mr, addr1, &val, 8,
3222 attrs);
3223 stq_p(buf, val);
3224 break;
3225 case 4:
3226 /* 32 bit read access */
3227 result |= memory_region_dispatch_read(mr, addr1, &val, 4,
3228 attrs);
3229 stl_p(buf, val);
3230 break;
3231 case 2:
3232 /* 16 bit read access */
3233 result |= memory_region_dispatch_read(mr, addr1, &val, 2,
3234 attrs);
3235 stw_p(buf, val);
3236 break;
3237 case 1:
3238 /* 8 bit read access */
3239 result |= memory_region_dispatch_read(mr, addr1, &val, 1,
3240 attrs);
3241 stb_p(buf, val);
3242 break;
3243 default:
3244 abort();
3245 }
3246 } else {
3247 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003248 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003249 memcpy(buf, ptr, l);
3250 }
3251
3252 if (release_lock) {
3253 qemu_mutex_unlock_iothread();
3254 release_lock = false;
3255 }
3256
3257 len -= l;
3258 buf += l;
3259 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003260
3261 if (!len) {
3262 break;
3263 }
3264
3265 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003266 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003267 }
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003268
3269 return result;
3270}
3271
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003272/* Called from RCU critical section. */
3273static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
3274 MemTxAttrs attrs, uint8_t *buf, int len)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003275{
3276 hwaddr l;
3277 hwaddr addr1;
3278 MemoryRegion *mr;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003279
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003280 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003281 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003282 return flatview_read_continue(fv, addr, attrs, buf, len,
3283 addr1, l, mr);
Avi Kivityac1970f2012-10-03 16:22:53 +02003284}
3285
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003286MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
3287 MemTxAttrs attrs, uint8_t *buf, int len)
3288{
3289 MemTxResult result = MEMTX_OK;
3290 FlatView *fv;
3291
3292 if (len > 0) {
3293 rcu_read_lock();
3294 fv = address_space_to_flatview(as);
3295 result = flatview_read(fv, addr, attrs, buf, len);
3296 rcu_read_unlock();
3297 }
3298
3299 return result;
3300}
3301
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003302MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
3303 MemTxAttrs attrs,
3304 const uint8_t *buf, int len)
3305{
3306 MemTxResult result = MEMTX_OK;
3307 FlatView *fv;
3308
3309 if (len > 0) {
3310 rcu_read_lock();
3311 fv = address_space_to_flatview(as);
3312 result = flatview_write(fv, addr, attrs, buf, len);
3313 rcu_read_unlock();
3314 }
3315
3316 return result;
3317}
3318
Paolo Bonzinidb84fd92018-03-05 09:29:04 +01003319MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
3320 uint8_t *buf, int len, bool is_write)
3321{
3322 if (is_write) {
3323 return address_space_write(as, addr, attrs, buf, len);
3324 } else {
3325 return address_space_read_full(as, addr, attrs, buf, len);
3326 }
3327}
3328
Avi Kivitya8170e52012-10-23 12:30:10 +02003329void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02003330 int len, int is_write)
3331{
Peter Maydell5c9eb022015-04-26 16:49:24 +01003332 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3333 buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02003334}
3335
Alexander Graf582b55a2013-12-11 14:17:44 +01003336enum write_rom_type {
3337 WRITE_DATA,
3338 FLUSH_CACHE,
3339};
3340
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003341static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
Alexander Graf582b55a2013-12-11 14:17:44 +01003342 hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
bellardd0ecd2a2006-04-23 17:14:48 +00003343{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003344 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00003345 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003346 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003347 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00003348
Paolo Bonzini41063e12015-03-18 14:21:43 +01003349 rcu_read_lock();
bellardd0ecd2a2006-04-23 17:14:48 +00003350 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003351 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003352 mr = address_space_translate(as, addr, &addr1, &l, true,
3353 MEMTXATTRS_UNSPECIFIED);
ths3b46e622007-09-17 08:09:54 +00003354
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003355 if (!(memory_region_is_ram(mr) ||
3356 memory_region_is_romd(mr))) {
Paolo Bonzinib242e0e2015-07-04 00:24:51 +02003357 l = memory_access_size(mr, l, addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00003358 } else {
bellardd0ecd2a2006-04-23 17:14:48 +00003359 /* ROM/RAM case */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003360 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
Alexander Graf582b55a2013-12-11 14:17:44 +01003361 switch (type) {
3362 case WRITE_DATA:
3363 memcpy(ptr, buf, l);
Paolo Bonzini845b6212015-03-23 11:45:53 +01003364 invalidate_and_set_dirty(mr, addr1, l);
Alexander Graf582b55a2013-12-11 14:17:44 +01003365 break;
3366 case FLUSH_CACHE:
3367 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
3368 break;
3369 }
bellardd0ecd2a2006-04-23 17:14:48 +00003370 }
3371 len -= l;
3372 buf += l;
3373 addr += l;
3374 }
Paolo Bonzini41063e12015-03-18 14:21:43 +01003375 rcu_read_unlock();
bellardd0ecd2a2006-04-23 17:14:48 +00003376}
3377
Alexander Graf582b55a2013-12-11 14:17:44 +01003378/* used for ROM loading : can write in RAM and ROM */
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003379void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
Alexander Graf582b55a2013-12-11 14:17:44 +01003380 const uint8_t *buf, int len)
3381{
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003382 cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
Alexander Graf582b55a2013-12-11 14:17:44 +01003383}
3384
3385void cpu_flush_icache_range(hwaddr start, int len)
3386{
3387 /*
3388 * This function should do the same thing as an icache flush that was
3389 * triggered from within the guest. For TCG we are always cache coherent,
3390 * so there is no need to flush anything. For KVM / Xen we need to flush
3391 * the host's instruction cache at least.
3392 */
3393 if (tcg_enabled()) {
3394 return;
3395 }
3396
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003397 cpu_physical_memory_write_rom_internal(&address_space_memory,
3398 start, NULL, len, FLUSH_CACHE);
Alexander Graf582b55a2013-12-11 14:17:44 +01003399}
3400
aliguori6d16c2f2009-01-22 16:59:11 +00003401typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003402 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00003403 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02003404 hwaddr addr;
3405 hwaddr len;
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003406 bool in_use;
aliguori6d16c2f2009-01-22 16:59:11 +00003407} BounceBuffer;
3408
3409static BounceBuffer bounce;
3410
aliguoriba223c22009-01-22 16:59:16 +00003411typedef struct MapClient {
Fam Zhenge95205e2015-03-16 17:03:37 +08003412 QEMUBH *bh;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003413 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00003414} MapClient;
3415
Fam Zheng38e047b2015-03-16 17:03:35 +08003416QemuMutex map_client_list_lock;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003417static QLIST_HEAD(map_client_list, MapClient) map_client_list
3418 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00003419
Fam Zhenge95205e2015-03-16 17:03:37 +08003420static void cpu_unregister_map_client_do(MapClient *client)
aliguoriba223c22009-01-22 16:59:16 +00003421{
Blue Swirl72cf2d42009-09-12 07:36:22 +00003422 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05003423 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00003424}
3425
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003426static void cpu_notify_map_clients_locked(void)
aliguoriba223c22009-01-22 16:59:16 +00003427{
3428 MapClient *client;
3429
Blue Swirl72cf2d42009-09-12 07:36:22 +00003430 while (!QLIST_EMPTY(&map_client_list)) {
3431 client = QLIST_FIRST(&map_client_list);
Fam Zhenge95205e2015-03-16 17:03:37 +08003432 qemu_bh_schedule(client->bh);
3433 cpu_unregister_map_client_do(client);
aliguoriba223c22009-01-22 16:59:16 +00003434 }
3435}
3436
Fam Zhenge95205e2015-03-16 17:03:37 +08003437void cpu_register_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003438{
3439 MapClient *client = g_malloc(sizeof(*client));
3440
Fam Zheng38e047b2015-03-16 17:03:35 +08003441 qemu_mutex_lock(&map_client_list_lock);
Fam Zhenge95205e2015-03-16 17:03:37 +08003442 client->bh = bh;
bellardd0ecd2a2006-04-23 17:14:48 +00003443 QLIST_INSERT_HEAD(&map_client_list, client, link);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003444 if (!atomic_read(&bounce.in_use)) {
3445 cpu_notify_map_clients_locked();
3446 }
Fam Zheng38e047b2015-03-16 17:03:35 +08003447 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003448}
3449
Fam Zheng38e047b2015-03-16 17:03:35 +08003450void cpu_exec_init_all(void)
3451{
3452 qemu_mutex_init(&ram_list.mutex);
Peter Maydell20bccb82016-10-24 16:26:49 +01003453 /* The data structures we set up here depend on knowing the page size,
3454 * so no more changes can be made after this point.
3455 * In an ideal world, nothing we did before we had finished the
3456 * machine setup would care about the target page size, and we could
3457 * do this much later, rather than requiring board models to state
3458 * up front what their requirements are.
3459 */
3460 finalize_target_page_bits();
Fam Zheng38e047b2015-03-16 17:03:35 +08003461 io_mem_init();
Paolo Bonzini680a4782015-11-02 09:23:52 +01003462 memory_map_init();
Fam Zheng38e047b2015-03-16 17:03:35 +08003463 qemu_mutex_init(&map_client_list_lock);
3464}
3465
Fam Zhenge95205e2015-03-16 17:03:37 +08003466void cpu_unregister_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003467{
Fam Zhenge95205e2015-03-16 17:03:37 +08003468 MapClient *client;
bellardd0ecd2a2006-04-23 17:14:48 +00003469
Fam Zhenge95205e2015-03-16 17:03:37 +08003470 qemu_mutex_lock(&map_client_list_lock);
3471 QLIST_FOREACH(client, &map_client_list, link) {
3472 if (client->bh == bh) {
3473 cpu_unregister_map_client_do(client);
3474 break;
3475 }
3476 }
3477 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003478}
3479
3480static void cpu_notify_map_clients(void)
3481{
Fam Zheng38e047b2015-03-16 17:03:35 +08003482 qemu_mutex_lock(&map_client_list_lock);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003483 cpu_notify_map_clients_locked();
Fam Zheng38e047b2015-03-16 17:03:35 +08003484 qemu_mutex_unlock(&map_client_list_lock);
aliguori6d16c2f2009-01-22 16:59:11 +00003485}
3486
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003487static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01003488 bool is_write, MemTxAttrs attrs)
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003489{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003490 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003491 hwaddr l, xlat;
3492
3493 while (len > 0) {
3494 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003495 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003496 if (!memory_access_is_direct(mr, is_write)) {
3497 l = memory_access_size(mr, l, addr);
Peter Maydelleace72b2018-05-31 14:50:52 +01003498 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003499 return false;
3500 }
3501 }
3502
3503 len -= l;
3504 addr += l;
3505 }
3506 return true;
3507}
3508
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003509bool address_space_access_valid(AddressSpace *as, hwaddr addr,
Peter Maydellfddffa42018-05-31 14:50:52 +01003510 int len, bool is_write,
3511 MemTxAttrs attrs)
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003512{
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003513 FlatView *fv;
3514 bool result;
3515
3516 rcu_read_lock();
3517 fv = address_space_to_flatview(as);
Peter Maydelleace72b2018-05-31 14:50:52 +01003518 result = flatview_access_valid(fv, addr, len, is_write, attrs);
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003519 rcu_read_unlock();
3520 return result;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003521}
3522
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003523static hwaddr
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003524flatview_extend_translation(FlatView *fv, hwaddr addr,
Peter Maydell53d07902018-05-31 14:50:52 +01003525 hwaddr target_len,
3526 MemoryRegion *mr, hwaddr base, hwaddr len,
3527 bool is_write, MemTxAttrs attrs)
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003528{
3529 hwaddr done = 0;
3530 hwaddr xlat;
3531 MemoryRegion *this_mr;
3532
3533 for (;;) {
3534 target_len -= len;
3535 addr += len;
3536 done += len;
3537 if (target_len == 0) {
3538 return done;
3539 }
3540
3541 len = target_len;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003542 this_mr = flatview_translate(fv, addr, &xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +01003543 &len, is_write, attrs);
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003544 if (this_mr != mr || xlat != base + done) {
3545 return done;
3546 }
3547 }
3548}
3549
aliguori6d16c2f2009-01-22 16:59:11 +00003550/* Map a physical memory region into a host virtual address.
3551 * May map a subset of the requested range, given by and returned in *plen.
3552 * May return NULL if resources needed to perform the mapping are exhausted.
3553 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00003554 * Use cpu_register_map_client() to know when retrying the map operation is
3555 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00003556 */
Avi Kivityac1970f2012-10-03 16:22:53 +02003557void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02003558 hwaddr addr,
3559 hwaddr *plen,
Peter Maydellf26404f2018-05-31 14:50:52 +01003560 bool is_write,
3561 MemTxAttrs attrs)
aliguori6d16c2f2009-01-22 16:59:11 +00003562{
Avi Kivitya8170e52012-10-23 12:30:10 +02003563 hwaddr len = *plen;
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003564 hwaddr l, xlat;
3565 MemoryRegion *mr;
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003566 void *ptr;
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003567 FlatView *fv;
aliguori6d16c2f2009-01-22 16:59:11 +00003568
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003569 if (len == 0) {
3570 return NULL;
3571 }
aliguori6d16c2f2009-01-22 16:59:11 +00003572
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003573 l = len;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003574 rcu_read_lock();
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003575 fv = address_space_to_flatview(as);
Peter Maydellefa99a22018-05-31 14:50:52 +01003576 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini41063e12015-03-18 14:21:43 +01003577
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003578 if (!memory_access_is_direct(mr, is_write)) {
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003579 if (atomic_xchg(&bounce.in_use, true)) {
Paolo Bonzini41063e12015-03-18 14:21:43 +01003580 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003581 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00003582 }
Kevin Wolfe85d9db2013-07-22 14:30:23 +02003583 /* Avoid unbounded allocations */
3584 l = MIN(l, TARGET_PAGE_SIZE);
3585 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003586 bounce.addr = addr;
3587 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003588
3589 memory_region_ref(mr);
3590 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003591 if (!is_write) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003592 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003593 bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01003594 }
aliguori6d16c2f2009-01-22 16:59:11 +00003595
Paolo Bonzini41063e12015-03-18 14:21:43 +01003596 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003597 *plen = l;
3598 return bounce.buffer;
3599 }
3600
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003601
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003602 memory_region_ref(mr);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003603 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
Peter Maydell53d07902018-05-31 14:50:52 +01003604 l, is_write, attrs);
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003605 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003606 rcu_read_unlock();
3607
3608 return ptr;
aliguori6d16c2f2009-01-22 16:59:11 +00003609}
3610
Avi Kivityac1970f2012-10-03 16:22:53 +02003611/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00003612 * Will also mark the memory as dirty if is_write == 1. access_len gives
3613 * the amount of memory that was actually read or written by the caller.
3614 */
Avi Kivitya8170e52012-10-23 12:30:10 +02003615void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3616 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00003617{
3618 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003619 MemoryRegion *mr;
3620 ram_addr_t addr1;
3621
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01003622 mr = memory_region_from_host(buffer, &addr1);
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003623 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00003624 if (is_write) {
Paolo Bonzini845b6212015-03-23 11:45:53 +01003625 invalidate_and_set_dirty(mr, addr1, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003626 }
Jan Kiszka868bb332011-06-21 22:59:09 +02003627 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02003628 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01003629 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003630 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00003631 return;
3632 }
3633 if (is_write) {
Peter Maydell5c9eb022015-04-26 16:49:24 +01003634 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3635 bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003636 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00003637 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00003638 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003639 memory_region_unref(bounce.mr);
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003640 atomic_mb_set(&bounce.in_use, false);
aliguoriba223c22009-01-22 16:59:16 +00003641 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00003642}
bellardd0ecd2a2006-04-23 17:14:48 +00003643
Avi Kivitya8170e52012-10-23 12:30:10 +02003644void *cpu_physical_memory_map(hwaddr addr,
3645 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02003646 int is_write)
3647{
Peter Maydellf26404f2018-05-31 14:50:52 +01003648 return address_space_map(&address_space_memory, addr, plen, is_write,
3649 MEMTXATTRS_UNSPECIFIED);
Avi Kivityac1970f2012-10-03 16:22:53 +02003650}
3651
Avi Kivitya8170e52012-10-23 12:30:10 +02003652void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3653 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003654{
3655 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3656}
3657
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003658#define ARG1_DECL AddressSpace *as
3659#define ARG1 as
3660#define SUFFIX
3661#define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3662#define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3663#define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3664#define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3665#define RCU_READ_LOCK(...) rcu_read_lock()
3666#define RCU_READ_UNLOCK(...) rcu_read_unlock()
3667#include "memory_ldst.inc.c"
Alexander Graf1e78bcc2011-07-06 09:09:23 +02003668
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003669int64_t address_space_cache_init(MemoryRegionCache *cache,
3670 AddressSpace *as,
3671 hwaddr addr,
3672 hwaddr len,
3673 bool is_write)
3674{
Paolo Bonzini48564042018-03-18 18:26:36 +01003675 AddressSpaceDispatch *d;
3676 hwaddr l;
3677 MemoryRegion *mr;
3678
3679 assert(len > 0);
3680
3681 l = len;
3682 cache->fv = address_space_get_flatview(as);
3683 d = flatview_to_dispatch(cache->fv);
3684 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3685
3686 mr = cache->mrs.mr;
3687 memory_region_ref(mr);
3688 if (memory_access_is_direct(mr, is_write)) {
Peter Maydell53d07902018-05-31 14:50:52 +01003689 /* We don't care about the memory attributes here as we're only
3690 * doing this if we found actual RAM, which behaves the same
3691 * regardless of attributes; so UNSPECIFIED is fine.
3692 */
Paolo Bonzini48564042018-03-18 18:26:36 +01003693 l = flatview_extend_translation(cache->fv, addr, len, mr,
Peter Maydell53d07902018-05-31 14:50:52 +01003694 cache->xlat, l, is_write,
3695 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003696 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
3697 } else {
3698 cache->ptr = NULL;
3699 }
3700
3701 cache->len = l;
3702 cache->is_write = is_write;
3703 return l;
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003704}
3705
3706void address_space_cache_invalidate(MemoryRegionCache *cache,
3707 hwaddr addr,
3708 hwaddr access_len)
3709{
Paolo Bonzini48564042018-03-18 18:26:36 +01003710 assert(cache->is_write);
3711 if (likely(cache->ptr)) {
3712 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3713 }
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003714}
3715
3716void address_space_cache_destroy(MemoryRegionCache *cache)
3717{
Paolo Bonzini48564042018-03-18 18:26:36 +01003718 if (!cache->mrs.mr) {
3719 return;
3720 }
3721
3722 if (xen_enabled()) {
3723 xen_invalidate_map_cache_entry(cache->ptr);
3724 }
3725 memory_region_unref(cache->mrs.mr);
3726 flatview_unref(cache->fv);
3727 cache->mrs.mr = NULL;
3728 cache->fv = NULL;
3729}
3730
3731/* Called from RCU critical section. This function has the same
3732 * semantics as address_space_translate, but it only works on a
3733 * predefined range of a MemoryRegion that was mapped with
3734 * address_space_cache_init.
3735 */
3736static inline MemoryRegion *address_space_translate_cached(
3737 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003738 hwaddr *plen, bool is_write, MemTxAttrs attrs)
Paolo Bonzini48564042018-03-18 18:26:36 +01003739{
3740 MemoryRegionSection section;
3741 MemoryRegion *mr;
3742 IOMMUMemoryRegion *iommu_mr;
3743 AddressSpace *target_as;
3744
3745 assert(!cache->ptr);
3746 *xlat = addr + cache->xlat;
3747
3748 mr = cache->mrs.mr;
3749 iommu_mr = memory_region_get_iommu(mr);
3750 if (!iommu_mr) {
3751 /* MMIO region. */
3752 return mr;
3753 }
3754
3755 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3756 NULL, is_write, true,
Peter Maydell2f7b0092018-05-31 14:50:53 +01003757 &target_as, attrs);
Paolo Bonzini48564042018-03-18 18:26:36 +01003758 return section.mr;
3759}
3760
3761/* Called from RCU critical section. address_space_read_cached uses this
3762 * out of line function when the target is an MMIO or IOMMU region.
3763 */
3764void
3765address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3766 void *buf, int len)
3767{
3768 hwaddr addr1, l;
3769 MemoryRegion *mr;
3770
3771 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003772 mr = address_space_translate_cached(cache, addr, &addr1, &l, false,
3773 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003774 flatview_read_continue(cache->fv,
3775 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3776 addr1, l, mr);
3777}
3778
3779/* Called from RCU critical section. address_space_write_cached uses this
3780 * out of line function when the target is an MMIO or IOMMU region.
3781 */
3782void
3783address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3784 const void *buf, int len)
3785{
3786 hwaddr addr1, l;
3787 MemoryRegion *mr;
3788
3789 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003790 mr = address_space_translate_cached(cache, addr, &addr1, &l, true,
3791 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003792 flatview_write_continue(cache->fv,
3793 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3794 addr1, l, mr);
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003795}
3796
3797#define ARG1_DECL MemoryRegionCache *cache
3798#define ARG1 cache
Paolo Bonzini48564042018-03-18 18:26:36 +01003799#define SUFFIX _cached_slow
3800#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3801#define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3802#define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
Paolo Bonzini90c4fe52017-04-03 13:41:28 +02003803#define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
Paolo Bonzini48564042018-03-18 18:26:36 +01003804#define RCU_READ_LOCK() ((void)0)
3805#define RCU_READ_UNLOCK() ((void)0)
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003806#include "memory_ldst.inc.c"
3807
aliguori5e2972f2009-03-28 17:51:36 +00003808/* virtual memory access for debug (includes writing to ROM) */
Andreas Färberf17ec442013-06-29 19:40:58 +02003809int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
bellardb448f2f2004-02-25 23:24:04 +00003810 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003811{
3812 int l;
Avi Kivitya8170e52012-10-23 12:30:10 +02003813 hwaddr phys_addr;
j_mayer9b3c35e2007-04-07 11:21:28 +00003814 target_ulong page;
bellard13eb76e2004-01-24 15:23:36 +00003815
Christian Borntraeger79ca7a12017-03-07 15:19:08 +01003816 cpu_synchronize_state(cpu);
bellard13eb76e2004-01-24 15:23:36 +00003817 while (len > 0) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003818 int asidx;
3819 MemTxAttrs attrs;
3820
bellard13eb76e2004-01-24 15:23:36 +00003821 page = addr & TARGET_PAGE_MASK;
Peter Maydell5232e4c2016-01-21 14:15:06 +00003822 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3823 asidx = cpu_asidx_from_attrs(cpu, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003824 /* if no physical page mapped, return an error */
3825 if (phys_addr == -1)
3826 return -1;
3827 l = (page + TARGET_PAGE_SIZE) - addr;
3828 if (l > len)
3829 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00003830 phys_addr += (addr & ~TARGET_PAGE_MASK);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003831 if (is_write) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003832 cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
3833 phys_addr, buf, l);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003834 } else {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003835 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
3836 MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003837 buf, l, 0);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003838 }
bellard13eb76e2004-01-24 15:23:36 +00003839 len -= l;
3840 buf += l;
3841 addr += l;
3842 }
3843 return 0;
3844}
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003845
3846/*
3847 * Allows code that needs to deal with migration bitmaps etc to still be built
3848 * target independent.
3849 */
Juan Quintela20afaed2017-03-21 09:09:14 +01003850size_t qemu_target_page_size(void)
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003851{
Juan Quintela20afaed2017-03-21 09:09:14 +01003852 return TARGET_PAGE_SIZE;
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003853}
3854
Juan Quintela46d702b2017-04-24 21:03:48 +02003855int qemu_target_page_bits(void)
3856{
3857 return TARGET_PAGE_BITS;
3858}
3859
3860int qemu_target_page_bits_min(void)
3861{
3862 return TARGET_PAGE_BITS_MIN;
3863}
Paul Brooka68fe892010-03-01 00:08:59 +00003864#endif
bellard13eb76e2004-01-24 15:23:36 +00003865
Blue Swirl8e4a4242013-01-06 18:30:17 +00003866/*
3867 * A helper function for the _utterly broken_ virtio device model to find out if
3868 * it's running on a big endian machine. Don't do this at home kids!
3869 */
Greg Kurz98ed8ec2014-06-24 19:26:29 +02003870bool target_words_bigendian(void);
3871bool target_words_bigendian(void)
Blue Swirl8e4a4242013-01-06 18:30:17 +00003872{
3873#if defined(TARGET_WORDS_BIGENDIAN)
3874 return true;
3875#else
3876 return false;
3877#endif
3878}
3879
Wen Congyang76f35532012-05-07 12:04:18 +08003880#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02003881bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08003882{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003883 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003884 hwaddr l = 1;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003885 bool res;
Wen Congyang76f35532012-05-07 12:04:18 +08003886
Paolo Bonzini41063e12015-03-18 14:21:43 +01003887 rcu_read_lock();
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003888 mr = address_space_translate(&address_space_memory,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003889 phys_addr, &phys_addr, &l, false,
3890 MEMTXATTRS_UNSPECIFIED);
Wen Congyang76f35532012-05-07 12:04:18 +08003891
Paolo Bonzini41063e12015-03-18 14:21:43 +01003892 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3893 rcu_read_unlock();
3894 return res;
Wen Congyang76f35532012-05-07 12:04:18 +08003895}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003896
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003897int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003898{
3899 RAMBlock *block;
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003900 int ret = 0;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003901
Mike Day0dc3f442013-09-05 14:41:35 -04003902 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08003903 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003904 ret = func(block->idstr, block->host, block->offset,
3905 block->used_length, opaque);
3906 if (ret) {
3907 break;
3908 }
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003909 }
Mike Day0dc3f442013-09-05 14:41:35 -04003910 rcu_read_unlock();
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003911 return ret;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003912}
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003913
Cédric Le Goaterb895de52018-05-14 08:57:00 +02003914int qemu_ram_foreach_migratable_block(RAMBlockIterFunc func, void *opaque)
3915{
3916 RAMBlock *block;
3917 int ret = 0;
3918
3919 rcu_read_lock();
3920 RAMBLOCK_FOREACH(block) {
3921 if (!qemu_ram_is_migratable(block)) {
3922 continue;
3923 }
3924 ret = func(block->idstr, block->host, block->offset,
3925 block->used_length, opaque);
3926 if (ret) {
3927 break;
3928 }
3929 }
3930 rcu_read_unlock();
3931 return ret;
3932}
3933
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003934/*
3935 * Unmap pages of memory from start to start+length such that
3936 * they a) read as 0, b) Trigger whatever fault mechanism
3937 * the OS provides for postcopy.
3938 * The pages must be unmapped by the end of the function.
3939 * Returns: 0 on success, none-0 on failure
3940 *
3941 */
3942int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
3943{
3944 int ret = -1;
3945
3946 uint8_t *host_startaddr = rb->host + start;
3947
3948 if ((uintptr_t)host_startaddr & (rb->page_size - 1)) {
3949 error_report("ram_block_discard_range: Unaligned start address: %p",
3950 host_startaddr);
3951 goto err;
3952 }
3953
3954 if ((start + length) <= rb->used_length) {
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003955 bool need_madvise, need_fallocate;
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003956 uint8_t *host_endaddr = host_startaddr + length;
3957 if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
3958 error_report("ram_block_discard_range: Unaligned end address: %p",
3959 host_endaddr);
3960 goto err;
3961 }
3962
3963 errno = ENOTSUP; /* If we are missing MADVISE etc */
3964
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003965 /* The logic here is messy;
3966 * madvise DONTNEED fails for hugepages
3967 * fallocate works on hugepages and shmem
3968 */
3969 need_madvise = (rb->page_size == qemu_host_page_size);
3970 need_fallocate = rb->fd != -1;
3971 if (need_fallocate) {
3972 /* For a file, this causes the area of the file to be zero'd
3973 * if read, and for hugetlbfs also causes it to be unmapped
3974 * so a userfault will trigger.
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +00003975 */
3976#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3977 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
3978 start, length);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003979 if (ret) {
3980 ret = -errno;
3981 error_report("ram_block_discard_range: Failed to fallocate "
3982 "%s:%" PRIx64 " +%zx (%d)",
3983 rb->idstr, start, length, ret);
3984 goto err;
3985 }
3986#else
3987 ret = -ENOSYS;
3988 error_report("ram_block_discard_range: fallocate not available/file"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003989 "%s:%" PRIx64 " +%zx (%d)",
3990 rb->idstr, start, length, ret);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003991 goto err;
3992#endif
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003993 }
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003994 if (need_madvise) {
3995 /* For normal RAM this causes it to be unmapped,
3996 * for shared memory it causes the local mapping to disappear
3997 * and to fall back on the file contents (which we just
3998 * fallocate'd away).
3999 */
4000#if defined(CONFIG_MADVISE)
4001 ret = madvise(host_startaddr, length, MADV_DONTNEED);
4002 if (ret) {
4003 ret = -errno;
4004 error_report("ram_block_discard_range: Failed to discard range "
4005 "%s:%" PRIx64 " +%zx (%d)",
4006 rb->idstr, start, length, ret);
4007 goto err;
4008 }
4009#else
4010 ret = -ENOSYS;
4011 error_report("ram_block_discard_range: MADVISE not available"
4012 "%s:%" PRIx64 " +%zx (%d)",
4013 rb->idstr, start, length, ret);
4014 goto err;
4015#endif
4016 }
4017 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
4018 need_madvise, need_fallocate, ret);
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004019 } else {
4020 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
4021 "/%zx/" RAM_ADDR_FMT")",
4022 rb->idstr, start, length, rb->used_length);
4023 }
4024
4025err:
4026 return ret;
4027}
4028
Peter Maydellec3f8c92013-06-27 20:53:38 +01004029#endif
Yang Zhonga0be0c52017-07-03 18:12:13 +08004030
4031void page_size_init(void)
4032{
4033 /* NOTE: we can always suppose that qemu_host_page_size >=
4034 TARGET_PAGE_SIZE */
Yang Zhonga0be0c52017-07-03 18:12:13 +08004035 if (qemu_host_page_size == 0) {
4036 qemu_host_page_size = qemu_real_host_page_size;
4037 }
4038 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
4039 qemu_host_page_size = TARGET_PAGE_SIZE;
4040 }
4041 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
4042}
Alexey Kardashevskiy5e8fd942017-09-21 18:51:06 +10004043
4044#if !defined(CONFIG_USER_ONLY)
4045
4046static void mtree_print_phys_entries(fprintf_function mon, void *f,
4047 int start, int end, int skip, int ptr)
4048{
4049 if (start == end - 1) {
4050 mon(f, "\t%3d ", start);
4051 } else {
4052 mon(f, "\t%3d..%-3d ", start, end - 1);
4053 }
4054 mon(f, " skip=%d ", skip);
4055 if (ptr == PHYS_MAP_NODE_NIL) {
4056 mon(f, " ptr=NIL");
4057 } else if (!skip) {
4058 mon(f, " ptr=#%d", ptr);
4059 } else {
4060 mon(f, " ptr=[%d]", ptr);
4061 }
4062 mon(f, "\n");
4063}
4064
4065#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4066 int128_sub((size), int128_one())) : 0)
4067
4068void mtree_print_dispatch(fprintf_function mon, void *f,
4069 AddressSpaceDispatch *d, MemoryRegion *root)
4070{
4071 int i;
4072
4073 mon(f, " Dispatch\n");
4074 mon(f, " Physical sections\n");
4075
4076 for (i = 0; i < d->map.sections_nb; ++i) {
4077 MemoryRegionSection *s = d->map.sections + i;
4078 const char *names[] = { " [unassigned]", " [not dirty]",
4079 " [ROM]", " [watch]" };
4080
4081 mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s",
4082 i,
4083 s->offset_within_address_space,
4084 s->offset_within_address_space + MR_SIZE(s->mr->size),
4085 s->mr->name ? s->mr->name : "(noname)",
4086 i < ARRAY_SIZE(names) ? names[i] : "",
4087 s->mr == root ? " [ROOT]" : "",
4088 s == d->mru_section ? " [MRU]" : "",
4089 s->mr->is_iommu ? " [iommu]" : "");
4090
4091 if (s->mr->alias) {
4092 mon(f, " alias=%s", s->mr->alias->name ?
4093 s->mr->alias->name : "noname");
4094 }
4095 mon(f, "\n");
4096 }
4097
4098 mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4099 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
4100 for (i = 0; i < d->map.nodes_nb; ++i) {
4101 int j, jprev;
4102 PhysPageEntry prev;
4103 Node *n = d->map.nodes + i;
4104
4105 mon(f, " [%d]\n", i);
4106
4107 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
4108 PhysPageEntry *pe = *n + j;
4109
4110 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
4111 continue;
4112 }
4113
4114 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4115
4116 jprev = j;
4117 prev = *pe;
4118 }
4119
4120 if (jprev != ARRAY_SIZE(*n)) {
4121 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4122 }
4123 }
4124}
4125
4126#endif