1. f2ce39b vl: make qemu_get_machine_opts static by Paolo Bonzini · 4 years, 5 months ago
  2. 2c65db5 vl: extract softmmu/datadir.c by Paolo Bonzini · 4 years, 5 months ago
  3. 82e6905 riscv: do not use ram_size global by Paolo Bonzini · 4 years, 5 months ago
  4. 90742c5 hw/riscv: microchip_pfsoc: Hook the I2C1 controller by Bin Meng · 4 years, 5 months ago
  5. f03100d hw/riscv: microchip_pfsoc: Correct DDR memory map by Bin Meng · 4 years, 5 months ago
  6. 27c22b2 hw/riscv: microchip_pfsoc: Map the reserved memory at address 0 by Bin Meng · 4 years, 5 months ago
  7. cdd58c7 hw/riscv: microchip_pfsoc: Connect the SYSREG module by Bin Meng · 4 years, 5 months ago
  8. e35d617 hw/riscv: microchip_pfsoc: Connect the IOSCB module by Bin Meng · 4 years, 5 months ago
  9. 933f73f hw/riscv: microchip_pfsoc: Connect DDR memory controller modules by Bin Meng · 4 years, 5 months ago
  10. 08b86e3 hw/riscv: microchip_pfsoc: Document where to look at the SoC memory maps by Bin Meng · 4 years, 5 months ago
  11. 4e1e300 hw/riscv: virt: Allow passing custom DTB by Anup Patel · 4 years, 5 months ago
  12. d5c90cf hw/riscv: sifive_u: Allow passing custom DTB by Anup Patel · 4 years, 5 months ago
  13. 38bc4e3 hw/riscv: Load the kernel after the firmware by Alistair Francis · 4 years, 6 months ago
  14. c407784 hw/riscv: Add a riscv_is_32_bit() function by Alistair Francis · 4 years, 6 months ago
  15. e66c531 hw/riscv: Return the end address of the loaded firmware by Alistair Francis · 4 years, 6 months ago
  16. 099be03 hw/riscv: sifive_u: Allow specifying the CPU by Alistair Francis · 4 years, 6 months ago
  17. 617160c load_elf: Remove unused address variables from callers by BALATON Zoltan · 4 years, 9 months ago
  18. 418b473 sifive_u: Register "start-in-flash" as class property by Eduardo Habkost · 4 years, 6 months ago
  19. fabbcbd sifive_e: Register "revb" as class property by Eduardo Habkost · 4 years, 6 months ago
  20. 13b8c35 sifive_u: Rename memmap enum constants by Eduardo Habkost · 4 years, 7 months ago
  21. 5488f27 sifive_e: Rename memmap enum constants by Eduardo Habkost · 4 years, 7 months ago
  22. 7595a65 hw/riscv: Sort the Kconfig options in alphabetical order by Bin Meng · 4 years, 7 months ago
  23. 4791b4c hw/riscv: Drop CONFIG_SIFIVE by Bin Meng · 4 years, 7 months ago
  24. 30a4af1 hw/riscv: Always build riscv_hart.c by Bin Meng · 4 years, 7 months ago
  25. a4b8460 hw/riscv: Move sifive_test model to hw/misc by Bin Meng · 4 years, 7 months ago
  26. b609b7e hw/riscv: Move sifive_uart model to hw/char by Bin Meng · 4 years, 7 months ago
  27. 70eb9f9 hw/riscv: Move riscv_htif model to hw/char by Bin Meng · 4 years, 7 months ago
  28. 84fcf3c hw/riscv: Move sifive_plic model to hw/intc by Bin Meng · 4 years, 7 months ago
  29. 406fafd hw/riscv: Move sifive_clint model to hw/intc by Bin Meng · 4 years, 7 months ago
  30. 4921a0c hw/riscv: Move sifive_gpio model to hw/gpio by Bin Meng · 4 years, 7 months ago
  31. 0fa9e32 hw/riscv: Move sifive_u_otp model to hw/misc by Bin Meng · 4 years, 7 months ago
  32. 9fe640a hw/riscv: Move sifive_u_prci model to hw/misc by Bin Meng · 4 years, 7 months ago
  33. 89ece6f hw/riscv: Move sifive_e_prci model to hw/misc by Bin Meng · 4 years, 7 months ago
  34. 834e027 hw/riscv: sifive_u: Connect a DMA controller by Bin Meng · 4 years, 7 months ago
  35. a47ef6e hw/riscv: clint: Avoid using hard-coded timebase frequency by Bin Meng · 4 years, 7 months ago
  36. ce908a2 hw/riscv: microchip_pfsoc: Hook GPIO controllers by Bin Meng · 4 years, 7 months ago
  37. 47374b0 hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs by Bin Meng · 4 years, 7 months ago
  38. 7124e27 hw/riscv: microchip_pfsoc: Connect a DMA controller by Bin Meng · 4 years, 7 months ago
  39. 898dc00 hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card by Bin Meng · 4 years, 7 months ago
  40. 8f2ac39 hw/riscv: microchip_pfsoc: Connect 5 MMUARTs by Bin Meng · 4 years, 7 months ago
  41. 56f6e31 hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board by Bin Meng · 4 years, 7 months ago
  42. 73f6ed9 target/riscv: cpu: Set reset vector based on the configured property value by Bin Meng · 4 years, 7 months ago
  43. 4100d5e hw/riscv: hart: Add a new 'resetvec' property by Bin Meng · 4 years, 7 months ago
  44. ab3d207 riscv: sifive_test: Allow 16-bit writes to memory region by Nathan Chancellor · 4 years, 7 months ago
  45. feabc71 configure: do not include dependency flags in QEMU_CFLAGS and LIBS by Paolo Bonzini · 4 years, 7 months ago
  46. 30c717c opentitan: Rename memmap enum constants by Eduardo Habkost · 4 years, 7 months ago
  47. 18df0b4 hw/riscv: virt: Allow creating multiple NUMA sockets by Anup Patel · 4 years, 11 months ago
  48. a717279 hw/riscv: spike: Allow creating multiple NUMA sockets by Anup Patel · 4 years, 11 months ago
  49. 83fcaef hw/riscv: Add helpers for RISC-V multi-socket NUMA machines by Anup Patel · 4 years, 10 months ago
  50. c9270e1 hw/riscv: Allow creating multiple instances of PLIC by Anup Patel · 4 years, 11 months ago
  51. 3bf03f0 hw/riscv: Allow creating multiple instances of CLINT by Anup Patel · 4 years, 11 months ago
  52. fad1443 hw/riscv: spike: Change the default bios to use generic platform image by Bin Meng · 5 years ago
  53. 2cacd84 hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u by Bin Meng · 5 years ago
  54. 6eaf9cf hw/riscv: sifive_u: Add a dummy L2 cache controller device by Bin Meng · 4 years, 8 months ago
  55. 2c44220 meson: convert hw/arch* by Marc-André Lureau · 6 years ago
  56. 243af02 trace: switch position of headers to what Meson requires by Paolo Bonzini · 5 years ago
  57. e79d27c hw/riscv: sifive_e: Correct debug block size by Bin Meng · 4 years, 8 months ago
  58. 7ad36e2 hw: Mark nd_table[] misuse in realize methods FIXME by Markus Armbruster · 4 years, 9 months ago
  59. 9eb8b14 hw/riscv: Modify MROM size to end at 0x10000 by Bin Meng · 4 years, 9 months ago
  60. 8590f53 RISC-V: Support 64 bit start address by Atish Patra · 4 years, 9 months ago
  61. dc144fe riscv: Add opensbi firmware dynamic support by Atish Patra · 4 years, 9 months ago
  62. 66b1205 RISC-V: Copy the fdt in dram instead of ROM by Atish Patra · 4 years, 9 months ago
  63. 43cf723 riscv: Unify Qemu's reset vector code path by Atish Patra · 4 years, 9 months ago
  64. 2c44bbf hw/riscv: virt: Sort the SoC memmap table entries by Bin Meng · 4 years, 9 months ago
  65. 668f62e error: Eliminate error_propagate() with Coccinelle, part 1 by Markus Armbruster · 4 years, 9 months ago
  66. 5325cc3 qom: Put name parameter before value / visitor parameter by Markus Armbruster · 4 years, 9 months ago
  67. 118bfd7 qdev: Use returned bool to check for qdev_realize() etc. failure by Markus Armbruster · 4 years, 9 months ago
  68. 70b78d4 hw/riscv: Allow 64 bit access to SiFive CLINT by Alistair Francis · 4 years, 9 months ago
  69. 5576582 riscv: plic: Add a couple of mising sifive_plic_update calls by Jessica Clarke · 4 years, 9 months ago
  70. aa4d30f riscv: plic: Honour source priorities by Jessica Clarke · 4 years, 9 months ago
  71. 3e9a88c riscv_hart: Fix riscv_harts_realize() error API violations by Markus Armbruster · 4 years, 9 months ago
  72. cbe3a8c riscv/sifive_u: Fix sifive_u_soc_realize() error API violations by Markus Armbruster · 4 years, 9 months ago
  73. 3eaea6e hw/riscv: sifive_u: Add a dummy DDR memory controller device by Bin Meng · 4 years, 10 months ago
  74. 4909391 hw/riscv: sifive_u: Sort the SoC memmap table entries by Bin Meng · 4 years, 10 months ago
  75. 17aad9f hw/riscv: sifive_u: Support different boot source per MSEL pin state by Bin Meng · 4 years, 10 months ago
  76. 495134b hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004 by Bin Meng · 4 years, 10 months ago
  77. cfa3263 hw/riscv: sifive_u: Add a new property msel for MSEL pin state by Bin Meng · 4 years, 10 months ago
  78. 3e9667c hw/riscv: sifive_u: Rename serial property get/set functions to a generic name by Bin Meng · 4 years, 10 months ago
  79. 5133ed1 hw/riscv: sifive_u: Add reset functionality by Bin Meng · 4 years, 10 months ago
  80. 621c100 hw/riscv: sifive_gpio: Do not blindly trigger output IRQs by Bin Meng · 4 years, 10 months ago
  81. 8a88b9f hw/riscv: sifive_u: Hook a GPIO controller by Bin Meng · 4 years, 10 months ago
  82. 4bb216f hw/riscv: sifive_gpio: Add a new 'ngpio' property by Bin Meng · 4 years, 10 months ago
  83. 2e30ccb hw/riscv: sifive_gpio: Clean up the codes by Bin Meng · 4 years, 10 months ago
  84. ea85f27 hw/riscv: sifive_u: Generate device tree node for OTP by Bin Meng · 4 years, 10 months ago
  85. 5874f0a hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit by Bin Meng · 4 years, 10 months ago
  86. 8949446 hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions by Bin Meng · 4 years, 10 months ago
  87. 8f8c6c1 hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions by Bin Meng · 4 years, 10 months ago
  88. cc41126 riscv/opentitan: Connect the UART device by Alistair Francis · 5 years ago
  89. b9fc513 riscv/opentitan: Connect the PLIC device by Alistair Francis · 5 years ago
  90. a7d2d98 hw/char: Initial commit of Ibex UART by Alistair Francis · 5 years ago
  91. 888c9af riscv/opentitan: Fix the ROM size by Alistair Francis · 4 years, 10 months ago
  92. 5a84206 sifive_e: Support the revB machine by Alistair Francis · 4 years, 11 months ago
  93. ce189ab qdev: Convert bus-less devices to qdev_realize() with Coccinelle by Markus Armbruster · 4 years, 10 months ago
  94. db873cc sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2 by Markus Armbruster · 4 years, 10 months ago
  95. 0074fce sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1 by Markus Armbruster · 4 years, 10 months ago
  96. 3c6ef47 sysbus: Convert to sysbus_realize() etc. with Coccinelle by Markus Armbruster · 4 years, 10 months ago
  97. 9fc7fc4 qom: Less verbose object_initialize_child() by Markus Armbruster · 4 years, 10 months ago
  98. 19dc7e9 qom: Tidy up a few object_initialize_child() calls by Markus Armbruster · 4 years, 10 months ago
  99. df70796 qdev: Convert uses of qdev_create() manually by Markus Armbruster · 4 years, 10 months ago
  100. 3e80f69 qdev: Convert uses of qdev_create() with Coccinelle by Markus Armbruster · 4 years, 10 months ago