| commit | 933f73f13e5ceb9357e9c9d51ce39c43aa1d534f | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bin.meng@windriver.com> | Wed Oct 28 13:30:03 2020 +0800 |
| committer | Alistair Francis <alistair.francis@wdc.com> | Tue Nov 03 07:17:23 2020 -0800 |
| tree | 1276d3fe98992197dd292cca037981e77fe6c78a | |
| parent | 3400b15bbe0fbc672fee9a18268154b07a1fed2e [diff] |
hw/riscv: microchip_pfsoc: Connect DDR memory controller modules Connect DDR SGMII PHY module and CFG module to the PolarFire SoC. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>