commit | 49093916d37f663e86316ec54cb77d5515bb973f | [log] [tgz] |
---|---|---|
author | Bin Meng <bin.meng@windriver.com> | Mon Jun 15 17:50:40 2020 -0700 |
committer | Alistair Francis <alistair.francis@wdc.com> | Fri Jun 19 08:25:27 2020 -0700 |
tree | b8bb02546172fbf903ebe552396ce649742e871f | |
parent | 17aad9f276953c1eaf0750faf4758fd2f5ebeb84 [diff] |
hw/riscv: sifive_u: Sort the SoC memmap table entries Move the flash and DRAM to the end of the SoC memmap table. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1592268641-7478-5-git-send-email-bmeng.cn@gmail.com Message-Id: <1592268641-7478-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>