1. 7da2fb2 hw/riscv/virt: Enable basic ACPI infrastructure by Sunil V L · 1 year, 10 months ago
  2. 71302ff hw/riscv/virt: Add memmap pointer to RiscVVirtState by Sunil V L · 1 year, 10 months ago
  3. 168b8c2 hw/riscv/virt: Add a switch to disable ACPI by Sunil V L · 1 year, 10 months ago
  4. 90477a6 hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields by Sunil V L · 1 year, 10 months ago
  5. fc9ec36 hw/riscv: Move the dtb load bits outside of create_fdt() by Bin Meng · 1 year, 10 months ago
  6. 8b64475b hw/riscv/boot.c: make riscv_load_initrd() static by Daniel Henrique Barboza · 1 year, 10 months ago
  7. 487d73f hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() by Daniel Henrique Barboza · 1 year, 10 months ago
  8. 62c5bc3 hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel() by Daniel Henrique Barboza · 1 year, 10 months ago
  9. 4b40288 hw/riscv: change riscv_compute_fdt_addr() semantics by Daniel Henrique Barboza · 1 year, 11 months ago
  10. bc2c015 hw/riscv: split fdt address calculation from fdt load by Daniel Henrique Barboza · 1 year, 11 months ago
  11. 7ae7146 include/hw/riscv/opentitan: update opentitan IRQs by Wilfred Mallawa · 1 year, 11 months ago
  12. 9c3ee7e hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() by Daniel Henrique Barboza · 1 year, 11 months ago
  13. fb60b48 hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id() by Daniel Henrique Barboza · 1 year, 11 months ago
  14. 60c1f05 hw/riscv/boot.c: use MachineState in riscv_load_kernel() by Daniel Henrique Barboza · 2 years ago
  15. 1f99146 hw/riscv/boot.c: use MachineState in riscv_load_initrd() by Daniel Henrique Barboza · 2 years ago
  16. b9a6547 hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() by Daniel Henrique Barboza · 2 years ago
  17. 60c7dfa hw/riscv/sifive_u: use 'fdt' from MachineState by Daniel Henrique Barboza · 2 years ago
  18. 3139929 hw/riscv/spike: use 'fdt' from MachineState by Daniel Henrique Barboza · 2 years ago
  19. 8f61962 hw/riscv/boot.c: Introduce riscv_find_firmware() by Bin Meng · 2 years ago
  20. 9d3f710 hw/riscv/boot.c: introduce riscv_default_firmware_name() by Daniel Henrique Barboza · 2 years ago
  21. 808faef hw/riscv/boot.c: make riscv_find_firmware() static by Daniel Henrique Barboza · 2 years ago
  22. 7a5951f include: Include headers where needed by Markus Armbruster · 2 years ago
  23. 5decd2c hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0 by Bin Meng · 2 years ago
  24. 59f7448 hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb by Bin Meng · 2 years ago
  25. 3a20cd1 hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC by Bin Meng · 2 years ago
  26. 1257418 hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC by Bin Meng · 2 years ago
  27. 592f0a9 hw/{misc, riscv}: pfsoc: add system controller as unimplemented by Conor Dooley · 2 years, 1 month ago
  28. 8d32e37 hw/riscv: pfsoc: add missing FICs as unimplemented by Conor Dooley · 2 years, 1 month ago
  29. 0c83343 hw/riscv: virt: Remove the redundant ipi-id property by Atish Patra · 2 years, 1 month ago
  30. aefd110 hw/riscv/opentitan: add aon_timer base unimpl by Wilfred Mallawa · 2 years, 2 months ago
  31. 5379c1d hw/riscv/opentitan: bump opentitan by Wilfred Mallawa · 2 years, 2 months ago
  32. a5b0249 hw/riscv: virt: Enable booting S-mode firmware from pflash by Sunil V L · 2 years, 2 months ago
  33. 9dfa6c2 hw/riscv/sifive_e: Fix inheritance of SiFiveEState by Bernhard Beschow · 2 years, 3 months ago
  34. a06fded hw/riscv: opentitan: Expose the resetvec as a SoC property by Alistair Francis · 2 years, 3 months ago
  35. 95e401d hw/riscv: virt: fix the plic's address cells by Conor Dooley · 2 years, 4 months ago
  36. 25da6e3 hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals by Conor Dooley · 2 years, 4 months ago
  37. bf8803c hw/riscv: opentitan: bump opentitan version by Wilfred Mallawa · 2 years, 4 months ago
  38. 6934f15 hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() by Daniel Henrique Barboza · 2 years, 5 months ago
  39. 52581c7 Clean up header guards that don't match their file name by Markus Armbruster · 2 years, 7 months ago
  40. 1832b7c hw/riscv: virt: Create a platform bus by Alistair Francis · 2 years, 8 months ago
  41. 1c20d3f hw/riscv: virt: Add a machine done notifier by Alistair Francis · 2 years, 8 months ago
  42. faee544 hw/riscv: boot: Support 64bit fdt address. by Dylan Jhong · 2 years, 8 months ago
  43. 9972479 riscv: opentitan: Connect opentitan SPI Host by Wilfred Mallawa · 2 years, 10 months ago
  44. aecabd5 hw: riscv: opentitan: fixup SPI addresses by Wilfred Mallawa · 2 years, 10 months ago
  45. 0631aaa hw/riscv: virt: Increase maximum number of allowed CPUs by Anup Patel · 2 years, 10 months ago
  46. 28d8c28 hw/riscv: virt: Add optional AIA IMSIC support to virt machine by Anup Patel · 2 years, 10 months ago
  47. e6faee6 hw/riscv: virt: Add optional AIA APLIC support to virt machine by Anup Patel · 2 years, 10 months ago
  48. 092dc6d hw/riscv: Remove macros for ELF BIOS image names by Anup Patel · 2 years, 11 months ago
  49. 8d8897a hw/riscv: spike: Allow using binary firmware as bios by Anup Patel · 2 years, 11 months ago
  50. ad40be2 target/riscv: Support start kernel directly by KVM by Yifei Jiang · 3 years ago
  51. d4452c6 hw/riscv: virt: Allow support for 32 cores by Alistair Francis · 3 years ago
  52. 8486eb8 hw/riscv: microchip_pfsoc: Use the PLIC config helper function by Alistair Francis · 3 years, 2 months ago
  53. 4e8fb53 hw/riscv: sifive_u: Use the PLIC config helper function by Alistair Francis · 3 years, 2 months ago
  54. bf357e1 hw/riscv: boot: Add a PLIC config string function by Alistair Francis · 3 years, 2 months ago
  55. 9925c8b hw/riscv: virt: Don't use a macro for the PLIC configuration by Alistair Francis · 3 years, 2 months ago
  56. ef63100 hw/riscv: opentitan: Update to the latest build by Alistair Francis · 3 years, 2 months ago
  57. 954886e hw/riscv: virt: Add optional ACLINT support to virt machine by Anup Patel · 3 years, 3 months ago
  58. ea6eaa0 sifive_u: Connect the SiFive PWM device by Alistair Francis · 3 years, 3 months ago
  59. bb7e0cd hw/riscv: opentitan: Add the flash alias by Alistair Francis · 3 years, 5 months ago
  60. 5ee2576 hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri by Alistair Francis · 3 years, 5 months ago
  61. 3ef6434 hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer by Alistair Francis · 3 years, 6 months ago
  62. a0acd0a hw/riscv: Use macros for BIOS image names by Bin Meng · 3 years, 8 months ago
  63. d4cad54 hw/opentitan: Update the interrupt layout by Alistair Francis · 3 years, 9 months ago
  64. 8a2aca3 hw/riscv: Connect Shakti UART to Shakti platform by Vijai Kumar K · 3 years, 9 months ago
  65. 7a261ba riscv: Add initial support for Shakti C machine by Vijai Kumar K · 3 years, 9 months ago
  66. d6150ac hw/riscv: microchip_pfsoc: Map EMMC/SD mux register by Bin Meng · 3 years, 9 months ago
  67. 0489348 hw/riscv: Add fw_cfg support to virt by Asherah Connor · 3 years, 9 months ago
  68. c65d708 hw/riscv: migrate fdt field to generic MachineState by Alex Bennée · 3 years, 10 months ago
  69. 8e3c886 hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value by Bin Meng · 3 years, 11 months ago
  70. 722f135 hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card by Bin Meng · 3 years, 11 months ago
  71. 145b299 hw/riscv: sifive_u: Add QSPI0 controller and connect a flash by Bin Meng · 3 years, 11 months ago
  72. a8259b5 riscv: Pass RISCVHartArrayState by pointer by Alistair Francis · 4 years ago
  73. d31e970 riscv/opentitan: Update the OpenTitan memory layout by Alistair Francis · 4 years ago
  74. 3ed2b8a hw/riscv: Use the CPU to determine if 32-bit by Alistair Francis · 4 years ago
  75. 7893677 hw/riscv: boot: Remove compile time XLEN checks by Alistair Francis · 4 years ago
  76. 09fe171 riscv: virt: Remove target macro conditionals by Alistair Francis · 4 years ago
  77. dc4d4aa riscv: spike: Remove target macro conditionals by Alistair Francis · 4 years ago
  78. dfc973e hw/riscv: microchip_pfsoc: add QSPI NOR flash by Vitaly Wool · 4 years, 1 month ago
  79. 90742c5 hw/riscv: microchip_pfsoc: Hook the I2C1 controller by Bin Meng · 4 years, 2 months ago
  80. f03100d hw/riscv: microchip_pfsoc: Correct DDR memory map by Bin Meng · 4 years, 1 month ago
  81. 27c22b2 hw/riscv: microchip_pfsoc: Map the reserved memory at address 0 by Bin Meng · 4 years, 2 months ago
  82. cdd58c7 hw/riscv: microchip_pfsoc: Connect the SYSREG module by Bin Meng · 4 years, 2 months ago
  83. e35d617 hw/riscv: microchip_pfsoc: Connect the IOSCB module by Bin Meng · 4 years, 2 months ago
  84. 933f73f hw/riscv: microchip_pfsoc: Connect DDR memory controller modules by Bin Meng · 4 years, 2 months ago
  85. 38bc4e3 hw/riscv: Load the kernel after the firmware by Alistair Francis · 4 years, 2 months ago
  86. c407784 hw/riscv: Add a riscv_is_32_bit() function by Alistair Francis · 4 years, 2 months ago
  87. e66c531 hw/riscv: Return the end address of the loaded firmware by Alistair Francis · 4 years, 2 months ago
  88. 099be03 hw/riscv: sifive_u: Allow specifying the CPU by Alistair Francis · 4 years, 2 months ago
  89. 8063396 Use OBJECT_DECLARE_SIMPLE_TYPE when possible by Eduardo Habkost · 4 years, 3 months ago
  90. 13b8c35 sifive_u: Rename memmap enum constants by Eduardo Habkost · 4 years, 3 months ago
  91. 5488f27 sifive_e: Rename memmap enum constants by Eduardo Habkost · 4 years, 3 months ago
  92. f00f57f Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging by Peter Maydell · 4 years, 3 months ago
  93. a4b8460 hw/riscv: Move sifive_test model to hw/misc by Bin Meng · 4 years, 3 months ago
  94. b609b7e hw/riscv: Move sifive_uart model to hw/char by Bin Meng · 4 years, 3 months ago
  95. 70eb9f9 hw/riscv: Move riscv_htif model to hw/char by Bin Meng · 4 years, 3 months ago
  96. 84fcf3c hw/riscv: Move sifive_plic model to hw/intc by Bin Meng · 4 years, 3 months ago
  97. 406fafd hw/riscv: Move sifive_clint model to hw/intc by Bin Meng · 4 years, 3 months ago
  98. 4921a0c hw/riscv: Move sifive_gpio model to hw/gpio by Bin Meng · 4 years, 3 months ago
  99. 0fa9e32 hw/riscv: Move sifive_u_otp model to hw/misc by Bin Meng · 4 years, 3 months ago
  100. 9fe640a hw/riscv: Move sifive_u_prci model to hw/misc by Bin Meng · 4 years, 3 months ago