1. 97a8ea5 cpu: Replace do_interrupt() by CPUClass::do_interrupt method by Andreas Färber · 12 years ago
  2. 259186a cpu: Move halted and interrupt_request fields to CPUState by Andreas Färber · 12 years ago
  3. 806f352 gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end by Peter Maydell · 12 years ago
  4. fadf982 cpu: Introduce ENV_OFFSET macros by Andreas Färber · 12 years ago
  5. d2123a0 target-xtensa: Use add2/sub2 for mac by Richard Henderson · 12 years ago
  6. c9cda20 target-xtensa: Use mul*2 for mul*hi by Richard Henderson · 12 years ago
  7. c05efcb cpu: Add CPUArchState pointer to CPUState by Andreas Färber · 12 years ago
  8. 25733ea target-xtensa: Move TCG initialization to XtensaCPU initfn by Andreas Färber · 12 years ago
  9. 5f6c964 target-xtensa: Introduce QOM realizefn for XtensaCPU by Andreas Färber · 12 years ago
  10. 004a569 target-xtensa: Mark as unmigratable by Andreas Färber · 12 years ago
  11. 36f25d2 target-xtensa: fix search_pc for the last TB opcode by Max Filippov · 12 years ago
  12. 9c17d61 softmmu: move include files to include/sysemu/ by Paolo Bonzini · 12 years ago
  13. 1de7afc misc: move include files to include/qemu/ by Paolo Bonzini · 12 years ago
  14. 14cccb6 qom: move include files to include/qom/ by Paolo Bonzini · 12 years ago
  15. 022c62c exec: move include files to include/exec/ by Paolo Bonzini · 12 years ago
  16. 76cad71 build: kill libdis, move disassemblers to disas/ by Paolo Bonzini · 12 years ago
  17. a8a826a exec: refactor cpu_restore_state by Blue Swirl · 12 years ago
  18. 659f807 target-xtensa: fix ITLB/DTLB page protection flags by Max Filippov · 12 years ago
  19. f877d09 target-xtensa: use movcond where possible by Max Filippov · 12 years ago
  20. b7909d8 target-xtensa: implement MISC SR by Max Filippov · 12 years ago
  21. 53593e9 target-xtensa: better control rsr/wsr/xsr access to SRs by Max Filippov · 12 years ago
  22. fe0bd47 target-xtensa: restrict available SRs by enabled options by Max Filippov · 12 years ago
  23. 4e41d2f target-xtensa: implement CACHEATTR SR by Max Filippov · 12 years ago
  24. fcc803d target-xtensa: implement ATOMCTL SR by Max Filippov · 12 years ago
  25. ab1103d TCG: Use gen_opc_instr_start from context instead of global variable. by Evgeny Voevodin · 12 years ago
  26. c9c99c2 TCG: Use gen_opc_icount from context instead of global variable. by Evgeny Voevodin · 12 years ago
  27. 25983ca TCG: Use gen_opc_pc from context instead of global variable. by Evgeny Voevodin · 12 years ago
  28. 92414b3 TCG: Use gen_opc_buf from context instead of global variable. by Evgeny Voevodin · 12 years ago
  29. efd7f48 TCG: Use gen_opc_ptr from context instead of global variable. by Evgeny Voevodin · 12 years ago
  30. 0c4fabe target-xtensa: avoid using cpu_single_env by Blue Swirl · 12 years ago
  31. 3993c6b cpus: Pass CPUState to [qemu_]cpu_has_work() by Andreas Färber · 13 years ago
  32. f0de413 target-xtensa: rename helper flags by Aurelien Jarno · 12 years ago
  33. a8170e5 Rename target_phys_addr_t to hwaddr by Avi Kivity · 12 years ago
  34. f783cb2 target-xtensa: de-optimize EXTUI by Aurelien Jarno · 12 years ago
  35. fdefe51 Emit debug_insn for CPU_LOG_TB_OP_OPT as well. by Richard Henderson · 12 years ago
  36. ef04a84 target-xtensa: implement coprocessor context option by Max Filippov · 12 years ago
  37. 4e27386 target-xtensa: implement FP1 group by Max Filippov · 12 years ago
  38. b7ee8c6 target-xtensa: implement FP0 conversions by Max Filippov · 12 years ago
  39. 0b6df83 target-xtensa: implement FP0 arithmetic by Max Filippov · 12 years ago
  40. 9ed7ae1 target-xtensa: implement LSCX and LSCI groups by Max Filippov · 12 years ago
  41. dd519cb target-xtensa: add FP registers by Max Filippov · 12 years ago
  42. 10f6ca0 target-xtensa: handle boolean option in overlays by Max Filippov · 12 years ago
  43. c26032b target-xtensa: don't emit extra tcg_gen_goto_tb by Max Filippov · 12 years ago
  44. f9cb504 target-xtensa: fix extui shift amount by Max Filippov · 12 years ago
  45. c29b1be target-xtensa: fix missing errno codes for mingw32 by Max Filippov · 12 years ago
  46. d6ce52c target-xtensa: convert host errno values to guest by Max Filippov · 12 years ago
  47. e7eee62 target-xtensa: return ENOSYS for unimplemented simcalls by Max Filippov · 12 years ago
  48. d3da41e Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu by Blue Swirl · 12 years ago
  49. e38077f target-xtensa: make default CPU depend on target endianness by Max Filippov · 12 years ago
  50. 7ff7563 target-xtensa: fix big-endian BBS/BBC implementation by Max Filippov · 12 years ago
  51. eeec69d target-xtensa: drop usage of prev_debug_excp_handler by Igor Mammedov · 13 years ago
  52. f492b82 target-xtensa: switch to AREG0-free mode by Max Filippov · 13 years ago
  53. e8de1ea target-xtensa: add attributes to helper functions by Max Filippov · 13 years ago
  54. 9ed3a18 target-xtensa: remove unnecessary include of dyngen-exec.h by Peter Portante · 13 years ago
  55. d865f30 target-xtensa: fix CCOUNT for conditional branches by Max Filippov · 13 years ago
  56. 57705a6 target-xtensa: control page table lookup explicitly by Max Filippov · 13 years ago
  57. ae4e798 target-xtensa: update autorefill TLB entries conditionally by Max Filippov · 13 years ago
  58. 16bde77 target-xtensa: extract TLB entry setting method by Max Filippov · 13 years ago
  59. 39e7d37 target-xtensa: update EXCVADDR in case of page table lookup by Max Filippov · 13 years ago
  60. e323bde target-xtensa: flush TLB page for new MMU mapping by Max Filippov · 13 years ago
  61. fbe37ef build: move other target-*/ objects to nested Makefile.objs by Paolo Bonzini · 13 years ago
  62. 9cdc8df build: move libobj-y variable to nested Makefile.objs by Paolo Bonzini · 13 years ago
  63. 5e8861a build: move obj-TARGET-y variables to nested Makefile.objs by Paolo Bonzini · 13 years ago
  64. b7e516c Kill off cpu_state_reset() by Andreas Färber · 13 years ago
  65. 15be317 target-xtensa: Let cpu_xtensa_init() return XtensaCPU by Andreas Färber · 13 years ago
  66. b18b37f target-xtensa: fix LOOPNEZ/LOOPGTZ translation by Max Filippov · 13 years ago
  67. b79b38e target-xtensa: add license to core-fsf.c by Max Filippov · 13 years ago
  68. fbaa9fb target-xtensa: add license to core-dc232b.c by Max Filippov · 13 years ago
  69. 176ac95 target-xtensa: add dc233c core by Max Filippov · 13 years ago
  70. 3d0be8a target-xtensa: fix tb invalidation for IBREAK and LOOP by Max Filippov · 13 years ago
  71. 2050396 Use uintptr_t for various op related functions by Blue Swirl · 13 years ago
  72. e554bbc target-xtensa: Start QOM'ifying CPU init by Andreas Färber · 13 years ago
  73. 5087a72 target-xtensa: QOM'ify CPU reset by Andreas Färber · 13 years ago
  74. a4633e1 target-xtensa: QOM'ify CPU by Andreas Färber · 13 years ago
  75. 16c1dea target-xtensa: Move helpers.h to helper.h by Lluís Vilanova · 13 years ago
  76. 9349b4f Rename CPUState -> CPUArchState by Andreas Färber · 13 years ago
  77. 97129ac target-xtensa: Don't overuse CPUState by Andreas Färber · 13 years ago
  78. 1bba0dc Rename cpu_reset() to cpu_state_reset() by Andreas Färber · 13 years ago
  79. 5a30d3f Merge branch 'upstream' of git://qemu.weilnetz.de/qemu by Blue Swirl · 13 years ago
  80. 2ad5201 target-xtensa: Clean includes by Stefan Weil · 13 years ago
  81. 18da932 target-xtensa: add DEBUG_SECTION to overlay tool by Max Filippov · 13 years ago
  82. f14c4b5 target-xtensa: add DBREAK data breakpoints by Max Filippov · 13 years ago
  83. 35b5c04 target-xtensa: add ICOUNT SR and debug exception by Max Filippov · 13 years ago
  84. e61dc8f target-xtensa: implement instruction breakpoints by Max Filippov · 13 years ago
  85. ab58c5b target-xtensa: add DEBUGCAUSE SR and configuration by Max Filippov · 13 years ago
  86. a044ec2 target-xtensa: fetch 3rd opcode byte only when needed by Max Filippov · 13 years ago
  87. 692f737 target-xtensa: implement info tlb monitor command by Max Filippov · 13 years ago
  88. b96ac3e target-xtensa: define TLB_TEMPLATE for MMU-less cores by Max Filippov · 13 years ago
  89. 0fdd2e1 target-xtensa: fix MMUv3 initialization by Max Filippov · 13 years ago
  90. 6b81471 target-xtensa: raise an exception for invalid and reserved opcodes by Max Filippov · 13 years ago
  91. 0c852e1 target-xtensa: handle cache options in the overlay tool by Max Filippov · 13 years ago
  92. 53a72df target-xtensa: mask out undefined bits of WINDOWSTART SR by Max Filippov · 13 years ago
  93. 935f7a2 target-xtensa: add fsf core by Max Filippov · 13 years ago
  94. 53add75 target-xtensa: add dc232b core by Max Filippov · 13 years ago
  95. ac8b7db target-xtensa: extract core configuration from overlay by Max Filippov · 13 years ago
  96. b8929a5 target-xtensa: implement external interrupt mapping by Max Filippov · 13 years ago
  97. 63f95e4 target-xtensa: remove hand-written xtensa cores implementations by Max Filippov · 13 years ago
  98. 7f65f4b target-xtensa: increase xtensa options accuracy by Max Filippov · 13 years ago
  99. 6825b6c target-xtensa: implement MAC16 option by Max Filippov · 13 years ago
  100. 890c633 target-xtensa: fix guest hang on masked CCOMPARE interrupt by Max Filippov · 13 years ago