commit | 35b5c0442798c1754f1d56452528dce5fee003c2 | [log] [tgz] |
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author | Max Filippov <jcmvbkbc@gmail.com> | Sun Jan 15 05:40:50 2012 +0400 |
committer | Max Filippov <jcmvbkbc@gmail.com> | Sat Feb 18 14:55:52 2012 +0400 |
tree | ffc45877d83c476a726558b1a0121521ea3de40a | |
parent | e61dc8f72c096e084106d5e97101d9d88f642d0e [diff] |
target-xtensa: add ICOUNT SR and debug exception ICOUNT SR gets incremented on every instruction completion provided that CINTLEVEL at the beginning of the instruction execution is lower than ICOUNTLEVEL. When ICOUNT would increment to 0 a debug exception is raised if CINTLEVEL is lower than DEBUGLEVEL. See ISA, 4.7.7.5 for more details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>