commit | b96ac3e4cccf0ed92ffad4803d8558ebb6cdbad5 | [log] [tgz] |
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author | Max Filippov <jcmvbkbc@gmail.com> | Mon Jan 09 06:42:11 2012 +0400 |
committer | Max Filippov <jcmvbkbc@gmail.com> | Sat Feb 18 01:25:27 2012 +0400 |
tree | 0a1bd18bed73aeeffae8bf90ca6a971b1eaa629c | |
parent | 99c7f87826337fa81f2f0f9baa9ca0a44faf90e9 [diff] |
target-xtensa: define TLB_TEMPLATE for MMU-less cores TLB_TEMPLATE macro specifies TLB geometry in the core configuration. Make TLB_TEMPLATE available for region protection core variants, defining 1 way ITLB and DTLB with 8 entries each. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>