commit | fe0bd475aa31e60674f7f53b85dc293108026202 | [log] [tgz] |
---|---|---|
author | Max Filippov <jcmvbkbc@gmail.com> | Wed Dec 05 07:15:22 2012 +0400 |
committer | Blue Swirl <blauwirbel@gmail.com> | Sat Dec 08 18:48:26 2012 +0000 |
tree | e67f93a3470a0738eed141ebe5633872416b31a2 | |
parent | 4e41d2f5830a76d3fe92b3d3b18cc9f2ee927770 [diff] |
target-xtensa: restrict available SRs by enabled options Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr, xsr) are associated with their corresponding SR and raise illegal opcode exception in case the register is not configured for the core. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>