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bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
Peter Maydell7b31bbc2016-01-26 18:16:56 +000019#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010020#include "qapi/error.h"
bellard54936002003-05-13 00:25:15 +000021
Veronia Bahaaf348b6d2016-03-20 19:16:19 +020022#include "qemu/cutils.h"
bellard6180a182003-09-30 21:04:53 +000023#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010024#include "exec/exec-all.h"
Juan Quintela51180422017-04-24 20:50:19 +020025#include "exec/target_page.h"
bellardb67d9a52008-05-23 09:57:34 +000026#include "tcg.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020027#include "hw/qdev-core.h"
Fam Zhengc7e002c2017-07-14 10:15:08 +080028#include "hw/qdev-properties.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010029#if !defined(CONFIG_USER_ONLY)
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +020030#include "hw/boards.h"
Paolo Bonzini33c11872016-03-15 16:58:45 +010031#include "hw/xen/xen.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010032#endif
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Markus Armbruster2ff3de62013-07-04 15:09:22 +020034#include "sysemu/sysemu.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/timer.h"
36#include "qemu/config-file.h"
Andreas Färber75a34032013-09-02 16:57:02 +020037#include "qemu/error-report.h"
pbrook53a59602006-03-25 19:31:22 +000038#if defined(CONFIG_USER_ONLY)
Markus Armbrustera9c94272016-06-22 19:11:19 +020039#include "qemu.h"
Jun Nakajima432d2682010-08-31 16:41:25 +010040#else /* !CONFIG_USER_ONLY */
Paolo Bonzini741da0d2014-06-27 08:40:04 +020041#include "hw/hw.h"
42#include "exec/memory.h"
Paolo Bonzinidf43d492016-03-16 10:24:54 +010043#include "exec/ioport.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020044#include "sysemu/dma.h"
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +110045#include "sysemu/numa.h"
Christian Borntraeger79ca7a12017-03-07 15:19:08 +010046#include "sysemu/hw_accel.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020047#include "exec/address-spaces.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010048#include "sysemu/xen-mapcache.h"
Daniel P. Berrange0ab8ed12017-01-25 16:14:15 +000049#include "trace-root.h"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +000050
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000051#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000052#include <linux/falloc.h>
53#endif
54
pbrook53a59602006-03-25 19:31:22 +000055#endif
Mike Day0dc3f442013-09-05 14:41:35 -040056#include "qemu/rcu_queue.h"
Jan Kiszka4840f102015-06-18 18:47:22 +020057#include "qemu/main-loop.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000058#include "translate-all.h"
Pavel Dovgalyuk76159362015-09-17 19:25:07 +030059#include "sysemu/replay.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000060
Paolo Bonzini022c62c2012-12-17 18:19:49 +010061#include "exec/memory-internal.h"
Juan Quintela220c3eb2013-10-14 17:13:59 +020062#include "exec/ram_addr.h"
Paolo Bonzini508127e2016-01-07 16:55:28 +030063#include "exec/log.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020064
Bharata B Rao9dfeca72016-05-12 09:18:12 +053065#include "migration/vmstate.h"
66
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020067#include "qemu/range.h"
Michael S. Tsirkin794e8f32015-09-24 14:41:17 +030068#ifndef _WIN32
69#include "qemu/mmap-alloc.h"
70#endif
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020071
Peter Xube9b23c2017-05-12 12:17:41 +080072#include "monitor/monitor.h"
73
blueswir1db7b5422007-05-26 17:36:03 +000074//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000075
pbrook99773bd2006-04-16 15:14:59 +000076#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -040077/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
78 * are protected by the ramlist lock.
79 */
Mike Day0d53d9f2015-01-21 13:45:24 +010080RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030081
82static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030083static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030084
Avi Kivityf6790af2012-10-02 20:13:51 +020085AddressSpace address_space_io;
86AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020087
Paolo Bonzini0844e002013-05-24 14:37:28 +020088MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020089static MemoryRegion io_mem_unassigned;
Avi Kivity0e0df1e2012-01-02 00:32:15 +020090
Paolo Bonzini7bd4f432014-05-14 17:43:22 +080091/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
92#define RAM_PREALLOC (1 << 0)
93
Paolo Bonzinidbcb8982014-06-10 19:15:24 +080094/* RAM is mmap-ed with MAP_SHARED */
95#define RAM_SHARED (1 << 1)
96
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +020097/* Only a portion of RAM (used_length) is actually used, and migrated.
98 * This used_length size can change across reboots.
99 */
100#define RAM_RESIZEABLE (1 << 2)
101
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +0000102/* UFFDIO_ZEROPAGE is available on this RAMBlock to atomically
103 * zero the page and wake waiting processes.
104 * (Set during postcopy)
105 */
106#define RAM_UF_ZEROPAGE (1 << 3)
Cédric Le Goaterb895de52018-05-14 08:57:00 +0200107
108/* RAM can be migrated */
109#define RAM_MIGRATABLE (1 << 4)
pbrooke2eef172008-06-08 01:09:01 +0000110#endif
bellard9fa3e852004-01-04 18:06:42 +0000111
Peter Maydell20bccb82016-10-24 16:26:49 +0100112#ifdef TARGET_PAGE_BITS_VARY
113int target_page_bits;
114bool target_page_bits_decided;
115#endif
116
Andreas Färberbdc44642013-06-24 23:50:24 +0200117struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
bellard6a00d602005-11-21 23:25:50 +0000118/* current CPU in the current thread. It is only valid inside
119 cpu_exec() */
Paolo Bonzinif240eb62015-08-26 00:17:58 +0200120__thread CPUState *current_cpu;
pbrook2e70f6e2008-06-29 01:03:05 +0000121/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +0000122 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +0000123 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +0100124int use_icount;
bellard6a00d602005-11-21 23:25:50 +0000125
Yang Zhonga0be0c52017-07-03 18:12:13 +0800126uintptr_t qemu_host_page_size;
127intptr_t qemu_host_page_mask;
Yang Zhonga0be0c52017-07-03 18:12:13 +0800128
Peter Maydell20bccb82016-10-24 16:26:49 +0100129bool set_preferred_target_page_bits(int bits)
130{
131 /* The target page size is the lowest common denominator for all
132 * the CPUs in the system, so we can only make it smaller, never
133 * larger. And we can't make it smaller once we've committed to
134 * a particular size.
135 */
136#ifdef TARGET_PAGE_BITS_VARY
137 assert(bits >= TARGET_PAGE_BITS_MIN);
138 if (target_page_bits == 0 || target_page_bits > bits) {
139 if (target_page_bits_decided) {
140 return false;
141 }
142 target_page_bits = bits;
143 }
144#endif
145 return true;
146}
147
pbrooke2eef172008-06-08 01:09:01 +0000148#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +0200149
Peter Maydell20bccb82016-10-24 16:26:49 +0100150static void finalize_target_page_bits(void)
151{
152#ifdef TARGET_PAGE_BITS_VARY
153 if (target_page_bits == 0) {
154 target_page_bits = TARGET_PAGE_BITS_MIN;
155 }
156 target_page_bits_decided = true;
157#endif
158}
159
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200160typedef struct PhysPageEntry PhysPageEntry;
161
162struct PhysPageEntry {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200163 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200164 uint32_t skip : 6;
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200165 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200166 uint32_t ptr : 26;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200167};
168
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200169#define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
170
Paolo Bonzini03f49952013-11-07 17:14:36 +0100171/* Size of the L2 (and L3, etc) page tables. */
Paolo Bonzini57271d62013-11-07 17:14:37 +0100172#define ADDR_SPACE_BITS 64
Paolo Bonzini03f49952013-11-07 17:14:36 +0100173
Michael S. Tsirkin026736c2013-11-13 20:13:03 +0200174#define P_L2_BITS 9
Paolo Bonzini03f49952013-11-07 17:14:36 +0100175#define P_L2_SIZE (1 << P_L2_BITS)
176
177#define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
178
179typedef PhysPageEntry Node[P_L2_SIZE];
Paolo Bonzini0475d942013-05-29 12:28:21 +0200180
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200181typedef struct PhysPageMap {
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100182 struct rcu_head rcu;
183
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200184 unsigned sections_nb;
185 unsigned sections_nb_alloc;
186 unsigned nodes_nb;
187 unsigned nodes_nb_alloc;
188 Node *nodes;
189 MemoryRegionSection *sections;
190} PhysPageMap;
191
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200192struct AddressSpaceDispatch {
Fam Zheng729633c2016-03-01 14:18:24 +0800193 MemoryRegionSection *mru_section;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200194 /* This is a multi-level map on the physical address space.
195 * The bottom level has pointers to MemoryRegionSections.
196 */
197 PhysPageEntry phys_map;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200198 PhysPageMap map;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200199};
200
Jan Kiszka90260c62013-05-26 21:46:51 +0200201#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
202typedef struct subpage_t {
203 MemoryRegion iomem;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000204 FlatView *fv;
Jan Kiszka90260c62013-05-26 21:46:51 +0200205 hwaddr base;
Vijaya Kumar K2615fab2016-10-24 16:26:49 +0100206 uint16_t sub_section[];
Jan Kiszka90260c62013-05-26 21:46:51 +0200207} subpage_t;
208
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200209#define PHYS_SECTION_UNASSIGNED 0
210#define PHYS_SECTION_NOTDIRTY 1
211#define PHYS_SECTION_ROM 2
212#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200213
pbrooke2eef172008-06-08 01:09:01 +0000214static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300215static void memory_map_init(void);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000216static void tcg_commit(MemoryListener *listener);
pbrooke2eef172008-06-08 01:09:01 +0000217
Avi Kivity1ec9b902012-01-02 12:47:48 +0200218static MemoryRegion io_mem_watch;
Peter Maydell32857f42015-10-01 15:29:50 +0100219
220/**
221 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
222 * @cpu: the CPU whose AddressSpace this is
223 * @as: the AddressSpace itself
224 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
225 * @tcg_as_listener: listener for tracking changes to the AddressSpace
226 */
227struct CPUAddressSpace {
228 CPUState *cpu;
229 AddressSpace *as;
230 struct AddressSpaceDispatch *memory_dispatch;
231 MemoryListener tcg_as_listener;
232};
233
Gerd Hoffmann8deaf122017-04-21 11:16:25 +0200234struct DirtyBitmapSnapshot {
235 ram_addr_t start;
236 ram_addr_t end;
237 unsigned long dirty[];
238};
239
pbrook6658ffb2007-03-16 23:58:11 +0000240#endif
bellard54936002003-05-13 00:25:15 +0000241
Paul Brook6d9a1302010-02-28 23:55:53 +0000242#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200243
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200244static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200245{
Peter Lieven101420b2016-07-15 12:03:50 +0200246 static unsigned alloc_hint = 16;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200247 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
Peter Lieven101420b2016-07-15 12:03:50 +0200248 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200249 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
250 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
Peter Lieven101420b2016-07-15 12:03:50 +0200251 alloc_hint = map->nodes_nb_alloc;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200252 }
253}
254
Paolo Bonzinidb946042015-05-21 15:12:29 +0200255static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200256{
257 unsigned i;
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200258 uint32_t ret;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200259 PhysPageEntry e;
260 PhysPageEntry *p;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200261
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200262 ret = map->nodes_nb++;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200263 p = map->nodes[ret];
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200264 assert(ret != PHYS_MAP_NODE_NIL);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200265 assert(ret != map->nodes_nb_alloc);
Paolo Bonzinidb946042015-05-21 15:12:29 +0200266
267 e.skip = leaf ? 0 : 1;
268 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100269 for (i = 0; i < P_L2_SIZE; ++i) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200270 memcpy(&p[i], &e, sizeof(e));
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200271 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200272 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200273}
274
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200275static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
276 hwaddr *index, hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200277 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200278{
279 PhysPageEntry *p;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100280 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200281
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200282 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200283 lp->ptr = phys_map_node_alloc(map, level == 0);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200284 }
Paolo Bonzinidb946042015-05-21 15:12:29 +0200285 p = map->nodes[lp->ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100286 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200287
Paolo Bonzini03f49952013-11-07 17:14:36 +0100288 while (*nb && lp < &p[P_L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200289 if ((*index & (step - 1)) == 0 && *nb >= step) {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200290 lp->skip = 0;
Avi Kivityc19e8802012-02-13 20:25:31 +0200291 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200292 *index += step;
293 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200294 } else {
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200295 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
Avi Kivity29990972012-02-13 20:21:20 +0200296 }
297 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200298 }
299}
300
Avi Kivityac1970f2012-10-03 16:22:53 +0200301static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200302 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200303 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000304{
Avi Kivity29990972012-02-13 20:21:20 +0200305 /* Wildly overreserve - it doesn't matter much. */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200306 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000307
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200308 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000309}
310
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200311/* Compact a non leaf page entry. Simply detect that the entry has a single child,
312 * and update our entry so we can skip it and go directly to the destination.
313 */
Marc-André Lureauefee6782016-09-28 16:37:20 +0400314static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200315{
316 unsigned valid_ptr = P_L2_SIZE;
317 int valid = 0;
318 PhysPageEntry *p;
319 int i;
320
321 if (lp->ptr == PHYS_MAP_NODE_NIL) {
322 return;
323 }
324
325 p = nodes[lp->ptr];
326 for (i = 0; i < P_L2_SIZE; i++) {
327 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
328 continue;
329 }
330
331 valid_ptr = i;
332 valid++;
333 if (p[i].skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400334 phys_page_compact(&p[i], nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200335 }
336 }
337
338 /* We can only compress if there's only one child. */
339 if (valid != 1) {
340 return;
341 }
342
343 assert(valid_ptr < P_L2_SIZE);
344
345 /* Don't compress if it won't fit in the # of bits we have. */
346 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
347 return;
348 }
349
350 lp->ptr = p[valid_ptr].ptr;
351 if (!p[valid_ptr].skip) {
352 /* If our only child is a leaf, make this a leaf. */
353 /* By design, we should have made this node a leaf to begin with so we
354 * should never reach here.
355 * But since it's so simple to handle this, let's do it just in case we
356 * change this rule.
357 */
358 lp->skip = 0;
359 } else {
360 lp->skip += p[valid_ptr].skip;
361 }
362}
363
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +1000364void address_space_dispatch_compact(AddressSpaceDispatch *d)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200365{
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200366 if (d->phys_map.skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400367 phys_page_compact(&d->phys_map, d->map.nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200368 }
369}
370
Fam Zheng29cb5332016-03-01 14:18:23 +0800371static inline bool section_covers_addr(const MemoryRegionSection *section,
372 hwaddr addr)
373{
374 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
375 * the section must cover the entire address space.
376 */
Richard Henderson258dfaa2016-06-29 15:48:03 -0700377 return int128_gethi(section->size) ||
Fam Zheng29cb5332016-03-01 14:18:23 +0800378 range_covers_byte(section->offset_within_address_space,
Richard Henderson258dfaa2016-06-29 15:48:03 -0700379 int128_getlo(section->size), addr);
Fam Zheng29cb5332016-03-01 14:18:23 +0800380}
381
Peter Xu003a0cf2017-05-15 16:50:57 +0800382static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
bellard92e873b2004-05-21 14:52:29 +0000383{
Peter Xu003a0cf2017-05-15 16:50:57 +0800384 PhysPageEntry lp = d->phys_map, *p;
385 Node *nodes = d->map.nodes;
386 MemoryRegionSection *sections = d->map.sections;
Michael S. Tsirkin97115a82013-11-13 20:08:19 +0200387 hwaddr index = addr >> TARGET_PAGE_BITS;
Avi Kivity31ab2b42012-02-13 16:44:19 +0200388 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200389
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200390 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200391 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200392 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200393 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200394 p = nodes[lp.ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100395 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200396 }
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200397
Fam Zheng29cb5332016-03-01 14:18:23 +0800398 if (section_covers_addr(&sections[lp.ptr], addr)) {
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200399 return &sections[lp.ptr];
400 } else {
401 return &sections[PHYS_SECTION_UNASSIGNED];
402 }
Avi Kivityf3705d52012-03-08 16:16:34 +0200403}
404
Blue Swirle5548612012-04-21 13:08:33 +0000405bool memory_region_is_unassigned(MemoryRegion *mr)
406{
Paolo Bonzini2a8e7492013-05-24 14:34:08 +0200407 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
Blue Swirle5548612012-04-21 13:08:33 +0000408 && mr != &io_mem_watch;
409}
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200410
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100411/* Called from RCU critical section */
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200412static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
Jan Kiszka90260c62013-05-26 21:46:51 +0200413 hwaddr addr,
414 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200415{
Fam Zheng729633c2016-03-01 14:18:24 +0800416 MemoryRegionSection *section = atomic_read(&d->mru_section);
Jan Kiszka90260c62013-05-26 21:46:51 +0200417 subpage_t *subpage;
418
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100419 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
420 !section_covers_addr(section, addr)) {
Peter Xu003a0cf2017-05-15 16:50:57 +0800421 section = phys_page_find(d, addr);
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100422 atomic_set(&d->mru_section, section);
Fam Zheng729633c2016-03-01 14:18:24 +0800423 }
Jan Kiszka90260c62013-05-26 21:46:51 +0200424 if (resolve_subpage && section->mr->subpage) {
425 subpage = container_of(section->mr, subpage_t, iomem);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200426 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200427 }
428 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200429}
430
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100431/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200432static MemoryRegionSection *
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200433address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
Jan Kiszka90260c62013-05-26 21:46:51 +0200434 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200435{
436 MemoryRegionSection *section;
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200437 MemoryRegion *mr;
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100438 Int128 diff;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200439
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200440 section = address_space_lookup_region(d, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200441 /* Compute offset within MemoryRegionSection */
442 addr -= section->offset_within_address_space;
443
444 /* Compute offset within MemoryRegion */
445 *xlat = addr + section->offset_within_region;
446
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200447 mr = section->mr;
Paolo Bonzinib242e0e2015-07-04 00:24:51 +0200448
449 /* MMIO registers can be expected to perform full-width accesses based only
450 * on their address, without considering adjacent registers that could
451 * decode to completely different MemoryRegions. When such registers
452 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
453 * regions overlap wildly. For this reason we cannot clamp the accesses
454 * here.
455 *
456 * If the length is small (as is the case for address_space_ldl/stl),
457 * everything works fine. If the incoming length is large, however,
458 * the caller really has to do the clamping through memory_access_size.
459 */
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200460 if (memory_region_is_ram(mr)) {
Paolo Bonzinie4a511f2015-06-17 10:36:54 +0200461 diff = int128_sub(section->size, int128_make64(addr));
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200462 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
463 }
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200464 return section;
465}
Jan Kiszka90260c62013-05-26 21:46:51 +0200466
Peter Xud5e5faf2017-10-10 11:42:45 +0200467/**
Paolo Bonzinia411c842018-03-03 17:24:04 +0100468 * address_space_translate_iommu - translate an address through an IOMMU
469 * memory region and then through the target address space.
470 *
471 * @iommu_mr: the IOMMU memory region that we start the translation from
472 * @addr: the address to be translated through the MMU
473 * @xlat: the translated address offset within the destination memory region.
474 * It cannot be %NULL.
475 * @plen_out: valid read/write length of the translated address. It
476 * cannot be %NULL.
477 * @page_mask_out: page mask for the translated address. This
478 * should only be meaningful for IOMMU translated
479 * addresses, since there may be huge pages that this bit
480 * would tell. It can be %NULL if we don't care about it.
481 * @is_write: whether the translation operation is for write
482 * @is_mmio: whether this can be MMIO, set true if it can
483 * @target_as: the address space targeted by the IOMMU
Peter Maydell2f7b0092018-05-31 14:50:53 +0100484 * @attrs: transaction attributes
Paolo Bonzinia411c842018-03-03 17:24:04 +0100485 *
486 * This function is called from RCU critical section. It is the common
487 * part of flatview_do_translate and address_space_translate_cached.
488 */
489static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
490 hwaddr *xlat,
491 hwaddr *plen_out,
492 hwaddr *page_mask_out,
493 bool is_write,
494 bool is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100495 AddressSpace **target_as,
496 MemTxAttrs attrs)
Paolo Bonzinia411c842018-03-03 17:24:04 +0100497{
498 MemoryRegionSection *section;
499 hwaddr page_mask = (hwaddr)-1;
500
501 do {
502 hwaddr addr = *xlat;
503 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
Peter Maydell2c91bcf2018-06-15 14:57:16 +0100504 int iommu_idx = 0;
505 IOMMUTLBEntry iotlb;
506
507 if (imrc->attrs_to_index) {
508 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
509 }
510
511 iotlb = imrc->translate(iommu_mr, addr, is_write ?
512 IOMMU_WO : IOMMU_RO, iommu_idx);
Paolo Bonzinia411c842018-03-03 17:24:04 +0100513
514 if (!(iotlb.perm & (1 << is_write))) {
515 goto unassigned;
516 }
517
518 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
519 | (addr & iotlb.addr_mask));
520 page_mask &= iotlb.addr_mask;
521 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
522 *target_as = iotlb.target_as;
523
524 section = address_space_translate_internal(
525 address_space_to_dispatch(iotlb.target_as), addr, xlat,
526 plen_out, is_mmio);
527
528 iommu_mr = memory_region_get_iommu(section->mr);
529 } while (unlikely(iommu_mr));
530
531 if (page_mask_out) {
532 *page_mask_out = page_mask;
533 }
534 return *section;
535
536unassigned:
537 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
538}
539
540/**
Peter Xud5e5faf2017-10-10 11:42:45 +0200541 * flatview_do_translate - translate an address in FlatView
542 *
543 * @fv: the flat view that we want to translate on
544 * @addr: the address to be translated in above address space
545 * @xlat: the translated address offset within memory region. It
546 * cannot be @NULL.
547 * @plen_out: valid read/write length of the translated address. It
548 * can be @NULL when we don't care about it.
549 * @page_mask_out: page mask for the translated address. This
550 * should only be meaningful for IOMMU translated
551 * addresses, since there may be huge pages that this bit
552 * would tell. It can be @NULL if we don't care about it.
553 * @is_write: whether the translation operation is for write
554 * @is_mmio: whether this can be MMIO, set true if it can
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200555 * @target_as: the address space targeted by the IOMMU
Peter Maydell49e14aa2018-05-31 14:50:53 +0100556 * @attrs: memory transaction attributes
Peter Xud5e5faf2017-10-10 11:42:45 +0200557 *
558 * This function is called from RCU critical section
559 */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000560static MemoryRegionSection flatview_do_translate(FlatView *fv,
561 hwaddr addr,
562 hwaddr *xlat,
Peter Xud5e5faf2017-10-10 11:42:45 +0200563 hwaddr *plen_out,
564 hwaddr *page_mask_out,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000565 bool is_write,
566 bool is_mmio,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100567 AddressSpace **target_as,
568 MemTxAttrs attrs)
Jan Kiszka90260c62013-05-26 21:46:51 +0200569{
Avi Kivity30951152012-10-30 13:47:46 +0200570 MemoryRegionSection *section;
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000571 IOMMUMemoryRegion *iommu_mr;
Peter Xud5e5faf2017-10-10 11:42:45 +0200572 hwaddr plen = (hwaddr)(-1);
573
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200574 if (!plen_out) {
575 plen_out = &plen;
Peter Xud5e5faf2017-10-10 11:42:45 +0200576 }
Avi Kivity30951152012-10-30 13:47:46 +0200577
Paolo Bonzinia411c842018-03-03 17:24:04 +0100578 section = address_space_translate_internal(
579 flatview_to_dispatch(fv), addr, xlat,
580 plen_out, is_mmio);
Avi Kivity30951152012-10-30 13:47:46 +0200581
Paolo Bonzinia411c842018-03-03 17:24:04 +0100582 iommu_mr = memory_region_get_iommu(section->mr);
583 if (unlikely(iommu_mr)) {
584 return address_space_translate_iommu(iommu_mr, xlat,
585 plen_out, page_mask_out,
586 is_write, is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100587 target_as, attrs);
Avi Kivity30951152012-10-30 13:47:46 +0200588 }
Peter Xud5e5faf2017-10-10 11:42:45 +0200589 if (page_mask_out) {
Paolo Bonzinia411c842018-03-03 17:24:04 +0100590 /* Not behind an IOMMU, use default page size. */
591 *page_mask_out = ~TARGET_PAGE_MASK;
Peter Xud5e5faf2017-10-10 11:42:45 +0200592 }
593
Peter Xua7640402017-05-17 16:57:42 +0800594 return *section;
Peter Xua7640402017-05-17 16:57:42 +0800595}
596
597/* Called from RCU critical section */
598IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
Peter Maydell7446eb02018-05-31 14:50:53 +0100599 bool is_write, MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800600{
601 MemoryRegionSection section;
Peter Xu076a93d2017-10-10 11:42:46 +0200602 hwaddr xlat, page_mask;
Peter Xua7640402017-05-17 16:57:42 +0800603
Peter Xu076a93d2017-10-10 11:42:46 +0200604 /*
605 * This can never be MMIO, and we don't really care about plen,
606 * but page mask.
607 */
608 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100609 NULL, &page_mask, is_write, false, &as,
610 attrs);
Peter Xua7640402017-05-17 16:57:42 +0800611
612 /* Illegal translation */
613 if (section.mr == &io_mem_unassigned) {
614 goto iotlb_fail;
615 }
616
617 /* Convert memory region offset into address space offset */
618 xlat += section.offset_within_address_space -
619 section.offset_within_region;
620
Peter Xua7640402017-05-17 16:57:42 +0800621 return (IOMMUTLBEntry) {
Alexey Kardashevskiye76bb182017-09-21 18:50:53 +1000622 .target_as = as,
Peter Xu076a93d2017-10-10 11:42:46 +0200623 .iova = addr & ~page_mask,
624 .translated_addr = xlat & ~page_mask,
625 .addr_mask = page_mask,
Peter Xua7640402017-05-17 16:57:42 +0800626 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
627 .perm = IOMMU_RW,
628 };
629
630iotlb_fail:
631 return (IOMMUTLBEntry) {0};
632}
633
634/* Called from RCU critical section */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000635MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +0100636 hwaddr *plen, bool is_write,
637 MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800638{
639 MemoryRegion *mr;
640 MemoryRegionSection section;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000641 AddressSpace *as = NULL;
Peter Xua7640402017-05-17 16:57:42 +0800642
643 /* This can be MMIO, so setup MMIO bit. */
Peter Xud5e5faf2017-10-10 11:42:45 +0200644 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100645 is_write, true, &as, attrs);
Peter Xua7640402017-05-17 16:57:42 +0800646 mr = section.mr;
647
Alexey Kardashevskiyfe680d02014-05-07 13:40:39 +0000648 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100649 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
Peter Crosthwaite23820db2015-03-16 22:35:54 -0700650 *plen = MIN(page, *plen);
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100651 }
652
Avi Kivity30951152012-10-30 13:47:46 +0200653 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200654}
655
Peter Maydell1f871c52018-06-15 14:57:16 +0100656typedef struct TCGIOMMUNotifier {
657 IOMMUNotifier n;
658 MemoryRegion *mr;
659 CPUState *cpu;
660 int iommu_idx;
661 bool active;
662} TCGIOMMUNotifier;
663
664static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
665{
666 TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
667
668 if (!notifier->active) {
669 return;
670 }
671 tlb_flush(notifier->cpu);
672 notifier->active = false;
673 /* We leave the notifier struct on the list to avoid reallocating it later.
674 * Generally the number of IOMMUs a CPU deals with will be small.
675 * In any case we can't unregister the iommu notifier from a notify
676 * callback.
677 */
678}
679
680static void tcg_register_iommu_notifier(CPUState *cpu,
681 IOMMUMemoryRegion *iommu_mr,
682 int iommu_idx)
683{
684 /* Make sure this CPU has an IOMMU notifier registered for this
685 * IOMMU/IOMMU index combination, so that we can flush its TLB
686 * when the IOMMU tells us the mappings we've cached have changed.
687 */
688 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
689 TCGIOMMUNotifier *notifier;
690 int i;
691
692 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
693 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
694 if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) {
695 break;
696 }
697 }
698 if (i == cpu->iommu_notifiers->len) {
699 /* Not found, add a new entry at the end of the array */
700 cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1);
701 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
702
703 notifier->mr = mr;
704 notifier->iommu_idx = iommu_idx;
705 notifier->cpu = cpu;
706 /* Rather than trying to register interest in the specific part
707 * of the iommu's address space that we've accessed and then
708 * expand it later as subsequent accesses touch more of it, we
709 * just register interest in the whole thing, on the assumption
710 * that iommu reconfiguration will be rare.
711 */
712 iommu_notifier_init(&notifier->n,
713 tcg_iommu_unmap_notify,
714 IOMMU_NOTIFIER_UNMAP,
715 0,
716 HWADDR_MAX,
717 iommu_idx);
718 memory_region_register_iommu_notifier(notifier->mr, &notifier->n);
719 }
720
721 if (!notifier->active) {
722 notifier->active = true;
723 }
724}
725
726static void tcg_iommu_free_notifier_list(CPUState *cpu)
727{
728 /* Destroy the CPU's notifier list */
729 int i;
730 TCGIOMMUNotifier *notifier;
731
732 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
733 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
734 memory_region_unregister_iommu_notifier(notifier->mr, &notifier->n);
735 }
736 g_array_free(cpu->iommu_notifiers, true);
737}
738
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100739/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200740MemoryRegionSection *
Peter Maydelld7898cd2016-01-21 14:15:05 +0000741address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
Peter Maydell1f871c52018-06-15 14:57:16 +0100742 hwaddr *xlat, hwaddr *plen,
743 MemTxAttrs attrs, int *prot)
Jan Kiszka90260c62013-05-26 21:46:51 +0200744{
Avi Kivity30951152012-10-30 13:47:46 +0200745 MemoryRegionSection *section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100746 IOMMUMemoryRegion *iommu_mr;
747 IOMMUMemoryRegionClass *imrc;
748 IOMMUTLBEntry iotlb;
749 int iommu_idx;
Alex Bennéef35e44e2016-10-21 16:34:18 +0100750 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
Peter Maydelld7898cd2016-01-21 14:15:05 +0000751
Peter Maydell1f871c52018-06-15 14:57:16 +0100752 for (;;) {
753 section = address_space_translate_internal(d, addr, &addr, plen, false);
754
755 iommu_mr = memory_region_get_iommu(section->mr);
756 if (!iommu_mr) {
757 break;
758 }
759
760 imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
761
762 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
763 tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx);
764 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
765 * doesn't short-cut its translation table walk.
766 */
767 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx);
768 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
769 | (addr & iotlb.addr_mask));
770 /* Update the caller's prot bits to remove permissions the IOMMU
771 * is giving us a failure response for. If we get down to no
772 * permissions left at all we can give up now.
773 */
774 if (!(iotlb.perm & IOMMU_RO)) {
775 *prot &= ~(PAGE_READ | PAGE_EXEC);
776 }
777 if (!(iotlb.perm & IOMMU_WO)) {
778 *prot &= ~PAGE_WRITE;
779 }
780
781 if (!*prot) {
782 goto translate_fail;
783 }
784
785 d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as));
786 }
Avi Kivity30951152012-10-30 13:47:46 +0200787
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000788 assert(!memory_region_is_iommu(section->mr));
Peter Maydell1f871c52018-06-15 14:57:16 +0100789 *xlat = addr;
Avi Kivity30951152012-10-30 13:47:46 +0200790 return section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100791
792translate_fail:
793 return &d->map.sections[PHYS_SECTION_UNASSIGNED];
Jan Kiszka90260c62013-05-26 21:46:51 +0200794}
bellard9fa3e852004-01-04 18:06:42 +0000795#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000796
Andreas Färberb170fce2013-01-20 20:23:22 +0100797#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000798
Juan Quintelae59fb372009-09-29 22:48:21 +0200799static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200800{
Andreas Färber259186a2013-01-17 18:51:17 +0100801 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200802
aurel323098dba2009-03-07 21:28:24 +0000803 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
804 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100805 cpu->interrupt_request &= ~0x01;
Alex Bennéed10eb082016-11-14 14:17:28 +0000806 tlb_flush(cpu);
pbrook9656f322008-07-01 20:01:19 +0000807
Pavel Dovgalyuk15a356c2018-01-10 16:48:46 +0300808 /* loadvm has just updated the content of RAM, bypassing the
809 * usual mechanisms that ensure we flush TBs for writes to
810 * memory we've translated code from. So we must flush all TBs,
811 * which will now be stale.
812 */
813 tb_flush(cpu);
814
pbrook9656f322008-07-01 20:01:19 +0000815 return 0;
816}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200817
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400818static int cpu_common_pre_load(void *opaque)
819{
820 CPUState *cpu = opaque;
821
Paolo Bonziniadee6422014-12-19 12:53:14 +0100822 cpu->exception_index = -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400823
824 return 0;
825}
826
827static bool cpu_common_exception_index_needed(void *opaque)
828{
829 CPUState *cpu = opaque;
830
Paolo Bonziniadee6422014-12-19 12:53:14 +0100831 return tcg_enabled() && cpu->exception_index != -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400832}
833
834static const VMStateDescription vmstate_cpu_common_exception_index = {
835 .name = "cpu_common/exception_index",
836 .version_id = 1,
837 .minimum_version_id = 1,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200838 .needed = cpu_common_exception_index_needed,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400839 .fields = (VMStateField[]) {
840 VMSTATE_INT32(exception_index, CPUState),
841 VMSTATE_END_OF_LIST()
842 }
843};
844
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300845static bool cpu_common_crash_occurred_needed(void *opaque)
846{
847 CPUState *cpu = opaque;
848
849 return cpu->crash_occurred;
850}
851
852static const VMStateDescription vmstate_cpu_common_crash_occurred = {
853 .name = "cpu_common/crash_occurred",
854 .version_id = 1,
855 .minimum_version_id = 1,
856 .needed = cpu_common_crash_occurred_needed,
857 .fields = (VMStateField[]) {
858 VMSTATE_BOOL(crash_occurred, CPUState),
859 VMSTATE_END_OF_LIST()
860 }
861};
862
Andreas Färber1a1562f2013-06-17 04:09:11 +0200863const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200864 .name = "cpu_common",
865 .version_id = 1,
866 .minimum_version_id = 1,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400867 .pre_load = cpu_common_pre_load,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200868 .post_load = cpu_common_post_load,
Juan Quintela35d08452014-04-16 16:01:33 +0200869 .fields = (VMStateField[]) {
Andreas Färber259186a2013-01-17 18:51:17 +0100870 VMSTATE_UINT32(halted, CPUState),
871 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200872 VMSTATE_END_OF_LIST()
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400873 },
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200874 .subsections = (const VMStateDescription*[]) {
875 &vmstate_cpu_common_exception_index,
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300876 &vmstate_cpu_common_crash_occurred,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200877 NULL
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200878 }
879};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200880
pbrook9656f322008-07-01 20:01:19 +0000881#endif
882
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100883CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400884{
Andreas Färberbdc44642013-06-24 23:50:24 +0200885 CPUState *cpu;
Glauber Costa950f1472009-06-09 12:15:18 -0400886
Andreas Färberbdc44642013-06-24 23:50:24 +0200887 CPU_FOREACH(cpu) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100888 if (cpu->cpu_index == index) {
Andreas Färberbdc44642013-06-24 23:50:24 +0200889 return cpu;
Andreas Färber55e5c282012-12-17 06:18:02 +0100890 }
Glauber Costa950f1472009-06-09 12:15:18 -0400891 }
892
Andreas Färberbdc44642013-06-24 23:50:24 +0200893 return NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400894}
895
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000896#if !defined(CONFIG_USER_ONLY)
Peter Xu80ceb072017-11-23 17:23:32 +0800897void cpu_address_space_init(CPUState *cpu, int asidx,
898 const char *prefix, MemoryRegion *mr)
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000899{
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000900 CPUAddressSpace *newas;
Peter Xu80ceb072017-11-23 17:23:32 +0800901 AddressSpace *as = g_new0(AddressSpace, 1);
Peter Xu87a621d2017-11-23 17:23:33 +0800902 char *as_name;
Peter Xu80ceb072017-11-23 17:23:32 +0800903
904 assert(mr);
Peter Xu87a621d2017-11-23 17:23:33 +0800905 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
906 address_space_init(as, mr, as_name);
907 g_free(as_name);
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000908
909 /* Target code should have set num_ases before calling us */
910 assert(asidx < cpu->num_ases);
911
Peter Maydell56943e82016-01-21 14:15:04 +0000912 if (asidx == 0) {
913 /* address space 0 gets the convenience alias */
914 cpu->as = as;
915 }
916
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000917 /* KVM cannot currently support multiple address spaces. */
918 assert(asidx == 0 || !kvm_enabled());
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000919
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000920 if (!cpu->cpu_ases) {
921 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000922 }
Peter Maydell32857f42015-10-01 15:29:50 +0100923
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000924 newas = &cpu->cpu_ases[asidx];
925 newas->cpu = cpu;
926 newas->as = as;
Peter Maydell56943e82016-01-21 14:15:04 +0000927 if (tcg_enabled()) {
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000928 newas->tcg_as_listener.commit = tcg_commit;
929 memory_listener_register(&newas->tcg_as_listener, as);
Peter Maydell56943e82016-01-21 14:15:04 +0000930 }
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000931}
Peter Maydell651a5bc2016-01-21 14:15:05 +0000932
933AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
934{
935 /* Return the AddressSpace corresponding to the specified index */
936 return cpu->cpu_ases[asidx].as;
937}
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000938#endif
939
Laurent Vivier7bbc1242016-10-20 13:26:04 +0200940void cpu_exec_unrealizefn(CPUState *cpu)
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530941{
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530942 CPUClass *cc = CPU_GET_CLASS(cpu);
943
Paolo Bonzini267f6852016-08-28 03:45:14 +0200944 cpu_list_remove(cpu);
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530945
946 if (cc->vmsd != NULL) {
947 vmstate_unregister(NULL, cc->vmsd, cpu);
948 }
949 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
950 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
951 }
Peter Maydell1f871c52018-06-15 14:57:16 +0100952#ifndef CONFIG_USER_ONLY
953 tcg_iommu_free_notifier_list(cpu);
954#endif
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530955}
956
Fam Zhengc7e002c2017-07-14 10:15:08 +0800957Property cpu_common_props[] = {
958#ifndef CONFIG_USER_ONLY
959 /* Create a memory property for softmmu CPU object,
960 * so users can wire up its memory. (This can't go in qom/cpu.c
961 * because that file is compiled only once for both user-mode
962 * and system builds.) The default if no link is set up is to use
963 * the system address space.
964 */
965 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
966 MemoryRegion *),
967#endif
968 DEFINE_PROP_END_OF_LIST(),
969};
970
Laurent Vivier39e329e2016-10-20 13:26:02 +0200971void cpu_exec_initfn(CPUState *cpu)
bellardfd6ce8f2003-05-14 19:00:11 +0000972{
Peter Maydell56943e82016-01-21 14:15:04 +0000973 cpu->as = NULL;
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000974 cpu->num_ases = 0;
Peter Maydell56943e82016-01-21 14:15:04 +0000975
Eduardo Habkost291135b2015-04-27 17:00:33 -0300976#ifndef CONFIG_USER_ONLY
Eduardo Habkost291135b2015-04-27 17:00:33 -0300977 cpu->thread_id = qemu_get_thread_id();
Peter Crosthwaite6731d862016-01-21 14:15:06 +0000978 cpu->memory = system_memory;
979 object_ref(OBJECT(cpu->memory));
Eduardo Habkost291135b2015-04-27 17:00:33 -0300980#endif
Laurent Vivier39e329e2016-10-20 13:26:02 +0200981}
982
Laurent Vivierce5b1bb2016-10-20 13:26:03 +0200983void cpu_exec_realizefn(CPUState *cpu, Error **errp)
Laurent Vivier39e329e2016-10-20 13:26:02 +0200984{
Richard Henderson55c3cee2017-10-15 19:02:42 -0700985 CPUClass *cc = CPU_GET_CLASS(cpu);
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000986 static bool tcg_target_initialized;
Eduardo Habkost291135b2015-04-27 17:00:33 -0300987
Paolo Bonzini267f6852016-08-28 03:45:14 +0200988 cpu_list_add(cpu);
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200989
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000990 if (tcg_enabled() && !tcg_target_initialized) {
991 tcg_target_initialized = true;
Richard Henderson55c3cee2017-10-15 19:02:42 -0700992 cc->tcg_initialize();
993 }
994
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200995#ifndef CONFIG_USER_ONLY
Andreas Färbere0d47942013-07-29 04:07:50 +0200996 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200997 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
Andreas Färbere0d47942013-07-29 04:07:50 +0200998 }
Andreas Färberb170fce2013-01-20 20:23:22 +0100999 if (cc->vmsd != NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +02001000 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
Andreas Färberb170fce2013-01-20 20:23:22 +01001001 }
Peter Maydell1f871c52018-06-15 14:57:16 +01001002
1003 cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier));
Paolo Bonzini741da0d2014-06-27 08:40:04 +02001004#endif
bellardfd6ce8f2003-05-14 19:00:11 +00001005}
1006
Igor Mammedov2278b932018-02-07 11:40:26 +01001007const char *parse_cpu_model(const char *cpu_model)
1008{
1009 ObjectClass *oc;
1010 CPUClass *cc;
1011 gchar **model_pieces;
1012 const char *cpu_type;
1013
1014 model_pieces = g_strsplit(cpu_model, ",", 2);
1015
1016 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
1017 if (oc == NULL) {
1018 error_report("unable to find CPU model '%s'", model_pieces[0]);
1019 g_strfreev(model_pieces);
1020 exit(EXIT_FAILURE);
1021 }
1022
1023 cpu_type = object_class_get_name(oc);
1024 cc = CPU_CLASS(oc);
1025 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
1026 g_strfreev(model_pieces);
1027 return cpu_type;
1028}
1029
Paolo Bonzinic40d4792018-07-02 14:45:25 +02001030#if defined(CONFIG_USER_ONLY)
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001031void tb_invalidate_phys_addr(target_ulong addr)
Paul Brook94df27f2010-02-28 23:47:45 +00001032{
Pranith Kumar406bc332017-07-12 17:51:42 -04001033 mmap_lock();
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001034 tb_invalidate_phys_page_range(addr, addr + 1, 0);
Pranith Kumar406bc332017-07-12 17:51:42 -04001035 mmap_unlock();
Paul Brook94df27f2010-02-28 23:47:45 +00001036}
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001037
1038static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1039{
1040 tb_invalidate_phys_addr(pc);
1041}
Pranith Kumar406bc332017-07-12 17:51:42 -04001042#else
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001043void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
1044{
1045 ram_addr_t ram_addr;
1046 MemoryRegion *mr;
1047 hwaddr l = 1;
1048
Paolo Bonzinic40d4792018-07-02 14:45:25 +02001049 if (!tcg_enabled()) {
1050 return;
1051 }
1052
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001053 rcu_read_lock();
1054 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
1055 if (!(memory_region_is_ram(mr)
1056 || memory_region_is_romd(mr))) {
1057 rcu_read_unlock();
1058 return;
1059 }
1060 ram_addr = memory_region_get_ram_addr(mr) + addr;
1061 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0);
1062 rcu_read_unlock();
1063}
1064
Pranith Kumar406bc332017-07-12 17:51:42 -04001065static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1066{
1067 MemTxAttrs attrs;
1068 hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
1069 int asidx = cpu_asidx_from_attrs(cpu, attrs);
1070 if (phys != -1) {
1071 /* Locks grabbed by tb_invalidate_phys_addr */
1072 tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
Peter Maydellc874dc42018-05-31 14:50:52 +01001073 phys | (pc & ~TARGET_PAGE_MASK), attrs);
Pranith Kumar406bc332017-07-12 17:51:42 -04001074 }
1075}
1076#endif
bellardd720b932004-04-25 17:57:43 +00001077
Paul Brookc527ee82010-03-01 03:31:14 +00001078#if defined(CONFIG_USER_ONLY)
Andreas Färber75a34032013-09-02 16:57:02 +02001079void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +00001080
1081{
1082}
1083
Peter Maydell3ee887e2014-09-12 14:06:48 +01001084int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
1085 int flags)
1086{
1087 return -ENOSYS;
1088}
1089
1090void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
1091{
1092}
1093
Andreas Färber75a34032013-09-02 16:57:02 +02001094int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
Paul Brookc527ee82010-03-01 03:31:14 +00001095 int flags, CPUWatchpoint **watchpoint)
1096{
1097 return -ENOSYS;
1098}
1099#else
pbrook6658ffb2007-03-16 23:58:11 +00001100/* Add a watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001101int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001102 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +00001103{
aliguoric0ce9982008-11-25 22:13:57 +00001104 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001105
Peter Maydell05068c02014-09-12 14:06:48 +01001106 /* forbid ranges which are empty or run off the end of the address space */
Max Filippov07e28632014-09-17 22:03:36 -07001107 if (len == 0 || (addr + len - 1) < addr) {
Andreas Färber75a34032013-09-02 16:57:02 +02001108 error_report("tried to set invalid watchpoint at %"
1109 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
aliguorib4051332008-11-18 20:14:20 +00001110 return -EINVAL;
1111 }
Anthony Liguori7267c092011-08-20 22:09:37 -05001112 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +00001113
aliguoria1d1bb32008-11-18 20:07:32 +00001114 wp->vaddr = addr;
Peter Maydell05068c02014-09-12 14:06:48 +01001115 wp->len = len;
aliguoria1d1bb32008-11-18 20:07:32 +00001116 wp->flags = flags;
1117
aliguori2dc9f412008-11-18 20:56:59 +00001118 /* keep all GDB-injected watchpoints in front */
Andreas Färberff4700b2013-08-26 18:23:18 +02001119 if (flags & BP_GDB) {
1120 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
1121 } else {
1122 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
1123 }
aliguoria1d1bb32008-11-18 20:07:32 +00001124
Andreas Färber31b030d2013-09-04 01:29:02 +02001125 tlb_flush_page(cpu, addr);
aliguoria1d1bb32008-11-18 20:07:32 +00001126
1127 if (watchpoint)
1128 *watchpoint = wp;
1129 return 0;
pbrook6658ffb2007-03-16 23:58:11 +00001130}
1131
aliguoria1d1bb32008-11-18 20:07:32 +00001132/* Remove a specific watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001133int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001134 int flags)
pbrook6658ffb2007-03-16 23:58:11 +00001135{
aliguoria1d1bb32008-11-18 20:07:32 +00001136 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001137
Andreas Färberff4700b2013-08-26 18:23:18 +02001138 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001139 if (addr == wp->vaddr && len == wp->len
aliguori6e140f22008-11-18 20:37:55 +00001140 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
Andreas Färber75a34032013-09-02 16:57:02 +02001141 cpu_watchpoint_remove_by_ref(cpu, wp);
pbrook6658ffb2007-03-16 23:58:11 +00001142 return 0;
1143 }
1144 }
aliguoria1d1bb32008-11-18 20:07:32 +00001145 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +00001146}
1147
aliguoria1d1bb32008-11-18 20:07:32 +00001148/* Remove a specific watchpoint by reference. */
Andreas Färber75a34032013-09-02 16:57:02 +02001149void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +00001150{
Andreas Färberff4700b2013-08-26 18:23:18 +02001151 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +00001152
Andreas Färber31b030d2013-09-04 01:29:02 +02001153 tlb_flush_page(cpu, watchpoint->vaddr);
aliguoria1d1bb32008-11-18 20:07:32 +00001154
Anthony Liguori7267c092011-08-20 22:09:37 -05001155 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +00001156}
1157
aliguoria1d1bb32008-11-18 20:07:32 +00001158/* Remove all matching watchpoints. */
Andreas Färber75a34032013-09-02 16:57:02 +02001159void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001160{
aliguoric0ce9982008-11-25 22:13:57 +00001161 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001162
Andreas Färberff4700b2013-08-26 18:23:18 +02001163 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
Andreas Färber75a34032013-09-02 16:57:02 +02001164 if (wp->flags & mask) {
1165 cpu_watchpoint_remove_by_ref(cpu, wp);
1166 }
aliguoric0ce9982008-11-25 22:13:57 +00001167 }
aliguoria1d1bb32008-11-18 20:07:32 +00001168}
Peter Maydell05068c02014-09-12 14:06:48 +01001169
1170/* Return true if this watchpoint address matches the specified
1171 * access (ie the address range covered by the watchpoint overlaps
1172 * partially or completely with the address range covered by the
1173 * access).
1174 */
1175static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
1176 vaddr addr,
1177 vaddr len)
1178{
1179 /* We know the lengths are non-zero, but a little caution is
1180 * required to avoid errors in the case where the range ends
1181 * exactly at the top of the address space and so addr + len
1182 * wraps round to zero.
1183 */
1184 vaddr wpend = wp->vaddr + wp->len - 1;
1185 vaddr addrend = addr + len - 1;
1186
1187 return !(addr > wpend || wp->vaddr > addrend);
1188}
1189
Paul Brookc527ee82010-03-01 03:31:14 +00001190#endif
aliguoria1d1bb32008-11-18 20:07:32 +00001191
1192/* Add a breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001193int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +00001194 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001195{
aliguoric0ce9982008-11-25 22:13:57 +00001196 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +00001197
Anthony Liguori7267c092011-08-20 22:09:37 -05001198 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +00001199
1200 bp->pc = pc;
1201 bp->flags = flags;
1202
aliguori2dc9f412008-11-18 20:56:59 +00001203 /* keep all GDB-injected breakpoints in front */
Andreas Färber00b941e2013-06-29 18:55:54 +02001204 if (flags & BP_GDB) {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001205 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001206 } else {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001207 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001208 }
aliguoria1d1bb32008-11-18 20:07:32 +00001209
Andreas Färberf0c3c502013-08-26 21:22:53 +02001210 breakpoint_invalidate(cpu, pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001211
Andreas Färber00b941e2013-06-29 18:55:54 +02001212 if (breakpoint) {
aliguoria1d1bb32008-11-18 20:07:32 +00001213 *breakpoint = bp;
Andreas Färber00b941e2013-06-29 18:55:54 +02001214 }
aliguoria1d1bb32008-11-18 20:07:32 +00001215 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001216}
1217
1218/* Remove a specific breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001219int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +00001220{
aliguoria1d1bb32008-11-18 20:07:32 +00001221 CPUBreakpoint *bp;
1222
Andreas Färberf0c3c502013-08-26 21:22:53 +02001223 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +00001224 if (bp->pc == pc && bp->flags == flags) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001225 cpu_breakpoint_remove_by_ref(cpu, bp);
bellard4c3a88a2003-07-26 12:06:08 +00001226 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001227 }
bellard4c3a88a2003-07-26 12:06:08 +00001228 }
aliguoria1d1bb32008-11-18 20:07:32 +00001229 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +00001230}
1231
aliguoria1d1bb32008-11-18 20:07:32 +00001232/* Remove a specific breakpoint by reference. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001233void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001234{
Andreas Färberf0c3c502013-08-26 21:22:53 +02001235 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
1236
1237 breakpoint_invalidate(cpu, breakpoint->pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001238
Anthony Liguori7267c092011-08-20 22:09:37 -05001239 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +00001240}
1241
1242/* Remove all matching breakpoints. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001243void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001244{
aliguoric0ce9982008-11-25 22:13:57 +00001245 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001246
Andreas Färberf0c3c502013-08-26 21:22:53 +02001247 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001248 if (bp->flags & mask) {
1249 cpu_breakpoint_remove_by_ref(cpu, bp);
1250 }
aliguoric0ce9982008-11-25 22:13:57 +00001251 }
bellard4c3a88a2003-07-26 12:06:08 +00001252}
1253
bellardc33a3462003-07-29 20:50:33 +00001254/* enable or disable single step mode. EXCP_DEBUG is returned by the
1255 CPU loop after each instruction */
Andreas Färber3825b282013-06-24 18:41:06 +02001256void cpu_single_step(CPUState *cpu, int enabled)
bellardc33a3462003-07-29 20:50:33 +00001257{
Andreas Färbered2803d2013-06-21 20:20:45 +02001258 if (cpu->singlestep_enabled != enabled) {
1259 cpu->singlestep_enabled = enabled;
1260 if (kvm_enabled()) {
Stefan Weil38e478e2013-07-25 20:50:21 +02001261 kvm_update_guest_debug(cpu, 0);
Andreas Färbered2803d2013-06-21 20:20:45 +02001262 } else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +01001263 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +00001264 /* XXX: only flush what is necessary */
Peter Crosthwaitebbd77c12015-06-23 19:31:15 -07001265 tb_flush(cpu);
aliguorie22a25c2009-03-12 20:12:48 +00001266 }
bellardc33a3462003-07-29 20:50:33 +00001267 }
bellardc33a3462003-07-29 20:50:33 +00001268}
1269
Andreas Färbera47dddd2013-09-03 17:38:47 +02001270void cpu_abort(CPUState *cpu, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +00001271{
1272 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +00001273 va_list ap2;
bellard75012672003-06-21 13:11:07 +00001274
1275 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +00001276 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +00001277 fprintf(stderr, "qemu: fatal: ");
1278 vfprintf(stderr, fmt, ap);
1279 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +02001280 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
Paolo Bonzini013a2942015-11-13 13:16:27 +01001281 if (qemu_log_separate()) {
Richard Henderson1ee73212016-09-22 15:17:10 -07001282 qemu_log_lock();
aliguori93fcfe32009-01-15 22:34:14 +00001283 qemu_log("qemu: fatal: ");
1284 qemu_log_vprintf(fmt, ap2);
1285 qemu_log("\n");
Andreas Färbera0762852013-06-16 07:28:50 +02001286 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +00001287 qemu_log_flush();
Richard Henderson1ee73212016-09-22 15:17:10 -07001288 qemu_log_unlock();
aliguori93fcfe32009-01-15 22:34:14 +00001289 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +00001290 }
pbrook493ae1f2007-11-23 16:53:59 +00001291 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +00001292 va_end(ap);
Pavel Dovgalyuk76159362015-09-17 19:25:07 +03001293 replay_finish();
Riku Voipiofd052bf2010-01-25 14:30:49 +02001294#if defined(CONFIG_USER_ONLY)
1295 {
1296 struct sigaction act;
1297 sigfillset(&act.sa_mask);
1298 act.sa_handler = SIG_DFL;
Peter Maydell8347c182018-05-15 19:27:00 +01001299 act.sa_flags = 0;
Riku Voipiofd052bf2010-01-25 14:30:49 +02001300 sigaction(SIGABRT, &act, NULL);
1301 }
1302#endif
bellard75012672003-06-21 13:11:07 +00001303 abort();
1304}
1305
bellard01243112004-01-04 15:48:17 +00001306#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -04001307/* Called from RCU critical section */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001308static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
1309{
1310 RAMBlock *block;
1311
Paolo Bonzini43771532013-09-09 17:58:40 +02001312 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001313 if (block && addr - block->offset < block->max_length) {
Paolo Bonzini68851b92015-10-22 13:51:30 +02001314 return block;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001315 }
Peter Xu99e15582017-05-12 12:17:39 +08001316 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001317 if (addr - block->offset < block->max_length) {
Paolo Bonzini041603f2013-09-09 17:49:45 +02001318 goto found;
1319 }
1320 }
1321
1322 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1323 abort();
1324
1325found:
Paolo Bonzini43771532013-09-09 17:58:40 +02001326 /* It is safe to write mru_block outside the iothread lock. This
1327 * is what happens:
1328 *
1329 * mru_block = xxx
1330 * rcu_read_unlock()
1331 * xxx removed from list
1332 * rcu_read_lock()
1333 * read mru_block
1334 * mru_block = NULL;
1335 * call_rcu(reclaim_ramblock, xxx);
1336 * rcu_read_unlock()
1337 *
1338 * atomic_rcu_set is not needed here. The block was already published
1339 * when it was placed into the list. Here we're just making an extra
1340 * copy of the pointer.
1341 */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001342 ram_list.mru_block = block;
1343 return block;
1344}
1345
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001346static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
bellard1ccde1c2004-02-06 19:46:14 +00001347{
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001348 CPUState *cpu;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001349 ram_addr_t start1;
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001350 RAMBlock *block;
1351 ram_addr_t end;
1352
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04001353 assert(tcg_enabled());
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001354 end = TARGET_PAGE_ALIGN(start + length);
1355 start &= TARGET_PAGE_MASK;
bellardf23db162005-08-21 19:12:28 +00001356
Mike Day0dc3f442013-09-05 14:41:35 -04001357 rcu_read_lock();
Paolo Bonzini041603f2013-09-09 17:49:45 +02001358 block = qemu_get_ram_block(start);
1359 assert(block == qemu_get_ram_block(end - 1));
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02001360 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001361 CPU_FOREACH(cpu) {
1362 tlb_reset_dirty(cpu, start1, length);
1363 }
Mike Day0dc3f442013-09-05 14:41:35 -04001364 rcu_read_unlock();
Juan Quintelad24981d2012-05-22 00:42:40 +02001365}
1366
1367/* Note: start and end must be within the same ram block. */
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001368bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1369 ram_addr_t length,
1370 unsigned client)
Juan Quintelad24981d2012-05-22 00:42:40 +02001371{
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001372 DirtyMemoryBlocks *blocks;
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001373 unsigned long end, page;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001374 bool dirty = false;
Juan Quintelad24981d2012-05-22 00:42:40 +02001375
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001376 if (length == 0) {
1377 return false;
1378 }
1379
1380 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1381 page = start >> TARGET_PAGE_BITS;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001382
1383 rcu_read_lock();
1384
1385 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1386
1387 while (page < end) {
1388 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1389 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1390 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1391
1392 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1393 offset, num);
1394 page += num;
1395 }
1396
1397 rcu_read_unlock();
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001398
1399 if (dirty && tcg_enabled()) {
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001400 tlb_reset_dirty_range_all(start, length);
Juan Quintelad24981d2012-05-22 00:42:40 +02001401 }
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001402
1403 return dirty;
bellard1ccde1c2004-02-06 19:46:14 +00001404}
1405
Gerd Hoffmann8deaf122017-04-21 11:16:25 +02001406DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
1407 (ram_addr_t start, ram_addr_t length, unsigned client)
1408{
1409 DirtyMemoryBlocks *blocks;
1410 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
1411 ram_addr_t first = QEMU_ALIGN_DOWN(start, align);
1412 ram_addr_t last = QEMU_ALIGN_UP(start + length, align);
1413 DirtyBitmapSnapshot *snap;
1414 unsigned long page, end, dest;
1415
1416 snap = g_malloc0(sizeof(*snap) +
1417 ((last - first) >> (TARGET_PAGE_BITS + 3)));
1418 snap->start = first;
1419 snap->end = last;
1420
1421 page = first >> TARGET_PAGE_BITS;
1422 end = last >> TARGET_PAGE_BITS;
1423 dest = 0;
1424
1425 rcu_read_lock();
1426
1427 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1428
1429 while (page < end) {
1430 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1431 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1432 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1433
1434 assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL)));
1435 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
1436 offset >>= BITS_PER_LEVEL;
1437
1438 bitmap_copy_and_clear_atomic(snap->dirty + dest,
1439 blocks->blocks[idx] + offset,
1440 num);
1441 page += num;
1442 dest += num >> BITS_PER_LEVEL;
1443 }
1444
1445 rcu_read_unlock();
1446
1447 if (tcg_enabled()) {
1448 tlb_reset_dirty_range_all(start, length);
1449 }
1450
1451 return snap;
1452}
1453
1454bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
1455 ram_addr_t start,
1456 ram_addr_t length)
1457{
1458 unsigned long page, end;
1459
1460 assert(start >= snap->start);
1461 assert(start + length <= snap->end);
1462
1463 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
1464 page = (start - snap->start) >> TARGET_PAGE_BITS;
1465
1466 while (page < end) {
1467 if (test_bit(page, snap->dirty)) {
1468 return true;
1469 }
1470 page++;
1471 }
1472 return false;
1473}
1474
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01001475/* Called from RCU critical section */
Andreas Färberbb0e6272013-09-03 13:32:01 +02001476hwaddr memory_region_section_get_iotlb(CPUState *cpu,
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001477 MemoryRegionSection *section,
1478 target_ulong vaddr,
1479 hwaddr paddr, hwaddr xlat,
1480 int prot,
1481 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +00001482{
Avi Kivitya8170e52012-10-23 12:30:10 +02001483 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +00001484 CPUWatchpoint *wp;
1485
Blue Swirlcc5bea62012-04-14 14:56:48 +00001486 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +00001487 /* Normal RAM. */
Paolo Bonzinie4e69792016-03-01 10:44:50 +01001488 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001489 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001490 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +00001491 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001492 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +00001493 }
1494 } else {
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001495 AddressSpaceDispatch *d;
1496
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001497 d = flatview_to_dispatch(section->fv);
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001498 iotlb = section - d->map.sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001499 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001500 }
1501
1502 /* Make accesses to pages with watchpoints go via the
1503 watchpoint trap routines. */
Andreas Färberff4700b2013-08-26 18:23:18 +02001504 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001505 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
Blue Swirle5548612012-04-21 13:08:33 +00001506 /* Avoid trapping reads of pages with a write breakpoint. */
1507 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001508 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +00001509 *address |= TLB_MMIO;
1510 break;
1511 }
1512 }
1513 }
1514
1515 return iotlb;
1516}
bellard9fa3e852004-01-04 18:06:42 +00001517#endif /* defined(CONFIG_USER_ONLY) */
1518
pbrooke2eef172008-06-08 01:09:01 +00001519#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +00001520
Anthony Liguoric227f092009-10-01 16:12:16 -05001521static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001522 uint16_t section);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001523static subpage_t *subpage_init(FlatView *fv, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +02001524
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001525static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
Igor Mammedova2b257d2014-10-31 16:38:37 +00001526 qemu_anon_ram_alloc;
Markus Armbruster91138032013-07-31 15:11:08 +02001527
1528/*
1529 * Set a custom physical guest memory alloator.
1530 * Accelerators with unusual needs may need this. Hopefully, we can
1531 * get rid of it eventually.
1532 */
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001533void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared))
Markus Armbruster91138032013-07-31 15:11:08 +02001534{
1535 phys_mem_alloc = alloc;
1536}
1537
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001538static uint16_t phys_section_add(PhysPageMap *map,
1539 MemoryRegionSection *section)
Avi Kivity5312bd82012-02-12 18:32:55 +02001540{
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001541 /* The physical section number is ORed with a page-aligned
1542 * pointer to produce the iotlb entries. Thus it should
1543 * never overflow into the page-aligned value.
1544 */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001545 assert(map->sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001546
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001547 if (map->sections_nb == map->sections_nb_alloc) {
1548 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1549 map->sections = g_renew(MemoryRegionSection, map->sections,
1550 map->sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +02001551 }
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001552 map->sections[map->sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001553 memory_region_ref(section->mr);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001554 return map->sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +02001555}
1556
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001557static void phys_section_destroy(MemoryRegion *mr)
1558{
Don Slutz55b4e802015-11-30 17:11:04 -05001559 bool have_sub_page = mr->subpage;
1560
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001561 memory_region_unref(mr);
1562
Don Slutz55b4e802015-11-30 17:11:04 -05001563 if (have_sub_page) {
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001564 subpage_t *subpage = container_of(mr, subpage_t, iomem);
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07001565 object_unref(OBJECT(&subpage->iomem));
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001566 g_free(subpage);
1567 }
1568}
1569
Paolo Bonzini60926662013-05-29 12:30:26 +02001570static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +02001571{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001572 while (map->sections_nb > 0) {
1573 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001574 phys_section_destroy(section->mr);
1575 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001576 g_free(map->sections);
1577 g_free(map->nodes);
Avi Kivity5312bd82012-02-12 18:32:55 +02001578}
1579
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001580static void register_subpage(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001581{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001582 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001583 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +02001584 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +02001585 & TARGET_PAGE_MASK;
Peter Xu003a0cf2017-05-15 16:50:57 +08001586 MemoryRegionSection *existing = phys_page_find(d, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001587 MemoryRegionSection subsection = {
1588 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001589 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +02001590 };
Avi Kivitya8170e52012-10-23 12:30:10 +02001591 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001592
Avi Kivityf3705d52012-03-08 16:16:34 +02001593 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001594
Avi Kivityf3705d52012-03-08 16:16:34 +02001595 if (!(existing->mr->subpage)) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001596 subpage = subpage_init(fv, base);
1597 subsection.fv = fv;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001598 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +02001599 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001600 phys_section_add(&d->map, &subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001601 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +02001602 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001603 }
1604 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001605 end = start + int128_get64(section->size) - 1;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001606 subpage_register(subpage, start, end,
1607 phys_section_add(&d->map, section));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001608}
1609
1610
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001611static void register_multipage(FlatView *fv,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001612 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +00001613{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001614 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivitya8170e52012-10-23 12:30:10 +02001615 hwaddr start_addr = section->offset_within_address_space;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001616 uint16_t section_index = phys_section_add(&d->map, section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001617 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1618 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +02001619
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001620 assert(num_pages);
1621 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +00001622}
1623
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10001624void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001625{
Paolo Bonzini99b9cc02013-05-27 13:18:01 +02001626 MemoryRegionSection now = *section, remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001627 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001628
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001629 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
1630 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
1631 - now.offset_within_address_space;
1632
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001633 now.size = int128_min(int128_make64(left), now.size);
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001634 register_subpage(fv, &now);
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001635 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001636 now.size = int128_zero();
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001637 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001638 while (int128_ne(remain.size, now.size)) {
1639 remain.size = int128_sub(remain.size, now.size);
1640 remain.offset_within_address_space += int128_get64(now.size);
1641 remain.offset_within_region += int128_get64(now.size);
Tyler Hall69b67642012-07-25 18:45:04 -04001642 now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001643 if (int128_lt(remain.size, page_size)) {
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001644 register_subpage(fv, &now);
Hu Tao88266242013-08-29 18:21:16 +08001645 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001646 now.size = page_size;
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001647 register_subpage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001648 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001649 now.size = int128_and(now.size, int128_neg(page_size));
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001650 register_multipage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001651 }
Avi Kivity0f0cb162012-02-13 17:14:32 +02001652 }
1653}
1654
Sheng Yang62a27442010-01-26 19:21:16 +08001655void qemu_flush_coalesced_mmio_buffer(void)
1656{
1657 if (kvm_enabled())
1658 kvm_flush_coalesced_mmio_buffer();
1659}
1660
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001661void qemu_mutex_lock_ramlist(void)
1662{
1663 qemu_mutex_lock(&ram_list.mutex);
1664}
1665
1666void qemu_mutex_unlock_ramlist(void)
1667{
1668 qemu_mutex_unlock(&ram_list.mutex);
1669}
1670
Peter Xube9b23c2017-05-12 12:17:41 +08001671void ram_block_dump(Monitor *mon)
1672{
1673 RAMBlock *block;
1674 char *psize;
1675
1676 rcu_read_lock();
1677 monitor_printf(mon, "%24s %8s %18s %18s %18s\n",
1678 "Block Name", "PSize", "Offset", "Used", "Total");
1679 RAMBLOCK_FOREACH(block) {
1680 psize = size_to_str(block->page_size);
1681 monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1682 " 0x%016" PRIx64 "\n", block->idstr, psize,
1683 (uint64_t)block->offset,
1684 (uint64_t)block->used_length,
1685 (uint64_t)block->max_length);
1686 g_free(psize);
1687 }
1688 rcu_read_unlock();
1689}
1690
Markus Armbrustere1e84ba2013-07-31 15:11:10 +02001691#ifdef __linux__
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001692/*
1693 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1694 * may or may not name the same files / on the same filesystem now as
1695 * when we actually open and map them. Iterate over the file
1696 * descriptors instead, and use qemu_fd_getpagesize().
1697 */
1698static int find_max_supported_pagesize(Object *obj, void *opaque)
1699{
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001700 long *hpsize_min = opaque;
1701
1702 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
David Gibson2b108082018-04-03 15:05:45 +10001703 long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj));
1704
David Gibson0de6e2a2018-04-03 14:55:11 +10001705 if (hpsize < *hpsize_min) {
1706 *hpsize_min = hpsize;
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001707 }
1708 }
1709
1710 return 0;
1711}
1712
1713long qemu_getrampagesize(void)
1714{
1715 long hpsize = LONG_MAX;
1716 long mainrampagesize;
1717 Object *memdev_root;
1718
David Gibson0de6e2a2018-04-03 14:55:11 +10001719 mainrampagesize = qemu_mempath_getpagesize(mem_path);
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001720
1721 /* it's possible we have memory-backend objects with
1722 * hugepage-backed RAM. these may get mapped into system
1723 * address space via -numa parameters or memory hotplug
1724 * hooks. we want to take these into account, but we
1725 * also want to make sure these supported hugepage
1726 * sizes are applicable across the entire range of memory
1727 * we may boot from, so we take the min across all
1728 * backends, and assume normal pages in cases where a
1729 * backend isn't backed by hugepages.
1730 */
1731 memdev_root = object_resolve_path("/objects", NULL);
1732 if (memdev_root) {
1733 object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize);
1734 }
1735 if (hpsize == LONG_MAX) {
1736 /* No additional memory regions found ==> Report main RAM page size */
1737 return mainrampagesize;
1738 }
1739
1740 /* If NUMA is disabled or the NUMA nodes are not backed with a
1741 * memory-backend, then there is at least one node using "normal" RAM,
1742 * so if its page size is smaller we have got to report that size instead.
1743 */
1744 if (hpsize > mainrampagesize &&
1745 (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) {
1746 static bool warned;
1747 if (!warned) {
1748 error_report("Huge page support disabled (n/a for main memory).");
1749 warned = true;
1750 }
1751 return mainrampagesize;
1752 }
1753
1754 return hpsize;
1755}
1756#else
1757long qemu_getrampagesize(void)
1758{
1759 return getpagesize();
1760}
1761#endif
1762
1763#ifdef __linux__
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001764static int64_t get_file_size(int fd)
1765{
1766 int64_t size = lseek(fd, 0, SEEK_END);
1767 if (size < 0) {
1768 return -errno;
1769 }
1770 return size;
1771}
1772
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001773static int file_ram_open(const char *path,
1774 const char *region_name,
1775 bool *created,
1776 Error **errp)
Marcelo Tosattic9027602010-03-01 20:25:08 -03001777{
1778 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -05001779 char *sanitized_name;
1780 char *c;
Paolo Bonzini5c3ece72016-03-17 15:53:13 +01001781 int fd = -1;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001782
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001783 *created = false;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001784 for (;;) {
1785 fd = open(path, O_RDWR);
1786 if (fd >= 0) {
1787 /* @path names an existing file, use it */
1788 break;
1789 }
1790 if (errno == ENOENT) {
1791 /* @path names a file that doesn't exist, create it */
1792 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1793 if (fd >= 0) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001794 *created = true;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001795 break;
1796 }
1797 } else if (errno == EISDIR) {
1798 /* @path names a directory, create a file there */
1799 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001800 sanitized_name = g_strdup(region_name);
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001801 for (c = sanitized_name; *c != '\0'; c++) {
1802 if (*c == '/') {
1803 *c = '_';
1804 }
1805 }
1806
1807 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1808 sanitized_name);
1809 g_free(sanitized_name);
1810
1811 fd = mkstemp(filename);
1812 if (fd >= 0) {
1813 unlink(filename);
1814 g_free(filename);
1815 break;
1816 }
1817 g_free(filename);
1818 }
1819 if (errno != EEXIST && errno != EINTR) {
1820 error_setg_errno(errp, errno,
1821 "can't open backing store %s for guest RAM",
1822 path);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001823 return -1;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001824 }
1825 /*
1826 * Try again on EINTR and EEXIST. The latter happens when
1827 * something else creates the file between our two open().
1828 */
1829 }
1830
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001831 return fd;
1832}
1833
1834static void *file_ram_alloc(RAMBlock *block,
1835 ram_addr_t memory,
1836 int fd,
1837 bool truncate,
1838 Error **errp)
1839{
1840 void *area;
1841
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001842 block->page_size = qemu_fd_getpagesize(fd);
Haozhong Zhang98376842017-12-11 15:28:04 +08001843 if (block->mr->align % block->page_size) {
1844 error_setg(errp, "alignment 0x%" PRIx64
1845 " must be multiples of page size 0x%zx",
1846 block->mr->align, block->page_size);
1847 return NULL;
David Hildenbrand61362b72018-06-07 17:47:05 +02001848 } else if (block->mr->align && !is_power_of_2(block->mr->align)) {
1849 error_setg(errp, "alignment 0x%" PRIx64
1850 " must be a power of two", block->mr->align);
1851 return NULL;
Haozhong Zhang98376842017-12-11 15:28:04 +08001852 }
1853 block->mr->align = MAX(block->page_size, block->mr->align);
Haozhong Zhang83606682016-10-24 20:49:37 +08001854#if defined(__s390x__)
1855 if (kvm_enabled()) {
1856 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1857 }
1858#endif
Marcelo Tosattic9027602010-03-01 20:25:08 -03001859
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001860 if (memory < block->page_size) {
Hu Tao557529d2014-09-09 13:28:00 +08001861 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001862 "or larger than page size 0x%zx",
1863 memory, block->page_size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001864 return NULL;
Haozhong Zhang1775f112016-11-02 09:05:51 +08001865 }
1866
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001867 memory = ROUND_UP(memory, block->page_size);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001868
1869 /*
1870 * ftruncate is not supported by hugetlbfs in older
1871 * hosts, so don't bother bailing out on errors.
1872 * If anything goes wrong with it under other filesystems,
1873 * mmap will fail.
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001874 *
1875 * Do not truncate the non-empty backend file to avoid corrupting
1876 * the existing data in the file. Disabling shrinking is not
1877 * enough. For example, the current vNVDIMM implementation stores
1878 * the guest NVDIMM labels at the end of the backend file. If the
1879 * backend file is later extended, QEMU will not be able to find
1880 * those labels. Therefore, extending the non-empty backend file
1881 * is disabled as well.
Marcelo Tosattic9027602010-03-01 20:25:08 -03001882 */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001883 if (truncate && ftruncate(fd, memory)) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +09001884 perror("ftruncate");
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001885 }
Marcelo Tosattic9027602010-03-01 20:25:08 -03001886
Dominik Dingeld2f39ad2016-04-25 13:55:38 +02001887 area = qemu_ram_mmap(fd, memory, block->mr->align,
1888 block->flags & RAM_SHARED);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001889 if (area == MAP_FAILED) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001890 error_setg_errno(errp, errno,
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001891 "unable to map backing store for guest RAM");
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001892 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001893 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001894
1895 if (mem_prealloc) {
Jitendra Kolhe1e356fc2017-02-24 09:01:43 +05301896 os_mem_prealloc(fd, area, memory, smp_cpus, errp);
Igor Mammedov056b68a2016-07-20 11:54:03 +02001897 if (errp && *errp) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001898 qemu_ram_munmap(area, memory);
1899 return NULL;
Igor Mammedov056b68a2016-07-20 11:54:03 +02001900 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001901 }
1902
Alex Williamson04b16652010-07-02 11:13:17 -06001903 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001904 return area;
1905}
1906#endif
1907
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001908/* Allocate space within the ram_addr_t space that governs the
1909 * dirty bitmaps.
1910 * Called with the ramlist lock held.
1911 */
Alex Williamsond17b5282010-06-25 11:08:38 -06001912static ram_addr_t find_ram_offset(ram_addr_t size)
1913{
Alex Williamson04b16652010-07-02 11:13:17 -06001914 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -06001915 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001916
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +01001917 assert(size != 0); /* it would hand out same offset multiple times */
1918
Mike Day0dc3f442013-09-05 14:41:35 -04001919 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
Alex Williamson04b16652010-07-02 11:13:17 -06001920 return 0;
Mike Day0d53d9f2015-01-21 13:45:24 +01001921 }
Alex Williamson04b16652010-07-02 11:13:17 -06001922
Peter Xu99e15582017-05-12 12:17:39 +08001923 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001924 ram_addr_t candidate, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001925
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001926 /* Align blocks to start on a 'long' in the bitmap
1927 * which makes the bitmap sync'ing take the fast path.
1928 */
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001929 candidate = block->offset + block->max_length;
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001930 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
Alex Williamson04b16652010-07-02 11:13:17 -06001931
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001932 /* Search for the closest following block
1933 * and find the gap.
1934 */
Peter Xu99e15582017-05-12 12:17:39 +08001935 RAMBLOCK_FOREACH(next_block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001936 if (next_block->offset >= candidate) {
Alex Williamson04b16652010-07-02 11:13:17 -06001937 next = MIN(next, next_block->offset);
1938 }
1939 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001940
1941 /* If it fits remember our place and remember the size
1942 * of gap, but keep going so that we might find a smaller
1943 * gap to fill so avoiding fragmentation.
1944 */
1945 if (next - candidate >= size && next - candidate < mingap) {
1946 offset = candidate;
1947 mingap = next - candidate;
Alex Williamson04b16652010-07-02 11:13:17 -06001948 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001949
1950 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
Alex Williamson04b16652010-07-02 11:13:17 -06001951 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001952
1953 if (offset == RAM_ADDR_MAX) {
1954 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1955 (uint64_t)size);
1956 abort();
1957 }
1958
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001959 trace_find_ram_offset(size, offset);
1960
Alex Williamson04b16652010-07-02 11:13:17 -06001961 return offset;
1962}
1963
David Hildenbrandc1361802018-06-20 22:27:36 +02001964static unsigned long last_ram_page(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001965{
Alex Williamsond17b5282010-06-25 11:08:38 -06001966 RAMBlock *block;
1967 ram_addr_t last = 0;
1968
Mike Day0dc3f442013-09-05 14:41:35 -04001969 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08001970 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001971 last = MAX(last, block->offset + block->max_length);
Mike Day0d53d9f2015-01-21 13:45:24 +01001972 }
Mike Day0dc3f442013-09-05 14:41:35 -04001973 rcu_read_unlock();
Juan Quintelab8c48992017-03-21 17:44:30 +01001974 return last >> TARGET_PAGE_BITS;
Alex Williamsond17b5282010-06-25 11:08:38 -06001975}
1976
Jason Baronddb97f12012-08-02 15:44:16 -04001977static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1978{
1979 int ret;
Jason Baronddb97f12012-08-02 15:44:16 -04001980
1981 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +02001982 if (!machine_dump_guest_core(current_machine)) {
Jason Baronddb97f12012-08-02 15:44:16 -04001983 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1984 if (ret) {
1985 perror("qemu_madvise");
1986 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1987 "but dump_guest_core=off specified\n");
1988 }
1989 }
1990}
1991
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00001992const char *qemu_ram_get_idstr(RAMBlock *rb)
1993{
1994 return rb->idstr;
1995}
1996
Dr. David Alan Gilbert463a4ac2017-03-07 18:36:36 +00001997bool qemu_ram_is_shared(RAMBlock *rb)
1998{
1999 return rb->flags & RAM_SHARED;
2000}
2001
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +00002002/* Note: Only set at the start of postcopy */
2003bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
2004{
2005 return rb->flags & RAM_UF_ZEROPAGE;
2006}
2007
2008void qemu_ram_set_uf_zeroable(RAMBlock *rb)
2009{
2010 rb->flags |= RAM_UF_ZEROPAGE;
2011}
2012
Cédric Le Goaterb895de52018-05-14 08:57:00 +02002013bool qemu_ram_is_migratable(RAMBlock *rb)
2014{
2015 return rb->flags & RAM_MIGRATABLE;
2016}
2017
2018void qemu_ram_set_migratable(RAMBlock *rb)
2019{
2020 rb->flags |= RAM_MIGRATABLE;
2021}
2022
2023void qemu_ram_unset_migratable(RAMBlock *rb)
2024{
2025 rb->flags &= ~RAM_MIGRATABLE;
2026}
2027
Mike Dayae3a7042013-09-05 14:41:35 -04002028/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08002029void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
Hu Tao20cfe882014-04-02 15:13:26 +08002030{
Gongleifa53a0e2016-05-10 10:04:59 +08002031 RAMBlock *block;
Hu Tao20cfe882014-04-02 15:13:26 +08002032
Avi Kivityc5705a72011-12-20 15:59:12 +02002033 assert(new_block);
2034 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002035
Anthony Liguori09e5ab62012-02-03 12:28:43 -06002036 if (dev) {
2037 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002038 if (id) {
2039 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05002040 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002041 }
2042 }
2043 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
2044
Gongleiab0a9952016-05-10 10:05:00 +08002045 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08002046 RAMBLOCK_FOREACH(block) {
Gongleifa53a0e2016-05-10 10:04:59 +08002047 if (block != new_block &&
2048 !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06002049 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
2050 new_block->idstr);
2051 abort();
2052 }
2053 }
Mike Day0dc3f442013-09-05 14:41:35 -04002054 rcu_read_unlock();
Avi Kivityc5705a72011-12-20 15:59:12 +02002055}
2056
Mike Dayae3a7042013-09-05 14:41:35 -04002057/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08002058void qemu_ram_unset_idstr(RAMBlock *block)
Hu Tao20cfe882014-04-02 15:13:26 +08002059{
Mike Dayae3a7042013-09-05 14:41:35 -04002060 /* FIXME: arch_init.c assumes that this is not called throughout
2061 * migration. Ignore the problem since hot-unplug during migration
2062 * does not work anyway.
2063 */
Hu Tao20cfe882014-04-02 15:13:26 +08002064 if (block) {
2065 memset(block->idstr, 0, sizeof(block->idstr));
2066 }
2067}
2068
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002069size_t qemu_ram_pagesize(RAMBlock *rb)
2070{
2071 return rb->page_size;
2072}
2073
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002074/* Returns the largest size of page in use */
2075size_t qemu_ram_pagesize_largest(void)
2076{
2077 RAMBlock *block;
2078 size_t largest = 0;
2079
Peter Xu99e15582017-05-12 12:17:39 +08002080 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002081 largest = MAX(largest, qemu_ram_pagesize(block));
2082 }
2083
2084 return largest;
2085}
2086
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002087static int memory_try_enable_merging(void *addr, size_t len)
2088{
Marcel Apfelbaum75cc7f02015-02-04 17:43:55 +02002089 if (!machine_mem_merge(current_machine)) {
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002090 /* disabled by the user */
2091 return 0;
2092 }
2093
2094 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
2095}
2096
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002097/* Only legal before guest might have detected the memory size: e.g. on
2098 * incoming migration, or right after reset.
2099 *
2100 * As memory core doesn't know how is memory accessed, it is up to
2101 * resize callback to update device state and/or add assertions to detect
2102 * misuse, if necessary.
2103 */
Gongleifa53a0e2016-05-10 10:04:59 +08002104int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002105{
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002106 assert(block);
2107
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002108 newsize = HOST_PAGE_ALIGN(newsize);
Michael S. Tsirkin129ddaf2015-02-17 10:15:30 +01002109
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002110 if (block->used_length == newsize) {
2111 return 0;
2112 }
2113
2114 if (!(block->flags & RAM_RESIZEABLE)) {
2115 error_setg_errno(errp, EINVAL,
2116 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2117 " in != 0x" RAM_ADDR_FMT, block->idstr,
2118 newsize, block->used_length);
2119 return -EINVAL;
2120 }
2121
2122 if (block->max_length < newsize) {
2123 error_setg_errno(errp, EINVAL,
2124 "Length too large: %s: 0x" RAM_ADDR_FMT
2125 " > 0x" RAM_ADDR_FMT, block->idstr,
2126 newsize, block->max_length);
2127 return -EINVAL;
2128 }
2129
2130 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
2131 block->used_length = newsize;
Paolo Bonzini58d27072015-03-23 11:56:01 +01002132 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
2133 DIRTY_CLIENTS_ALL);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002134 memory_region_set_size(block->mr, newsize);
2135 if (block->resized) {
2136 block->resized(block->idstr, newsize, block->host);
2137 }
2138 return 0;
2139}
2140
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002141/* Called with ram_list.mutex held */
2142static void dirty_memory_extend(ram_addr_t old_ram_size,
2143 ram_addr_t new_ram_size)
2144{
2145 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
2146 DIRTY_MEMORY_BLOCK_SIZE);
2147 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
2148 DIRTY_MEMORY_BLOCK_SIZE);
2149 int i;
2150
2151 /* Only need to extend if block count increased */
2152 if (new_num_blocks <= old_num_blocks) {
2153 return;
2154 }
2155
2156 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
2157 DirtyMemoryBlocks *old_blocks;
2158 DirtyMemoryBlocks *new_blocks;
2159 int j;
2160
2161 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
2162 new_blocks = g_malloc(sizeof(*new_blocks) +
2163 sizeof(new_blocks->blocks[0]) * new_num_blocks);
2164
2165 if (old_num_blocks) {
2166 memcpy(new_blocks->blocks, old_blocks->blocks,
2167 old_num_blocks * sizeof(old_blocks->blocks[0]));
2168 }
2169
2170 for (j = old_num_blocks; j < new_num_blocks; j++) {
2171 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
2172 }
2173
2174 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
2175
2176 if (old_blocks) {
2177 g_free_rcu(old_blocks, rcu);
2178 }
2179 }
2180}
2181
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002182static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared)
Avi Kivityc5705a72011-12-20 15:59:12 +02002183{
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002184 RAMBlock *block;
Mike Day0d53d9f2015-01-21 13:45:24 +01002185 RAMBlock *last_block = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002186 ram_addr_t old_ram_size, new_ram_size;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002187 Error *err = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002188
Juan Quintelab8c48992017-03-21 17:44:30 +01002189 old_ram_size = last_ram_page();
Avi Kivityc5705a72011-12-20 15:59:12 +02002190
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002191 qemu_mutex_lock_ramlist();
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002192 new_block->offset = find_ram_offset(new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002193
2194 if (!new_block->host) {
2195 if (xen_enabled()) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002196 xen_ram_alloc(new_block->offset, new_block->max_length,
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002197 new_block->mr, &err);
2198 if (err) {
2199 error_propagate(errp, err);
2200 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002201 return;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002202 }
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002203 } else {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002204 new_block->host = phys_mem_alloc(new_block->max_length,
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002205 &new_block->mr->align, shared);
Markus Armbruster39228252013-07-31 15:11:11 +02002206 if (!new_block->host) {
Hu Taoef701d72014-09-09 13:27:54 +08002207 error_setg_errno(errp, errno,
2208 "cannot set up guest memory '%s'",
2209 memory_region_name(new_block->mr));
2210 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002211 return;
Markus Armbruster39228252013-07-31 15:11:11 +02002212 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002213 memory_try_enable_merging(new_block->host, new_block->max_length);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09002214 }
2215 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002216
Li Zhijiandd631692015-07-02 20:18:06 +08002217 new_ram_size = MAX(old_ram_size,
2218 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
2219 if (new_ram_size > old_ram_size) {
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002220 dirty_memory_extend(old_ram_size, new_ram_size);
Li Zhijiandd631692015-07-02 20:18:06 +08002221 }
Mike Day0d53d9f2015-01-21 13:45:24 +01002222 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2223 * QLIST (which has an RCU-friendly variant) does not have insertion at
2224 * tail, so save the last element in last_block.
2225 */
Peter Xu99e15582017-05-12 12:17:39 +08002226 RAMBLOCK_FOREACH(block) {
Mike Day0d53d9f2015-01-21 13:45:24 +01002227 last_block = block;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002228 if (block->max_length < new_block->max_length) {
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002229 break;
2230 }
2231 }
2232 if (block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002233 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002234 } else if (last_block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002235 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002236 } else { /* list is empty */
Mike Day0dc3f442013-09-05 14:41:35 -04002237 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002238 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002239 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06002240
Mike Day0dc3f442013-09-05 14:41:35 -04002241 /* Write list before version */
2242 smp_wmb();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002243 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002244 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002245
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002246 cpu_physical_memory_set_dirty_range(new_block->offset,
Paolo Bonzini58d27072015-03-23 11:56:01 +01002247 new_block->used_length,
2248 DIRTY_CLIENTS_ALL);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002249
Paolo Bonzinia904c912015-01-21 16:18:35 +01002250 if (new_block->host) {
2251 qemu_ram_setup_dump(new_block->host, new_block->max_length);
2252 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
Cao jinc2cd6272016-09-12 14:34:56 +08002253 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
Paolo Bonzinia904c912015-01-21 16:18:35 +01002254 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
Paolo Bonzini0987d732016-12-21 00:31:36 +08002255 ram_block_notify_add(new_block->host, new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002256 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002257}
2258
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002259#ifdef __linux__
Marc-André Lureau38b33622017-06-02 18:12:23 +04002260RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
2261 bool share, int fd,
2262 Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002263{
2264 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002265 Error *local_err = NULL;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002266 int64_t file_size;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002267
2268 if (xen_enabled()) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002269 error_setg(errp, "-mem-path not supported with Xen");
Fam Zheng528f46a2016-03-01 14:18:18 +08002270 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002271 }
2272
Marc-André Lureaue45e7ae2017-06-02 18:12:21 +04002273 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2274 error_setg(errp,
2275 "host lacks kvm mmu notifiers, -mem-path unsupported");
2276 return NULL;
2277 }
2278
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002279 if (phys_mem_alloc != qemu_anon_ram_alloc) {
2280 /*
2281 * file_ram_alloc() needs to allocate just like
2282 * phys_mem_alloc, but we haven't bothered to provide
2283 * a hook there.
2284 */
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002285 error_setg(errp,
2286 "-mem-path not supported with this accelerator");
Fam Zheng528f46a2016-03-01 14:18:18 +08002287 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002288 }
2289
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002290 size = HOST_PAGE_ALIGN(size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002291 file_size = get_file_size(fd);
2292 if (file_size > 0 && file_size < size) {
2293 error_setg(errp, "backing store %s size 0x%" PRIx64
2294 " does not match 'size' option 0x" RAM_ADDR_FMT,
2295 mem_path, file_size, size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002296 return NULL;
2297 }
2298
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002299 new_block = g_malloc0(sizeof(*new_block));
2300 new_block->mr = mr;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002301 new_block->used_length = size;
2302 new_block->max_length = size;
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002303 new_block->flags = share ? RAM_SHARED : 0;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002304 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp);
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002305 if (!new_block->host) {
2306 g_free(new_block);
Fam Zheng528f46a2016-03-01 14:18:18 +08002307 return NULL;
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002308 }
2309
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002310 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002311 if (local_err) {
2312 g_free(new_block);
2313 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002314 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002315 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002316 return new_block;
Marc-André Lureau38b33622017-06-02 18:12:23 +04002317
2318}
2319
2320
2321RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
2322 bool share, const char *mem_path,
2323 Error **errp)
2324{
2325 int fd;
2326 bool created;
2327 RAMBlock *block;
2328
2329 fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp);
2330 if (fd < 0) {
2331 return NULL;
2332 }
2333
2334 block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
2335 if (!block) {
2336 if (created) {
2337 unlink(mem_path);
2338 }
2339 close(fd);
2340 return NULL;
2341 }
2342
2343 return block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002344}
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002345#endif
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002346
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002347static
Fam Zheng528f46a2016-03-01 14:18:18 +08002348RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2349 void (*resized)(const char*,
2350 uint64_t length,
2351 void *host),
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002352 void *host, bool resizeable, bool share,
Fam Zheng528f46a2016-03-01 14:18:18 +08002353 MemoryRegion *mr, Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002354{
2355 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002356 Error *local_err = NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002357
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002358 size = HOST_PAGE_ALIGN(size);
2359 max_size = HOST_PAGE_ALIGN(max_size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002360 new_block = g_malloc0(sizeof(*new_block));
2361 new_block->mr = mr;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002362 new_block->resized = resized;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002363 new_block->used_length = size;
2364 new_block->max_length = max_size;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002365 assert(max_size >= size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002366 new_block->fd = -1;
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002367 new_block->page_size = getpagesize();
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002368 new_block->host = host;
2369 if (host) {
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002370 new_block->flags |= RAM_PREALLOC;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002371 }
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002372 if (resizeable) {
2373 new_block->flags |= RAM_RESIZEABLE;
2374 }
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002375 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002376 if (local_err) {
2377 g_free(new_block);
2378 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002379 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002380 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002381 return new_block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002382}
2383
Fam Zheng528f46a2016-03-01 14:18:18 +08002384RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002385 MemoryRegion *mr, Error **errp)
2386{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002387 return qemu_ram_alloc_internal(size, size, NULL, host, false,
2388 false, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002389}
2390
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002391RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share,
2392 MemoryRegion *mr, Error **errp)
pbrook94a6b542009-04-11 17:15:54 +00002393{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002394 return qemu_ram_alloc_internal(size, size, NULL, NULL, false,
2395 share, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002396}
2397
Fam Zheng528f46a2016-03-01 14:18:18 +08002398RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002399 void (*resized)(const char*,
2400 uint64_t length,
2401 void *host),
2402 MemoryRegion *mr, Error **errp)
2403{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002404 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true,
2405 false, mr, errp);
pbrook94a6b542009-04-11 17:15:54 +00002406}
bellarde9a1ab12007-02-08 23:08:38 +00002407
Paolo Bonzini43771532013-09-09 17:58:40 +02002408static void reclaim_ramblock(RAMBlock *block)
2409{
2410 if (block->flags & RAM_PREALLOC) {
2411 ;
2412 } else if (xen_enabled()) {
2413 xen_invalidate_map_cache_entry(block->host);
2414#ifndef _WIN32
2415 } else if (block->fd >= 0) {
Eduardo Habkost2f3a2bb2015-11-06 20:11:21 -02002416 qemu_ram_munmap(block->host, block->max_length);
Paolo Bonzini43771532013-09-09 17:58:40 +02002417 close(block->fd);
2418#endif
2419 } else {
2420 qemu_anon_ram_free(block->host, block->max_length);
2421 }
2422 g_free(block);
2423}
2424
Fam Zhengf1060c52016-03-01 14:18:22 +08002425void qemu_ram_free(RAMBlock *block)
bellarde9a1ab12007-02-08 23:08:38 +00002426{
Marc-André Lureau85bc2a12016-03-29 13:20:51 +02002427 if (!block) {
2428 return;
2429 }
2430
Paolo Bonzini0987d732016-12-21 00:31:36 +08002431 if (block->host) {
2432 ram_block_notify_remove(block->host, block->max_length);
2433 }
2434
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002435 qemu_mutex_lock_ramlist();
Fam Zhengf1060c52016-03-01 14:18:22 +08002436 QLIST_REMOVE_RCU(block, next);
2437 ram_list.mru_block = NULL;
2438 /* Write list before version */
2439 smp_wmb();
2440 ram_list.version++;
2441 call_rcu(block, reclaim_ramblock, rcu);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002442 qemu_mutex_unlock_ramlist();
bellarde9a1ab12007-02-08 23:08:38 +00002443}
2444
Huang Yingcd19cfa2011-03-02 08:56:19 +01002445#ifndef _WIN32
2446void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2447{
2448 RAMBlock *block;
2449 ram_addr_t offset;
2450 int flags;
2451 void *area, *vaddr;
2452
Peter Xu99e15582017-05-12 12:17:39 +08002453 RAMBLOCK_FOREACH(block) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002454 offset = addr - block->offset;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002455 if (offset < block->max_length) {
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02002456 vaddr = ramblock_ptr(block, offset);
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002457 if (block->flags & RAM_PREALLOC) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002458 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02002459 } else if (xen_enabled()) {
2460 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01002461 } else {
2462 flags = MAP_FIXED;
Markus Armbruster3435f392013-07-31 15:11:07 +02002463 if (block->fd >= 0) {
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002464 flags |= (block->flags & RAM_SHARED ?
2465 MAP_SHARED : MAP_PRIVATE);
Markus Armbruster3435f392013-07-31 15:11:07 +02002466 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2467 flags, block->fd, offset);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002468 } else {
Markus Armbruster2eb9fba2013-07-31 15:11:09 +02002469 /*
2470 * Remap needs to match alloc. Accelerators that
2471 * set phys_mem_alloc never remap. If they did,
2472 * we'd need a remap hook here.
2473 */
2474 assert(phys_mem_alloc == qemu_anon_ram_alloc);
2475
Huang Yingcd19cfa2011-03-02 08:56:19 +01002476 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
2477 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2478 flags, -1, 0);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002479 }
2480 if (area != vaddr) {
Alistair Francis493d89b2018-02-03 09:43:14 +01002481 error_report("Could not remap addr: "
2482 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2483 length, addr);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002484 exit(1);
2485 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002486 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04002487 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002488 }
Huang Yingcd19cfa2011-03-02 08:56:19 +01002489 }
2490 }
2491}
2492#endif /* !_WIN32 */
2493
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002494/* Return a host pointer to ram allocated with qemu_ram_alloc.
Mike Dayae3a7042013-09-05 14:41:35 -04002495 * This should not be used for general purpose DMA. Use address_space_map
2496 * or address_space_rw instead. For local memory (e.g. video ram) that the
2497 * device owns, use memory_region_get_ram_ptr.
Mike Day0dc3f442013-09-05 14:41:35 -04002498 *
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002499 * Called within RCU critical section.
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002500 */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002501void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002502{
Gonglei3655cb92016-02-20 10:35:20 +08002503 RAMBlock *block = ram_block;
2504
2505 if (block == NULL) {
2506 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002507 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002508 }
Mike Dayae3a7042013-09-05 14:41:35 -04002509
2510 if (xen_enabled() && block->host == NULL) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002511 /* We need to check if the requested address is in the RAM
2512 * because we don't want to map the entire memory in QEMU.
2513 * In that case just map until the end of the page.
2514 */
2515 if (block->offset == 0) {
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002516 return xen_map_cache(addr, 0, 0, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002517 }
Mike Dayae3a7042013-09-05 14:41:35 -04002518
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002519 block->host = xen_map_cache(block->offset, block->max_length, 1, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002520 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002521 return ramblock_ptr(block, addr);
pbrookdc828ca2009-04-09 22:21:07 +00002522}
2523
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002524/* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
Mike Dayae3a7042013-09-05 14:41:35 -04002525 * but takes a size argument.
Mike Day0dc3f442013-09-05 14:41:35 -04002526 *
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002527 * Called within RCU critical section.
Mike Dayae3a7042013-09-05 14:41:35 -04002528 */
Gonglei3655cb92016-02-20 10:35:20 +08002529static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002530 hwaddr *size, bool lock)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002531{
Gonglei3655cb92016-02-20 10:35:20 +08002532 RAMBlock *block = ram_block;
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002533 if (*size == 0) {
2534 return NULL;
2535 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002536
Gonglei3655cb92016-02-20 10:35:20 +08002537 if (block == NULL) {
2538 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002539 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002540 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002541 *size = MIN(*size, block->max_length - addr);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002542
2543 if (xen_enabled() && block->host == NULL) {
2544 /* We need to check if the requested address is in the RAM
2545 * because we don't want to map the entire memory in QEMU.
2546 * In that case just map the requested area.
2547 */
2548 if (block->offset == 0) {
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002549 return xen_map_cache(addr, *size, lock, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002550 }
2551
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002552 block->host = xen_map_cache(block->offset, block->max_length, 1, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002553 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002554
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002555 return ramblock_ptr(block, addr);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002556}
2557
Dr. David Alan Gilbertf90bb712018-03-12 17:20:57 +00002558/* Return the offset of a hostpointer within a ramblock */
2559ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2560{
2561 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2562 assert((uintptr_t)host >= (uintptr_t)rb->host);
2563 assert(res < rb->max_length);
2564
2565 return res;
2566}
2567
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002568/*
2569 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2570 * in that RAMBlock.
2571 *
2572 * ptr: Host pointer to look up
2573 * round_offset: If true round the result offset down to a page boundary
2574 * *ram_addr: set to result ram_addr
2575 * *offset: set to result offset within the RAMBlock
2576 *
2577 * Returns: RAMBlock (or NULL if not found)
Mike Dayae3a7042013-09-05 14:41:35 -04002578 *
2579 * By the time this function returns, the returned pointer is not protected
2580 * by RCU anymore. If the caller is not within an RCU critical section and
2581 * does not hold the iothread lock, it must have other means of protecting the
2582 * pointer, such as a reference to the region that includes the incoming
2583 * ram_addr_t.
2584 */
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002585RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002586 ram_addr_t *offset)
pbrook5579c7f2009-04-11 14:47:08 +00002587{
pbrook94a6b542009-04-11 17:15:54 +00002588 RAMBlock *block;
2589 uint8_t *host = ptr;
2590
Jan Kiszka868bb332011-06-21 22:59:09 +02002591 if (xen_enabled()) {
Paolo Bonzinif615f392016-05-26 10:07:50 +02002592 ram_addr_t ram_addr;
Mike Day0dc3f442013-09-05 14:41:35 -04002593 rcu_read_lock();
Paolo Bonzinif615f392016-05-26 10:07:50 +02002594 ram_addr = xen_ram_addr_from_mapcache(ptr);
2595 block = qemu_get_ram_block(ram_addr);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002596 if (block) {
Anthony PERARDd6b6aec2016-06-09 16:56:17 +01002597 *offset = ram_addr - block->offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002598 }
Mike Day0dc3f442013-09-05 14:41:35 -04002599 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002600 return block;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01002601 }
2602
Mike Day0dc3f442013-09-05 14:41:35 -04002603 rcu_read_lock();
2604 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002605 if (block && block->host && host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002606 goto found;
2607 }
2608
Peter Xu99e15582017-05-12 12:17:39 +08002609 RAMBLOCK_FOREACH(block) {
Jun Nakajima432d2682010-08-31 16:41:25 +01002610 /* This case append when the block is not mapped. */
2611 if (block->host == NULL) {
2612 continue;
2613 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002614 if (host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002615 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06002616 }
pbrook94a6b542009-04-11 17:15:54 +00002617 }
Jun Nakajima432d2682010-08-31 16:41:25 +01002618
Mike Day0dc3f442013-09-05 14:41:35 -04002619 rcu_read_unlock();
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002620 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02002621
2622found:
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002623 *offset = (host - block->host);
2624 if (round_offset) {
2625 *offset &= TARGET_PAGE_MASK;
2626 }
Mike Day0dc3f442013-09-05 14:41:35 -04002627 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002628 return block;
2629}
2630
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002631/*
2632 * Finds the named RAMBlock
2633 *
2634 * name: The name of RAMBlock to find
2635 *
2636 * Returns: RAMBlock (or NULL if not found)
2637 */
2638RAMBlock *qemu_ram_block_by_name(const char *name)
2639{
2640 RAMBlock *block;
2641
Peter Xu99e15582017-05-12 12:17:39 +08002642 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002643 if (!strcmp(name, block->idstr)) {
2644 return block;
2645 }
2646 }
2647
2648 return NULL;
2649}
2650
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002651/* Some of the softmmu routines need to translate from a host pointer
2652 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002653ram_addr_t qemu_ram_addr_from_host(void *ptr)
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002654{
2655 RAMBlock *block;
Paolo Bonzinif615f392016-05-26 10:07:50 +02002656 ram_addr_t offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002657
Paolo Bonzinif615f392016-05-26 10:07:50 +02002658 block = qemu_ram_block_from_host(ptr, false, &offset);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002659 if (!block) {
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002660 return RAM_ADDR_INVALID;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002661 }
2662
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002663 return block->offset + offset;
Marcelo Tosattie8902612010-10-11 15:31:19 -03002664}
Alex Williamsonf471a172010-06-11 11:11:42 -06002665
Peter Maydell27266272017-11-20 18:08:27 +00002666/* Called within RCU critical section. */
2667void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
2668 CPUState *cpu,
2669 vaddr mem_vaddr,
2670 ram_addr_t ram_addr,
2671 unsigned size)
2672{
2673 ndi->cpu = cpu;
2674 ndi->ram_addr = ram_addr;
2675 ndi->mem_vaddr = mem_vaddr;
2676 ndi->size = size;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002677 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002678
2679 assert(tcg_enabled());
2680 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002681 ndi->pages = page_collection_lock(ram_addr, ram_addr + size);
2682 tb_invalidate_phys_page_fast(ndi->pages, ram_addr, size);
Peter Maydell27266272017-11-20 18:08:27 +00002683 }
2684}
2685
2686/* Called within RCU critical section. */
2687void memory_notdirty_write_complete(NotDirtyInfo *ndi)
2688{
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002689 if (ndi->pages) {
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04002690 assert(tcg_enabled());
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002691 page_collection_unlock(ndi->pages);
2692 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002693 }
2694
2695 /* Set both VGA and migration bits for simplicity and to remove
2696 * the notdirty callback faster.
2697 */
2698 cpu_physical_memory_set_dirty_range(ndi->ram_addr, ndi->size,
2699 DIRTY_CLIENTS_NOCODE);
2700 /* we remove the notdirty callback only if the code has been
2701 flushed */
2702 if (!cpu_physical_memory_is_clean(ndi->ram_addr)) {
2703 tlb_set_dirty(ndi->cpu, ndi->mem_vaddr);
2704 }
2705}
2706
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002707/* Called within RCU critical section. */
Avi Kivitya8170e52012-10-23 12:30:10 +02002708static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002709 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00002710{
Peter Maydell27266272017-11-20 18:08:27 +00002711 NotDirtyInfo ndi;
Alex Bennéeba051fb2016-10-27 16:10:16 +01002712
Peter Maydell27266272017-11-20 18:08:27 +00002713 memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr,
2714 ram_addr, size);
2715
Peter Maydell6d3ede52018-06-15 14:57:14 +01002716 stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val);
Peter Maydell27266272017-11-20 18:08:27 +00002717 memory_notdirty_write_complete(&ndi);
bellard1ccde1c2004-02-06 19:46:14 +00002718}
2719
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002720static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002721 unsigned size, bool is_write,
2722 MemTxAttrs attrs)
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002723{
2724 return is_write;
2725}
2726
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002727static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002728 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002729 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002730 .endianness = DEVICE_NATIVE_ENDIAN,
Andrew Baumannad528782017-10-13 11:19:13 -07002731 .valid = {
2732 .min_access_size = 1,
2733 .max_access_size = 8,
2734 .unaligned = false,
2735 },
2736 .impl = {
2737 .min_access_size = 1,
2738 .max_access_size = 8,
2739 .unaligned = false,
2740 },
bellard1ccde1c2004-02-06 19:46:14 +00002741};
2742
pbrook0f459d12008-06-09 00:20:13 +00002743/* Generate a debug exception if a watchpoint has been hit. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002744static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
pbrook0f459d12008-06-09 00:20:13 +00002745{
Andreas Färber93afead2013-08-26 03:41:01 +02002746 CPUState *cpu = current_cpu;
Sergey Fedorov568496c2016-02-11 11:17:32 +00002747 CPUClass *cc = CPU_GET_CLASS(cpu);
pbrook0f459d12008-06-09 00:20:13 +00002748 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00002749 CPUWatchpoint *wp;
pbrook0f459d12008-06-09 00:20:13 +00002750
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02002751 assert(tcg_enabled());
Andreas Färberff4700b2013-08-26 18:23:18 +02002752 if (cpu->watchpoint_hit) {
aliguori06d55cc2008-11-18 20:24:06 +00002753 /* We re-entered the check after replacing the TB. Now raise
2754 * the debug interrupt so that is will trigger after the
2755 * current instruction. */
Andreas Färber93afead2013-08-26 03:41:01 +02002756 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00002757 return;
2758 }
Andreas Färber93afead2013-08-26 03:41:01 +02002759 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Julian Brown40612002017-02-07 18:29:59 +00002760 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
Andreas Färberff4700b2013-08-26 18:23:18 +02002761 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01002762 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2763 && (wp->flags & flags)) {
Peter Maydell08225672014-09-12 14:06:48 +01002764 if (flags == BP_MEM_READ) {
2765 wp->flags |= BP_WATCHPOINT_HIT_READ;
2766 } else {
2767 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2768 }
2769 wp->hitaddr = vaddr;
Peter Maydell66b9b432015-04-26 16:49:24 +01002770 wp->hitattrs = attrs;
Andreas Färberff4700b2013-08-26 18:23:18 +02002771 if (!cpu->watchpoint_hit) {
Sergey Fedorov568496c2016-02-11 11:17:32 +00002772 if (wp->flags & BP_CPU &&
2773 !cc->debug_check_watchpoint(cpu, wp)) {
2774 wp->flags &= ~BP_WATCHPOINT_HIT;
2775 continue;
2776 }
Andreas Färberff4700b2013-08-26 18:23:18 +02002777 cpu->watchpoint_hit = wp;
KONRAD Frederica5e99822016-10-27 16:10:06 +01002778
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002779 mmap_lock();
Andreas Färber239c51a2013-09-01 17:12:23 +02002780 tb_check_watchpoint(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002781 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
Andreas Färber27103422013-08-26 08:31:06 +02002782 cpu->exception_index = EXCP_DEBUG;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002783 mmap_unlock();
Andreas Färber5638d182013-08-27 17:52:12 +02002784 cpu_loop_exit(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002785 } else {
Richard Henderson9b990ee2017-10-13 10:50:02 -07002786 /* Force execution of one insn next time. */
2787 cpu->cflags_next_tb = 1 | curr_cflags();
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002788 mmap_unlock();
Peter Maydell6886b982016-05-17 15:18:04 +01002789 cpu_loop_exit_noexc(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002790 }
aliguori06d55cc2008-11-18 20:24:06 +00002791 }
aliguori6e140f22008-11-18 20:37:55 +00002792 } else {
2793 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00002794 }
2795 }
2796}
2797
pbrook6658ffb2007-03-16 23:58:11 +00002798/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2799 so these check for a hit then pass through to the normal out-of-line
2800 phys routines. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002801static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2802 unsigned size, MemTxAttrs attrs)
pbrook6658ffb2007-03-16 23:58:11 +00002803{
Peter Maydell66b9b432015-04-26 16:49:24 +01002804 MemTxResult res;
2805 uint64_t data;
Peter Maydell79ed0412016-01-21 14:15:06 +00002806 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2807 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
pbrook6658ffb2007-03-16 23:58:11 +00002808
Peter Maydell66b9b432015-04-26 16:49:24 +01002809 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
Avi Kivity1ec9b902012-01-02 12:47:48 +02002810 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04002811 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002812 data = address_space_ldub(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002813 break;
2814 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002815 data = address_space_lduw(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002816 break;
2817 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002818 data = address_space_ldl(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002819 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002820 case 8:
2821 data = address_space_ldq(as, addr, attrs, &res);
2822 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02002823 default: abort();
2824 }
Peter Maydell66b9b432015-04-26 16:49:24 +01002825 *pdata = data;
2826 return res;
2827}
2828
2829static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2830 uint64_t val, unsigned size,
2831 MemTxAttrs attrs)
2832{
2833 MemTxResult res;
Peter Maydell79ed0412016-01-21 14:15:06 +00002834 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2835 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
Peter Maydell66b9b432015-04-26 16:49:24 +01002836
2837 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2838 switch (size) {
2839 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002840 address_space_stb(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002841 break;
2842 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002843 address_space_stw(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002844 break;
2845 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002846 address_space_stl(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002847 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002848 case 8:
2849 address_space_stq(as, addr, val, attrs, &res);
2850 break;
Peter Maydell66b9b432015-04-26 16:49:24 +01002851 default: abort();
2852 }
2853 return res;
pbrook6658ffb2007-03-16 23:58:11 +00002854}
2855
Avi Kivity1ec9b902012-01-02 12:47:48 +02002856static const MemoryRegionOps watch_mem_ops = {
Peter Maydell66b9b432015-04-26 16:49:24 +01002857 .read_with_attrs = watch_mem_read,
2858 .write_with_attrs = watch_mem_write,
Avi Kivity1ec9b902012-01-02 12:47:48 +02002859 .endianness = DEVICE_NATIVE_ENDIAN,
Paolo Bonzini306526b2017-10-17 14:16:05 +02002860 .valid = {
2861 .min_access_size = 1,
2862 .max_access_size = 8,
2863 .unaligned = false,
2864 },
2865 .impl = {
2866 .min_access_size = 1,
2867 .max_access_size = 8,
2868 .unaligned = false,
2869 },
pbrook6658ffb2007-03-16 23:58:11 +00002870};
pbrook6658ffb2007-03-16 23:58:11 +00002871
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01002872static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2873 MemTxAttrs attrs, uint8_t *buf, int len);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002874static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2875 const uint8_t *buf, int len);
2876static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01002877 bool is_write, MemTxAttrs attrs);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002878
Peter Maydellf25a49e2015-04-26 16:49:24 +01002879static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2880 unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002881{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002882 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002883 uint8_t buf[8];
Peter Maydell5c9eb022015-04-26 16:49:24 +01002884 MemTxResult res;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002885
blueswir1db7b5422007-05-26 17:36:03 +00002886#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002887 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002888 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00002889#endif
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002890 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
Peter Maydell5c9eb022015-04-26 16:49:24 +01002891 if (res) {
2892 return res;
Peter Maydellf25a49e2015-04-26 16:49:24 +01002893 }
Peter Maydell6d3ede52018-06-15 14:57:14 +01002894 *data = ldn_p(buf, len);
2895 return MEMTX_OK;
blueswir1db7b5422007-05-26 17:36:03 +00002896}
2897
Peter Maydellf25a49e2015-04-26 16:49:24 +01002898static MemTxResult subpage_write(void *opaque, hwaddr addr,
2899 uint64_t value, unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002900{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002901 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002902 uint8_t buf[8];
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002903
blueswir1db7b5422007-05-26 17:36:03 +00002904#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002905 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002906 " value %"PRIx64"\n",
2907 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00002908#endif
Peter Maydell6d3ede52018-06-15 14:57:14 +01002909 stn_p(buf, len, value);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002910 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00002911}
2912
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002913static bool subpage_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002914 unsigned len, bool is_write,
2915 MemTxAttrs attrs)
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002916{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002917 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002918#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002919 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002920 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002921#endif
2922
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002923 return flatview_access_valid(subpage->fv, addr + subpage->base,
Peter Maydelleace72b2018-05-31 14:50:52 +01002924 len, is_write, attrs);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002925}
2926
Avi Kivity70c68e42012-01-02 12:32:48 +02002927static const MemoryRegionOps subpage_ops = {
Peter Maydellf25a49e2015-04-26 16:49:24 +01002928 .read_with_attrs = subpage_read,
2929 .write_with_attrs = subpage_write,
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002930 .impl.min_access_size = 1,
2931 .impl.max_access_size = 8,
2932 .valid.min_access_size = 1,
2933 .valid.max_access_size = 8,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002934 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02002935 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00002936};
2937
Anthony Liguoric227f092009-10-01 16:12:16 -05002938static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02002939 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00002940{
2941 int idx, eidx;
2942
2943 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2944 return -1;
2945 idx = SUBPAGE_IDX(start);
2946 eidx = SUBPAGE_IDX(end);
2947#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002948 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2949 __func__, mmio, start, end, idx, eidx, section);
blueswir1db7b5422007-05-26 17:36:03 +00002950#endif
blueswir1db7b5422007-05-26 17:36:03 +00002951 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02002952 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00002953 }
2954
2955 return 0;
2956}
2957
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002958static subpage_t *subpage_init(FlatView *fv, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00002959{
Anthony Liguoric227f092009-10-01 16:12:16 -05002960 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00002961
Vijaya Kumar K2615fab2016-10-24 16:26:49 +01002962 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002963 mmio->fv = fv;
aliguori1eec6142009-02-05 22:06:18 +00002964 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002965 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07002966 NULL, TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02002967 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00002968#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002969 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2970 mmio, base, TARGET_PAGE_SIZE);
blueswir1db7b5422007-05-26 17:36:03 +00002971#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02002972 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00002973
2974 return mmio;
2975}
2976
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002977static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
Avi Kivity5312bd82012-02-12 18:32:55 +02002978{
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002979 assert(fv);
Avi Kivity5312bd82012-02-12 18:32:55 +02002980 MemoryRegionSection section = {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002981 .fv = fv,
Avi Kivity5312bd82012-02-12 18:32:55 +02002982 .mr = mr,
2983 .offset_within_address_space = 0,
2984 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02002985 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02002986 };
2987
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002988 return phys_section_add(map, &section);
Avi Kivity5312bd82012-02-12 18:32:55 +02002989}
2990
Peter Maydell8af36742017-12-13 17:52:28 +00002991static void readonly_mem_write(void *opaque, hwaddr addr,
2992 uint64_t val, unsigned size)
2993{
2994 /* Ignore any write to ROM. */
2995}
2996
2997static bool readonly_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002998 unsigned size, bool is_write,
2999 MemTxAttrs attrs)
Peter Maydell8af36742017-12-13 17:52:28 +00003000{
3001 return is_write;
3002}
3003
3004/* This will only be used for writes, because reads are special cased
3005 * to directly access the underlying host ram.
3006 */
3007static const MemoryRegionOps readonly_mem_ops = {
3008 .write = readonly_mem_write,
3009 .valid.accepts = readonly_mem_accepts,
3010 .endianness = DEVICE_NATIVE_ENDIAN,
3011 .valid = {
3012 .min_access_size = 1,
3013 .max_access_size = 8,
3014 .unaligned = false,
3015 },
3016 .impl = {
3017 .min_access_size = 1,
3018 .max_access_size = 8,
3019 .unaligned = false,
3020 },
3021};
3022
Peter Maydell2d54f192018-06-15 14:57:14 +01003023MemoryRegionSection *iotlb_to_section(CPUState *cpu,
3024 hwaddr index, MemTxAttrs attrs)
Avi Kivityaa102232012-03-08 17:06:55 +02003025{
Peter Maydella54c87b2016-01-21 14:15:05 +00003026 int asidx = cpu_asidx_from_attrs(cpu, attrs);
3027 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
Peter Maydell32857f42015-10-01 15:29:50 +01003028 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01003029 MemoryRegionSection *sections = d->map.sections;
Paolo Bonzini9d82b5a2013-08-16 08:26:30 +02003030
Peter Maydell2d54f192018-06-15 14:57:14 +01003031 return &sections[index & ~TARGET_PAGE_MASK];
Avi Kivityaa102232012-03-08 17:06:55 +02003032}
3033
Avi Kivitye9179ce2009-06-14 11:38:52 +03003034static void io_mem_init(void)
3035{
Peter Maydell8af36742017-12-13 17:52:28 +00003036 memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops,
3037 NULL, NULL, UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003038 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003039 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003040
3041 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
3042 * which can be called without the iothread mutex.
3043 */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003044 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003045 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003046 memory_region_clear_global_locking(&io_mem_notdirty);
3047
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003048 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003049 NULL, UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03003050}
3051
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10003052AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
Avi Kivityac1970f2012-10-03 16:22:53 +02003053{
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003054 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
3055 uint16_t n;
3056
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003057 n = dummy_section(&d->map, fv, &io_mem_unassigned);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003058 assert(n == PHYS_SECTION_UNASSIGNED);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003059 n = dummy_section(&d->map, fv, &io_mem_notdirty);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003060 assert(n == PHYS_SECTION_NOTDIRTY);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003061 n = dummy_section(&d->map, fv, &io_mem_rom);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003062 assert(n == PHYS_SECTION_ROM);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003063 n = dummy_section(&d->map, fv, &io_mem_watch);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003064 assert(n == PHYS_SECTION_WATCH);
Paolo Bonzini00752702013-05-29 12:13:54 +02003065
Michael S. Tsirkin9736e552013-11-11 14:42:43 +02003066 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003067
3068 return d;
Paolo Bonzini00752702013-05-29 12:13:54 +02003069}
3070
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003071void address_space_dispatch_free(AddressSpaceDispatch *d)
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01003072{
3073 phys_sections_free(&d->map);
3074 g_free(d);
3075}
3076
Avi Kivity1d711482012-10-02 18:54:45 +02003077static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02003078{
Peter Maydell32857f42015-10-01 15:29:50 +01003079 CPUAddressSpace *cpuas;
3080 AddressSpaceDispatch *d;
Avi Kivity117712c2012-02-12 21:23:17 +02003081
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04003082 assert(tcg_enabled());
Avi Kivity117712c2012-02-12 21:23:17 +02003083 /* since each CPU stores ram addresses in its TLB cache, we must
3084 reset the modified entries */
Peter Maydell32857f42015-10-01 15:29:50 +01003085 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
3086 cpu_reloading_memory_map();
3087 /* The CPU and TLB are protected by the iothread lock.
3088 * We reload the dispatch pointer now because cpu_reloading_memory_map()
3089 * may have split the RCU critical section.
3090 */
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003091 d = address_space_to_dispatch(cpuas->as);
Alex Bennéef35e44e2016-10-21 16:34:18 +01003092 atomic_rcu_set(&cpuas->memory_dispatch, d);
Alex Bennéed10eb082016-11-14 14:17:28 +00003093 tlb_flush(cpuas->cpu);
Avi Kivity50c1e142012-02-08 21:36:02 +02003094}
3095
Avi Kivity62152b82011-07-26 14:26:14 +03003096static void memory_map_init(void)
3097{
Anthony Liguori7267c092011-08-20 22:09:37 -05003098 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini03f49952013-11-07 17:14:36 +01003099
Paolo Bonzini57271d62013-11-07 17:14:37 +01003100 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003101 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03003102
Anthony Liguori7267c092011-08-20 22:09:37 -05003103 system_io = g_malloc(sizeof(*system_io));
Jan Kiszka3bb28b72013-09-02 18:43:30 +02003104 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
3105 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003106 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity62152b82011-07-26 14:26:14 +03003107}
3108
3109MemoryRegion *get_system_memory(void)
3110{
3111 return system_memory;
3112}
3113
Avi Kivity309cb472011-08-08 16:09:03 +03003114MemoryRegion *get_system_io(void)
3115{
3116 return system_io;
3117}
3118
pbrooke2eef172008-06-08 01:09:01 +00003119#endif /* !defined(CONFIG_USER_ONLY) */
3120
bellard13eb76e2004-01-24 15:23:36 +00003121/* physical memory access (slow version, mainly for debug) */
3122#if defined(CONFIG_USER_ONLY)
Andreas Färberf17ec442013-06-29 19:40:58 +02003123int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Paul Brooka68fe892010-03-01 00:08:59 +00003124 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003125{
3126 int l, flags;
3127 target_ulong page;
pbrook53a59602006-03-25 19:31:22 +00003128 void * p;
bellard13eb76e2004-01-24 15:23:36 +00003129
3130 while (len > 0) {
3131 page = addr & TARGET_PAGE_MASK;
3132 l = (page + TARGET_PAGE_SIZE) - addr;
3133 if (l > len)
3134 l = len;
3135 flags = page_get_flags(page);
3136 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00003137 return -1;
bellard13eb76e2004-01-24 15:23:36 +00003138 if (is_write) {
3139 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00003140 return -1;
bellard579a97f2007-11-11 14:26:47 +00003141 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003142 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00003143 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003144 memcpy(p, buf, l);
3145 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00003146 } else {
3147 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00003148 return -1;
bellard579a97f2007-11-11 14:26:47 +00003149 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003150 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00003151 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003152 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00003153 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00003154 }
3155 len -= l;
3156 buf += l;
3157 addr += l;
3158 }
Paul Brooka68fe892010-03-01 00:08:59 +00003159 return 0;
bellard13eb76e2004-01-24 15:23:36 +00003160}
bellard8df1cd02005-01-28 22:37:22 +00003161
bellard13eb76e2004-01-24 15:23:36 +00003162#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003163
Paolo Bonzini845b6212015-03-23 11:45:53 +01003164static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
Avi Kivitya8170e52012-10-23 12:30:10 +02003165 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003166{
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003167 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003168 addr += memory_region_get_ram_addr(mr);
3169
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003170 /* No early return if dirty_log_mask is or becomes 0, because
3171 * cpu_physical_memory_set_dirty_range will still call
3172 * xen_modified_memory.
3173 */
3174 if (dirty_log_mask) {
3175 dirty_log_mask =
3176 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003177 }
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003178 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02003179 assert(tcg_enabled());
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003180 tb_invalidate_phys_range(addr, addr + length);
3181 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
3182 }
3183 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003184}
3185
Richard Henderson23326162013-07-08 14:55:59 -07003186static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02003187{
Paolo Bonzinie1622f42013-07-17 13:17:41 +02003188 unsigned access_size_max = mr->ops->valid.max_access_size;
Richard Henderson23326162013-07-08 14:55:59 -07003189
3190 /* Regions are assumed to support 1-4 byte accesses unless
3191 otherwise specified. */
Richard Henderson23326162013-07-08 14:55:59 -07003192 if (access_size_max == 0) {
3193 access_size_max = 4;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003194 }
Richard Henderson23326162013-07-08 14:55:59 -07003195
3196 /* Bound the maximum access by the alignment of the address. */
3197 if (!mr->ops->impl.unaligned) {
3198 unsigned align_size_max = addr & -addr;
3199 if (align_size_max != 0 && align_size_max < access_size_max) {
3200 access_size_max = align_size_max;
3201 }
3202 }
3203
3204 /* Don't attempt accesses larger than the maximum. */
3205 if (l > access_size_max) {
3206 l = access_size_max;
3207 }
Peter Maydell6554f5c2015-07-24 13:33:10 +01003208 l = pow2floor(l);
Richard Henderson23326162013-07-08 14:55:59 -07003209
3210 return l;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003211}
3212
Jan Kiszka4840f102015-06-18 18:47:22 +02003213static bool prepare_mmio_access(MemoryRegion *mr)
Paolo Bonzini125b3802015-06-18 18:47:21 +02003214{
Jan Kiszka4840f102015-06-18 18:47:22 +02003215 bool unlocked = !qemu_mutex_iothread_locked();
3216 bool release_lock = false;
3217
3218 if (unlocked && mr->global_locking) {
3219 qemu_mutex_lock_iothread();
3220 unlocked = false;
3221 release_lock = true;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003222 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003223 if (mr->flush_coalesced_mmio) {
3224 if (unlocked) {
3225 qemu_mutex_lock_iothread();
3226 }
3227 qemu_flush_coalesced_mmio_buffer();
3228 if (unlocked) {
3229 qemu_mutex_unlock_iothread();
3230 }
3231 }
3232
3233 return release_lock;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003234}
3235
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003236/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003237static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
3238 MemTxAttrs attrs,
3239 const uint8_t *buf,
3240 int len, hwaddr addr1,
3241 hwaddr l, MemoryRegion *mr)
bellard13eb76e2004-01-24 15:23:36 +00003242{
bellard13eb76e2004-01-24 15:23:36 +00003243 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02003244 uint64_t val;
Peter Maydell3b643492015-04-26 16:49:23 +01003245 MemTxResult result = MEMTX_OK;
Jan Kiszka4840f102015-06-18 18:47:22 +02003246 bool release_lock = false;
ths3b46e622007-09-17 08:09:54 +00003247
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003248 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003249 if (!memory_access_is_direct(mr, true)) {
3250 release_lock |= prepare_mmio_access(mr);
3251 l = memory_access_size(mr, l, addr1);
3252 /* XXX: could force current_cpu to NULL to avoid
3253 potential bugs */
Peter Maydell6d3ede52018-06-15 14:57:14 +01003254 val = ldn_p(buf, l);
3255 result |= memory_region_dispatch_write(mr, addr1, val, l, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003256 } else {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003257 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003258 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003259 memcpy(ptr, buf, l);
3260 invalidate_and_set_dirty(mr, addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00003261 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003262
3263 if (release_lock) {
3264 qemu_mutex_unlock_iothread();
3265 release_lock = false;
3266 }
3267
bellard13eb76e2004-01-24 15:23:36 +00003268 len -= l;
3269 buf += l;
3270 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003271
3272 if (!len) {
3273 break;
3274 }
3275
3276 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003277 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003278 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02003279
Peter Maydell3b643492015-04-26 16:49:23 +01003280 return result;
bellard13eb76e2004-01-24 15:23:36 +00003281}
bellard8df1cd02005-01-28 22:37:22 +00003282
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003283/* Called from RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003284static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
3285 const uint8_t *buf, int len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003286{
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003287 hwaddr l;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003288 hwaddr addr1;
3289 MemoryRegion *mr;
3290 MemTxResult result = MEMTX_OK;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003291
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003292 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003293 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003294 result = flatview_write_continue(fv, addr, attrs, buf, len,
3295 addr1, l, mr);
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003296
3297 return result;
3298}
3299
3300/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003301MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
3302 MemTxAttrs attrs, uint8_t *buf,
3303 int len, hwaddr addr1, hwaddr l,
3304 MemoryRegion *mr)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003305{
3306 uint8_t *ptr;
3307 uint64_t val;
3308 MemTxResult result = MEMTX_OK;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003309 bool release_lock = false;
3310
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003311 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003312 if (!memory_access_is_direct(mr, false)) {
3313 /* I/O case */
3314 release_lock |= prepare_mmio_access(mr);
3315 l = memory_access_size(mr, l, addr1);
Peter Maydell6d3ede52018-06-15 14:57:14 +01003316 result |= memory_region_dispatch_read(mr, addr1, &val, l, attrs);
3317 stn_p(buf, l, val);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003318 } else {
3319 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003320 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003321 memcpy(buf, ptr, l);
3322 }
3323
3324 if (release_lock) {
3325 qemu_mutex_unlock_iothread();
3326 release_lock = false;
3327 }
3328
3329 len -= l;
3330 buf += l;
3331 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003332
3333 if (!len) {
3334 break;
3335 }
3336
3337 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003338 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003339 }
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003340
3341 return result;
3342}
3343
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003344/* Called from RCU critical section. */
3345static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
3346 MemTxAttrs attrs, uint8_t *buf, int len)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003347{
3348 hwaddr l;
3349 hwaddr addr1;
3350 MemoryRegion *mr;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003351
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003352 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003353 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003354 return flatview_read_continue(fv, addr, attrs, buf, len,
3355 addr1, l, mr);
Avi Kivityac1970f2012-10-03 16:22:53 +02003356}
3357
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003358MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
3359 MemTxAttrs attrs, uint8_t *buf, int len)
3360{
3361 MemTxResult result = MEMTX_OK;
3362 FlatView *fv;
3363
3364 if (len > 0) {
3365 rcu_read_lock();
3366 fv = address_space_to_flatview(as);
3367 result = flatview_read(fv, addr, attrs, buf, len);
3368 rcu_read_unlock();
3369 }
3370
3371 return result;
3372}
3373
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003374MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
3375 MemTxAttrs attrs,
3376 const uint8_t *buf, int len)
3377{
3378 MemTxResult result = MEMTX_OK;
3379 FlatView *fv;
3380
3381 if (len > 0) {
3382 rcu_read_lock();
3383 fv = address_space_to_flatview(as);
3384 result = flatview_write(fv, addr, attrs, buf, len);
3385 rcu_read_unlock();
3386 }
3387
3388 return result;
3389}
3390
Paolo Bonzinidb84fd92018-03-05 09:29:04 +01003391MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
3392 uint8_t *buf, int len, bool is_write)
3393{
3394 if (is_write) {
3395 return address_space_write(as, addr, attrs, buf, len);
3396 } else {
3397 return address_space_read_full(as, addr, attrs, buf, len);
3398 }
3399}
3400
Avi Kivitya8170e52012-10-23 12:30:10 +02003401void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02003402 int len, int is_write)
3403{
Peter Maydell5c9eb022015-04-26 16:49:24 +01003404 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3405 buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02003406}
3407
Alexander Graf582b55a2013-12-11 14:17:44 +01003408enum write_rom_type {
3409 WRITE_DATA,
3410 FLUSH_CACHE,
3411};
3412
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003413static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
Alexander Graf582b55a2013-12-11 14:17:44 +01003414 hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
bellardd0ecd2a2006-04-23 17:14:48 +00003415{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003416 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00003417 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003418 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003419 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00003420
Paolo Bonzini41063e12015-03-18 14:21:43 +01003421 rcu_read_lock();
bellardd0ecd2a2006-04-23 17:14:48 +00003422 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003423 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003424 mr = address_space_translate(as, addr, &addr1, &l, true,
3425 MEMTXATTRS_UNSPECIFIED);
ths3b46e622007-09-17 08:09:54 +00003426
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003427 if (!(memory_region_is_ram(mr) ||
3428 memory_region_is_romd(mr))) {
Paolo Bonzinib242e0e2015-07-04 00:24:51 +02003429 l = memory_access_size(mr, l, addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00003430 } else {
bellardd0ecd2a2006-04-23 17:14:48 +00003431 /* ROM/RAM case */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003432 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
Alexander Graf582b55a2013-12-11 14:17:44 +01003433 switch (type) {
3434 case WRITE_DATA:
3435 memcpy(ptr, buf, l);
Paolo Bonzini845b6212015-03-23 11:45:53 +01003436 invalidate_and_set_dirty(mr, addr1, l);
Alexander Graf582b55a2013-12-11 14:17:44 +01003437 break;
3438 case FLUSH_CACHE:
3439 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
3440 break;
3441 }
bellardd0ecd2a2006-04-23 17:14:48 +00003442 }
3443 len -= l;
3444 buf += l;
3445 addr += l;
3446 }
Paolo Bonzini41063e12015-03-18 14:21:43 +01003447 rcu_read_unlock();
bellardd0ecd2a2006-04-23 17:14:48 +00003448}
3449
Alexander Graf582b55a2013-12-11 14:17:44 +01003450/* used for ROM loading : can write in RAM and ROM */
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003451void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
Alexander Graf582b55a2013-12-11 14:17:44 +01003452 const uint8_t *buf, int len)
3453{
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003454 cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
Alexander Graf582b55a2013-12-11 14:17:44 +01003455}
3456
3457void cpu_flush_icache_range(hwaddr start, int len)
3458{
3459 /*
3460 * This function should do the same thing as an icache flush that was
3461 * triggered from within the guest. For TCG we are always cache coherent,
3462 * so there is no need to flush anything. For KVM / Xen we need to flush
3463 * the host's instruction cache at least.
3464 */
3465 if (tcg_enabled()) {
3466 return;
3467 }
3468
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003469 cpu_physical_memory_write_rom_internal(&address_space_memory,
3470 start, NULL, len, FLUSH_CACHE);
Alexander Graf582b55a2013-12-11 14:17:44 +01003471}
3472
aliguori6d16c2f2009-01-22 16:59:11 +00003473typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003474 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00003475 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02003476 hwaddr addr;
3477 hwaddr len;
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003478 bool in_use;
aliguori6d16c2f2009-01-22 16:59:11 +00003479} BounceBuffer;
3480
3481static BounceBuffer bounce;
3482
aliguoriba223c22009-01-22 16:59:16 +00003483typedef struct MapClient {
Fam Zhenge95205e2015-03-16 17:03:37 +08003484 QEMUBH *bh;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003485 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00003486} MapClient;
3487
Fam Zheng38e047b2015-03-16 17:03:35 +08003488QemuMutex map_client_list_lock;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003489static QLIST_HEAD(map_client_list, MapClient) map_client_list
3490 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00003491
Fam Zhenge95205e2015-03-16 17:03:37 +08003492static void cpu_unregister_map_client_do(MapClient *client)
aliguoriba223c22009-01-22 16:59:16 +00003493{
Blue Swirl72cf2d42009-09-12 07:36:22 +00003494 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05003495 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00003496}
3497
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003498static void cpu_notify_map_clients_locked(void)
aliguoriba223c22009-01-22 16:59:16 +00003499{
3500 MapClient *client;
3501
Blue Swirl72cf2d42009-09-12 07:36:22 +00003502 while (!QLIST_EMPTY(&map_client_list)) {
3503 client = QLIST_FIRST(&map_client_list);
Fam Zhenge95205e2015-03-16 17:03:37 +08003504 qemu_bh_schedule(client->bh);
3505 cpu_unregister_map_client_do(client);
aliguoriba223c22009-01-22 16:59:16 +00003506 }
3507}
3508
Fam Zhenge95205e2015-03-16 17:03:37 +08003509void cpu_register_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003510{
3511 MapClient *client = g_malloc(sizeof(*client));
3512
Fam Zheng38e047b2015-03-16 17:03:35 +08003513 qemu_mutex_lock(&map_client_list_lock);
Fam Zhenge95205e2015-03-16 17:03:37 +08003514 client->bh = bh;
bellardd0ecd2a2006-04-23 17:14:48 +00003515 QLIST_INSERT_HEAD(&map_client_list, client, link);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003516 if (!atomic_read(&bounce.in_use)) {
3517 cpu_notify_map_clients_locked();
3518 }
Fam Zheng38e047b2015-03-16 17:03:35 +08003519 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003520}
3521
Fam Zheng38e047b2015-03-16 17:03:35 +08003522void cpu_exec_init_all(void)
3523{
3524 qemu_mutex_init(&ram_list.mutex);
Peter Maydell20bccb82016-10-24 16:26:49 +01003525 /* The data structures we set up here depend on knowing the page size,
3526 * so no more changes can be made after this point.
3527 * In an ideal world, nothing we did before we had finished the
3528 * machine setup would care about the target page size, and we could
3529 * do this much later, rather than requiring board models to state
3530 * up front what their requirements are.
3531 */
3532 finalize_target_page_bits();
Fam Zheng38e047b2015-03-16 17:03:35 +08003533 io_mem_init();
Paolo Bonzini680a4782015-11-02 09:23:52 +01003534 memory_map_init();
Fam Zheng38e047b2015-03-16 17:03:35 +08003535 qemu_mutex_init(&map_client_list_lock);
3536}
3537
Fam Zhenge95205e2015-03-16 17:03:37 +08003538void cpu_unregister_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003539{
Fam Zhenge95205e2015-03-16 17:03:37 +08003540 MapClient *client;
bellardd0ecd2a2006-04-23 17:14:48 +00003541
Fam Zhenge95205e2015-03-16 17:03:37 +08003542 qemu_mutex_lock(&map_client_list_lock);
3543 QLIST_FOREACH(client, &map_client_list, link) {
3544 if (client->bh == bh) {
3545 cpu_unregister_map_client_do(client);
3546 break;
3547 }
3548 }
3549 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003550}
3551
3552static void cpu_notify_map_clients(void)
3553{
Fam Zheng38e047b2015-03-16 17:03:35 +08003554 qemu_mutex_lock(&map_client_list_lock);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003555 cpu_notify_map_clients_locked();
Fam Zheng38e047b2015-03-16 17:03:35 +08003556 qemu_mutex_unlock(&map_client_list_lock);
aliguori6d16c2f2009-01-22 16:59:11 +00003557}
3558
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003559static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01003560 bool is_write, MemTxAttrs attrs)
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003561{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003562 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003563 hwaddr l, xlat;
3564
3565 while (len > 0) {
3566 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003567 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003568 if (!memory_access_is_direct(mr, is_write)) {
3569 l = memory_access_size(mr, l, addr);
Peter Maydelleace72b2018-05-31 14:50:52 +01003570 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003571 return false;
3572 }
3573 }
3574
3575 len -= l;
3576 addr += l;
3577 }
3578 return true;
3579}
3580
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003581bool address_space_access_valid(AddressSpace *as, hwaddr addr,
Peter Maydellfddffa42018-05-31 14:50:52 +01003582 int len, bool is_write,
3583 MemTxAttrs attrs)
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003584{
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003585 FlatView *fv;
3586 bool result;
3587
3588 rcu_read_lock();
3589 fv = address_space_to_flatview(as);
Peter Maydelleace72b2018-05-31 14:50:52 +01003590 result = flatview_access_valid(fv, addr, len, is_write, attrs);
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003591 rcu_read_unlock();
3592 return result;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003593}
3594
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003595static hwaddr
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003596flatview_extend_translation(FlatView *fv, hwaddr addr,
Peter Maydell53d07902018-05-31 14:50:52 +01003597 hwaddr target_len,
3598 MemoryRegion *mr, hwaddr base, hwaddr len,
3599 bool is_write, MemTxAttrs attrs)
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003600{
3601 hwaddr done = 0;
3602 hwaddr xlat;
3603 MemoryRegion *this_mr;
3604
3605 for (;;) {
3606 target_len -= len;
3607 addr += len;
3608 done += len;
3609 if (target_len == 0) {
3610 return done;
3611 }
3612
3613 len = target_len;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003614 this_mr = flatview_translate(fv, addr, &xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +01003615 &len, is_write, attrs);
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003616 if (this_mr != mr || xlat != base + done) {
3617 return done;
3618 }
3619 }
3620}
3621
aliguori6d16c2f2009-01-22 16:59:11 +00003622/* Map a physical memory region into a host virtual address.
3623 * May map a subset of the requested range, given by and returned in *plen.
3624 * May return NULL if resources needed to perform the mapping are exhausted.
3625 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00003626 * Use cpu_register_map_client() to know when retrying the map operation is
3627 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00003628 */
Avi Kivityac1970f2012-10-03 16:22:53 +02003629void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02003630 hwaddr addr,
3631 hwaddr *plen,
Peter Maydellf26404f2018-05-31 14:50:52 +01003632 bool is_write,
3633 MemTxAttrs attrs)
aliguori6d16c2f2009-01-22 16:59:11 +00003634{
Avi Kivitya8170e52012-10-23 12:30:10 +02003635 hwaddr len = *plen;
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003636 hwaddr l, xlat;
3637 MemoryRegion *mr;
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003638 void *ptr;
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003639 FlatView *fv;
aliguori6d16c2f2009-01-22 16:59:11 +00003640
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003641 if (len == 0) {
3642 return NULL;
3643 }
aliguori6d16c2f2009-01-22 16:59:11 +00003644
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003645 l = len;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003646 rcu_read_lock();
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003647 fv = address_space_to_flatview(as);
Peter Maydellefa99a22018-05-31 14:50:52 +01003648 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini41063e12015-03-18 14:21:43 +01003649
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003650 if (!memory_access_is_direct(mr, is_write)) {
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003651 if (atomic_xchg(&bounce.in_use, true)) {
Paolo Bonzini41063e12015-03-18 14:21:43 +01003652 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003653 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00003654 }
Kevin Wolfe85d9db2013-07-22 14:30:23 +02003655 /* Avoid unbounded allocations */
3656 l = MIN(l, TARGET_PAGE_SIZE);
3657 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003658 bounce.addr = addr;
3659 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003660
3661 memory_region_ref(mr);
3662 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003663 if (!is_write) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003664 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003665 bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01003666 }
aliguori6d16c2f2009-01-22 16:59:11 +00003667
Paolo Bonzini41063e12015-03-18 14:21:43 +01003668 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003669 *plen = l;
3670 return bounce.buffer;
3671 }
3672
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003673
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003674 memory_region_ref(mr);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003675 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
Peter Maydell53d07902018-05-31 14:50:52 +01003676 l, is_write, attrs);
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003677 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003678 rcu_read_unlock();
3679
3680 return ptr;
aliguori6d16c2f2009-01-22 16:59:11 +00003681}
3682
Avi Kivityac1970f2012-10-03 16:22:53 +02003683/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00003684 * Will also mark the memory as dirty if is_write == 1. access_len gives
3685 * the amount of memory that was actually read or written by the caller.
3686 */
Avi Kivitya8170e52012-10-23 12:30:10 +02003687void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3688 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00003689{
3690 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003691 MemoryRegion *mr;
3692 ram_addr_t addr1;
3693
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01003694 mr = memory_region_from_host(buffer, &addr1);
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003695 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00003696 if (is_write) {
Paolo Bonzini845b6212015-03-23 11:45:53 +01003697 invalidate_and_set_dirty(mr, addr1, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003698 }
Jan Kiszka868bb332011-06-21 22:59:09 +02003699 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02003700 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01003701 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003702 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00003703 return;
3704 }
3705 if (is_write) {
Peter Maydell5c9eb022015-04-26 16:49:24 +01003706 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3707 bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003708 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00003709 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00003710 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003711 memory_region_unref(bounce.mr);
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003712 atomic_mb_set(&bounce.in_use, false);
aliguoriba223c22009-01-22 16:59:16 +00003713 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00003714}
bellardd0ecd2a2006-04-23 17:14:48 +00003715
Avi Kivitya8170e52012-10-23 12:30:10 +02003716void *cpu_physical_memory_map(hwaddr addr,
3717 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02003718 int is_write)
3719{
Peter Maydellf26404f2018-05-31 14:50:52 +01003720 return address_space_map(&address_space_memory, addr, plen, is_write,
3721 MEMTXATTRS_UNSPECIFIED);
Avi Kivityac1970f2012-10-03 16:22:53 +02003722}
3723
Avi Kivitya8170e52012-10-23 12:30:10 +02003724void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3725 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003726{
3727 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3728}
3729
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003730#define ARG1_DECL AddressSpace *as
3731#define ARG1 as
3732#define SUFFIX
3733#define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003734#define RCU_READ_LOCK(...) rcu_read_lock()
3735#define RCU_READ_UNLOCK(...) rcu_read_unlock()
3736#include "memory_ldst.inc.c"
Alexander Graf1e78bcc2011-07-06 09:09:23 +02003737
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003738int64_t address_space_cache_init(MemoryRegionCache *cache,
3739 AddressSpace *as,
3740 hwaddr addr,
3741 hwaddr len,
3742 bool is_write)
3743{
Paolo Bonzini48564042018-03-18 18:26:36 +01003744 AddressSpaceDispatch *d;
3745 hwaddr l;
3746 MemoryRegion *mr;
3747
3748 assert(len > 0);
3749
3750 l = len;
3751 cache->fv = address_space_get_flatview(as);
3752 d = flatview_to_dispatch(cache->fv);
3753 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3754
3755 mr = cache->mrs.mr;
3756 memory_region_ref(mr);
3757 if (memory_access_is_direct(mr, is_write)) {
Peter Maydell53d07902018-05-31 14:50:52 +01003758 /* We don't care about the memory attributes here as we're only
3759 * doing this if we found actual RAM, which behaves the same
3760 * regardless of attributes; so UNSPECIFIED is fine.
3761 */
Paolo Bonzini48564042018-03-18 18:26:36 +01003762 l = flatview_extend_translation(cache->fv, addr, len, mr,
Peter Maydell53d07902018-05-31 14:50:52 +01003763 cache->xlat, l, is_write,
3764 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003765 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
3766 } else {
3767 cache->ptr = NULL;
3768 }
3769
3770 cache->len = l;
3771 cache->is_write = is_write;
3772 return l;
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003773}
3774
3775void address_space_cache_invalidate(MemoryRegionCache *cache,
3776 hwaddr addr,
3777 hwaddr access_len)
3778{
Paolo Bonzini48564042018-03-18 18:26:36 +01003779 assert(cache->is_write);
3780 if (likely(cache->ptr)) {
3781 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3782 }
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003783}
3784
3785void address_space_cache_destroy(MemoryRegionCache *cache)
3786{
Paolo Bonzini48564042018-03-18 18:26:36 +01003787 if (!cache->mrs.mr) {
3788 return;
3789 }
3790
3791 if (xen_enabled()) {
3792 xen_invalidate_map_cache_entry(cache->ptr);
3793 }
3794 memory_region_unref(cache->mrs.mr);
3795 flatview_unref(cache->fv);
3796 cache->mrs.mr = NULL;
3797 cache->fv = NULL;
3798}
3799
3800/* Called from RCU critical section. This function has the same
3801 * semantics as address_space_translate, but it only works on a
3802 * predefined range of a MemoryRegion that was mapped with
3803 * address_space_cache_init.
3804 */
3805static inline MemoryRegion *address_space_translate_cached(
3806 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003807 hwaddr *plen, bool is_write, MemTxAttrs attrs)
Paolo Bonzini48564042018-03-18 18:26:36 +01003808{
3809 MemoryRegionSection section;
3810 MemoryRegion *mr;
3811 IOMMUMemoryRegion *iommu_mr;
3812 AddressSpace *target_as;
3813
3814 assert(!cache->ptr);
3815 *xlat = addr + cache->xlat;
3816
3817 mr = cache->mrs.mr;
3818 iommu_mr = memory_region_get_iommu(mr);
3819 if (!iommu_mr) {
3820 /* MMIO region. */
3821 return mr;
3822 }
3823
3824 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3825 NULL, is_write, true,
Peter Maydell2f7b0092018-05-31 14:50:53 +01003826 &target_as, attrs);
Paolo Bonzini48564042018-03-18 18:26:36 +01003827 return section.mr;
3828}
3829
3830/* Called from RCU critical section. address_space_read_cached uses this
3831 * out of line function when the target is an MMIO or IOMMU region.
3832 */
3833void
3834address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3835 void *buf, int len)
3836{
3837 hwaddr addr1, l;
3838 MemoryRegion *mr;
3839
3840 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003841 mr = address_space_translate_cached(cache, addr, &addr1, &l, false,
3842 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003843 flatview_read_continue(cache->fv,
3844 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3845 addr1, l, mr);
3846}
3847
3848/* Called from RCU critical section. address_space_write_cached uses this
3849 * out of line function when the target is an MMIO or IOMMU region.
3850 */
3851void
3852address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3853 const void *buf, int len)
3854{
3855 hwaddr addr1, l;
3856 MemoryRegion *mr;
3857
3858 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003859 mr = address_space_translate_cached(cache, addr, &addr1, &l, true,
3860 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003861 flatview_write_continue(cache->fv,
3862 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3863 addr1, l, mr);
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003864}
3865
3866#define ARG1_DECL MemoryRegionCache *cache
3867#define ARG1 cache
Paolo Bonzini48564042018-03-18 18:26:36 +01003868#define SUFFIX _cached_slow
3869#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
Paolo Bonzini48564042018-03-18 18:26:36 +01003870#define RCU_READ_LOCK() ((void)0)
3871#define RCU_READ_UNLOCK() ((void)0)
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003872#include "memory_ldst.inc.c"
3873
aliguori5e2972f2009-03-28 17:51:36 +00003874/* virtual memory access for debug (includes writing to ROM) */
Andreas Färberf17ec442013-06-29 19:40:58 +02003875int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
bellardb448f2f2004-02-25 23:24:04 +00003876 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003877{
3878 int l;
Avi Kivitya8170e52012-10-23 12:30:10 +02003879 hwaddr phys_addr;
j_mayer9b3c35e2007-04-07 11:21:28 +00003880 target_ulong page;
bellard13eb76e2004-01-24 15:23:36 +00003881
Christian Borntraeger79ca7a12017-03-07 15:19:08 +01003882 cpu_synchronize_state(cpu);
bellard13eb76e2004-01-24 15:23:36 +00003883 while (len > 0) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003884 int asidx;
3885 MemTxAttrs attrs;
3886
bellard13eb76e2004-01-24 15:23:36 +00003887 page = addr & TARGET_PAGE_MASK;
Peter Maydell5232e4c2016-01-21 14:15:06 +00003888 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3889 asidx = cpu_asidx_from_attrs(cpu, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003890 /* if no physical page mapped, return an error */
3891 if (phys_addr == -1)
3892 return -1;
3893 l = (page + TARGET_PAGE_SIZE) - addr;
3894 if (l > len)
3895 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00003896 phys_addr += (addr & ~TARGET_PAGE_MASK);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003897 if (is_write) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003898 cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
3899 phys_addr, buf, l);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003900 } else {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003901 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
3902 MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003903 buf, l, 0);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003904 }
bellard13eb76e2004-01-24 15:23:36 +00003905 len -= l;
3906 buf += l;
3907 addr += l;
3908 }
3909 return 0;
3910}
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003911
3912/*
3913 * Allows code that needs to deal with migration bitmaps etc to still be built
3914 * target independent.
3915 */
Juan Quintela20afaed2017-03-21 09:09:14 +01003916size_t qemu_target_page_size(void)
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003917{
Juan Quintela20afaed2017-03-21 09:09:14 +01003918 return TARGET_PAGE_SIZE;
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003919}
3920
Juan Quintela46d702b2017-04-24 21:03:48 +02003921int qemu_target_page_bits(void)
3922{
3923 return TARGET_PAGE_BITS;
3924}
3925
3926int qemu_target_page_bits_min(void)
3927{
3928 return TARGET_PAGE_BITS_MIN;
3929}
Paul Brooka68fe892010-03-01 00:08:59 +00003930#endif
bellard13eb76e2004-01-24 15:23:36 +00003931
Blue Swirl8e4a4242013-01-06 18:30:17 +00003932/*
3933 * A helper function for the _utterly broken_ virtio device model to find out if
3934 * it's running on a big endian machine. Don't do this at home kids!
3935 */
Greg Kurz98ed8ec2014-06-24 19:26:29 +02003936bool target_words_bigendian(void);
3937bool target_words_bigendian(void)
Blue Swirl8e4a4242013-01-06 18:30:17 +00003938{
3939#if defined(TARGET_WORDS_BIGENDIAN)
3940 return true;
3941#else
3942 return false;
3943#endif
3944}
3945
Wen Congyang76f35532012-05-07 12:04:18 +08003946#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02003947bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08003948{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003949 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003950 hwaddr l = 1;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003951 bool res;
Wen Congyang76f35532012-05-07 12:04:18 +08003952
Paolo Bonzini41063e12015-03-18 14:21:43 +01003953 rcu_read_lock();
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003954 mr = address_space_translate(&address_space_memory,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003955 phys_addr, &phys_addr, &l, false,
3956 MEMTXATTRS_UNSPECIFIED);
Wen Congyang76f35532012-05-07 12:04:18 +08003957
Paolo Bonzini41063e12015-03-18 14:21:43 +01003958 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3959 rcu_read_unlock();
3960 return res;
Wen Congyang76f35532012-05-07 12:04:18 +08003961}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003962
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003963int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003964{
3965 RAMBlock *block;
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003966 int ret = 0;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003967
Mike Day0dc3f442013-09-05 14:41:35 -04003968 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08003969 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003970 ret = func(block->idstr, block->host, block->offset,
3971 block->used_length, opaque);
3972 if (ret) {
3973 break;
3974 }
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003975 }
Mike Day0dc3f442013-09-05 14:41:35 -04003976 rcu_read_unlock();
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003977 return ret;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003978}
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003979
Cédric Le Goaterb895de52018-05-14 08:57:00 +02003980int qemu_ram_foreach_migratable_block(RAMBlockIterFunc func, void *opaque)
3981{
3982 RAMBlock *block;
3983 int ret = 0;
3984
3985 rcu_read_lock();
3986 RAMBLOCK_FOREACH(block) {
3987 if (!qemu_ram_is_migratable(block)) {
3988 continue;
3989 }
3990 ret = func(block->idstr, block->host, block->offset,
3991 block->used_length, opaque);
3992 if (ret) {
3993 break;
3994 }
3995 }
3996 rcu_read_unlock();
3997 return ret;
3998}
3999
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004000/*
4001 * Unmap pages of memory from start to start+length such that
4002 * they a) read as 0, b) Trigger whatever fault mechanism
4003 * the OS provides for postcopy.
4004 * The pages must be unmapped by the end of the function.
4005 * Returns: 0 on success, none-0 on failure
4006 *
4007 */
4008int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
4009{
4010 int ret = -1;
4011
4012 uint8_t *host_startaddr = rb->host + start;
4013
4014 if ((uintptr_t)host_startaddr & (rb->page_size - 1)) {
4015 error_report("ram_block_discard_range: Unaligned start address: %p",
4016 host_startaddr);
4017 goto err;
4018 }
4019
4020 if ((start + length) <= rb->used_length) {
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004021 bool need_madvise, need_fallocate;
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004022 uint8_t *host_endaddr = host_startaddr + length;
4023 if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
4024 error_report("ram_block_discard_range: Unaligned end address: %p",
4025 host_endaddr);
4026 goto err;
4027 }
4028
4029 errno = ENOTSUP; /* If we are missing MADVISE etc */
4030
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004031 /* The logic here is messy;
4032 * madvise DONTNEED fails for hugepages
4033 * fallocate works on hugepages and shmem
4034 */
4035 need_madvise = (rb->page_size == qemu_host_page_size);
4036 need_fallocate = rb->fd != -1;
4037 if (need_fallocate) {
4038 /* For a file, this causes the area of the file to be zero'd
4039 * if read, and for hugetlbfs also causes it to be unmapped
4040 * so a userfault will trigger.
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +00004041 */
4042#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
4043 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
4044 start, length);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004045 if (ret) {
4046 ret = -errno;
4047 error_report("ram_block_discard_range: Failed to fallocate "
4048 "%s:%" PRIx64 " +%zx (%d)",
4049 rb->idstr, start, length, ret);
4050 goto err;
4051 }
4052#else
4053 ret = -ENOSYS;
4054 error_report("ram_block_discard_range: fallocate not available/file"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004055 "%s:%" PRIx64 " +%zx (%d)",
4056 rb->idstr, start, length, ret);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004057 goto err;
4058#endif
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004059 }
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004060 if (need_madvise) {
4061 /* For normal RAM this causes it to be unmapped,
4062 * for shared memory it causes the local mapping to disappear
4063 * and to fall back on the file contents (which we just
4064 * fallocate'd away).
4065 */
4066#if defined(CONFIG_MADVISE)
4067 ret = madvise(host_startaddr, length, MADV_DONTNEED);
4068 if (ret) {
4069 ret = -errno;
4070 error_report("ram_block_discard_range: Failed to discard range "
4071 "%s:%" PRIx64 " +%zx (%d)",
4072 rb->idstr, start, length, ret);
4073 goto err;
4074 }
4075#else
4076 ret = -ENOSYS;
4077 error_report("ram_block_discard_range: MADVISE not available"
4078 "%s:%" PRIx64 " +%zx (%d)",
4079 rb->idstr, start, length, ret);
4080 goto err;
4081#endif
4082 }
4083 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
4084 need_madvise, need_fallocate, ret);
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004085 } else {
4086 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
4087 "/%zx/" RAM_ADDR_FMT")",
4088 rb->idstr, start, length, rb->used_length);
4089 }
4090
4091err:
4092 return ret;
4093}
4094
Peter Maydellec3f8c92013-06-27 20:53:38 +01004095#endif
Yang Zhonga0be0c52017-07-03 18:12:13 +08004096
4097void page_size_init(void)
4098{
4099 /* NOTE: we can always suppose that qemu_host_page_size >=
4100 TARGET_PAGE_SIZE */
Yang Zhonga0be0c52017-07-03 18:12:13 +08004101 if (qemu_host_page_size == 0) {
4102 qemu_host_page_size = qemu_real_host_page_size;
4103 }
4104 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
4105 qemu_host_page_size = TARGET_PAGE_SIZE;
4106 }
4107 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
4108}
Alexey Kardashevskiy5e8fd942017-09-21 18:51:06 +10004109
4110#if !defined(CONFIG_USER_ONLY)
4111
4112static void mtree_print_phys_entries(fprintf_function mon, void *f,
4113 int start, int end, int skip, int ptr)
4114{
4115 if (start == end - 1) {
4116 mon(f, "\t%3d ", start);
4117 } else {
4118 mon(f, "\t%3d..%-3d ", start, end - 1);
4119 }
4120 mon(f, " skip=%d ", skip);
4121 if (ptr == PHYS_MAP_NODE_NIL) {
4122 mon(f, " ptr=NIL");
4123 } else if (!skip) {
4124 mon(f, " ptr=#%d", ptr);
4125 } else {
4126 mon(f, " ptr=[%d]", ptr);
4127 }
4128 mon(f, "\n");
4129}
4130
4131#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4132 int128_sub((size), int128_one())) : 0)
4133
4134void mtree_print_dispatch(fprintf_function mon, void *f,
4135 AddressSpaceDispatch *d, MemoryRegion *root)
4136{
4137 int i;
4138
4139 mon(f, " Dispatch\n");
4140 mon(f, " Physical sections\n");
4141
4142 for (i = 0; i < d->map.sections_nb; ++i) {
4143 MemoryRegionSection *s = d->map.sections + i;
4144 const char *names[] = { " [unassigned]", " [not dirty]",
4145 " [ROM]", " [watch]" };
4146
4147 mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s",
4148 i,
4149 s->offset_within_address_space,
4150 s->offset_within_address_space + MR_SIZE(s->mr->size),
4151 s->mr->name ? s->mr->name : "(noname)",
4152 i < ARRAY_SIZE(names) ? names[i] : "",
4153 s->mr == root ? " [ROOT]" : "",
4154 s == d->mru_section ? " [MRU]" : "",
4155 s->mr->is_iommu ? " [iommu]" : "");
4156
4157 if (s->mr->alias) {
4158 mon(f, " alias=%s", s->mr->alias->name ?
4159 s->mr->alias->name : "noname");
4160 }
4161 mon(f, "\n");
4162 }
4163
4164 mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4165 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
4166 for (i = 0; i < d->map.nodes_nb; ++i) {
4167 int j, jprev;
4168 PhysPageEntry prev;
4169 Node *n = d->map.nodes + i;
4170
4171 mon(f, " [%d]\n", i);
4172
4173 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
4174 PhysPageEntry *pe = *n + j;
4175
4176 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
4177 continue;
4178 }
4179
4180 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4181
4182 jprev = j;
4183 prev = *pe;
4184 }
4185
4186 if (jprev != ARRAY_SIZE(*n)) {
4187 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4188 }
4189 }
4190}
4191
4192#endif