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bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
Peter Maydell7b31bbc2016-01-26 18:16:56 +000019#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010020#include "qapi/error.h"
bellard54936002003-05-13 00:25:15 +000021
Veronia Bahaaf348b6d2016-03-20 19:16:19 +020022#include "qemu/cutils.h"
bellard6180a182003-09-30 21:04:53 +000023#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010024#include "exec/exec-all.h"
Juan Quintela51180422017-04-24 20:50:19 +020025#include "exec/target_page.h"
bellardb67d9a52008-05-23 09:57:34 +000026#include "tcg.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020027#include "hw/qdev-core.h"
Fam Zhengc7e002c2017-07-14 10:15:08 +080028#include "hw/qdev-properties.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010029#if !defined(CONFIG_USER_ONLY)
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +020030#include "hw/boards.h"
Paolo Bonzini33c11872016-03-15 16:58:45 +010031#include "hw/xen/xen.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010032#endif
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Markus Armbruster2ff3de62013-07-04 15:09:22 +020034#include "sysemu/sysemu.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/timer.h"
36#include "qemu/config-file.h"
Andreas Färber75a34032013-09-02 16:57:02 +020037#include "qemu/error-report.h"
pbrook53a59602006-03-25 19:31:22 +000038#if defined(CONFIG_USER_ONLY)
Markus Armbrustera9c94272016-06-22 19:11:19 +020039#include "qemu.h"
Jun Nakajima432d2682010-08-31 16:41:25 +010040#else /* !CONFIG_USER_ONLY */
Paolo Bonzini741da0d2014-06-27 08:40:04 +020041#include "hw/hw.h"
42#include "exec/memory.h"
Paolo Bonzinidf43d492016-03-16 10:24:54 +010043#include "exec/ioport.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020044#include "sysemu/dma.h"
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +110045#include "sysemu/numa.h"
Christian Borntraeger79ca7a12017-03-07 15:19:08 +010046#include "sysemu/hw_accel.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020047#include "exec/address-spaces.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010048#include "sysemu/xen-mapcache.h"
Daniel P. Berrange0ab8ed12017-01-25 16:14:15 +000049#include "trace-root.h"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +000050
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000051#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000052#include <linux/falloc.h>
53#endif
54
pbrook53a59602006-03-25 19:31:22 +000055#endif
Mike Day0dc3f442013-09-05 14:41:35 -040056#include "qemu/rcu_queue.h"
Jan Kiszka4840f102015-06-18 18:47:22 +020057#include "qemu/main-loop.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000058#include "translate-all.h"
Pavel Dovgalyuk76159362015-09-17 19:25:07 +030059#include "sysemu/replay.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000060
Paolo Bonzini022c62c2012-12-17 18:19:49 +010061#include "exec/memory-internal.h"
Juan Quintela220c3eb2013-10-14 17:13:59 +020062#include "exec/ram_addr.h"
Paolo Bonzini508127e2016-01-07 16:55:28 +030063#include "exec/log.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020064
Bharata B Rao9dfeca72016-05-12 09:18:12 +053065#include "migration/vmstate.h"
66
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020067#include "qemu/range.h"
Michael S. Tsirkin794e8f32015-09-24 14:41:17 +030068#ifndef _WIN32
69#include "qemu/mmap-alloc.h"
70#endif
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020071
Peter Xube9b23c2017-05-12 12:17:41 +080072#include "monitor/monitor.h"
73
blueswir1db7b5422007-05-26 17:36:03 +000074//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000075
pbrook99773bd2006-04-16 15:14:59 +000076#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -040077/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
78 * are protected by the ramlist lock.
79 */
Mike Day0d53d9f2015-01-21 13:45:24 +010080RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030081
82static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030083static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030084
Avi Kivityf6790af2012-10-02 20:13:51 +020085AddressSpace address_space_io;
86AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020087
Paolo Bonzini0844e002013-05-24 14:37:28 +020088MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020089static MemoryRegion io_mem_unassigned;
Avi Kivity0e0df1e2012-01-02 00:32:15 +020090
Paolo Bonzini7bd4f432014-05-14 17:43:22 +080091/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
92#define RAM_PREALLOC (1 << 0)
93
Paolo Bonzinidbcb8982014-06-10 19:15:24 +080094/* RAM is mmap-ed with MAP_SHARED */
95#define RAM_SHARED (1 << 1)
96
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +020097/* Only a portion of RAM (used_length) is actually used, and migrated.
98 * This used_length size can change across reboots.
99 */
100#define RAM_RESIZEABLE (1 << 2)
101
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +0000102/* UFFDIO_ZEROPAGE is available on this RAMBlock to atomically
103 * zero the page and wake waiting processes.
104 * (Set during postcopy)
105 */
106#define RAM_UF_ZEROPAGE (1 << 3)
Cédric Le Goaterb895de52018-05-14 08:57:00 +0200107
108/* RAM can be migrated */
109#define RAM_MIGRATABLE (1 << 4)
pbrooke2eef172008-06-08 01:09:01 +0000110#endif
bellard9fa3e852004-01-04 18:06:42 +0000111
Peter Maydell20bccb82016-10-24 16:26:49 +0100112#ifdef TARGET_PAGE_BITS_VARY
113int target_page_bits;
114bool target_page_bits_decided;
115#endif
116
Andreas Färberbdc44642013-06-24 23:50:24 +0200117struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
bellard6a00d602005-11-21 23:25:50 +0000118/* current CPU in the current thread. It is only valid inside
119 cpu_exec() */
Paolo Bonzinif240eb62015-08-26 00:17:58 +0200120__thread CPUState *current_cpu;
pbrook2e70f6e2008-06-29 01:03:05 +0000121/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +0000122 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +0000123 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +0100124int use_icount;
bellard6a00d602005-11-21 23:25:50 +0000125
Yang Zhonga0be0c52017-07-03 18:12:13 +0800126uintptr_t qemu_host_page_size;
127intptr_t qemu_host_page_mask;
Yang Zhonga0be0c52017-07-03 18:12:13 +0800128
Peter Maydell20bccb82016-10-24 16:26:49 +0100129bool set_preferred_target_page_bits(int bits)
130{
131 /* The target page size is the lowest common denominator for all
132 * the CPUs in the system, so we can only make it smaller, never
133 * larger. And we can't make it smaller once we've committed to
134 * a particular size.
135 */
136#ifdef TARGET_PAGE_BITS_VARY
137 assert(bits >= TARGET_PAGE_BITS_MIN);
138 if (target_page_bits == 0 || target_page_bits > bits) {
139 if (target_page_bits_decided) {
140 return false;
141 }
142 target_page_bits = bits;
143 }
144#endif
145 return true;
146}
147
pbrooke2eef172008-06-08 01:09:01 +0000148#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +0200149
Peter Maydell20bccb82016-10-24 16:26:49 +0100150static void finalize_target_page_bits(void)
151{
152#ifdef TARGET_PAGE_BITS_VARY
153 if (target_page_bits == 0) {
154 target_page_bits = TARGET_PAGE_BITS_MIN;
155 }
156 target_page_bits_decided = true;
157#endif
158}
159
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200160typedef struct PhysPageEntry PhysPageEntry;
161
162struct PhysPageEntry {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200163 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200164 uint32_t skip : 6;
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200165 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200166 uint32_t ptr : 26;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200167};
168
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200169#define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
170
Paolo Bonzini03f49952013-11-07 17:14:36 +0100171/* Size of the L2 (and L3, etc) page tables. */
Paolo Bonzini57271d62013-11-07 17:14:37 +0100172#define ADDR_SPACE_BITS 64
Paolo Bonzini03f49952013-11-07 17:14:36 +0100173
Michael S. Tsirkin026736c2013-11-13 20:13:03 +0200174#define P_L2_BITS 9
Paolo Bonzini03f49952013-11-07 17:14:36 +0100175#define P_L2_SIZE (1 << P_L2_BITS)
176
177#define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
178
179typedef PhysPageEntry Node[P_L2_SIZE];
Paolo Bonzini0475d942013-05-29 12:28:21 +0200180
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200181typedef struct PhysPageMap {
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100182 struct rcu_head rcu;
183
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200184 unsigned sections_nb;
185 unsigned sections_nb_alloc;
186 unsigned nodes_nb;
187 unsigned nodes_nb_alloc;
188 Node *nodes;
189 MemoryRegionSection *sections;
190} PhysPageMap;
191
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200192struct AddressSpaceDispatch {
Fam Zheng729633c2016-03-01 14:18:24 +0800193 MemoryRegionSection *mru_section;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200194 /* This is a multi-level map on the physical address space.
195 * The bottom level has pointers to MemoryRegionSections.
196 */
197 PhysPageEntry phys_map;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200198 PhysPageMap map;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200199};
200
Jan Kiszka90260c62013-05-26 21:46:51 +0200201#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
202typedef struct subpage_t {
203 MemoryRegion iomem;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000204 FlatView *fv;
Jan Kiszka90260c62013-05-26 21:46:51 +0200205 hwaddr base;
Vijaya Kumar K2615fab2016-10-24 16:26:49 +0100206 uint16_t sub_section[];
Jan Kiszka90260c62013-05-26 21:46:51 +0200207} subpage_t;
208
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200209#define PHYS_SECTION_UNASSIGNED 0
210#define PHYS_SECTION_NOTDIRTY 1
211#define PHYS_SECTION_ROM 2
212#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200213
pbrooke2eef172008-06-08 01:09:01 +0000214static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300215static void memory_map_init(void);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000216static void tcg_commit(MemoryListener *listener);
pbrooke2eef172008-06-08 01:09:01 +0000217
Avi Kivity1ec9b902012-01-02 12:47:48 +0200218static MemoryRegion io_mem_watch;
Peter Maydell32857f42015-10-01 15:29:50 +0100219
220/**
221 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
222 * @cpu: the CPU whose AddressSpace this is
223 * @as: the AddressSpace itself
224 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
225 * @tcg_as_listener: listener for tracking changes to the AddressSpace
226 */
227struct CPUAddressSpace {
228 CPUState *cpu;
229 AddressSpace *as;
230 struct AddressSpaceDispatch *memory_dispatch;
231 MemoryListener tcg_as_listener;
232};
233
Gerd Hoffmann8deaf122017-04-21 11:16:25 +0200234struct DirtyBitmapSnapshot {
235 ram_addr_t start;
236 ram_addr_t end;
237 unsigned long dirty[];
238};
239
pbrook6658ffb2007-03-16 23:58:11 +0000240#endif
bellard54936002003-05-13 00:25:15 +0000241
Paul Brook6d9a1302010-02-28 23:55:53 +0000242#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200243
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200244static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200245{
Peter Lieven101420b2016-07-15 12:03:50 +0200246 static unsigned alloc_hint = 16;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200247 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
Peter Lieven101420b2016-07-15 12:03:50 +0200248 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200249 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
250 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
Peter Lieven101420b2016-07-15 12:03:50 +0200251 alloc_hint = map->nodes_nb_alloc;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200252 }
253}
254
Paolo Bonzinidb946042015-05-21 15:12:29 +0200255static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200256{
257 unsigned i;
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200258 uint32_t ret;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200259 PhysPageEntry e;
260 PhysPageEntry *p;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200261
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200262 ret = map->nodes_nb++;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200263 p = map->nodes[ret];
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200264 assert(ret != PHYS_MAP_NODE_NIL);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200265 assert(ret != map->nodes_nb_alloc);
Paolo Bonzinidb946042015-05-21 15:12:29 +0200266
267 e.skip = leaf ? 0 : 1;
268 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100269 for (i = 0; i < P_L2_SIZE; ++i) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200270 memcpy(&p[i], &e, sizeof(e));
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200271 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200272 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200273}
274
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200275static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
276 hwaddr *index, hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200277 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200278{
279 PhysPageEntry *p;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100280 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200281
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200282 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200283 lp->ptr = phys_map_node_alloc(map, level == 0);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200284 }
Paolo Bonzinidb946042015-05-21 15:12:29 +0200285 p = map->nodes[lp->ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100286 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200287
Paolo Bonzini03f49952013-11-07 17:14:36 +0100288 while (*nb && lp < &p[P_L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200289 if ((*index & (step - 1)) == 0 && *nb >= step) {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200290 lp->skip = 0;
Avi Kivityc19e8802012-02-13 20:25:31 +0200291 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200292 *index += step;
293 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200294 } else {
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200295 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
Avi Kivity29990972012-02-13 20:21:20 +0200296 }
297 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200298 }
299}
300
Avi Kivityac1970f2012-10-03 16:22:53 +0200301static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200302 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200303 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000304{
Avi Kivity29990972012-02-13 20:21:20 +0200305 /* Wildly overreserve - it doesn't matter much. */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200306 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000307
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200308 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000309}
310
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200311/* Compact a non leaf page entry. Simply detect that the entry has a single child,
312 * and update our entry so we can skip it and go directly to the destination.
313 */
Marc-André Lureauefee6782016-09-28 16:37:20 +0400314static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200315{
316 unsigned valid_ptr = P_L2_SIZE;
317 int valid = 0;
318 PhysPageEntry *p;
319 int i;
320
321 if (lp->ptr == PHYS_MAP_NODE_NIL) {
322 return;
323 }
324
325 p = nodes[lp->ptr];
326 for (i = 0; i < P_L2_SIZE; i++) {
327 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
328 continue;
329 }
330
331 valid_ptr = i;
332 valid++;
333 if (p[i].skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400334 phys_page_compact(&p[i], nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200335 }
336 }
337
338 /* We can only compress if there's only one child. */
339 if (valid != 1) {
340 return;
341 }
342
343 assert(valid_ptr < P_L2_SIZE);
344
345 /* Don't compress if it won't fit in the # of bits we have. */
346 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
347 return;
348 }
349
350 lp->ptr = p[valid_ptr].ptr;
351 if (!p[valid_ptr].skip) {
352 /* If our only child is a leaf, make this a leaf. */
353 /* By design, we should have made this node a leaf to begin with so we
354 * should never reach here.
355 * But since it's so simple to handle this, let's do it just in case we
356 * change this rule.
357 */
358 lp->skip = 0;
359 } else {
360 lp->skip += p[valid_ptr].skip;
361 }
362}
363
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +1000364void address_space_dispatch_compact(AddressSpaceDispatch *d)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200365{
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200366 if (d->phys_map.skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400367 phys_page_compact(&d->phys_map, d->map.nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200368 }
369}
370
Fam Zheng29cb5332016-03-01 14:18:23 +0800371static inline bool section_covers_addr(const MemoryRegionSection *section,
372 hwaddr addr)
373{
374 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
375 * the section must cover the entire address space.
376 */
Richard Henderson258dfaa2016-06-29 15:48:03 -0700377 return int128_gethi(section->size) ||
Fam Zheng29cb5332016-03-01 14:18:23 +0800378 range_covers_byte(section->offset_within_address_space,
Richard Henderson258dfaa2016-06-29 15:48:03 -0700379 int128_getlo(section->size), addr);
Fam Zheng29cb5332016-03-01 14:18:23 +0800380}
381
Peter Xu003a0cf2017-05-15 16:50:57 +0800382static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
bellard92e873b2004-05-21 14:52:29 +0000383{
Peter Xu003a0cf2017-05-15 16:50:57 +0800384 PhysPageEntry lp = d->phys_map, *p;
385 Node *nodes = d->map.nodes;
386 MemoryRegionSection *sections = d->map.sections;
Michael S. Tsirkin97115a82013-11-13 20:08:19 +0200387 hwaddr index = addr >> TARGET_PAGE_BITS;
Avi Kivity31ab2b42012-02-13 16:44:19 +0200388 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200389
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200390 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200391 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200392 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200393 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200394 p = nodes[lp.ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100395 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200396 }
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200397
Fam Zheng29cb5332016-03-01 14:18:23 +0800398 if (section_covers_addr(&sections[lp.ptr], addr)) {
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200399 return &sections[lp.ptr];
400 } else {
401 return &sections[PHYS_SECTION_UNASSIGNED];
402 }
Avi Kivityf3705d52012-03-08 16:16:34 +0200403}
404
Blue Swirle5548612012-04-21 13:08:33 +0000405bool memory_region_is_unassigned(MemoryRegion *mr)
406{
Paolo Bonzini2a8e7492013-05-24 14:34:08 +0200407 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
Blue Swirle5548612012-04-21 13:08:33 +0000408 && mr != &io_mem_watch;
409}
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200410
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100411/* Called from RCU critical section */
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200412static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
Jan Kiszka90260c62013-05-26 21:46:51 +0200413 hwaddr addr,
414 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200415{
Fam Zheng729633c2016-03-01 14:18:24 +0800416 MemoryRegionSection *section = atomic_read(&d->mru_section);
Jan Kiszka90260c62013-05-26 21:46:51 +0200417 subpage_t *subpage;
418
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100419 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
420 !section_covers_addr(section, addr)) {
Peter Xu003a0cf2017-05-15 16:50:57 +0800421 section = phys_page_find(d, addr);
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100422 atomic_set(&d->mru_section, section);
Fam Zheng729633c2016-03-01 14:18:24 +0800423 }
Jan Kiszka90260c62013-05-26 21:46:51 +0200424 if (resolve_subpage && section->mr->subpage) {
425 subpage = container_of(section->mr, subpage_t, iomem);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200426 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200427 }
428 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200429}
430
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100431/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200432static MemoryRegionSection *
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200433address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
Jan Kiszka90260c62013-05-26 21:46:51 +0200434 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200435{
436 MemoryRegionSection *section;
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200437 MemoryRegion *mr;
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100438 Int128 diff;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200439
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200440 section = address_space_lookup_region(d, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200441 /* Compute offset within MemoryRegionSection */
442 addr -= section->offset_within_address_space;
443
444 /* Compute offset within MemoryRegion */
445 *xlat = addr + section->offset_within_region;
446
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200447 mr = section->mr;
Paolo Bonzinib242e0e2015-07-04 00:24:51 +0200448
449 /* MMIO registers can be expected to perform full-width accesses based only
450 * on their address, without considering adjacent registers that could
451 * decode to completely different MemoryRegions. When such registers
452 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
453 * regions overlap wildly. For this reason we cannot clamp the accesses
454 * here.
455 *
456 * If the length is small (as is the case for address_space_ldl/stl),
457 * everything works fine. If the incoming length is large, however,
458 * the caller really has to do the clamping through memory_access_size.
459 */
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200460 if (memory_region_is_ram(mr)) {
Paolo Bonzinie4a511f2015-06-17 10:36:54 +0200461 diff = int128_sub(section->size, int128_make64(addr));
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200462 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
463 }
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200464 return section;
465}
Jan Kiszka90260c62013-05-26 21:46:51 +0200466
Peter Xud5e5faf2017-10-10 11:42:45 +0200467/**
Paolo Bonzinia411c842018-03-03 17:24:04 +0100468 * address_space_translate_iommu - translate an address through an IOMMU
469 * memory region and then through the target address space.
470 *
471 * @iommu_mr: the IOMMU memory region that we start the translation from
472 * @addr: the address to be translated through the MMU
473 * @xlat: the translated address offset within the destination memory region.
474 * It cannot be %NULL.
475 * @plen_out: valid read/write length of the translated address. It
476 * cannot be %NULL.
477 * @page_mask_out: page mask for the translated address. This
478 * should only be meaningful for IOMMU translated
479 * addresses, since there may be huge pages that this bit
480 * would tell. It can be %NULL if we don't care about it.
481 * @is_write: whether the translation operation is for write
482 * @is_mmio: whether this can be MMIO, set true if it can
483 * @target_as: the address space targeted by the IOMMU
Peter Maydell2f7b0092018-05-31 14:50:53 +0100484 * @attrs: transaction attributes
Paolo Bonzinia411c842018-03-03 17:24:04 +0100485 *
486 * This function is called from RCU critical section. It is the common
487 * part of flatview_do_translate and address_space_translate_cached.
488 */
489static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
490 hwaddr *xlat,
491 hwaddr *plen_out,
492 hwaddr *page_mask_out,
493 bool is_write,
494 bool is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100495 AddressSpace **target_as,
496 MemTxAttrs attrs)
Paolo Bonzinia411c842018-03-03 17:24:04 +0100497{
498 MemoryRegionSection *section;
499 hwaddr page_mask = (hwaddr)-1;
500
501 do {
502 hwaddr addr = *xlat;
503 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
Peter Maydell2c91bcf2018-06-15 14:57:16 +0100504 int iommu_idx = 0;
505 IOMMUTLBEntry iotlb;
506
507 if (imrc->attrs_to_index) {
508 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
509 }
510
511 iotlb = imrc->translate(iommu_mr, addr, is_write ?
512 IOMMU_WO : IOMMU_RO, iommu_idx);
Paolo Bonzinia411c842018-03-03 17:24:04 +0100513
514 if (!(iotlb.perm & (1 << is_write))) {
515 goto unassigned;
516 }
517
518 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
519 | (addr & iotlb.addr_mask));
520 page_mask &= iotlb.addr_mask;
521 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
522 *target_as = iotlb.target_as;
523
524 section = address_space_translate_internal(
525 address_space_to_dispatch(iotlb.target_as), addr, xlat,
526 plen_out, is_mmio);
527
528 iommu_mr = memory_region_get_iommu(section->mr);
529 } while (unlikely(iommu_mr));
530
531 if (page_mask_out) {
532 *page_mask_out = page_mask;
533 }
534 return *section;
535
536unassigned:
537 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
538}
539
540/**
Peter Xud5e5faf2017-10-10 11:42:45 +0200541 * flatview_do_translate - translate an address in FlatView
542 *
543 * @fv: the flat view that we want to translate on
544 * @addr: the address to be translated in above address space
545 * @xlat: the translated address offset within memory region. It
546 * cannot be @NULL.
547 * @plen_out: valid read/write length of the translated address. It
548 * can be @NULL when we don't care about it.
549 * @page_mask_out: page mask for the translated address. This
550 * should only be meaningful for IOMMU translated
551 * addresses, since there may be huge pages that this bit
552 * would tell. It can be @NULL if we don't care about it.
553 * @is_write: whether the translation operation is for write
554 * @is_mmio: whether this can be MMIO, set true if it can
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200555 * @target_as: the address space targeted by the IOMMU
Peter Maydell49e14aa2018-05-31 14:50:53 +0100556 * @attrs: memory transaction attributes
Peter Xud5e5faf2017-10-10 11:42:45 +0200557 *
558 * This function is called from RCU critical section
559 */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000560static MemoryRegionSection flatview_do_translate(FlatView *fv,
561 hwaddr addr,
562 hwaddr *xlat,
Peter Xud5e5faf2017-10-10 11:42:45 +0200563 hwaddr *plen_out,
564 hwaddr *page_mask_out,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000565 bool is_write,
566 bool is_mmio,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100567 AddressSpace **target_as,
568 MemTxAttrs attrs)
Jan Kiszka90260c62013-05-26 21:46:51 +0200569{
Avi Kivity30951152012-10-30 13:47:46 +0200570 MemoryRegionSection *section;
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000571 IOMMUMemoryRegion *iommu_mr;
Peter Xud5e5faf2017-10-10 11:42:45 +0200572 hwaddr plen = (hwaddr)(-1);
573
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200574 if (!plen_out) {
575 plen_out = &plen;
Peter Xud5e5faf2017-10-10 11:42:45 +0200576 }
Avi Kivity30951152012-10-30 13:47:46 +0200577
Paolo Bonzinia411c842018-03-03 17:24:04 +0100578 section = address_space_translate_internal(
579 flatview_to_dispatch(fv), addr, xlat,
580 plen_out, is_mmio);
Avi Kivity30951152012-10-30 13:47:46 +0200581
Paolo Bonzinia411c842018-03-03 17:24:04 +0100582 iommu_mr = memory_region_get_iommu(section->mr);
583 if (unlikely(iommu_mr)) {
584 return address_space_translate_iommu(iommu_mr, xlat,
585 plen_out, page_mask_out,
586 is_write, is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100587 target_as, attrs);
Avi Kivity30951152012-10-30 13:47:46 +0200588 }
Peter Xud5e5faf2017-10-10 11:42:45 +0200589 if (page_mask_out) {
Paolo Bonzinia411c842018-03-03 17:24:04 +0100590 /* Not behind an IOMMU, use default page size. */
591 *page_mask_out = ~TARGET_PAGE_MASK;
Peter Xud5e5faf2017-10-10 11:42:45 +0200592 }
593
Peter Xua7640402017-05-17 16:57:42 +0800594 return *section;
Peter Xua7640402017-05-17 16:57:42 +0800595}
596
597/* Called from RCU critical section */
598IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
Peter Maydell7446eb02018-05-31 14:50:53 +0100599 bool is_write, MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800600{
601 MemoryRegionSection section;
Peter Xu076a93d2017-10-10 11:42:46 +0200602 hwaddr xlat, page_mask;
Peter Xua7640402017-05-17 16:57:42 +0800603
Peter Xu076a93d2017-10-10 11:42:46 +0200604 /*
605 * This can never be MMIO, and we don't really care about plen,
606 * but page mask.
607 */
608 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100609 NULL, &page_mask, is_write, false, &as,
610 attrs);
Peter Xua7640402017-05-17 16:57:42 +0800611
612 /* Illegal translation */
613 if (section.mr == &io_mem_unassigned) {
614 goto iotlb_fail;
615 }
616
617 /* Convert memory region offset into address space offset */
618 xlat += section.offset_within_address_space -
619 section.offset_within_region;
620
Peter Xua7640402017-05-17 16:57:42 +0800621 return (IOMMUTLBEntry) {
Alexey Kardashevskiye76bb182017-09-21 18:50:53 +1000622 .target_as = as,
Peter Xu076a93d2017-10-10 11:42:46 +0200623 .iova = addr & ~page_mask,
624 .translated_addr = xlat & ~page_mask,
625 .addr_mask = page_mask,
Peter Xua7640402017-05-17 16:57:42 +0800626 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
627 .perm = IOMMU_RW,
628 };
629
630iotlb_fail:
631 return (IOMMUTLBEntry) {0};
632}
633
634/* Called from RCU critical section */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000635MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +0100636 hwaddr *plen, bool is_write,
637 MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800638{
639 MemoryRegion *mr;
640 MemoryRegionSection section;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000641 AddressSpace *as = NULL;
Peter Xua7640402017-05-17 16:57:42 +0800642
643 /* This can be MMIO, so setup MMIO bit. */
Peter Xud5e5faf2017-10-10 11:42:45 +0200644 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100645 is_write, true, &as, attrs);
Peter Xua7640402017-05-17 16:57:42 +0800646 mr = section.mr;
647
Alexey Kardashevskiyfe680d02014-05-07 13:40:39 +0000648 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100649 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
Peter Crosthwaite23820db2015-03-16 22:35:54 -0700650 *plen = MIN(page, *plen);
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100651 }
652
Avi Kivity30951152012-10-30 13:47:46 +0200653 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200654}
655
Peter Maydell1f871c52018-06-15 14:57:16 +0100656typedef struct TCGIOMMUNotifier {
657 IOMMUNotifier n;
658 MemoryRegion *mr;
659 CPUState *cpu;
660 int iommu_idx;
661 bool active;
662} TCGIOMMUNotifier;
663
664static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
665{
666 TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
667
668 if (!notifier->active) {
669 return;
670 }
671 tlb_flush(notifier->cpu);
672 notifier->active = false;
673 /* We leave the notifier struct on the list to avoid reallocating it later.
674 * Generally the number of IOMMUs a CPU deals with will be small.
675 * In any case we can't unregister the iommu notifier from a notify
676 * callback.
677 */
678}
679
680static void tcg_register_iommu_notifier(CPUState *cpu,
681 IOMMUMemoryRegion *iommu_mr,
682 int iommu_idx)
683{
684 /* Make sure this CPU has an IOMMU notifier registered for this
685 * IOMMU/IOMMU index combination, so that we can flush its TLB
686 * when the IOMMU tells us the mappings we've cached have changed.
687 */
688 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
689 TCGIOMMUNotifier *notifier;
690 int i;
691
692 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
693 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
694 if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) {
695 break;
696 }
697 }
698 if (i == cpu->iommu_notifiers->len) {
699 /* Not found, add a new entry at the end of the array */
700 cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1);
701 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
702
703 notifier->mr = mr;
704 notifier->iommu_idx = iommu_idx;
705 notifier->cpu = cpu;
706 /* Rather than trying to register interest in the specific part
707 * of the iommu's address space that we've accessed and then
708 * expand it later as subsequent accesses touch more of it, we
709 * just register interest in the whole thing, on the assumption
710 * that iommu reconfiguration will be rare.
711 */
712 iommu_notifier_init(&notifier->n,
713 tcg_iommu_unmap_notify,
714 IOMMU_NOTIFIER_UNMAP,
715 0,
716 HWADDR_MAX,
717 iommu_idx);
718 memory_region_register_iommu_notifier(notifier->mr, &notifier->n);
719 }
720
721 if (!notifier->active) {
722 notifier->active = true;
723 }
724}
725
726static void tcg_iommu_free_notifier_list(CPUState *cpu)
727{
728 /* Destroy the CPU's notifier list */
729 int i;
730 TCGIOMMUNotifier *notifier;
731
732 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
733 notifier = &g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier, i);
734 memory_region_unregister_iommu_notifier(notifier->mr, &notifier->n);
735 }
736 g_array_free(cpu->iommu_notifiers, true);
737}
738
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100739/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200740MemoryRegionSection *
Peter Maydelld7898cd2016-01-21 14:15:05 +0000741address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
Peter Maydell1f871c52018-06-15 14:57:16 +0100742 hwaddr *xlat, hwaddr *plen,
743 MemTxAttrs attrs, int *prot)
Jan Kiszka90260c62013-05-26 21:46:51 +0200744{
Avi Kivity30951152012-10-30 13:47:46 +0200745 MemoryRegionSection *section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100746 IOMMUMemoryRegion *iommu_mr;
747 IOMMUMemoryRegionClass *imrc;
748 IOMMUTLBEntry iotlb;
749 int iommu_idx;
Alex Bennéef35e44e2016-10-21 16:34:18 +0100750 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
Peter Maydelld7898cd2016-01-21 14:15:05 +0000751
Peter Maydell1f871c52018-06-15 14:57:16 +0100752 for (;;) {
753 section = address_space_translate_internal(d, addr, &addr, plen, false);
754
755 iommu_mr = memory_region_get_iommu(section->mr);
756 if (!iommu_mr) {
757 break;
758 }
759
760 imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
761
762 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
763 tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx);
764 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
765 * doesn't short-cut its translation table walk.
766 */
767 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx);
768 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
769 | (addr & iotlb.addr_mask));
770 /* Update the caller's prot bits to remove permissions the IOMMU
771 * is giving us a failure response for. If we get down to no
772 * permissions left at all we can give up now.
773 */
774 if (!(iotlb.perm & IOMMU_RO)) {
775 *prot &= ~(PAGE_READ | PAGE_EXEC);
776 }
777 if (!(iotlb.perm & IOMMU_WO)) {
778 *prot &= ~PAGE_WRITE;
779 }
780
781 if (!*prot) {
782 goto translate_fail;
783 }
784
785 d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as));
786 }
Avi Kivity30951152012-10-30 13:47:46 +0200787
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000788 assert(!memory_region_is_iommu(section->mr));
Peter Maydell1f871c52018-06-15 14:57:16 +0100789 *xlat = addr;
Avi Kivity30951152012-10-30 13:47:46 +0200790 return section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100791
792translate_fail:
793 return &d->map.sections[PHYS_SECTION_UNASSIGNED];
Jan Kiszka90260c62013-05-26 21:46:51 +0200794}
bellard9fa3e852004-01-04 18:06:42 +0000795#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000796
Andreas Färberb170fce2013-01-20 20:23:22 +0100797#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000798
Juan Quintelae59fb372009-09-29 22:48:21 +0200799static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200800{
Andreas Färber259186a2013-01-17 18:51:17 +0100801 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200802
aurel323098dba2009-03-07 21:28:24 +0000803 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
804 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100805 cpu->interrupt_request &= ~0x01;
Alex Bennéed10eb082016-11-14 14:17:28 +0000806 tlb_flush(cpu);
pbrook9656f322008-07-01 20:01:19 +0000807
Pavel Dovgalyuk15a356c2018-01-10 16:48:46 +0300808 /* loadvm has just updated the content of RAM, bypassing the
809 * usual mechanisms that ensure we flush TBs for writes to
810 * memory we've translated code from. So we must flush all TBs,
811 * which will now be stale.
812 */
813 tb_flush(cpu);
814
pbrook9656f322008-07-01 20:01:19 +0000815 return 0;
816}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200817
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400818static int cpu_common_pre_load(void *opaque)
819{
820 CPUState *cpu = opaque;
821
Paolo Bonziniadee6422014-12-19 12:53:14 +0100822 cpu->exception_index = -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400823
824 return 0;
825}
826
827static bool cpu_common_exception_index_needed(void *opaque)
828{
829 CPUState *cpu = opaque;
830
Paolo Bonziniadee6422014-12-19 12:53:14 +0100831 return tcg_enabled() && cpu->exception_index != -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400832}
833
834static const VMStateDescription vmstate_cpu_common_exception_index = {
835 .name = "cpu_common/exception_index",
836 .version_id = 1,
837 .minimum_version_id = 1,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200838 .needed = cpu_common_exception_index_needed,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400839 .fields = (VMStateField[]) {
840 VMSTATE_INT32(exception_index, CPUState),
841 VMSTATE_END_OF_LIST()
842 }
843};
844
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300845static bool cpu_common_crash_occurred_needed(void *opaque)
846{
847 CPUState *cpu = opaque;
848
849 return cpu->crash_occurred;
850}
851
852static const VMStateDescription vmstate_cpu_common_crash_occurred = {
853 .name = "cpu_common/crash_occurred",
854 .version_id = 1,
855 .minimum_version_id = 1,
856 .needed = cpu_common_crash_occurred_needed,
857 .fields = (VMStateField[]) {
858 VMSTATE_BOOL(crash_occurred, CPUState),
859 VMSTATE_END_OF_LIST()
860 }
861};
862
Andreas Färber1a1562f2013-06-17 04:09:11 +0200863const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200864 .name = "cpu_common",
865 .version_id = 1,
866 .minimum_version_id = 1,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400867 .pre_load = cpu_common_pre_load,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200868 .post_load = cpu_common_post_load,
Juan Quintela35d08452014-04-16 16:01:33 +0200869 .fields = (VMStateField[]) {
Andreas Färber259186a2013-01-17 18:51:17 +0100870 VMSTATE_UINT32(halted, CPUState),
871 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200872 VMSTATE_END_OF_LIST()
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400873 },
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200874 .subsections = (const VMStateDescription*[]) {
875 &vmstate_cpu_common_exception_index,
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300876 &vmstate_cpu_common_crash_occurred,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200877 NULL
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200878 }
879};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200880
pbrook9656f322008-07-01 20:01:19 +0000881#endif
882
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100883CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400884{
Andreas Färberbdc44642013-06-24 23:50:24 +0200885 CPUState *cpu;
Glauber Costa950f1472009-06-09 12:15:18 -0400886
Andreas Färberbdc44642013-06-24 23:50:24 +0200887 CPU_FOREACH(cpu) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100888 if (cpu->cpu_index == index) {
Andreas Färberbdc44642013-06-24 23:50:24 +0200889 return cpu;
Andreas Färber55e5c282012-12-17 06:18:02 +0100890 }
Glauber Costa950f1472009-06-09 12:15:18 -0400891 }
892
Andreas Färberbdc44642013-06-24 23:50:24 +0200893 return NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400894}
895
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000896#if !defined(CONFIG_USER_ONLY)
Peter Xu80ceb072017-11-23 17:23:32 +0800897void cpu_address_space_init(CPUState *cpu, int asidx,
898 const char *prefix, MemoryRegion *mr)
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000899{
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000900 CPUAddressSpace *newas;
Peter Xu80ceb072017-11-23 17:23:32 +0800901 AddressSpace *as = g_new0(AddressSpace, 1);
Peter Xu87a621d2017-11-23 17:23:33 +0800902 char *as_name;
Peter Xu80ceb072017-11-23 17:23:32 +0800903
904 assert(mr);
Peter Xu87a621d2017-11-23 17:23:33 +0800905 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
906 address_space_init(as, mr, as_name);
907 g_free(as_name);
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000908
909 /* Target code should have set num_ases before calling us */
910 assert(asidx < cpu->num_ases);
911
Peter Maydell56943e82016-01-21 14:15:04 +0000912 if (asidx == 0) {
913 /* address space 0 gets the convenience alias */
914 cpu->as = as;
915 }
916
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000917 /* KVM cannot currently support multiple address spaces. */
918 assert(asidx == 0 || !kvm_enabled());
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000919
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000920 if (!cpu->cpu_ases) {
921 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000922 }
Peter Maydell32857f42015-10-01 15:29:50 +0100923
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000924 newas = &cpu->cpu_ases[asidx];
925 newas->cpu = cpu;
926 newas->as = as;
Peter Maydell56943e82016-01-21 14:15:04 +0000927 if (tcg_enabled()) {
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000928 newas->tcg_as_listener.commit = tcg_commit;
929 memory_listener_register(&newas->tcg_as_listener, as);
Peter Maydell56943e82016-01-21 14:15:04 +0000930 }
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000931}
Peter Maydell651a5bc2016-01-21 14:15:05 +0000932
933AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
934{
935 /* Return the AddressSpace corresponding to the specified index */
936 return cpu->cpu_ases[asidx].as;
937}
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000938#endif
939
Laurent Vivier7bbc1242016-10-20 13:26:04 +0200940void cpu_exec_unrealizefn(CPUState *cpu)
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530941{
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530942 CPUClass *cc = CPU_GET_CLASS(cpu);
943
Paolo Bonzini267f6852016-08-28 03:45:14 +0200944 cpu_list_remove(cpu);
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530945
946 if (cc->vmsd != NULL) {
947 vmstate_unregister(NULL, cc->vmsd, cpu);
948 }
949 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
950 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
951 }
Peter Maydell1f871c52018-06-15 14:57:16 +0100952#ifndef CONFIG_USER_ONLY
953 tcg_iommu_free_notifier_list(cpu);
954#endif
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530955}
956
Fam Zhengc7e002c2017-07-14 10:15:08 +0800957Property cpu_common_props[] = {
958#ifndef CONFIG_USER_ONLY
959 /* Create a memory property for softmmu CPU object,
960 * so users can wire up its memory. (This can't go in qom/cpu.c
961 * because that file is compiled only once for both user-mode
962 * and system builds.) The default if no link is set up is to use
963 * the system address space.
964 */
965 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
966 MemoryRegion *),
967#endif
968 DEFINE_PROP_END_OF_LIST(),
969};
970
Laurent Vivier39e329e2016-10-20 13:26:02 +0200971void cpu_exec_initfn(CPUState *cpu)
bellardfd6ce8f2003-05-14 19:00:11 +0000972{
Peter Maydell56943e82016-01-21 14:15:04 +0000973 cpu->as = NULL;
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000974 cpu->num_ases = 0;
Peter Maydell56943e82016-01-21 14:15:04 +0000975
Eduardo Habkost291135b2015-04-27 17:00:33 -0300976#ifndef CONFIG_USER_ONLY
Eduardo Habkost291135b2015-04-27 17:00:33 -0300977 cpu->thread_id = qemu_get_thread_id();
Peter Crosthwaite6731d862016-01-21 14:15:06 +0000978 cpu->memory = system_memory;
979 object_ref(OBJECT(cpu->memory));
Eduardo Habkost291135b2015-04-27 17:00:33 -0300980#endif
Laurent Vivier39e329e2016-10-20 13:26:02 +0200981}
982
Laurent Vivierce5b1bb2016-10-20 13:26:03 +0200983void cpu_exec_realizefn(CPUState *cpu, Error **errp)
Laurent Vivier39e329e2016-10-20 13:26:02 +0200984{
Richard Henderson55c3cee2017-10-15 19:02:42 -0700985 CPUClass *cc = CPU_GET_CLASS(cpu);
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000986 static bool tcg_target_initialized;
Eduardo Habkost291135b2015-04-27 17:00:33 -0300987
Paolo Bonzini267f6852016-08-28 03:45:14 +0200988 cpu_list_add(cpu);
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200989
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000990 if (tcg_enabled() && !tcg_target_initialized) {
991 tcg_target_initialized = true;
Richard Henderson55c3cee2017-10-15 19:02:42 -0700992 cc->tcg_initialize();
993 }
994
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200995#ifndef CONFIG_USER_ONLY
Andreas Färbere0d47942013-07-29 04:07:50 +0200996 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200997 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
Andreas Färbere0d47942013-07-29 04:07:50 +0200998 }
Andreas Färberb170fce2013-01-20 20:23:22 +0100999 if (cc->vmsd != NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +02001000 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
Andreas Färberb170fce2013-01-20 20:23:22 +01001001 }
Peter Maydell1f871c52018-06-15 14:57:16 +01001002
1003 cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier));
Paolo Bonzini741da0d2014-06-27 08:40:04 +02001004#endif
bellardfd6ce8f2003-05-14 19:00:11 +00001005}
1006
Igor Mammedov2278b932018-02-07 11:40:26 +01001007const char *parse_cpu_model(const char *cpu_model)
1008{
1009 ObjectClass *oc;
1010 CPUClass *cc;
1011 gchar **model_pieces;
1012 const char *cpu_type;
1013
1014 model_pieces = g_strsplit(cpu_model, ",", 2);
1015
1016 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
1017 if (oc == NULL) {
1018 error_report("unable to find CPU model '%s'", model_pieces[0]);
1019 g_strfreev(model_pieces);
1020 exit(EXIT_FAILURE);
1021 }
1022
1023 cpu_type = object_class_get_name(oc);
1024 cc = CPU_CLASS(oc);
1025 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
1026 g_strfreev(model_pieces);
1027 return cpu_type;
1028}
1029
Pranith Kumar406bc332017-07-12 17:51:42 -04001030#if defined(CONFIG_USER_ONLY)
Andreas Färber00b941e2013-06-29 18:55:54 +02001031static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
Paul Brook94df27f2010-02-28 23:47:45 +00001032{
Pranith Kumar406bc332017-07-12 17:51:42 -04001033 mmap_lock();
Pranith Kumar406bc332017-07-12 17:51:42 -04001034 tb_invalidate_phys_page_range(pc, pc + 1, 0);
Pranith Kumar406bc332017-07-12 17:51:42 -04001035 mmap_unlock();
Paul Brook94df27f2010-02-28 23:47:45 +00001036}
Pranith Kumar406bc332017-07-12 17:51:42 -04001037#else
1038static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1039{
1040 MemTxAttrs attrs;
1041 hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
1042 int asidx = cpu_asidx_from_attrs(cpu, attrs);
1043 if (phys != -1) {
1044 /* Locks grabbed by tb_invalidate_phys_addr */
1045 tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
Peter Maydellc874dc42018-05-31 14:50:52 +01001046 phys | (pc & ~TARGET_PAGE_MASK), attrs);
Pranith Kumar406bc332017-07-12 17:51:42 -04001047 }
1048}
1049#endif
bellardd720b932004-04-25 17:57:43 +00001050
Paul Brookc527ee82010-03-01 03:31:14 +00001051#if defined(CONFIG_USER_ONLY)
Andreas Färber75a34032013-09-02 16:57:02 +02001052void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +00001053
1054{
1055}
1056
Peter Maydell3ee887e2014-09-12 14:06:48 +01001057int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
1058 int flags)
1059{
1060 return -ENOSYS;
1061}
1062
1063void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
1064{
1065}
1066
Andreas Färber75a34032013-09-02 16:57:02 +02001067int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
Paul Brookc527ee82010-03-01 03:31:14 +00001068 int flags, CPUWatchpoint **watchpoint)
1069{
1070 return -ENOSYS;
1071}
1072#else
pbrook6658ffb2007-03-16 23:58:11 +00001073/* Add a watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001074int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001075 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +00001076{
aliguoric0ce9982008-11-25 22:13:57 +00001077 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001078
Peter Maydell05068c02014-09-12 14:06:48 +01001079 /* forbid ranges which are empty or run off the end of the address space */
Max Filippov07e28632014-09-17 22:03:36 -07001080 if (len == 0 || (addr + len - 1) < addr) {
Andreas Färber75a34032013-09-02 16:57:02 +02001081 error_report("tried to set invalid watchpoint at %"
1082 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
aliguorib4051332008-11-18 20:14:20 +00001083 return -EINVAL;
1084 }
Anthony Liguori7267c092011-08-20 22:09:37 -05001085 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +00001086
aliguoria1d1bb32008-11-18 20:07:32 +00001087 wp->vaddr = addr;
Peter Maydell05068c02014-09-12 14:06:48 +01001088 wp->len = len;
aliguoria1d1bb32008-11-18 20:07:32 +00001089 wp->flags = flags;
1090
aliguori2dc9f412008-11-18 20:56:59 +00001091 /* keep all GDB-injected watchpoints in front */
Andreas Färberff4700b2013-08-26 18:23:18 +02001092 if (flags & BP_GDB) {
1093 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
1094 } else {
1095 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
1096 }
aliguoria1d1bb32008-11-18 20:07:32 +00001097
Andreas Färber31b030d2013-09-04 01:29:02 +02001098 tlb_flush_page(cpu, addr);
aliguoria1d1bb32008-11-18 20:07:32 +00001099
1100 if (watchpoint)
1101 *watchpoint = wp;
1102 return 0;
pbrook6658ffb2007-03-16 23:58:11 +00001103}
1104
aliguoria1d1bb32008-11-18 20:07:32 +00001105/* Remove a specific watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001106int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001107 int flags)
pbrook6658ffb2007-03-16 23:58:11 +00001108{
aliguoria1d1bb32008-11-18 20:07:32 +00001109 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001110
Andreas Färberff4700b2013-08-26 18:23:18 +02001111 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001112 if (addr == wp->vaddr && len == wp->len
aliguori6e140f22008-11-18 20:37:55 +00001113 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
Andreas Färber75a34032013-09-02 16:57:02 +02001114 cpu_watchpoint_remove_by_ref(cpu, wp);
pbrook6658ffb2007-03-16 23:58:11 +00001115 return 0;
1116 }
1117 }
aliguoria1d1bb32008-11-18 20:07:32 +00001118 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +00001119}
1120
aliguoria1d1bb32008-11-18 20:07:32 +00001121/* Remove a specific watchpoint by reference. */
Andreas Färber75a34032013-09-02 16:57:02 +02001122void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +00001123{
Andreas Färberff4700b2013-08-26 18:23:18 +02001124 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +00001125
Andreas Färber31b030d2013-09-04 01:29:02 +02001126 tlb_flush_page(cpu, watchpoint->vaddr);
aliguoria1d1bb32008-11-18 20:07:32 +00001127
Anthony Liguori7267c092011-08-20 22:09:37 -05001128 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +00001129}
1130
aliguoria1d1bb32008-11-18 20:07:32 +00001131/* Remove all matching watchpoints. */
Andreas Färber75a34032013-09-02 16:57:02 +02001132void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001133{
aliguoric0ce9982008-11-25 22:13:57 +00001134 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001135
Andreas Färberff4700b2013-08-26 18:23:18 +02001136 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
Andreas Färber75a34032013-09-02 16:57:02 +02001137 if (wp->flags & mask) {
1138 cpu_watchpoint_remove_by_ref(cpu, wp);
1139 }
aliguoric0ce9982008-11-25 22:13:57 +00001140 }
aliguoria1d1bb32008-11-18 20:07:32 +00001141}
Peter Maydell05068c02014-09-12 14:06:48 +01001142
1143/* Return true if this watchpoint address matches the specified
1144 * access (ie the address range covered by the watchpoint overlaps
1145 * partially or completely with the address range covered by the
1146 * access).
1147 */
1148static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
1149 vaddr addr,
1150 vaddr len)
1151{
1152 /* We know the lengths are non-zero, but a little caution is
1153 * required to avoid errors in the case where the range ends
1154 * exactly at the top of the address space and so addr + len
1155 * wraps round to zero.
1156 */
1157 vaddr wpend = wp->vaddr + wp->len - 1;
1158 vaddr addrend = addr + len - 1;
1159
1160 return !(addr > wpend || wp->vaddr > addrend);
1161}
1162
Paul Brookc527ee82010-03-01 03:31:14 +00001163#endif
aliguoria1d1bb32008-11-18 20:07:32 +00001164
1165/* Add a breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001166int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +00001167 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001168{
aliguoric0ce9982008-11-25 22:13:57 +00001169 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +00001170
Anthony Liguori7267c092011-08-20 22:09:37 -05001171 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +00001172
1173 bp->pc = pc;
1174 bp->flags = flags;
1175
aliguori2dc9f412008-11-18 20:56:59 +00001176 /* keep all GDB-injected breakpoints in front */
Andreas Färber00b941e2013-06-29 18:55:54 +02001177 if (flags & BP_GDB) {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001178 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001179 } else {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001180 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001181 }
aliguoria1d1bb32008-11-18 20:07:32 +00001182
Andreas Färberf0c3c502013-08-26 21:22:53 +02001183 breakpoint_invalidate(cpu, pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001184
Andreas Färber00b941e2013-06-29 18:55:54 +02001185 if (breakpoint) {
aliguoria1d1bb32008-11-18 20:07:32 +00001186 *breakpoint = bp;
Andreas Färber00b941e2013-06-29 18:55:54 +02001187 }
aliguoria1d1bb32008-11-18 20:07:32 +00001188 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001189}
1190
1191/* Remove a specific breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001192int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +00001193{
aliguoria1d1bb32008-11-18 20:07:32 +00001194 CPUBreakpoint *bp;
1195
Andreas Färberf0c3c502013-08-26 21:22:53 +02001196 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +00001197 if (bp->pc == pc && bp->flags == flags) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001198 cpu_breakpoint_remove_by_ref(cpu, bp);
bellard4c3a88a2003-07-26 12:06:08 +00001199 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001200 }
bellard4c3a88a2003-07-26 12:06:08 +00001201 }
aliguoria1d1bb32008-11-18 20:07:32 +00001202 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +00001203}
1204
aliguoria1d1bb32008-11-18 20:07:32 +00001205/* Remove a specific breakpoint by reference. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001206void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001207{
Andreas Färberf0c3c502013-08-26 21:22:53 +02001208 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
1209
1210 breakpoint_invalidate(cpu, breakpoint->pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001211
Anthony Liguori7267c092011-08-20 22:09:37 -05001212 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +00001213}
1214
1215/* Remove all matching breakpoints. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001216void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001217{
aliguoric0ce9982008-11-25 22:13:57 +00001218 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001219
Andreas Färberf0c3c502013-08-26 21:22:53 +02001220 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001221 if (bp->flags & mask) {
1222 cpu_breakpoint_remove_by_ref(cpu, bp);
1223 }
aliguoric0ce9982008-11-25 22:13:57 +00001224 }
bellard4c3a88a2003-07-26 12:06:08 +00001225}
1226
bellardc33a3462003-07-29 20:50:33 +00001227/* enable or disable single step mode. EXCP_DEBUG is returned by the
1228 CPU loop after each instruction */
Andreas Färber3825b282013-06-24 18:41:06 +02001229void cpu_single_step(CPUState *cpu, int enabled)
bellardc33a3462003-07-29 20:50:33 +00001230{
Andreas Färbered2803d2013-06-21 20:20:45 +02001231 if (cpu->singlestep_enabled != enabled) {
1232 cpu->singlestep_enabled = enabled;
1233 if (kvm_enabled()) {
Stefan Weil38e478e2013-07-25 20:50:21 +02001234 kvm_update_guest_debug(cpu, 0);
Andreas Färbered2803d2013-06-21 20:20:45 +02001235 } else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +01001236 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +00001237 /* XXX: only flush what is necessary */
Peter Crosthwaitebbd77c12015-06-23 19:31:15 -07001238 tb_flush(cpu);
aliguorie22a25c2009-03-12 20:12:48 +00001239 }
bellardc33a3462003-07-29 20:50:33 +00001240 }
bellardc33a3462003-07-29 20:50:33 +00001241}
1242
Andreas Färbera47dddd2013-09-03 17:38:47 +02001243void cpu_abort(CPUState *cpu, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +00001244{
1245 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +00001246 va_list ap2;
bellard75012672003-06-21 13:11:07 +00001247
1248 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +00001249 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +00001250 fprintf(stderr, "qemu: fatal: ");
1251 vfprintf(stderr, fmt, ap);
1252 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +02001253 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
Paolo Bonzini013a2942015-11-13 13:16:27 +01001254 if (qemu_log_separate()) {
Richard Henderson1ee73212016-09-22 15:17:10 -07001255 qemu_log_lock();
aliguori93fcfe32009-01-15 22:34:14 +00001256 qemu_log("qemu: fatal: ");
1257 qemu_log_vprintf(fmt, ap2);
1258 qemu_log("\n");
Andreas Färbera0762852013-06-16 07:28:50 +02001259 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +00001260 qemu_log_flush();
Richard Henderson1ee73212016-09-22 15:17:10 -07001261 qemu_log_unlock();
aliguori93fcfe32009-01-15 22:34:14 +00001262 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +00001263 }
pbrook493ae1f2007-11-23 16:53:59 +00001264 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +00001265 va_end(ap);
Pavel Dovgalyuk76159362015-09-17 19:25:07 +03001266 replay_finish();
Riku Voipiofd052bf2010-01-25 14:30:49 +02001267#if defined(CONFIG_USER_ONLY)
1268 {
1269 struct sigaction act;
1270 sigfillset(&act.sa_mask);
1271 act.sa_handler = SIG_DFL;
Peter Maydell8347c182018-05-15 19:27:00 +01001272 act.sa_flags = 0;
Riku Voipiofd052bf2010-01-25 14:30:49 +02001273 sigaction(SIGABRT, &act, NULL);
1274 }
1275#endif
bellard75012672003-06-21 13:11:07 +00001276 abort();
1277}
1278
bellard01243112004-01-04 15:48:17 +00001279#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -04001280/* Called from RCU critical section */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001281static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
1282{
1283 RAMBlock *block;
1284
Paolo Bonzini43771532013-09-09 17:58:40 +02001285 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001286 if (block && addr - block->offset < block->max_length) {
Paolo Bonzini68851b92015-10-22 13:51:30 +02001287 return block;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001288 }
Peter Xu99e15582017-05-12 12:17:39 +08001289 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001290 if (addr - block->offset < block->max_length) {
Paolo Bonzini041603f2013-09-09 17:49:45 +02001291 goto found;
1292 }
1293 }
1294
1295 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1296 abort();
1297
1298found:
Paolo Bonzini43771532013-09-09 17:58:40 +02001299 /* It is safe to write mru_block outside the iothread lock. This
1300 * is what happens:
1301 *
1302 * mru_block = xxx
1303 * rcu_read_unlock()
1304 * xxx removed from list
1305 * rcu_read_lock()
1306 * read mru_block
1307 * mru_block = NULL;
1308 * call_rcu(reclaim_ramblock, xxx);
1309 * rcu_read_unlock()
1310 *
1311 * atomic_rcu_set is not needed here. The block was already published
1312 * when it was placed into the list. Here we're just making an extra
1313 * copy of the pointer.
1314 */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001315 ram_list.mru_block = block;
1316 return block;
1317}
1318
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001319static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
bellard1ccde1c2004-02-06 19:46:14 +00001320{
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001321 CPUState *cpu;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001322 ram_addr_t start1;
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001323 RAMBlock *block;
1324 ram_addr_t end;
1325
1326 end = TARGET_PAGE_ALIGN(start + length);
1327 start &= TARGET_PAGE_MASK;
bellardf23db162005-08-21 19:12:28 +00001328
Mike Day0dc3f442013-09-05 14:41:35 -04001329 rcu_read_lock();
Paolo Bonzini041603f2013-09-09 17:49:45 +02001330 block = qemu_get_ram_block(start);
1331 assert(block == qemu_get_ram_block(end - 1));
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02001332 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001333 CPU_FOREACH(cpu) {
1334 tlb_reset_dirty(cpu, start1, length);
1335 }
Mike Day0dc3f442013-09-05 14:41:35 -04001336 rcu_read_unlock();
Juan Quintelad24981d2012-05-22 00:42:40 +02001337}
1338
1339/* Note: start and end must be within the same ram block. */
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001340bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1341 ram_addr_t length,
1342 unsigned client)
Juan Quintelad24981d2012-05-22 00:42:40 +02001343{
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001344 DirtyMemoryBlocks *blocks;
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001345 unsigned long end, page;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001346 bool dirty = false;
Juan Quintelad24981d2012-05-22 00:42:40 +02001347
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001348 if (length == 0) {
1349 return false;
1350 }
1351
1352 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1353 page = start >> TARGET_PAGE_BITS;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001354
1355 rcu_read_lock();
1356
1357 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1358
1359 while (page < end) {
1360 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1361 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1362 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1363
1364 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1365 offset, num);
1366 page += num;
1367 }
1368
1369 rcu_read_unlock();
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001370
1371 if (dirty && tcg_enabled()) {
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001372 tlb_reset_dirty_range_all(start, length);
Juan Quintelad24981d2012-05-22 00:42:40 +02001373 }
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001374
1375 return dirty;
bellard1ccde1c2004-02-06 19:46:14 +00001376}
1377
Gerd Hoffmann8deaf122017-04-21 11:16:25 +02001378DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
1379 (ram_addr_t start, ram_addr_t length, unsigned client)
1380{
1381 DirtyMemoryBlocks *blocks;
1382 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
1383 ram_addr_t first = QEMU_ALIGN_DOWN(start, align);
1384 ram_addr_t last = QEMU_ALIGN_UP(start + length, align);
1385 DirtyBitmapSnapshot *snap;
1386 unsigned long page, end, dest;
1387
1388 snap = g_malloc0(sizeof(*snap) +
1389 ((last - first) >> (TARGET_PAGE_BITS + 3)));
1390 snap->start = first;
1391 snap->end = last;
1392
1393 page = first >> TARGET_PAGE_BITS;
1394 end = last >> TARGET_PAGE_BITS;
1395 dest = 0;
1396
1397 rcu_read_lock();
1398
1399 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1400
1401 while (page < end) {
1402 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1403 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1404 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1405
1406 assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL)));
1407 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
1408 offset >>= BITS_PER_LEVEL;
1409
1410 bitmap_copy_and_clear_atomic(snap->dirty + dest,
1411 blocks->blocks[idx] + offset,
1412 num);
1413 page += num;
1414 dest += num >> BITS_PER_LEVEL;
1415 }
1416
1417 rcu_read_unlock();
1418
1419 if (tcg_enabled()) {
1420 tlb_reset_dirty_range_all(start, length);
1421 }
1422
1423 return snap;
1424}
1425
1426bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
1427 ram_addr_t start,
1428 ram_addr_t length)
1429{
1430 unsigned long page, end;
1431
1432 assert(start >= snap->start);
1433 assert(start + length <= snap->end);
1434
1435 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
1436 page = (start - snap->start) >> TARGET_PAGE_BITS;
1437
1438 while (page < end) {
1439 if (test_bit(page, snap->dirty)) {
1440 return true;
1441 }
1442 page++;
1443 }
1444 return false;
1445}
1446
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01001447/* Called from RCU critical section */
Andreas Färberbb0e6272013-09-03 13:32:01 +02001448hwaddr memory_region_section_get_iotlb(CPUState *cpu,
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001449 MemoryRegionSection *section,
1450 target_ulong vaddr,
1451 hwaddr paddr, hwaddr xlat,
1452 int prot,
1453 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +00001454{
Avi Kivitya8170e52012-10-23 12:30:10 +02001455 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +00001456 CPUWatchpoint *wp;
1457
Blue Swirlcc5bea62012-04-14 14:56:48 +00001458 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +00001459 /* Normal RAM. */
Paolo Bonzinie4e69792016-03-01 10:44:50 +01001460 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001461 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001462 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +00001463 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001464 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +00001465 }
1466 } else {
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001467 AddressSpaceDispatch *d;
1468
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001469 d = flatview_to_dispatch(section->fv);
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001470 iotlb = section - d->map.sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001471 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001472 }
1473
1474 /* Make accesses to pages with watchpoints go via the
1475 watchpoint trap routines. */
Andreas Färberff4700b2013-08-26 18:23:18 +02001476 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001477 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
Blue Swirle5548612012-04-21 13:08:33 +00001478 /* Avoid trapping reads of pages with a write breakpoint. */
1479 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001480 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +00001481 *address |= TLB_MMIO;
1482 break;
1483 }
1484 }
1485 }
1486
1487 return iotlb;
1488}
bellard9fa3e852004-01-04 18:06:42 +00001489#endif /* defined(CONFIG_USER_ONLY) */
1490
pbrooke2eef172008-06-08 01:09:01 +00001491#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +00001492
Anthony Liguoric227f092009-10-01 16:12:16 -05001493static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001494 uint16_t section);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001495static subpage_t *subpage_init(FlatView *fv, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +02001496
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001497static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
Igor Mammedova2b257d2014-10-31 16:38:37 +00001498 qemu_anon_ram_alloc;
Markus Armbruster91138032013-07-31 15:11:08 +02001499
1500/*
1501 * Set a custom physical guest memory alloator.
1502 * Accelerators with unusual needs may need this. Hopefully, we can
1503 * get rid of it eventually.
1504 */
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001505void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared))
Markus Armbruster91138032013-07-31 15:11:08 +02001506{
1507 phys_mem_alloc = alloc;
1508}
1509
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001510static uint16_t phys_section_add(PhysPageMap *map,
1511 MemoryRegionSection *section)
Avi Kivity5312bd82012-02-12 18:32:55 +02001512{
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001513 /* The physical section number is ORed with a page-aligned
1514 * pointer to produce the iotlb entries. Thus it should
1515 * never overflow into the page-aligned value.
1516 */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001517 assert(map->sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001518
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001519 if (map->sections_nb == map->sections_nb_alloc) {
1520 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1521 map->sections = g_renew(MemoryRegionSection, map->sections,
1522 map->sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +02001523 }
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001524 map->sections[map->sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001525 memory_region_ref(section->mr);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001526 return map->sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +02001527}
1528
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001529static void phys_section_destroy(MemoryRegion *mr)
1530{
Don Slutz55b4e802015-11-30 17:11:04 -05001531 bool have_sub_page = mr->subpage;
1532
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001533 memory_region_unref(mr);
1534
Don Slutz55b4e802015-11-30 17:11:04 -05001535 if (have_sub_page) {
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001536 subpage_t *subpage = container_of(mr, subpage_t, iomem);
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07001537 object_unref(OBJECT(&subpage->iomem));
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001538 g_free(subpage);
1539 }
1540}
1541
Paolo Bonzini60926662013-05-29 12:30:26 +02001542static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +02001543{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001544 while (map->sections_nb > 0) {
1545 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001546 phys_section_destroy(section->mr);
1547 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001548 g_free(map->sections);
1549 g_free(map->nodes);
Avi Kivity5312bd82012-02-12 18:32:55 +02001550}
1551
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001552static void register_subpage(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001553{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001554 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001555 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +02001556 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +02001557 & TARGET_PAGE_MASK;
Peter Xu003a0cf2017-05-15 16:50:57 +08001558 MemoryRegionSection *existing = phys_page_find(d, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001559 MemoryRegionSection subsection = {
1560 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001561 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +02001562 };
Avi Kivitya8170e52012-10-23 12:30:10 +02001563 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001564
Avi Kivityf3705d52012-03-08 16:16:34 +02001565 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001566
Avi Kivityf3705d52012-03-08 16:16:34 +02001567 if (!(existing->mr->subpage)) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001568 subpage = subpage_init(fv, base);
1569 subsection.fv = fv;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001570 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +02001571 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001572 phys_section_add(&d->map, &subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001573 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +02001574 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001575 }
1576 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001577 end = start + int128_get64(section->size) - 1;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001578 subpage_register(subpage, start, end,
1579 phys_section_add(&d->map, section));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001580}
1581
1582
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001583static void register_multipage(FlatView *fv,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001584 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +00001585{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001586 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivitya8170e52012-10-23 12:30:10 +02001587 hwaddr start_addr = section->offset_within_address_space;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001588 uint16_t section_index = phys_section_add(&d->map, section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001589 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1590 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +02001591
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001592 assert(num_pages);
1593 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +00001594}
1595
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10001596void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001597{
Paolo Bonzini99b9cc02013-05-27 13:18:01 +02001598 MemoryRegionSection now = *section, remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001599 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001600
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001601 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
1602 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
1603 - now.offset_within_address_space;
1604
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001605 now.size = int128_min(int128_make64(left), now.size);
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001606 register_subpage(fv, &now);
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001607 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001608 now.size = int128_zero();
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001609 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001610 while (int128_ne(remain.size, now.size)) {
1611 remain.size = int128_sub(remain.size, now.size);
1612 remain.offset_within_address_space += int128_get64(now.size);
1613 remain.offset_within_region += int128_get64(now.size);
Tyler Hall69b67642012-07-25 18:45:04 -04001614 now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001615 if (int128_lt(remain.size, page_size)) {
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001616 register_subpage(fv, &now);
Hu Tao88266242013-08-29 18:21:16 +08001617 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001618 now.size = page_size;
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001619 register_subpage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001620 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001621 now.size = int128_and(now.size, int128_neg(page_size));
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001622 register_multipage(fv, &now);
Tyler Hall69b67642012-07-25 18:45:04 -04001623 }
Avi Kivity0f0cb162012-02-13 17:14:32 +02001624 }
1625}
1626
Sheng Yang62a27442010-01-26 19:21:16 +08001627void qemu_flush_coalesced_mmio_buffer(void)
1628{
1629 if (kvm_enabled())
1630 kvm_flush_coalesced_mmio_buffer();
1631}
1632
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001633void qemu_mutex_lock_ramlist(void)
1634{
1635 qemu_mutex_lock(&ram_list.mutex);
1636}
1637
1638void qemu_mutex_unlock_ramlist(void)
1639{
1640 qemu_mutex_unlock(&ram_list.mutex);
1641}
1642
Peter Xube9b23c2017-05-12 12:17:41 +08001643void ram_block_dump(Monitor *mon)
1644{
1645 RAMBlock *block;
1646 char *psize;
1647
1648 rcu_read_lock();
1649 monitor_printf(mon, "%24s %8s %18s %18s %18s\n",
1650 "Block Name", "PSize", "Offset", "Used", "Total");
1651 RAMBLOCK_FOREACH(block) {
1652 psize = size_to_str(block->page_size);
1653 monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1654 " 0x%016" PRIx64 "\n", block->idstr, psize,
1655 (uint64_t)block->offset,
1656 (uint64_t)block->used_length,
1657 (uint64_t)block->max_length);
1658 g_free(psize);
1659 }
1660 rcu_read_unlock();
1661}
1662
Markus Armbrustere1e84ba2013-07-31 15:11:10 +02001663#ifdef __linux__
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001664/*
1665 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1666 * may or may not name the same files / on the same filesystem now as
1667 * when we actually open and map them. Iterate over the file
1668 * descriptors instead, and use qemu_fd_getpagesize().
1669 */
1670static int find_max_supported_pagesize(Object *obj, void *opaque)
1671{
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001672 long *hpsize_min = opaque;
1673
1674 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
David Gibson2b108082018-04-03 15:05:45 +10001675 long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj));
1676
David Gibson0de6e2a2018-04-03 14:55:11 +10001677 if (hpsize < *hpsize_min) {
1678 *hpsize_min = hpsize;
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001679 }
1680 }
1681
1682 return 0;
1683}
1684
1685long qemu_getrampagesize(void)
1686{
1687 long hpsize = LONG_MAX;
1688 long mainrampagesize;
1689 Object *memdev_root;
1690
David Gibson0de6e2a2018-04-03 14:55:11 +10001691 mainrampagesize = qemu_mempath_getpagesize(mem_path);
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001692
1693 /* it's possible we have memory-backend objects with
1694 * hugepage-backed RAM. these may get mapped into system
1695 * address space via -numa parameters or memory hotplug
1696 * hooks. we want to take these into account, but we
1697 * also want to make sure these supported hugepage
1698 * sizes are applicable across the entire range of memory
1699 * we may boot from, so we take the min across all
1700 * backends, and assume normal pages in cases where a
1701 * backend isn't backed by hugepages.
1702 */
1703 memdev_root = object_resolve_path("/objects", NULL);
1704 if (memdev_root) {
1705 object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize);
1706 }
1707 if (hpsize == LONG_MAX) {
1708 /* No additional memory regions found ==> Report main RAM page size */
1709 return mainrampagesize;
1710 }
1711
1712 /* If NUMA is disabled or the NUMA nodes are not backed with a
1713 * memory-backend, then there is at least one node using "normal" RAM,
1714 * so if its page size is smaller we have got to report that size instead.
1715 */
1716 if (hpsize > mainrampagesize &&
1717 (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) {
1718 static bool warned;
1719 if (!warned) {
1720 error_report("Huge page support disabled (n/a for main memory).");
1721 warned = true;
1722 }
1723 return mainrampagesize;
1724 }
1725
1726 return hpsize;
1727}
1728#else
1729long qemu_getrampagesize(void)
1730{
1731 return getpagesize();
1732}
1733#endif
1734
1735#ifdef __linux__
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001736static int64_t get_file_size(int fd)
1737{
1738 int64_t size = lseek(fd, 0, SEEK_END);
1739 if (size < 0) {
1740 return -errno;
1741 }
1742 return size;
1743}
1744
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001745static int file_ram_open(const char *path,
1746 const char *region_name,
1747 bool *created,
1748 Error **errp)
Marcelo Tosattic9027602010-03-01 20:25:08 -03001749{
1750 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -05001751 char *sanitized_name;
1752 char *c;
Paolo Bonzini5c3ece72016-03-17 15:53:13 +01001753 int fd = -1;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001754
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001755 *created = false;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001756 for (;;) {
1757 fd = open(path, O_RDWR);
1758 if (fd >= 0) {
1759 /* @path names an existing file, use it */
1760 break;
1761 }
1762 if (errno == ENOENT) {
1763 /* @path names a file that doesn't exist, create it */
1764 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1765 if (fd >= 0) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001766 *created = true;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001767 break;
1768 }
1769 } else if (errno == EISDIR) {
1770 /* @path names a directory, create a file there */
1771 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001772 sanitized_name = g_strdup(region_name);
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001773 for (c = sanitized_name; *c != '\0'; c++) {
1774 if (*c == '/') {
1775 *c = '_';
1776 }
1777 }
1778
1779 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1780 sanitized_name);
1781 g_free(sanitized_name);
1782
1783 fd = mkstemp(filename);
1784 if (fd >= 0) {
1785 unlink(filename);
1786 g_free(filename);
1787 break;
1788 }
1789 g_free(filename);
1790 }
1791 if (errno != EEXIST && errno != EINTR) {
1792 error_setg_errno(errp, errno,
1793 "can't open backing store %s for guest RAM",
1794 path);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001795 return -1;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001796 }
1797 /*
1798 * Try again on EINTR and EEXIST. The latter happens when
1799 * something else creates the file between our two open().
1800 */
1801 }
1802
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001803 return fd;
1804}
1805
1806static void *file_ram_alloc(RAMBlock *block,
1807 ram_addr_t memory,
1808 int fd,
1809 bool truncate,
1810 Error **errp)
1811{
1812 void *area;
1813
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001814 block->page_size = qemu_fd_getpagesize(fd);
Haozhong Zhang98376842017-12-11 15:28:04 +08001815 if (block->mr->align % block->page_size) {
1816 error_setg(errp, "alignment 0x%" PRIx64
1817 " must be multiples of page size 0x%zx",
1818 block->mr->align, block->page_size);
1819 return NULL;
1820 }
1821 block->mr->align = MAX(block->page_size, block->mr->align);
Haozhong Zhang83606682016-10-24 20:49:37 +08001822#if defined(__s390x__)
1823 if (kvm_enabled()) {
1824 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1825 }
1826#endif
Marcelo Tosattic9027602010-03-01 20:25:08 -03001827
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001828 if (memory < block->page_size) {
Hu Tao557529d2014-09-09 13:28:00 +08001829 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001830 "or larger than page size 0x%zx",
1831 memory, block->page_size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001832 return NULL;
Haozhong Zhang1775f112016-11-02 09:05:51 +08001833 }
1834
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001835 memory = ROUND_UP(memory, block->page_size);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001836
1837 /*
1838 * ftruncate is not supported by hugetlbfs in older
1839 * hosts, so don't bother bailing out on errors.
1840 * If anything goes wrong with it under other filesystems,
1841 * mmap will fail.
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001842 *
1843 * Do not truncate the non-empty backend file to avoid corrupting
1844 * the existing data in the file. Disabling shrinking is not
1845 * enough. For example, the current vNVDIMM implementation stores
1846 * the guest NVDIMM labels at the end of the backend file. If the
1847 * backend file is later extended, QEMU will not be able to find
1848 * those labels. Therefore, extending the non-empty backend file
1849 * is disabled as well.
Marcelo Tosattic9027602010-03-01 20:25:08 -03001850 */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001851 if (truncate && ftruncate(fd, memory)) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +09001852 perror("ftruncate");
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001853 }
Marcelo Tosattic9027602010-03-01 20:25:08 -03001854
Dominik Dingeld2f39ad2016-04-25 13:55:38 +02001855 area = qemu_ram_mmap(fd, memory, block->mr->align,
1856 block->flags & RAM_SHARED);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001857 if (area == MAP_FAILED) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001858 error_setg_errno(errp, errno,
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001859 "unable to map backing store for guest RAM");
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001860 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001861 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001862
1863 if (mem_prealloc) {
Jitendra Kolhe1e356fc2017-02-24 09:01:43 +05301864 os_mem_prealloc(fd, area, memory, smp_cpus, errp);
Igor Mammedov056b68a2016-07-20 11:54:03 +02001865 if (errp && *errp) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001866 qemu_ram_munmap(area, memory);
1867 return NULL;
Igor Mammedov056b68a2016-07-20 11:54:03 +02001868 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001869 }
1870
Alex Williamson04b16652010-07-02 11:13:17 -06001871 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001872 return area;
1873}
1874#endif
1875
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001876/* Allocate space within the ram_addr_t space that governs the
1877 * dirty bitmaps.
1878 * Called with the ramlist lock held.
1879 */
Alex Williamsond17b5282010-06-25 11:08:38 -06001880static ram_addr_t find_ram_offset(ram_addr_t size)
1881{
Alex Williamson04b16652010-07-02 11:13:17 -06001882 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -06001883 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001884
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +01001885 assert(size != 0); /* it would hand out same offset multiple times */
1886
Mike Day0dc3f442013-09-05 14:41:35 -04001887 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
Alex Williamson04b16652010-07-02 11:13:17 -06001888 return 0;
Mike Day0d53d9f2015-01-21 13:45:24 +01001889 }
Alex Williamson04b16652010-07-02 11:13:17 -06001890
Peter Xu99e15582017-05-12 12:17:39 +08001891 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001892 ram_addr_t candidate, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001893
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001894 /* Align blocks to start on a 'long' in the bitmap
1895 * which makes the bitmap sync'ing take the fast path.
1896 */
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001897 candidate = block->offset + block->max_length;
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001898 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
Alex Williamson04b16652010-07-02 11:13:17 -06001899
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001900 /* Search for the closest following block
1901 * and find the gap.
1902 */
Peter Xu99e15582017-05-12 12:17:39 +08001903 RAMBLOCK_FOREACH(next_block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001904 if (next_block->offset >= candidate) {
Alex Williamson04b16652010-07-02 11:13:17 -06001905 next = MIN(next, next_block->offset);
1906 }
1907 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001908
1909 /* If it fits remember our place and remember the size
1910 * of gap, but keep going so that we might find a smaller
1911 * gap to fill so avoiding fragmentation.
1912 */
1913 if (next - candidate >= size && next - candidate < mingap) {
1914 offset = candidate;
1915 mingap = next - candidate;
Alex Williamson04b16652010-07-02 11:13:17 -06001916 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001917
1918 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
Alex Williamson04b16652010-07-02 11:13:17 -06001919 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001920
1921 if (offset == RAM_ADDR_MAX) {
1922 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1923 (uint64_t)size);
1924 abort();
1925 }
1926
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001927 trace_find_ram_offset(size, offset);
1928
Alex Williamson04b16652010-07-02 11:13:17 -06001929 return offset;
1930}
1931
Juan Quintelab8c48992017-03-21 17:44:30 +01001932unsigned long last_ram_page(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001933{
Alex Williamsond17b5282010-06-25 11:08:38 -06001934 RAMBlock *block;
1935 ram_addr_t last = 0;
1936
Mike Day0dc3f442013-09-05 14:41:35 -04001937 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08001938 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001939 last = MAX(last, block->offset + block->max_length);
Mike Day0d53d9f2015-01-21 13:45:24 +01001940 }
Mike Day0dc3f442013-09-05 14:41:35 -04001941 rcu_read_unlock();
Juan Quintelab8c48992017-03-21 17:44:30 +01001942 return last >> TARGET_PAGE_BITS;
Alex Williamsond17b5282010-06-25 11:08:38 -06001943}
1944
Jason Baronddb97f12012-08-02 15:44:16 -04001945static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1946{
1947 int ret;
Jason Baronddb97f12012-08-02 15:44:16 -04001948
1949 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +02001950 if (!machine_dump_guest_core(current_machine)) {
Jason Baronddb97f12012-08-02 15:44:16 -04001951 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1952 if (ret) {
1953 perror("qemu_madvise");
1954 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1955 "but dump_guest_core=off specified\n");
1956 }
1957 }
1958}
1959
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00001960const char *qemu_ram_get_idstr(RAMBlock *rb)
1961{
1962 return rb->idstr;
1963}
1964
Dr. David Alan Gilbert463a4ac2017-03-07 18:36:36 +00001965bool qemu_ram_is_shared(RAMBlock *rb)
1966{
1967 return rb->flags & RAM_SHARED;
1968}
1969
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +00001970/* Note: Only set at the start of postcopy */
1971bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
1972{
1973 return rb->flags & RAM_UF_ZEROPAGE;
1974}
1975
1976void qemu_ram_set_uf_zeroable(RAMBlock *rb)
1977{
1978 rb->flags |= RAM_UF_ZEROPAGE;
1979}
1980
Cédric Le Goaterb895de52018-05-14 08:57:00 +02001981bool qemu_ram_is_migratable(RAMBlock *rb)
1982{
1983 return rb->flags & RAM_MIGRATABLE;
1984}
1985
1986void qemu_ram_set_migratable(RAMBlock *rb)
1987{
1988 rb->flags |= RAM_MIGRATABLE;
1989}
1990
1991void qemu_ram_unset_migratable(RAMBlock *rb)
1992{
1993 rb->flags &= ~RAM_MIGRATABLE;
1994}
1995
Mike Dayae3a7042013-09-05 14:41:35 -04001996/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08001997void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
Hu Tao20cfe882014-04-02 15:13:26 +08001998{
Gongleifa53a0e2016-05-10 10:04:59 +08001999 RAMBlock *block;
Hu Tao20cfe882014-04-02 15:13:26 +08002000
Avi Kivityc5705a72011-12-20 15:59:12 +02002001 assert(new_block);
2002 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002003
Anthony Liguori09e5ab62012-02-03 12:28:43 -06002004 if (dev) {
2005 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002006 if (id) {
2007 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05002008 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002009 }
2010 }
2011 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
2012
Gongleiab0a9952016-05-10 10:05:00 +08002013 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08002014 RAMBLOCK_FOREACH(block) {
Gongleifa53a0e2016-05-10 10:04:59 +08002015 if (block != new_block &&
2016 !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06002017 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
2018 new_block->idstr);
2019 abort();
2020 }
2021 }
Mike Day0dc3f442013-09-05 14:41:35 -04002022 rcu_read_unlock();
Avi Kivityc5705a72011-12-20 15:59:12 +02002023}
2024
Mike Dayae3a7042013-09-05 14:41:35 -04002025/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08002026void qemu_ram_unset_idstr(RAMBlock *block)
Hu Tao20cfe882014-04-02 15:13:26 +08002027{
Mike Dayae3a7042013-09-05 14:41:35 -04002028 /* FIXME: arch_init.c assumes that this is not called throughout
2029 * migration. Ignore the problem since hot-unplug during migration
2030 * does not work anyway.
2031 */
Hu Tao20cfe882014-04-02 15:13:26 +08002032 if (block) {
2033 memset(block->idstr, 0, sizeof(block->idstr));
2034 }
2035}
2036
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002037size_t qemu_ram_pagesize(RAMBlock *rb)
2038{
2039 return rb->page_size;
2040}
2041
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002042/* Returns the largest size of page in use */
2043size_t qemu_ram_pagesize_largest(void)
2044{
2045 RAMBlock *block;
2046 size_t largest = 0;
2047
Peter Xu99e15582017-05-12 12:17:39 +08002048 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002049 largest = MAX(largest, qemu_ram_pagesize(block));
2050 }
2051
2052 return largest;
2053}
2054
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002055static int memory_try_enable_merging(void *addr, size_t len)
2056{
Marcel Apfelbaum75cc7f02015-02-04 17:43:55 +02002057 if (!machine_mem_merge(current_machine)) {
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002058 /* disabled by the user */
2059 return 0;
2060 }
2061
2062 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
2063}
2064
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002065/* Only legal before guest might have detected the memory size: e.g. on
2066 * incoming migration, or right after reset.
2067 *
2068 * As memory core doesn't know how is memory accessed, it is up to
2069 * resize callback to update device state and/or add assertions to detect
2070 * misuse, if necessary.
2071 */
Gongleifa53a0e2016-05-10 10:04:59 +08002072int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002073{
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002074 assert(block);
2075
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002076 newsize = HOST_PAGE_ALIGN(newsize);
Michael S. Tsirkin129ddaf2015-02-17 10:15:30 +01002077
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002078 if (block->used_length == newsize) {
2079 return 0;
2080 }
2081
2082 if (!(block->flags & RAM_RESIZEABLE)) {
2083 error_setg_errno(errp, EINVAL,
2084 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2085 " in != 0x" RAM_ADDR_FMT, block->idstr,
2086 newsize, block->used_length);
2087 return -EINVAL;
2088 }
2089
2090 if (block->max_length < newsize) {
2091 error_setg_errno(errp, EINVAL,
2092 "Length too large: %s: 0x" RAM_ADDR_FMT
2093 " > 0x" RAM_ADDR_FMT, block->idstr,
2094 newsize, block->max_length);
2095 return -EINVAL;
2096 }
2097
2098 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
2099 block->used_length = newsize;
Paolo Bonzini58d27072015-03-23 11:56:01 +01002100 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
2101 DIRTY_CLIENTS_ALL);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002102 memory_region_set_size(block->mr, newsize);
2103 if (block->resized) {
2104 block->resized(block->idstr, newsize, block->host);
2105 }
2106 return 0;
2107}
2108
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002109/* Called with ram_list.mutex held */
2110static void dirty_memory_extend(ram_addr_t old_ram_size,
2111 ram_addr_t new_ram_size)
2112{
2113 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
2114 DIRTY_MEMORY_BLOCK_SIZE);
2115 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
2116 DIRTY_MEMORY_BLOCK_SIZE);
2117 int i;
2118
2119 /* Only need to extend if block count increased */
2120 if (new_num_blocks <= old_num_blocks) {
2121 return;
2122 }
2123
2124 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
2125 DirtyMemoryBlocks *old_blocks;
2126 DirtyMemoryBlocks *new_blocks;
2127 int j;
2128
2129 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
2130 new_blocks = g_malloc(sizeof(*new_blocks) +
2131 sizeof(new_blocks->blocks[0]) * new_num_blocks);
2132
2133 if (old_num_blocks) {
2134 memcpy(new_blocks->blocks, old_blocks->blocks,
2135 old_num_blocks * sizeof(old_blocks->blocks[0]));
2136 }
2137
2138 for (j = old_num_blocks; j < new_num_blocks; j++) {
2139 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
2140 }
2141
2142 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
2143
2144 if (old_blocks) {
2145 g_free_rcu(old_blocks, rcu);
2146 }
2147 }
2148}
2149
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002150static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared)
Avi Kivityc5705a72011-12-20 15:59:12 +02002151{
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002152 RAMBlock *block;
Mike Day0d53d9f2015-01-21 13:45:24 +01002153 RAMBlock *last_block = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002154 ram_addr_t old_ram_size, new_ram_size;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002155 Error *err = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002156
Juan Quintelab8c48992017-03-21 17:44:30 +01002157 old_ram_size = last_ram_page();
Avi Kivityc5705a72011-12-20 15:59:12 +02002158
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002159 qemu_mutex_lock_ramlist();
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002160 new_block->offset = find_ram_offset(new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002161
2162 if (!new_block->host) {
2163 if (xen_enabled()) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002164 xen_ram_alloc(new_block->offset, new_block->max_length,
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002165 new_block->mr, &err);
2166 if (err) {
2167 error_propagate(errp, err);
2168 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002169 return;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002170 }
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002171 } else {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002172 new_block->host = phys_mem_alloc(new_block->max_length,
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002173 &new_block->mr->align, shared);
Markus Armbruster39228252013-07-31 15:11:11 +02002174 if (!new_block->host) {
Hu Taoef701d72014-09-09 13:27:54 +08002175 error_setg_errno(errp, errno,
2176 "cannot set up guest memory '%s'",
2177 memory_region_name(new_block->mr));
2178 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002179 return;
Markus Armbruster39228252013-07-31 15:11:11 +02002180 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002181 memory_try_enable_merging(new_block->host, new_block->max_length);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09002182 }
2183 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002184
Li Zhijiandd631692015-07-02 20:18:06 +08002185 new_ram_size = MAX(old_ram_size,
2186 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
2187 if (new_ram_size > old_ram_size) {
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002188 dirty_memory_extend(old_ram_size, new_ram_size);
Li Zhijiandd631692015-07-02 20:18:06 +08002189 }
Mike Day0d53d9f2015-01-21 13:45:24 +01002190 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2191 * QLIST (which has an RCU-friendly variant) does not have insertion at
2192 * tail, so save the last element in last_block.
2193 */
Peter Xu99e15582017-05-12 12:17:39 +08002194 RAMBLOCK_FOREACH(block) {
Mike Day0d53d9f2015-01-21 13:45:24 +01002195 last_block = block;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002196 if (block->max_length < new_block->max_length) {
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002197 break;
2198 }
2199 }
2200 if (block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002201 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002202 } else if (last_block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002203 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002204 } else { /* list is empty */
Mike Day0dc3f442013-09-05 14:41:35 -04002205 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002206 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002207 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06002208
Mike Day0dc3f442013-09-05 14:41:35 -04002209 /* Write list before version */
2210 smp_wmb();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002211 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002212 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002213
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002214 cpu_physical_memory_set_dirty_range(new_block->offset,
Paolo Bonzini58d27072015-03-23 11:56:01 +01002215 new_block->used_length,
2216 DIRTY_CLIENTS_ALL);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002217
Paolo Bonzinia904c912015-01-21 16:18:35 +01002218 if (new_block->host) {
2219 qemu_ram_setup_dump(new_block->host, new_block->max_length);
2220 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
Cao jinc2cd6272016-09-12 14:34:56 +08002221 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
Paolo Bonzinia904c912015-01-21 16:18:35 +01002222 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
Paolo Bonzini0987d732016-12-21 00:31:36 +08002223 ram_block_notify_add(new_block->host, new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002224 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002225}
2226
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002227#ifdef __linux__
Marc-André Lureau38b33622017-06-02 18:12:23 +04002228RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
2229 bool share, int fd,
2230 Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002231{
2232 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002233 Error *local_err = NULL;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002234 int64_t file_size;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002235
2236 if (xen_enabled()) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002237 error_setg(errp, "-mem-path not supported with Xen");
Fam Zheng528f46a2016-03-01 14:18:18 +08002238 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002239 }
2240
Marc-André Lureaue45e7ae2017-06-02 18:12:21 +04002241 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2242 error_setg(errp,
2243 "host lacks kvm mmu notifiers, -mem-path unsupported");
2244 return NULL;
2245 }
2246
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002247 if (phys_mem_alloc != qemu_anon_ram_alloc) {
2248 /*
2249 * file_ram_alloc() needs to allocate just like
2250 * phys_mem_alloc, but we haven't bothered to provide
2251 * a hook there.
2252 */
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002253 error_setg(errp,
2254 "-mem-path not supported with this accelerator");
Fam Zheng528f46a2016-03-01 14:18:18 +08002255 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002256 }
2257
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002258 size = HOST_PAGE_ALIGN(size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002259 file_size = get_file_size(fd);
2260 if (file_size > 0 && file_size < size) {
2261 error_setg(errp, "backing store %s size 0x%" PRIx64
2262 " does not match 'size' option 0x" RAM_ADDR_FMT,
2263 mem_path, file_size, size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002264 return NULL;
2265 }
2266
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002267 new_block = g_malloc0(sizeof(*new_block));
2268 new_block->mr = mr;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002269 new_block->used_length = size;
2270 new_block->max_length = size;
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002271 new_block->flags = share ? RAM_SHARED : 0;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002272 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp);
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002273 if (!new_block->host) {
2274 g_free(new_block);
Fam Zheng528f46a2016-03-01 14:18:18 +08002275 return NULL;
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002276 }
2277
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002278 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002279 if (local_err) {
2280 g_free(new_block);
2281 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002282 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002283 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002284 return new_block;
Marc-André Lureau38b33622017-06-02 18:12:23 +04002285
2286}
2287
2288
2289RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
2290 bool share, const char *mem_path,
2291 Error **errp)
2292{
2293 int fd;
2294 bool created;
2295 RAMBlock *block;
2296
2297 fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp);
2298 if (fd < 0) {
2299 return NULL;
2300 }
2301
2302 block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
2303 if (!block) {
2304 if (created) {
2305 unlink(mem_path);
2306 }
2307 close(fd);
2308 return NULL;
2309 }
2310
2311 return block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002312}
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002313#endif
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002314
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002315static
Fam Zheng528f46a2016-03-01 14:18:18 +08002316RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2317 void (*resized)(const char*,
2318 uint64_t length,
2319 void *host),
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002320 void *host, bool resizeable, bool share,
Fam Zheng528f46a2016-03-01 14:18:18 +08002321 MemoryRegion *mr, Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002322{
2323 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002324 Error *local_err = NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002325
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002326 size = HOST_PAGE_ALIGN(size);
2327 max_size = HOST_PAGE_ALIGN(max_size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002328 new_block = g_malloc0(sizeof(*new_block));
2329 new_block->mr = mr;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002330 new_block->resized = resized;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002331 new_block->used_length = size;
2332 new_block->max_length = max_size;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002333 assert(max_size >= size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002334 new_block->fd = -1;
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002335 new_block->page_size = getpagesize();
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002336 new_block->host = host;
2337 if (host) {
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002338 new_block->flags |= RAM_PREALLOC;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002339 }
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002340 if (resizeable) {
2341 new_block->flags |= RAM_RESIZEABLE;
2342 }
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002343 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002344 if (local_err) {
2345 g_free(new_block);
2346 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002347 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002348 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002349 return new_block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002350}
2351
Fam Zheng528f46a2016-03-01 14:18:18 +08002352RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002353 MemoryRegion *mr, Error **errp)
2354{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002355 return qemu_ram_alloc_internal(size, size, NULL, host, false,
2356 false, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002357}
2358
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002359RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share,
2360 MemoryRegion *mr, Error **errp)
pbrook94a6b542009-04-11 17:15:54 +00002361{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002362 return qemu_ram_alloc_internal(size, size, NULL, NULL, false,
2363 share, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002364}
2365
Fam Zheng528f46a2016-03-01 14:18:18 +08002366RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002367 void (*resized)(const char*,
2368 uint64_t length,
2369 void *host),
2370 MemoryRegion *mr, Error **errp)
2371{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002372 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true,
2373 false, mr, errp);
pbrook94a6b542009-04-11 17:15:54 +00002374}
bellarde9a1ab12007-02-08 23:08:38 +00002375
Paolo Bonzini43771532013-09-09 17:58:40 +02002376static void reclaim_ramblock(RAMBlock *block)
2377{
2378 if (block->flags & RAM_PREALLOC) {
2379 ;
2380 } else if (xen_enabled()) {
2381 xen_invalidate_map_cache_entry(block->host);
2382#ifndef _WIN32
2383 } else if (block->fd >= 0) {
Eduardo Habkost2f3a2bb2015-11-06 20:11:21 -02002384 qemu_ram_munmap(block->host, block->max_length);
Paolo Bonzini43771532013-09-09 17:58:40 +02002385 close(block->fd);
2386#endif
2387 } else {
2388 qemu_anon_ram_free(block->host, block->max_length);
2389 }
2390 g_free(block);
2391}
2392
Fam Zhengf1060c52016-03-01 14:18:22 +08002393void qemu_ram_free(RAMBlock *block)
bellarde9a1ab12007-02-08 23:08:38 +00002394{
Marc-André Lureau85bc2a12016-03-29 13:20:51 +02002395 if (!block) {
2396 return;
2397 }
2398
Paolo Bonzini0987d732016-12-21 00:31:36 +08002399 if (block->host) {
2400 ram_block_notify_remove(block->host, block->max_length);
2401 }
2402
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002403 qemu_mutex_lock_ramlist();
Fam Zhengf1060c52016-03-01 14:18:22 +08002404 QLIST_REMOVE_RCU(block, next);
2405 ram_list.mru_block = NULL;
2406 /* Write list before version */
2407 smp_wmb();
2408 ram_list.version++;
2409 call_rcu(block, reclaim_ramblock, rcu);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002410 qemu_mutex_unlock_ramlist();
bellarde9a1ab12007-02-08 23:08:38 +00002411}
2412
Huang Yingcd19cfa2011-03-02 08:56:19 +01002413#ifndef _WIN32
2414void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2415{
2416 RAMBlock *block;
2417 ram_addr_t offset;
2418 int flags;
2419 void *area, *vaddr;
2420
Peter Xu99e15582017-05-12 12:17:39 +08002421 RAMBLOCK_FOREACH(block) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002422 offset = addr - block->offset;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002423 if (offset < block->max_length) {
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02002424 vaddr = ramblock_ptr(block, offset);
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002425 if (block->flags & RAM_PREALLOC) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002426 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02002427 } else if (xen_enabled()) {
2428 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01002429 } else {
2430 flags = MAP_FIXED;
Markus Armbruster3435f392013-07-31 15:11:07 +02002431 if (block->fd >= 0) {
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002432 flags |= (block->flags & RAM_SHARED ?
2433 MAP_SHARED : MAP_PRIVATE);
Markus Armbruster3435f392013-07-31 15:11:07 +02002434 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2435 flags, block->fd, offset);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002436 } else {
Markus Armbruster2eb9fba2013-07-31 15:11:09 +02002437 /*
2438 * Remap needs to match alloc. Accelerators that
2439 * set phys_mem_alloc never remap. If they did,
2440 * we'd need a remap hook here.
2441 */
2442 assert(phys_mem_alloc == qemu_anon_ram_alloc);
2443
Huang Yingcd19cfa2011-03-02 08:56:19 +01002444 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
2445 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2446 flags, -1, 0);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002447 }
2448 if (area != vaddr) {
Alistair Francis493d89b2018-02-03 09:43:14 +01002449 error_report("Could not remap addr: "
2450 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2451 length, addr);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002452 exit(1);
2453 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002454 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04002455 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002456 }
Huang Yingcd19cfa2011-03-02 08:56:19 +01002457 }
2458 }
2459}
2460#endif /* !_WIN32 */
2461
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002462/* Return a host pointer to ram allocated with qemu_ram_alloc.
Mike Dayae3a7042013-09-05 14:41:35 -04002463 * This should not be used for general purpose DMA. Use address_space_map
2464 * or address_space_rw instead. For local memory (e.g. video ram) that the
2465 * device owns, use memory_region_get_ram_ptr.
Mike Day0dc3f442013-09-05 14:41:35 -04002466 *
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002467 * Called within RCU critical section.
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002468 */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002469void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002470{
Gonglei3655cb92016-02-20 10:35:20 +08002471 RAMBlock *block = ram_block;
2472
2473 if (block == NULL) {
2474 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002475 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002476 }
Mike Dayae3a7042013-09-05 14:41:35 -04002477
2478 if (xen_enabled() && block->host == NULL) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002479 /* We need to check if the requested address is in the RAM
2480 * because we don't want to map the entire memory in QEMU.
2481 * In that case just map until the end of the page.
2482 */
2483 if (block->offset == 0) {
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002484 return xen_map_cache(addr, 0, 0, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002485 }
Mike Dayae3a7042013-09-05 14:41:35 -04002486
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002487 block->host = xen_map_cache(block->offset, block->max_length, 1, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002488 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002489 return ramblock_ptr(block, addr);
pbrookdc828ca2009-04-09 22:21:07 +00002490}
2491
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002492/* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
Mike Dayae3a7042013-09-05 14:41:35 -04002493 * but takes a size argument.
Mike Day0dc3f442013-09-05 14:41:35 -04002494 *
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002495 * Called within RCU critical section.
Mike Dayae3a7042013-09-05 14:41:35 -04002496 */
Gonglei3655cb92016-02-20 10:35:20 +08002497static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002498 hwaddr *size, bool lock)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002499{
Gonglei3655cb92016-02-20 10:35:20 +08002500 RAMBlock *block = ram_block;
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002501 if (*size == 0) {
2502 return NULL;
2503 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002504
Gonglei3655cb92016-02-20 10:35:20 +08002505 if (block == NULL) {
2506 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002507 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002508 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002509 *size = MIN(*size, block->max_length - addr);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002510
2511 if (xen_enabled() && block->host == NULL) {
2512 /* We need to check if the requested address is in the RAM
2513 * because we don't want to map the entire memory in QEMU.
2514 * In that case just map the requested area.
2515 */
2516 if (block->offset == 0) {
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002517 return xen_map_cache(addr, *size, lock, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002518 }
2519
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002520 block->host = xen_map_cache(block->offset, block->max_length, 1, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002521 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002522
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002523 return ramblock_ptr(block, addr);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002524}
2525
Dr. David Alan Gilbertf90bb712018-03-12 17:20:57 +00002526/* Return the offset of a hostpointer within a ramblock */
2527ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2528{
2529 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2530 assert((uintptr_t)host >= (uintptr_t)rb->host);
2531 assert(res < rb->max_length);
2532
2533 return res;
2534}
2535
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002536/*
2537 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2538 * in that RAMBlock.
2539 *
2540 * ptr: Host pointer to look up
2541 * round_offset: If true round the result offset down to a page boundary
2542 * *ram_addr: set to result ram_addr
2543 * *offset: set to result offset within the RAMBlock
2544 *
2545 * Returns: RAMBlock (or NULL if not found)
Mike Dayae3a7042013-09-05 14:41:35 -04002546 *
2547 * By the time this function returns, the returned pointer is not protected
2548 * by RCU anymore. If the caller is not within an RCU critical section and
2549 * does not hold the iothread lock, it must have other means of protecting the
2550 * pointer, such as a reference to the region that includes the incoming
2551 * ram_addr_t.
2552 */
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002553RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002554 ram_addr_t *offset)
pbrook5579c7f2009-04-11 14:47:08 +00002555{
pbrook94a6b542009-04-11 17:15:54 +00002556 RAMBlock *block;
2557 uint8_t *host = ptr;
2558
Jan Kiszka868bb332011-06-21 22:59:09 +02002559 if (xen_enabled()) {
Paolo Bonzinif615f392016-05-26 10:07:50 +02002560 ram_addr_t ram_addr;
Mike Day0dc3f442013-09-05 14:41:35 -04002561 rcu_read_lock();
Paolo Bonzinif615f392016-05-26 10:07:50 +02002562 ram_addr = xen_ram_addr_from_mapcache(ptr);
2563 block = qemu_get_ram_block(ram_addr);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002564 if (block) {
Anthony PERARDd6b6aec2016-06-09 16:56:17 +01002565 *offset = ram_addr - block->offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002566 }
Mike Day0dc3f442013-09-05 14:41:35 -04002567 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002568 return block;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01002569 }
2570
Mike Day0dc3f442013-09-05 14:41:35 -04002571 rcu_read_lock();
2572 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002573 if (block && block->host && host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002574 goto found;
2575 }
2576
Peter Xu99e15582017-05-12 12:17:39 +08002577 RAMBLOCK_FOREACH(block) {
Jun Nakajima432d2682010-08-31 16:41:25 +01002578 /* This case append when the block is not mapped. */
2579 if (block->host == NULL) {
2580 continue;
2581 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002582 if (host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002583 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06002584 }
pbrook94a6b542009-04-11 17:15:54 +00002585 }
Jun Nakajima432d2682010-08-31 16:41:25 +01002586
Mike Day0dc3f442013-09-05 14:41:35 -04002587 rcu_read_unlock();
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002588 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02002589
2590found:
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002591 *offset = (host - block->host);
2592 if (round_offset) {
2593 *offset &= TARGET_PAGE_MASK;
2594 }
Mike Day0dc3f442013-09-05 14:41:35 -04002595 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002596 return block;
2597}
2598
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002599/*
2600 * Finds the named RAMBlock
2601 *
2602 * name: The name of RAMBlock to find
2603 *
2604 * Returns: RAMBlock (or NULL if not found)
2605 */
2606RAMBlock *qemu_ram_block_by_name(const char *name)
2607{
2608 RAMBlock *block;
2609
Peter Xu99e15582017-05-12 12:17:39 +08002610 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002611 if (!strcmp(name, block->idstr)) {
2612 return block;
2613 }
2614 }
2615
2616 return NULL;
2617}
2618
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002619/* Some of the softmmu routines need to translate from a host pointer
2620 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002621ram_addr_t qemu_ram_addr_from_host(void *ptr)
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002622{
2623 RAMBlock *block;
Paolo Bonzinif615f392016-05-26 10:07:50 +02002624 ram_addr_t offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002625
Paolo Bonzinif615f392016-05-26 10:07:50 +02002626 block = qemu_ram_block_from_host(ptr, false, &offset);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002627 if (!block) {
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002628 return RAM_ADDR_INVALID;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002629 }
2630
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002631 return block->offset + offset;
Marcelo Tosattie8902612010-10-11 15:31:19 -03002632}
Alex Williamsonf471a172010-06-11 11:11:42 -06002633
Peter Maydell27266272017-11-20 18:08:27 +00002634/* Called within RCU critical section. */
2635void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
2636 CPUState *cpu,
2637 vaddr mem_vaddr,
2638 ram_addr_t ram_addr,
2639 unsigned size)
2640{
2641 ndi->cpu = cpu;
2642 ndi->ram_addr = ram_addr;
2643 ndi->mem_vaddr = mem_vaddr;
2644 ndi->size = size;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002645 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002646
2647 assert(tcg_enabled());
2648 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002649 ndi->pages = page_collection_lock(ram_addr, ram_addr + size);
2650 tb_invalidate_phys_page_fast(ndi->pages, ram_addr, size);
Peter Maydell27266272017-11-20 18:08:27 +00002651 }
2652}
2653
2654/* Called within RCU critical section. */
2655void memory_notdirty_write_complete(NotDirtyInfo *ndi)
2656{
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002657 if (ndi->pages) {
2658 page_collection_unlock(ndi->pages);
2659 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002660 }
2661
2662 /* Set both VGA and migration bits for simplicity and to remove
2663 * the notdirty callback faster.
2664 */
2665 cpu_physical_memory_set_dirty_range(ndi->ram_addr, ndi->size,
2666 DIRTY_CLIENTS_NOCODE);
2667 /* we remove the notdirty callback only if the code has been
2668 flushed */
2669 if (!cpu_physical_memory_is_clean(ndi->ram_addr)) {
2670 tlb_set_dirty(ndi->cpu, ndi->mem_vaddr);
2671 }
2672}
2673
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002674/* Called within RCU critical section. */
Avi Kivitya8170e52012-10-23 12:30:10 +02002675static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002676 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00002677{
Peter Maydell27266272017-11-20 18:08:27 +00002678 NotDirtyInfo ndi;
Alex Bennéeba051fb2016-10-27 16:10:16 +01002679
Peter Maydell27266272017-11-20 18:08:27 +00002680 memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr,
2681 ram_addr, size);
2682
Peter Maydell6d3ede52018-06-15 14:57:14 +01002683 stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val);
Peter Maydell27266272017-11-20 18:08:27 +00002684 memory_notdirty_write_complete(&ndi);
bellard1ccde1c2004-02-06 19:46:14 +00002685}
2686
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002687static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002688 unsigned size, bool is_write,
2689 MemTxAttrs attrs)
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002690{
2691 return is_write;
2692}
2693
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002694static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002695 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002696 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002697 .endianness = DEVICE_NATIVE_ENDIAN,
Andrew Baumannad528782017-10-13 11:19:13 -07002698 .valid = {
2699 .min_access_size = 1,
2700 .max_access_size = 8,
2701 .unaligned = false,
2702 },
2703 .impl = {
2704 .min_access_size = 1,
2705 .max_access_size = 8,
2706 .unaligned = false,
2707 },
bellard1ccde1c2004-02-06 19:46:14 +00002708};
2709
pbrook0f459d12008-06-09 00:20:13 +00002710/* Generate a debug exception if a watchpoint has been hit. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002711static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
pbrook0f459d12008-06-09 00:20:13 +00002712{
Andreas Färber93afead2013-08-26 03:41:01 +02002713 CPUState *cpu = current_cpu;
Sergey Fedorov568496c2016-02-11 11:17:32 +00002714 CPUClass *cc = CPU_GET_CLASS(cpu);
pbrook0f459d12008-06-09 00:20:13 +00002715 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00002716 CPUWatchpoint *wp;
pbrook0f459d12008-06-09 00:20:13 +00002717
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02002718 assert(tcg_enabled());
Andreas Färberff4700b2013-08-26 18:23:18 +02002719 if (cpu->watchpoint_hit) {
aliguori06d55cc2008-11-18 20:24:06 +00002720 /* We re-entered the check after replacing the TB. Now raise
2721 * the debug interrupt so that is will trigger after the
2722 * current instruction. */
Andreas Färber93afead2013-08-26 03:41:01 +02002723 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00002724 return;
2725 }
Andreas Färber93afead2013-08-26 03:41:01 +02002726 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Julian Brown40612002017-02-07 18:29:59 +00002727 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
Andreas Färberff4700b2013-08-26 18:23:18 +02002728 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01002729 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2730 && (wp->flags & flags)) {
Peter Maydell08225672014-09-12 14:06:48 +01002731 if (flags == BP_MEM_READ) {
2732 wp->flags |= BP_WATCHPOINT_HIT_READ;
2733 } else {
2734 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2735 }
2736 wp->hitaddr = vaddr;
Peter Maydell66b9b432015-04-26 16:49:24 +01002737 wp->hitattrs = attrs;
Andreas Färberff4700b2013-08-26 18:23:18 +02002738 if (!cpu->watchpoint_hit) {
Sergey Fedorov568496c2016-02-11 11:17:32 +00002739 if (wp->flags & BP_CPU &&
2740 !cc->debug_check_watchpoint(cpu, wp)) {
2741 wp->flags &= ~BP_WATCHPOINT_HIT;
2742 continue;
2743 }
Andreas Färberff4700b2013-08-26 18:23:18 +02002744 cpu->watchpoint_hit = wp;
KONRAD Frederica5e99822016-10-27 16:10:06 +01002745
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002746 mmap_lock();
Andreas Färber239c51a2013-09-01 17:12:23 +02002747 tb_check_watchpoint(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002748 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
Andreas Färber27103422013-08-26 08:31:06 +02002749 cpu->exception_index = EXCP_DEBUG;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002750 mmap_unlock();
Andreas Färber5638d182013-08-27 17:52:12 +02002751 cpu_loop_exit(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002752 } else {
Richard Henderson9b990ee2017-10-13 10:50:02 -07002753 /* Force execution of one insn next time. */
2754 cpu->cflags_next_tb = 1 | curr_cflags();
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002755 mmap_unlock();
Peter Maydell6886b982016-05-17 15:18:04 +01002756 cpu_loop_exit_noexc(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002757 }
aliguori06d55cc2008-11-18 20:24:06 +00002758 }
aliguori6e140f22008-11-18 20:37:55 +00002759 } else {
2760 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00002761 }
2762 }
2763}
2764
pbrook6658ffb2007-03-16 23:58:11 +00002765/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2766 so these check for a hit then pass through to the normal out-of-line
2767 phys routines. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002768static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2769 unsigned size, MemTxAttrs attrs)
pbrook6658ffb2007-03-16 23:58:11 +00002770{
Peter Maydell66b9b432015-04-26 16:49:24 +01002771 MemTxResult res;
2772 uint64_t data;
Peter Maydell79ed0412016-01-21 14:15:06 +00002773 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2774 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
pbrook6658ffb2007-03-16 23:58:11 +00002775
Peter Maydell66b9b432015-04-26 16:49:24 +01002776 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
Avi Kivity1ec9b902012-01-02 12:47:48 +02002777 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04002778 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002779 data = address_space_ldub(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002780 break;
2781 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002782 data = address_space_lduw(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002783 break;
2784 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002785 data = address_space_ldl(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002786 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002787 case 8:
2788 data = address_space_ldq(as, addr, attrs, &res);
2789 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02002790 default: abort();
2791 }
Peter Maydell66b9b432015-04-26 16:49:24 +01002792 *pdata = data;
2793 return res;
2794}
2795
2796static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2797 uint64_t val, unsigned size,
2798 MemTxAttrs attrs)
2799{
2800 MemTxResult res;
Peter Maydell79ed0412016-01-21 14:15:06 +00002801 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2802 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
Peter Maydell66b9b432015-04-26 16:49:24 +01002803
2804 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2805 switch (size) {
2806 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002807 address_space_stb(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002808 break;
2809 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002810 address_space_stw(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002811 break;
2812 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002813 address_space_stl(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002814 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002815 case 8:
2816 address_space_stq(as, addr, val, attrs, &res);
2817 break;
Peter Maydell66b9b432015-04-26 16:49:24 +01002818 default: abort();
2819 }
2820 return res;
pbrook6658ffb2007-03-16 23:58:11 +00002821}
2822
Avi Kivity1ec9b902012-01-02 12:47:48 +02002823static const MemoryRegionOps watch_mem_ops = {
Peter Maydell66b9b432015-04-26 16:49:24 +01002824 .read_with_attrs = watch_mem_read,
2825 .write_with_attrs = watch_mem_write,
Avi Kivity1ec9b902012-01-02 12:47:48 +02002826 .endianness = DEVICE_NATIVE_ENDIAN,
Paolo Bonzini306526b2017-10-17 14:16:05 +02002827 .valid = {
2828 .min_access_size = 1,
2829 .max_access_size = 8,
2830 .unaligned = false,
2831 },
2832 .impl = {
2833 .min_access_size = 1,
2834 .max_access_size = 8,
2835 .unaligned = false,
2836 },
pbrook6658ffb2007-03-16 23:58:11 +00002837};
pbrook6658ffb2007-03-16 23:58:11 +00002838
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01002839static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2840 MemTxAttrs attrs, uint8_t *buf, int len);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002841static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2842 const uint8_t *buf, int len);
2843static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01002844 bool is_write, MemTxAttrs attrs);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002845
Peter Maydellf25a49e2015-04-26 16:49:24 +01002846static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2847 unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002848{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002849 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002850 uint8_t buf[8];
Peter Maydell5c9eb022015-04-26 16:49:24 +01002851 MemTxResult res;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002852
blueswir1db7b5422007-05-26 17:36:03 +00002853#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002854 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002855 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00002856#endif
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002857 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
Peter Maydell5c9eb022015-04-26 16:49:24 +01002858 if (res) {
2859 return res;
Peter Maydellf25a49e2015-04-26 16:49:24 +01002860 }
Peter Maydell6d3ede52018-06-15 14:57:14 +01002861 *data = ldn_p(buf, len);
2862 return MEMTX_OK;
blueswir1db7b5422007-05-26 17:36:03 +00002863}
2864
Peter Maydellf25a49e2015-04-26 16:49:24 +01002865static MemTxResult subpage_write(void *opaque, hwaddr addr,
2866 uint64_t value, unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002867{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002868 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002869 uint8_t buf[8];
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002870
blueswir1db7b5422007-05-26 17:36:03 +00002871#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002872 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002873 " value %"PRIx64"\n",
2874 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00002875#endif
Peter Maydell6d3ede52018-06-15 14:57:14 +01002876 stn_p(buf, len, value);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002877 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00002878}
2879
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002880static bool subpage_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002881 unsigned len, bool is_write,
2882 MemTxAttrs attrs)
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002883{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002884 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002885#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002886 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002887 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002888#endif
2889
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002890 return flatview_access_valid(subpage->fv, addr + subpage->base,
Peter Maydelleace72b2018-05-31 14:50:52 +01002891 len, is_write, attrs);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002892}
2893
Avi Kivity70c68e42012-01-02 12:32:48 +02002894static const MemoryRegionOps subpage_ops = {
Peter Maydellf25a49e2015-04-26 16:49:24 +01002895 .read_with_attrs = subpage_read,
2896 .write_with_attrs = subpage_write,
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002897 .impl.min_access_size = 1,
2898 .impl.max_access_size = 8,
2899 .valid.min_access_size = 1,
2900 .valid.max_access_size = 8,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002901 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02002902 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00002903};
2904
Anthony Liguoric227f092009-10-01 16:12:16 -05002905static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02002906 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00002907{
2908 int idx, eidx;
2909
2910 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2911 return -1;
2912 idx = SUBPAGE_IDX(start);
2913 eidx = SUBPAGE_IDX(end);
2914#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002915 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2916 __func__, mmio, start, end, idx, eidx, section);
blueswir1db7b5422007-05-26 17:36:03 +00002917#endif
blueswir1db7b5422007-05-26 17:36:03 +00002918 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02002919 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00002920 }
2921
2922 return 0;
2923}
2924
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002925static subpage_t *subpage_init(FlatView *fv, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00002926{
Anthony Liguoric227f092009-10-01 16:12:16 -05002927 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00002928
Vijaya Kumar K2615fab2016-10-24 16:26:49 +01002929 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002930 mmio->fv = fv;
aliguori1eec6142009-02-05 22:06:18 +00002931 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002932 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07002933 NULL, TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02002934 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00002935#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002936 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2937 mmio, base, TARGET_PAGE_SIZE);
blueswir1db7b5422007-05-26 17:36:03 +00002938#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02002939 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00002940
2941 return mmio;
2942}
2943
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002944static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
Avi Kivity5312bd82012-02-12 18:32:55 +02002945{
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002946 assert(fv);
Avi Kivity5312bd82012-02-12 18:32:55 +02002947 MemoryRegionSection section = {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002948 .fv = fv,
Avi Kivity5312bd82012-02-12 18:32:55 +02002949 .mr = mr,
2950 .offset_within_address_space = 0,
2951 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02002952 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02002953 };
2954
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002955 return phys_section_add(map, &section);
Avi Kivity5312bd82012-02-12 18:32:55 +02002956}
2957
Peter Maydell8af36742017-12-13 17:52:28 +00002958static void readonly_mem_write(void *opaque, hwaddr addr,
2959 uint64_t val, unsigned size)
2960{
2961 /* Ignore any write to ROM. */
2962}
2963
2964static bool readonly_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002965 unsigned size, bool is_write,
2966 MemTxAttrs attrs)
Peter Maydell8af36742017-12-13 17:52:28 +00002967{
2968 return is_write;
2969}
2970
2971/* This will only be used for writes, because reads are special cased
2972 * to directly access the underlying host ram.
2973 */
2974static const MemoryRegionOps readonly_mem_ops = {
2975 .write = readonly_mem_write,
2976 .valid.accepts = readonly_mem_accepts,
2977 .endianness = DEVICE_NATIVE_ENDIAN,
2978 .valid = {
2979 .min_access_size = 1,
2980 .max_access_size = 8,
2981 .unaligned = false,
2982 },
2983 .impl = {
2984 .min_access_size = 1,
2985 .max_access_size = 8,
2986 .unaligned = false,
2987 },
2988};
2989
Peter Maydell2d54f192018-06-15 14:57:14 +01002990MemoryRegionSection *iotlb_to_section(CPUState *cpu,
2991 hwaddr index, MemTxAttrs attrs)
Avi Kivityaa102232012-03-08 17:06:55 +02002992{
Peter Maydella54c87b2016-01-21 14:15:05 +00002993 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2994 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
Peter Maydell32857f42015-10-01 15:29:50 +01002995 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01002996 MemoryRegionSection *sections = d->map.sections;
Paolo Bonzini9d82b5a2013-08-16 08:26:30 +02002997
Peter Maydell2d54f192018-06-15 14:57:14 +01002998 return &sections[index & ~TARGET_PAGE_MASK];
Avi Kivityaa102232012-03-08 17:06:55 +02002999}
3000
Avi Kivitye9179ce2009-06-14 11:38:52 +03003001static void io_mem_init(void)
3002{
Peter Maydell8af36742017-12-13 17:52:28 +00003003 memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops,
3004 NULL, NULL, UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003005 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003006 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003007
3008 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
3009 * which can be called without the iothread mutex.
3010 */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003011 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003012 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003013 memory_region_clear_global_locking(&io_mem_notdirty);
3014
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003015 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003016 NULL, UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03003017}
3018
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10003019AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
Avi Kivityac1970f2012-10-03 16:22:53 +02003020{
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003021 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
3022 uint16_t n;
3023
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003024 n = dummy_section(&d->map, fv, &io_mem_unassigned);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003025 assert(n == PHYS_SECTION_UNASSIGNED);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003026 n = dummy_section(&d->map, fv, &io_mem_notdirty);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003027 assert(n == PHYS_SECTION_NOTDIRTY);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003028 n = dummy_section(&d->map, fv, &io_mem_rom);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003029 assert(n == PHYS_SECTION_ROM);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003030 n = dummy_section(&d->map, fv, &io_mem_watch);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003031 assert(n == PHYS_SECTION_WATCH);
Paolo Bonzini00752702013-05-29 12:13:54 +02003032
Michael S. Tsirkin9736e552013-11-11 14:42:43 +02003033 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003034
3035 return d;
Paolo Bonzini00752702013-05-29 12:13:54 +02003036}
3037
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003038void address_space_dispatch_free(AddressSpaceDispatch *d)
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01003039{
3040 phys_sections_free(&d->map);
3041 g_free(d);
3042}
3043
Avi Kivity1d711482012-10-02 18:54:45 +02003044static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02003045{
Peter Maydell32857f42015-10-01 15:29:50 +01003046 CPUAddressSpace *cpuas;
3047 AddressSpaceDispatch *d;
Avi Kivity117712c2012-02-12 21:23:17 +02003048
3049 /* since each CPU stores ram addresses in its TLB cache, we must
3050 reset the modified entries */
Peter Maydell32857f42015-10-01 15:29:50 +01003051 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
3052 cpu_reloading_memory_map();
3053 /* The CPU and TLB are protected by the iothread lock.
3054 * We reload the dispatch pointer now because cpu_reloading_memory_map()
3055 * may have split the RCU critical section.
3056 */
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003057 d = address_space_to_dispatch(cpuas->as);
Alex Bennéef35e44e2016-10-21 16:34:18 +01003058 atomic_rcu_set(&cpuas->memory_dispatch, d);
Alex Bennéed10eb082016-11-14 14:17:28 +00003059 tlb_flush(cpuas->cpu);
Avi Kivity50c1e142012-02-08 21:36:02 +02003060}
3061
Avi Kivity62152b82011-07-26 14:26:14 +03003062static void memory_map_init(void)
3063{
Anthony Liguori7267c092011-08-20 22:09:37 -05003064 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini03f49952013-11-07 17:14:36 +01003065
Paolo Bonzini57271d62013-11-07 17:14:37 +01003066 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003067 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03003068
Anthony Liguori7267c092011-08-20 22:09:37 -05003069 system_io = g_malloc(sizeof(*system_io));
Jan Kiszka3bb28b72013-09-02 18:43:30 +02003070 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
3071 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003072 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity62152b82011-07-26 14:26:14 +03003073}
3074
3075MemoryRegion *get_system_memory(void)
3076{
3077 return system_memory;
3078}
3079
Avi Kivity309cb472011-08-08 16:09:03 +03003080MemoryRegion *get_system_io(void)
3081{
3082 return system_io;
3083}
3084
pbrooke2eef172008-06-08 01:09:01 +00003085#endif /* !defined(CONFIG_USER_ONLY) */
3086
bellard13eb76e2004-01-24 15:23:36 +00003087/* physical memory access (slow version, mainly for debug) */
3088#if defined(CONFIG_USER_ONLY)
Andreas Färberf17ec442013-06-29 19:40:58 +02003089int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Paul Brooka68fe892010-03-01 00:08:59 +00003090 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003091{
3092 int l, flags;
3093 target_ulong page;
pbrook53a59602006-03-25 19:31:22 +00003094 void * p;
bellard13eb76e2004-01-24 15:23:36 +00003095
3096 while (len > 0) {
3097 page = addr & TARGET_PAGE_MASK;
3098 l = (page + TARGET_PAGE_SIZE) - addr;
3099 if (l > len)
3100 l = len;
3101 flags = page_get_flags(page);
3102 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00003103 return -1;
bellard13eb76e2004-01-24 15:23:36 +00003104 if (is_write) {
3105 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00003106 return -1;
bellard579a97f2007-11-11 14:26:47 +00003107 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003108 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00003109 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003110 memcpy(p, buf, l);
3111 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00003112 } else {
3113 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00003114 return -1;
bellard579a97f2007-11-11 14:26:47 +00003115 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003116 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00003117 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003118 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00003119 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00003120 }
3121 len -= l;
3122 buf += l;
3123 addr += l;
3124 }
Paul Brooka68fe892010-03-01 00:08:59 +00003125 return 0;
bellard13eb76e2004-01-24 15:23:36 +00003126}
bellard8df1cd02005-01-28 22:37:22 +00003127
bellard13eb76e2004-01-24 15:23:36 +00003128#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003129
Paolo Bonzini845b6212015-03-23 11:45:53 +01003130static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
Avi Kivitya8170e52012-10-23 12:30:10 +02003131 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003132{
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003133 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003134 addr += memory_region_get_ram_addr(mr);
3135
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003136 /* No early return if dirty_log_mask is or becomes 0, because
3137 * cpu_physical_memory_set_dirty_range will still call
3138 * xen_modified_memory.
3139 */
3140 if (dirty_log_mask) {
3141 dirty_log_mask =
3142 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003143 }
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003144 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02003145 assert(tcg_enabled());
Emilio G. Cota0ac20312017-08-04 23:46:31 -04003146 mmap_lock();
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003147 tb_invalidate_phys_range(addr, addr + length);
Emilio G. Cota0ac20312017-08-04 23:46:31 -04003148 mmap_unlock();
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003149 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
3150 }
3151 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003152}
3153
Richard Henderson23326162013-07-08 14:55:59 -07003154static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02003155{
Paolo Bonzinie1622f42013-07-17 13:17:41 +02003156 unsigned access_size_max = mr->ops->valid.max_access_size;
Richard Henderson23326162013-07-08 14:55:59 -07003157
3158 /* Regions are assumed to support 1-4 byte accesses unless
3159 otherwise specified. */
Richard Henderson23326162013-07-08 14:55:59 -07003160 if (access_size_max == 0) {
3161 access_size_max = 4;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003162 }
Richard Henderson23326162013-07-08 14:55:59 -07003163
3164 /* Bound the maximum access by the alignment of the address. */
3165 if (!mr->ops->impl.unaligned) {
3166 unsigned align_size_max = addr & -addr;
3167 if (align_size_max != 0 && align_size_max < access_size_max) {
3168 access_size_max = align_size_max;
3169 }
3170 }
3171
3172 /* Don't attempt accesses larger than the maximum. */
3173 if (l > access_size_max) {
3174 l = access_size_max;
3175 }
Peter Maydell6554f5c2015-07-24 13:33:10 +01003176 l = pow2floor(l);
Richard Henderson23326162013-07-08 14:55:59 -07003177
3178 return l;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003179}
3180
Jan Kiszka4840f102015-06-18 18:47:22 +02003181static bool prepare_mmio_access(MemoryRegion *mr)
Paolo Bonzini125b3802015-06-18 18:47:21 +02003182{
Jan Kiszka4840f102015-06-18 18:47:22 +02003183 bool unlocked = !qemu_mutex_iothread_locked();
3184 bool release_lock = false;
3185
3186 if (unlocked && mr->global_locking) {
3187 qemu_mutex_lock_iothread();
3188 unlocked = false;
3189 release_lock = true;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003190 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003191 if (mr->flush_coalesced_mmio) {
3192 if (unlocked) {
3193 qemu_mutex_lock_iothread();
3194 }
3195 qemu_flush_coalesced_mmio_buffer();
3196 if (unlocked) {
3197 qemu_mutex_unlock_iothread();
3198 }
3199 }
3200
3201 return release_lock;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003202}
3203
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003204/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003205static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
3206 MemTxAttrs attrs,
3207 const uint8_t *buf,
3208 int len, hwaddr addr1,
3209 hwaddr l, MemoryRegion *mr)
bellard13eb76e2004-01-24 15:23:36 +00003210{
bellard13eb76e2004-01-24 15:23:36 +00003211 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02003212 uint64_t val;
Peter Maydell3b643492015-04-26 16:49:23 +01003213 MemTxResult result = MEMTX_OK;
Jan Kiszka4840f102015-06-18 18:47:22 +02003214 bool release_lock = false;
ths3b46e622007-09-17 08:09:54 +00003215
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003216 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003217 if (!memory_access_is_direct(mr, true)) {
3218 release_lock |= prepare_mmio_access(mr);
3219 l = memory_access_size(mr, l, addr1);
3220 /* XXX: could force current_cpu to NULL to avoid
3221 potential bugs */
Peter Maydell6d3ede52018-06-15 14:57:14 +01003222 val = ldn_p(buf, l);
3223 result |= memory_region_dispatch_write(mr, addr1, val, l, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003224 } else {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003225 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003226 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003227 memcpy(ptr, buf, l);
3228 invalidate_and_set_dirty(mr, addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00003229 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003230
3231 if (release_lock) {
3232 qemu_mutex_unlock_iothread();
3233 release_lock = false;
3234 }
3235
bellard13eb76e2004-01-24 15:23:36 +00003236 len -= l;
3237 buf += l;
3238 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003239
3240 if (!len) {
3241 break;
3242 }
3243
3244 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003245 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003246 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02003247
Peter Maydell3b643492015-04-26 16:49:23 +01003248 return result;
bellard13eb76e2004-01-24 15:23:36 +00003249}
bellard8df1cd02005-01-28 22:37:22 +00003250
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003251/* Called from RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003252static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
3253 const uint8_t *buf, int len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003254{
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003255 hwaddr l;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003256 hwaddr addr1;
3257 MemoryRegion *mr;
3258 MemTxResult result = MEMTX_OK;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003259
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003260 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003261 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003262 result = flatview_write_continue(fv, addr, attrs, buf, len,
3263 addr1, l, mr);
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003264
3265 return result;
3266}
3267
3268/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003269MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
3270 MemTxAttrs attrs, uint8_t *buf,
3271 int len, hwaddr addr1, hwaddr l,
3272 MemoryRegion *mr)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003273{
3274 uint8_t *ptr;
3275 uint64_t val;
3276 MemTxResult result = MEMTX_OK;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003277 bool release_lock = false;
3278
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003279 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003280 if (!memory_access_is_direct(mr, false)) {
3281 /* I/O case */
3282 release_lock |= prepare_mmio_access(mr);
3283 l = memory_access_size(mr, l, addr1);
Peter Maydell6d3ede52018-06-15 14:57:14 +01003284 result |= memory_region_dispatch_read(mr, addr1, &val, l, attrs);
3285 stn_p(buf, l, val);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003286 } else {
3287 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003288 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003289 memcpy(buf, ptr, l);
3290 }
3291
3292 if (release_lock) {
3293 qemu_mutex_unlock_iothread();
3294 release_lock = false;
3295 }
3296
3297 len -= l;
3298 buf += l;
3299 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003300
3301 if (!len) {
3302 break;
3303 }
3304
3305 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003306 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003307 }
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003308
3309 return result;
3310}
3311
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003312/* Called from RCU critical section. */
3313static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
3314 MemTxAttrs attrs, uint8_t *buf, int len)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003315{
3316 hwaddr l;
3317 hwaddr addr1;
3318 MemoryRegion *mr;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003319
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003320 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003321 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003322 return flatview_read_continue(fv, addr, attrs, buf, len,
3323 addr1, l, mr);
Avi Kivityac1970f2012-10-03 16:22:53 +02003324}
3325
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003326MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
3327 MemTxAttrs attrs, uint8_t *buf, int len)
3328{
3329 MemTxResult result = MEMTX_OK;
3330 FlatView *fv;
3331
3332 if (len > 0) {
3333 rcu_read_lock();
3334 fv = address_space_to_flatview(as);
3335 result = flatview_read(fv, addr, attrs, buf, len);
3336 rcu_read_unlock();
3337 }
3338
3339 return result;
3340}
3341
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003342MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
3343 MemTxAttrs attrs,
3344 const uint8_t *buf, int len)
3345{
3346 MemTxResult result = MEMTX_OK;
3347 FlatView *fv;
3348
3349 if (len > 0) {
3350 rcu_read_lock();
3351 fv = address_space_to_flatview(as);
3352 result = flatview_write(fv, addr, attrs, buf, len);
3353 rcu_read_unlock();
3354 }
3355
3356 return result;
3357}
3358
Paolo Bonzinidb84fd92018-03-05 09:29:04 +01003359MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
3360 uint8_t *buf, int len, bool is_write)
3361{
3362 if (is_write) {
3363 return address_space_write(as, addr, attrs, buf, len);
3364 } else {
3365 return address_space_read_full(as, addr, attrs, buf, len);
3366 }
3367}
3368
Avi Kivitya8170e52012-10-23 12:30:10 +02003369void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02003370 int len, int is_write)
3371{
Peter Maydell5c9eb022015-04-26 16:49:24 +01003372 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3373 buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02003374}
3375
Alexander Graf582b55a2013-12-11 14:17:44 +01003376enum write_rom_type {
3377 WRITE_DATA,
3378 FLUSH_CACHE,
3379};
3380
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003381static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
Alexander Graf582b55a2013-12-11 14:17:44 +01003382 hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
bellardd0ecd2a2006-04-23 17:14:48 +00003383{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003384 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00003385 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003386 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003387 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00003388
Paolo Bonzini41063e12015-03-18 14:21:43 +01003389 rcu_read_lock();
bellardd0ecd2a2006-04-23 17:14:48 +00003390 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003391 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003392 mr = address_space_translate(as, addr, &addr1, &l, true,
3393 MEMTXATTRS_UNSPECIFIED);
ths3b46e622007-09-17 08:09:54 +00003394
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003395 if (!(memory_region_is_ram(mr) ||
3396 memory_region_is_romd(mr))) {
Paolo Bonzinib242e0e2015-07-04 00:24:51 +02003397 l = memory_access_size(mr, l, addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00003398 } else {
bellardd0ecd2a2006-04-23 17:14:48 +00003399 /* ROM/RAM case */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003400 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
Alexander Graf582b55a2013-12-11 14:17:44 +01003401 switch (type) {
3402 case WRITE_DATA:
3403 memcpy(ptr, buf, l);
Paolo Bonzini845b6212015-03-23 11:45:53 +01003404 invalidate_and_set_dirty(mr, addr1, l);
Alexander Graf582b55a2013-12-11 14:17:44 +01003405 break;
3406 case FLUSH_CACHE:
3407 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
3408 break;
3409 }
bellardd0ecd2a2006-04-23 17:14:48 +00003410 }
3411 len -= l;
3412 buf += l;
3413 addr += l;
3414 }
Paolo Bonzini41063e12015-03-18 14:21:43 +01003415 rcu_read_unlock();
bellardd0ecd2a2006-04-23 17:14:48 +00003416}
3417
Alexander Graf582b55a2013-12-11 14:17:44 +01003418/* used for ROM loading : can write in RAM and ROM */
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003419void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
Alexander Graf582b55a2013-12-11 14:17:44 +01003420 const uint8_t *buf, int len)
3421{
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003422 cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
Alexander Graf582b55a2013-12-11 14:17:44 +01003423}
3424
3425void cpu_flush_icache_range(hwaddr start, int len)
3426{
3427 /*
3428 * This function should do the same thing as an icache flush that was
3429 * triggered from within the guest. For TCG we are always cache coherent,
3430 * so there is no need to flush anything. For KVM / Xen we need to flush
3431 * the host's instruction cache at least.
3432 */
3433 if (tcg_enabled()) {
3434 return;
3435 }
3436
Edgar E. Iglesias2a221652013-12-13 16:28:52 +10003437 cpu_physical_memory_write_rom_internal(&address_space_memory,
3438 start, NULL, len, FLUSH_CACHE);
Alexander Graf582b55a2013-12-11 14:17:44 +01003439}
3440
aliguori6d16c2f2009-01-22 16:59:11 +00003441typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003442 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00003443 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02003444 hwaddr addr;
3445 hwaddr len;
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003446 bool in_use;
aliguori6d16c2f2009-01-22 16:59:11 +00003447} BounceBuffer;
3448
3449static BounceBuffer bounce;
3450
aliguoriba223c22009-01-22 16:59:16 +00003451typedef struct MapClient {
Fam Zhenge95205e2015-03-16 17:03:37 +08003452 QEMUBH *bh;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003453 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00003454} MapClient;
3455
Fam Zheng38e047b2015-03-16 17:03:35 +08003456QemuMutex map_client_list_lock;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003457static QLIST_HEAD(map_client_list, MapClient) map_client_list
3458 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00003459
Fam Zhenge95205e2015-03-16 17:03:37 +08003460static void cpu_unregister_map_client_do(MapClient *client)
aliguoriba223c22009-01-22 16:59:16 +00003461{
Blue Swirl72cf2d42009-09-12 07:36:22 +00003462 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05003463 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00003464}
3465
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003466static void cpu_notify_map_clients_locked(void)
aliguoriba223c22009-01-22 16:59:16 +00003467{
3468 MapClient *client;
3469
Blue Swirl72cf2d42009-09-12 07:36:22 +00003470 while (!QLIST_EMPTY(&map_client_list)) {
3471 client = QLIST_FIRST(&map_client_list);
Fam Zhenge95205e2015-03-16 17:03:37 +08003472 qemu_bh_schedule(client->bh);
3473 cpu_unregister_map_client_do(client);
aliguoriba223c22009-01-22 16:59:16 +00003474 }
3475}
3476
Fam Zhenge95205e2015-03-16 17:03:37 +08003477void cpu_register_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003478{
3479 MapClient *client = g_malloc(sizeof(*client));
3480
Fam Zheng38e047b2015-03-16 17:03:35 +08003481 qemu_mutex_lock(&map_client_list_lock);
Fam Zhenge95205e2015-03-16 17:03:37 +08003482 client->bh = bh;
bellardd0ecd2a2006-04-23 17:14:48 +00003483 QLIST_INSERT_HEAD(&map_client_list, client, link);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003484 if (!atomic_read(&bounce.in_use)) {
3485 cpu_notify_map_clients_locked();
3486 }
Fam Zheng38e047b2015-03-16 17:03:35 +08003487 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003488}
3489
Fam Zheng38e047b2015-03-16 17:03:35 +08003490void cpu_exec_init_all(void)
3491{
3492 qemu_mutex_init(&ram_list.mutex);
Peter Maydell20bccb82016-10-24 16:26:49 +01003493 /* The data structures we set up here depend on knowing the page size,
3494 * so no more changes can be made after this point.
3495 * In an ideal world, nothing we did before we had finished the
3496 * machine setup would care about the target page size, and we could
3497 * do this much later, rather than requiring board models to state
3498 * up front what their requirements are.
3499 */
3500 finalize_target_page_bits();
Fam Zheng38e047b2015-03-16 17:03:35 +08003501 io_mem_init();
Paolo Bonzini680a4782015-11-02 09:23:52 +01003502 memory_map_init();
Fam Zheng38e047b2015-03-16 17:03:35 +08003503 qemu_mutex_init(&map_client_list_lock);
3504}
3505
Fam Zhenge95205e2015-03-16 17:03:37 +08003506void cpu_unregister_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003507{
Fam Zhenge95205e2015-03-16 17:03:37 +08003508 MapClient *client;
bellardd0ecd2a2006-04-23 17:14:48 +00003509
Fam Zhenge95205e2015-03-16 17:03:37 +08003510 qemu_mutex_lock(&map_client_list_lock);
3511 QLIST_FOREACH(client, &map_client_list, link) {
3512 if (client->bh == bh) {
3513 cpu_unregister_map_client_do(client);
3514 break;
3515 }
3516 }
3517 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003518}
3519
3520static void cpu_notify_map_clients(void)
3521{
Fam Zheng38e047b2015-03-16 17:03:35 +08003522 qemu_mutex_lock(&map_client_list_lock);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003523 cpu_notify_map_clients_locked();
Fam Zheng38e047b2015-03-16 17:03:35 +08003524 qemu_mutex_unlock(&map_client_list_lock);
aliguori6d16c2f2009-01-22 16:59:11 +00003525}
3526
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003527static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
Peter Maydelleace72b2018-05-31 14:50:52 +01003528 bool is_write, MemTxAttrs attrs)
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003529{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003530 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003531 hwaddr l, xlat;
3532
3533 while (len > 0) {
3534 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003535 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003536 if (!memory_access_is_direct(mr, is_write)) {
3537 l = memory_access_size(mr, l, addr);
Peter Maydelleace72b2018-05-31 14:50:52 +01003538 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003539 return false;
3540 }
3541 }
3542
3543 len -= l;
3544 addr += l;
3545 }
3546 return true;
3547}
3548
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003549bool address_space_access_valid(AddressSpace *as, hwaddr addr,
Peter Maydellfddffa42018-05-31 14:50:52 +01003550 int len, bool is_write,
3551 MemTxAttrs attrs)
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003552{
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003553 FlatView *fv;
3554 bool result;
3555
3556 rcu_read_lock();
3557 fv = address_space_to_flatview(as);
Peter Maydelleace72b2018-05-31 14:50:52 +01003558 result = flatview_access_valid(fv, addr, len, is_write, attrs);
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003559 rcu_read_unlock();
3560 return result;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003561}
3562
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003563static hwaddr
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003564flatview_extend_translation(FlatView *fv, hwaddr addr,
Peter Maydell53d07902018-05-31 14:50:52 +01003565 hwaddr target_len,
3566 MemoryRegion *mr, hwaddr base, hwaddr len,
3567 bool is_write, MemTxAttrs attrs)
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003568{
3569 hwaddr done = 0;
3570 hwaddr xlat;
3571 MemoryRegion *this_mr;
3572
3573 for (;;) {
3574 target_len -= len;
3575 addr += len;
3576 done += len;
3577 if (target_len == 0) {
3578 return done;
3579 }
3580
3581 len = target_len;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003582 this_mr = flatview_translate(fv, addr, &xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +01003583 &len, is_write, attrs);
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003584 if (this_mr != mr || xlat != base + done) {
3585 return done;
3586 }
3587 }
3588}
3589
aliguori6d16c2f2009-01-22 16:59:11 +00003590/* Map a physical memory region into a host virtual address.
3591 * May map a subset of the requested range, given by and returned in *plen.
3592 * May return NULL if resources needed to perform the mapping are exhausted.
3593 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00003594 * Use cpu_register_map_client() to know when retrying the map operation is
3595 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00003596 */
Avi Kivityac1970f2012-10-03 16:22:53 +02003597void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02003598 hwaddr addr,
3599 hwaddr *plen,
Peter Maydellf26404f2018-05-31 14:50:52 +01003600 bool is_write,
3601 MemTxAttrs attrs)
aliguori6d16c2f2009-01-22 16:59:11 +00003602{
Avi Kivitya8170e52012-10-23 12:30:10 +02003603 hwaddr len = *plen;
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003604 hwaddr l, xlat;
3605 MemoryRegion *mr;
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003606 void *ptr;
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003607 FlatView *fv;
aliguori6d16c2f2009-01-22 16:59:11 +00003608
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003609 if (len == 0) {
3610 return NULL;
3611 }
aliguori6d16c2f2009-01-22 16:59:11 +00003612
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003613 l = len;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003614 rcu_read_lock();
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003615 fv = address_space_to_flatview(as);
Peter Maydellefa99a22018-05-31 14:50:52 +01003616 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini41063e12015-03-18 14:21:43 +01003617
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003618 if (!memory_access_is_direct(mr, is_write)) {
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003619 if (atomic_xchg(&bounce.in_use, true)) {
Paolo Bonzini41063e12015-03-18 14:21:43 +01003620 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003621 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00003622 }
Kevin Wolfe85d9db2013-07-22 14:30:23 +02003623 /* Avoid unbounded allocations */
3624 l = MIN(l, TARGET_PAGE_SIZE);
3625 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003626 bounce.addr = addr;
3627 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003628
3629 memory_region_ref(mr);
3630 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003631 if (!is_write) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003632 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003633 bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01003634 }
aliguori6d16c2f2009-01-22 16:59:11 +00003635
Paolo Bonzini41063e12015-03-18 14:21:43 +01003636 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003637 *plen = l;
3638 return bounce.buffer;
3639 }
3640
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003641
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003642 memory_region_ref(mr);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003643 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
Peter Maydell53d07902018-05-31 14:50:52 +01003644 l, is_write, attrs);
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003645 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003646 rcu_read_unlock();
3647
3648 return ptr;
aliguori6d16c2f2009-01-22 16:59:11 +00003649}
3650
Avi Kivityac1970f2012-10-03 16:22:53 +02003651/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00003652 * Will also mark the memory as dirty if is_write == 1. access_len gives
3653 * the amount of memory that was actually read or written by the caller.
3654 */
Avi Kivitya8170e52012-10-23 12:30:10 +02003655void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3656 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00003657{
3658 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003659 MemoryRegion *mr;
3660 ram_addr_t addr1;
3661
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01003662 mr = memory_region_from_host(buffer, &addr1);
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003663 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00003664 if (is_write) {
Paolo Bonzini845b6212015-03-23 11:45:53 +01003665 invalidate_and_set_dirty(mr, addr1, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003666 }
Jan Kiszka868bb332011-06-21 22:59:09 +02003667 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02003668 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01003669 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003670 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00003671 return;
3672 }
3673 if (is_write) {
Peter Maydell5c9eb022015-04-26 16:49:24 +01003674 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3675 bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003676 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00003677 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00003678 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003679 memory_region_unref(bounce.mr);
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003680 atomic_mb_set(&bounce.in_use, false);
aliguoriba223c22009-01-22 16:59:16 +00003681 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00003682}
bellardd0ecd2a2006-04-23 17:14:48 +00003683
Avi Kivitya8170e52012-10-23 12:30:10 +02003684void *cpu_physical_memory_map(hwaddr addr,
3685 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02003686 int is_write)
3687{
Peter Maydellf26404f2018-05-31 14:50:52 +01003688 return address_space_map(&address_space_memory, addr, plen, is_write,
3689 MEMTXATTRS_UNSPECIFIED);
Avi Kivityac1970f2012-10-03 16:22:53 +02003690}
3691
Avi Kivitya8170e52012-10-23 12:30:10 +02003692void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3693 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003694{
3695 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3696}
3697
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003698#define ARG1_DECL AddressSpace *as
3699#define ARG1 as
3700#define SUFFIX
3701#define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3702#define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3703#define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3704#define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3705#define RCU_READ_LOCK(...) rcu_read_lock()
3706#define RCU_READ_UNLOCK(...) rcu_read_unlock()
3707#include "memory_ldst.inc.c"
Alexander Graf1e78bcc2011-07-06 09:09:23 +02003708
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003709int64_t address_space_cache_init(MemoryRegionCache *cache,
3710 AddressSpace *as,
3711 hwaddr addr,
3712 hwaddr len,
3713 bool is_write)
3714{
Paolo Bonzini48564042018-03-18 18:26:36 +01003715 AddressSpaceDispatch *d;
3716 hwaddr l;
3717 MemoryRegion *mr;
3718
3719 assert(len > 0);
3720
3721 l = len;
3722 cache->fv = address_space_get_flatview(as);
3723 d = flatview_to_dispatch(cache->fv);
3724 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3725
3726 mr = cache->mrs.mr;
3727 memory_region_ref(mr);
3728 if (memory_access_is_direct(mr, is_write)) {
Peter Maydell53d07902018-05-31 14:50:52 +01003729 /* We don't care about the memory attributes here as we're only
3730 * doing this if we found actual RAM, which behaves the same
3731 * regardless of attributes; so UNSPECIFIED is fine.
3732 */
Paolo Bonzini48564042018-03-18 18:26:36 +01003733 l = flatview_extend_translation(cache->fv, addr, len, mr,
Peter Maydell53d07902018-05-31 14:50:52 +01003734 cache->xlat, l, is_write,
3735 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003736 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
3737 } else {
3738 cache->ptr = NULL;
3739 }
3740
3741 cache->len = l;
3742 cache->is_write = is_write;
3743 return l;
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003744}
3745
3746void address_space_cache_invalidate(MemoryRegionCache *cache,
3747 hwaddr addr,
3748 hwaddr access_len)
3749{
Paolo Bonzini48564042018-03-18 18:26:36 +01003750 assert(cache->is_write);
3751 if (likely(cache->ptr)) {
3752 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3753 }
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003754}
3755
3756void address_space_cache_destroy(MemoryRegionCache *cache)
3757{
Paolo Bonzini48564042018-03-18 18:26:36 +01003758 if (!cache->mrs.mr) {
3759 return;
3760 }
3761
3762 if (xen_enabled()) {
3763 xen_invalidate_map_cache_entry(cache->ptr);
3764 }
3765 memory_region_unref(cache->mrs.mr);
3766 flatview_unref(cache->fv);
3767 cache->mrs.mr = NULL;
3768 cache->fv = NULL;
3769}
3770
3771/* Called from RCU critical section. This function has the same
3772 * semantics as address_space_translate, but it only works on a
3773 * predefined range of a MemoryRegion that was mapped with
3774 * address_space_cache_init.
3775 */
3776static inline MemoryRegion *address_space_translate_cached(
3777 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003778 hwaddr *plen, bool is_write, MemTxAttrs attrs)
Paolo Bonzini48564042018-03-18 18:26:36 +01003779{
3780 MemoryRegionSection section;
3781 MemoryRegion *mr;
3782 IOMMUMemoryRegion *iommu_mr;
3783 AddressSpace *target_as;
3784
3785 assert(!cache->ptr);
3786 *xlat = addr + cache->xlat;
3787
3788 mr = cache->mrs.mr;
3789 iommu_mr = memory_region_get_iommu(mr);
3790 if (!iommu_mr) {
3791 /* MMIO region. */
3792 return mr;
3793 }
3794
3795 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3796 NULL, is_write, true,
Peter Maydell2f7b0092018-05-31 14:50:53 +01003797 &target_as, attrs);
Paolo Bonzini48564042018-03-18 18:26:36 +01003798 return section.mr;
3799}
3800
3801/* Called from RCU critical section. address_space_read_cached uses this
3802 * out of line function when the target is an MMIO or IOMMU region.
3803 */
3804void
3805address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3806 void *buf, int len)
3807{
3808 hwaddr addr1, l;
3809 MemoryRegion *mr;
3810
3811 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003812 mr = address_space_translate_cached(cache, addr, &addr1, &l, false,
3813 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003814 flatview_read_continue(cache->fv,
3815 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3816 addr1, l, mr);
3817}
3818
3819/* Called from RCU critical section. address_space_write_cached uses this
3820 * out of line function when the target is an MMIO or IOMMU region.
3821 */
3822void
3823address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3824 const void *buf, int len)
3825{
3826 hwaddr addr1, l;
3827 MemoryRegion *mr;
3828
3829 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003830 mr = address_space_translate_cached(cache, addr, &addr1, &l, true,
3831 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003832 flatview_write_continue(cache->fv,
3833 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3834 addr1, l, mr);
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003835}
3836
3837#define ARG1_DECL MemoryRegionCache *cache
3838#define ARG1 cache
Paolo Bonzini48564042018-03-18 18:26:36 +01003839#define SUFFIX _cached_slow
3840#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3841#define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3842#define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
Paolo Bonzini90c4fe52017-04-03 13:41:28 +02003843#define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
Paolo Bonzini48564042018-03-18 18:26:36 +01003844#define RCU_READ_LOCK() ((void)0)
3845#define RCU_READ_UNLOCK() ((void)0)
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003846#include "memory_ldst.inc.c"
3847
aliguori5e2972f2009-03-28 17:51:36 +00003848/* virtual memory access for debug (includes writing to ROM) */
Andreas Färberf17ec442013-06-29 19:40:58 +02003849int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
bellardb448f2f2004-02-25 23:24:04 +00003850 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003851{
3852 int l;
Avi Kivitya8170e52012-10-23 12:30:10 +02003853 hwaddr phys_addr;
j_mayer9b3c35e2007-04-07 11:21:28 +00003854 target_ulong page;
bellard13eb76e2004-01-24 15:23:36 +00003855
Christian Borntraeger79ca7a12017-03-07 15:19:08 +01003856 cpu_synchronize_state(cpu);
bellard13eb76e2004-01-24 15:23:36 +00003857 while (len > 0) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003858 int asidx;
3859 MemTxAttrs attrs;
3860
bellard13eb76e2004-01-24 15:23:36 +00003861 page = addr & TARGET_PAGE_MASK;
Peter Maydell5232e4c2016-01-21 14:15:06 +00003862 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3863 asidx = cpu_asidx_from_attrs(cpu, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003864 /* if no physical page mapped, return an error */
3865 if (phys_addr == -1)
3866 return -1;
3867 l = (page + TARGET_PAGE_SIZE) - addr;
3868 if (l > len)
3869 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00003870 phys_addr += (addr & ~TARGET_PAGE_MASK);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003871 if (is_write) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003872 cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
3873 phys_addr, buf, l);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003874 } else {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003875 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
3876 MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003877 buf, l, 0);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003878 }
bellard13eb76e2004-01-24 15:23:36 +00003879 len -= l;
3880 buf += l;
3881 addr += l;
3882 }
3883 return 0;
3884}
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003885
3886/*
3887 * Allows code that needs to deal with migration bitmaps etc to still be built
3888 * target independent.
3889 */
Juan Quintela20afaed2017-03-21 09:09:14 +01003890size_t qemu_target_page_size(void)
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003891{
Juan Quintela20afaed2017-03-21 09:09:14 +01003892 return TARGET_PAGE_SIZE;
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003893}
3894
Juan Quintela46d702b2017-04-24 21:03:48 +02003895int qemu_target_page_bits(void)
3896{
3897 return TARGET_PAGE_BITS;
3898}
3899
3900int qemu_target_page_bits_min(void)
3901{
3902 return TARGET_PAGE_BITS_MIN;
3903}
Paul Brooka68fe892010-03-01 00:08:59 +00003904#endif
bellard13eb76e2004-01-24 15:23:36 +00003905
Blue Swirl8e4a4242013-01-06 18:30:17 +00003906/*
3907 * A helper function for the _utterly broken_ virtio device model to find out if
3908 * it's running on a big endian machine. Don't do this at home kids!
3909 */
Greg Kurz98ed8ec2014-06-24 19:26:29 +02003910bool target_words_bigendian(void);
3911bool target_words_bigendian(void)
Blue Swirl8e4a4242013-01-06 18:30:17 +00003912{
3913#if defined(TARGET_WORDS_BIGENDIAN)
3914 return true;
3915#else
3916 return false;
3917#endif
3918}
3919
Wen Congyang76f35532012-05-07 12:04:18 +08003920#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02003921bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08003922{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003923 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003924 hwaddr l = 1;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003925 bool res;
Wen Congyang76f35532012-05-07 12:04:18 +08003926
Paolo Bonzini41063e12015-03-18 14:21:43 +01003927 rcu_read_lock();
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003928 mr = address_space_translate(&address_space_memory,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003929 phys_addr, &phys_addr, &l, false,
3930 MEMTXATTRS_UNSPECIFIED);
Wen Congyang76f35532012-05-07 12:04:18 +08003931
Paolo Bonzini41063e12015-03-18 14:21:43 +01003932 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3933 rcu_read_unlock();
3934 return res;
Wen Congyang76f35532012-05-07 12:04:18 +08003935}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003936
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003937int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003938{
3939 RAMBlock *block;
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003940 int ret = 0;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003941
Mike Day0dc3f442013-09-05 14:41:35 -04003942 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08003943 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003944 ret = func(block->idstr, block->host, block->offset,
3945 block->used_length, opaque);
3946 if (ret) {
3947 break;
3948 }
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003949 }
Mike Day0dc3f442013-09-05 14:41:35 -04003950 rcu_read_unlock();
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003951 return ret;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003952}
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003953
Cédric Le Goaterb895de52018-05-14 08:57:00 +02003954int qemu_ram_foreach_migratable_block(RAMBlockIterFunc func, void *opaque)
3955{
3956 RAMBlock *block;
3957 int ret = 0;
3958
3959 rcu_read_lock();
3960 RAMBLOCK_FOREACH(block) {
3961 if (!qemu_ram_is_migratable(block)) {
3962 continue;
3963 }
3964 ret = func(block->idstr, block->host, block->offset,
3965 block->used_length, opaque);
3966 if (ret) {
3967 break;
3968 }
3969 }
3970 rcu_read_unlock();
3971 return ret;
3972}
3973
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003974/*
3975 * Unmap pages of memory from start to start+length such that
3976 * they a) read as 0, b) Trigger whatever fault mechanism
3977 * the OS provides for postcopy.
3978 * The pages must be unmapped by the end of the function.
3979 * Returns: 0 on success, none-0 on failure
3980 *
3981 */
3982int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
3983{
3984 int ret = -1;
3985
3986 uint8_t *host_startaddr = rb->host + start;
3987
3988 if ((uintptr_t)host_startaddr & (rb->page_size - 1)) {
3989 error_report("ram_block_discard_range: Unaligned start address: %p",
3990 host_startaddr);
3991 goto err;
3992 }
3993
3994 if ((start + length) <= rb->used_length) {
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00003995 bool need_madvise, need_fallocate;
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00003996 uint8_t *host_endaddr = host_startaddr + length;
3997 if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
3998 error_report("ram_block_discard_range: Unaligned end address: %p",
3999 host_endaddr);
4000 goto err;
4001 }
4002
4003 errno = ENOTSUP; /* If we are missing MADVISE etc */
4004
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004005 /* The logic here is messy;
4006 * madvise DONTNEED fails for hugepages
4007 * fallocate works on hugepages and shmem
4008 */
4009 need_madvise = (rb->page_size == qemu_host_page_size);
4010 need_fallocate = rb->fd != -1;
4011 if (need_fallocate) {
4012 /* For a file, this causes the area of the file to be zero'd
4013 * if read, and for hugetlbfs also causes it to be unmapped
4014 * so a userfault will trigger.
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +00004015 */
4016#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
4017 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
4018 start, length);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004019 if (ret) {
4020 ret = -errno;
4021 error_report("ram_block_discard_range: Failed to fallocate "
4022 "%s:%" PRIx64 " +%zx (%d)",
4023 rb->idstr, start, length, ret);
4024 goto err;
4025 }
4026#else
4027 ret = -ENOSYS;
4028 error_report("ram_block_discard_range: fallocate not available/file"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004029 "%s:%" PRIx64 " +%zx (%d)",
4030 rb->idstr, start, length, ret);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004031 goto err;
4032#endif
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004033 }
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004034 if (need_madvise) {
4035 /* For normal RAM this causes it to be unmapped,
4036 * for shared memory it causes the local mapping to disappear
4037 * and to fall back on the file contents (which we just
4038 * fallocate'd away).
4039 */
4040#if defined(CONFIG_MADVISE)
4041 ret = madvise(host_startaddr, length, MADV_DONTNEED);
4042 if (ret) {
4043 ret = -errno;
4044 error_report("ram_block_discard_range: Failed to discard range "
4045 "%s:%" PRIx64 " +%zx (%d)",
4046 rb->idstr, start, length, ret);
4047 goto err;
4048 }
4049#else
4050 ret = -ENOSYS;
4051 error_report("ram_block_discard_range: MADVISE not available"
4052 "%s:%" PRIx64 " +%zx (%d)",
4053 rb->idstr, start, length, ret);
4054 goto err;
4055#endif
4056 }
4057 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
4058 need_madvise, need_fallocate, ret);
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004059 } else {
4060 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
4061 "/%zx/" RAM_ADDR_FMT")",
4062 rb->idstr, start, length, rb->used_length);
4063 }
4064
4065err:
4066 return ret;
4067}
4068
Peter Maydellec3f8c92013-06-27 20:53:38 +01004069#endif
Yang Zhonga0be0c52017-07-03 18:12:13 +08004070
4071void page_size_init(void)
4072{
4073 /* NOTE: we can always suppose that qemu_host_page_size >=
4074 TARGET_PAGE_SIZE */
Yang Zhonga0be0c52017-07-03 18:12:13 +08004075 if (qemu_host_page_size == 0) {
4076 qemu_host_page_size = qemu_real_host_page_size;
4077 }
4078 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
4079 qemu_host_page_size = TARGET_PAGE_SIZE;
4080 }
4081 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
4082}
Alexey Kardashevskiy5e8fd942017-09-21 18:51:06 +10004083
4084#if !defined(CONFIG_USER_ONLY)
4085
4086static void mtree_print_phys_entries(fprintf_function mon, void *f,
4087 int start, int end, int skip, int ptr)
4088{
4089 if (start == end - 1) {
4090 mon(f, "\t%3d ", start);
4091 } else {
4092 mon(f, "\t%3d..%-3d ", start, end - 1);
4093 }
4094 mon(f, " skip=%d ", skip);
4095 if (ptr == PHYS_MAP_NODE_NIL) {
4096 mon(f, " ptr=NIL");
4097 } else if (!skip) {
4098 mon(f, " ptr=#%d", ptr);
4099 } else {
4100 mon(f, " ptr=[%d]", ptr);
4101 }
4102 mon(f, "\n");
4103}
4104
4105#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4106 int128_sub((size), int128_one())) : 0)
4107
4108void mtree_print_dispatch(fprintf_function mon, void *f,
4109 AddressSpaceDispatch *d, MemoryRegion *root)
4110{
4111 int i;
4112
4113 mon(f, " Dispatch\n");
4114 mon(f, " Physical sections\n");
4115
4116 for (i = 0; i < d->map.sections_nb; ++i) {
4117 MemoryRegionSection *s = d->map.sections + i;
4118 const char *names[] = { " [unassigned]", " [not dirty]",
4119 " [ROM]", " [watch]" };
4120
4121 mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s",
4122 i,
4123 s->offset_within_address_space,
4124 s->offset_within_address_space + MR_SIZE(s->mr->size),
4125 s->mr->name ? s->mr->name : "(noname)",
4126 i < ARRAY_SIZE(names) ? names[i] : "",
4127 s->mr == root ? " [ROOT]" : "",
4128 s == d->mru_section ? " [MRU]" : "",
4129 s->mr->is_iommu ? " [iommu]" : "");
4130
4131 if (s->mr->alias) {
4132 mon(f, " alias=%s", s->mr->alias->name ?
4133 s->mr->alias->name : "noname");
4134 }
4135 mon(f, "\n");
4136 }
4137
4138 mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4139 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
4140 for (i = 0; i < d->map.nodes_nb; ++i) {
4141 int j, jprev;
4142 PhysPageEntry prev;
4143 Node *n = d->map.nodes + i;
4144
4145 mon(f, " [%d]\n", i);
4146
4147 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
4148 PhysPageEntry *pe = *n + j;
4149
4150 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
4151 continue;
4152 }
4153
4154 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4155
4156 jprev = j;
4157 prev = *pe;
4158 }
4159
4160 if (jprev != ARRAY_SIZE(*n)) {
4161 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4162 }
4163 }
4164}
4165
4166#endif