bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 2 | * Virtual page mapping |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
Peter Maydell | 7b31bbc | 2016-01-26 18:16:56 +0000 | [diff] [blame] | 19 | #include "qemu/osdep.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 20 | #include "qapi/error.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 21 | |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 22 | #include "qemu/cutils.h" |
bellard | 6180a18 | 2003-09-30 21:04:53 +0000 | [diff] [blame] | 23 | #include "cpu.h" |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 24 | #include "exec/exec-all.h" |
Juan Quintela | 5118042 | 2017-04-24 20:50:19 +0200 | [diff] [blame] | 25 | #include "exec/target_page.h" |
bellard | b67d9a5 | 2008-05-23 09:57:34 +0000 | [diff] [blame] | 26 | #include "tcg.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 27 | #include "hw/qdev-core.h" |
Fam Zheng | c7e002c | 2017-07-14 10:15:08 +0800 | [diff] [blame] | 28 | #include "hw/qdev-properties.h" |
Michael S. Tsirkin | 4485bd2 | 2015-03-11 07:56:34 +0100 | [diff] [blame] | 29 | #if !defined(CONFIG_USER_ONLY) |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 30 | #include "hw/boards.h" |
Paolo Bonzini | 33c1187 | 2016-03-15 16:58:45 +0100 | [diff] [blame] | 31 | #include "hw/xen/xen.h" |
Michael S. Tsirkin | 4485bd2 | 2015-03-11 07:56:34 +0100 | [diff] [blame] | 32 | #endif |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 33 | #include "sysemu/kvm.h" |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 34 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 35 | #include "qemu/timer.h" |
| 36 | #include "qemu/config-file.h" |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 37 | #include "qemu/error-report.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 38 | #if defined(CONFIG_USER_ONLY) |
Markus Armbruster | a9c9427 | 2016-06-22 19:11:19 +0200 | [diff] [blame] | 39 | #include "qemu.h" |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 40 | #else /* !CONFIG_USER_ONLY */ |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 41 | #include "hw/hw.h" |
| 42 | #include "exec/memory.h" |
Paolo Bonzini | df43d49 | 2016-03-16 10:24:54 +0100 | [diff] [blame] | 43 | #include "exec/ioport.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 44 | #include "sysemu/dma.h" |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 45 | #include "sysemu/numa.h" |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 46 | #include "sysemu/hw_accel.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 47 | #include "exec/address-spaces.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 48 | #include "sysemu/xen-mapcache.h" |
Daniel P. Berrange | 0ab8ed1 | 2017-01-25 16:14:15 +0000 | [diff] [blame] | 49 | #include "trace-root.h" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 50 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 51 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 52 | #include <linux/falloc.h> |
| 53 | #endif |
| 54 | |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 55 | #endif |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 56 | #include "qemu/rcu_queue.h" |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 57 | #include "qemu/main-loop.h" |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 58 | #include "translate-all.h" |
Pavel Dovgalyuk | 7615936 | 2015-09-17 19:25:07 +0300 | [diff] [blame] | 59 | #include "sysemu/replay.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 60 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 61 | #include "exec/memory-internal.h" |
Juan Quintela | 220c3eb | 2013-10-14 17:13:59 +0200 | [diff] [blame] | 62 | #include "exec/ram_addr.h" |
Paolo Bonzini | 508127e | 2016-01-07 16:55:28 +0300 | [diff] [blame] | 63 | #include "exec/log.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 64 | |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 65 | #include "migration/vmstate.h" |
| 66 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 67 | #include "qemu/range.h" |
Michael S. Tsirkin | 794e8f3 | 2015-09-24 14:41:17 +0300 | [diff] [blame] | 68 | #ifndef _WIN32 |
| 69 | #include "qemu/mmap-alloc.h" |
| 70 | #endif |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 71 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 72 | #include "monitor/monitor.h" |
| 73 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 74 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 75 | |
pbrook | 99773bd | 2006-04-16 15:14:59 +0000 | [diff] [blame] | 76 | #if !defined(CONFIG_USER_ONLY) |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 77 | /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes |
| 78 | * are protected by the ramlist lock. |
| 79 | */ |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 80 | RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 81 | |
| 82 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 83 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 84 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 85 | AddressSpace address_space_io; |
| 86 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 87 | |
Paolo Bonzini | 0844e00 | 2013-05-24 14:37:28 +0200 | [diff] [blame] | 88 | MemoryRegion io_mem_rom, io_mem_notdirty; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 89 | static MemoryRegion io_mem_unassigned; |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 90 | #endif |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 91 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 92 | #ifdef TARGET_PAGE_BITS_VARY |
| 93 | int target_page_bits; |
| 94 | bool target_page_bits_decided; |
| 95 | #endif |
| 96 | |
Paolo Bonzini | f481ee2 | 2018-12-06 11:56:15 +0100 | [diff] [blame] | 97 | CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); |
| 98 | |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 99 | /* current CPU in the current thread. It is only valid inside |
| 100 | cpu_exec() */ |
Paolo Bonzini | f240eb6 | 2015-08-26 00:17:58 +0200 | [diff] [blame] | 101 | __thread CPUState *current_cpu; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 102 | /* 0 = Do not count executed instructions. |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 103 | 1 = Precise instruction counting. |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 104 | 2 = Adaptive rate instruction counting. */ |
Paolo Bonzini | 5708fc6 | 2012-11-26 15:36:40 +0100 | [diff] [blame] | 105 | int use_icount; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 106 | |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 107 | uintptr_t qemu_host_page_size; |
| 108 | intptr_t qemu_host_page_mask; |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 109 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 110 | bool set_preferred_target_page_bits(int bits) |
| 111 | { |
| 112 | /* The target page size is the lowest common denominator for all |
| 113 | * the CPUs in the system, so we can only make it smaller, never |
| 114 | * larger. And we can't make it smaller once we've committed to |
| 115 | * a particular size. |
| 116 | */ |
| 117 | #ifdef TARGET_PAGE_BITS_VARY |
| 118 | assert(bits >= TARGET_PAGE_BITS_MIN); |
| 119 | if (target_page_bits == 0 || target_page_bits > bits) { |
| 120 | if (target_page_bits_decided) { |
| 121 | return false; |
| 122 | } |
| 123 | target_page_bits = bits; |
| 124 | } |
| 125 | #endif |
| 126 | return true; |
| 127 | } |
| 128 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 129 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 130 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 131 | static void finalize_target_page_bits(void) |
| 132 | { |
| 133 | #ifdef TARGET_PAGE_BITS_VARY |
| 134 | if (target_page_bits == 0) { |
| 135 | target_page_bits = TARGET_PAGE_BITS_MIN; |
| 136 | } |
| 137 | target_page_bits_decided = true; |
| 138 | #endif |
| 139 | } |
| 140 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 141 | typedef struct PhysPageEntry PhysPageEntry; |
| 142 | |
| 143 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 144 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 145 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 146 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 147 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 148 | }; |
| 149 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 150 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 151 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 152 | /* Size of the L2 (and L3, etc) page tables. */ |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 153 | #define ADDR_SPACE_BITS 64 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 154 | |
Michael S. Tsirkin | 026736c | 2013-11-13 20:13:03 +0200 | [diff] [blame] | 155 | #define P_L2_BITS 9 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 156 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 157 | |
| 158 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 159 | |
| 160 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 161 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 162 | typedef struct PhysPageMap { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 163 | struct rcu_head rcu; |
| 164 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 165 | unsigned sections_nb; |
| 166 | unsigned sections_nb_alloc; |
| 167 | unsigned nodes_nb; |
| 168 | unsigned nodes_nb_alloc; |
| 169 | Node *nodes; |
| 170 | MemoryRegionSection *sections; |
| 171 | } PhysPageMap; |
| 172 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 173 | struct AddressSpaceDispatch { |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 174 | MemoryRegionSection *mru_section; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 175 | /* This is a multi-level map on the physical address space. |
| 176 | * The bottom level has pointers to MemoryRegionSections. |
| 177 | */ |
| 178 | PhysPageEntry phys_map; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 179 | PhysPageMap map; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 180 | }; |
| 181 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 182 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 183 | typedef struct subpage_t { |
| 184 | MemoryRegion iomem; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 185 | FlatView *fv; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 186 | hwaddr base; |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 187 | uint16_t sub_section[]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 188 | } subpage_t; |
| 189 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 190 | #define PHYS_SECTION_UNASSIGNED 0 |
| 191 | #define PHYS_SECTION_NOTDIRTY 1 |
| 192 | #define PHYS_SECTION_ROM 2 |
| 193 | #define PHYS_SECTION_WATCH 3 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 194 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 195 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 196 | static void memory_map_init(void); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 197 | static void tcg_commit(MemoryListener *listener); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 198 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 199 | static MemoryRegion io_mem_watch; |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 200 | |
| 201 | /** |
| 202 | * CPUAddressSpace: all the information a CPU needs about an AddressSpace |
| 203 | * @cpu: the CPU whose AddressSpace this is |
| 204 | * @as: the AddressSpace itself |
| 205 | * @memory_dispatch: its dispatch pointer (cached, RCU protected) |
| 206 | * @tcg_as_listener: listener for tracking changes to the AddressSpace |
| 207 | */ |
| 208 | struct CPUAddressSpace { |
| 209 | CPUState *cpu; |
| 210 | AddressSpace *as; |
| 211 | struct AddressSpaceDispatch *memory_dispatch; |
| 212 | MemoryListener tcg_as_listener; |
| 213 | }; |
| 214 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 215 | struct DirtyBitmapSnapshot { |
| 216 | ram_addr_t start; |
| 217 | ram_addr_t end; |
| 218 | unsigned long dirty[]; |
| 219 | }; |
| 220 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 221 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 222 | |
Paul Brook | 6d9a130 | 2010-02-28 23:55:53 +0000 | [diff] [blame] | 223 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 224 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 225 | static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 226 | { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 227 | static unsigned alloc_hint = 16; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 228 | if (map->nodes_nb + nodes > map->nodes_nb_alloc) { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 229 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 230 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes); |
| 231 | map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc); |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 232 | alloc_hint = map->nodes_nb_alloc; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 233 | } |
| 234 | } |
| 235 | |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 236 | static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 237 | { |
| 238 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 239 | uint32_t ret; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 240 | PhysPageEntry e; |
| 241 | PhysPageEntry *p; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 242 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 243 | ret = map->nodes_nb++; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 244 | p = map->nodes[ret]; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 245 | assert(ret != PHYS_MAP_NODE_NIL); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 246 | assert(ret != map->nodes_nb_alloc); |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 247 | |
| 248 | e.skip = leaf ? 0 : 1; |
| 249 | e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 250 | for (i = 0; i < P_L2_SIZE; ++i) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 251 | memcpy(&p[i], &e, sizeof(e)); |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 252 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 253 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 254 | } |
| 255 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 256 | static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp, |
| 257 | hwaddr *index, hwaddr *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 258 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 259 | { |
| 260 | PhysPageEntry *p; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 261 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 262 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 263 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 264 | lp->ptr = phys_map_node_alloc(map, level == 0); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 265 | } |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 266 | p = map->nodes[lp->ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 267 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 268 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 269 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 270 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 271 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 272 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 273 | *index += step; |
| 274 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 275 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 276 | phys_page_set_level(map, lp, index, nb, leaf, level - 1); |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 277 | } |
| 278 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 279 | } |
| 280 | } |
| 281 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 282 | static void phys_page_set(AddressSpaceDispatch *d, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 283 | hwaddr index, hwaddr nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 284 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 285 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 286 | /* Wildly overreserve - it doesn't matter much. */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 287 | phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 288 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 289 | phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 290 | } |
| 291 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 292 | /* Compact a non leaf page entry. Simply detect that the entry has a single child, |
| 293 | * and update our entry so we can skip it and go directly to the destination. |
| 294 | */ |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 295 | static void phys_page_compact(PhysPageEntry *lp, Node *nodes) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 296 | { |
| 297 | unsigned valid_ptr = P_L2_SIZE; |
| 298 | int valid = 0; |
| 299 | PhysPageEntry *p; |
| 300 | int i; |
| 301 | |
| 302 | if (lp->ptr == PHYS_MAP_NODE_NIL) { |
| 303 | return; |
| 304 | } |
| 305 | |
| 306 | p = nodes[lp->ptr]; |
| 307 | for (i = 0; i < P_L2_SIZE; i++) { |
| 308 | if (p[i].ptr == PHYS_MAP_NODE_NIL) { |
| 309 | continue; |
| 310 | } |
| 311 | |
| 312 | valid_ptr = i; |
| 313 | valid++; |
| 314 | if (p[i].skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 315 | phys_page_compact(&p[i], nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 316 | } |
| 317 | } |
| 318 | |
| 319 | /* We can only compress if there's only one child. */ |
| 320 | if (valid != 1) { |
| 321 | return; |
| 322 | } |
| 323 | |
| 324 | assert(valid_ptr < P_L2_SIZE); |
| 325 | |
| 326 | /* Don't compress if it won't fit in the # of bits we have. */ |
| 327 | if (lp->skip + p[valid_ptr].skip >= (1 << 3)) { |
| 328 | return; |
| 329 | } |
| 330 | |
| 331 | lp->ptr = p[valid_ptr].ptr; |
| 332 | if (!p[valid_ptr].skip) { |
| 333 | /* If our only child is a leaf, make this a leaf. */ |
| 334 | /* By design, we should have made this node a leaf to begin with so we |
| 335 | * should never reach here. |
| 336 | * But since it's so simple to handle this, let's do it just in case we |
| 337 | * change this rule. |
| 338 | */ |
| 339 | lp->skip = 0; |
| 340 | } else { |
| 341 | lp->skip += p[valid_ptr].skip; |
| 342 | } |
| 343 | } |
| 344 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 345 | void address_space_dispatch_compact(AddressSpaceDispatch *d) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 346 | { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 347 | if (d->phys_map.skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 348 | phys_page_compact(&d->phys_map, d->map.nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 349 | } |
| 350 | } |
| 351 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 352 | static inline bool section_covers_addr(const MemoryRegionSection *section, |
| 353 | hwaddr addr) |
| 354 | { |
| 355 | /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means |
| 356 | * the section must cover the entire address space. |
| 357 | */ |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 358 | return int128_gethi(section->size) || |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 359 | range_covers_byte(section->offset_within_address_space, |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 360 | int128_getlo(section->size), addr); |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 361 | } |
| 362 | |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 363 | static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 364 | { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 365 | PhysPageEntry lp = d->phys_map, *p; |
| 366 | Node *nodes = d->map.nodes; |
| 367 | MemoryRegionSection *sections = d->map.sections; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 368 | hwaddr index = addr >> TARGET_PAGE_BITS; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 369 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 370 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 371 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 372 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 373 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 374 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 375 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 376 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 377 | } |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 378 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 379 | if (section_covers_addr(§ions[lp.ptr], addr)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 380 | return §ions[lp.ptr]; |
| 381 | } else { |
| 382 | return §ions[PHYS_SECTION_UNASSIGNED]; |
| 383 | } |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 384 | } |
| 385 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 386 | /* Called from RCU critical section */ |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 387 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 388 | hwaddr addr, |
| 389 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 390 | { |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 391 | MemoryRegionSection *section = atomic_read(&d->mru_section); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 392 | subpage_t *subpage; |
| 393 | |
Paolo Bonzini | 07c114b | 2017-11-15 15:11:03 +0100 | [diff] [blame] | 394 | if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] || |
| 395 | !section_covers_addr(section, addr)) { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 396 | section = phys_page_find(d, addr); |
Paolo Bonzini | 07c114b | 2017-11-15 15:11:03 +0100 | [diff] [blame] | 397 | atomic_set(&d->mru_section, section); |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 398 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 399 | if (resolve_subpage && section->mr->subpage) { |
| 400 | subpage = container_of(section->mr, subpage_t, iomem); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 401 | section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 402 | } |
| 403 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 404 | } |
| 405 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 406 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 407 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 408 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 409 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 410 | { |
| 411 | MemoryRegionSection *section; |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 412 | MemoryRegion *mr; |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 413 | Int128 diff; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 414 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 415 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 416 | /* Compute offset within MemoryRegionSection */ |
| 417 | addr -= section->offset_within_address_space; |
| 418 | |
| 419 | /* Compute offset within MemoryRegion */ |
| 420 | *xlat = addr + section->offset_within_region; |
| 421 | |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 422 | mr = section->mr; |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 423 | |
| 424 | /* MMIO registers can be expected to perform full-width accesses based only |
| 425 | * on their address, without considering adjacent registers that could |
| 426 | * decode to completely different MemoryRegions. When such registers |
| 427 | * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO |
| 428 | * regions overlap wildly. For this reason we cannot clamp the accesses |
| 429 | * here. |
| 430 | * |
| 431 | * If the length is small (as is the case for address_space_ldl/stl), |
| 432 | * everything works fine. If the incoming length is large, however, |
| 433 | * the caller really has to do the clamping through memory_access_size. |
| 434 | */ |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 435 | if (memory_region_is_ram(mr)) { |
Paolo Bonzini | e4a511f | 2015-06-17 10:36:54 +0200 | [diff] [blame] | 436 | diff = int128_sub(section->size, int128_make64(addr)); |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 437 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
| 438 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 439 | return section; |
| 440 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 441 | |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 442 | /** |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 443 | * address_space_translate_iommu - translate an address through an IOMMU |
| 444 | * memory region and then through the target address space. |
| 445 | * |
| 446 | * @iommu_mr: the IOMMU memory region that we start the translation from |
| 447 | * @addr: the address to be translated through the MMU |
| 448 | * @xlat: the translated address offset within the destination memory region. |
| 449 | * It cannot be %NULL. |
| 450 | * @plen_out: valid read/write length of the translated address. It |
| 451 | * cannot be %NULL. |
| 452 | * @page_mask_out: page mask for the translated address. This |
| 453 | * should only be meaningful for IOMMU translated |
| 454 | * addresses, since there may be huge pages that this bit |
| 455 | * would tell. It can be %NULL if we don't care about it. |
| 456 | * @is_write: whether the translation operation is for write |
| 457 | * @is_mmio: whether this can be MMIO, set true if it can |
| 458 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 459 | * @attrs: transaction attributes |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 460 | * |
| 461 | * This function is called from RCU critical section. It is the common |
| 462 | * part of flatview_do_translate and address_space_translate_cached. |
| 463 | */ |
| 464 | static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr, |
| 465 | hwaddr *xlat, |
| 466 | hwaddr *plen_out, |
| 467 | hwaddr *page_mask_out, |
| 468 | bool is_write, |
| 469 | bool is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 470 | AddressSpace **target_as, |
| 471 | MemTxAttrs attrs) |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 472 | { |
| 473 | MemoryRegionSection *section; |
| 474 | hwaddr page_mask = (hwaddr)-1; |
| 475 | |
| 476 | do { |
| 477 | hwaddr addr = *xlat; |
| 478 | IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
Peter Maydell | 2c91bcf | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 479 | int iommu_idx = 0; |
| 480 | IOMMUTLBEntry iotlb; |
| 481 | |
| 482 | if (imrc->attrs_to_index) { |
| 483 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 484 | } |
| 485 | |
| 486 | iotlb = imrc->translate(iommu_mr, addr, is_write ? |
| 487 | IOMMU_WO : IOMMU_RO, iommu_idx); |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 488 | |
| 489 | if (!(iotlb.perm & (1 << is_write))) { |
| 490 | goto unassigned; |
| 491 | } |
| 492 | |
| 493 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 494 | | (addr & iotlb.addr_mask)); |
| 495 | page_mask &= iotlb.addr_mask; |
| 496 | *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1); |
| 497 | *target_as = iotlb.target_as; |
| 498 | |
| 499 | section = address_space_translate_internal( |
| 500 | address_space_to_dispatch(iotlb.target_as), addr, xlat, |
| 501 | plen_out, is_mmio); |
| 502 | |
| 503 | iommu_mr = memory_region_get_iommu(section->mr); |
| 504 | } while (unlikely(iommu_mr)); |
| 505 | |
| 506 | if (page_mask_out) { |
| 507 | *page_mask_out = page_mask; |
| 508 | } |
| 509 | return *section; |
| 510 | |
| 511 | unassigned: |
| 512 | return (MemoryRegionSection) { .mr = &io_mem_unassigned }; |
| 513 | } |
| 514 | |
| 515 | /** |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 516 | * flatview_do_translate - translate an address in FlatView |
| 517 | * |
| 518 | * @fv: the flat view that we want to translate on |
| 519 | * @addr: the address to be translated in above address space |
| 520 | * @xlat: the translated address offset within memory region. It |
| 521 | * cannot be @NULL. |
| 522 | * @plen_out: valid read/write length of the translated address. It |
| 523 | * can be @NULL when we don't care about it. |
| 524 | * @page_mask_out: page mask for the translated address. This |
| 525 | * should only be meaningful for IOMMU translated |
| 526 | * addresses, since there may be huge pages that this bit |
| 527 | * would tell. It can be @NULL if we don't care about it. |
| 528 | * @is_write: whether the translation operation is for write |
| 529 | * @is_mmio: whether this can be MMIO, set true if it can |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 530 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 531 | * @attrs: memory transaction attributes |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 532 | * |
| 533 | * This function is called from RCU critical section |
| 534 | */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 535 | static MemoryRegionSection flatview_do_translate(FlatView *fv, |
| 536 | hwaddr addr, |
| 537 | hwaddr *xlat, |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 538 | hwaddr *plen_out, |
| 539 | hwaddr *page_mask_out, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 540 | bool is_write, |
| 541 | bool is_mmio, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 542 | AddressSpace **target_as, |
| 543 | MemTxAttrs attrs) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 544 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 545 | MemoryRegionSection *section; |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 546 | IOMMUMemoryRegion *iommu_mr; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 547 | hwaddr plen = (hwaddr)(-1); |
| 548 | |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 549 | if (!plen_out) { |
| 550 | plen_out = &plen; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 551 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 552 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 553 | section = address_space_translate_internal( |
| 554 | flatview_to_dispatch(fv), addr, xlat, |
| 555 | plen_out, is_mmio); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 556 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 557 | iommu_mr = memory_region_get_iommu(section->mr); |
| 558 | if (unlikely(iommu_mr)) { |
| 559 | return address_space_translate_iommu(iommu_mr, xlat, |
| 560 | plen_out, page_mask_out, |
| 561 | is_write, is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 562 | target_as, attrs); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 563 | } |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 564 | if (page_mask_out) { |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 565 | /* Not behind an IOMMU, use default page size. */ |
| 566 | *page_mask_out = ~TARGET_PAGE_MASK; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 567 | } |
| 568 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 569 | return *section; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 570 | } |
| 571 | |
| 572 | /* Called from RCU critical section */ |
| 573 | IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, |
Peter Maydell | 7446eb0 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 574 | bool is_write, MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 575 | { |
| 576 | MemoryRegionSection section; |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 577 | hwaddr xlat, page_mask; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 578 | |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 579 | /* |
| 580 | * This can never be MMIO, and we don't really care about plen, |
| 581 | * but page mask. |
| 582 | */ |
| 583 | section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 584 | NULL, &page_mask, is_write, false, &as, |
| 585 | attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 586 | |
| 587 | /* Illegal translation */ |
| 588 | if (section.mr == &io_mem_unassigned) { |
| 589 | goto iotlb_fail; |
| 590 | } |
| 591 | |
| 592 | /* Convert memory region offset into address space offset */ |
| 593 | xlat += section.offset_within_address_space - |
| 594 | section.offset_within_region; |
| 595 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 596 | return (IOMMUTLBEntry) { |
Alexey Kardashevskiy | e76bb18 | 2017-09-21 18:50:53 +1000 | [diff] [blame] | 597 | .target_as = as, |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 598 | .iova = addr & ~page_mask, |
| 599 | .translated_addr = xlat & ~page_mask, |
| 600 | .addr_mask = page_mask, |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 601 | /* IOTLBs are for DMAs, and DMA only allows on RAMs. */ |
| 602 | .perm = IOMMU_RW, |
| 603 | }; |
| 604 | |
| 605 | iotlb_fail: |
| 606 | return (IOMMUTLBEntry) {0}; |
| 607 | } |
| 608 | |
| 609 | /* Called from RCU critical section */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 610 | MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 611 | hwaddr *plen, bool is_write, |
| 612 | MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 613 | { |
| 614 | MemoryRegion *mr; |
| 615 | MemoryRegionSection section; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 616 | AddressSpace *as = NULL; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 617 | |
| 618 | /* This can be MMIO, so setup MMIO bit. */ |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 619 | section = flatview_do_translate(fv, addr, xlat, plen, NULL, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 620 | is_write, true, &as, attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 621 | mr = section.mr; |
| 622 | |
Alexey Kardashevskiy | fe680d0 | 2014-05-07 13:40:39 +0000 | [diff] [blame] | 623 | if (xen_enabled() && memory_access_is_direct(mr, is_write)) { |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 624 | hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; |
Peter Crosthwaite | 23820db | 2015-03-16 22:35:54 -0700 | [diff] [blame] | 625 | *plen = MIN(page, *plen); |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 626 | } |
| 627 | |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 628 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 629 | } |
| 630 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 631 | typedef struct TCGIOMMUNotifier { |
| 632 | IOMMUNotifier n; |
| 633 | MemoryRegion *mr; |
| 634 | CPUState *cpu; |
| 635 | int iommu_idx; |
| 636 | bool active; |
| 637 | } TCGIOMMUNotifier; |
| 638 | |
| 639 | static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) |
| 640 | { |
| 641 | TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n); |
| 642 | |
| 643 | if (!notifier->active) { |
| 644 | return; |
| 645 | } |
| 646 | tlb_flush(notifier->cpu); |
| 647 | notifier->active = false; |
| 648 | /* We leave the notifier struct on the list to avoid reallocating it later. |
| 649 | * Generally the number of IOMMUs a CPU deals with will be small. |
| 650 | * In any case we can't unregister the iommu notifier from a notify |
| 651 | * callback. |
| 652 | */ |
| 653 | } |
| 654 | |
| 655 | static void tcg_register_iommu_notifier(CPUState *cpu, |
| 656 | IOMMUMemoryRegion *iommu_mr, |
| 657 | int iommu_idx) |
| 658 | { |
| 659 | /* Make sure this CPU has an IOMMU notifier registered for this |
| 660 | * IOMMU/IOMMU index combination, so that we can flush its TLB |
| 661 | * when the IOMMU tells us the mappings we've cached have changed. |
| 662 | */ |
| 663 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
| 664 | TCGIOMMUNotifier *notifier; |
| 665 | int i; |
| 666 | |
| 667 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 668 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 669 | if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) { |
| 670 | break; |
| 671 | } |
| 672 | } |
| 673 | if (i == cpu->iommu_notifiers->len) { |
| 674 | /* Not found, add a new entry at the end of the array */ |
| 675 | cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 676 | notifier = g_new0(TCGIOMMUNotifier, 1); |
| 677 | g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 678 | |
| 679 | notifier->mr = mr; |
| 680 | notifier->iommu_idx = iommu_idx; |
| 681 | notifier->cpu = cpu; |
| 682 | /* Rather than trying to register interest in the specific part |
| 683 | * of the iommu's address space that we've accessed and then |
| 684 | * expand it later as subsequent accesses touch more of it, we |
| 685 | * just register interest in the whole thing, on the assumption |
| 686 | * that iommu reconfiguration will be rare. |
| 687 | */ |
| 688 | iommu_notifier_init(¬ifier->n, |
| 689 | tcg_iommu_unmap_notify, |
| 690 | IOMMU_NOTIFIER_UNMAP, |
| 691 | 0, |
| 692 | HWADDR_MAX, |
| 693 | iommu_idx); |
| 694 | memory_region_register_iommu_notifier(notifier->mr, ¬ifier->n); |
| 695 | } |
| 696 | |
| 697 | if (!notifier->active) { |
| 698 | notifier->active = true; |
| 699 | } |
| 700 | } |
| 701 | |
| 702 | static void tcg_iommu_free_notifier_list(CPUState *cpu) |
| 703 | { |
| 704 | /* Destroy the CPU's notifier list */ |
| 705 | int i; |
| 706 | TCGIOMMUNotifier *notifier; |
| 707 | |
| 708 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 709 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 710 | memory_region_unregister_iommu_notifier(notifier->mr, ¬ifier->n); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 711 | g_free(notifier); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 712 | } |
| 713 | g_array_free(cpu->iommu_notifiers, true); |
| 714 | } |
| 715 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 716 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 717 | MemoryRegionSection * |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 718 | address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 719 | hwaddr *xlat, hwaddr *plen, |
| 720 | MemTxAttrs attrs, int *prot) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 721 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 722 | MemoryRegionSection *section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 723 | IOMMUMemoryRegion *iommu_mr; |
| 724 | IOMMUMemoryRegionClass *imrc; |
| 725 | IOMMUTLBEntry iotlb; |
| 726 | int iommu_idx; |
Alex Bennée | f35e44e | 2016-10-21 16:34:18 +0100 | [diff] [blame] | 727 | AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch); |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 728 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 729 | for (;;) { |
| 730 | section = address_space_translate_internal(d, addr, &addr, plen, false); |
| 731 | |
| 732 | iommu_mr = memory_region_get_iommu(section->mr); |
| 733 | if (!iommu_mr) { |
| 734 | break; |
| 735 | } |
| 736 | |
| 737 | imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
| 738 | |
| 739 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 740 | tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx); |
| 741 | /* We need all the permissions, so pass IOMMU_NONE so the IOMMU |
| 742 | * doesn't short-cut its translation table walk. |
| 743 | */ |
| 744 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx); |
| 745 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 746 | | (addr & iotlb.addr_mask)); |
| 747 | /* Update the caller's prot bits to remove permissions the IOMMU |
| 748 | * is giving us a failure response for. If we get down to no |
| 749 | * permissions left at all we can give up now. |
| 750 | */ |
| 751 | if (!(iotlb.perm & IOMMU_RO)) { |
| 752 | *prot &= ~(PAGE_READ | PAGE_EXEC); |
| 753 | } |
| 754 | if (!(iotlb.perm & IOMMU_WO)) { |
| 755 | *prot &= ~PAGE_WRITE; |
| 756 | } |
| 757 | |
| 758 | if (!*prot) { |
| 759 | goto translate_fail; |
| 760 | } |
| 761 | |
| 762 | d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as)); |
| 763 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 764 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 765 | assert(!memory_region_is_iommu(section->mr)); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 766 | *xlat = addr; |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 767 | return section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 768 | |
| 769 | translate_fail: |
| 770 | return &d->map.sections[PHYS_SECTION_UNASSIGNED]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 771 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 772 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 773 | |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 774 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 775 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 776 | static int cpu_common_post_load(void *opaque, int version_id) |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 777 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 778 | CPUState *cpu = opaque; |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 779 | |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 780 | /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the |
| 781 | version_id is increased. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 782 | cpu->interrupt_request &= ~0x01; |
Alex Bennée | d10eb08 | 2016-11-14 14:17:28 +0000 | [diff] [blame] | 783 | tlb_flush(cpu); |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 784 | |
Pavel Dovgalyuk | 15a356c | 2018-01-10 16:48:46 +0300 | [diff] [blame] | 785 | /* loadvm has just updated the content of RAM, bypassing the |
| 786 | * usual mechanisms that ensure we flush TBs for writes to |
| 787 | * memory we've translated code from. So we must flush all TBs, |
| 788 | * which will now be stale. |
| 789 | */ |
| 790 | tb_flush(cpu); |
| 791 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 792 | return 0; |
| 793 | } |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 794 | |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 795 | static int cpu_common_pre_load(void *opaque) |
| 796 | { |
| 797 | CPUState *cpu = opaque; |
| 798 | |
Paolo Bonzini | adee642 | 2014-12-19 12:53:14 +0100 | [diff] [blame] | 799 | cpu->exception_index = -1; |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 800 | |
| 801 | return 0; |
| 802 | } |
| 803 | |
| 804 | static bool cpu_common_exception_index_needed(void *opaque) |
| 805 | { |
| 806 | CPUState *cpu = opaque; |
| 807 | |
Paolo Bonzini | adee642 | 2014-12-19 12:53:14 +0100 | [diff] [blame] | 808 | return tcg_enabled() && cpu->exception_index != -1; |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | static const VMStateDescription vmstate_cpu_common_exception_index = { |
| 812 | .name = "cpu_common/exception_index", |
| 813 | .version_id = 1, |
| 814 | .minimum_version_id = 1, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 815 | .needed = cpu_common_exception_index_needed, |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 816 | .fields = (VMStateField[]) { |
| 817 | VMSTATE_INT32(exception_index, CPUState), |
| 818 | VMSTATE_END_OF_LIST() |
| 819 | } |
| 820 | }; |
| 821 | |
Andrey Smetanin | bac05aa | 2015-07-03 15:01:44 +0300 | [diff] [blame] | 822 | static bool cpu_common_crash_occurred_needed(void *opaque) |
| 823 | { |
| 824 | CPUState *cpu = opaque; |
| 825 | |
| 826 | return cpu->crash_occurred; |
| 827 | } |
| 828 | |
| 829 | static const VMStateDescription vmstate_cpu_common_crash_occurred = { |
| 830 | .name = "cpu_common/crash_occurred", |
| 831 | .version_id = 1, |
| 832 | .minimum_version_id = 1, |
| 833 | .needed = cpu_common_crash_occurred_needed, |
| 834 | .fields = (VMStateField[]) { |
| 835 | VMSTATE_BOOL(crash_occurred, CPUState), |
| 836 | VMSTATE_END_OF_LIST() |
| 837 | } |
| 838 | }; |
| 839 | |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 840 | const VMStateDescription vmstate_cpu_common = { |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 841 | .name = "cpu_common", |
| 842 | .version_id = 1, |
| 843 | .minimum_version_id = 1, |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 844 | .pre_load = cpu_common_pre_load, |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 845 | .post_load = cpu_common_post_load, |
Juan Quintela | 35d0845 | 2014-04-16 16:01:33 +0200 | [diff] [blame] | 846 | .fields = (VMStateField[]) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 847 | VMSTATE_UINT32(halted, CPUState), |
| 848 | VMSTATE_UINT32(interrupt_request, CPUState), |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 849 | VMSTATE_END_OF_LIST() |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 850 | }, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 851 | .subsections = (const VMStateDescription*[]) { |
| 852 | &vmstate_cpu_common_exception_index, |
Andrey Smetanin | bac05aa | 2015-07-03 15:01:44 +0300 | [diff] [blame] | 853 | &vmstate_cpu_common_crash_occurred, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 854 | NULL |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 855 | } |
| 856 | }; |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 857 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 858 | #endif |
| 859 | |
Andreas Färber | 38d8f5c | 2012-12-17 19:47:15 +0100 | [diff] [blame] | 860 | CPUState *qemu_get_cpu(int index) |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 861 | { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 862 | CPUState *cpu; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 863 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 864 | CPU_FOREACH(cpu) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 865 | if (cpu->cpu_index == index) { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 866 | return cpu; |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 867 | } |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 868 | } |
| 869 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 870 | return NULL; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 871 | } |
| 872 | |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 873 | #if !defined(CONFIG_USER_ONLY) |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 874 | void cpu_address_space_init(CPUState *cpu, int asidx, |
| 875 | const char *prefix, MemoryRegion *mr) |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 876 | { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 877 | CPUAddressSpace *newas; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 878 | AddressSpace *as = g_new0(AddressSpace, 1); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 879 | char *as_name; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 880 | |
| 881 | assert(mr); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 882 | as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index); |
| 883 | address_space_init(as, mr, as_name); |
| 884 | g_free(as_name); |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 885 | |
| 886 | /* Target code should have set num_ases before calling us */ |
| 887 | assert(asidx < cpu->num_ases); |
| 888 | |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 889 | if (asidx == 0) { |
| 890 | /* address space 0 gets the convenience alias */ |
| 891 | cpu->as = as; |
| 892 | } |
| 893 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 894 | /* KVM cannot currently support multiple address spaces. */ |
| 895 | assert(asidx == 0 || !kvm_enabled()); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 896 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 897 | if (!cpu->cpu_ases) { |
| 898 | cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 899 | } |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 900 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 901 | newas = &cpu->cpu_ases[asidx]; |
| 902 | newas->cpu = cpu; |
| 903 | newas->as = as; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 904 | if (tcg_enabled()) { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 905 | newas->tcg_as_listener.commit = tcg_commit; |
| 906 | memory_listener_register(&newas->tcg_as_listener, as); |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 907 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 908 | } |
Peter Maydell | 651a5bc | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 909 | |
| 910 | AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) |
| 911 | { |
| 912 | /* Return the AddressSpace corresponding to the specified index */ |
| 913 | return cpu->cpu_ases[asidx].as; |
| 914 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 915 | #endif |
| 916 | |
Laurent Vivier | 7bbc124 | 2016-10-20 13:26:04 +0200 | [diff] [blame] | 917 | void cpu_exec_unrealizefn(CPUState *cpu) |
Bharata B Rao | 1c59eb3 | 2016-05-12 09:18:11 +0530 | [diff] [blame] | 918 | { |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 919 | CPUClass *cc = CPU_GET_CLASS(cpu); |
| 920 | |
Paolo Bonzini | 267f685 | 2016-08-28 03:45:14 +0200 | [diff] [blame] | 921 | cpu_list_remove(cpu); |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 922 | |
| 923 | if (cc->vmsd != NULL) { |
| 924 | vmstate_unregister(NULL, cc->vmsd, cpu); |
| 925 | } |
| 926 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
| 927 | vmstate_unregister(NULL, &vmstate_cpu_common, cpu); |
| 928 | } |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 929 | #ifndef CONFIG_USER_ONLY |
| 930 | tcg_iommu_free_notifier_list(cpu); |
| 931 | #endif |
Bharata B Rao | 1c59eb3 | 2016-05-12 09:18:11 +0530 | [diff] [blame] | 932 | } |
| 933 | |
Fam Zheng | c7e002c | 2017-07-14 10:15:08 +0800 | [diff] [blame] | 934 | Property cpu_common_props[] = { |
| 935 | #ifndef CONFIG_USER_ONLY |
| 936 | /* Create a memory property for softmmu CPU object, |
| 937 | * so users can wire up its memory. (This can't go in qom/cpu.c |
| 938 | * because that file is compiled only once for both user-mode |
| 939 | * and system builds.) The default if no link is set up is to use |
| 940 | * the system address space. |
| 941 | */ |
| 942 | DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION, |
| 943 | MemoryRegion *), |
| 944 | #endif |
| 945 | DEFINE_PROP_END_OF_LIST(), |
| 946 | }; |
| 947 | |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 948 | void cpu_exec_initfn(CPUState *cpu) |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 949 | { |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 950 | cpu->as = NULL; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 951 | cpu->num_ases = 0; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 952 | |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 953 | #ifndef CONFIG_USER_ONLY |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 954 | cpu->thread_id = qemu_get_thread_id(); |
Peter Crosthwaite | 6731d86 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 955 | cpu->memory = system_memory; |
| 956 | object_ref(OBJECT(cpu->memory)); |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 957 | #endif |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 958 | } |
| 959 | |
Laurent Vivier | ce5b1bb | 2016-10-20 13:26:03 +0200 | [diff] [blame] | 960 | void cpu_exec_realizefn(CPUState *cpu, Error **errp) |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 961 | { |
Richard Henderson | 55c3cee | 2017-10-15 19:02:42 -0700 | [diff] [blame] | 962 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Emilio G. Cota | 2dda635 | 2017-11-13 13:55:25 +0000 | [diff] [blame] | 963 | static bool tcg_target_initialized; |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 964 | |
Paolo Bonzini | 267f685 | 2016-08-28 03:45:14 +0200 | [diff] [blame] | 965 | cpu_list_add(cpu); |
Igor Mammedov | 1bc7e52 | 2016-07-25 11:59:19 +0200 | [diff] [blame] | 966 | |
Emilio G. Cota | 2dda635 | 2017-11-13 13:55:25 +0000 | [diff] [blame] | 967 | if (tcg_enabled() && !tcg_target_initialized) { |
| 968 | tcg_target_initialized = true; |
Richard Henderson | 55c3cee | 2017-10-15 19:02:42 -0700 | [diff] [blame] | 969 | cc->tcg_initialize(); |
| 970 | } |
Emilio G. Cota | 5005e25 | 2018-10-09 13:45:54 -0400 | [diff] [blame] | 971 | tlb_init(cpu); |
Richard Henderson | 55c3cee | 2017-10-15 19:02:42 -0700 | [diff] [blame] | 972 | |
Igor Mammedov | 1bc7e52 | 2016-07-25 11:59:19 +0200 | [diff] [blame] | 973 | #ifndef CONFIG_USER_ONLY |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 974 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 975 | vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 976 | } |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 977 | if (cc->vmsd != NULL) { |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 978 | vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 979 | } |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 980 | |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 981 | cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *)); |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 982 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 983 | } |
| 984 | |
Igor Mammedov | 2278b93 | 2018-02-07 11:40:26 +0100 | [diff] [blame] | 985 | const char *parse_cpu_model(const char *cpu_model) |
| 986 | { |
| 987 | ObjectClass *oc; |
| 988 | CPUClass *cc; |
| 989 | gchar **model_pieces; |
| 990 | const char *cpu_type; |
| 991 | |
| 992 | model_pieces = g_strsplit(cpu_model, ",", 2); |
| 993 | |
| 994 | oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); |
| 995 | if (oc == NULL) { |
| 996 | error_report("unable to find CPU model '%s'", model_pieces[0]); |
| 997 | g_strfreev(model_pieces); |
| 998 | exit(EXIT_FAILURE); |
| 999 | } |
| 1000 | |
| 1001 | cpu_type = object_class_get_name(oc); |
| 1002 | cc = CPU_CLASS(oc); |
| 1003 | cc->parse_features(cpu_type, model_pieces[1], &error_fatal); |
| 1004 | g_strfreev(model_pieces); |
| 1005 | return cpu_type; |
| 1006 | } |
| 1007 | |
Paolo Bonzini | c40d479 | 2018-07-02 14:45:25 +0200 | [diff] [blame] | 1008 | #if defined(CONFIG_USER_ONLY) |
Paolo Bonzini | 8bca9a0 | 2018-05-30 11:58:36 +0200 | [diff] [blame] | 1009 | void tb_invalidate_phys_addr(target_ulong addr) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 1010 | { |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 1011 | mmap_lock(); |
Paolo Bonzini | 8bca9a0 | 2018-05-30 11:58:36 +0200 | [diff] [blame] | 1012 | tb_invalidate_phys_page_range(addr, addr + 1, 0); |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 1013 | mmap_unlock(); |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 1014 | } |
Paolo Bonzini | 8bca9a0 | 2018-05-30 11:58:36 +0200 | [diff] [blame] | 1015 | |
| 1016 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
| 1017 | { |
| 1018 | tb_invalidate_phys_addr(pc); |
| 1019 | } |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 1020 | #else |
Paolo Bonzini | 8bca9a0 | 2018-05-30 11:58:36 +0200 | [diff] [blame] | 1021 | void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs) |
| 1022 | { |
| 1023 | ram_addr_t ram_addr; |
| 1024 | MemoryRegion *mr; |
| 1025 | hwaddr l = 1; |
| 1026 | |
Paolo Bonzini | c40d479 | 2018-07-02 14:45:25 +0200 | [diff] [blame] | 1027 | if (!tcg_enabled()) { |
| 1028 | return; |
| 1029 | } |
| 1030 | |
Paolo Bonzini | 8bca9a0 | 2018-05-30 11:58:36 +0200 | [diff] [blame] | 1031 | rcu_read_lock(); |
| 1032 | mr = address_space_translate(as, addr, &addr, &l, false, attrs); |
| 1033 | if (!(memory_region_is_ram(mr) |
| 1034 | || memory_region_is_romd(mr))) { |
| 1035 | rcu_read_unlock(); |
| 1036 | return; |
| 1037 | } |
| 1038 | ram_addr = memory_region_get_ram_addr(mr) + addr; |
| 1039 | tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0); |
| 1040 | rcu_read_unlock(); |
| 1041 | } |
| 1042 | |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 1043 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
| 1044 | { |
| 1045 | MemTxAttrs attrs; |
| 1046 | hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs); |
| 1047 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 1048 | if (phys != -1) { |
| 1049 | /* Locks grabbed by tb_invalidate_phys_addr */ |
| 1050 | tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, |
Peter Maydell | c874dc4 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 1051 | phys | (pc & ~TARGET_PAGE_MASK), attrs); |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 1052 | } |
| 1053 | } |
| 1054 | #endif |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 1055 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 1056 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1057 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 1058 | |
| 1059 | { |
| 1060 | } |
| 1061 | |
Peter Maydell | 3ee887e | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1062 | int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, |
| 1063 | int flags) |
| 1064 | { |
| 1065 | return -ENOSYS; |
| 1066 | } |
| 1067 | |
| 1068 | void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) |
| 1069 | { |
| 1070 | } |
| 1071 | |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1072 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 1073 | int flags, CPUWatchpoint **watchpoint) |
| 1074 | { |
| 1075 | return -ENOSYS; |
| 1076 | } |
| 1077 | #else |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1078 | /* Add a watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1079 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1080 | int flags, CPUWatchpoint **watchpoint) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1081 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1082 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1083 | |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1084 | /* forbid ranges which are empty or run off the end of the address space */ |
Max Filippov | 07e2863 | 2014-09-17 22:03:36 -0700 | [diff] [blame] | 1085 | if (len == 0 || (addr + len - 1) < addr) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1086 | error_report("tried to set invalid watchpoint at %" |
| 1087 | VADDR_PRIx ", len=%" VADDR_PRIu, addr, len); |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1088 | return -EINVAL; |
| 1089 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1090 | wp = g_malloc(sizeof(*wp)); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1091 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1092 | wp->vaddr = addr; |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1093 | wp->len = len; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1094 | wp->flags = flags; |
| 1095 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 1096 | /* keep all GDB-injected watchpoints in front */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1097 | if (flags & BP_GDB) { |
| 1098 | QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); |
| 1099 | } else { |
| 1100 | QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); |
| 1101 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1102 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 1103 | tlb_flush_page(cpu, addr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1104 | |
| 1105 | if (watchpoint) |
| 1106 | *watchpoint = wp; |
| 1107 | return 0; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1108 | } |
| 1109 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1110 | /* Remove a specific watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1111 | int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1112 | int flags) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1113 | { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1114 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1115 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1116 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1117 | if (addr == wp->vaddr && len == wp->len |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1118 | && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1119 | cpu_watchpoint_remove_by_ref(cpu, wp); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1120 | return 0; |
| 1121 | } |
| 1122 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1123 | return -ENOENT; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1124 | } |
| 1125 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1126 | /* Remove a specific watchpoint by reference. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1127 | void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1128 | { |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1129 | QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 1130 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 1131 | tlb_flush_page(cpu, watchpoint->vaddr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1132 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1133 | g_free(watchpoint); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 1134 | } |
| 1135 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1136 | /* Remove all matching watchpoints. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1137 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1138 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1139 | CPUWatchpoint *wp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1140 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1141 | QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 1142 | if (wp->flags & mask) { |
| 1143 | cpu_watchpoint_remove_by_ref(cpu, wp); |
| 1144 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1145 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1146 | } |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1147 | |
| 1148 | /* Return true if this watchpoint address matches the specified |
| 1149 | * access (ie the address range covered by the watchpoint overlaps |
| 1150 | * partially or completely with the address range covered by the |
| 1151 | * access). |
| 1152 | */ |
| 1153 | static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp, |
| 1154 | vaddr addr, |
| 1155 | vaddr len) |
| 1156 | { |
| 1157 | /* We know the lengths are non-zero, but a little caution is |
| 1158 | * required to avoid errors in the case where the range ends |
| 1159 | * exactly at the top of the address space and so addr + len |
| 1160 | * wraps round to zero. |
| 1161 | */ |
| 1162 | vaddr wpend = wp->vaddr + wp->len - 1; |
| 1163 | vaddr addrend = addr + len - 1; |
| 1164 | |
| 1165 | return !(addr > wpend || wp->vaddr > addrend); |
| 1166 | } |
| 1167 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 1168 | #endif |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1169 | |
| 1170 | /* Add a breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1171 | int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1172 | CPUBreakpoint **breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1173 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1174 | CPUBreakpoint *bp; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 1175 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1176 | bp = g_malloc(sizeof(*bp)); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1177 | |
| 1178 | bp->pc = pc; |
| 1179 | bp->flags = flags; |
| 1180 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 1181 | /* keep all GDB-injected breakpoints in front */ |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 1182 | if (flags & BP_GDB) { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1183 | QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 1184 | } else { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1185 | QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 1186 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1187 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1188 | breakpoint_invalidate(cpu, pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1189 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 1190 | if (breakpoint) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1191 | *breakpoint = bp; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 1192 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1193 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1194 | } |
| 1195 | |
| 1196 | /* Remove a specific breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1197 | int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1198 | { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1199 | CPUBreakpoint *bp; |
| 1200 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1201 | QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1202 | if (bp->pc == pc && bp->flags == flags) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1203 | cpu_breakpoint_remove_by_ref(cpu, bp); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1204 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1205 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1206 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1207 | return -ENOENT; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1208 | } |
| 1209 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1210 | /* Remove a specific breakpoint by reference. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1211 | void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1212 | { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1213 | QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry); |
| 1214 | |
| 1215 | breakpoint_invalidate(cpu, breakpoint->pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1216 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1217 | g_free(breakpoint); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1218 | } |
| 1219 | |
| 1220 | /* Remove all matching breakpoints. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1221 | void cpu_breakpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1222 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1223 | CPUBreakpoint *bp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1224 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 1225 | QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 1226 | if (bp->flags & mask) { |
| 1227 | cpu_breakpoint_remove_by_ref(cpu, bp); |
| 1228 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 1229 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 1230 | } |
| 1231 | |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 1232 | /* enable or disable single step mode. EXCP_DEBUG is returned by the |
| 1233 | CPU loop after each instruction */ |
Andreas Färber | 3825b28 | 2013-06-24 18:41:06 +0200 | [diff] [blame] | 1234 | void cpu_single_step(CPUState *cpu, int enabled) |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 1235 | { |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 1236 | if (cpu->singlestep_enabled != enabled) { |
| 1237 | cpu->singlestep_enabled = enabled; |
| 1238 | if (kvm_enabled()) { |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 1239 | kvm_update_guest_debug(cpu, 0); |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 1240 | } else { |
Stuart Brady | ccbb4d4 | 2009-05-03 12:15:06 +0100 | [diff] [blame] | 1241 | /* must flush all the translated code to avoid inconsistencies */ |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 1242 | /* XXX: only flush what is necessary */ |
Peter Crosthwaite | bbd77c1 | 2015-06-23 19:31:15 -0700 | [diff] [blame] | 1243 | tb_flush(cpu); |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 1244 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 1245 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 1246 | } |
| 1247 | |
Andreas Färber | a47dddd | 2013-09-03 17:38:47 +0200 | [diff] [blame] | 1248 | void cpu_abort(CPUState *cpu, const char *fmt, ...) |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1249 | { |
| 1250 | va_list ap; |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 1251 | va_list ap2; |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1252 | |
| 1253 | va_start(ap, fmt); |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 1254 | va_copy(ap2, ap); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1255 | fprintf(stderr, "qemu: fatal: "); |
| 1256 | vfprintf(stderr, fmt, ap); |
| 1257 | fprintf(stderr, "\n"); |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 1258 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
Paolo Bonzini | 013a294 | 2015-11-13 13:16:27 +0100 | [diff] [blame] | 1259 | if (qemu_log_separate()) { |
Richard Henderson | 1ee7321 | 2016-09-22 15:17:10 -0700 | [diff] [blame] | 1260 | qemu_log_lock(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 1261 | qemu_log("qemu: fatal: "); |
| 1262 | qemu_log_vprintf(fmt, ap2); |
| 1263 | qemu_log("\n"); |
Andreas Färber | a076285 | 2013-06-16 07:28:50 +0200 | [diff] [blame] | 1264 | log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 31b1a7b | 2009-01-15 22:35:09 +0000 | [diff] [blame] | 1265 | qemu_log_flush(); |
Richard Henderson | 1ee7321 | 2016-09-22 15:17:10 -0700 | [diff] [blame] | 1266 | qemu_log_unlock(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 1267 | qemu_log_close(); |
balrog | 924edca | 2007-06-10 14:07:13 +0000 | [diff] [blame] | 1268 | } |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 1269 | va_end(ap2); |
j_mayer | f937329 | 2007-09-29 12:18:20 +0000 | [diff] [blame] | 1270 | va_end(ap); |
Pavel Dovgalyuk | 7615936 | 2015-09-17 19:25:07 +0300 | [diff] [blame] | 1271 | replay_finish(); |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 1272 | #if defined(CONFIG_USER_ONLY) |
| 1273 | { |
| 1274 | struct sigaction act; |
| 1275 | sigfillset(&act.sa_mask); |
| 1276 | act.sa_handler = SIG_DFL; |
Peter Maydell | 8347c18 | 2018-05-15 19:27:00 +0100 | [diff] [blame] | 1277 | act.sa_flags = 0; |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 1278 | sigaction(SIGABRT, &act, NULL); |
| 1279 | } |
| 1280 | #endif |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1281 | abort(); |
| 1282 | } |
| 1283 | |
bellard | 0124311 | 2004-01-04 15:48:17 +0000 | [diff] [blame] | 1284 | #if !defined(CONFIG_USER_ONLY) |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1285 | /* Called from RCU critical section */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1286 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 1287 | { |
| 1288 | RAMBlock *block; |
| 1289 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 1290 | block = atomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1291 | if (block && addr - block->offset < block->max_length) { |
Paolo Bonzini | 68851b9 | 2015-10-22 13:51:30 +0200 | [diff] [blame] | 1292 | return block; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1293 | } |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1294 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1295 | if (addr - block->offset < block->max_length) { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1296 | goto found; |
| 1297 | } |
| 1298 | } |
| 1299 | |
| 1300 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1301 | abort(); |
| 1302 | |
| 1303 | found: |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 1304 | /* It is safe to write mru_block outside the iothread lock. This |
| 1305 | * is what happens: |
| 1306 | * |
| 1307 | * mru_block = xxx |
| 1308 | * rcu_read_unlock() |
| 1309 | * xxx removed from list |
| 1310 | * rcu_read_lock() |
| 1311 | * read mru_block |
| 1312 | * mru_block = NULL; |
| 1313 | * call_rcu(reclaim_ramblock, xxx); |
| 1314 | * rcu_read_unlock() |
| 1315 | * |
| 1316 | * atomic_rcu_set is not needed here. The block was already published |
| 1317 | * when it was placed into the list. Here we're just making an extra |
| 1318 | * copy of the pointer. |
| 1319 | */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1320 | ram_list.mru_block = block; |
| 1321 | return block; |
| 1322 | } |
| 1323 | |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1324 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1325 | { |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 1326 | CPUState *cpu; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1327 | ram_addr_t start1; |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1328 | RAMBlock *block; |
| 1329 | ram_addr_t end; |
| 1330 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 1331 | assert(tcg_enabled()); |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1332 | end = TARGET_PAGE_ALIGN(start + length); |
| 1333 | start &= TARGET_PAGE_MASK; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1334 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1335 | rcu_read_lock(); |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1336 | block = qemu_get_ram_block(start); |
| 1337 | assert(block == qemu_get_ram_block(end - 1)); |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 1338 | start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 1339 | CPU_FOREACH(cpu) { |
| 1340 | tlb_reset_dirty(cpu, start1, length); |
| 1341 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1342 | rcu_read_unlock(); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1343 | } |
| 1344 | |
| 1345 | /* Note: start and end must be within the same ram block. */ |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1346 | bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, |
| 1347 | ram_addr_t length, |
| 1348 | unsigned client) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1349 | { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1350 | DirtyMemoryBlocks *blocks; |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1351 | unsigned long end, page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1352 | bool dirty = false; |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1353 | |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1354 | if (length == 0) { |
| 1355 | return false; |
| 1356 | } |
| 1357 | |
| 1358 | end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; |
| 1359 | page = start >> TARGET_PAGE_BITS; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1360 | |
| 1361 | rcu_read_lock(); |
| 1362 | |
| 1363 | blocks = atomic_rcu_read(&ram_list.dirty_memory[client]); |
| 1364 | |
| 1365 | while (page < end) { |
| 1366 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 1367 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 1368 | unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset); |
| 1369 | |
| 1370 | dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx], |
| 1371 | offset, num); |
| 1372 | page += num; |
| 1373 | } |
| 1374 | |
| 1375 | rcu_read_unlock(); |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1376 | |
| 1377 | if (dirty && tcg_enabled()) { |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1378 | tlb_reset_dirty_range_all(start, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1379 | } |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1380 | |
| 1381 | return dirty; |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1382 | } |
| 1383 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 1384 | DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty |
| 1385 | (ram_addr_t start, ram_addr_t length, unsigned client) |
| 1386 | { |
| 1387 | DirtyMemoryBlocks *blocks; |
| 1388 | unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL); |
| 1389 | ram_addr_t first = QEMU_ALIGN_DOWN(start, align); |
| 1390 | ram_addr_t last = QEMU_ALIGN_UP(start + length, align); |
| 1391 | DirtyBitmapSnapshot *snap; |
| 1392 | unsigned long page, end, dest; |
| 1393 | |
| 1394 | snap = g_malloc0(sizeof(*snap) + |
| 1395 | ((last - first) >> (TARGET_PAGE_BITS + 3))); |
| 1396 | snap->start = first; |
| 1397 | snap->end = last; |
| 1398 | |
| 1399 | page = first >> TARGET_PAGE_BITS; |
| 1400 | end = last >> TARGET_PAGE_BITS; |
| 1401 | dest = 0; |
| 1402 | |
| 1403 | rcu_read_lock(); |
| 1404 | |
| 1405 | blocks = atomic_rcu_read(&ram_list.dirty_memory[client]); |
| 1406 | |
| 1407 | while (page < end) { |
| 1408 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 1409 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 1410 | unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset); |
| 1411 | |
| 1412 | assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL))); |
| 1413 | assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL))); |
| 1414 | offset >>= BITS_PER_LEVEL; |
| 1415 | |
| 1416 | bitmap_copy_and_clear_atomic(snap->dirty + dest, |
| 1417 | blocks->blocks[idx] + offset, |
| 1418 | num); |
| 1419 | page += num; |
| 1420 | dest += num >> BITS_PER_LEVEL; |
| 1421 | } |
| 1422 | |
| 1423 | rcu_read_unlock(); |
| 1424 | |
| 1425 | if (tcg_enabled()) { |
| 1426 | tlb_reset_dirty_range_all(start, length); |
| 1427 | } |
| 1428 | |
| 1429 | return snap; |
| 1430 | } |
| 1431 | |
| 1432 | bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, |
| 1433 | ram_addr_t start, |
| 1434 | ram_addr_t length) |
| 1435 | { |
| 1436 | unsigned long page, end; |
| 1437 | |
| 1438 | assert(start >= snap->start); |
| 1439 | assert(start + length <= snap->end); |
| 1440 | |
| 1441 | end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS; |
| 1442 | page = (start - snap->start) >> TARGET_PAGE_BITS; |
| 1443 | |
| 1444 | while (page < end) { |
| 1445 | if (test_bit(page, snap->dirty)) { |
| 1446 | return true; |
| 1447 | } |
| 1448 | page++; |
| 1449 | } |
| 1450 | return false; |
| 1451 | } |
| 1452 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 1453 | /* Called from RCU critical section */ |
Andreas Färber | bb0e627 | 2013-09-03 13:32:01 +0200 | [diff] [blame] | 1454 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1455 | MemoryRegionSection *section, |
| 1456 | target_ulong vaddr, |
| 1457 | hwaddr paddr, hwaddr xlat, |
| 1458 | int prot, |
| 1459 | target_ulong *address) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1460 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1461 | hwaddr iotlb; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1462 | CPUWatchpoint *wp; |
| 1463 | |
Blue Swirl | cc5bea6 | 2012-04-14 14:56:48 +0000 | [diff] [blame] | 1464 | if (memory_region_is_ram(section->mr)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1465 | /* Normal RAM. */ |
Paolo Bonzini | e4e6979 | 2016-03-01 10:44:50 +0100 | [diff] [blame] | 1466 | iotlb = memory_region_get_ram_addr(section->mr) + xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1467 | if (!section->readonly) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1468 | iotlb |= PHYS_SECTION_NOTDIRTY; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1469 | } else { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1470 | iotlb |= PHYS_SECTION_ROM; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1471 | } |
| 1472 | } else { |
Peter Maydell | 0b8e2c1 | 2015-07-20 12:27:16 +0100 | [diff] [blame] | 1473 | AddressSpaceDispatch *d; |
| 1474 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1475 | d = flatview_to_dispatch(section->fv); |
Peter Maydell | 0b8e2c1 | 2015-07-20 12:27:16 +0100 | [diff] [blame] | 1476 | iotlb = section - d->map.sections; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1477 | iotlb += xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1478 | } |
| 1479 | |
| 1480 | /* Make accesses to pages with watchpoints go via the |
| 1481 | watchpoint trap routines. */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1482 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1483 | if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1484 | /* Avoid trapping reads of pages with a write breakpoint. */ |
| 1485 | if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1486 | iotlb = PHYS_SECTION_WATCH + paddr; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1487 | *address |= TLB_MMIO; |
| 1488 | break; |
| 1489 | } |
| 1490 | } |
| 1491 | } |
| 1492 | |
| 1493 | return iotlb; |
| 1494 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 1495 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 1496 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 1497 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 1498 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1499 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1500 | uint16_t section); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1501 | static subpage_t *subpage_init(FlatView *fv, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 1502 | |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 1503 | static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) = |
Igor Mammedov | a2b257d | 2014-10-31 16:38:37 +0000 | [diff] [blame] | 1504 | qemu_anon_ram_alloc; |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1505 | |
| 1506 | /* |
| 1507 | * Set a custom physical guest memory alloator. |
| 1508 | * Accelerators with unusual needs may need this. Hopefully, we can |
| 1509 | * get rid of it eventually. |
| 1510 | */ |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 1511 | void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared)) |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1512 | { |
| 1513 | phys_mem_alloc = alloc; |
| 1514 | } |
| 1515 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1516 | static uint16_t phys_section_add(PhysPageMap *map, |
| 1517 | MemoryRegionSection *section) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1518 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1519 | /* The physical section number is ORed with a page-aligned |
| 1520 | * pointer to produce the iotlb entries. Thus it should |
| 1521 | * never overflow into the page-aligned value. |
| 1522 | */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1523 | assert(map->sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1524 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1525 | if (map->sections_nb == map->sections_nb_alloc) { |
| 1526 | map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16); |
| 1527 | map->sections = g_renew(MemoryRegionSection, map->sections, |
| 1528 | map->sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1529 | } |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1530 | map->sections[map->sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1531 | memory_region_ref(section->mr); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1532 | return map->sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1533 | } |
| 1534 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1535 | static void phys_section_destroy(MemoryRegion *mr) |
| 1536 | { |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1537 | bool have_sub_page = mr->subpage; |
| 1538 | |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1539 | memory_region_unref(mr); |
| 1540 | |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1541 | if (have_sub_page) { |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1542 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 1543 | object_unref(OBJECT(&subpage->iomem)); |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1544 | g_free(subpage); |
| 1545 | } |
| 1546 | } |
| 1547 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1548 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1549 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1550 | while (map->sections_nb > 0) { |
| 1551 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1552 | phys_section_destroy(section->mr); |
| 1553 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1554 | g_free(map->sections); |
| 1555 | g_free(map->nodes); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1556 | } |
| 1557 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1558 | static void register_subpage(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1559 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1560 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1561 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1562 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1563 | & TARGET_PAGE_MASK; |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 1564 | MemoryRegionSection *existing = phys_page_find(d, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1565 | MemoryRegionSection subsection = { |
| 1566 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1567 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1568 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1569 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1570 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1571 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1572 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1573 | if (!(existing->mr->subpage)) { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1574 | subpage = subpage_init(fv, base); |
| 1575 | subsection.fv = fv; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1576 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1577 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1578 | phys_section_add(&d->map, &subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1579 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1580 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1581 | } |
| 1582 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1583 | end = start + int128_get64(section->size) - 1; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1584 | subpage_register(subpage, start, end, |
| 1585 | phys_section_add(&d->map, section)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1586 | } |
| 1587 | |
| 1588 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1589 | static void register_multipage(FlatView *fv, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1590 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1591 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1592 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1593 | hwaddr start_addr = section->offset_within_address_space; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1594 | uint16_t section_index = phys_section_add(&d->map, section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1595 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 1596 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 1597 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1598 | assert(num_pages); |
| 1599 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1600 | } |
| 1601 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1602 | /* |
| 1603 | * The range in *section* may look like this: |
| 1604 | * |
| 1605 | * |s|PPPPPPP|s| |
| 1606 | * |
| 1607 | * where s stands for subpage and P for page. |
| 1608 | */ |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 1609 | void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1610 | { |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1611 | MemoryRegionSection remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1612 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1613 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1614 | /* register first subpage */ |
| 1615 | if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 1616 | uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space) |
| 1617 | - remain.offset_within_address_space; |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1618 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1619 | MemoryRegionSection now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1620 | now.size = int128_min(int128_make64(left), now.size); |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1621 | register_subpage(fv, &now); |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1622 | if (int128_eq(remain.size, now.size)) { |
| 1623 | return; |
| 1624 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1625 | remain.size = int128_sub(remain.size, now.size); |
| 1626 | remain.offset_within_address_space += int128_get64(now.size); |
| 1627 | remain.offset_within_region += int128_get64(now.size); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1628 | } |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1629 | |
| 1630 | /* register whole pages */ |
| 1631 | if (int128_ge(remain.size, page_size)) { |
| 1632 | MemoryRegionSection now = remain; |
| 1633 | now.size = int128_and(now.size, int128_neg(page_size)); |
| 1634 | register_multipage(fv, &now); |
| 1635 | if (int128_eq(remain.size, now.size)) { |
| 1636 | return; |
| 1637 | } |
| 1638 | remain.size = int128_sub(remain.size, now.size); |
| 1639 | remain.offset_within_address_space += int128_get64(now.size); |
| 1640 | remain.offset_within_region += int128_get64(now.size); |
| 1641 | } |
| 1642 | |
| 1643 | /* register last subpage */ |
| 1644 | register_subpage(fv, &remain); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1645 | } |
| 1646 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 1647 | void qemu_flush_coalesced_mmio_buffer(void) |
| 1648 | { |
| 1649 | if (kvm_enabled()) |
| 1650 | kvm_flush_coalesced_mmio_buffer(); |
| 1651 | } |
| 1652 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1653 | void qemu_mutex_lock_ramlist(void) |
| 1654 | { |
| 1655 | qemu_mutex_lock(&ram_list.mutex); |
| 1656 | } |
| 1657 | |
| 1658 | void qemu_mutex_unlock_ramlist(void) |
| 1659 | { |
| 1660 | qemu_mutex_unlock(&ram_list.mutex); |
| 1661 | } |
| 1662 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1663 | void ram_block_dump(Monitor *mon) |
| 1664 | { |
| 1665 | RAMBlock *block; |
| 1666 | char *psize; |
| 1667 | |
| 1668 | rcu_read_lock(); |
| 1669 | monitor_printf(mon, "%24s %8s %18s %18s %18s\n", |
| 1670 | "Block Name", "PSize", "Offset", "Used", "Total"); |
| 1671 | RAMBLOCK_FOREACH(block) { |
| 1672 | psize = size_to_str(block->page_size); |
| 1673 | monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64 |
| 1674 | " 0x%016" PRIx64 "\n", block->idstr, psize, |
| 1675 | (uint64_t)block->offset, |
| 1676 | (uint64_t)block->used_length, |
| 1677 | (uint64_t)block->max_length); |
| 1678 | g_free(psize); |
| 1679 | } |
| 1680 | rcu_read_unlock(); |
| 1681 | } |
| 1682 | |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1683 | #ifdef __linux__ |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1684 | /* |
| 1685 | * FIXME TOCTTOU: this iterates over memory backends' mem-path, which |
| 1686 | * may or may not name the same files / on the same filesystem now as |
| 1687 | * when we actually open and map them. Iterate over the file |
| 1688 | * descriptors instead, and use qemu_fd_getpagesize(). |
| 1689 | */ |
| 1690 | static int find_max_supported_pagesize(Object *obj, void *opaque) |
| 1691 | { |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1692 | long *hpsize_min = opaque; |
| 1693 | |
| 1694 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
David Gibson | 2b10808 | 2018-04-03 15:05:45 +1000 | [diff] [blame] | 1695 | long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj)); |
| 1696 | |
David Gibson | 0de6e2a | 2018-04-03 14:55:11 +1000 | [diff] [blame] | 1697 | if (hpsize < *hpsize_min) { |
| 1698 | *hpsize_min = hpsize; |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1699 | } |
| 1700 | } |
| 1701 | |
| 1702 | return 0; |
| 1703 | } |
| 1704 | |
| 1705 | long qemu_getrampagesize(void) |
| 1706 | { |
| 1707 | long hpsize = LONG_MAX; |
| 1708 | long mainrampagesize; |
| 1709 | Object *memdev_root; |
| 1710 | |
David Gibson | 0de6e2a | 2018-04-03 14:55:11 +1000 | [diff] [blame] | 1711 | mainrampagesize = qemu_mempath_getpagesize(mem_path); |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1712 | |
| 1713 | /* it's possible we have memory-backend objects with |
| 1714 | * hugepage-backed RAM. these may get mapped into system |
| 1715 | * address space via -numa parameters or memory hotplug |
| 1716 | * hooks. we want to take these into account, but we |
| 1717 | * also want to make sure these supported hugepage |
| 1718 | * sizes are applicable across the entire range of memory |
| 1719 | * we may boot from, so we take the min across all |
| 1720 | * backends, and assume normal pages in cases where a |
| 1721 | * backend isn't backed by hugepages. |
| 1722 | */ |
| 1723 | memdev_root = object_resolve_path("/objects", NULL); |
| 1724 | if (memdev_root) { |
| 1725 | object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize); |
| 1726 | } |
| 1727 | if (hpsize == LONG_MAX) { |
| 1728 | /* No additional memory regions found ==> Report main RAM page size */ |
| 1729 | return mainrampagesize; |
| 1730 | } |
| 1731 | |
| 1732 | /* If NUMA is disabled or the NUMA nodes are not backed with a |
| 1733 | * memory-backend, then there is at least one node using "normal" RAM, |
| 1734 | * so if its page size is smaller we have got to report that size instead. |
| 1735 | */ |
| 1736 | if (hpsize > mainrampagesize && |
| 1737 | (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) { |
| 1738 | static bool warned; |
| 1739 | if (!warned) { |
| 1740 | error_report("Huge page support disabled (n/a for main memory)."); |
| 1741 | warned = true; |
| 1742 | } |
| 1743 | return mainrampagesize; |
| 1744 | } |
| 1745 | |
| 1746 | return hpsize; |
| 1747 | } |
| 1748 | #else |
| 1749 | long qemu_getrampagesize(void) |
| 1750 | { |
| 1751 | return getpagesize(); |
| 1752 | } |
| 1753 | #endif |
| 1754 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 1755 | #ifdef CONFIG_POSIX |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1756 | static int64_t get_file_size(int fd) |
| 1757 | { |
| 1758 | int64_t size = lseek(fd, 0, SEEK_END); |
| 1759 | if (size < 0) { |
| 1760 | return -errno; |
| 1761 | } |
| 1762 | return size; |
| 1763 | } |
| 1764 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1765 | static int file_ram_open(const char *path, |
| 1766 | const char *region_name, |
| 1767 | bool *created, |
| 1768 | Error **errp) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1769 | { |
| 1770 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1771 | char *sanitized_name; |
| 1772 | char *c; |
Paolo Bonzini | 5c3ece7 | 2016-03-17 15:53:13 +0100 | [diff] [blame] | 1773 | int fd = -1; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1774 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1775 | *created = false; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1776 | for (;;) { |
| 1777 | fd = open(path, O_RDWR); |
| 1778 | if (fd >= 0) { |
| 1779 | /* @path names an existing file, use it */ |
| 1780 | break; |
| 1781 | } |
| 1782 | if (errno == ENOENT) { |
| 1783 | /* @path names a file that doesn't exist, create it */ |
| 1784 | fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644); |
| 1785 | if (fd >= 0) { |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1786 | *created = true; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1787 | break; |
| 1788 | } |
| 1789 | } else if (errno == EISDIR) { |
| 1790 | /* @path names a directory, create a file there */ |
| 1791 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1792 | sanitized_name = g_strdup(region_name); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1793 | for (c = sanitized_name; *c != '\0'; c++) { |
| 1794 | if (*c == '/') { |
| 1795 | *c = '_'; |
| 1796 | } |
| 1797 | } |
| 1798 | |
| 1799 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 1800 | sanitized_name); |
| 1801 | g_free(sanitized_name); |
| 1802 | |
| 1803 | fd = mkstemp(filename); |
| 1804 | if (fd >= 0) { |
| 1805 | unlink(filename); |
| 1806 | g_free(filename); |
| 1807 | break; |
| 1808 | } |
| 1809 | g_free(filename); |
| 1810 | } |
| 1811 | if (errno != EEXIST && errno != EINTR) { |
| 1812 | error_setg_errno(errp, errno, |
| 1813 | "can't open backing store %s for guest RAM", |
| 1814 | path); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1815 | return -1; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1816 | } |
| 1817 | /* |
| 1818 | * Try again on EINTR and EEXIST. The latter happens when |
| 1819 | * something else creates the file between our two open(). |
| 1820 | */ |
| 1821 | } |
| 1822 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1823 | return fd; |
| 1824 | } |
| 1825 | |
| 1826 | static void *file_ram_alloc(RAMBlock *block, |
| 1827 | ram_addr_t memory, |
| 1828 | int fd, |
| 1829 | bool truncate, |
| 1830 | Error **errp) |
| 1831 | { |
| 1832 | void *area; |
| 1833 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1834 | block->page_size = qemu_fd_getpagesize(fd); |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1835 | if (block->mr->align % block->page_size) { |
| 1836 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1837 | " must be multiples of page size 0x%zx", |
| 1838 | block->mr->align, block->page_size); |
| 1839 | return NULL; |
David Hildenbrand | 61362b7 | 2018-06-07 17:47:05 +0200 | [diff] [blame] | 1840 | } else if (block->mr->align && !is_power_of_2(block->mr->align)) { |
| 1841 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1842 | " must be a power of two", block->mr->align); |
| 1843 | return NULL; |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1844 | } |
| 1845 | block->mr->align = MAX(block->page_size, block->mr->align); |
Haozhong Zhang | 8360668 | 2016-10-24 20:49:37 +0800 | [diff] [blame] | 1846 | #if defined(__s390x__) |
| 1847 | if (kvm_enabled()) { |
| 1848 | block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN); |
| 1849 | } |
| 1850 | #endif |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1851 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1852 | if (memory < block->page_size) { |
Hu Tao | 557529d | 2014-09-09 13:28:00 +0800 | [diff] [blame] | 1853 | error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to " |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1854 | "or larger than page size 0x%zx", |
| 1855 | memory, block->page_size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1856 | return NULL; |
Haozhong Zhang | 1775f11 | 2016-11-02 09:05:51 +0800 | [diff] [blame] | 1857 | } |
| 1858 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1859 | memory = ROUND_UP(memory, block->page_size); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1860 | |
| 1861 | /* |
| 1862 | * ftruncate is not supported by hugetlbfs in older |
| 1863 | * hosts, so don't bother bailing out on errors. |
| 1864 | * If anything goes wrong with it under other filesystems, |
| 1865 | * mmap will fail. |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1866 | * |
| 1867 | * Do not truncate the non-empty backend file to avoid corrupting |
| 1868 | * the existing data in the file. Disabling shrinking is not |
| 1869 | * enough. For example, the current vNVDIMM implementation stores |
| 1870 | * the guest NVDIMM labels at the end of the backend file. If the |
| 1871 | * backend file is later extended, QEMU will not be able to find |
| 1872 | * those labels. Therefore, extending the non-empty backend file |
| 1873 | * is disabled as well. |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1874 | */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1875 | if (truncate && ftruncate(fd, memory)) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1876 | perror("ftruncate"); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1877 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1878 | |
Dominik Dingel | d2f39ad | 2016-04-25 13:55:38 +0200 | [diff] [blame] | 1879 | area = qemu_ram_mmap(fd, memory, block->mr->align, |
| 1880 | block->flags & RAM_SHARED); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1881 | if (area == MAP_FAILED) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1882 | error_setg_errno(errp, errno, |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1883 | "unable to map backing store for guest RAM"); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1884 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1885 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1886 | |
| 1887 | if (mem_prealloc) { |
Jitendra Kolhe | 1e356fc | 2017-02-24 09:01:43 +0530 | [diff] [blame] | 1888 | os_mem_prealloc(fd, area, memory, smp_cpus, errp); |
Igor Mammedov | 056b68a | 2016-07-20 11:54:03 +0200 | [diff] [blame] | 1889 | if (errp && *errp) { |
Murilo Opsfelder Araujo | 53adb9d | 2019-01-30 21:36:05 -0200 | [diff] [blame] | 1890 | qemu_ram_munmap(fd, area, memory); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1891 | return NULL; |
Igor Mammedov | 056b68a | 2016-07-20 11:54:03 +0200 | [diff] [blame] | 1892 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1893 | } |
| 1894 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1895 | block->fd = fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1896 | return area; |
| 1897 | } |
| 1898 | #endif |
| 1899 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1900 | /* Allocate space within the ram_addr_t space that governs the |
| 1901 | * dirty bitmaps. |
| 1902 | * Called with the ramlist lock held. |
| 1903 | */ |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1904 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1905 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1906 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1907 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1908 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1909 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1910 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1911 | if (QLIST_EMPTY_RCU(&ram_list.blocks)) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1912 | return 0; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1913 | } |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1914 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1915 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1916 | ram_addr_t candidate, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1917 | |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1918 | /* Align blocks to start on a 'long' in the bitmap |
| 1919 | * which makes the bitmap sync'ing take the fast path. |
| 1920 | */ |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1921 | candidate = block->offset + block->max_length; |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1922 | candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1923 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1924 | /* Search for the closest following block |
| 1925 | * and find the gap. |
| 1926 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1927 | RAMBLOCK_FOREACH(next_block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1928 | if (next_block->offset >= candidate) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1929 | next = MIN(next, next_block->offset); |
| 1930 | } |
| 1931 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1932 | |
| 1933 | /* If it fits remember our place and remember the size |
| 1934 | * of gap, but keep going so that we might find a smaller |
| 1935 | * gap to fill so avoiding fragmentation. |
| 1936 | */ |
| 1937 | if (next - candidate >= size && next - candidate < mingap) { |
| 1938 | offset = candidate; |
| 1939 | mingap = next - candidate; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1940 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1941 | |
| 1942 | trace_find_ram_offset_loop(size, candidate, offset, next, mingap); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1943 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1944 | |
| 1945 | if (offset == RAM_ADDR_MAX) { |
| 1946 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1947 | (uint64_t)size); |
| 1948 | abort(); |
| 1949 | } |
| 1950 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1951 | trace_find_ram_offset(size, offset); |
| 1952 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1953 | return offset; |
| 1954 | } |
| 1955 | |
David Hildenbrand | c136180 | 2018-06-20 22:27:36 +0200 | [diff] [blame] | 1956 | static unsigned long last_ram_page(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1957 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1958 | RAMBlock *block; |
| 1959 | ram_addr_t last = 0; |
| 1960 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1961 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1962 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1963 | last = MAX(last, block->offset + block->max_length); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1964 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1965 | rcu_read_unlock(); |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1966 | return last >> TARGET_PAGE_BITS; |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1967 | } |
| 1968 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1969 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1970 | { |
| 1971 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1972 | |
| 1973 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 1974 | if (!machine_dump_guest_core(current_machine)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1975 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1976 | if (ret) { |
| 1977 | perror("qemu_madvise"); |
| 1978 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1979 | "but dump_guest_core=off specified\n"); |
| 1980 | } |
| 1981 | } |
| 1982 | } |
| 1983 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 1984 | const char *qemu_ram_get_idstr(RAMBlock *rb) |
| 1985 | { |
| 1986 | return rb->idstr; |
| 1987 | } |
| 1988 | |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 1989 | void *qemu_ram_get_host_addr(RAMBlock *rb) |
| 1990 | { |
| 1991 | return rb->host; |
| 1992 | } |
| 1993 | |
| 1994 | ram_addr_t qemu_ram_get_offset(RAMBlock *rb) |
| 1995 | { |
| 1996 | return rb->offset; |
| 1997 | } |
| 1998 | |
| 1999 | ram_addr_t qemu_ram_get_used_length(RAMBlock *rb) |
| 2000 | { |
| 2001 | return rb->used_length; |
| 2002 | } |
| 2003 | |
Dr. David Alan Gilbert | 463a4ac | 2017-03-07 18:36:36 +0000 | [diff] [blame] | 2004 | bool qemu_ram_is_shared(RAMBlock *rb) |
| 2005 | { |
| 2006 | return rb->flags & RAM_SHARED; |
| 2007 | } |
| 2008 | |
Dr. David Alan Gilbert | 2ce1664 | 2018-03-12 17:20:58 +0000 | [diff] [blame] | 2009 | /* Note: Only set at the start of postcopy */ |
| 2010 | bool qemu_ram_is_uf_zeroable(RAMBlock *rb) |
| 2011 | { |
| 2012 | return rb->flags & RAM_UF_ZEROPAGE; |
| 2013 | } |
| 2014 | |
| 2015 | void qemu_ram_set_uf_zeroable(RAMBlock *rb) |
| 2016 | { |
| 2017 | rb->flags |= RAM_UF_ZEROPAGE; |
| 2018 | } |
| 2019 | |
CĂ©dric Le Goater | b895de5 | 2018-05-14 08:57:00 +0200 | [diff] [blame] | 2020 | bool qemu_ram_is_migratable(RAMBlock *rb) |
| 2021 | { |
| 2022 | return rb->flags & RAM_MIGRATABLE; |
| 2023 | } |
| 2024 | |
| 2025 | void qemu_ram_set_migratable(RAMBlock *rb) |
| 2026 | { |
| 2027 | rb->flags |= RAM_MIGRATABLE; |
| 2028 | } |
| 2029 | |
| 2030 | void qemu_ram_unset_migratable(RAMBlock *rb) |
| 2031 | { |
| 2032 | rb->flags &= ~RAM_MIGRATABLE; |
| 2033 | } |
| 2034 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2035 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 2036 | void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 2037 | { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 2038 | RAMBlock *block; |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 2039 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 2040 | assert(new_block); |
| 2041 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2042 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 2043 | if (dev) { |
| 2044 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2045 | if (id) { |
| 2046 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2047 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2048 | } |
| 2049 | } |
| 2050 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 2051 | |
Gonglei | ab0a995 | 2016-05-10 10:05:00 +0800 | [diff] [blame] | 2052 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2053 | RAMBLOCK_FOREACH(block) { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 2054 | if (block != new_block && |
| 2055 | !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2056 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 2057 | new_block->idstr); |
| 2058 | abort(); |
| 2059 | } |
| 2060 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2061 | rcu_read_unlock(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 2062 | } |
| 2063 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2064 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 2065 | void qemu_ram_unset_idstr(RAMBlock *block) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 2066 | { |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2067 | /* FIXME: arch_init.c assumes that this is not called throughout |
| 2068 | * migration. Ignore the problem since hot-unplug during migration |
| 2069 | * does not work anyway. |
| 2070 | */ |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 2071 | if (block) { |
| 2072 | memset(block->idstr, 0, sizeof(block->idstr)); |
| 2073 | } |
| 2074 | } |
| 2075 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 2076 | size_t qemu_ram_pagesize(RAMBlock *rb) |
| 2077 | { |
| 2078 | return rb->page_size; |
| 2079 | } |
| 2080 | |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 2081 | /* Returns the largest size of page in use */ |
| 2082 | size_t qemu_ram_pagesize_largest(void) |
| 2083 | { |
| 2084 | RAMBlock *block; |
| 2085 | size_t largest = 0; |
| 2086 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2087 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 2088 | largest = MAX(largest, qemu_ram_pagesize(block)); |
| 2089 | } |
| 2090 | |
| 2091 | return largest; |
| 2092 | } |
| 2093 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2094 | static int memory_try_enable_merging(void *addr, size_t len) |
| 2095 | { |
Marcel Apfelbaum | 75cc7f0 | 2015-02-04 17:43:55 +0200 | [diff] [blame] | 2096 | if (!machine_mem_merge(current_machine)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2097 | /* disabled by the user */ |
| 2098 | return 0; |
| 2099 | } |
| 2100 | |
| 2101 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 2102 | } |
| 2103 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2104 | /* Only legal before guest might have detected the memory size: e.g. on |
| 2105 | * incoming migration, or right after reset. |
| 2106 | * |
| 2107 | * As memory core doesn't know how is memory accessed, it is up to |
| 2108 | * resize callback to update device state and/or add assertions to detect |
| 2109 | * misuse, if necessary. |
| 2110 | */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 2111 | int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp) |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2112 | { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2113 | assert(block); |
| 2114 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 2115 | newsize = HOST_PAGE_ALIGN(newsize); |
Michael S. Tsirkin | 129ddaf | 2015-02-17 10:15:30 +0100 | [diff] [blame] | 2116 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2117 | if (block->used_length == newsize) { |
| 2118 | return 0; |
| 2119 | } |
| 2120 | |
| 2121 | if (!(block->flags & RAM_RESIZEABLE)) { |
| 2122 | error_setg_errno(errp, EINVAL, |
| 2123 | "Length mismatch: %s: 0x" RAM_ADDR_FMT |
| 2124 | " in != 0x" RAM_ADDR_FMT, block->idstr, |
| 2125 | newsize, block->used_length); |
| 2126 | return -EINVAL; |
| 2127 | } |
| 2128 | |
| 2129 | if (block->max_length < newsize) { |
| 2130 | error_setg_errno(errp, EINVAL, |
| 2131 | "Length too large: %s: 0x" RAM_ADDR_FMT |
| 2132 | " > 0x" RAM_ADDR_FMT, block->idstr, |
| 2133 | newsize, block->max_length); |
| 2134 | return -EINVAL; |
| 2135 | } |
| 2136 | |
| 2137 | cpu_physical_memory_clear_dirty_range(block->offset, block->used_length); |
| 2138 | block->used_length = newsize; |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 2139 | cpu_physical_memory_set_dirty_range(block->offset, block->used_length, |
| 2140 | DIRTY_CLIENTS_ALL); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2141 | memory_region_set_size(block->mr, newsize); |
| 2142 | if (block->resized) { |
| 2143 | block->resized(block->idstr, newsize, block->host); |
| 2144 | } |
| 2145 | return 0; |
| 2146 | } |
| 2147 | |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 2148 | /* Called with ram_list.mutex held */ |
| 2149 | static void dirty_memory_extend(ram_addr_t old_ram_size, |
| 2150 | ram_addr_t new_ram_size) |
| 2151 | { |
| 2152 | ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size, |
| 2153 | DIRTY_MEMORY_BLOCK_SIZE); |
| 2154 | ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size, |
| 2155 | DIRTY_MEMORY_BLOCK_SIZE); |
| 2156 | int i; |
| 2157 | |
| 2158 | /* Only need to extend if block count increased */ |
| 2159 | if (new_num_blocks <= old_num_blocks) { |
| 2160 | return; |
| 2161 | } |
| 2162 | |
| 2163 | for (i = 0; i < DIRTY_MEMORY_NUM; i++) { |
| 2164 | DirtyMemoryBlocks *old_blocks; |
| 2165 | DirtyMemoryBlocks *new_blocks; |
| 2166 | int j; |
| 2167 | |
| 2168 | old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]); |
| 2169 | new_blocks = g_malloc(sizeof(*new_blocks) + |
| 2170 | sizeof(new_blocks->blocks[0]) * new_num_blocks); |
| 2171 | |
| 2172 | if (old_num_blocks) { |
| 2173 | memcpy(new_blocks->blocks, old_blocks->blocks, |
| 2174 | old_num_blocks * sizeof(old_blocks->blocks[0])); |
| 2175 | } |
| 2176 | |
| 2177 | for (j = old_num_blocks; j < new_num_blocks; j++) { |
| 2178 | new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE); |
| 2179 | } |
| 2180 | |
| 2181 | atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks); |
| 2182 | |
| 2183 | if (old_blocks) { |
| 2184 | g_free_rcu(old_blocks, rcu); |
| 2185 | } |
| 2186 | } |
| 2187 | } |
| 2188 | |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2189 | static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared) |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 2190 | { |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2191 | RAMBlock *block; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 2192 | RAMBlock *last_block = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 2193 | ram_addr_t old_ram_size, new_ram_size; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 2194 | Error *err = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 2195 | |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 2196 | old_ram_size = last_ram_page(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 2197 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2198 | qemu_mutex_lock_ramlist(); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2199 | new_block->offset = find_ram_offset(new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2200 | |
| 2201 | if (!new_block->host) { |
| 2202 | if (xen_enabled()) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2203 | xen_ram_alloc(new_block->offset, new_block->max_length, |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 2204 | new_block->mr, &err); |
| 2205 | if (err) { |
| 2206 | error_propagate(errp, err); |
| 2207 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 2208 | return; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 2209 | } |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2210 | } else { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2211 | new_block->host = phys_mem_alloc(new_block->max_length, |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2212 | &new_block->mr->align, shared); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 2213 | if (!new_block->host) { |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2214 | error_setg_errno(errp, errno, |
| 2215 | "cannot set up guest memory '%s'", |
| 2216 | memory_region_name(new_block->mr)); |
| 2217 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 2218 | return; |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 2219 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2220 | memory_try_enable_merging(new_block->host, new_block->max_length); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 2221 | } |
| 2222 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2223 | |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 2224 | new_ram_size = MAX(old_ram_size, |
| 2225 | (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS); |
| 2226 | if (new_ram_size > old_ram_size) { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 2227 | dirty_memory_extend(old_ram_size, new_ram_size); |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 2228 | } |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 2229 | /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ, |
| 2230 | * QLIST (which has an RCU-friendly variant) does not have insertion at |
| 2231 | * tail, so save the last element in last_block. |
| 2232 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2233 | RAMBLOCK_FOREACH(block) { |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 2234 | last_block = block; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2235 | if (block->max_length < new_block->max_length) { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 2236 | break; |
| 2237 | } |
| 2238 | } |
| 2239 | if (block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2240 | QLIST_INSERT_BEFORE_RCU(block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 2241 | } else if (last_block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2242 | QLIST_INSERT_AFTER_RCU(last_block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 2243 | } else { /* list is empty */ |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2244 | QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next); |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 2245 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2246 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2247 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2248 | /* Write list before version */ |
| 2249 | smp_wmb(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 2250 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2251 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 2252 | |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2253 | cpu_physical_memory_set_dirty_range(new_block->offset, |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 2254 | new_block->used_length, |
| 2255 | DIRTY_CLIENTS_ALL); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2256 | |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 2257 | if (new_block->host) { |
| 2258 | qemu_ram_setup_dump(new_block->host, new_block->max_length); |
| 2259 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE); |
Cao jin | c2cd627 | 2016-09-12 14:34:56 +0800 | [diff] [blame] | 2260 | /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */ |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 2261 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK); |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2262 | ram_block_notify_add(new_block->host, new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2263 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 2264 | } |
| 2265 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 2266 | #ifdef CONFIG_POSIX |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2267 | RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2268 | uint32_t ram_flags, int fd, |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2269 | Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2270 | { |
| 2271 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2272 | Error *local_err = NULL; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 2273 | int64_t file_size; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2274 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 2275 | /* Just support these ram flags by now. */ |
| 2276 | assert((ram_flags & ~(RAM_SHARED | RAM_PMEM)) == 0); |
| 2277 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2278 | if (xen_enabled()) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 2279 | error_setg(errp, "-mem-path not supported with Xen"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2280 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2281 | } |
| 2282 | |
Marc-André Lureau | e45e7ae | 2017-06-02 18:12:21 +0400 | [diff] [blame] | 2283 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 2284 | error_setg(errp, |
| 2285 | "host lacks kvm mmu notifiers, -mem-path unsupported"); |
| 2286 | return NULL; |
| 2287 | } |
| 2288 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2289 | if (phys_mem_alloc != qemu_anon_ram_alloc) { |
| 2290 | /* |
| 2291 | * file_ram_alloc() needs to allocate just like |
| 2292 | * phys_mem_alloc, but we haven't bothered to provide |
| 2293 | * a hook there. |
| 2294 | */ |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 2295 | error_setg(errp, |
| 2296 | "-mem-path not supported with this accelerator"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2297 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2298 | } |
| 2299 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 2300 | size = HOST_PAGE_ALIGN(size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 2301 | file_size = get_file_size(fd); |
| 2302 | if (file_size > 0 && file_size < size) { |
| 2303 | error_setg(errp, "backing store %s size 0x%" PRIx64 |
| 2304 | " does not match 'size' option 0x" RAM_ADDR_FMT, |
| 2305 | mem_path, file_size, size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 2306 | return NULL; |
| 2307 | } |
| 2308 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2309 | new_block = g_malloc0(sizeof(*new_block)); |
| 2310 | new_block->mr = mr; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2311 | new_block->used_length = size; |
| 2312 | new_block->max_length = size; |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2313 | new_block->flags = ram_flags; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 2314 | new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 2315 | if (!new_block->host) { |
| 2316 | g_free(new_block); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2317 | return NULL; |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 2318 | } |
| 2319 | |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2320 | ram_block_add(new_block, &local_err, ram_flags & RAM_SHARED); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2321 | if (local_err) { |
| 2322 | g_free(new_block); |
| 2323 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2324 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2325 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2326 | return new_block; |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2327 | |
| 2328 | } |
| 2329 | |
| 2330 | |
| 2331 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2332 | uint32_t ram_flags, const char *mem_path, |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2333 | Error **errp) |
| 2334 | { |
| 2335 | int fd; |
| 2336 | bool created; |
| 2337 | RAMBlock *block; |
| 2338 | |
| 2339 | fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp); |
| 2340 | if (fd < 0) { |
| 2341 | return NULL; |
| 2342 | } |
| 2343 | |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2344 | block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, errp); |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2345 | if (!block) { |
| 2346 | if (created) { |
| 2347 | unlink(mem_path); |
| 2348 | } |
| 2349 | close(fd); |
| 2350 | return NULL; |
| 2351 | } |
| 2352 | |
| 2353 | return block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2354 | } |
Paolo Bonzini | 0b183fc | 2014-05-14 17:43:19 +0800 | [diff] [blame] | 2355 | #endif |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2356 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2357 | static |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2358 | RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size, |
| 2359 | void (*resized)(const char*, |
| 2360 | uint64_t length, |
| 2361 | void *host), |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2362 | void *host, bool resizeable, bool share, |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2363 | MemoryRegion *mr, Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2364 | { |
| 2365 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2366 | Error *local_err = NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2367 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 2368 | size = HOST_PAGE_ALIGN(size); |
| 2369 | max_size = HOST_PAGE_ALIGN(max_size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2370 | new_block = g_malloc0(sizeof(*new_block)); |
| 2371 | new_block->mr = mr; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2372 | new_block->resized = resized; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2373 | new_block->used_length = size; |
| 2374 | new_block->max_length = max_size; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2375 | assert(max_size >= size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2376 | new_block->fd = -1; |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 2377 | new_block->page_size = getpagesize(); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2378 | new_block->host = host; |
| 2379 | if (host) { |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2380 | new_block->flags |= RAM_PREALLOC; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2381 | } |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2382 | if (resizeable) { |
| 2383 | new_block->flags |= RAM_RESIZEABLE; |
| 2384 | } |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2385 | ram_block_add(new_block, &local_err, share); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2386 | if (local_err) { |
| 2387 | g_free(new_block); |
| 2388 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2389 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2390 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2391 | return new_block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2392 | } |
| 2393 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2394 | RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2395 | MemoryRegion *mr, Error **errp) |
| 2396 | { |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2397 | return qemu_ram_alloc_internal(size, size, NULL, host, false, |
| 2398 | false, mr, errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2399 | } |
| 2400 | |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2401 | RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share, |
| 2402 | MemoryRegion *mr, Error **errp) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2403 | { |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2404 | return qemu_ram_alloc_internal(size, size, NULL, NULL, false, |
| 2405 | share, mr, errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2406 | } |
| 2407 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2408 | RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2409 | void (*resized)(const char*, |
| 2410 | uint64_t length, |
| 2411 | void *host), |
| 2412 | MemoryRegion *mr, Error **errp) |
| 2413 | { |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2414 | return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true, |
| 2415 | false, mr, errp); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2416 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2417 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2418 | static void reclaim_ramblock(RAMBlock *block) |
| 2419 | { |
| 2420 | if (block->flags & RAM_PREALLOC) { |
| 2421 | ; |
| 2422 | } else if (xen_enabled()) { |
| 2423 | xen_invalidate_map_cache_entry(block->host); |
| 2424 | #ifndef _WIN32 |
| 2425 | } else if (block->fd >= 0) { |
Murilo Opsfelder Araujo | 53adb9d | 2019-01-30 21:36:05 -0200 | [diff] [blame] | 2426 | qemu_ram_munmap(block->fd, block->host, block->max_length); |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2427 | close(block->fd); |
| 2428 | #endif |
| 2429 | } else { |
| 2430 | qemu_anon_ram_free(block->host, block->max_length); |
| 2431 | } |
| 2432 | g_free(block); |
| 2433 | } |
| 2434 | |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2435 | void qemu_ram_free(RAMBlock *block) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2436 | { |
Marc-André Lureau | 85bc2a1 | 2016-03-29 13:20:51 +0200 | [diff] [blame] | 2437 | if (!block) { |
| 2438 | return; |
| 2439 | } |
| 2440 | |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2441 | if (block->host) { |
| 2442 | ram_block_notify_remove(block->host, block->max_length); |
| 2443 | } |
| 2444 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2445 | qemu_mutex_lock_ramlist(); |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2446 | QLIST_REMOVE_RCU(block, next); |
| 2447 | ram_list.mru_block = NULL; |
| 2448 | /* Write list before version */ |
| 2449 | smp_wmb(); |
| 2450 | ram_list.version++; |
| 2451 | call_rcu(block, reclaim_ramblock, rcu); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2452 | qemu_mutex_unlock_ramlist(); |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2453 | } |
| 2454 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2455 | #ifndef _WIN32 |
| 2456 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 2457 | { |
| 2458 | RAMBlock *block; |
| 2459 | ram_addr_t offset; |
| 2460 | int flags; |
| 2461 | void *area, *vaddr; |
| 2462 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2463 | RAMBLOCK_FOREACH(block) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2464 | offset = addr - block->offset; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2465 | if (offset < block->max_length) { |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 2466 | vaddr = ramblock_ptr(block, offset); |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2467 | if (block->flags & RAM_PREALLOC) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2468 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 2469 | } else if (xen_enabled()) { |
| 2470 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2471 | } else { |
| 2472 | flags = MAP_FIXED; |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2473 | if (block->fd >= 0) { |
Paolo Bonzini | dbcb898 | 2014-06-10 19:15:24 +0800 | [diff] [blame] | 2474 | flags |= (block->flags & RAM_SHARED ? |
| 2475 | MAP_SHARED : MAP_PRIVATE); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2476 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 2477 | flags, block->fd, offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2478 | } else { |
Markus Armbruster | 2eb9fba | 2013-07-31 15:11:09 +0200 | [diff] [blame] | 2479 | /* |
| 2480 | * Remap needs to match alloc. Accelerators that |
| 2481 | * set phys_mem_alloc never remap. If they did, |
| 2482 | * we'd need a remap hook here. |
| 2483 | */ |
| 2484 | assert(phys_mem_alloc == qemu_anon_ram_alloc); |
| 2485 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2486 | flags |= MAP_PRIVATE | MAP_ANONYMOUS; |
| 2487 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 2488 | flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2489 | } |
| 2490 | if (area != vaddr) { |
Alistair Francis | 493d89b | 2018-02-03 09:43:14 +0100 | [diff] [blame] | 2491 | error_report("Could not remap addr: " |
| 2492 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "", |
| 2493 | length, addr); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2494 | exit(1); |
| 2495 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2496 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 2497 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2498 | } |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2499 | } |
| 2500 | } |
| 2501 | } |
| 2502 | #endif /* !_WIN32 */ |
| 2503 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2504 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2505 | * This should not be used for general purpose DMA. Use address_space_map |
| 2506 | * or address_space_rw instead. For local memory (e.g. video ram) that the |
| 2507 | * device owns, use memory_region_get_ram_ptr. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2508 | * |
Paolo Bonzini | 49b24af | 2015-12-16 10:30:47 +0100 | [diff] [blame] | 2509 | * Called within RCU critical section. |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2510 | */ |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2511 | void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr) |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2512 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2513 | RAMBlock *block = ram_block; |
| 2514 | |
| 2515 | if (block == NULL) { |
| 2516 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2517 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2518 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2519 | |
| 2520 | if (xen_enabled() && block->host == NULL) { |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2521 | /* We need to check if the requested address is in the RAM |
| 2522 | * because we don't want to map the entire memory in QEMU. |
| 2523 | * In that case just map until the end of the page. |
| 2524 | */ |
| 2525 | if (block->offset == 0) { |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2526 | return xen_map_cache(addr, 0, 0, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2527 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2528 | |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2529 | block->host = xen_map_cache(block->offset, block->max_length, 1, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2530 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2531 | return ramblock_ptr(block, addr); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 2532 | } |
| 2533 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2534 | /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2535 | * but takes a size argument. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2536 | * |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2537 | * Called within RCU critical section. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2538 | */ |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2539 | static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr, |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2540 | hwaddr *size, bool lock) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2541 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2542 | RAMBlock *block = ram_block; |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2543 | if (*size == 0) { |
| 2544 | return NULL; |
| 2545 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2546 | |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2547 | if (block == NULL) { |
| 2548 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2549 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2550 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2551 | *size = MIN(*size, block->max_length - addr); |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2552 | |
| 2553 | if (xen_enabled() && block->host == NULL) { |
| 2554 | /* We need to check if the requested address is in the RAM |
| 2555 | * because we don't want to map the entire memory in QEMU. |
| 2556 | * In that case just map the requested area. |
| 2557 | */ |
| 2558 | if (block->offset == 0) { |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2559 | return xen_map_cache(addr, *size, lock, lock); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2560 | } |
| 2561 | |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 2562 | block->host = xen_map_cache(block->offset, block->max_length, 1, lock); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2563 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2564 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2565 | return ramblock_ptr(block, addr); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2566 | } |
| 2567 | |
Dr. David Alan Gilbert | f90bb71 | 2018-03-12 17:20:57 +0000 | [diff] [blame] | 2568 | /* Return the offset of a hostpointer within a ramblock */ |
| 2569 | ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host) |
| 2570 | { |
| 2571 | ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host; |
| 2572 | assert((uintptr_t)host >= (uintptr_t)rb->host); |
| 2573 | assert(res < rb->max_length); |
| 2574 | |
| 2575 | return res; |
| 2576 | } |
| 2577 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2578 | /* |
| 2579 | * Translates a host ptr back to a RAMBlock, a ram_addr and an offset |
| 2580 | * in that RAMBlock. |
| 2581 | * |
| 2582 | * ptr: Host pointer to look up |
| 2583 | * round_offset: If true round the result offset down to a page boundary |
| 2584 | * *ram_addr: set to result ram_addr |
| 2585 | * *offset: set to result offset within the RAMBlock |
| 2586 | * |
| 2587 | * Returns: RAMBlock (or NULL if not found) |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2588 | * |
| 2589 | * By the time this function returns, the returned pointer is not protected |
| 2590 | * by RCU anymore. If the caller is not within an RCU critical section and |
| 2591 | * does not hold the iothread lock, it must have other means of protecting the |
| 2592 | * pointer, such as a reference to the region that includes the incoming |
| 2593 | * ram_addr_t. |
| 2594 | */ |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2595 | RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2596 | ram_addr_t *offset) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2597 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2598 | RAMBlock *block; |
| 2599 | uint8_t *host = ptr; |
| 2600 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2601 | if (xen_enabled()) { |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2602 | ram_addr_t ram_addr; |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2603 | rcu_read_lock(); |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2604 | ram_addr = xen_ram_addr_from_mapcache(ptr); |
| 2605 | block = qemu_get_ram_block(ram_addr); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2606 | if (block) { |
Anthony PERARD | d6b6aec | 2016-06-09 16:56:17 +0100 | [diff] [blame] | 2607 | *offset = ram_addr - block->offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2608 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2609 | rcu_read_unlock(); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2610 | return block; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 2611 | } |
| 2612 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2613 | rcu_read_lock(); |
| 2614 | block = atomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2615 | if (block && block->host && host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2616 | goto found; |
| 2617 | } |
| 2618 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2619 | RAMBLOCK_FOREACH(block) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2620 | /* This case append when the block is not mapped. */ |
| 2621 | if (block->host == NULL) { |
| 2622 | continue; |
| 2623 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2624 | if (host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2625 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2626 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2627 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2628 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2629 | rcu_read_unlock(); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2630 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2631 | |
| 2632 | found: |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2633 | *offset = (host - block->host); |
| 2634 | if (round_offset) { |
| 2635 | *offset &= TARGET_PAGE_MASK; |
| 2636 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2637 | rcu_read_unlock(); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2638 | return block; |
| 2639 | } |
| 2640 | |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2641 | /* |
| 2642 | * Finds the named RAMBlock |
| 2643 | * |
| 2644 | * name: The name of RAMBlock to find |
| 2645 | * |
| 2646 | * Returns: RAMBlock (or NULL if not found) |
| 2647 | */ |
| 2648 | RAMBlock *qemu_ram_block_by_name(const char *name) |
| 2649 | { |
| 2650 | RAMBlock *block; |
| 2651 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2652 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2653 | if (!strcmp(name, block->idstr)) { |
| 2654 | return block; |
| 2655 | } |
| 2656 | } |
| 2657 | |
| 2658 | return NULL; |
| 2659 | } |
| 2660 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2661 | /* Some of the softmmu routines need to translate from a host pointer |
| 2662 | (typically a TLB entry) back to a ram offset. */ |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2663 | ram_addr_t qemu_ram_addr_from_host(void *ptr) |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2664 | { |
| 2665 | RAMBlock *block; |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2666 | ram_addr_t offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2667 | |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2668 | block = qemu_ram_block_from_host(ptr, false, &offset); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2669 | if (!block) { |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2670 | return RAM_ADDR_INVALID; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2671 | } |
| 2672 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2673 | return block->offset + offset; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 2674 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2675 | |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2676 | /* Called within RCU critical section. */ |
| 2677 | void memory_notdirty_write_prepare(NotDirtyInfo *ndi, |
| 2678 | CPUState *cpu, |
| 2679 | vaddr mem_vaddr, |
| 2680 | ram_addr_t ram_addr, |
| 2681 | unsigned size) |
| 2682 | { |
| 2683 | ndi->cpu = cpu; |
| 2684 | ndi->ram_addr = ram_addr; |
| 2685 | ndi->mem_vaddr = mem_vaddr; |
| 2686 | ndi->size = size; |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2687 | ndi->pages = NULL; |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2688 | |
| 2689 | assert(tcg_enabled()); |
| 2690 | if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2691 | ndi->pages = page_collection_lock(ram_addr, ram_addr + size); |
| 2692 | tb_invalidate_phys_page_fast(ndi->pages, ram_addr, size); |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2693 | } |
| 2694 | } |
| 2695 | |
| 2696 | /* Called within RCU critical section. */ |
| 2697 | void memory_notdirty_write_complete(NotDirtyInfo *ndi) |
| 2698 | { |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2699 | if (ndi->pages) { |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 2700 | assert(tcg_enabled()); |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2701 | page_collection_unlock(ndi->pages); |
| 2702 | ndi->pages = NULL; |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2703 | } |
| 2704 | |
| 2705 | /* Set both VGA and migration bits for simplicity and to remove |
| 2706 | * the notdirty callback faster. |
| 2707 | */ |
| 2708 | cpu_physical_memory_set_dirty_range(ndi->ram_addr, ndi->size, |
| 2709 | DIRTY_CLIENTS_NOCODE); |
| 2710 | /* we remove the notdirty callback only if the code has been |
| 2711 | flushed */ |
| 2712 | if (!cpu_physical_memory_is_clean(ndi->ram_addr)) { |
| 2713 | tlb_set_dirty(ndi->cpu, ndi->mem_vaddr); |
| 2714 | } |
| 2715 | } |
| 2716 | |
Paolo Bonzini | 49b24af | 2015-12-16 10:30:47 +0100 | [diff] [blame] | 2717 | /* Called within RCU critical section. */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2718 | static void notdirty_mem_write(void *opaque, hwaddr ram_addr, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2719 | uint64_t val, unsigned size) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2720 | { |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2721 | NotDirtyInfo ndi; |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2722 | |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2723 | memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr, |
| 2724 | ram_addr, size); |
| 2725 | |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2726 | stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val); |
Peter Maydell | 2726627 | 2017-11-20 18:08:27 +0000 | [diff] [blame] | 2727 | memory_notdirty_write_complete(&ndi); |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2728 | } |
| 2729 | |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 2730 | static bool notdirty_mem_accepts(void *opaque, hwaddr addr, |
Peter Maydell | 8372d38 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2731 | unsigned size, bool is_write, |
| 2732 | MemTxAttrs attrs) |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 2733 | { |
| 2734 | return is_write; |
| 2735 | } |
| 2736 | |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2737 | static const MemoryRegionOps notdirty_mem_ops = { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2738 | .write = notdirty_mem_write, |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 2739 | .valid.accepts = notdirty_mem_accepts, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2740 | .endianness = DEVICE_NATIVE_ENDIAN, |
Andrew Baumann | ad52878 | 2017-10-13 11:19:13 -0700 | [diff] [blame] | 2741 | .valid = { |
| 2742 | .min_access_size = 1, |
| 2743 | .max_access_size = 8, |
| 2744 | .unaligned = false, |
| 2745 | }, |
| 2746 | .impl = { |
| 2747 | .min_access_size = 1, |
| 2748 | .max_access_size = 8, |
| 2749 | .unaligned = false, |
| 2750 | }, |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2751 | }; |
| 2752 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2753 | /* Generate a debug exception if a watchpoint has been hit. */ |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2754 | static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2755 | { |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2756 | CPUState *cpu = current_cpu; |
Sergey Fedorov | 568496c | 2016-02-11 11:17:32 +0000 | [diff] [blame] | 2757 | CPUClass *cc = CPU_GET_CLASS(cpu); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2758 | target_ulong vaddr; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2759 | CPUWatchpoint *wp; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2760 | |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2761 | assert(tcg_enabled()); |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2762 | if (cpu->watchpoint_hit) { |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2763 | /* We re-entered the check after replacing the TB. Now raise |
| 2764 | * the debug interrupt so that is will trigger after the |
| 2765 | * current instruction. */ |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2766 | cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2767 | return; |
| 2768 | } |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2769 | vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; |
Julian Brown | 4061200 | 2017-02-07 18:29:59 +0000 | [diff] [blame] | 2770 | vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len); |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2771 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 2772 | if (cpu_watchpoint_address_matches(wp, vaddr, len) |
| 2773 | && (wp->flags & flags)) { |
Peter Maydell | 0822567 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 2774 | if (flags == BP_MEM_READ) { |
| 2775 | wp->flags |= BP_WATCHPOINT_HIT_READ; |
| 2776 | } else { |
| 2777 | wp->flags |= BP_WATCHPOINT_HIT_WRITE; |
| 2778 | } |
| 2779 | wp->hitaddr = vaddr; |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2780 | wp->hitattrs = attrs; |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2781 | if (!cpu->watchpoint_hit) { |
Sergey Fedorov | 568496c | 2016-02-11 11:17:32 +0000 | [diff] [blame] | 2782 | if (wp->flags & BP_CPU && |
| 2783 | !cc->debug_check_watchpoint(cpu, wp)) { |
| 2784 | wp->flags &= ~BP_WATCHPOINT_HIT; |
| 2785 | continue; |
| 2786 | } |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2787 | cpu->watchpoint_hit = wp; |
KONRAD Frederic | a5e9982 | 2016-10-27 16:10:06 +0100 | [diff] [blame] | 2788 | |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2789 | mmap_lock(); |
Andreas Färber | 239c51a | 2013-09-01 17:12:23 +0200 | [diff] [blame] | 2790 | tb_check_watchpoint(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2791 | if (wp->flags & BP_STOP_BEFORE_ACCESS) { |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 2792 | cpu->exception_index = EXCP_DEBUG; |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2793 | mmap_unlock(); |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 2794 | cpu_loop_exit(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2795 | } else { |
Richard Henderson | 9b990ee | 2017-10-13 10:50:02 -0700 | [diff] [blame] | 2796 | /* Force execution of one insn next time. */ |
| 2797 | cpu->cflags_next_tb = 1 | curr_cflags(); |
Emilio G. Cota | 0ac2031 | 2017-08-04 23:46:31 -0400 | [diff] [blame] | 2798 | mmap_unlock(); |
Peter Maydell | 6886b98 | 2016-05-17 15:18:04 +0100 | [diff] [blame] | 2799 | cpu_loop_exit_noexc(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2800 | } |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2801 | } |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2802 | } else { |
| 2803 | wp->flags &= ~BP_WATCHPOINT_HIT; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2804 | } |
| 2805 | } |
| 2806 | } |
| 2807 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2808 | /* Watchpoint access routines. Watchpoints are inserted using TLB tricks, |
| 2809 | so these check for a hit then pass through to the normal out-of-line |
| 2810 | phys routines. */ |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2811 | static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata, |
| 2812 | unsigned size, MemTxAttrs attrs) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2813 | { |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2814 | MemTxResult res; |
| 2815 | uint64_t data; |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2816 | int asidx = cpu_asidx_from_attrs(current_cpu, attrs); |
| 2817 | AddressSpace *as = current_cpu->cpu_ases[asidx].as; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2818 | |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2819 | check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ); |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2820 | switch (size) { |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2821 | case 1: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2822 | data = address_space_ldub(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2823 | break; |
| 2824 | case 2: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2825 | data = address_space_lduw(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2826 | break; |
| 2827 | case 4: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2828 | data = address_space_ldl(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2829 | break; |
Paolo Bonzini | 306526b | 2017-10-17 14:16:05 +0200 | [diff] [blame] | 2830 | case 8: |
| 2831 | data = address_space_ldq(as, addr, attrs, &res); |
| 2832 | break; |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2833 | default: abort(); |
| 2834 | } |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2835 | *pdata = data; |
| 2836 | return res; |
| 2837 | } |
| 2838 | |
| 2839 | static MemTxResult watch_mem_write(void *opaque, hwaddr addr, |
| 2840 | uint64_t val, unsigned size, |
| 2841 | MemTxAttrs attrs) |
| 2842 | { |
| 2843 | MemTxResult res; |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2844 | int asidx = cpu_asidx_from_attrs(current_cpu, attrs); |
| 2845 | AddressSpace *as = current_cpu->cpu_ases[asidx].as; |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2846 | |
| 2847 | check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE); |
| 2848 | switch (size) { |
| 2849 | case 1: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2850 | address_space_stb(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2851 | break; |
| 2852 | case 2: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2853 | address_space_stw(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2854 | break; |
| 2855 | case 4: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2856 | address_space_stl(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2857 | break; |
Paolo Bonzini | 306526b | 2017-10-17 14:16:05 +0200 | [diff] [blame] | 2858 | case 8: |
| 2859 | address_space_stq(as, addr, val, attrs, &res); |
| 2860 | break; |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2861 | default: abort(); |
| 2862 | } |
| 2863 | return res; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2864 | } |
| 2865 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2866 | static const MemoryRegionOps watch_mem_ops = { |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2867 | .read_with_attrs = watch_mem_read, |
| 2868 | .write_with_attrs = watch_mem_write, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2869 | .endianness = DEVICE_NATIVE_ENDIAN, |
Paolo Bonzini | 306526b | 2017-10-17 14:16:05 +0200 | [diff] [blame] | 2870 | .valid = { |
| 2871 | .min_access_size = 1, |
| 2872 | .max_access_size = 8, |
| 2873 | .unaligned = false, |
| 2874 | }, |
| 2875 | .impl = { |
| 2876 | .min_access_size = 1, |
| 2877 | .max_access_size = 8, |
| 2878 | .unaligned = false, |
| 2879 | }, |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2880 | }; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2881 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2882 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2883 | MemTxAttrs attrs, uint8_t *buf, hwaddr len); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2884 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2885 | const uint8_t *buf, hwaddr len); |
| 2886 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2887 | bool is_write, MemTxAttrs attrs); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2888 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2889 | static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, |
| 2890 | unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2891 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2892 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2893 | uint8_t buf[8]; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2894 | MemTxResult res; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2895 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2896 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2897 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2898 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2899 | #endif |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2900 | res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len); |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2901 | if (res) { |
| 2902 | return res; |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2903 | } |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2904 | *data = ldn_p(buf, len); |
| 2905 | return MEMTX_OK; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2906 | } |
| 2907 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2908 | static MemTxResult subpage_write(void *opaque, hwaddr addr, |
| 2909 | uint64_t value, unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2910 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2911 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2912 | uint8_t buf[8]; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2913 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2914 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2915 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2916 | " value %"PRIx64"\n", |
| 2917 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2918 | #endif |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2919 | stn_p(buf, len, value); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2920 | return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2921 | } |
| 2922 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2923 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Peter Maydell | 8372d38 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2924 | unsigned len, bool is_write, |
| 2925 | MemTxAttrs attrs) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2926 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2927 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2928 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2929 | printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2930 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2931 | #endif |
| 2932 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2933 | return flatview_access_valid(subpage->fv, addr + subpage->base, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2934 | len, is_write, attrs); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2935 | } |
| 2936 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2937 | static const MemoryRegionOps subpage_ops = { |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2938 | .read_with_attrs = subpage_read, |
| 2939 | .write_with_attrs = subpage_write, |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2940 | .impl.min_access_size = 1, |
| 2941 | .impl.max_access_size = 8, |
| 2942 | .valid.min_access_size = 1, |
| 2943 | .valid.max_access_size = 8, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2944 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2945 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2946 | }; |
| 2947 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2948 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2949 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2950 | { |
| 2951 | int idx, eidx; |
| 2952 | |
| 2953 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 2954 | return -1; |
| 2955 | idx = SUBPAGE_IDX(start); |
| 2956 | eidx = SUBPAGE_IDX(end); |
| 2957 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2958 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 2959 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2960 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2961 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2962 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2963 | } |
| 2964 | |
| 2965 | return 0; |
| 2966 | } |
| 2967 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2968 | static subpage_t *subpage_init(FlatView *fv, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2969 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2970 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2971 | |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 2972 | mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t)); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2973 | mmio->fv = fv; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 2974 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2975 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 2976 | NULL, TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 2977 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2978 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2979 | printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__, |
| 2980 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2981 | #endif |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 2982 | subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2983 | |
| 2984 | return mmio; |
| 2985 | } |
| 2986 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2987 | static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2988 | { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2989 | assert(fv); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2990 | MemoryRegionSection section = { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2991 | .fv = fv, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2992 | .mr = mr, |
| 2993 | .offset_within_address_space = 0, |
| 2994 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 2995 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2996 | }; |
| 2997 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2998 | return phys_section_add(map, §ion); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2999 | } |
| 3000 | |
Peter Maydell | 8af3674 | 2017-12-13 17:52:28 +0000 | [diff] [blame] | 3001 | static void readonly_mem_write(void *opaque, hwaddr addr, |
| 3002 | uint64_t val, unsigned size) |
| 3003 | { |
| 3004 | /* Ignore any write to ROM. */ |
| 3005 | } |
| 3006 | |
| 3007 | static bool readonly_mem_accepts(void *opaque, hwaddr addr, |
Peter Maydell | 8372d38 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3008 | unsigned size, bool is_write, |
| 3009 | MemTxAttrs attrs) |
Peter Maydell | 8af3674 | 2017-12-13 17:52:28 +0000 | [diff] [blame] | 3010 | { |
| 3011 | return is_write; |
| 3012 | } |
| 3013 | |
| 3014 | /* This will only be used for writes, because reads are special cased |
| 3015 | * to directly access the underlying host ram. |
| 3016 | */ |
| 3017 | static const MemoryRegionOps readonly_mem_ops = { |
| 3018 | .write = readonly_mem_write, |
| 3019 | .valid.accepts = readonly_mem_accepts, |
| 3020 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 3021 | .valid = { |
| 3022 | .min_access_size = 1, |
| 3023 | .max_access_size = 8, |
| 3024 | .unaligned = false, |
| 3025 | }, |
| 3026 | .impl = { |
| 3027 | .min_access_size = 1, |
| 3028 | .max_access_size = 8, |
| 3029 | .unaligned = false, |
| 3030 | }, |
| 3031 | }; |
| 3032 | |
Peter Maydell | 2d54f19 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 3033 | MemoryRegionSection *iotlb_to_section(CPUState *cpu, |
| 3034 | hwaddr index, MemTxAttrs attrs) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 3035 | { |
Peter Maydell | a54c87b | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 3036 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 3037 | CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 3038 | AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch); |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 3039 | MemoryRegionSection *sections = d->map.sections; |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 3040 | |
Peter Maydell | 2d54f19 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 3041 | return §ions[index & ~TARGET_PAGE_MASK]; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 3042 | } |
| 3043 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 3044 | static void io_mem_init(void) |
| 3045 | { |
Peter Maydell | 8af3674 | 2017-12-13 17:52:28 +0000 | [diff] [blame] | 3046 | memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops, |
| 3047 | NULL, NULL, UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 3048 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 3049 | NULL, UINT64_MAX); |
Jan Kiszka | 8d04fb5 | 2017-02-23 18:29:11 +0000 | [diff] [blame] | 3050 | |
| 3051 | /* io_mem_notdirty calls tb_invalidate_phys_page_fast, |
| 3052 | * which can be called without the iothread mutex. |
| 3053 | */ |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 3054 | memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 3055 | NULL, UINT64_MAX); |
Jan Kiszka | 8d04fb5 | 2017-02-23 18:29:11 +0000 | [diff] [blame] | 3056 | memory_region_clear_global_locking(&io_mem_notdirty); |
| 3057 | |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 3058 | memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 3059 | NULL, UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 3060 | } |
| 3061 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 3062 | AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3063 | { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 3064 | AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1); |
| 3065 | uint16_t n; |
| 3066 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3067 | n = dummy_section(&d->map, fv, &io_mem_unassigned); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 3068 | assert(n == PHYS_SECTION_UNASSIGNED); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3069 | n = dummy_section(&d->map, fv, &io_mem_notdirty); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 3070 | assert(n == PHYS_SECTION_NOTDIRTY); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3071 | n = dummy_section(&d->map, fv, &io_mem_rom); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 3072 | assert(n == PHYS_SECTION_ROM); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3073 | n = dummy_section(&d->map, fv, &io_mem_watch); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 3074 | assert(n == PHYS_SECTION_WATCH); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 3075 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 3076 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 3077 | |
| 3078 | return d; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 3079 | } |
| 3080 | |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 3081 | void address_space_dispatch_free(AddressSpaceDispatch *d) |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 3082 | { |
| 3083 | phys_sections_free(&d->map); |
| 3084 | g_free(d); |
| 3085 | } |
| 3086 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 3087 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 3088 | { |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 3089 | CPUAddressSpace *cpuas; |
| 3090 | AddressSpaceDispatch *d; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 3091 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 3092 | assert(tcg_enabled()); |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 3093 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 3094 | reset the modified entries */ |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 3095 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
| 3096 | cpu_reloading_memory_map(); |
| 3097 | /* The CPU and TLB are protected by the iothread lock. |
| 3098 | * We reload the dispatch pointer now because cpu_reloading_memory_map() |
| 3099 | * may have split the RCU critical section. |
| 3100 | */ |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 3101 | d = address_space_to_dispatch(cpuas->as); |
Alex Bennée | f35e44e | 2016-10-21 16:34:18 +0100 | [diff] [blame] | 3102 | atomic_rcu_set(&cpuas->memory_dispatch, d); |
Alex Bennée | d10eb08 | 2016-11-14 14:17:28 +0000 | [diff] [blame] | 3103 | tlb_flush(cpuas->cpu); |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 3104 | } |
| 3105 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 3106 | static void memory_map_init(void) |
| 3107 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3108 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 3109 | |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 3110 | memory_region_init(system_memory, NULL, "system", UINT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 3111 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 3112 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3113 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 3114 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 3115 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 3116 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 3117 | } |
| 3118 | |
| 3119 | MemoryRegion *get_system_memory(void) |
| 3120 | { |
| 3121 | return system_memory; |
| 3122 | } |
| 3123 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 3124 | MemoryRegion *get_system_io(void) |
| 3125 | { |
| 3126 | return system_io; |
| 3127 | } |
| 3128 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 3129 | #endif /* !defined(CONFIG_USER_ONLY) */ |
| 3130 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3131 | /* physical memory access (slow version, mainly for debug) */ |
| 3132 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 3133 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3134 | uint8_t *buf, target_ulong len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3135 | { |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3136 | int flags; |
| 3137 | target_ulong l, page; |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 3138 | void * p; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3139 | |
| 3140 | while (len > 0) { |
| 3141 | page = addr & TARGET_PAGE_MASK; |
| 3142 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 3143 | if (l > len) |
| 3144 | l = len; |
| 3145 | flags = page_get_flags(page); |
| 3146 | if (!(flags & PAGE_VALID)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3147 | return -1; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3148 | if (is_write) { |
| 3149 | if (!(flags & PAGE_WRITE)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3150 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 3151 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 3152 | if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3153 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 3154 | memcpy(p, buf, l); |
| 3155 | unlock_user(p, addr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3156 | } else { |
| 3157 | if (!(flags & PAGE_READ)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3158 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 3159 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 3160 | if (!(p = lock_user(VERIFY_READ, addr, l, 1))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3161 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 3162 | memcpy(buf, p, l); |
aurel32 | 5b25757 | 2008-04-28 08:54:59 +0000 | [diff] [blame] | 3163 | unlock_user(p, addr, 0); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3164 | } |
| 3165 | len -= l; |
| 3166 | buf += l; |
| 3167 | addr += l; |
| 3168 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3169 | return 0; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3170 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 3171 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3172 | #else |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 3173 | |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3174 | static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3175 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 3176 | { |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 3177 | uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 3178 | addr += memory_region_get_ram_addr(mr); |
| 3179 | |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 3180 | /* No early return if dirty_log_mask is or becomes 0, because |
| 3181 | * cpu_physical_memory_set_dirty_range will still call |
| 3182 | * xen_modified_memory. |
| 3183 | */ |
| 3184 | if (dirty_log_mask) { |
| 3185 | dirty_log_mask = |
| 3186 | cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 3187 | } |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 3188 | if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) { |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 3189 | assert(tcg_enabled()); |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 3190 | tb_invalidate_phys_range(addr, addr + length); |
| 3191 | dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE); |
| 3192 | } |
| 3193 | cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 3194 | } |
| 3195 | |
Stefan Hajnoczi | 047be4e | 2019-01-29 11:46:04 +0000 | [diff] [blame] | 3196 | void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size) |
| 3197 | { |
| 3198 | /* |
| 3199 | * In principle this function would work on other memory region types too, |
| 3200 | * but the ROM device use case is the only one where this operation is |
| 3201 | * necessary. Other memory regions should use the |
| 3202 | * address_space_read/write() APIs. |
| 3203 | */ |
| 3204 | assert(memory_region_is_romd(mr)); |
| 3205 | |
| 3206 | invalidate_and_set_dirty(mr, addr, size); |
| 3207 | } |
| 3208 | |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 3209 | static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 3210 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 3211 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 3212 | |
| 3213 | /* Regions are assumed to support 1-4 byte accesses unless |
| 3214 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 3215 | if (access_size_max == 0) { |
| 3216 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 3217 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 3218 | |
| 3219 | /* Bound the maximum access by the alignment of the address. */ |
| 3220 | if (!mr->ops->impl.unaligned) { |
| 3221 | unsigned align_size_max = addr & -addr; |
| 3222 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 3223 | access_size_max = align_size_max; |
| 3224 | } |
| 3225 | } |
| 3226 | |
| 3227 | /* Don't attempt accesses larger than the maximum. */ |
| 3228 | if (l > access_size_max) { |
| 3229 | l = access_size_max; |
| 3230 | } |
Peter Maydell | 6554f5c | 2015-07-24 13:33:10 +0100 | [diff] [blame] | 3231 | l = pow2floor(l); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 3232 | |
| 3233 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 3234 | } |
| 3235 | |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 3236 | static bool prepare_mmio_access(MemoryRegion *mr) |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 3237 | { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 3238 | bool unlocked = !qemu_mutex_iothread_locked(); |
| 3239 | bool release_lock = false; |
| 3240 | |
| 3241 | if (unlocked && mr->global_locking) { |
| 3242 | qemu_mutex_lock_iothread(); |
| 3243 | unlocked = false; |
| 3244 | release_lock = true; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 3245 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 3246 | if (mr->flush_coalesced_mmio) { |
| 3247 | if (unlocked) { |
| 3248 | qemu_mutex_lock_iothread(); |
| 3249 | } |
| 3250 | qemu_flush_coalesced_mmio_buffer(); |
| 3251 | if (unlocked) { |
| 3252 | qemu_mutex_unlock_iothread(); |
| 3253 | } |
| 3254 | } |
| 3255 | |
| 3256 | return release_lock; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 3257 | } |
| 3258 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3259 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3260 | static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, |
| 3261 | MemTxAttrs attrs, |
| 3262 | const uint8_t *buf, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3263 | hwaddr len, hwaddr addr1, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3264 | hwaddr l, MemoryRegion *mr) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3265 | { |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3266 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 3267 | uint64_t val; |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 3268 | MemTxResult result = MEMTX_OK; |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 3269 | bool release_lock = false; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3270 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3271 | for (;;) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3272 | if (!memory_access_is_direct(mr, true)) { |
| 3273 | release_lock |= prepare_mmio_access(mr); |
| 3274 | l = memory_access_size(mr, l, addr1); |
| 3275 | /* XXX: could force current_cpu to NULL to avoid |
| 3276 | potential bugs */ |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 3277 | val = ldn_p(buf, l); |
| 3278 | result |= memory_region_dispatch_write(mr, addr1, val, l, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3279 | } else { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3280 | /* RAM case */ |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 3281 | ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3282 | memcpy(ptr, buf, l); |
| 3283 | invalidate_and_set_dirty(mr, addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3284 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 3285 | |
| 3286 | if (release_lock) { |
| 3287 | qemu_mutex_unlock_iothread(); |
| 3288 | release_lock = false; |
| 3289 | } |
| 3290 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3291 | len -= l; |
| 3292 | buf += l; |
| 3293 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3294 | |
| 3295 | if (!len) { |
| 3296 | break; |
| 3297 | } |
| 3298 | |
| 3299 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3300 | mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3301 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 3302 | |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 3303 | return result; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3304 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 3305 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 3306 | /* Called from RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3307 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3308 | const uint8_t *buf, hwaddr len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3309 | { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3310 | hwaddr l; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3311 | hwaddr addr1; |
| 3312 | MemoryRegion *mr; |
| 3313 | MemTxResult result = MEMTX_OK; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3314 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 3315 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3316 | mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 3317 | result = flatview_write_continue(fv, addr, attrs, buf, len, |
| 3318 | addr1, l, mr); |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3319 | |
| 3320 | return result; |
| 3321 | } |
| 3322 | |
| 3323 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3324 | MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, |
| 3325 | MemTxAttrs attrs, uint8_t *buf, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3326 | hwaddr len, hwaddr addr1, hwaddr l, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3327 | MemoryRegion *mr) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3328 | { |
| 3329 | uint8_t *ptr; |
| 3330 | uint64_t val; |
| 3331 | MemTxResult result = MEMTX_OK; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3332 | bool release_lock = false; |
| 3333 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3334 | for (;;) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3335 | if (!memory_access_is_direct(mr, false)) { |
| 3336 | /* I/O case */ |
| 3337 | release_lock |= prepare_mmio_access(mr); |
| 3338 | l = memory_access_size(mr, l, addr1); |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 3339 | result |= memory_region_dispatch_read(mr, addr1, &val, l, attrs); |
| 3340 | stn_p(buf, l, val); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3341 | } else { |
| 3342 | /* RAM case */ |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 3343 | ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3344 | memcpy(buf, ptr, l); |
| 3345 | } |
| 3346 | |
| 3347 | if (release_lock) { |
| 3348 | qemu_mutex_unlock_iothread(); |
| 3349 | release_lock = false; |
| 3350 | } |
| 3351 | |
| 3352 | len -= l; |
| 3353 | buf += l; |
| 3354 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3355 | |
| 3356 | if (!len) { |
| 3357 | break; |
| 3358 | } |
| 3359 | |
| 3360 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3361 | mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3362 | } |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3363 | |
| 3364 | return result; |
| 3365 | } |
| 3366 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 3367 | /* Called from RCU critical section. */ |
| 3368 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3369 | MemTxAttrs attrs, uint8_t *buf, hwaddr len) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3370 | { |
| 3371 | hwaddr l; |
| 3372 | hwaddr addr1; |
| 3373 | MemoryRegion *mr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3374 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 3375 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3376 | mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 3377 | return flatview_read_continue(fv, addr, attrs, buf, len, |
| 3378 | addr1, l, mr); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3379 | } |
| 3380 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 3381 | MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3382 | MemTxAttrs attrs, uint8_t *buf, hwaddr len) |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 3383 | { |
| 3384 | MemTxResult result = MEMTX_OK; |
| 3385 | FlatView *fv; |
| 3386 | |
| 3387 | if (len > 0) { |
| 3388 | rcu_read_lock(); |
| 3389 | fv = address_space_to_flatview(as); |
| 3390 | result = flatview_read(fv, addr, attrs, buf, len); |
| 3391 | rcu_read_unlock(); |
| 3392 | } |
| 3393 | |
| 3394 | return result; |
| 3395 | } |
| 3396 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 3397 | MemTxResult address_space_write(AddressSpace *as, hwaddr addr, |
| 3398 | MemTxAttrs attrs, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3399 | const uint8_t *buf, hwaddr len) |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 3400 | { |
| 3401 | MemTxResult result = MEMTX_OK; |
| 3402 | FlatView *fv; |
| 3403 | |
| 3404 | if (len > 0) { |
| 3405 | rcu_read_lock(); |
| 3406 | fv = address_space_to_flatview(as); |
| 3407 | result = flatview_write(fv, addr, attrs, buf, len); |
| 3408 | rcu_read_unlock(); |
| 3409 | } |
| 3410 | |
| 3411 | return result; |
| 3412 | } |
| 3413 | |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 3414 | MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3415 | uint8_t *buf, hwaddr len, bool is_write) |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 3416 | { |
| 3417 | if (is_write) { |
| 3418 | return address_space_write(as, addr, attrs, buf, len); |
| 3419 | } else { |
| 3420 | return address_space_read_full(as, addr, attrs, buf, len); |
| 3421 | } |
| 3422 | } |
| 3423 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3424 | void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3425 | hwaddr len, int is_write) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3426 | { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3427 | address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, |
| 3428 | buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3429 | } |
| 3430 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3431 | enum write_rom_type { |
| 3432 | WRITE_DATA, |
| 3433 | FLUSH_CACHE, |
| 3434 | }; |
| 3435 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3436 | static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, |
| 3437 | hwaddr addr, |
| 3438 | MemTxAttrs attrs, |
| 3439 | const uint8_t *buf, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3440 | hwaddr len, |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3441 | enum write_rom_type type) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3442 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3443 | hwaddr l; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3444 | uint8_t *ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3445 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3446 | MemoryRegion *mr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3447 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3448 | rcu_read_lock(); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3449 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3450 | l = len; |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3451 | mr = address_space_translate(as, addr, &addr1, &l, true, attrs); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3452 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3453 | if (!(memory_region_is_ram(mr) || |
| 3454 | memory_region_is_romd(mr))) { |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 3455 | l = memory_access_size(mr, l, addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3456 | } else { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3457 | /* ROM/RAM case */ |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 3458 | ptr = qemu_map_ram_ptr(mr->ram_block, addr1); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3459 | switch (type) { |
| 3460 | case WRITE_DATA: |
| 3461 | memcpy(ptr, buf, l); |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3462 | invalidate_and_set_dirty(mr, addr1, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3463 | break; |
| 3464 | case FLUSH_CACHE: |
| 3465 | flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); |
| 3466 | break; |
| 3467 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3468 | } |
| 3469 | len -= l; |
| 3470 | buf += l; |
| 3471 | addr += l; |
| 3472 | } |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3473 | rcu_read_unlock(); |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3474 | return MEMTX_OK; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3475 | } |
| 3476 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3477 | /* used for ROM loading : can write in RAM and ROM */ |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3478 | MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, |
| 3479 | MemTxAttrs attrs, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3480 | const uint8_t *buf, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3481 | { |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3482 | return address_space_write_rom_internal(as, addr, attrs, |
| 3483 | buf, len, WRITE_DATA); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3484 | } |
| 3485 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3486 | void cpu_flush_icache_range(hwaddr start, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3487 | { |
| 3488 | /* |
| 3489 | * This function should do the same thing as an icache flush that was |
| 3490 | * triggered from within the guest. For TCG we are always cache coherent, |
| 3491 | * so there is no need to flush anything. For KVM / Xen we need to flush |
| 3492 | * the host's instruction cache at least. |
| 3493 | */ |
| 3494 | if (tcg_enabled()) { |
| 3495 | return; |
| 3496 | } |
| 3497 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3498 | address_space_write_rom_internal(&address_space_memory, |
| 3499 | start, MEMTXATTRS_UNSPECIFIED, |
| 3500 | NULL, len, FLUSH_CACHE); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3501 | } |
| 3502 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3503 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3504 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3505 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3506 | hwaddr addr; |
| 3507 | hwaddr len; |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3508 | bool in_use; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3509 | } BounceBuffer; |
| 3510 | |
| 3511 | static BounceBuffer bounce; |
| 3512 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3513 | typedef struct MapClient { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3514 | QEMUBH *bh; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3515 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3516 | } MapClient; |
| 3517 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3518 | QemuMutex map_client_list_lock; |
Paolo Bonzini | b58deb3 | 2018-12-06 11:58:10 +0100 | [diff] [blame] | 3519 | static QLIST_HEAD(, MapClient) map_client_list |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3520 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3521 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3522 | static void cpu_unregister_map_client_do(MapClient *client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3523 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3524 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3525 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3526 | } |
| 3527 | |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3528 | static void cpu_notify_map_clients_locked(void) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3529 | { |
| 3530 | MapClient *client; |
| 3531 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3532 | while (!QLIST_EMPTY(&map_client_list)) { |
| 3533 | client = QLIST_FIRST(&map_client_list); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3534 | qemu_bh_schedule(client->bh); |
| 3535 | cpu_unregister_map_client_do(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3536 | } |
| 3537 | } |
| 3538 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3539 | void cpu_register_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3540 | { |
| 3541 | MapClient *client = g_malloc(sizeof(*client)); |
| 3542 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3543 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3544 | client->bh = bh; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3545 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3546 | if (!atomic_read(&bounce.in_use)) { |
| 3547 | cpu_notify_map_clients_locked(); |
| 3548 | } |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3549 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3550 | } |
| 3551 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3552 | void cpu_exec_init_all(void) |
| 3553 | { |
| 3554 | qemu_mutex_init(&ram_list.mutex); |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 3555 | /* The data structures we set up here depend on knowing the page size, |
| 3556 | * so no more changes can be made after this point. |
| 3557 | * In an ideal world, nothing we did before we had finished the |
| 3558 | * machine setup would care about the target page size, and we could |
| 3559 | * do this much later, rather than requiring board models to state |
| 3560 | * up front what their requirements are. |
| 3561 | */ |
| 3562 | finalize_target_page_bits(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3563 | io_mem_init(); |
Paolo Bonzini | 680a478 | 2015-11-02 09:23:52 +0100 | [diff] [blame] | 3564 | memory_map_init(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3565 | qemu_mutex_init(&map_client_list_lock); |
| 3566 | } |
| 3567 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3568 | void cpu_unregister_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3569 | { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3570 | MapClient *client; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3571 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3572 | qemu_mutex_lock(&map_client_list_lock); |
| 3573 | QLIST_FOREACH(client, &map_client_list, link) { |
| 3574 | if (client->bh == bh) { |
| 3575 | cpu_unregister_map_client_do(client); |
| 3576 | break; |
| 3577 | } |
| 3578 | } |
| 3579 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3580 | } |
| 3581 | |
| 3582 | static void cpu_notify_map_clients(void) |
| 3583 | { |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3584 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3585 | cpu_notify_map_clients_locked(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3586 | qemu_mutex_unlock(&map_client_list_lock); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3587 | } |
| 3588 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3589 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3590 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3591 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3592 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3593 | hwaddr l, xlat; |
| 3594 | |
| 3595 | while (len > 0) { |
| 3596 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3597 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3598 | if (!memory_access_is_direct(mr, is_write)) { |
| 3599 | l = memory_access_size(mr, l, addr); |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3600 | if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3601 | return false; |
| 3602 | } |
| 3603 | } |
| 3604 | |
| 3605 | len -= l; |
| 3606 | addr += l; |
| 3607 | } |
| 3608 | return true; |
| 3609 | } |
| 3610 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3611 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3612 | hwaddr len, bool is_write, |
Peter Maydell | fddffa4 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3613 | MemTxAttrs attrs) |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3614 | { |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3615 | FlatView *fv; |
| 3616 | bool result; |
| 3617 | |
| 3618 | rcu_read_lock(); |
| 3619 | fv = address_space_to_flatview(as); |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3620 | result = flatview_access_valid(fv, addr, len, is_write, attrs); |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3621 | rcu_read_unlock(); |
| 3622 | return result; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3623 | } |
| 3624 | |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3625 | static hwaddr |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3626 | flatview_extend_translation(FlatView *fv, hwaddr addr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3627 | hwaddr target_len, |
| 3628 | MemoryRegion *mr, hwaddr base, hwaddr len, |
| 3629 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3630 | { |
| 3631 | hwaddr done = 0; |
| 3632 | hwaddr xlat; |
| 3633 | MemoryRegion *this_mr; |
| 3634 | |
| 3635 | for (;;) { |
| 3636 | target_len -= len; |
| 3637 | addr += len; |
| 3638 | done += len; |
| 3639 | if (target_len == 0) { |
| 3640 | return done; |
| 3641 | } |
| 3642 | |
| 3643 | len = target_len; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3644 | this_mr = flatview_translate(fv, addr, &xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3645 | &len, is_write, attrs); |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3646 | if (this_mr != mr || xlat != base + done) { |
| 3647 | return done; |
| 3648 | } |
| 3649 | } |
| 3650 | } |
| 3651 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3652 | /* Map a physical memory region into a host virtual address. |
| 3653 | * May map a subset of the requested range, given by and returned in *plen. |
| 3654 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 3655 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3656 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 3657 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3658 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3659 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3660 | hwaddr addr, |
| 3661 | hwaddr *plen, |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3662 | bool is_write, |
| 3663 | MemTxAttrs attrs) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3664 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3665 | hwaddr len = *plen; |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3666 | hwaddr l, xlat; |
| 3667 | MemoryRegion *mr; |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 3668 | void *ptr; |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3669 | FlatView *fv; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3670 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3671 | if (len == 0) { |
| 3672 | return NULL; |
| 3673 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3674 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3675 | l = len; |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3676 | rcu_read_lock(); |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3677 | fv = address_space_to_flatview(as); |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3678 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3679 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3680 | if (!memory_access_is_direct(mr, is_write)) { |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3681 | if (atomic_xchg(&bounce.in_use, true)) { |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3682 | rcu_read_unlock(); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3683 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3684 | } |
Kevin Wolf | e85d9db | 2013-07-22 14:30:23 +0200 | [diff] [blame] | 3685 | /* Avoid unbounded allocations */ |
| 3686 | l = MIN(l, TARGET_PAGE_SIZE); |
| 3687 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3688 | bounce.addr = addr; |
| 3689 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3690 | |
| 3691 | memory_region_ref(mr); |
| 3692 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3693 | if (!is_write) { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3694 | flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED, |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3695 | bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 3696 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3697 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3698 | rcu_read_unlock(); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3699 | *plen = l; |
| 3700 | return bounce.buffer; |
| 3701 | } |
| 3702 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3703 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3704 | memory_region_ref(mr); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3705 | *plen = flatview_extend_translation(fv, addr, len, mr, xlat, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3706 | l, is_write, attrs); |
Anthony PERARD | f5aa69b | 2017-07-26 17:53:26 +0100 | [diff] [blame] | 3707 | ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true); |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 3708 | rcu_read_unlock(); |
| 3709 | |
| 3710 | return ptr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3711 | } |
| 3712 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3713 | /* Unmaps a memory region previously mapped by address_space_map(). |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3714 | * Will also mark the memory as dirty if is_write == 1. access_len gives |
| 3715 | * the amount of memory that was actually read or written by the caller. |
| 3716 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3717 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
| 3718 | int is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3719 | { |
| 3720 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3721 | MemoryRegion *mr; |
| 3722 | ram_addr_t addr1; |
| 3723 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 3724 | mr = memory_region_from_host(buffer, &addr1); |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3725 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3726 | if (is_write) { |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3727 | invalidate_and_set_dirty(mr, addr1, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3728 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 3729 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 3730 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 3731 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3732 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3733 | return; |
| 3734 | } |
| 3735 | if (is_write) { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3736 | address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED, |
| 3737 | bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3738 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 3739 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3740 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3741 | memory_region_unref(bounce.mr); |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3742 | atomic_mb_set(&bounce.in_use, false); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3743 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3744 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3745 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3746 | void *cpu_physical_memory_map(hwaddr addr, |
| 3747 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3748 | int is_write) |
| 3749 | { |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3750 | return address_space_map(&address_space_memory, addr, plen, is_write, |
| 3751 | MEMTXATTRS_UNSPECIFIED); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3752 | } |
| 3753 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3754 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
| 3755 | int is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3756 | { |
| 3757 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 3758 | } |
| 3759 | |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3760 | #define ARG1_DECL AddressSpace *as |
| 3761 | #define ARG1 as |
| 3762 | #define SUFFIX |
| 3763 | #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__) |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3764 | #define RCU_READ_LOCK(...) rcu_read_lock() |
| 3765 | #define RCU_READ_UNLOCK(...) rcu_read_unlock() |
| 3766 | #include "memory_ldst.inc.c" |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 3767 | |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3768 | int64_t address_space_cache_init(MemoryRegionCache *cache, |
| 3769 | AddressSpace *as, |
| 3770 | hwaddr addr, |
| 3771 | hwaddr len, |
| 3772 | bool is_write) |
| 3773 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3774 | AddressSpaceDispatch *d; |
| 3775 | hwaddr l; |
| 3776 | MemoryRegion *mr; |
| 3777 | |
| 3778 | assert(len > 0); |
| 3779 | |
| 3780 | l = len; |
| 3781 | cache->fv = address_space_get_flatview(as); |
| 3782 | d = flatview_to_dispatch(cache->fv); |
| 3783 | cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true); |
| 3784 | |
| 3785 | mr = cache->mrs.mr; |
| 3786 | memory_region_ref(mr); |
| 3787 | if (memory_access_is_direct(mr, is_write)) { |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3788 | /* We don't care about the memory attributes here as we're only |
| 3789 | * doing this if we found actual RAM, which behaves the same |
| 3790 | * regardless of attributes; so UNSPECIFIED is fine. |
| 3791 | */ |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3792 | l = flatview_extend_translation(cache->fv, addr, len, mr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3793 | cache->xlat, l, is_write, |
| 3794 | MEMTXATTRS_UNSPECIFIED); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3795 | cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true); |
| 3796 | } else { |
| 3797 | cache->ptr = NULL; |
| 3798 | } |
| 3799 | |
| 3800 | cache->len = l; |
| 3801 | cache->is_write = is_write; |
| 3802 | return l; |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3803 | } |
| 3804 | |
| 3805 | void address_space_cache_invalidate(MemoryRegionCache *cache, |
| 3806 | hwaddr addr, |
| 3807 | hwaddr access_len) |
| 3808 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3809 | assert(cache->is_write); |
| 3810 | if (likely(cache->ptr)) { |
| 3811 | invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len); |
| 3812 | } |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3813 | } |
| 3814 | |
| 3815 | void address_space_cache_destroy(MemoryRegionCache *cache) |
| 3816 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3817 | if (!cache->mrs.mr) { |
| 3818 | return; |
| 3819 | } |
| 3820 | |
| 3821 | if (xen_enabled()) { |
| 3822 | xen_invalidate_map_cache_entry(cache->ptr); |
| 3823 | } |
| 3824 | memory_region_unref(cache->mrs.mr); |
| 3825 | flatview_unref(cache->fv); |
| 3826 | cache->mrs.mr = NULL; |
| 3827 | cache->fv = NULL; |
| 3828 | } |
| 3829 | |
| 3830 | /* Called from RCU critical section. This function has the same |
| 3831 | * semantics as address_space_translate, but it only works on a |
| 3832 | * predefined range of a MemoryRegion that was mapped with |
| 3833 | * address_space_cache_init. |
| 3834 | */ |
| 3835 | static inline MemoryRegion *address_space_translate_cached( |
| 3836 | MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3837 | hwaddr *plen, bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3838 | { |
| 3839 | MemoryRegionSection section; |
| 3840 | MemoryRegion *mr; |
| 3841 | IOMMUMemoryRegion *iommu_mr; |
| 3842 | AddressSpace *target_as; |
| 3843 | |
| 3844 | assert(!cache->ptr); |
| 3845 | *xlat = addr + cache->xlat; |
| 3846 | |
| 3847 | mr = cache->mrs.mr; |
| 3848 | iommu_mr = memory_region_get_iommu(mr); |
| 3849 | if (!iommu_mr) { |
| 3850 | /* MMIO region. */ |
| 3851 | return mr; |
| 3852 | } |
| 3853 | |
| 3854 | section = address_space_translate_iommu(iommu_mr, xlat, plen, |
| 3855 | NULL, is_write, true, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 3856 | &target_as, attrs); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3857 | return section.mr; |
| 3858 | } |
| 3859 | |
| 3860 | /* Called from RCU critical section. address_space_read_cached uses this |
| 3861 | * out of line function when the target is an MMIO or IOMMU region. |
| 3862 | */ |
| 3863 | void |
| 3864 | address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3865 | void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3866 | { |
| 3867 | hwaddr addr1, l; |
| 3868 | MemoryRegion *mr; |
| 3869 | |
| 3870 | l = len; |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3871 | mr = address_space_translate_cached(cache, addr, &addr1, &l, false, |
| 3872 | MEMTXATTRS_UNSPECIFIED); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3873 | flatview_read_continue(cache->fv, |
| 3874 | addr, MEMTXATTRS_UNSPECIFIED, buf, len, |
| 3875 | addr1, l, mr); |
| 3876 | } |
| 3877 | |
| 3878 | /* Called from RCU critical section. address_space_write_cached uses this |
| 3879 | * out of line function when the target is an MMIO or IOMMU region. |
| 3880 | */ |
| 3881 | void |
| 3882 | address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3883 | const void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3884 | { |
| 3885 | hwaddr addr1, l; |
| 3886 | MemoryRegion *mr; |
| 3887 | |
| 3888 | l = len; |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3889 | mr = address_space_translate_cached(cache, addr, &addr1, &l, true, |
| 3890 | MEMTXATTRS_UNSPECIFIED); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3891 | flatview_write_continue(cache->fv, |
| 3892 | addr, MEMTXATTRS_UNSPECIFIED, buf, len, |
| 3893 | addr1, l, mr); |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3894 | } |
| 3895 | |
| 3896 | #define ARG1_DECL MemoryRegionCache *cache |
| 3897 | #define ARG1 cache |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3898 | #define SUFFIX _cached_slow |
| 3899 | #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3900 | #define RCU_READ_LOCK() ((void)0) |
| 3901 | #define RCU_READ_UNLOCK() ((void)0) |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3902 | #include "memory_ldst.inc.c" |
| 3903 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3904 | /* virtual memory access for debug (includes writing to ROM) */ |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 3905 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3906 | uint8_t *buf, target_ulong len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3907 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3908 | hwaddr phys_addr; |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3909 | target_ulong l, page; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3910 | |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 3911 | cpu_synchronize_state(cpu); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3912 | while (len > 0) { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3913 | int asidx; |
| 3914 | MemTxAttrs attrs; |
| 3915 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3916 | page = addr & TARGET_PAGE_MASK; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3917 | phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs); |
| 3918 | asidx = cpu_asidx_from_attrs(cpu, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3919 | /* if no physical page mapped, return an error */ |
| 3920 | if (phys_addr == -1) |
| 3921 | return -1; |
| 3922 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 3923 | if (l > len) |
| 3924 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3925 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3926 | if (is_write) { |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3927 | address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, |
Peter Maydell | ea7a533 | 2019-01-29 11:46:04 +0000 | [diff] [blame] | 3928 | attrs, buf, l); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3929 | } else { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3930 | address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, |
Peter Maydell | ea7a533 | 2019-01-29 11:46:04 +0000 | [diff] [blame] | 3931 | attrs, buf, l, 0); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3932 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3933 | len -= l; |
| 3934 | buf += l; |
| 3935 | addr += l; |
| 3936 | } |
| 3937 | return 0; |
| 3938 | } |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3939 | |
| 3940 | /* |
| 3941 | * Allows code that needs to deal with migration bitmaps etc to still be built |
| 3942 | * target independent. |
| 3943 | */ |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3944 | size_t qemu_target_page_size(void) |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3945 | { |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3946 | return TARGET_PAGE_SIZE; |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3947 | } |
| 3948 | |
Juan Quintela | 46d702b | 2017-04-24 21:03:48 +0200 | [diff] [blame] | 3949 | int qemu_target_page_bits(void) |
| 3950 | { |
| 3951 | return TARGET_PAGE_BITS; |
| 3952 | } |
| 3953 | |
| 3954 | int qemu_target_page_bits_min(void) |
| 3955 | { |
| 3956 | return TARGET_PAGE_BITS_MIN; |
| 3957 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3958 | #endif |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3959 | |
Greg Kurz | 98ed8ec | 2014-06-24 19:26:29 +0200 | [diff] [blame] | 3960 | bool target_words_bigendian(void) |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 3961 | { |
| 3962 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 3963 | return true; |
| 3964 | #else |
| 3965 | return false; |
| 3966 | #endif |
| 3967 | } |
| 3968 | |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3969 | #ifndef CONFIG_USER_ONLY |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3970 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3971 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3972 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3973 | hwaddr l = 1; |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3974 | bool res; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3975 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3976 | rcu_read_lock(); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3977 | mr = address_space_translate(&address_space_memory, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3978 | phys_addr, &phys_addr, &l, false, |
| 3979 | MEMTXATTRS_UNSPECIFIED); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3980 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3981 | res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); |
| 3982 | rcu_read_unlock(); |
| 3983 | return res; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3984 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3985 | |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3986 | int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3987 | { |
| 3988 | RAMBlock *block; |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3989 | int ret = 0; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3990 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 3991 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 3992 | RAMBLOCK_FOREACH(block) { |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 3993 | ret = func(block, opaque); |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3994 | if (ret) { |
| 3995 | break; |
| 3996 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3997 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 3998 | rcu_read_unlock(); |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3999 | return ret; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 4000 | } |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 4001 | |
| 4002 | /* |
| 4003 | * Unmap pages of memory from start to start+length such that |
| 4004 | * they a) read as 0, b) Trigger whatever fault mechanism |
| 4005 | * the OS provides for postcopy. |
| 4006 | * The pages must be unmapped by the end of the function. |
| 4007 | * Returns: 0 on success, none-0 on failure |
| 4008 | * |
| 4009 | */ |
| 4010 | int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length) |
| 4011 | { |
| 4012 | int ret = -1; |
| 4013 | |
| 4014 | uint8_t *host_startaddr = rb->host + start; |
| 4015 | |
| 4016 | if ((uintptr_t)host_startaddr & (rb->page_size - 1)) { |
| 4017 | error_report("ram_block_discard_range: Unaligned start address: %p", |
| 4018 | host_startaddr); |
| 4019 | goto err; |
| 4020 | } |
| 4021 | |
| 4022 | if ((start + length) <= rb->used_length) { |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 4023 | bool need_madvise, need_fallocate; |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 4024 | uint8_t *host_endaddr = host_startaddr + length; |
| 4025 | if ((uintptr_t)host_endaddr & (rb->page_size - 1)) { |
| 4026 | error_report("ram_block_discard_range: Unaligned end address: %p", |
| 4027 | host_endaddr); |
| 4028 | goto err; |
| 4029 | } |
| 4030 | |
| 4031 | errno = ENOTSUP; /* If we are missing MADVISE etc */ |
| 4032 | |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 4033 | /* The logic here is messy; |
| 4034 | * madvise DONTNEED fails for hugepages |
| 4035 | * fallocate works on hugepages and shmem |
| 4036 | */ |
| 4037 | need_madvise = (rb->page_size == qemu_host_page_size); |
| 4038 | need_fallocate = rb->fd != -1; |
| 4039 | if (need_fallocate) { |
| 4040 | /* For a file, this causes the area of the file to be zero'd |
| 4041 | * if read, and for hugetlbfs also causes it to be unmapped |
| 4042 | * so a userfault will trigger. |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 4043 | */ |
| 4044 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
| 4045 | ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, |
| 4046 | start, length); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 4047 | if (ret) { |
| 4048 | ret = -errno; |
| 4049 | error_report("ram_block_discard_range: Failed to fallocate " |
| 4050 | "%s:%" PRIx64 " +%zx (%d)", |
| 4051 | rb->idstr, start, length, ret); |
| 4052 | goto err; |
| 4053 | } |
| 4054 | #else |
| 4055 | ret = -ENOSYS; |
| 4056 | error_report("ram_block_discard_range: fallocate not available/file" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 4057 | "%s:%" PRIx64 " +%zx (%d)", |
| 4058 | rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 4059 | goto err; |
| 4060 | #endif |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 4061 | } |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 4062 | if (need_madvise) { |
| 4063 | /* For normal RAM this causes it to be unmapped, |
| 4064 | * for shared memory it causes the local mapping to disappear |
| 4065 | * and to fall back on the file contents (which we just |
| 4066 | * fallocate'd away). |
| 4067 | */ |
| 4068 | #if defined(CONFIG_MADVISE) |
| 4069 | ret = madvise(host_startaddr, length, MADV_DONTNEED); |
| 4070 | if (ret) { |
| 4071 | ret = -errno; |
| 4072 | error_report("ram_block_discard_range: Failed to discard range " |
| 4073 | "%s:%" PRIx64 " +%zx (%d)", |
| 4074 | rb->idstr, start, length, ret); |
| 4075 | goto err; |
| 4076 | } |
| 4077 | #else |
| 4078 | ret = -ENOSYS; |
| 4079 | error_report("ram_block_discard_range: MADVISE not available" |
| 4080 | "%s:%" PRIx64 " +%zx (%d)", |
| 4081 | rb->idstr, start, length, ret); |
| 4082 | goto err; |
| 4083 | #endif |
| 4084 | } |
| 4085 | trace_ram_block_discard_range(rb->idstr, host_startaddr, length, |
| 4086 | need_madvise, need_fallocate, ret); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 4087 | } else { |
| 4088 | error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64 |
| 4089 | "/%zx/" RAM_ADDR_FMT")", |
| 4090 | rb->idstr, start, length, rb->used_length); |
| 4091 | } |
| 4092 | |
| 4093 | err: |
| 4094 | return ret; |
| 4095 | } |
| 4096 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 4097 | bool ramblock_is_pmem(RAMBlock *rb) |
| 4098 | { |
| 4099 | return rb->flags & RAM_PMEM; |
| 4100 | } |
| 4101 | |
Peter Maydell | ec3f8c9 | 2013-06-27 20:53:38 +0100 | [diff] [blame] | 4102 | #endif |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 4103 | |
| 4104 | void page_size_init(void) |
| 4105 | { |
| 4106 | /* NOTE: we can always suppose that qemu_host_page_size >= |
| 4107 | TARGET_PAGE_SIZE */ |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 4108 | if (qemu_host_page_size == 0) { |
| 4109 | qemu_host_page_size = qemu_real_host_page_size; |
| 4110 | } |
| 4111 | if (qemu_host_page_size < TARGET_PAGE_SIZE) { |
| 4112 | qemu_host_page_size = TARGET_PAGE_SIZE; |
| 4113 | } |
| 4114 | qemu_host_page_mask = -(intptr_t)qemu_host_page_size; |
| 4115 | } |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 4116 | |
| 4117 | #if !defined(CONFIG_USER_ONLY) |
| 4118 | |
| 4119 | static void mtree_print_phys_entries(fprintf_function mon, void *f, |
| 4120 | int start, int end, int skip, int ptr) |
| 4121 | { |
| 4122 | if (start == end - 1) { |
| 4123 | mon(f, "\t%3d ", start); |
| 4124 | } else { |
| 4125 | mon(f, "\t%3d..%-3d ", start, end - 1); |
| 4126 | } |
| 4127 | mon(f, " skip=%d ", skip); |
| 4128 | if (ptr == PHYS_MAP_NODE_NIL) { |
| 4129 | mon(f, " ptr=NIL"); |
| 4130 | } else if (!skip) { |
| 4131 | mon(f, " ptr=#%d", ptr); |
| 4132 | } else { |
| 4133 | mon(f, " ptr=[%d]", ptr); |
| 4134 | } |
| 4135 | mon(f, "\n"); |
| 4136 | } |
| 4137 | |
| 4138 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
| 4139 | int128_sub((size), int128_one())) : 0) |
| 4140 | |
| 4141 | void mtree_print_dispatch(fprintf_function mon, void *f, |
| 4142 | AddressSpaceDispatch *d, MemoryRegion *root) |
| 4143 | { |
| 4144 | int i; |
| 4145 | |
| 4146 | mon(f, " Dispatch\n"); |
| 4147 | mon(f, " Physical sections\n"); |
| 4148 | |
| 4149 | for (i = 0; i < d->map.sections_nb; ++i) { |
| 4150 | MemoryRegionSection *s = d->map.sections + i; |
| 4151 | const char *names[] = { " [unassigned]", " [not dirty]", |
| 4152 | " [ROM]", " [watch]" }; |
| 4153 | |
| 4154 | mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s", |
| 4155 | i, |
| 4156 | s->offset_within_address_space, |
| 4157 | s->offset_within_address_space + MR_SIZE(s->mr->size), |
| 4158 | s->mr->name ? s->mr->name : "(noname)", |
| 4159 | i < ARRAY_SIZE(names) ? names[i] : "", |
| 4160 | s->mr == root ? " [ROOT]" : "", |
| 4161 | s == d->mru_section ? " [MRU]" : "", |
| 4162 | s->mr->is_iommu ? " [iommu]" : ""); |
| 4163 | |
| 4164 | if (s->mr->alias) { |
| 4165 | mon(f, " alias=%s", s->mr->alias->name ? |
| 4166 | s->mr->alias->name : "noname"); |
| 4167 | } |
| 4168 | mon(f, "\n"); |
| 4169 | } |
| 4170 | |
| 4171 | mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n", |
| 4172 | P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip); |
| 4173 | for (i = 0; i < d->map.nodes_nb; ++i) { |
| 4174 | int j, jprev; |
| 4175 | PhysPageEntry prev; |
| 4176 | Node *n = d->map.nodes + i; |
| 4177 | |
| 4178 | mon(f, " [%d]\n", i); |
| 4179 | |
| 4180 | for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) { |
| 4181 | PhysPageEntry *pe = *n + j; |
| 4182 | |
| 4183 | if (pe->ptr == prev.ptr && pe->skip == prev.skip) { |
| 4184 | continue; |
| 4185 | } |
| 4186 | |
| 4187 | mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr); |
| 4188 | |
| 4189 | jprev = j; |
| 4190 | prev = *pe; |
| 4191 | } |
| 4192 | |
| 4193 | if (jprev != ARRAY_SIZE(*n)) { |
| 4194 | mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr); |
| 4195 | } |
| 4196 | } |
| 4197 | } |
| 4198 | |
| 4199 | #endif |