blob: 86a38d3b3b96a8aef4eb3f5f2af4db8b970eb6bd [file] [log] [blame]
bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
Peter Maydell7b31bbc2016-01-26 18:16:56 +000019#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010020#include "qapi/error.h"
bellard54936002003-05-13 00:25:15 +000021
Veronia Bahaaf348b6d2016-03-20 19:16:19 +020022#include "qemu/cutils.h"
bellard6180a182003-09-30 21:04:53 +000023#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010024#include "exec/exec-all.h"
Juan Quintela51180422017-04-24 20:50:19 +020025#include "exec/target_page.h"
bellardb67d9a52008-05-23 09:57:34 +000026#include "tcg.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020027#include "hw/qdev-core.h"
Fam Zhengc7e002c2017-07-14 10:15:08 +080028#include "hw/qdev-properties.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010029#if !defined(CONFIG_USER_ONLY)
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +020030#include "hw/boards.h"
Paolo Bonzini33c11872016-03-15 16:58:45 +010031#include "hw/xen/xen.h"
Michael S. Tsirkin4485bd22015-03-11 07:56:34 +010032#endif
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Markus Armbruster2ff3de62013-07-04 15:09:22 +020034#include "sysemu/sysemu.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/timer.h"
36#include "qemu/config-file.h"
Andreas Färber75a34032013-09-02 16:57:02 +020037#include "qemu/error-report.h"
pbrook53a59602006-03-25 19:31:22 +000038#if defined(CONFIG_USER_ONLY)
Markus Armbrustera9c94272016-06-22 19:11:19 +020039#include "qemu.h"
Jun Nakajima432d2682010-08-31 16:41:25 +010040#else /* !CONFIG_USER_ONLY */
Paolo Bonzini741da0d2014-06-27 08:40:04 +020041#include "hw/hw.h"
42#include "exec/memory.h"
Paolo Bonzinidf43d492016-03-16 10:24:54 +010043#include "exec/ioport.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020044#include "sysemu/dma.h"
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +110045#include "sysemu/numa.h"
Christian Borntraeger79ca7a12017-03-07 15:19:08 +010046#include "sysemu/hw_accel.h"
Paolo Bonzini741da0d2014-06-27 08:40:04 +020047#include "exec/address-spaces.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010048#include "sysemu/xen-mapcache.h"
Daniel P. Berrange0ab8ed12017-01-25 16:14:15 +000049#include "trace-root.h"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +000050
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000051#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +000052#include <linux/falloc.h>
53#endif
54
pbrook53a59602006-03-25 19:31:22 +000055#endif
Mike Day0dc3f442013-09-05 14:41:35 -040056#include "qemu/rcu_queue.h"
Jan Kiszka4840f102015-06-18 18:47:22 +020057#include "qemu/main-loop.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000058#include "translate-all.h"
Pavel Dovgalyuk76159362015-09-17 19:25:07 +030059#include "sysemu/replay.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000060
Paolo Bonzini022c62c2012-12-17 18:19:49 +010061#include "exec/memory-internal.h"
Juan Quintela220c3eb2013-10-14 17:13:59 +020062#include "exec/ram_addr.h"
Paolo Bonzini508127e2016-01-07 16:55:28 +030063#include "exec/log.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020064
Bharata B Rao9dfeca72016-05-12 09:18:12 +053065#include "migration/vmstate.h"
66
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020067#include "qemu/range.h"
Michael S. Tsirkin794e8f32015-09-24 14:41:17 +030068#ifndef _WIN32
69#include "qemu/mmap-alloc.h"
70#endif
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +020071
Peter Xube9b23c2017-05-12 12:17:41 +080072#include "monitor/monitor.h"
73
blueswir1db7b5422007-05-26 17:36:03 +000074//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000075
pbrook99773bd2006-04-16 15:14:59 +000076#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -040077/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
78 * are protected by the ramlist lock.
79 */
Mike Day0d53d9f2015-01-21 13:45:24 +010080RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030081
82static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030083static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030084
Avi Kivityf6790af2012-10-02 20:13:51 +020085AddressSpace address_space_io;
86AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020087
Paolo Bonzini0844e002013-05-24 14:37:28 +020088MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020089static MemoryRegion io_mem_unassigned;
pbrooke2eef172008-06-08 01:09:01 +000090#endif
bellard9fa3e852004-01-04 18:06:42 +000091
Peter Maydell20bccb82016-10-24 16:26:49 +010092#ifdef TARGET_PAGE_BITS_VARY
93int target_page_bits;
94bool target_page_bits_decided;
95#endif
96
Paolo Bonzinif481ee22018-12-06 11:56:15 +010097CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
98
bellard6a00d602005-11-21 23:25:50 +000099/* current CPU in the current thread. It is only valid inside
100 cpu_exec() */
Paolo Bonzinif240eb62015-08-26 00:17:58 +0200101__thread CPUState *current_cpu;
pbrook2e70f6e2008-06-29 01:03:05 +0000102/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +0000103 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +0000104 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +0100105int use_icount;
bellard6a00d602005-11-21 23:25:50 +0000106
Yang Zhonga0be0c52017-07-03 18:12:13 +0800107uintptr_t qemu_host_page_size;
108intptr_t qemu_host_page_mask;
Yang Zhonga0be0c52017-07-03 18:12:13 +0800109
Peter Maydell20bccb82016-10-24 16:26:49 +0100110bool set_preferred_target_page_bits(int bits)
111{
112 /* The target page size is the lowest common denominator for all
113 * the CPUs in the system, so we can only make it smaller, never
114 * larger. And we can't make it smaller once we've committed to
115 * a particular size.
116 */
117#ifdef TARGET_PAGE_BITS_VARY
118 assert(bits >= TARGET_PAGE_BITS_MIN);
119 if (target_page_bits == 0 || target_page_bits > bits) {
120 if (target_page_bits_decided) {
121 return false;
122 }
123 target_page_bits = bits;
124 }
125#endif
126 return true;
127}
128
pbrooke2eef172008-06-08 01:09:01 +0000129#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +0200130
Peter Maydell20bccb82016-10-24 16:26:49 +0100131static void finalize_target_page_bits(void)
132{
133#ifdef TARGET_PAGE_BITS_VARY
134 if (target_page_bits == 0) {
135 target_page_bits = TARGET_PAGE_BITS_MIN;
136 }
137 target_page_bits_decided = true;
138#endif
139}
140
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200141typedef struct PhysPageEntry PhysPageEntry;
142
143struct PhysPageEntry {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200144 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200145 uint32_t skip : 6;
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200146 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200147 uint32_t ptr : 26;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200148};
149
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200150#define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
151
Paolo Bonzini03f49952013-11-07 17:14:36 +0100152/* Size of the L2 (and L3, etc) page tables. */
Paolo Bonzini57271d62013-11-07 17:14:37 +0100153#define ADDR_SPACE_BITS 64
Paolo Bonzini03f49952013-11-07 17:14:36 +0100154
Michael S. Tsirkin026736c2013-11-13 20:13:03 +0200155#define P_L2_BITS 9
Paolo Bonzini03f49952013-11-07 17:14:36 +0100156#define P_L2_SIZE (1 << P_L2_BITS)
157
158#define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
159
160typedef PhysPageEntry Node[P_L2_SIZE];
Paolo Bonzini0475d942013-05-29 12:28:21 +0200161
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200162typedef struct PhysPageMap {
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100163 struct rcu_head rcu;
164
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200165 unsigned sections_nb;
166 unsigned sections_nb_alloc;
167 unsigned nodes_nb;
168 unsigned nodes_nb_alloc;
169 Node *nodes;
170 MemoryRegionSection *sections;
171} PhysPageMap;
172
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200173struct AddressSpaceDispatch {
Fam Zheng729633c2016-03-01 14:18:24 +0800174 MemoryRegionSection *mru_section;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200175 /* This is a multi-level map on the physical address space.
176 * The bottom level has pointers to MemoryRegionSections.
177 */
178 PhysPageEntry phys_map;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200179 PhysPageMap map;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200180};
181
Jan Kiszka90260c62013-05-26 21:46:51 +0200182#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
183typedef struct subpage_t {
184 MemoryRegion iomem;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000185 FlatView *fv;
Jan Kiszka90260c62013-05-26 21:46:51 +0200186 hwaddr base;
Vijaya Kumar K2615fab2016-10-24 16:26:49 +0100187 uint16_t sub_section[];
Jan Kiszka90260c62013-05-26 21:46:51 +0200188} subpage_t;
189
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200190#define PHYS_SECTION_UNASSIGNED 0
191#define PHYS_SECTION_NOTDIRTY 1
192#define PHYS_SECTION_ROM 2
193#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200194
pbrooke2eef172008-06-08 01:09:01 +0000195static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300196static void memory_map_init(void);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000197static void tcg_commit(MemoryListener *listener);
pbrooke2eef172008-06-08 01:09:01 +0000198
Avi Kivity1ec9b902012-01-02 12:47:48 +0200199static MemoryRegion io_mem_watch;
Peter Maydell32857f42015-10-01 15:29:50 +0100200
201/**
202 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
203 * @cpu: the CPU whose AddressSpace this is
204 * @as: the AddressSpace itself
205 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
206 * @tcg_as_listener: listener for tracking changes to the AddressSpace
207 */
208struct CPUAddressSpace {
209 CPUState *cpu;
210 AddressSpace *as;
211 struct AddressSpaceDispatch *memory_dispatch;
212 MemoryListener tcg_as_listener;
213};
214
Gerd Hoffmann8deaf122017-04-21 11:16:25 +0200215struct DirtyBitmapSnapshot {
216 ram_addr_t start;
217 ram_addr_t end;
218 unsigned long dirty[];
219};
220
pbrook6658ffb2007-03-16 23:58:11 +0000221#endif
bellard54936002003-05-13 00:25:15 +0000222
Paul Brook6d9a1302010-02-28 23:55:53 +0000223#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200224
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200225static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200226{
Peter Lieven101420b2016-07-15 12:03:50 +0200227 static unsigned alloc_hint = 16;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200228 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
Peter Lieven101420b2016-07-15 12:03:50 +0200229 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200230 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
231 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
Peter Lieven101420b2016-07-15 12:03:50 +0200232 alloc_hint = map->nodes_nb_alloc;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200233 }
234}
235
Paolo Bonzinidb946042015-05-21 15:12:29 +0200236static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200237{
238 unsigned i;
Michael S. Tsirkin8b795762013-11-11 14:51:56 +0200239 uint32_t ret;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200240 PhysPageEntry e;
241 PhysPageEntry *p;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200242
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200243 ret = map->nodes_nb++;
Paolo Bonzinidb946042015-05-21 15:12:29 +0200244 p = map->nodes[ret];
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200245 assert(ret != PHYS_MAP_NODE_NIL);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200246 assert(ret != map->nodes_nb_alloc);
Paolo Bonzinidb946042015-05-21 15:12:29 +0200247
248 e.skip = leaf ? 0 : 1;
249 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100250 for (i = 0; i < P_L2_SIZE; ++i) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200251 memcpy(&p[i], &e, sizeof(e));
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200252 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200253 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200254}
255
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200256static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
257 hwaddr *index, hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200258 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200259{
260 PhysPageEntry *p;
Paolo Bonzini03f49952013-11-07 17:14:36 +0100261 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200262
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200263 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzinidb946042015-05-21 15:12:29 +0200264 lp->ptr = phys_map_node_alloc(map, level == 0);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200265 }
Paolo Bonzinidb946042015-05-21 15:12:29 +0200266 p = map->nodes[lp->ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100267 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200268
Paolo Bonzini03f49952013-11-07 17:14:36 +0100269 while (*nb && lp < &p[P_L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200270 if ((*index & (step - 1)) == 0 && *nb >= step) {
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200271 lp->skip = 0;
Avi Kivityc19e8802012-02-13 20:25:31 +0200272 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200273 *index += step;
274 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200275 } else {
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200276 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
Avi Kivity29990972012-02-13 20:21:20 +0200277 }
278 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200279 }
280}
281
Avi Kivityac1970f2012-10-03 16:22:53 +0200282static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200283 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200284 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000285{
Avi Kivity29990972012-02-13 20:21:20 +0200286 /* Wildly overreserve - it doesn't matter much. */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200287 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000288
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200289 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000290}
291
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200292/* Compact a non leaf page entry. Simply detect that the entry has a single child,
293 * and update our entry so we can skip it and go directly to the destination.
294 */
Marc-André Lureauefee6782016-09-28 16:37:20 +0400295static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200296{
297 unsigned valid_ptr = P_L2_SIZE;
298 int valid = 0;
299 PhysPageEntry *p;
300 int i;
301
302 if (lp->ptr == PHYS_MAP_NODE_NIL) {
303 return;
304 }
305
306 p = nodes[lp->ptr];
307 for (i = 0; i < P_L2_SIZE; i++) {
308 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
309 continue;
310 }
311
312 valid_ptr = i;
313 valid++;
314 if (p[i].skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400315 phys_page_compact(&p[i], nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200316 }
317 }
318
319 /* We can only compress if there's only one child. */
320 if (valid != 1) {
321 return;
322 }
323
324 assert(valid_ptr < P_L2_SIZE);
325
326 /* Don't compress if it won't fit in the # of bits we have. */
327 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
328 return;
329 }
330
331 lp->ptr = p[valid_ptr].ptr;
332 if (!p[valid_ptr].skip) {
333 /* If our only child is a leaf, make this a leaf. */
334 /* By design, we should have made this node a leaf to begin with so we
335 * should never reach here.
336 * But since it's so simple to handle this, let's do it just in case we
337 * change this rule.
338 */
339 lp->skip = 0;
340 } else {
341 lp->skip += p[valid_ptr].skip;
342 }
343}
344
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +1000345void address_space_dispatch_compact(AddressSpaceDispatch *d)
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200346{
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200347 if (d->phys_map.skip) {
Marc-André Lureauefee6782016-09-28 16:37:20 +0400348 phys_page_compact(&d->phys_map, d->map.nodes);
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200349 }
350}
351
Fam Zheng29cb5332016-03-01 14:18:23 +0800352static inline bool section_covers_addr(const MemoryRegionSection *section,
353 hwaddr addr)
354{
355 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
356 * the section must cover the entire address space.
357 */
Richard Henderson258dfaa2016-06-29 15:48:03 -0700358 return int128_gethi(section->size) ||
Fam Zheng29cb5332016-03-01 14:18:23 +0800359 range_covers_byte(section->offset_within_address_space,
Richard Henderson258dfaa2016-06-29 15:48:03 -0700360 int128_getlo(section->size), addr);
Fam Zheng29cb5332016-03-01 14:18:23 +0800361}
362
Peter Xu003a0cf2017-05-15 16:50:57 +0800363static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
bellard92e873b2004-05-21 14:52:29 +0000364{
Peter Xu003a0cf2017-05-15 16:50:57 +0800365 PhysPageEntry lp = d->phys_map, *p;
366 Node *nodes = d->map.nodes;
367 MemoryRegionSection *sections = d->map.sections;
Michael S. Tsirkin97115a82013-11-13 20:08:19 +0200368 hwaddr index = addr >> TARGET_PAGE_BITS;
Avi Kivity31ab2b42012-02-13 16:44:19 +0200369 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200370
Michael S. Tsirkin9736e552013-11-11 14:42:43 +0200371 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200372 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200373 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200374 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200375 p = nodes[lp.ptr];
Paolo Bonzini03f49952013-11-07 17:14:36 +0100376 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200377 }
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200378
Fam Zheng29cb5332016-03-01 14:18:23 +0800379 if (section_covers_addr(&sections[lp.ptr], addr)) {
Michael S. Tsirkinb35ba302013-11-11 17:52:07 +0200380 return &sections[lp.ptr];
381 } else {
382 return &sections[PHYS_SECTION_UNASSIGNED];
383 }
Avi Kivityf3705d52012-03-08 16:16:34 +0200384}
385
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100386/* Called from RCU critical section */
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200387static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
Jan Kiszka90260c62013-05-26 21:46:51 +0200388 hwaddr addr,
389 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200390{
Fam Zheng729633c2016-03-01 14:18:24 +0800391 MemoryRegionSection *section = atomic_read(&d->mru_section);
Jan Kiszka90260c62013-05-26 21:46:51 +0200392 subpage_t *subpage;
393
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100394 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
395 !section_covers_addr(section, addr)) {
Peter Xu003a0cf2017-05-15 16:50:57 +0800396 section = phys_page_find(d, addr);
Paolo Bonzini07c114b2017-11-15 15:11:03 +0100397 atomic_set(&d->mru_section, section);
Fam Zheng729633c2016-03-01 14:18:24 +0800398 }
Jan Kiszka90260c62013-05-26 21:46:51 +0200399 if (resolve_subpage && section->mr->subpage) {
400 subpage = container_of(section->mr, subpage_t, iomem);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +0200401 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200402 }
403 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200404}
405
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100406/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200407static MemoryRegionSection *
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200408address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
Jan Kiszka90260c62013-05-26 21:46:51 +0200409 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200410{
411 MemoryRegionSection *section;
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200412 MemoryRegion *mr;
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100413 Int128 diff;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200414
Paolo Bonzinic7086b42013-06-02 15:27:39 +0200415 section = address_space_lookup_region(d, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200416 /* Compute offset within MemoryRegionSection */
417 addr -= section->offset_within_address_space;
418
419 /* Compute offset within MemoryRegion */
420 *xlat = addr + section->offset_within_region;
421
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200422 mr = section->mr;
Paolo Bonzinib242e0e2015-07-04 00:24:51 +0200423
424 /* MMIO registers can be expected to perform full-width accesses based only
425 * on their address, without considering adjacent registers that could
426 * decode to completely different MemoryRegions. When such registers
427 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
428 * regions overlap wildly. For this reason we cannot clamp the accesses
429 * here.
430 *
431 * If the length is small (as is the case for address_space_ldl/stl),
432 * everything works fine. If the incoming length is large, however,
433 * the caller really has to do the clamping through memory_access_size.
434 */
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200435 if (memory_region_is_ram(mr)) {
Paolo Bonzinie4a511f2015-06-17 10:36:54 +0200436 diff = int128_sub(section->size, int128_make64(addr));
Paolo Bonzini965eb2f2015-06-17 10:40:27 +0200437 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
438 }
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200439 return section;
440}
Jan Kiszka90260c62013-05-26 21:46:51 +0200441
Peter Xud5e5faf2017-10-10 11:42:45 +0200442/**
Paolo Bonzinia411c842018-03-03 17:24:04 +0100443 * address_space_translate_iommu - translate an address through an IOMMU
444 * memory region and then through the target address space.
445 *
446 * @iommu_mr: the IOMMU memory region that we start the translation from
447 * @addr: the address to be translated through the MMU
448 * @xlat: the translated address offset within the destination memory region.
449 * It cannot be %NULL.
450 * @plen_out: valid read/write length of the translated address. It
451 * cannot be %NULL.
452 * @page_mask_out: page mask for the translated address. This
453 * should only be meaningful for IOMMU translated
454 * addresses, since there may be huge pages that this bit
455 * would tell. It can be %NULL if we don't care about it.
456 * @is_write: whether the translation operation is for write
457 * @is_mmio: whether this can be MMIO, set true if it can
458 * @target_as: the address space targeted by the IOMMU
Peter Maydell2f7b0092018-05-31 14:50:53 +0100459 * @attrs: transaction attributes
Paolo Bonzinia411c842018-03-03 17:24:04 +0100460 *
461 * This function is called from RCU critical section. It is the common
462 * part of flatview_do_translate and address_space_translate_cached.
463 */
464static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
465 hwaddr *xlat,
466 hwaddr *plen_out,
467 hwaddr *page_mask_out,
468 bool is_write,
469 bool is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100470 AddressSpace **target_as,
471 MemTxAttrs attrs)
Paolo Bonzinia411c842018-03-03 17:24:04 +0100472{
473 MemoryRegionSection *section;
474 hwaddr page_mask = (hwaddr)-1;
475
476 do {
477 hwaddr addr = *xlat;
478 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
Peter Maydell2c91bcf2018-06-15 14:57:16 +0100479 int iommu_idx = 0;
480 IOMMUTLBEntry iotlb;
481
482 if (imrc->attrs_to_index) {
483 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
484 }
485
486 iotlb = imrc->translate(iommu_mr, addr, is_write ?
487 IOMMU_WO : IOMMU_RO, iommu_idx);
Paolo Bonzinia411c842018-03-03 17:24:04 +0100488
489 if (!(iotlb.perm & (1 << is_write))) {
490 goto unassigned;
491 }
492
493 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
494 | (addr & iotlb.addr_mask));
495 page_mask &= iotlb.addr_mask;
496 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
497 *target_as = iotlb.target_as;
498
499 section = address_space_translate_internal(
500 address_space_to_dispatch(iotlb.target_as), addr, xlat,
501 plen_out, is_mmio);
502
503 iommu_mr = memory_region_get_iommu(section->mr);
504 } while (unlikely(iommu_mr));
505
506 if (page_mask_out) {
507 *page_mask_out = page_mask;
508 }
509 return *section;
510
511unassigned:
512 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
513}
514
515/**
Peter Xud5e5faf2017-10-10 11:42:45 +0200516 * flatview_do_translate - translate an address in FlatView
517 *
518 * @fv: the flat view that we want to translate on
519 * @addr: the address to be translated in above address space
520 * @xlat: the translated address offset within memory region. It
521 * cannot be @NULL.
522 * @plen_out: valid read/write length of the translated address. It
523 * can be @NULL when we don't care about it.
524 * @page_mask_out: page mask for the translated address. This
525 * should only be meaningful for IOMMU translated
526 * addresses, since there may be huge pages that this bit
527 * would tell. It can be @NULL if we don't care about it.
528 * @is_write: whether the translation operation is for write
529 * @is_mmio: whether this can be MMIO, set true if it can
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200530 * @target_as: the address space targeted by the IOMMU
Peter Maydell49e14aa2018-05-31 14:50:53 +0100531 * @attrs: memory transaction attributes
Peter Xud5e5faf2017-10-10 11:42:45 +0200532 *
533 * This function is called from RCU critical section
534 */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000535static MemoryRegionSection flatview_do_translate(FlatView *fv,
536 hwaddr addr,
537 hwaddr *xlat,
Peter Xud5e5faf2017-10-10 11:42:45 +0200538 hwaddr *plen_out,
539 hwaddr *page_mask_out,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000540 bool is_write,
541 bool is_mmio,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100542 AddressSpace **target_as,
543 MemTxAttrs attrs)
Jan Kiszka90260c62013-05-26 21:46:51 +0200544{
Avi Kivity30951152012-10-30 13:47:46 +0200545 MemoryRegionSection *section;
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000546 IOMMUMemoryRegion *iommu_mr;
Peter Xud5e5faf2017-10-10 11:42:45 +0200547 hwaddr plen = (hwaddr)(-1);
548
Paolo Bonziniad2804d2018-04-17 11:39:35 +0200549 if (!plen_out) {
550 plen_out = &plen;
Peter Xud5e5faf2017-10-10 11:42:45 +0200551 }
Avi Kivity30951152012-10-30 13:47:46 +0200552
Paolo Bonzinia411c842018-03-03 17:24:04 +0100553 section = address_space_translate_internal(
554 flatview_to_dispatch(fv), addr, xlat,
555 plen_out, is_mmio);
Avi Kivity30951152012-10-30 13:47:46 +0200556
Paolo Bonzinia411c842018-03-03 17:24:04 +0100557 iommu_mr = memory_region_get_iommu(section->mr);
558 if (unlikely(iommu_mr)) {
559 return address_space_translate_iommu(iommu_mr, xlat,
560 plen_out, page_mask_out,
561 is_write, is_mmio,
Peter Maydell2f7b0092018-05-31 14:50:53 +0100562 target_as, attrs);
Avi Kivity30951152012-10-30 13:47:46 +0200563 }
Peter Xud5e5faf2017-10-10 11:42:45 +0200564 if (page_mask_out) {
Paolo Bonzinia411c842018-03-03 17:24:04 +0100565 /* Not behind an IOMMU, use default page size. */
566 *page_mask_out = ~TARGET_PAGE_MASK;
Peter Xud5e5faf2017-10-10 11:42:45 +0200567 }
568
Peter Xua7640402017-05-17 16:57:42 +0800569 return *section;
Peter Xua7640402017-05-17 16:57:42 +0800570}
571
572/* Called from RCU critical section */
573IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
Peter Maydell7446eb02018-05-31 14:50:53 +0100574 bool is_write, MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800575{
576 MemoryRegionSection section;
Peter Xu076a93d2017-10-10 11:42:46 +0200577 hwaddr xlat, page_mask;
Peter Xua7640402017-05-17 16:57:42 +0800578
Peter Xu076a93d2017-10-10 11:42:46 +0200579 /*
580 * This can never be MMIO, and we don't really care about plen,
581 * but page mask.
582 */
583 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100584 NULL, &page_mask, is_write, false, &as,
585 attrs);
Peter Xua7640402017-05-17 16:57:42 +0800586
587 /* Illegal translation */
588 if (section.mr == &io_mem_unassigned) {
589 goto iotlb_fail;
590 }
591
592 /* Convert memory region offset into address space offset */
593 xlat += section.offset_within_address_space -
594 section.offset_within_region;
595
Peter Xua7640402017-05-17 16:57:42 +0800596 return (IOMMUTLBEntry) {
Alexey Kardashevskiye76bb182017-09-21 18:50:53 +1000597 .target_as = as,
Peter Xu076a93d2017-10-10 11:42:46 +0200598 .iova = addr & ~page_mask,
599 .translated_addr = xlat & ~page_mask,
600 .addr_mask = page_mask,
Peter Xua7640402017-05-17 16:57:42 +0800601 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
602 .perm = IOMMU_RW,
603 };
604
605iotlb_fail:
606 return (IOMMUTLBEntry) {0};
607}
608
609/* Called from RCU critical section */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000610MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +0100611 hwaddr *plen, bool is_write,
612 MemTxAttrs attrs)
Peter Xua7640402017-05-17 16:57:42 +0800613{
614 MemoryRegion *mr;
615 MemoryRegionSection section;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +1000616 AddressSpace *as = NULL;
Peter Xua7640402017-05-17 16:57:42 +0800617
618 /* This can be MMIO, so setup MMIO bit. */
Peter Xud5e5faf2017-10-10 11:42:45 +0200619 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
Peter Maydell49e14aa2018-05-31 14:50:53 +0100620 is_write, true, &as, attrs);
Peter Xua7640402017-05-17 16:57:42 +0800621 mr = section.mr;
622
Alexey Kardashevskiyfe680d02014-05-07 13:40:39 +0000623 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100624 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
Peter Crosthwaite23820db2015-03-16 22:35:54 -0700625 *plen = MIN(page, *plen);
Paolo Bonzinia87f3952014-02-07 15:47:46 +0100626 }
627
Avi Kivity30951152012-10-30 13:47:46 +0200628 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200629}
630
Peter Maydell1f871c52018-06-15 14:57:16 +0100631typedef struct TCGIOMMUNotifier {
632 IOMMUNotifier n;
633 MemoryRegion *mr;
634 CPUState *cpu;
635 int iommu_idx;
636 bool active;
637} TCGIOMMUNotifier;
638
639static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
640{
641 TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
642
643 if (!notifier->active) {
644 return;
645 }
646 tlb_flush(notifier->cpu);
647 notifier->active = false;
648 /* We leave the notifier struct on the list to avoid reallocating it later.
649 * Generally the number of IOMMUs a CPU deals with will be small.
650 * In any case we can't unregister the iommu notifier from a notify
651 * callback.
652 */
653}
654
655static void tcg_register_iommu_notifier(CPUState *cpu,
656 IOMMUMemoryRegion *iommu_mr,
657 int iommu_idx)
658{
659 /* Make sure this CPU has an IOMMU notifier registered for this
660 * IOMMU/IOMMU index combination, so that we can flush its TLB
661 * when the IOMMU tells us the mappings we've cached have changed.
662 */
663 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
664 TCGIOMMUNotifier *notifier;
665 int i;
666
667 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
Peter Maydell5601be32019-02-01 14:55:45 +0000668 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
Peter Maydell1f871c52018-06-15 14:57:16 +0100669 if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) {
670 break;
671 }
672 }
673 if (i == cpu->iommu_notifiers->len) {
674 /* Not found, add a new entry at the end of the array */
675 cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1);
Peter Maydell5601be32019-02-01 14:55:45 +0000676 notifier = g_new0(TCGIOMMUNotifier, 1);
677 g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier;
Peter Maydell1f871c52018-06-15 14:57:16 +0100678
679 notifier->mr = mr;
680 notifier->iommu_idx = iommu_idx;
681 notifier->cpu = cpu;
682 /* Rather than trying to register interest in the specific part
683 * of the iommu's address space that we've accessed and then
684 * expand it later as subsequent accesses touch more of it, we
685 * just register interest in the whole thing, on the assumption
686 * that iommu reconfiguration will be rare.
687 */
688 iommu_notifier_init(&notifier->n,
689 tcg_iommu_unmap_notify,
690 IOMMU_NOTIFIER_UNMAP,
691 0,
692 HWADDR_MAX,
693 iommu_idx);
694 memory_region_register_iommu_notifier(notifier->mr, &notifier->n);
695 }
696
697 if (!notifier->active) {
698 notifier->active = true;
699 }
700}
701
702static void tcg_iommu_free_notifier_list(CPUState *cpu)
703{
704 /* Destroy the CPU's notifier list */
705 int i;
706 TCGIOMMUNotifier *notifier;
707
708 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
Peter Maydell5601be32019-02-01 14:55:45 +0000709 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
Peter Maydell1f871c52018-06-15 14:57:16 +0100710 memory_region_unregister_iommu_notifier(notifier->mr, &notifier->n);
Peter Maydell5601be32019-02-01 14:55:45 +0000711 g_free(notifier);
Peter Maydell1f871c52018-06-15 14:57:16 +0100712 }
713 g_array_free(cpu->iommu_notifiers, true);
714}
715
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +0100716/* Called from RCU critical section */
Jan Kiszka90260c62013-05-26 21:46:51 +0200717MemoryRegionSection *
Peter Maydelld7898cd2016-01-21 14:15:05 +0000718address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
Peter Maydell1f871c52018-06-15 14:57:16 +0100719 hwaddr *xlat, hwaddr *plen,
720 MemTxAttrs attrs, int *prot)
Jan Kiszka90260c62013-05-26 21:46:51 +0200721{
Avi Kivity30951152012-10-30 13:47:46 +0200722 MemoryRegionSection *section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100723 IOMMUMemoryRegion *iommu_mr;
724 IOMMUMemoryRegionClass *imrc;
725 IOMMUTLBEntry iotlb;
726 int iommu_idx;
Alex Bennéef35e44e2016-10-21 16:34:18 +0100727 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
Peter Maydelld7898cd2016-01-21 14:15:05 +0000728
Peter Maydell1f871c52018-06-15 14:57:16 +0100729 for (;;) {
730 section = address_space_translate_internal(d, addr, &addr, plen, false);
731
732 iommu_mr = memory_region_get_iommu(section->mr);
733 if (!iommu_mr) {
734 break;
735 }
736
737 imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
738
739 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
740 tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx);
741 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
742 * doesn't short-cut its translation table walk.
743 */
744 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx);
745 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
746 | (addr & iotlb.addr_mask));
747 /* Update the caller's prot bits to remove permissions the IOMMU
748 * is giving us a failure response for. If we get down to no
749 * permissions left at all we can give up now.
750 */
751 if (!(iotlb.perm & IOMMU_RO)) {
752 *prot &= ~(PAGE_READ | PAGE_EXEC);
753 }
754 if (!(iotlb.perm & IOMMU_WO)) {
755 *prot &= ~PAGE_WRITE;
756 }
757
758 if (!*prot) {
759 goto translate_fail;
760 }
761
762 d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as));
763 }
Avi Kivity30951152012-10-30 13:47:46 +0200764
Alexey Kardashevskiy3df9d742017-07-11 13:56:19 +1000765 assert(!memory_region_is_iommu(section->mr));
Peter Maydell1f871c52018-06-15 14:57:16 +0100766 *xlat = addr;
Avi Kivity30951152012-10-30 13:47:46 +0200767 return section;
Peter Maydell1f871c52018-06-15 14:57:16 +0100768
769translate_fail:
770 return &d->map.sections[PHYS_SECTION_UNASSIGNED];
Jan Kiszka90260c62013-05-26 21:46:51 +0200771}
bellard9fa3e852004-01-04 18:06:42 +0000772#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000773
Andreas Färberb170fce2013-01-20 20:23:22 +0100774#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000775
Juan Quintelae59fb372009-09-29 22:48:21 +0200776static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200777{
Andreas Färber259186a2013-01-17 18:51:17 +0100778 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200779
aurel323098dba2009-03-07 21:28:24 +0000780 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
781 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100782 cpu->interrupt_request &= ~0x01;
Alex Bennéed10eb082016-11-14 14:17:28 +0000783 tlb_flush(cpu);
pbrook9656f322008-07-01 20:01:19 +0000784
Pavel Dovgalyuk15a356c2018-01-10 16:48:46 +0300785 /* loadvm has just updated the content of RAM, bypassing the
786 * usual mechanisms that ensure we flush TBs for writes to
787 * memory we've translated code from. So we must flush all TBs,
788 * which will now be stale.
789 */
790 tb_flush(cpu);
791
pbrook9656f322008-07-01 20:01:19 +0000792 return 0;
793}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200794
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400795static int cpu_common_pre_load(void *opaque)
796{
797 CPUState *cpu = opaque;
798
Paolo Bonziniadee6422014-12-19 12:53:14 +0100799 cpu->exception_index = -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400800
801 return 0;
802}
803
804static bool cpu_common_exception_index_needed(void *opaque)
805{
806 CPUState *cpu = opaque;
807
Paolo Bonziniadee6422014-12-19 12:53:14 +0100808 return tcg_enabled() && cpu->exception_index != -1;
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400809}
810
811static const VMStateDescription vmstate_cpu_common_exception_index = {
812 .name = "cpu_common/exception_index",
813 .version_id = 1,
814 .minimum_version_id = 1,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200815 .needed = cpu_common_exception_index_needed,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400816 .fields = (VMStateField[]) {
817 VMSTATE_INT32(exception_index, CPUState),
818 VMSTATE_END_OF_LIST()
819 }
820};
821
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300822static bool cpu_common_crash_occurred_needed(void *opaque)
823{
824 CPUState *cpu = opaque;
825
826 return cpu->crash_occurred;
827}
828
829static const VMStateDescription vmstate_cpu_common_crash_occurred = {
830 .name = "cpu_common/crash_occurred",
831 .version_id = 1,
832 .minimum_version_id = 1,
833 .needed = cpu_common_crash_occurred_needed,
834 .fields = (VMStateField[]) {
835 VMSTATE_BOOL(crash_occurred, CPUState),
836 VMSTATE_END_OF_LIST()
837 }
838};
839
Andreas Färber1a1562f2013-06-17 04:09:11 +0200840const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200841 .name = "cpu_common",
842 .version_id = 1,
843 .minimum_version_id = 1,
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400844 .pre_load = cpu_common_pre_load,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200845 .post_load = cpu_common_post_load,
Juan Quintela35d08452014-04-16 16:01:33 +0200846 .fields = (VMStateField[]) {
Andreas Färber259186a2013-01-17 18:51:17 +0100847 VMSTATE_UINT32(halted, CPUState),
848 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200849 VMSTATE_END_OF_LIST()
Pavel Dovgaluk6c3bff02014-07-31 09:41:17 +0400850 },
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200851 .subsections = (const VMStateDescription*[]) {
852 &vmstate_cpu_common_exception_index,
Andrey Smetaninbac05aa2015-07-03 15:01:44 +0300853 &vmstate_cpu_common_crash_occurred,
Juan Quintela5cd8cad2014-09-23 14:09:54 +0200854 NULL
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200855 }
856};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200857
pbrook9656f322008-07-01 20:01:19 +0000858#endif
859
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100860CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400861{
Andreas Färberbdc44642013-06-24 23:50:24 +0200862 CPUState *cpu;
Glauber Costa950f1472009-06-09 12:15:18 -0400863
Andreas Färberbdc44642013-06-24 23:50:24 +0200864 CPU_FOREACH(cpu) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100865 if (cpu->cpu_index == index) {
Andreas Färberbdc44642013-06-24 23:50:24 +0200866 return cpu;
Andreas Färber55e5c282012-12-17 06:18:02 +0100867 }
Glauber Costa950f1472009-06-09 12:15:18 -0400868 }
869
Andreas Färberbdc44642013-06-24 23:50:24 +0200870 return NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400871}
872
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000873#if !defined(CONFIG_USER_ONLY)
Peter Xu80ceb072017-11-23 17:23:32 +0800874void cpu_address_space_init(CPUState *cpu, int asidx,
875 const char *prefix, MemoryRegion *mr)
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000876{
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000877 CPUAddressSpace *newas;
Peter Xu80ceb072017-11-23 17:23:32 +0800878 AddressSpace *as = g_new0(AddressSpace, 1);
Peter Xu87a621d2017-11-23 17:23:33 +0800879 char *as_name;
Peter Xu80ceb072017-11-23 17:23:32 +0800880
881 assert(mr);
Peter Xu87a621d2017-11-23 17:23:33 +0800882 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
883 address_space_init(as, mr, as_name);
884 g_free(as_name);
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000885
886 /* Target code should have set num_ases before calling us */
887 assert(asidx < cpu->num_ases);
888
Peter Maydell56943e82016-01-21 14:15:04 +0000889 if (asidx == 0) {
890 /* address space 0 gets the convenience alias */
891 cpu->as = as;
892 }
893
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000894 /* KVM cannot currently support multiple address spaces. */
895 assert(asidx == 0 || !kvm_enabled());
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000896
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000897 if (!cpu->cpu_ases) {
898 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000899 }
Peter Maydell32857f42015-10-01 15:29:50 +0100900
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000901 newas = &cpu->cpu_ases[asidx];
902 newas->cpu = cpu;
903 newas->as = as;
Peter Maydell56943e82016-01-21 14:15:04 +0000904 if (tcg_enabled()) {
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000905 newas->tcg_as_listener.commit = tcg_commit;
906 memory_listener_register(&newas->tcg_as_listener, as);
Peter Maydell56943e82016-01-21 14:15:04 +0000907 }
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000908}
Peter Maydell651a5bc2016-01-21 14:15:05 +0000909
910AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
911{
912 /* Return the AddressSpace corresponding to the specified index */
913 return cpu->cpu_ases[asidx].as;
914}
Edgar E. Iglesias09daed82013-12-17 13:06:51 +1000915#endif
916
Laurent Vivier7bbc1242016-10-20 13:26:04 +0200917void cpu_exec_unrealizefn(CPUState *cpu)
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530918{
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530919 CPUClass *cc = CPU_GET_CLASS(cpu);
920
Paolo Bonzini267f6852016-08-28 03:45:14 +0200921 cpu_list_remove(cpu);
Bharata B Rao9dfeca72016-05-12 09:18:12 +0530922
923 if (cc->vmsd != NULL) {
924 vmstate_unregister(NULL, cc->vmsd, cpu);
925 }
926 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
927 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
928 }
Peter Maydell1f871c52018-06-15 14:57:16 +0100929#ifndef CONFIG_USER_ONLY
930 tcg_iommu_free_notifier_list(cpu);
931#endif
Bharata B Rao1c59eb32016-05-12 09:18:11 +0530932}
933
Fam Zhengc7e002c2017-07-14 10:15:08 +0800934Property cpu_common_props[] = {
935#ifndef CONFIG_USER_ONLY
936 /* Create a memory property for softmmu CPU object,
937 * so users can wire up its memory. (This can't go in qom/cpu.c
938 * because that file is compiled only once for both user-mode
939 * and system builds.) The default if no link is set up is to use
940 * the system address space.
941 */
942 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
943 MemoryRegion *),
944#endif
945 DEFINE_PROP_END_OF_LIST(),
946};
947
Laurent Vivier39e329e2016-10-20 13:26:02 +0200948void cpu_exec_initfn(CPUState *cpu)
bellardfd6ce8f2003-05-14 19:00:11 +0000949{
Peter Maydell56943e82016-01-21 14:15:04 +0000950 cpu->as = NULL;
Peter Maydell12ebc9a2016-01-21 14:15:04 +0000951 cpu->num_ases = 0;
Peter Maydell56943e82016-01-21 14:15:04 +0000952
Eduardo Habkost291135b2015-04-27 17:00:33 -0300953#ifndef CONFIG_USER_ONLY
Eduardo Habkost291135b2015-04-27 17:00:33 -0300954 cpu->thread_id = qemu_get_thread_id();
Peter Crosthwaite6731d862016-01-21 14:15:06 +0000955 cpu->memory = system_memory;
956 object_ref(OBJECT(cpu->memory));
Eduardo Habkost291135b2015-04-27 17:00:33 -0300957#endif
Laurent Vivier39e329e2016-10-20 13:26:02 +0200958}
959
Laurent Vivierce5b1bb2016-10-20 13:26:03 +0200960void cpu_exec_realizefn(CPUState *cpu, Error **errp)
Laurent Vivier39e329e2016-10-20 13:26:02 +0200961{
Richard Henderson55c3cee2017-10-15 19:02:42 -0700962 CPUClass *cc = CPU_GET_CLASS(cpu);
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000963 static bool tcg_target_initialized;
Eduardo Habkost291135b2015-04-27 17:00:33 -0300964
Paolo Bonzini267f6852016-08-28 03:45:14 +0200965 cpu_list_add(cpu);
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200966
Emilio G. Cota2dda6352017-11-13 13:55:25 +0000967 if (tcg_enabled() && !tcg_target_initialized) {
968 tcg_target_initialized = true;
Richard Henderson55c3cee2017-10-15 19:02:42 -0700969 cc->tcg_initialize();
970 }
Emilio G. Cota5005e252018-10-09 13:45:54 -0400971 tlb_init(cpu);
Richard Henderson55c3cee2017-10-15 19:02:42 -0700972
Igor Mammedov1bc7e522016-07-25 11:59:19 +0200973#ifndef CONFIG_USER_ONLY
Andreas Färbere0d47942013-07-29 04:07:50 +0200974 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200975 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
Andreas Färbere0d47942013-07-29 04:07:50 +0200976 }
Andreas Färberb170fce2013-01-20 20:23:22 +0100977 if (cc->vmsd != NULL) {
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200978 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
Andreas Färberb170fce2013-01-20 20:23:22 +0100979 }
Peter Maydell1f871c52018-06-15 14:57:16 +0100980
Peter Maydell5601be32019-02-01 14:55:45 +0000981 cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *));
Paolo Bonzini741da0d2014-06-27 08:40:04 +0200982#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000983}
984
Igor Mammedov2278b932018-02-07 11:40:26 +0100985const char *parse_cpu_model(const char *cpu_model)
986{
987 ObjectClass *oc;
988 CPUClass *cc;
989 gchar **model_pieces;
990 const char *cpu_type;
991
992 model_pieces = g_strsplit(cpu_model, ",", 2);
993
994 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
995 if (oc == NULL) {
996 error_report("unable to find CPU model '%s'", model_pieces[0]);
997 g_strfreev(model_pieces);
998 exit(EXIT_FAILURE);
999 }
1000
1001 cpu_type = object_class_get_name(oc);
1002 cc = CPU_CLASS(oc);
1003 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
1004 g_strfreev(model_pieces);
1005 return cpu_type;
1006}
1007
Paolo Bonzinic40d4792018-07-02 14:45:25 +02001008#if defined(CONFIG_USER_ONLY)
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001009void tb_invalidate_phys_addr(target_ulong addr)
Paul Brook94df27f2010-02-28 23:47:45 +00001010{
Pranith Kumar406bc332017-07-12 17:51:42 -04001011 mmap_lock();
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001012 tb_invalidate_phys_page_range(addr, addr + 1, 0);
Pranith Kumar406bc332017-07-12 17:51:42 -04001013 mmap_unlock();
Paul Brook94df27f2010-02-28 23:47:45 +00001014}
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001015
1016static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1017{
1018 tb_invalidate_phys_addr(pc);
1019}
Pranith Kumar406bc332017-07-12 17:51:42 -04001020#else
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001021void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
1022{
1023 ram_addr_t ram_addr;
1024 MemoryRegion *mr;
1025 hwaddr l = 1;
1026
Paolo Bonzinic40d4792018-07-02 14:45:25 +02001027 if (!tcg_enabled()) {
1028 return;
1029 }
1030
Paolo Bonzini8bca9a02018-05-30 11:58:36 +02001031 rcu_read_lock();
1032 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
1033 if (!(memory_region_is_ram(mr)
1034 || memory_region_is_romd(mr))) {
1035 rcu_read_unlock();
1036 return;
1037 }
1038 ram_addr = memory_region_get_ram_addr(mr) + addr;
1039 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0);
1040 rcu_read_unlock();
1041}
1042
Pranith Kumar406bc332017-07-12 17:51:42 -04001043static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1044{
1045 MemTxAttrs attrs;
1046 hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
1047 int asidx = cpu_asidx_from_attrs(cpu, attrs);
1048 if (phys != -1) {
1049 /* Locks grabbed by tb_invalidate_phys_addr */
1050 tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
Peter Maydellc874dc42018-05-31 14:50:52 +01001051 phys | (pc & ~TARGET_PAGE_MASK), attrs);
Pranith Kumar406bc332017-07-12 17:51:42 -04001052 }
1053}
1054#endif
bellardd720b932004-04-25 17:57:43 +00001055
Paul Brookc527ee82010-03-01 03:31:14 +00001056#if defined(CONFIG_USER_ONLY)
Andreas Färber75a34032013-09-02 16:57:02 +02001057void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +00001058
1059{
1060}
1061
Peter Maydell3ee887e2014-09-12 14:06:48 +01001062int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
1063 int flags)
1064{
1065 return -ENOSYS;
1066}
1067
1068void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
1069{
1070}
1071
Andreas Färber75a34032013-09-02 16:57:02 +02001072int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
Paul Brookc527ee82010-03-01 03:31:14 +00001073 int flags, CPUWatchpoint **watchpoint)
1074{
1075 return -ENOSYS;
1076}
1077#else
pbrook6658ffb2007-03-16 23:58:11 +00001078/* Add a watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001079int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001080 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +00001081{
aliguoric0ce9982008-11-25 22:13:57 +00001082 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001083
Peter Maydell05068c02014-09-12 14:06:48 +01001084 /* forbid ranges which are empty or run off the end of the address space */
Max Filippov07e28632014-09-17 22:03:36 -07001085 if (len == 0 || (addr + len - 1) < addr) {
Andreas Färber75a34032013-09-02 16:57:02 +02001086 error_report("tried to set invalid watchpoint at %"
1087 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
aliguorib4051332008-11-18 20:14:20 +00001088 return -EINVAL;
1089 }
Anthony Liguori7267c092011-08-20 22:09:37 -05001090 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +00001091
aliguoria1d1bb32008-11-18 20:07:32 +00001092 wp->vaddr = addr;
Peter Maydell05068c02014-09-12 14:06:48 +01001093 wp->len = len;
aliguoria1d1bb32008-11-18 20:07:32 +00001094 wp->flags = flags;
1095
aliguori2dc9f412008-11-18 20:56:59 +00001096 /* keep all GDB-injected watchpoints in front */
Andreas Färberff4700b2013-08-26 18:23:18 +02001097 if (flags & BP_GDB) {
1098 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
1099 } else {
1100 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
1101 }
aliguoria1d1bb32008-11-18 20:07:32 +00001102
Andreas Färber31b030d2013-09-04 01:29:02 +02001103 tlb_flush_page(cpu, addr);
aliguoria1d1bb32008-11-18 20:07:32 +00001104
1105 if (watchpoint)
1106 *watchpoint = wp;
1107 return 0;
pbrook6658ffb2007-03-16 23:58:11 +00001108}
1109
aliguoria1d1bb32008-11-18 20:07:32 +00001110/* Remove a specific watchpoint. */
Andreas Färber75a34032013-09-02 16:57:02 +02001111int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
aliguoria1d1bb32008-11-18 20:07:32 +00001112 int flags)
pbrook6658ffb2007-03-16 23:58:11 +00001113{
aliguoria1d1bb32008-11-18 20:07:32 +00001114 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +00001115
Andreas Färberff4700b2013-08-26 18:23:18 +02001116 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001117 if (addr == wp->vaddr && len == wp->len
aliguori6e140f22008-11-18 20:37:55 +00001118 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
Andreas Färber75a34032013-09-02 16:57:02 +02001119 cpu_watchpoint_remove_by_ref(cpu, wp);
pbrook6658ffb2007-03-16 23:58:11 +00001120 return 0;
1121 }
1122 }
aliguoria1d1bb32008-11-18 20:07:32 +00001123 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +00001124}
1125
aliguoria1d1bb32008-11-18 20:07:32 +00001126/* Remove a specific watchpoint by reference. */
Andreas Färber75a34032013-09-02 16:57:02 +02001127void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +00001128{
Andreas Färberff4700b2013-08-26 18:23:18 +02001129 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +00001130
Andreas Färber31b030d2013-09-04 01:29:02 +02001131 tlb_flush_page(cpu, watchpoint->vaddr);
aliguoria1d1bb32008-11-18 20:07:32 +00001132
Anthony Liguori7267c092011-08-20 22:09:37 -05001133 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +00001134}
1135
aliguoria1d1bb32008-11-18 20:07:32 +00001136/* Remove all matching watchpoints. */
Andreas Färber75a34032013-09-02 16:57:02 +02001137void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001138{
aliguoric0ce9982008-11-25 22:13:57 +00001139 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001140
Andreas Färberff4700b2013-08-26 18:23:18 +02001141 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
Andreas Färber75a34032013-09-02 16:57:02 +02001142 if (wp->flags & mask) {
1143 cpu_watchpoint_remove_by_ref(cpu, wp);
1144 }
aliguoric0ce9982008-11-25 22:13:57 +00001145 }
aliguoria1d1bb32008-11-18 20:07:32 +00001146}
Peter Maydell05068c02014-09-12 14:06:48 +01001147
1148/* Return true if this watchpoint address matches the specified
1149 * access (ie the address range covered by the watchpoint overlaps
1150 * partially or completely with the address range covered by the
1151 * access).
1152 */
1153static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
1154 vaddr addr,
1155 vaddr len)
1156{
1157 /* We know the lengths are non-zero, but a little caution is
1158 * required to avoid errors in the case where the range ends
1159 * exactly at the top of the address space and so addr + len
1160 * wraps round to zero.
1161 */
1162 vaddr wpend = wp->vaddr + wp->len - 1;
1163 vaddr addrend = addr + len - 1;
1164
1165 return !(addr > wpend || wp->vaddr > addrend);
1166}
1167
Paul Brookc527ee82010-03-01 03:31:14 +00001168#endif
aliguoria1d1bb32008-11-18 20:07:32 +00001169
1170/* Add a breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001171int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +00001172 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001173{
aliguoric0ce9982008-11-25 22:13:57 +00001174 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +00001175
Anthony Liguori7267c092011-08-20 22:09:37 -05001176 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +00001177
1178 bp->pc = pc;
1179 bp->flags = flags;
1180
aliguori2dc9f412008-11-18 20:56:59 +00001181 /* keep all GDB-injected breakpoints in front */
Andreas Färber00b941e2013-06-29 18:55:54 +02001182 if (flags & BP_GDB) {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001183 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001184 } else {
Andreas Färberf0c3c502013-08-26 21:22:53 +02001185 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
Andreas Färber00b941e2013-06-29 18:55:54 +02001186 }
aliguoria1d1bb32008-11-18 20:07:32 +00001187
Andreas Färberf0c3c502013-08-26 21:22:53 +02001188 breakpoint_invalidate(cpu, pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001189
Andreas Färber00b941e2013-06-29 18:55:54 +02001190 if (breakpoint) {
aliguoria1d1bb32008-11-18 20:07:32 +00001191 *breakpoint = bp;
Andreas Färber00b941e2013-06-29 18:55:54 +02001192 }
aliguoria1d1bb32008-11-18 20:07:32 +00001193 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001194}
1195
1196/* Remove a specific breakpoint. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001197int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +00001198{
aliguoria1d1bb32008-11-18 20:07:32 +00001199 CPUBreakpoint *bp;
1200
Andreas Färberf0c3c502013-08-26 21:22:53 +02001201 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +00001202 if (bp->pc == pc && bp->flags == flags) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001203 cpu_breakpoint_remove_by_ref(cpu, bp);
bellard4c3a88a2003-07-26 12:06:08 +00001204 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +00001205 }
bellard4c3a88a2003-07-26 12:06:08 +00001206 }
aliguoria1d1bb32008-11-18 20:07:32 +00001207 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +00001208}
1209
aliguoria1d1bb32008-11-18 20:07:32 +00001210/* Remove a specific breakpoint by reference. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001211void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +00001212{
Andreas Färberf0c3c502013-08-26 21:22:53 +02001213 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
1214
1215 breakpoint_invalidate(cpu, breakpoint->pc);
aliguoria1d1bb32008-11-18 20:07:32 +00001216
Anthony Liguori7267c092011-08-20 22:09:37 -05001217 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +00001218}
1219
1220/* Remove all matching breakpoints. */
Andreas Färberb3310ab2013-09-02 17:26:20 +02001221void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +00001222{
aliguoric0ce9982008-11-25 22:13:57 +00001223 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +00001224
Andreas Färberf0c3c502013-08-26 21:22:53 +02001225 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
Andreas Färberb3310ab2013-09-02 17:26:20 +02001226 if (bp->flags & mask) {
1227 cpu_breakpoint_remove_by_ref(cpu, bp);
1228 }
aliguoric0ce9982008-11-25 22:13:57 +00001229 }
bellard4c3a88a2003-07-26 12:06:08 +00001230}
1231
bellardc33a3462003-07-29 20:50:33 +00001232/* enable or disable single step mode. EXCP_DEBUG is returned by the
1233 CPU loop after each instruction */
Andreas Färber3825b282013-06-24 18:41:06 +02001234void cpu_single_step(CPUState *cpu, int enabled)
bellardc33a3462003-07-29 20:50:33 +00001235{
Andreas Färbered2803d2013-06-21 20:20:45 +02001236 if (cpu->singlestep_enabled != enabled) {
1237 cpu->singlestep_enabled = enabled;
1238 if (kvm_enabled()) {
Stefan Weil38e478e2013-07-25 20:50:21 +02001239 kvm_update_guest_debug(cpu, 0);
Andreas Färbered2803d2013-06-21 20:20:45 +02001240 } else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +01001241 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +00001242 /* XXX: only flush what is necessary */
Peter Crosthwaitebbd77c12015-06-23 19:31:15 -07001243 tb_flush(cpu);
aliguorie22a25c2009-03-12 20:12:48 +00001244 }
bellardc33a3462003-07-29 20:50:33 +00001245 }
bellardc33a3462003-07-29 20:50:33 +00001246}
1247
Andreas Färbera47dddd2013-09-03 17:38:47 +02001248void cpu_abort(CPUState *cpu, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +00001249{
1250 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +00001251 va_list ap2;
bellard75012672003-06-21 13:11:07 +00001252
1253 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +00001254 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +00001255 fprintf(stderr, "qemu: fatal: ");
1256 vfprintf(stderr, fmt, ap);
1257 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +02001258 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
Paolo Bonzini013a2942015-11-13 13:16:27 +01001259 if (qemu_log_separate()) {
Richard Henderson1ee73212016-09-22 15:17:10 -07001260 qemu_log_lock();
aliguori93fcfe32009-01-15 22:34:14 +00001261 qemu_log("qemu: fatal: ");
1262 qemu_log_vprintf(fmt, ap2);
1263 qemu_log("\n");
Andreas Färbera0762852013-06-16 07:28:50 +02001264 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +00001265 qemu_log_flush();
Richard Henderson1ee73212016-09-22 15:17:10 -07001266 qemu_log_unlock();
aliguori93fcfe32009-01-15 22:34:14 +00001267 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +00001268 }
pbrook493ae1f2007-11-23 16:53:59 +00001269 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +00001270 va_end(ap);
Pavel Dovgalyuk76159362015-09-17 19:25:07 +03001271 replay_finish();
Riku Voipiofd052bf2010-01-25 14:30:49 +02001272#if defined(CONFIG_USER_ONLY)
1273 {
1274 struct sigaction act;
1275 sigfillset(&act.sa_mask);
1276 act.sa_handler = SIG_DFL;
Peter Maydell8347c182018-05-15 19:27:00 +01001277 act.sa_flags = 0;
Riku Voipiofd052bf2010-01-25 14:30:49 +02001278 sigaction(SIGABRT, &act, NULL);
1279 }
1280#endif
bellard75012672003-06-21 13:11:07 +00001281 abort();
1282}
1283
bellard01243112004-01-04 15:48:17 +00001284#if !defined(CONFIG_USER_ONLY)
Mike Day0dc3f442013-09-05 14:41:35 -04001285/* Called from RCU critical section */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001286static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
1287{
1288 RAMBlock *block;
1289
Paolo Bonzini43771532013-09-09 17:58:40 +02001290 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001291 if (block && addr - block->offset < block->max_length) {
Paolo Bonzini68851b92015-10-22 13:51:30 +02001292 return block;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001293 }
Peter Xu99e15582017-05-12 12:17:39 +08001294 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02001295 if (addr - block->offset < block->max_length) {
Paolo Bonzini041603f2013-09-09 17:49:45 +02001296 goto found;
1297 }
1298 }
1299
1300 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1301 abort();
1302
1303found:
Paolo Bonzini43771532013-09-09 17:58:40 +02001304 /* It is safe to write mru_block outside the iothread lock. This
1305 * is what happens:
1306 *
1307 * mru_block = xxx
1308 * rcu_read_unlock()
1309 * xxx removed from list
1310 * rcu_read_lock()
1311 * read mru_block
1312 * mru_block = NULL;
1313 * call_rcu(reclaim_ramblock, xxx);
1314 * rcu_read_unlock()
1315 *
1316 * atomic_rcu_set is not needed here. The block was already published
1317 * when it was placed into the list. Here we're just making an extra
1318 * copy of the pointer.
1319 */
Paolo Bonzini041603f2013-09-09 17:49:45 +02001320 ram_list.mru_block = block;
1321 return block;
1322}
1323
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001324static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
bellard1ccde1c2004-02-06 19:46:14 +00001325{
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001326 CPUState *cpu;
Paolo Bonzini041603f2013-09-09 17:49:45 +02001327 ram_addr_t start1;
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001328 RAMBlock *block;
1329 ram_addr_t end;
1330
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04001331 assert(tcg_enabled());
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001332 end = TARGET_PAGE_ALIGN(start + length);
1333 start &= TARGET_PAGE_MASK;
bellardf23db162005-08-21 19:12:28 +00001334
Mike Day0dc3f442013-09-05 14:41:35 -04001335 rcu_read_lock();
Paolo Bonzini041603f2013-09-09 17:49:45 +02001336 block = qemu_get_ram_block(start);
1337 assert(block == qemu_get_ram_block(end - 1));
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02001338 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
Peter Crosthwaite9a135652015-09-10 22:39:41 -07001339 CPU_FOREACH(cpu) {
1340 tlb_reset_dirty(cpu, start1, length);
1341 }
Mike Day0dc3f442013-09-05 14:41:35 -04001342 rcu_read_unlock();
Juan Quintelad24981d2012-05-22 00:42:40 +02001343}
1344
1345/* Note: start and end must be within the same ram block. */
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001346bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1347 ram_addr_t length,
1348 unsigned client)
Juan Quintelad24981d2012-05-22 00:42:40 +02001349{
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001350 DirtyMemoryBlocks *blocks;
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001351 unsigned long end, page;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001352 bool dirty = false;
Juan Quintelad24981d2012-05-22 00:42:40 +02001353
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001354 if (length == 0) {
1355 return false;
1356 }
1357
1358 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1359 page = start >> TARGET_PAGE_BITS;
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00001360
1361 rcu_read_lock();
1362
1363 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1364
1365 while (page < end) {
1366 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1367 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1368 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1369
1370 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1371 offset, num);
1372 page += num;
1373 }
1374
1375 rcu_read_unlock();
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001376
1377 if (dirty && tcg_enabled()) {
Juan Quintelaa2f4d5b2013-10-10 11:49:53 +02001378 tlb_reset_dirty_range_all(start, length);
Juan Quintelad24981d2012-05-22 00:42:40 +02001379 }
Stefan Hajnoczi03eebc92014-12-02 11:23:18 +00001380
1381 return dirty;
bellard1ccde1c2004-02-06 19:46:14 +00001382}
1383
Gerd Hoffmann8deaf122017-04-21 11:16:25 +02001384DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
1385 (ram_addr_t start, ram_addr_t length, unsigned client)
1386{
1387 DirtyMemoryBlocks *blocks;
1388 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
1389 ram_addr_t first = QEMU_ALIGN_DOWN(start, align);
1390 ram_addr_t last = QEMU_ALIGN_UP(start + length, align);
1391 DirtyBitmapSnapshot *snap;
1392 unsigned long page, end, dest;
1393
1394 snap = g_malloc0(sizeof(*snap) +
1395 ((last - first) >> (TARGET_PAGE_BITS + 3)));
1396 snap->start = first;
1397 snap->end = last;
1398
1399 page = first >> TARGET_PAGE_BITS;
1400 end = last >> TARGET_PAGE_BITS;
1401 dest = 0;
1402
1403 rcu_read_lock();
1404
1405 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1406
1407 while (page < end) {
1408 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1409 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1410 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1411
1412 assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL)));
1413 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
1414 offset >>= BITS_PER_LEVEL;
1415
1416 bitmap_copy_and_clear_atomic(snap->dirty + dest,
1417 blocks->blocks[idx] + offset,
1418 num);
1419 page += num;
1420 dest += num >> BITS_PER_LEVEL;
1421 }
1422
1423 rcu_read_unlock();
1424
1425 if (tcg_enabled()) {
1426 tlb_reset_dirty_range_all(start, length);
1427 }
1428
1429 return snap;
1430}
1431
1432bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
1433 ram_addr_t start,
1434 ram_addr_t length)
1435{
1436 unsigned long page, end;
1437
1438 assert(start >= snap->start);
1439 assert(start + length <= snap->end);
1440
1441 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
1442 page = (start - snap->start) >> TARGET_PAGE_BITS;
1443
1444 while (page < end) {
1445 if (test_bit(page, snap->dirty)) {
1446 return true;
1447 }
1448 page++;
1449 }
1450 return false;
1451}
1452
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01001453/* Called from RCU critical section */
Andreas Färberbb0e6272013-09-03 13:32:01 +02001454hwaddr memory_region_section_get_iotlb(CPUState *cpu,
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001455 MemoryRegionSection *section,
1456 target_ulong vaddr,
1457 hwaddr paddr, hwaddr xlat,
1458 int prot,
1459 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +00001460{
Avi Kivitya8170e52012-10-23 12:30:10 +02001461 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +00001462 CPUWatchpoint *wp;
1463
Blue Swirlcc5bea62012-04-14 14:56:48 +00001464 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +00001465 /* Normal RAM. */
Paolo Bonzinie4e69792016-03-01 10:44:50 +01001466 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001467 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001468 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +00001469 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001470 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +00001471 }
1472 } else {
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001473 AddressSpaceDispatch *d;
1474
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001475 d = flatview_to_dispatch(section->fv);
Peter Maydell0b8e2c12015-07-20 12:27:16 +01001476 iotlb = section - d->map.sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001477 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +00001478 }
1479
1480 /* Make accesses to pages with watchpoints go via the
1481 watchpoint trap routines. */
Andreas Färberff4700b2013-08-26 18:23:18 +02001482 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01001483 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
Blue Swirle5548612012-04-21 13:08:33 +00001484 /* Avoid trapping reads of pages with a write breakpoint. */
1485 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001486 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +00001487 *address |= TLB_MMIO;
1488 break;
1489 }
1490 }
1491 }
1492
1493 return iotlb;
1494}
bellard9fa3e852004-01-04 18:06:42 +00001495#endif /* defined(CONFIG_USER_ONLY) */
1496
pbrooke2eef172008-06-08 01:09:01 +00001497#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +00001498
Anthony Liguoric227f092009-10-01 16:12:16 -05001499static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001500 uint16_t section);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001501static subpage_t *subpage_init(FlatView *fv, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +02001502
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001503static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
Igor Mammedova2b257d2014-10-31 16:38:37 +00001504 qemu_anon_ram_alloc;
Markus Armbruster91138032013-07-31 15:11:08 +02001505
1506/*
1507 * Set a custom physical guest memory alloator.
1508 * Accelerators with unusual needs may need this. Hopefully, we can
1509 * get rid of it eventually.
1510 */
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02001511void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared))
Markus Armbruster91138032013-07-31 15:11:08 +02001512{
1513 phys_mem_alloc = alloc;
1514}
1515
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001516static uint16_t phys_section_add(PhysPageMap *map,
1517 MemoryRegionSection *section)
Avi Kivity5312bd82012-02-12 18:32:55 +02001518{
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001519 /* The physical section number is ORed with a page-aligned
1520 * pointer to produce the iotlb entries. Thus it should
1521 * never overflow into the page-aligned value.
1522 */
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001523 assert(map->sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +02001524
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001525 if (map->sections_nb == map->sections_nb_alloc) {
1526 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1527 map->sections = g_renew(MemoryRegionSection, map->sections,
1528 map->sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +02001529 }
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001530 map->sections[map->sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001531 memory_region_ref(section->mr);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001532 return map->sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +02001533}
1534
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001535static void phys_section_destroy(MemoryRegion *mr)
1536{
Don Slutz55b4e802015-11-30 17:11:04 -05001537 bool have_sub_page = mr->subpage;
1538
Paolo Bonzinidfde4e62013-05-06 10:46:11 +02001539 memory_region_unref(mr);
1540
Don Slutz55b4e802015-11-30 17:11:04 -05001541 if (have_sub_page) {
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001542 subpage_t *subpage = container_of(mr, subpage_t, iomem);
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07001543 object_unref(OBJECT(&subpage->iomem));
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001544 g_free(subpage);
1545 }
1546}
1547
Paolo Bonzini60926662013-05-29 12:30:26 +02001548static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +02001549{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001550 while (map->sections_nb > 0) {
1551 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +02001552 phys_section_destroy(section->mr);
1553 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001554 g_free(map->sections);
1555 g_free(map->nodes);
Avi Kivity5312bd82012-02-12 18:32:55 +02001556}
1557
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001558static void register_subpage(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001559{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001560 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001561 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +02001562 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +02001563 & TARGET_PAGE_MASK;
Peter Xu003a0cf2017-05-15 16:50:57 +08001564 MemoryRegionSection *existing = phys_page_find(d, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001565 MemoryRegionSection subsection = {
1566 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001567 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +02001568 };
Avi Kivitya8170e52012-10-23 12:30:10 +02001569 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001570
Avi Kivityf3705d52012-03-08 16:16:34 +02001571 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001572
Avi Kivityf3705d52012-03-08 16:16:34 +02001573 if (!(existing->mr->subpage)) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10001574 subpage = subpage_init(fv, base);
1575 subsection.fv = fv;
Avi Kivity0f0cb162012-02-13 17:14:32 +02001576 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +02001577 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001578 phys_section_add(&d->map, &subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001579 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +02001580 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001581 }
1582 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001583 end = start + int128_get64(section->size) - 1;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001584 subpage_register(subpage, start, end,
1585 phys_section_add(&d->map, section));
Avi Kivity0f0cb162012-02-13 17:14:32 +02001586}
1587
1588
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001589static void register_multipage(FlatView *fv,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001590 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +00001591{
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001592 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
Avi Kivitya8170e52012-10-23 12:30:10 +02001593 hwaddr start_addr = section->offset_within_address_space;
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02001594 uint16_t section_index = phys_section_add(&d->map, section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001595 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1596 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +02001597
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001598 assert(num_pages);
1599 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +00001600}
1601
Wei Yang494d1992019-03-11 13:42:52 +08001602/*
1603 * The range in *section* may look like this:
1604 *
1605 * |s|PPPPPPP|s|
1606 *
1607 * where s stands for subpage and P for page.
1608 */
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10001609void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +02001610{
Wei Yang494d1992019-03-11 13:42:52 +08001611 MemoryRegionSection remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001612 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001613
Wei Yang494d1992019-03-11 13:42:52 +08001614 /* register first subpage */
1615 if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
1616 uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space)
1617 - remain.offset_within_address_space;
Paolo Bonzini733d5ef2013-05-27 10:47:10 +02001618
Wei Yang494d1992019-03-11 13:42:52 +08001619 MemoryRegionSection now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001620 now.size = int128_min(int128_make64(left), now.size);
Alexey Kardashevskiy99503222017-09-21 18:50:59 +10001621 register_subpage(fv, &now);
Wei Yang494d1992019-03-11 13:42:52 +08001622 if (int128_eq(remain.size, now.size)) {
1623 return;
1624 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001625 remain.size = int128_sub(remain.size, now.size);
1626 remain.offset_within_address_space += int128_get64(now.size);
1627 remain.offset_within_region += int128_get64(now.size);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001628 }
Wei Yang494d1992019-03-11 13:42:52 +08001629
1630 /* register whole pages */
1631 if (int128_ge(remain.size, page_size)) {
1632 MemoryRegionSection now = remain;
1633 now.size = int128_and(now.size, int128_neg(page_size));
1634 register_multipage(fv, &now);
1635 if (int128_eq(remain.size, now.size)) {
1636 return;
1637 }
1638 remain.size = int128_sub(remain.size, now.size);
1639 remain.offset_within_address_space += int128_get64(now.size);
1640 remain.offset_within_region += int128_get64(now.size);
1641 }
1642
1643 /* register last subpage */
1644 register_subpage(fv, &remain);
Avi Kivity0f0cb162012-02-13 17:14:32 +02001645}
1646
Sheng Yang62a27442010-01-26 19:21:16 +08001647void qemu_flush_coalesced_mmio_buffer(void)
1648{
1649 if (kvm_enabled())
1650 kvm_flush_coalesced_mmio_buffer();
1651}
1652
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001653void qemu_mutex_lock_ramlist(void)
1654{
1655 qemu_mutex_lock(&ram_list.mutex);
1656}
1657
1658void qemu_mutex_unlock_ramlist(void)
1659{
1660 qemu_mutex_unlock(&ram_list.mutex);
1661}
1662
Peter Xube9b23c2017-05-12 12:17:41 +08001663void ram_block_dump(Monitor *mon)
1664{
1665 RAMBlock *block;
1666 char *psize;
1667
1668 rcu_read_lock();
1669 monitor_printf(mon, "%24s %8s %18s %18s %18s\n",
1670 "Block Name", "PSize", "Offset", "Used", "Total");
1671 RAMBLOCK_FOREACH(block) {
1672 psize = size_to_str(block->page_size);
1673 monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1674 " 0x%016" PRIx64 "\n", block->idstr, psize,
1675 (uint64_t)block->offset,
1676 (uint64_t)block->used_length,
1677 (uint64_t)block->max_length);
1678 g_free(psize);
1679 }
1680 rcu_read_unlock();
1681}
1682
Markus Armbrustere1e84ba2013-07-31 15:11:10 +02001683#ifdef __linux__
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001684/*
1685 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1686 * may or may not name the same files / on the same filesystem now as
1687 * when we actually open and map them. Iterate over the file
1688 * descriptors instead, and use qemu_fd_getpagesize().
1689 */
1690static int find_max_supported_pagesize(Object *obj, void *opaque)
1691{
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001692 long *hpsize_min = opaque;
1693
1694 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
David Gibson2b108082018-04-03 15:05:45 +10001695 long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj));
1696
David Gibson0de6e2a2018-04-03 14:55:11 +10001697 if (hpsize < *hpsize_min) {
1698 *hpsize_min = hpsize;
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001699 }
1700 }
1701
1702 return 0;
1703}
1704
1705long qemu_getrampagesize(void)
1706{
1707 long hpsize = LONG_MAX;
1708 long mainrampagesize;
1709 Object *memdev_root;
1710
David Gibson0de6e2a2018-04-03 14:55:11 +10001711 mainrampagesize = qemu_mempath_getpagesize(mem_path);
Alexey Kardashevskiy9c607662017-03-02 13:36:11 +11001712
1713 /* it's possible we have memory-backend objects with
1714 * hugepage-backed RAM. these may get mapped into system
1715 * address space via -numa parameters or memory hotplug
1716 * hooks. we want to take these into account, but we
1717 * also want to make sure these supported hugepage
1718 * sizes are applicable across the entire range of memory
1719 * we may boot from, so we take the min across all
1720 * backends, and assume normal pages in cases where a
1721 * backend isn't backed by hugepages.
1722 */
1723 memdev_root = object_resolve_path("/objects", NULL);
1724 if (memdev_root) {
1725 object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize);
1726 }
1727 if (hpsize == LONG_MAX) {
1728 /* No additional memory regions found ==> Report main RAM page size */
1729 return mainrampagesize;
1730 }
1731
1732 /* If NUMA is disabled or the NUMA nodes are not backed with a
1733 * memory-backend, then there is at least one node using "normal" RAM,
1734 * so if its page size is smaller we have got to report that size instead.
1735 */
1736 if (hpsize > mainrampagesize &&
1737 (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) {
1738 static bool warned;
1739 if (!warned) {
1740 error_report("Huge page support disabled (n/a for main memory).");
1741 warned = true;
1742 }
1743 return mainrampagesize;
1744 }
1745
1746 return hpsize;
1747}
1748#else
1749long qemu_getrampagesize(void)
1750{
1751 return getpagesize();
1752}
1753#endif
1754
Hikaru Nishidad5dbde42018-09-24 21:32:05 +09001755#ifdef CONFIG_POSIX
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001756static int64_t get_file_size(int fd)
1757{
1758 int64_t size = lseek(fd, 0, SEEK_END);
1759 if (size < 0) {
1760 return -errno;
1761 }
1762 return size;
1763}
1764
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001765static int file_ram_open(const char *path,
1766 const char *region_name,
1767 bool *created,
1768 Error **errp)
Marcelo Tosattic9027602010-03-01 20:25:08 -03001769{
1770 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -05001771 char *sanitized_name;
1772 char *c;
Paolo Bonzini5c3ece72016-03-17 15:53:13 +01001773 int fd = -1;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001774
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001775 *created = false;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001776 for (;;) {
1777 fd = open(path, O_RDWR);
1778 if (fd >= 0) {
1779 /* @path names an existing file, use it */
1780 break;
1781 }
1782 if (errno == ENOENT) {
1783 /* @path names a file that doesn't exist, create it */
1784 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1785 if (fd >= 0) {
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001786 *created = true;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001787 break;
1788 }
1789 } else if (errno == EISDIR) {
1790 /* @path names a directory, create a file there */
1791 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001792 sanitized_name = g_strdup(region_name);
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001793 for (c = sanitized_name; *c != '\0'; c++) {
1794 if (*c == '/') {
1795 *c = '_';
1796 }
1797 }
1798
1799 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1800 sanitized_name);
1801 g_free(sanitized_name);
1802
1803 fd = mkstemp(filename);
1804 if (fd >= 0) {
1805 unlink(filename);
1806 g_free(filename);
1807 break;
1808 }
1809 g_free(filename);
1810 }
1811 if (errno != EEXIST && errno != EINTR) {
1812 error_setg_errno(errp, errno,
1813 "can't open backing store %s for guest RAM",
1814 path);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001815 return -1;
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001816 }
1817 /*
1818 * Try again on EINTR and EEXIST. The latter happens when
1819 * something else creates the file between our two open().
1820 */
1821 }
1822
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001823 return fd;
1824}
1825
1826static void *file_ram_alloc(RAMBlock *block,
1827 ram_addr_t memory,
1828 int fd,
1829 bool truncate,
1830 Error **errp)
1831{
1832 void *area;
1833
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001834 block->page_size = qemu_fd_getpagesize(fd);
Haozhong Zhang98376842017-12-11 15:28:04 +08001835 if (block->mr->align % block->page_size) {
1836 error_setg(errp, "alignment 0x%" PRIx64
1837 " must be multiples of page size 0x%zx",
1838 block->mr->align, block->page_size);
1839 return NULL;
David Hildenbrand61362b72018-06-07 17:47:05 +02001840 } else if (block->mr->align && !is_power_of_2(block->mr->align)) {
1841 error_setg(errp, "alignment 0x%" PRIx64
1842 " must be a power of two", block->mr->align);
1843 return NULL;
Haozhong Zhang98376842017-12-11 15:28:04 +08001844 }
1845 block->mr->align = MAX(block->page_size, block->mr->align);
Haozhong Zhang83606682016-10-24 20:49:37 +08001846#if defined(__s390x__)
1847 if (kvm_enabled()) {
1848 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1849 }
1850#endif
Marcelo Tosattic9027602010-03-01 20:25:08 -03001851
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001852 if (memory < block->page_size) {
Hu Tao557529d2014-09-09 13:28:00 +08001853 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001854 "or larger than page size 0x%zx",
1855 memory, block->page_size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001856 return NULL;
Haozhong Zhang1775f112016-11-02 09:05:51 +08001857 }
1858
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01001859 memory = ROUND_UP(memory, block->page_size);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001860
1861 /*
1862 * ftruncate is not supported by hugetlbfs in older
1863 * hosts, so don't bother bailing out on errors.
1864 * If anything goes wrong with it under other filesystems,
1865 * mmap will fail.
Haozhong Zhangd6af99c2016-10-27 12:22:58 +08001866 *
1867 * Do not truncate the non-empty backend file to avoid corrupting
1868 * the existing data in the file. Disabling shrinking is not
1869 * enough. For example, the current vNVDIMM implementation stores
1870 * the guest NVDIMM labels at the end of the backend file. If the
1871 * backend file is later extended, QEMU will not be able to find
1872 * those labels. Therefore, extending the non-empty backend file
1873 * is disabled as well.
Marcelo Tosattic9027602010-03-01 20:25:08 -03001874 */
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001875 if (truncate && ftruncate(fd, memory)) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +09001876 perror("ftruncate");
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001877 }
Marcelo Tosattic9027602010-03-01 20:25:08 -03001878
Dominik Dingeld2f39ad2016-04-25 13:55:38 +02001879 area = qemu_ram_mmap(fd, memory, block->mr->align,
1880 block->flags & RAM_SHARED);
Marcelo Tosattic9027602010-03-01 20:25:08 -03001881 if (area == MAP_FAILED) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08001882 error_setg_errno(errp, errno,
Markus Armbrusterfd97fd42016-03-07 20:25:13 +01001883 "unable to map backing store for guest RAM");
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001884 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001885 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001886
1887 if (mem_prealloc) {
Jitendra Kolhe1e356fc2017-02-24 09:01:43 +05301888 os_mem_prealloc(fd, area, memory, smp_cpus, errp);
Igor Mammedov056b68a2016-07-20 11:54:03 +02001889 if (errp && *errp) {
Murilo Opsfelder Araujo53adb9d2019-01-30 21:36:05 -02001890 qemu_ram_munmap(fd, area, memory);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04001891 return NULL;
Igor Mammedov056b68a2016-07-20 11:54:03 +02001892 }
Marcelo Tosattief36fa12013-10-28 18:51:46 -02001893 }
1894
Alex Williamson04b16652010-07-02 11:13:17 -06001895 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -03001896 return area;
1897}
1898#endif
1899
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001900/* Allocate space within the ram_addr_t space that governs the
1901 * dirty bitmaps.
1902 * Called with the ramlist lock held.
1903 */
Alex Williamsond17b5282010-06-25 11:08:38 -06001904static ram_addr_t find_ram_offset(ram_addr_t size)
1905{
Alex Williamson04b16652010-07-02 11:13:17 -06001906 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -06001907 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001908
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +01001909 assert(size != 0); /* it would hand out same offset multiple times */
1910
Mike Day0dc3f442013-09-05 14:41:35 -04001911 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
Alex Williamson04b16652010-07-02 11:13:17 -06001912 return 0;
Mike Day0d53d9f2015-01-21 13:45:24 +01001913 }
Alex Williamson04b16652010-07-02 11:13:17 -06001914
Peter Xu99e15582017-05-12 12:17:39 +08001915 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001916 ram_addr_t candidate, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001917
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001918 /* Align blocks to start on a 'long' in the bitmap
1919 * which makes the bitmap sync'ing take the fast path.
1920 */
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001921 candidate = block->offset + block->max_length;
Dr. David Alan Gilbert801110a2018-01-05 17:01:38 +00001922 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
Alex Williamson04b16652010-07-02 11:13:17 -06001923
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001924 /* Search for the closest following block
1925 * and find the gap.
1926 */
Peter Xu99e15582017-05-12 12:17:39 +08001927 RAMBLOCK_FOREACH(next_block) {
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001928 if (next_block->offset >= candidate) {
Alex Williamson04b16652010-07-02 11:13:17 -06001929 next = MIN(next, next_block->offset);
1930 }
1931 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001932
1933 /* If it fits remember our place and remember the size
1934 * of gap, but keep going so that we might find a smaller
1935 * gap to fill so avoiding fragmentation.
1936 */
1937 if (next - candidate >= size && next - candidate < mingap) {
1938 offset = candidate;
1939 mingap = next - candidate;
Alex Williamson04b16652010-07-02 11:13:17 -06001940 }
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001941
1942 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
Alex Williamson04b16652010-07-02 11:13:17 -06001943 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001944
1945 if (offset == RAM_ADDR_MAX) {
1946 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1947 (uint64_t)size);
1948 abort();
1949 }
1950
Dr. David Alan Gilbert154cc9e2018-01-05 17:01:37 +00001951 trace_find_ram_offset(size, offset);
1952
Alex Williamson04b16652010-07-02 11:13:17 -06001953 return offset;
1954}
1955
David Hildenbrandc1361802018-06-20 22:27:36 +02001956static unsigned long last_ram_page(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001957{
Alex Williamsond17b5282010-06-25 11:08:38 -06001958 RAMBlock *block;
1959 ram_addr_t last = 0;
1960
Mike Day0dc3f442013-09-05 14:41:35 -04001961 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08001962 RAMBLOCK_FOREACH(block) {
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02001963 last = MAX(last, block->offset + block->max_length);
Mike Day0d53d9f2015-01-21 13:45:24 +01001964 }
Mike Day0dc3f442013-09-05 14:41:35 -04001965 rcu_read_unlock();
Juan Quintelab8c48992017-03-21 17:44:30 +01001966 return last >> TARGET_PAGE_BITS;
Alex Williamsond17b5282010-06-25 11:08:38 -06001967}
1968
Jason Baronddb97f12012-08-02 15:44:16 -04001969static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1970{
1971 int ret;
Jason Baronddb97f12012-08-02 15:44:16 -04001972
1973 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
Marcel Apfelbaum47c8ca52015-02-04 17:43:54 +02001974 if (!machine_dump_guest_core(current_machine)) {
Jason Baronddb97f12012-08-02 15:44:16 -04001975 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1976 if (ret) {
1977 perror("qemu_madvise");
1978 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1979 "but dump_guest_core=off specified\n");
1980 }
1981 }
1982}
1983
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00001984const char *qemu_ram_get_idstr(RAMBlock *rb)
1985{
1986 return rb->idstr;
1987}
1988
Yury Kotov754cb9c2019-02-15 20:45:44 +03001989void *qemu_ram_get_host_addr(RAMBlock *rb)
1990{
1991 return rb->host;
1992}
1993
1994ram_addr_t qemu_ram_get_offset(RAMBlock *rb)
1995{
1996 return rb->offset;
1997}
1998
1999ram_addr_t qemu_ram_get_used_length(RAMBlock *rb)
2000{
2001 return rb->used_length;
2002}
2003
Dr. David Alan Gilbert463a4ac2017-03-07 18:36:36 +00002004bool qemu_ram_is_shared(RAMBlock *rb)
2005{
2006 return rb->flags & RAM_SHARED;
2007}
2008
Dr. David Alan Gilbert2ce16642018-03-12 17:20:58 +00002009/* Note: Only set at the start of postcopy */
2010bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
2011{
2012 return rb->flags & RAM_UF_ZEROPAGE;
2013}
2014
2015void qemu_ram_set_uf_zeroable(RAMBlock *rb)
2016{
2017 rb->flags |= RAM_UF_ZEROPAGE;
2018}
2019
CĂ©dric Le Goaterb895de52018-05-14 08:57:00 +02002020bool qemu_ram_is_migratable(RAMBlock *rb)
2021{
2022 return rb->flags & RAM_MIGRATABLE;
2023}
2024
2025void qemu_ram_set_migratable(RAMBlock *rb)
2026{
2027 rb->flags |= RAM_MIGRATABLE;
2028}
2029
2030void qemu_ram_unset_migratable(RAMBlock *rb)
2031{
2032 rb->flags &= ~RAM_MIGRATABLE;
2033}
2034
Mike Dayae3a7042013-09-05 14:41:35 -04002035/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08002036void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
Hu Tao20cfe882014-04-02 15:13:26 +08002037{
Gongleifa53a0e2016-05-10 10:04:59 +08002038 RAMBlock *block;
Hu Tao20cfe882014-04-02 15:13:26 +08002039
Avi Kivityc5705a72011-12-20 15:59:12 +02002040 assert(new_block);
2041 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002042
Anthony Liguori09e5ab62012-02-03 12:28:43 -06002043 if (dev) {
2044 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002045 if (id) {
2046 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05002047 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002048 }
2049 }
2050 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
2051
Gongleiab0a9952016-05-10 10:05:00 +08002052 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08002053 RAMBLOCK_FOREACH(block) {
Gongleifa53a0e2016-05-10 10:04:59 +08002054 if (block != new_block &&
2055 !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06002056 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
2057 new_block->idstr);
2058 abort();
2059 }
2060 }
Mike Day0dc3f442013-09-05 14:41:35 -04002061 rcu_read_unlock();
Avi Kivityc5705a72011-12-20 15:59:12 +02002062}
2063
Mike Dayae3a7042013-09-05 14:41:35 -04002064/* Called with iothread lock held. */
Gongleifa53a0e2016-05-10 10:04:59 +08002065void qemu_ram_unset_idstr(RAMBlock *block)
Hu Tao20cfe882014-04-02 15:13:26 +08002066{
Mike Dayae3a7042013-09-05 14:41:35 -04002067 /* FIXME: arch_init.c assumes that this is not called throughout
2068 * migration. Ignore the problem since hot-unplug during migration
2069 * does not work anyway.
2070 */
Hu Tao20cfe882014-04-02 15:13:26 +08002071 if (block) {
2072 memset(block->idstr, 0, sizeof(block->idstr));
2073 }
2074}
2075
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002076size_t qemu_ram_pagesize(RAMBlock *rb)
2077{
2078 return rb->page_size;
2079}
2080
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002081/* Returns the largest size of page in use */
2082size_t qemu_ram_pagesize_largest(void)
2083{
2084 RAMBlock *block;
2085 size_t largest = 0;
2086
Peter Xu99e15582017-05-12 12:17:39 +08002087 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilbert67f11b52017-02-24 18:28:34 +00002088 largest = MAX(largest, qemu_ram_pagesize(block));
2089 }
2090
2091 return largest;
2092}
2093
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002094static int memory_try_enable_merging(void *addr, size_t len)
2095{
Marcel Apfelbaum75cc7f02015-02-04 17:43:55 +02002096 if (!machine_mem_merge(current_machine)) {
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002097 /* disabled by the user */
2098 return 0;
2099 }
2100
2101 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
2102}
2103
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002104/* Only legal before guest might have detected the memory size: e.g. on
2105 * incoming migration, or right after reset.
2106 *
2107 * As memory core doesn't know how is memory accessed, it is up to
2108 * resize callback to update device state and/or add assertions to detect
2109 * misuse, if necessary.
2110 */
Gongleifa53a0e2016-05-10 10:04:59 +08002111int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002112{
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002113 assert(block);
2114
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002115 newsize = HOST_PAGE_ALIGN(newsize);
Michael S. Tsirkin129ddaf2015-02-17 10:15:30 +01002116
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002117 if (block->used_length == newsize) {
2118 return 0;
2119 }
2120
2121 if (!(block->flags & RAM_RESIZEABLE)) {
2122 error_setg_errno(errp, EINVAL,
2123 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2124 " in != 0x" RAM_ADDR_FMT, block->idstr,
2125 newsize, block->used_length);
2126 return -EINVAL;
2127 }
2128
2129 if (block->max_length < newsize) {
2130 error_setg_errno(errp, EINVAL,
2131 "Length too large: %s: 0x" RAM_ADDR_FMT
2132 " > 0x" RAM_ADDR_FMT, block->idstr,
2133 newsize, block->max_length);
2134 return -EINVAL;
2135 }
2136
2137 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
2138 block->used_length = newsize;
Paolo Bonzini58d27072015-03-23 11:56:01 +01002139 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
2140 DIRTY_CLIENTS_ALL);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002141 memory_region_set_size(block->mr, newsize);
2142 if (block->resized) {
2143 block->resized(block->idstr, newsize, block->host);
2144 }
2145 return 0;
2146}
2147
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002148/* Called with ram_list.mutex held */
2149static void dirty_memory_extend(ram_addr_t old_ram_size,
2150 ram_addr_t new_ram_size)
2151{
2152 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
2153 DIRTY_MEMORY_BLOCK_SIZE);
2154 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
2155 DIRTY_MEMORY_BLOCK_SIZE);
2156 int i;
2157
2158 /* Only need to extend if block count increased */
2159 if (new_num_blocks <= old_num_blocks) {
2160 return;
2161 }
2162
2163 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
2164 DirtyMemoryBlocks *old_blocks;
2165 DirtyMemoryBlocks *new_blocks;
2166 int j;
2167
2168 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
2169 new_blocks = g_malloc(sizeof(*new_blocks) +
2170 sizeof(new_blocks->blocks[0]) * new_num_blocks);
2171
2172 if (old_num_blocks) {
2173 memcpy(new_blocks->blocks, old_blocks->blocks,
2174 old_num_blocks * sizeof(old_blocks->blocks[0]));
2175 }
2176
2177 for (j = old_num_blocks; j < new_num_blocks; j++) {
2178 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
2179 }
2180
2181 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
2182
2183 if (old_blocks) {
2184 g_free_rcu(old_blocks, rcu);
2185 }
2186 }
2187}
2188
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002189static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared)
Avi Kivityc5705a72011-12-20 15:59:12 +02002190{
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002191 RAMBlock *block;
Mike Day0d53d9f2015-01-21 13:45:24 +01002192 RAMBlock *last_block = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002193 ram_addr_t old_ram_size, new_ram_size;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002194 Error *err = NULL;
Juan Quintela2152f5c2013-10-08 13:52:02 +02002195
Juan Quintelab8c48992017-03-21 17:44:30 +01002196 old_ram_size = last_ram_page();
Avi Kivityc5705a72011-12-20 15:59:12 +02002197
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002198 qemu_mutex_lock_ramlist();
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002199 new_block->offset = find_ram_offset(new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002200
2201 if (!new_block->host) {
2202 if (xen_enabled()) {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002203 xen_ram_alloc(new_block->offset, new_block->max_length,
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002204 new_block->mr, &err);
2205 if (err) {
2206 error_propagate(errp, err);
2207 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002208 return;
Markus Armbruster37aa7a02016-01-14 16:09:39 +01002209 }
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002210 } else {
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002211 new_block->host = phys_mem_alloc(new_block->max_length,
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002212 &new_block->mr->align, shared);
Markus Armbruster39228252013-07-31 15:11:11 +02002213 if (!new_block->host) {
Hu Taoef701d72014-09-09 13:27:54 +08002214 error_setg_errno(errp, errno,
2215 "cannot set up guest memory '%s'",
2216 memory_region_name(new_block->mr));
2217 qemu_mutex_unlock_ramlist();
Paolo Bonzini39c350e2016-03-09 18:14:01 +01002218 return;
Markus Armbruster39228252013-07-31 15:11:11 +02002219 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002220 memory_try_enable_merging(new_block->host, new_block->max_length);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09002221 }
2222 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002223
Li Zhijiandd631692015-07-02 20:18:06 +08002224 new_ram_size = MAX(old_ram_size,
2225 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
2226 if (new_ram_size > old_ram_size) {
Stefan Hajnoczi5b82b702016-01-25 13:33:20 +00002227 dirty_memory_extend(old_ram_size, new_ram_size);
Li Zhijiandd631692015-07-02 20:18:06 +08002228 }
Mike Day0d53d9f2015-01-21 13:45:24 +01002229 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2230 * QLIST (which has an RCU-friendly variant) does not have insertion at
2231 * tail, so save the last element in last_block.
2232 */
Peter Xu99e15582017-05-12 12:17:39 +08002233 RAMBLOCK_FOREACH(block) {
Mike Day0d53d9f2015-01-21 13:45:24 +01002234 last_block = block;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002235 if (block->max_length < new_block->max_length) {
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002236 break;
2237 }
2238 }
2239 if (block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002240 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002241 } else if (last_block) {
Mike Day0dc3f442013-09-05 14:41:35 -04002242 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
Mike Day0d53d9f2015-01-21 13:45:24 +01002243 } else { /* list is empty */
Mike Day0dc3f442013-09-05 14:41:35 -04002244 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
Paolo Bonziniabb26d62012-11-14 16:00:51 +01002245 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002246 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06002247
Mike Day0dc3f442013-09-05 14:41:35 -04002248 /* Write list before version */
2249 smp_wmb();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002250 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002251 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07002252
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002253 cpu_physical_memory_set_dirty_range(new_block->offset,
Paolo Bonzini58d27072015-03-23 11:56:01 +01002254 new_block->used_length,
2255 DIRTY_CLIENTS_ALL);
Cam Macdonell84b89d72010-07-26 18:10:57 -06002256
Paolo Bonzinia904c912015-01-21 16:18:35 +01002257 if (new_block->host) {
2258 qemu_ram_setup_dump(new_block->host, new_block->max_length);
2259 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
Cao jinc2cd6272016-09-12 14:34:56 +08002260 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
Paolo Bonzinia904c912015-01-21 16:18:35 +01002261 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
Paolo Bonzini0987d732016-12-21 00:31:36 +08002262 ram_block_notify_add(new_block->host, new_block->max_length);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002263 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06002264}
2265
Hikaru Nishidad5dbde42018-09-24 21:32:05 +09002266#ifdef CONFIG_POSIX
Marc-André Lureau38b33622017-06-02 18:12:23 +04002267RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
Junyan Hecbfc0172018-07-18 15:47:58 +08002268 uint32_t ram_flags, int fd,
Marc-André Lureau38b33622017-06-02 18:12:23 +04002269 Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002270{
2271 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002272 Error *local_err = NULL;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002273 int64_t file_size;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002274
Junyan Hea4de8552018-07-18 15:48:00 +08002275 /* Just support these ram flags by now. */
2276 assert((ram_flags & ~(RAM_SHARED | RAM_PMEM)) == 0);
2277
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002278 if (xen_enabled()) {
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002279 error_setg(errp, "-mem-path not supported with Xen");
Fam Zheng528f46a2016-03-01 14:18:18 +08002280 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002281 }
2282
Marc-André Lureaue45e7ae2017-06-02 18:12:21 +04002283 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2284 error_setg(errp,
2285 "host lacks kvm mmu notifiers, -mem-path unsupported");
2286 return NULL;
2287 }
2288
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002289 if (phys_mem_alloc != qemu_anon_ram_alloc) {
2290 /*
2291 * file_ram_alloc() needs to allocate just like
2292 * phys_mem_alloc, but we haven't bothered to provide
2293 * a hook there.
2294 */
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002295 error_setg(errp,
2296 "-mem-path not supported with this accelerator");
Fam Zheng528f46a2016-03-01 14:18:18 +08002297 return NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002298 }
2299
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002300 size = HOST_PAGE_ALIGN(size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002301 file_size = get_file_size(fd);
2302 if (file_size > 0 && file_size < size) {
2303 error_setg(errp, "backing store %s size 0x%" PRIx64
2304 " does not match 'size' option 0x" RAM_ADDR_FMT,
2305 mem_path, file_size, size);
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002306 return NULL;
2307 }
2308
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002309 new_block = g_malloc0(sizeof(*new_block));
2310 new_block->mr = mr;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002311 new_block->used_length = size;
2312 new_block->max_length = size;
Junyan Hecbfc0172018-07-18 15:47:58 +08002313 new_block->flags = ram_flags;
Marc-André Lureau8d37b032017-06-02 18:12:22 +04002314 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp);
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002315 if (!new_block->host) {
2316 g_free(new_block);
Fam Zheng528f46a2016-03-01 14:18:18 +08002317 return NULL;
Paolo Bonzini7f56e742014-05-14 17:43:20 +08002318 }
2319
Junyan Hecbfc0172018-07-18 15:47:58 +08002320 ram_block_add(new_block, &local_err, ram_flags & RAM_SHARED);
Hu Taoef701d72014-09-09 13:27:54 +08002321 if (local_err) {
2322 g_free(new_block);
2323 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002324 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002325 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002326 return new_block;
Marc-André Lureau38b33622017-06-02 18:12:23 +04002327
2328}
2329
2330
2331RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
Junyan Hecbfc0172018-07-18 15:47:58 +08002332 uint32_t ram_flags, const char *mem_path,
Marc-André Lureau38b33622017-06-02 18:12:23 +04002333 Error **errp)
2334{
2335 int fd;
2336 bool created;
2337 RAMBlock *block;
2338
2339 fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp);
2340 if (fd < 0) {
2341 return NULL;
2342 }
2343
Junyan Hecbfc0172018-07-18 15:47:58 +08002344 block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, errp);
Marc-André Lureau38b33622017-06-02 18:12:23 +04002345 if (!block) {
2346 if (created) {
2347 unlink(mem_path);
2348 }
2349 close(fd);
2350 return NULL;
2351 }
2352
2353 return block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002354}
Paolo Bonzini0b183fc2014-05-14 17:43:19 +08002355#endif
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002356
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002357static
Fam Zheng528f46a2016-03-01 14:18:18 +08002358RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2359 void (*resized)(const char*,
2360 uint64_t length,
2361 void *host),
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002362 void *host, bool resizeable, bool share,
Fam Zheng528f46a2016-03-01 14:18:18 +08002363 MemoryRegion *mr, Error **errp)
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002364{
2365 RAMBlock *new_block;
Hu Taoef701d72014-09-09 13:27:54 +08002366 Error *local_err = NULL;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002367
Dr. David Alan Gilbert4ed023c2015-11-05 18:11:16 +00002368 size = HOST_PAGE_ALIGN(size);
2369 max_size = HOST_PAGE_ALIGN(max_size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002370 new_block = g_malloc0(sizeof(*new_block));
2371 new_block->mr = mr;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002372 new_block->resized = resized;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002373 new_block->used_length = size;
2374 new_block->max_length = max_size;
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002375 assert(max_size >= size);
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002376 new_block->fd = -1;
Dr. David Alan Gilbert863e9622016-09-29 20:09:37 +01002377 new_block->page_size = getpagesize();
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002378 new_block->host = host;
2379 if (host) {
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002380 new_block->flags |= RAM_PREALLOC;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002381 }
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002382 if (resizeable) {
2383 new_block->flags |= RAM_RESIZEABLE;
2384 }
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002385 ram_block_add(new_block, &local_err, share);
Hu Taoef701d72014-09-09 13:27:54 +08002386 if (local_err) {
2387 g_free(new_block);
2388 error_propagate(errp, local_err);
Fam Zheng528f46a2016-03-01 14:18:18 +08002389 return NULL;
Hu Taoef701d72014-09-09 13:27:54 +08002390 }
Fam Zheng528f46a2016-03-01 14:18:18 +08002391 return new_block;
Paolo Bonzinie1c57ab2014-05-14 17:43:18 +08002392}
2393
Fam Zheng528f46a2016-03-01 14:18:18 +08002394RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002395 MemoryRegion *mr, Error **errp)
2396{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002397 return qemu_ram_alloc_internal(size, size, NULL, host, false,
2398 false, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002399}
2400
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002401RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share,
2402 MemoryRegion *mr, Error **errp)
pbrook94a6b542009-04-11 17:15:54 +00002403{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002404 return qemu_ram_alloc_internal(size, size, NULL, NULL, false,
2405 share, mr, errp);
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002406}
2407
Fam Zheng528f46a2016-03-01 14:18:18 +08002408RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
Michael S. Tsirkin62be4e32014-11-12 14:27:41 +02002409 void (*resized)(const char*,
2410 uint64_t length,
2411 void *host),
2412 MemoryRegion *mr, Error **errp)
2413{
Marcel Apfelbaum06329cc2017-12-13 16:37:37 +02002414 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true,
2415 false, mr, errp);
pbrook94a6b542009-04-11 17:15:54 +00002416}
bellarde9a1ab12007-02-08 23:08:38 +00002417
Paolo Bonzini43771532013-09-09 17:58:40 +02002418static void reclaim_ramblock(RAMBlock *block)
2419{
2420 if (block->flags & RAM_PREALLOC) {
2421 ;
2422 } else if (xen_enabled()) {
2423 xen_invalidate_map_cache_entry(block->host);
2424#ifndef _WIN32
2425 } else if (block->fd >= 0) {
Murilo Opsfelder Araujo53adb9d2019-01-30 21:36:05 -02002426 qemu_ram_munmap(block->fd, block->host, block->max_length);
Paolo Bonzini43771532013-09-09 17:58:40 +02002427 close(block->fd);
2428#endif
2429 } else {
2430 qemu_anon_ram_free(block->host, block->max_length);
2431 }
2432 g_free(block);
2433}
2434
Fam Zhengf1060c52016-03-01 14:18:22 +08002435void qemu_ram_free(RAMBlock *block)
bellarde9a1ab12007-02-08 23:08:38 +00002436{
Marc-André Lureau85bc2a12016-03-29 13:20:51 +02002437 if (!block) {
2438 return;
2439 }
2440
Paolo Bonzini0987d732016-12-21 00:31:36 +08002441 if (block->host) {
2442 ram_block_notify_remove(block->host, block->max_length);
2443 }
2444
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002445 qemu_mutex_lock_ramlist();
Fam Zhengf1060c52016-03-01 14:18:22 +08002446 QLIST_REMOVE_RCU(block, next);
2447 ram_list.mru_block = NULL;
2448 /* Write list before version */
2449 smp_wmb();
2450 ram_list.version++;
2451 call_rcu(block, reclaim_ramblock, rcu);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07002452 qemu_mutex_unlock_ramlist();
bellarde9a1ab12007-02-08 23:08:38 +00002453}
2454
Huang Yingcd19cfa2011-03-02 08:56:19 +01002455#ifndef _WIN32
2456void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2457{
2458 RAMBlock *block;
2459 ram_addr_t offset;
2460 int flags;
2461 void *area, *vaddr;
2462
Peter Xu99e15582017-05-12 12:17:39 +08002463 RAMBLOCK_FOREACH(block) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002464 offset = addr - block->offset;
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002465 if (offset < block->max_length) {
Michael S. Tsirkin1240be22014-11-12 11:44:41 +02002466 vaddr = ramblock_ptr(block, offset);
Paolo Bonzini7bd4f432014-05-14 17:43:22 +08002467 if (block->flags & RAM_PREALLOC) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01002468 ;
Markus Armbrusterdfeaf2a2013-07-31 15:11:05 +02002469 } else if (xen_enabled()) {
2470 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01002471 } else {
2472 flags = MAP_FIXED;
Markus Armbruster3435f392013-07-31 15:11:07 +02002473 if (block->fd >= 0) {
Paolo Bonzinidbcb8982014-06-10 19:15:24 +08002474 flags |= (block->flags & RAM_SHARED ?
2475 MAP_SHARED : MAP_PRIVATE);
Markus Armbruster3435f392013-07-31 15:11:07 +02002476 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2477 flags, block->fd, offset);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002478 } else {
Markus Armbruster2eb9fba2013-07-31 15:11:09 +02002479 /*
2480 * Remap needs to match alloc. Accelerators that
2481 * set phys_mem_alloc never remap. If they did,
2482 * we'd need a remap hook here.
2483 */
2484 assert(phys_mem_alloc == qemu_anon_ram_alloc);
2485
Huang Yingcd19cfa2011-03-02 08:56:19 +01002486 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
2487 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2488 flags, -1, 0);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002489 }
2490 if (area != vaddr) {
Alistair Francis493d89b2018-02-03 09:43:14 +01002491 error_report("Could not remap addr: "
2492 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2493 length, addr);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002494 exit(1);
2495 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03002496 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04002497 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01002498 }
Huang Yingcd19cfa2011-03-02 08:56:19 +01002499 }
2500 }
2501}
2502#endif /* !_WIN32 */
2503
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002504/* Return a host pointer to ram allocated with qemu_ram_alloc.
Mike Dayae3a7042013-09-05 14:41:35 -04002505 * This should not be used for general purpose DMA. Use address_space_map
2506 * or address_space_rw instead. For local memory (e.g. video ram) that the
2507 * device owns, use memory_region_get_ram_ptr.
Mike Day0dc3f442013-09-05 14:41:35 -04002508 *
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002509 * Called within RCU critical section.
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002510 */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002511void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002512{
Gonglei3655cb92016-02-20 10:35:20 +08002513 RAMBlock *block = ram_block;
2514
2515 if (block == NULL) {
2516 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002517 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002518 }
Mike Dayae3a7042013-09-05 14:41:35 -04002519
2520 if (xen_enabled() && block->host == NULL) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002521 /* We need to check if the requested address is in the RAM
2522 * because we don't want to map the entire memory in QEMU.
2523 * In that case just map until the end of the page.
2524 */
2525 if (block->offset == 0) {
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002526 return xen_map_cache(addr, 0, 0, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002527 }
Mike Dayae3a7042013-09-05 14:41:35 -04002528
Stefano Stabellini1ff7c592017-05-03 14:00:35 -07002529 block->host = xen_map_cache(block->offset, block->max_length, 1, false);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01002530 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002531 return ramblock_ptr(block, addr);
pbrookdc828ca2009-04-09 22:21:07 +00002532}
2533
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002534/* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
Mike Dayae3a7042013-09-05 14:41:35 -04002535 * but takes a size argument.
Mike Day0dc3f442013-09-05 14:41:35 -04002536 *
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002537 * Called within RCU critical section.
Mike Dayae3a7042013-09-05 14:41:35 -04002538 */
Gonglei3655cb92016-02-20 10:35:20 +08002539static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002540 hwaddr *size, bool lock)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002541{
Gonglei3655cb92016-02-20 10:35:20 +08002542 RAMBlock *block = ram_block;
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002543 if (*size == 0) {
2544 return NULL;
2545 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002546
Gonglei3655cb92016-02-20 10:35:20 +08002547 if (block == NULL) {
2548 block = qemu_get_ram_block(addr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002549 addr -= block->offset;
Gonglei3655cb92016-02-20 10:35:20 +08002550 }
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002551 *size = MIN(*size, block->max_length - addr);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002552
2553 if (xen_enabled() && block->host == NULL) {
2554 /* We need to check if the requested address is in the RAM
2555 * because we don't want to map the entire memory in QEMU.
2556 * In that case just map the requested area.
2557 */
2558 if (block->offset == 0) {
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002559 return xen_map_cache(addr, *size, lock, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002560 }
2561
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01002562 block->host = xen_map_cache(block->offset, block->max_length, 1, lock);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002563 }
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01002564
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01002565 return ramblock_ptr(block, addr);
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01002566}
2567
Dr. David Alan Gilbertf90bb712018-03-12 17:20:57 +00002568/* Return the offset of a hostpointer within a ramblock */
2569ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2570{
2571 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2572 assert((uintptr_t)host >= (uintptr_t)rb->host);
2573 assert(res < rb->max_length);
2574
2575 return res;
2576}
2577
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002578/*
2579 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2580 * in that RAMBlock.
2581 *
2582 * ptr: Host pointer to look up
2583 * round_offset: If true round the result offset down to a page boundary
2584 * *ram_addr: set to result ram_addr
2585 * *offset: set to result offset within the RAMBlock
2586 *
2587 * Returns: RAMBlock (or NULL if not found)
Mike Dayae3a7042013-09-05 14:41:35 -04002588 *
2589 * By the time this function returns, the returned pointer is not protected
2590 * by RCU anymore. If the caller is not within an RCU critical section and
2591 * does not hold the iothread lock, it must have other means of protecting the
2592 * pointer, such as a reference to the region that includes the incoming
2593 * ram_addr_t.
2594 */
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002595RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002596 ram_addr_t *offset)
pbrook5579c7f2009-04-11 14:47:08 +00002597{
pbrook94a6b542009-04-11 17:15:54 +00002598 RAMBlock *block;
2599 uint8_t *host = ptr;
2600
Jan Kiszka868bb332011-06-21 22:59:09 +02002601 if (xen_enabled()) {
Paolo Bonzinif615f392016-05-26 10:07:50 +02002602 ram_addr_t ram_addr;
Mike Day0dc3f442013-09-05 14:41:35 -04002603 rcu_read_lock();
Paolo Bonzinif615f392016-05-26 10:07:50 +02002604 ram_addr = xen_ram_addr_from_mapcache(ptr);
2605 block = qemu_get_ram_block(ram_addr);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002606 if (block) {
Anthony PERARDd6b6aec2016-06-09 16:56:17 +01002607 *offset = ram_addr - block->offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002608 }
Mike Day0dc3f442013-09-05 14:41:35 -04002609 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002610 return block;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01002611 }
2612
Mike Day0dc3f442013-09-05 14:41:35 -04002613 rcu_read_lock();
2614 block = atomic_rcu_read(&ram_list.mru_block);
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002615 if (block && block->host && host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002616 goto found;
2617 }
2618
Peter Xu99e15582017-05-12 12:17:39 +08002619 RAMBLOCK_FOREACH(block) {
Jun Nakajima432d2682010-08-31 16:41:25 +01002620 /* This case append when the block is not mapped. */
2621 if (block->host == NULL) {
2622 continue;
2623 }
Michael S. Tsirkin9b8424d2014-12-15 22:55:32 +02002624 if (host - block->host < block->max_length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02002625 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06002626 }
pbrook94a6b542009-04-11 17:15:54 +00002627 }
Jun Nakajima432d2682010-08-31 16:41:25 +01002628
Mike Day0dc3f442013-09-05 14:41:35 -04002629 rcu_read_unlock();
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02002630 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02002631
2632found:
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002633 *offset = (host - block->host);
2634 if (round_offset) {
2635 *offset &= TARGET_PAGE_MASK;
2636 }
Mike Day0dc3f442013-09-05 14:41:35 -04002637 rcu_read_unlock();
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002638 return block;
2639}
2640
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002641/*
2642 * Finds the named RAMBlock
2643 *
2644 * name: The name of RAMBlock to find
2645 *
2646 * Returns: RAMBlock (or NULL if not found)
2647 */
2648RAMBlock *qemu_ram_block_by_name(const char *name)
2649{
2650 RAMBlock *block;
2651
Peter Xu99e15582017-05-12 12:17:39 +08002652 RAMBLOCK_FOREACH(block) {
Dr. David Alan Gilberte3dd7492015-11-05 18:10:33 +00002653 if (!strcmp(name, block->idstr)) {
2654 return block;
2655 }
2656 }
2657
2658 return NULL;
2659}
2660
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002661/* Some of the softmmu routines need to translate from a host pointer
2662 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002663ram_addr_t qemu_ram_addr_from_host(void *ptr)
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002664{
2665 RAMBlock *block;
Paolo Bonzinif615f392016-05-26 10:07:50 +02002666 ram_addr_t offset;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002667
Paolo Bonzinif615f392016-05-26 10:07:50 +02002668 block = qemu_ram_block_from_host(ptr, false, &offset);
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002669 if (!block) {
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002670 return RAM_ADDR_INVALID;
Dr. David Alan Gilbert422148d2015-11-05 18:10:32 +00002671 }
2672
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01002673 return block->offset + offset;
Marcelo Tosattie8902612010-10-11 15:31:19 -03002674}
Alex Williamsonf471a172010-06-11 11:11:42 -06002675
Peter Maydell27266272017-11-20 18:08:27 +00002676/* Called within RCU critical section. */
2677void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
2678 CPUState *cpu,
2679 vaddr mem_vaddr,
2680 ram_addr_t ram_addr,
2681 unsigned size)
2682{
2683 ndi->cpu = cpu;
2684 ndi->ram_addr = ram_addr;
2685 ndi->mem_vaddr = mem_vaddr;
2686 ndi->size = size;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002687 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002688
2689 assert(tcg_enabled());
2690 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002691 ndi->pages = page_collection_lock(ram_addr, ram_addr + size);
2692 tb_invalidate_phys_page_fast(ndi->pages, ram_addr, size);
Peter Maydell27266272017-11-20 18:08:27 +00002693 }
2694}
2695
2696/* Called within RCU critical section. */
2697void memory_notdirty_write_complete(NotDirtyInfo *ndi)
2698{
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002699 if (ndi->pages) {
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04002700 assert(tcg_enabled());
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002701 page_collection_unlock(ndi->pages);
2702 ndi->pages = NULL;
Peter Maydell27266272017-11-20 18:08:27 +00002703 }
2704
2705 /* Set both VGA and migration bits for simplicity and to remove
2706 * the notdirty callback faster.
2707 */
2708 cpu_physical_memory_set_dirty_range(ndi->ram_addr, ndi->size,
2709 DIRTY_CLIENTS_NOCODE);
2710 /* we remove the notdirty callback only if the code has been
2711 flushed */
2712 if (!cpu_physical_memory_is_clean(ndi->ram_addr)) {
2713 tlb_set_dirty(ndi->cpu, ndi->mem_vaddr);
2714 }
2715}
2716
Paolo Bonzini49b24af2015-12-16 10:30:47 +01002717/* Called within RCU critical section. */
Avi Kivitya8170e52012-10-23 12:30:10 +02002718static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002719 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00002720{
Peter Maydell27266272017-11-20 18:08:27 +00002721 NotDirtyInfo ndi;
Alex Bennéeba051fb2016-10-27 16:10:16 +01002722
Peter Maydell27266272017-11-20 18:08:27 +00002723 memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr,
2724 ram_addr, size);
2725
Peter Maydell6d3ede52018-06-15 14:57:14 +01002726 stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val);
Peter Maydell27266272017-11-20 18:08:27 +00002727 memory_notdirty_write_complete(&ndi);
bellard1ccde1c2004-02-06 19:46:14 +00002728}
2729
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002730static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002731 unsigned size, bool is_write,
2732 MemTxAttrs attrs)
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002733{
2734 return is_write;
2735}
2736
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002737static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002738 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02002739 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02002740 .endianness = DEVICE_NATIVE_ENDIAN,
Andrew Baumannad528782017-10-13 11:19:13 -07002741 .valid = {
2742 .min_access_size = 1,
2743 .max_access_size = 8,
2744 .unaligned = false,
2745 },
2746 .impl = {
2747 .min_access_size = 1,
2748 .max_access_size = 8,
2749 .unaligned = false,
2750 },
bellard1ccde1c2004-02-06 19:46:14 +00002751};
2752
pbrook0f459d12008-06-09 00:20:13 +00002753/* Generate a debug exception if a watchpoint has been hit. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002754static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
pbrook0f459d12008-06-09 00:20:13 +00002755{
Andreas Färber93afead2013-08-26 03:41:01 +02002756 CPUState *cpu = current_cpu;
Sergey Fedorov568496c2016-02-11 11:17:32 +00002757 CPUClass *cc = CPU_GET_CLASS(cpu);
pbrook0f459d12008-06-09 00:20:13 +00002758 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00002759 CPUWatchpoint *wp;
pbrook0f459d12008-06-09 00:20:13 +00002760
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02002761 assert(tcg_enabled());
Andreas Färberff4700b2013-08-26 18:23:18 +02002762 if (cpu->watchpoint_hit) {
aliguori06d55cc2008-11-18 20:24:06 +00002763 /* We re-entered the check after replacing the TB. Now raise
2764 * the debug interrupt so that is will trigger after the
2765 * current instruction. */
Andreas Färber93afead2013-08-26 03:41:01 +02002766 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00002767 return;
2768 }
Andreas Färber93afead2013-08-26 03:41:01 +02002769 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Julian Brown40612002017-02-07 18:29:59 +00002770 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
Andreas Färberff4700b2013-08-26 18:23:18 +02002771 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
Peter Maydell05068c02014-09-12 14:06:48 +01002772 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2773 && (wp->flags & flags)) {
Peter Maydell08225672014-09-12 14:06:48 +01002774 if (flags == BP_MEM_READ) {
2775 wp->flags |= BP_WATCHPOINT_HIT_READ;
2776 } else {
2777 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2778 }
2779 wp->hitaddr = vaddr;
Peter Maydell66b9b432015-04-26 16:49:24 +01002780 wp->hitattrs = attrs;
Andreas Färberff4700b2013-08-26 18:23:18 +02002781 if (!cpu->watchpoint_hit) {
Sergey Fedorov568496c2016-02-11 11:17:32 +00002782 if (wp->flags & BP_CPU &&
2783 !cc->debug_check_watchpoint(cpu, wp)) {
2784 wp->flags &= ~BP_WATCHPOINT_HIT;
2785 continue;
2786 }
Andreas Färberff4700b2013-08-26 18:23:18 +02002787 cpu->watchpoint_hit = wp;
KONRAD Frederica5e99822016-10-27 16:10:06 +01002788
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002789 mmap_lock();
Andreas Färber239c51a2013-09-01 17:12:23 +02002790 tb_check_watchpoint(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002791 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
Andreas Färber27103422013-08-26 08:31:06 +02002792 cpu->exception_index = EXCP_DEBUG;
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002793 mmap_unlock();
Andreas Färber5638d182013-08-27 17:52:12 +02002794 cpu_loop_exit(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002795 } else {
Richard Henderson9b990ee2017-10-13 10:50:02 -07002796 /* Force execution of one insn next time. */
2797 cpu->cflags_next_tb = 1 | curr_cflags();
Emilio G. Cota0ac20312017-08-04 23:46:31 -04002798 mmap_unlock();
Peter Maydell6886b982016-05-17 15:18:04 +01002799 cpu_loop_exit_noexc(cpu);
aliguori6e140f22008-11-18 20:37:55 +00002800 }
aliguori06d55cc2008-11-18 20:24:06 +00002801 }
aliguori6e140f22008-11-18 20:37:55 +00002802 } else {
2803 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00002804 }
2805 }
2806}
2807
pbrook6658ffb2007-03-16 23:58:11 +00002808/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2809 so these check for a hit then pass through to the normal out-of-line
2810 phys routines. */
Peter Maydell66b9b432015-04-26 16:49:24 +01002811static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2812 unsigned size, MemTxAttrs attrs)
pbrook6658ffb2007-03-16 23:58:11 +00002813{
Peter Maydell66b9b432015-04-26 16:49:24 +01002814 MemTxResult res;
2815 uint64_t data;
Peter Maydell79ed0412016-01-21 14:15:06 +00002816 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2817 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
pbrook6658ffb2007-03-16 23:58:11 +00002818
Peter Maydell66b9b432015-04-26 16:49:24 +01002819 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
Avi Kivity1ec9b902012-01-02 12:47:48 +02002820 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04002821 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002822 data = address_space_ldub(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002823 break;
2824 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002825 data = address_space_lduw(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002826 break;
2827 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002828 data = address_space_ldl(as, addr, attrs, &res);
Max Filippov67364152012-01-29 00:01:40 +04002829 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002830 case 8:
2831 data = address_space_ldq(as, addr, attrs, &res);
2832 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02002833 default: abort();
2834 }
Peter Maydell66b9b432015-04-26 16:49:24 +01002835 *pdata = data;
2836 return res;
2837}
2838
2839static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2840 uint64_t val, unsigned size,
2841 MemTxAttrs attrs)
2842{
2843 MemTxResult res;
Peter Maydell79ed0412016-01-21 14:15:06 +00002844 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2845 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
Peter Maydell66b9b432015-04-26 16:49:24 +01002846
2847 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2848 switch (size) {
2849 case 1:
Peter Maydell79ed0412016-01-21 14:15:06 +00002850 address_space_stb(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002851 break;
2852 case 2:
Peter Maydell79ed0412016-01-21 14:15:06 +00002853 address_space_stw(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002854 break;
2855 case 4:
Peter Maydell79ed0412016-01-21 14:15:06 +00002856 address_space_stl(as, addr, val, attrs, &res);
Peter Maydell66b9b432015-04-26 16:49:24 +01002857 break;
Paolo Bonzini306526b2017-10-17 14:16:05 +02002858 case 8:
2859 address_space_stq(as, addr, val, attrs, &res);
2860 break;
Peter Maydell66b9b432015-04-26 16:49:24 +01002861 default: abort();
2862 }
2863 return res;
pbrook6658ffb2007-03-16 23:58:11 +00002864}
2865
Avi Kivity1ec9b902012-01-02 12:47:48 +02002866static const MemoryRegionOps watch_mem_ops = {
Peter Maydell66b9b432015-04-26 16:49:24 +01002867 .read_with_attrs = watch_mem_read,
2868 .write_with_attrs = watch_mem_write,
Avi Kivity1ec9b902012-01-02 12:47:48 +02002869 .endianness = DEVICE_NATIVE_ENDIAN,
Paolo Bonzini306526b2017-10-17 14:16:05 +02002870 .valid = {
2871 .min_access_size = 1,
2872 .max_access_size = 8,
2873 .unaligned = false,
2874 },
2875 .impl = {
2876 .min_access_size = 1,
2877 .max_access_size = 8,
2878 .unaligned = false,
2879 },
pbrook6658ffb2007-03-16 23:58:11 +00002880};
pbrook6658ffb2007-03-16 23:58:11 +00002881
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01002882static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08002883 MemTxAttrs attrs, uint8_t *buf, hwaddr len);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002884static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
Li Zhijian0c249ff2019-01-17 20:49:01 +08002885 const uint8_t *buf, hwaddr len);
2886static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
Peter Maydelleace72b2018-05-31 14:50:52 +01002887 bool is_write, MemTxAttrs attrs);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002888
Peter Maydellf25a49e2015-04-26 16:49:24 +01002889static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2890 unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002891{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002892 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002893 uint8_t buf[8];
Peter Maydell5c9eb022015-04-26 16:49:24 +01002894 MemTxResult res;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002895
blueswir1db7b5422007-05-26 17:36:03 +00002896#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002897 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002898 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00002899#endif
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002900 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
Peter Maydell5c9eb022015-04-26 16:49:24 +01002901 if (res) {
2902 return res;
Peter Maydellf25a49e2015-04-26 16:49:24 +01002903 }
Peter Maydell6d3ede52018-06-15 14:57:14 +01002904 *data = ldn_p(buf, len);
2905 return MEMTX_OK;
blueswir1db7b5422007-05-26 17:36:03 +00002906}
2907
Peter Maydellf25a49e2015-04-26 16:49:24 +01002908static MemTxResult subpage_write(void *opaque, hwaddr addr,
2909 uint64_t value, unsigned len, MemTxAttrs attrs)
blueswir1db7b5422007-05-26 17:36:03 +00002910{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002911 subpage_t *subpage = opaque;
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002912 uint8_t buf[8];
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002913
blueswir1db7b5422007-05-26 17:36:03 +00002914#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002915 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002916 " value %"PRIx64"\n",
2917 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00002918#endif
Peter Maydell6d3ede52018-06-15 14:57:14 +01002919 stn_p(buf, len, value);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002920 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00002921}
2922
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002923static bool subpage_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01002924 unsigned len, bool is_write,
2925 MemTxAttrs attrs)
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002926{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002927 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002928#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002929 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
Jan Kiszkaacc9d802013-05-26 21:55:37 +02002930 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002931#endif
2932
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002933 return flatview_access_valid(subpage->fv, addr + subpage->base,
Peter Maydelleace72b2018-05-31 14:50:52 +01002934 len, is_write, attrs);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002935}
2936
Avi Kivity70c68e42012-01-02 12:32:48 +02002937static const MemoryRegionOps subpage_ops = {
Peter Maydellf25a49e2015-04-26 16:49:24 +01002938 .read_with_attrs = subpage_read,
2939 .write_with_attrs = subpage_write,
Paolo Bonziniff6cff72014-12-22 13:11:39 +01002940 .impl.min_access_size = 1,
2941 .impl.max_access_size = 8,
2942 .valid.min_access_size = 1,
2943 .valid.max_access_size = 8,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02002944 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02002945 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00002946};
2947
Anthony Liguoric227f092009-10-01 16:12:16 -05002948static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02002949 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00002950{
2951 int idx, eidx;
2952
2953 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2954 return -1;
2955 idx = SUBPAGE_IDX(start);
2956 eidx = SUBPAGE_IDX(end);
2957#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002958 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2959 __func__, mmio, start, end, idx, eidx, section);
blueswir1db7b5422007-05-26 17:36:03 +00002960#endif
blueswir1db7b5422007-05-26 17:36:03 +00002961 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02002962 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00002963 }
2964
2965 return 0;
2966}
2967
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002968static subpage_t *subpage_init(FlatView *fv, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00002969{
Anthony Liguoric227f092009-10-01 16:12:16 -05002970 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00002971
Vijaya Kumar K2615fab2016-10-24 16:26:49 +01002972 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002973 mmio->fv = fv;
aliguori1eec6142009-02-05 22:06:18 +00002974 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04002975 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Peter Crosthwaiteb4fefef2014-06-05 23:15:52 -07002976 NULL, TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02002977 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00002978#if defined(DEBUG_SUBPAGE)
Amos Kong016e9d62013-09-27 09:25:38 +08002979 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2980 mmio, base, TARGET_PAGE_SIZE);
blueswir1db7b5422007-05-26 17:36:03 +00002981#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02002982 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00002983
2984 return mmio;
2985}
2986
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002987static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
Avi Kivity5312bd82012-02-12 18:32:55 +02002988{
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002989 assert(fv);
Avi Kivity5312bd82012-02-12 18:32:55 +02002990 MemoryRegionSection section = {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10002991 .fv = fv,
Avi Kivity5312bd82012-02-12 18:32:55 +02002992 .mr = mr,
2993 .offset_within_address_space = 0,
2994 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02002995 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02002996 };
2997
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02002998 return phys_section_add(map, &section);
Avi Kivity5312bd82012-02-12 18:32:55 +02002999}
3000
Peter Maydell8af36742017-12-13 17:52:28 +00003001static void readonly_mem_write(void *opaque, hwaddr addr,
3002 uint64_t val, unsigned size)
3003{
3004 /* Ignore any write to ROM. */
3005}
3006
3007static bool readonly_mem_accepts(void *opaque, hwaddr addr,
Peter Maydell8372d382018-05-31 14:50:52 +01003008 unsigned size, bool is_write,
3009 MemTxAttrs attrs)
Peter Maydell8af36742017-12-13 17:52:28 +00003010{
3011 return is_write;
3012}
3013
3014/* This will only be used for writes, because reads are special cased
3015 * to directly access the underlying host ram.
3016 */
3017static const MemoryRegionOps readonly_mem_ops = {
3018 .write = readonly_mem_write,
3019 .valid.accepts = readonly_mem_accepts,
3020 .endianness = DEVICE_NATIVE_ENDIAN,
3021 .valid = {
3022 .min_access_size = 1,
3023 .max_access_size = 8,
3024 .unaligned = false,
3025 },
3026 .impl = {
3027 .min_access_size = 1,
3028 .max_access_size = 8,
3029 .unaligned = false,
3030 },
3031};
3032
Peter Maydell2d54f192018-06-15 14:57:14 +01003033MemoryRegionSection *iotlb_to_section(CPUState *cpu,
3034 hwaddr index, MemTxAttrs attrs)
Avi Kivityaa102232012-03-08 17:06:55 +02003035{
Peter Maydella54c87b2016-01-21 14:15:05 +00003036 int asidx = cpu_asidx_from_attrs(cpu, attrs);
3037 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
Peter Maydell32857f42015-10-01 15:29:50 +01003038 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01003039 MemoryRegionSection *sections = d->map.sections;
Paolo Bonzini9d82b5a2013-08-16 08:26:30 +02003040
Peter Maydell2d54f192018-06-15 14:57:14 +01003041 return &sections[index & ~TARGET_PAGE_MASK];
Avi Kivityaa102232012-03-08 17:06:55 +02003042}
3043
Avi Kivitye9179ce2009-06-14 11:38:52 +03003044static void io_mem_init(void)
3045{
Peter Maydell8af36742017-12-13 17:52:28 +00003046 memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops,
3047 NULL, NULL, UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003048 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003049 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003050
3051 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
3052 * which can be called without the iothread mutex.
3053 */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003054 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003055 NULL, UINT64_MAX);
Jan Kiszka8d04fb52017-02-23 18:29:11 +00003056 memory_region_clear_global_locking(&io_mem_notdirty);
3057
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04003058 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Paolo Bonzini1f6245e2014-06-13 10:48:06 +02003059 NULL, UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03003060}
3061
Alexey Kardashevskiy8629d3f2017-09-21 18:51:00 +10003062AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
Avi Kivityac1970f2012-10-03 16:22:53 +02003063{
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003064 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
3065 uint16_t n;
3066
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003067 n = dummy_section(&d->map, fv, &io_mem_unassigned);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003068 assert(n == PHYS_SECTION_UNASSIGNED);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003069 n = dummy_section(&d->map, fv, &io_mem_notdirty);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003070 assert(n == PHYS_SECTION_NOTDIRTY);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003071 n = dummy_section(&d->map, fv, &io_mem_rom);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003072 assert(n == PHYS_SECTION_ROM);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003073 n = dummy_section(&d->map, fv, &io_mem_watch);
Marcel Apfelbaum53cb28c2013-12-01 14:02:23 +02003074 assert(n == PHYS_SECTION_WATCH);
Paolo Bonzini00752702013-05-29 12:13:54 +02003075
Michael S. Tsirkin9736e552013-11-11 14:42:43 +02003076 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003077
3078 return d;
Paolo Bonzini00752702013-05-29 12:13:54 +02003079}
3080
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003081void address_space_dispatch_free(AddressSpaceDispatch *d)
Paolo Bonzini79e2b9a2015-01-21 12:09:14 +01003082{
3083 phys_sections_free(&d->map);
3084 g_free(d);
3085}
3086
Avi Kivity1d711482012-10-02 18:54:45 +02003087static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02003088{
Peter Maydell32857f42015-10-01 15:29:50 +01003089 CPUAddressSpace *cpuas;
3090 AddressSpaceDispatch *d;
Avi Kivity117712c2012-02-12 21:23:17 +02003091
Emilio G. Cotaf28d0df2018-06-22 13:45:31 -04003092 assert(tcg_enabled());
Avi Kivity117712c2012-02-12 21:23:17 +02003093 /* since each CPU stores ram addresses in its TLB cache, we must
3094 reset the modified entries */
Peter Maydell32857f42015-10-01 15:29:50 +01003095 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
3096 cpu_reloading_memory_map();
3097 /* The CPU and TLB are protected by the iothread lock.
3098 * We reload the dispatch pointer now because cpu_reloading_memory_map()
3099 * may have split the RCU critical section.
3100 */
Alexey Kardashevskiy66a6df12017-09-21 18:50:56 +10003101 d = address_space_to_dispatch(cpuas->as);
Alex Bennéef35e44e2016-10-21 16:34:18 +01003102 atomic_rcu_set(&cpuas->memory_dispatch, d);
Alex Bennéed10eb082016-11-14 14:17:28 +00003103 tlb_flush(cpuas->cpu);
Avi Kivity50c1e142012-02-08 21:36:02 +02003104}
3105
Avi Kivity62152b82011-07-26 14:26:14 +03003106static void memory_map_init(void)
3107{
Anthony Liguori7267c092011-08-20 22:09:37 -05003108 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini03f49952013-11-07 17:14:36 +01003109
Paolo Bonzini57271d62013-11-07 17:14:37 +01003110 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003111 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03003112
Anthony Liguori7267c092011-08-20 22:09:37 -05003113 system_io = g_malloc(sizeof(*system_io));
Jan Kiszka3bb28b72013-09-02 18:43:30 +02003114 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
3115 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00003116 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity62152b82011-07-26 14:26:14 +03003117}
3118
3119MemoryRegion *get_system_memory(void)
3120{
3121 return system_memory;
3122}
3123
Avi Kivity309cb472011-08-08 16:09:03 +03003124MemoryRegion *get_system_io(void)
3125{
3126 return system_io;
3127}
3128
pbrooke2eef172008-06-08 01:09:01 +00003129#endif /* !defined(CONFIG_USER_ONLY) */
3130
bellard13eb76e2004-01-24 15:23:36 +00003131/* physical memory access (slow version, mainly for debug) */
3132#if defined(CONFIG_USER_ONLY)
Andreas Färberf17ec442013-06-29 19:40:58 +02003133int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003134 uint8_t *buf, target_ulong len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003135{
Li Zhijian0c249ff2019-01-17 20:49:01 +08003136 int flags;
3137 target_ulong l, page;
pbrook53a59602006-03-25 19:31:22 +00003138 void * p;
bellard13eb76e2004-01-24 15:23:36 +00003139
3140 while (len > 0) {
3141 page = addr & TARGET_PAGE_MASK;
3142 l = (page + TARGET_PAGE_SIZE) - addr;
3143 if (l > len)
3144 l = len;
3145 flags = page_get_flags(page);
3146 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00003147 return -1;
bellard13eb76e2004-01-24 15:23:36 +00003148 if (is_write) {
3149 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00003150 return -1;
bellard579a97f2007-11-11 14:26:47 +00003151 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003152 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00003153 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003154 memcpy(p, buf, l);
3155 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00003156 } else {
3157 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00003158 return -1;
bellard579a97f2007-11-11 14:26:47 +00003159 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00003160 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00003161 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00003162 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00003163 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00003164 }
3165 len -= l;
3166 buf += l;
3167 addr += l;
3168 }
Paul Brooka68fe892010-03-01 00:08:59 +00003169 return 0;
bellard13eb76e2004-01-24 15:23:36 +00003170}
bellard8df1cd02005-01-28 22:37:22 +00003171
bellard13eb76e2004-01-24 15:23:36 +00003172#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003173
Paolo Bonzini845b6212015-03-23 11:45:53 +01003174static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
Avi Kivitya8170e52012-10-23 12:30:10 +02003175 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003176{
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003177 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003178 addr += memory_region_get_ram_addr(mr);
3179
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003180 /* No early return if dirty_log_mask is or becomes 0, because
3181 * cpu_physical_memory_set_dirty_range will still call
3182 * xen_modified_memory.
3183 */
3184 if (dirty_log_mask) {
3185 dirty_log_mask =
3186 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003187 }
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003188 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
Paolo Bonzini5aa1ef72017-07-03 17:50:40 +02003189 assert(tcg_enabled());
Paolo Bonzinie87f7772015-03-25 15:21:39 +01003190 tb_invalidate_phys_range(addr, addr + length);
3191 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
3192 }
3193 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00003194}
3195
Stefan Hajnoczi047be4e2019-01-29 11:46:04 +00003196void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size)
3197{
3198 /*
3199 * In principle this function would work on other memory region types too,
3200 * but the ROM device use case is the only one where this operation is
3201 * necessary. Other memory regions should use the
3202 * address_space_read/write() APIs.
3203 */
3204 assert(memory_region_is_romd(mr));
3205
3206 invalidate_and_set_dirty(mr, addr, size);
3207}
3208
Richard Henderson23326162013-07-08 14:55:59 -07003209static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02003210{
Paolo Bonzinie1622f42013-07-17 13:17:41 +02003211 unsigned access_size_max = mr->ops->valid.max_access_size;
Richard Henderson23326162013-07-08 14:55:59 -07003212
3213 /* Regions are assumed to support 1-4 byte accesses unless
3214 otherwise specified. */
Richard Henderson23326162013-07-08 14:55:59 -07003215 if (access_size_max == 0) {
3216 access_size_max = 4;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003217 }
Richard Henderson23326162013-07-08 14:55:59 -07003218
3219 /* Bound the maximum access by the alignment of the address. */
3220 if (!mr->ops->impl.unaligned) {
3221 unsigned align_size_max = addr & -addr;
3222 if (align_size_max != 0 && align_size_max < access_size_max) {
3223 access_size_max = align_size_max;
3224 }
3225 }
3226
3227 /* Don't attempt accesses larger than the maximum. */
3228 if (l > access_size_max) {
3229 l = access_size_max;
3230 }
Peter Maydell6554f5c2015-07-24 13:33:10 +01003231 l = pow2floor(l);
Richard Henderson23326162013-07-08 14:55:59 -07003232
3233 return l;
Paolo Bonzini82f25632013-05-24 11:59:43 +02003234}
3235
Jan Kiszka4840f102015-06-18 18:47:22 +02003236static bool prepare_mmio_access(MemoryRegion *mr)
Paolo Bonzini125b3802015-06-18 18:47:21 +02003237{
Jan Kiszka4840f102015-06-18 18:47:22 +02003238 bool unlocked = !qemu_mutex_iothread_locked();
3239 bool release_lock = false;
3240
3241 if (unlocked && mr->global_locking) {
3242 qemu_mutex_lock_iothread();
3243 unlocked = false;
3244 release_lock = true;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003245 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003246 if (mr->flush_coalesced_mmio) {
3247 if (unlocked) {
3248 qemu_mutex_lock_iothread();
3249 }
3250 qemu_flush_coalesced_mmio_buffer();
3251 if (unlocked) {
3252 qemu_mutex_unlock_iothread();
3253 }
3254 }
3255
3256 return release_lock;
Paolo Bonzini125b3802015-06-18 18:47:21 +02003257}
3258
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003259/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003260static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
3261 MemTxAttrs attrs,
3262 const uint8_t *buf,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003263 hwaddr len, hwaddr addr1,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003264 hwaddr l, MemoryRegion *mr)
bellard13eb76e2004-01-24 15:23:36 +00003265{
bellard13eb76e2004-01-24 15:23:36 +00003266 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02003267 uint64_t val;
Peter Maydell3b643492015-04-26 16:49:23 +01003268 MemTxResult result = MEMTX_OK;
Jan Kiszka4840f102015-06-18 18:47:22 +02003269 bool release_lock = false;
ths3b46e622007-09-17 08:09:54 +00003270
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003271 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003272 if (!memory_access_is_direct(mr, true)) {
3273 release_lock |= prepare_mmio_access(mr);
3274 l = memory_access_size(mr, l, addr1);
3275 /* XXX: could force current_cpu to NULL to avoid
3276 potential bugs */
Peter Maydell6d3ede52018-06-15 14:57:14 +01003277 val = ldn_p(buf, l);
3278 result |= memory_region_dispatch_write(mr, addr1, val, l, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003279 } else {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003280 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003281 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003282 memcpy(ptr, buf, l);
3283 invalidate_and_set_dirty(mr, addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00003284 }
Jan Kiszka4840f102015-06-18 18:47:22 +02003285
3286 if (release_lock) {
3287 qemu_mutex_unlock_iothread();
3288 release_lock = false;
3289 }
3290
bellard13eb76e2004-01-24 15:23:36 +00003291 len -= l;
3292 buf += l;
3293 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003294
3295 if (!len) {
3296 break;
3297 }
3298
3299 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003300 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003301 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02003302
Peter Maydell3b643492015-04-26 16:49:23 +01003303 return result;
bellard13eb76e2004-01-24 15:23:36 +00003304}
bellard8df1cd02005-01-28 22:37:22 +00003305
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003306/* Called from RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003307static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003308 const uint8_t *buf, hwaddr len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003309{
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003310 hwaddr l;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003311 hwaddr addr1;
3312 MemoryRegion *mr;
3313 MemTxResult result = MEMTX_OK;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003314
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003315 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003316 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003317 result = flatview_write_continue(fv, addr, attrs, buf, len,
3318 addr1, l, mr);
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003319
3320 return result;
3321}
3322
3323/* Called within RCU critical section. */
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003324MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
3325 MemTxAttrs attrs, uint8_t *buf,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003326 hwaddr len, hwaddr addr1, hwaddr l,
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003327 MemoryRegion *mr)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003328{
3329 uint8_t *ptr;
3330 uint64_t val;
3331 MemTxResult result = MEMTX_OK;
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003332 bool release_lock = false;
3333
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003334 for (;;) {
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003335 if (!memory_access_is_direct(mr, false)) {
3336 /* I/O case */
3337 release_lock |= prepare_mmio_access(mr);
3338 l = memory_access_size(mr, l, addr1);
Peter Maydell6d3ede52018-06-15 14:57:14 +01003339 result |= memory_region_dispatch_read(mr, addr1, &val, l, attrs);
3340 stn_p(buf, l, val);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003341 } else {
3342 /* RAM case */
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003343 ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003344 memcpy(buf, ptr, l);
3345 }
3346
3347 if (release_lock) {
3348 qemu_mutex_unlock_iothread();
3349 release_lock = false;
3350 }
3351
3352 len -= l;
3353 buf += l;
3354 addr += l;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003355
3356 if (!len) {
3357 break;
3358 }
3359
3360 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003361 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinieb7eeb82015-12-09 10:06:31 +01003362 }
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003363
3364 return result;
3365}
3366
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003367/* Called from RCU critical section. */
3368static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003369 MemTxAttrs attrs, uint8_t *buf, hwaddr len)
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003370{
3371 hwaddr l;
3372 hwaddr addr1;
3373 MemoryRegion *mr;
Paolo Bonzinia203ac72015-12-09 10:18:57 +01003374
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003375 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003376 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003377 return flatview_read_continue(fv, addr, attrs, buf, len,
3378 addr1, l, mr);
Avi Kivityac1970f2012-10-03 16:22:53 +02003379}
3380
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003381MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003382 MemTxAttrs attrs, uint8_t *buf, hwaddr len)
Paolo Bonzinib2a44fc2018-03-05 00:19:49 +01003383{
3384 MemTxResult result = MEMTX_OK;
3385 FlatView *fv;
3386
3387 if (len > 0) {
3388 rcu_read_lock();
3389 fv = address_space_to_flatview(as);
3390 result = flatview_read(fv, addr, attrs, buf, len);
3391 rcu_read_unlock();
3392 }
3393
3394 return result;
3395}
3396
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003397MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
3398 MemTxAttrs attrs,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003399 const uint8_t *buf, hwaddr len)
Paolo Bonzini4c6ebbb2018-03-05 09:23:56 +01003400{
3401 MemTxResult result = MEMTX_OK;
3402 FlatView *fv;
3403
3404 if (len > 0) {
3405 rcu_read_lock();
3406 fv = address_space_to_flatview(as);
3407 result = flatview_write(fv, addr, attrs, buf, len);
3408 rcu_read_unlock();
3409 }
3410
3411 return result;
3412}
3413
Paolo Bonzinidb84fd92018-03-05 09:29:04 +01003414MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003415 uint8_t *buf, hwaddr len, bool is_write)
Paolo Bonzinidb84fd92018-03-05 09:29:04 +01003416{
3417 if (is_write) {
3418 return address_space_write(as, addr, attrs, buf, len);
3419 } else {
3420 return address_space_read_full(as, addr, attrs, buf, len);
3421 }
3422}
3423
Avi Kivitya8170e52012-10-23 12:30:10 +02003424void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003425 hwaddr len, int is_write)
Avi Kivityac1970f2012-10-03 16:22:53 +02003426{
Peter Maydell5c9eb022015-04-26 16:49:24 +01003427 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3428 buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02003429}
3430
Alexander Graf582b55a2013-12-11 14:17:44 +01003431enum write_rom_type {
3432 WRITE_DATA,
3433 FLUSH_CACHE,
3434};
3435
Peter Maydell75693e12018-12-14 13:30:48 +00003436static inline MemTxResult address_space_write_rom_internal(AddressSpace *as,
3437 hwaddr addr,
3438 MemTxAttrs attrs,
3439 const uint8_t *buf,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003440 hwaddr len,
Peter Maydell75693e12018-12-14 13:30:48 +00003441 enum write_rom_type type)
bellardd0ecd2a2006-04-23 17:14:48 +00003442{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003443 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00003444 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003445 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003446 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00003447
Paolo Bonzini41063e12015-03-18 14:21:43 +01003448 rcu_read_lock();
bellardd0ecd2a2006-04-23 17:14:48 +00003449 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003450 l = len;
Peter Maydell75693e12018-12-14 13:30:48 +00003451 mr = address_space_translate(as, addr, &addr1, &l, true, attrs);
ths3b46e622007-09-17 08:09:54 +00003452
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003453 if (!(memory_region_is_ram(mr) ||
3454 memory_region_is_romd(mr))) {
Paolo Bonzinib242e0e2015-07-04 00:24:51 +02003455 l = memory_access_size(mr, l, addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00003456 } else {
bellardd0ecd2a2006-04-23 17:14:48 +00003457 /* ROM/RAM case */
Paolo Bonzini0878d0e2016-02-22 11:02:12 +01003458 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
Alexander Graf582b55a2013-12-11 14:17:44 +01003459 switch (type) {
3460 case WRITE_DATA:
3461 memcpy(ptr, buf, l);
Paolo Bonzini845b6212015-03-23 11:45:53 +01003462 invalidate_and_set_dirty(mr, addr1, l);
Alexander Graf582b55a2013-12-11 14:17:44 +01003463 break;
3464 case FLUSH_CACHE:
3465 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
3466 break;
3467 }
bellardd0ecd2a2006-04-23 17:14:48 +00003468 }
3469 len -= l;
3470 buf += l;
3471 addr += l;
3472 }
Paolo Bonzini41063e12015-03-18 14:21:43 +01003473 rcu_read_unlock();
Peter Maydell75693e12018-12-14 13:30:48 +00003474 return MEMTX_OK;
bellardd0ecd2a2006-04-23 17:14:48 +00003475}
3476
Alexander Graf582b55a2013-12-11 14:17:44 +01003477/* used for ROM loading : can write in RAM and ROM */
Peter Maydell3c8133f2018-12-14 13:30:48 +00003478MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
3479 MemTxAttrs attrs,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003480 const uint8_t *buf, hwaddr len)
Alexander Graf582b55a2013-12-11 14:17:44 +01003481{
Peter Maydell3c8133f2018-12-14 13:30:48 +00003482 return address_space_write_rom_internal(as, addr, attrs,
3483 buf, len, WRITE_DATA);
Alexander Graf582b55a2013-12-11 14:17:44 +01003484}
3485
Li Zhijian0c249ff2019-01-17 20:49:01 +08003486void cpu_flush_icache_range(hwaddr start, hwaddr len)
Alexander Graf582b55a2013-12-11 14:17:44 +01003487{
3488 /*
3489 * This function should do the same thing as an icache flush that was
3490 * triggered from within the guest. For TCG we are always cache coherent,
3491 * so there is no need to flush anything. For KVM / Xen we need to flush
3492 * the host's instruction cache at least.
3493 */
3494 if (tcg_enabled()) {
3495 return;
3496 }
3497
Peter Maydell75693e12018-12-14 13:30:48 +00003498 address_space_write_rom_internal(&address_space_memory,
3499 start, MEMTXATTRS_UNSPECIFIED,
3500 NULL, len, FLUSH_CACHE);
Alexander Graf582b55a2013-12-11 14:17:44 +01003501}
3502
aliguori6d16c2f2009-01-22 16:59:11 +00003503typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003504 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00003505 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02003506 hwaddr addr;
3507 hwaddr len;
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003508 bool in_use;
aliguori6d16c2f2009-01-22 16:59:11 +00003509} BounceBuffer;
3510
3511static BounceBuffer bounce;
3512
aliguoriba223c22009-01-22 16:59:16 +00003513typedef struct MapClient {
Fam Zhenge95205e2015-03-16 17:03:37 +08003514 QEMUBH *bh;
Blue Swirl72cf2d42009-09-12 07:36:22 +00003515 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00003516} MapClient;
3517
Fam Zheng38e047b2015-03-16 17:03:35 +08003518QemuMutex map_client_list_lock;
Paolo Bonzinib58deb32018-12-06 11:58:10 +01003519static QLIST_HEAD(, MapClient) map_client_list
Blue Swirl72cf2d42009-09-12 07:36:22 +00003520 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00003521
Fam Zhenge95205e2015-03-16 17:03:37 +08003522static void cpu_unregister_map_client_do(MapClient *client)
aliguoriba223c22009-01-22 16:59:16 +00003523{
Blue Swirl72cf2d42009-09-12 07:36:22 +00003524 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05003525 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00003526}
3527
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003528static void cpu_notify_map_clients_locked(void)
aliguoriba223c22009-01-22 16:59:16 +00003529{
3530 MapClient *client;
3531
Blue Swirl72cf2d42009-09-12 07:36:22 +00003532 while (!QLIST_EMPTY(&map_client_list)) {
3533 client = QLIST_FIRST(&map_client_list);
Fam Zhenge95205e2015-03-16 17:03:37 +08003534 qemu_bh_schedule(client->bh);
3535 cpu_unregister_map_client_do(client);
aliguoriba223c22009-01-22 16:59:16 +00003536 }
3537}
3538
Fam Zhenge95205e2015-03-16 17:03:37 +08003539void cpu_register_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003540{
3541 MapClient *client = g_malloc(sizeof(*client));
3542
Fam Zheng38e047b2015-03-16 17:03:35 +08003543 qemu_mutex_lock(&map_client_list_lock);
Fam Zhenge95205e2015-03-16 17:03:37 +08003544 client->bh = bh;
bellardd0ecd2a2006-04-23 17:14:48 +00003545 QLIST_INSERT_HEAD(&map_client_list, client, link);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003546 if (!atomic_read(&bounce.in_use)) {
3547 cpu_notify_map_clients_locked();
3548 }
Fam Zheng38e047b2015-03-16 17:03:35 +08003549 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003550}
3551
Fam Zheng38e047b2015-03-16 17:03:35 +08003552void cpu_exec_init_all(void)
3553{
3554 qemu_mutex_init(&ram_list.mutex);
Peter Maydell20bccb82016-10-24 16:26:49 +01003555 /* The data structures we set up here depend on knowing the page size,
3556 * so no more changes can be made after this point.
3557 * In an ideal world, nothing we did before we had finished the
3558 * machine setup would care about the target page size, and we could
3559 * do this much later, rather than requiring board models to state
3560 * up front what their requirements are.
3561 */
3562 finalize_target_page_bits();
Fam Zheng38e047b2015-03-16 17:03:35 +08003563 io_mem_init();
Paolo Bonzini680a4782015-11-02 09:23:52 +01003564 memory_map_init();
Fam Zheng38e047b2015-03-16 17:03:35 +08003565 qemu_mutex_init(&map_client_list_lock);
3566}
3567
Fam Zhenge95205e2015-03-16 17:03:37 +08003568void cpu_unregister_map_client(QEMUBH *bh)
bellardd0ecd2a2006-04-23 17:14:48 +00003569{
Fam Zhenge95205e2015-03-16 17:03:37 +08003570 MapClient *client;
bellardd0ecd2a2006-04-23 17:14:48 +00003571
Fam Zhenge95205e2015-03-16 17:03:37 +08003572 qemu_mutex_lock(&map_client_list_lock);
3573 QLIST_FOREACH(client, &map_client_list, link) {
3574 if (client->bh == bh) {
3575 cpu_unregister_map_client_do(client);
3576 break;
3577 }
3578 }
3579 qemu_mutex_unlock(&map_client_list_lock);
bellardd0ecd2a2006-04-23 17:14:48 +00003580}
3581
3582static void cpu_notify_map_clients(void)
3583{
Fam Zheng38e047b2015-03-16 17:03:35 +08003584 qemu_mutex_lock(&map_client_list_lock);
Fam Zheng33b6c2e2015-03-16 17:03:36 +08003585 cpu_notify_map_clients_locked();
Fam Zheng38e047b2015-03-16 17:03:35 +08003586 qemu_mutex_unlock(&map_client_list_lock);
aliguori6d16c2f2009-01-22 16:59:11 +00003587}
3588
Li Zhijian0c249ff2019-01-17 20:49:01 +08003589static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
Peter Maydelleace72b2018-05-31 14:50:52 +01003590 bool is_write, MemTxAttrs attrs)
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003591{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003592 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003593 hwaddr l, xlat;
3594
3595 while (len > 0) {
3596 l = len;
Peter Maydellefa99a22018-05-31 14:50:52 +01003597 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003598 if (!memory_access_is_direct(mr, is_write)) {
3599 l = memory_access_size(mr, l, addr);
Peter Maydelleace72b2018-05-31 14:50:52 +01003600 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02003601 return false;
3602 }
3603 }
3604
3605 len -= l;
3606 addr += l;
3607 }
3608 return true;
3609}
3610
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003611bool address_space_access_valid(AddressSpace *as, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003612 hwaddr len, bool is_write,
Peter Maydellfddffa42018-05-31 14:50:52 +01003613 MemTxAttrs attrs)
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003614{
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003615 FlatView *fv;
3616 bool result;
3617
3618 rcu_read_lock();
3619 fv = address_space_to_flatview(as);
Peter Maydelleace72b2018-05-31 14:50:52 +01003620 result = flatview_access_valid(fv, addr, len, is_write, attrs);
Paolo Bonzini11e732a2018-03-05 00:23:26 +01003621 rcu_read_unlock();
3622 return result;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003623}
3624
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003625static hwaddr
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003626flatview_extend_translation(FlatView *fv, hwaddr addr,
Peter Maydell53d07902018-05-31 14:50:52 +01003627 hwaddr target_len,
3628 MemoryRegion *mr, hwaddr base, hwaddr len,
3629 bool is_write, MemTxAttrs attrs)
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003630{
3631 hwaddr done = 0;
3632 hwaddr xlat;
3633 MemoryRegion *this_mr;
3634
3635 for (;;) {
3636 target_len -= len;
3637 addr += len;
3638 done += len;
3639 if (target_len == 0) {
3640 return done;
3641 }
3642
3643 len = target_len;
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003644 this_mr = flatview_translate(fv, addr, &xlat,
Peter Maydellefa99a22018-05-31 14:50:52 +01003645 &len, is_write, attrs);
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003646 if (this_mr != mr || xlat != base + done) {
3647 return done;
3648 }
3649 }
3650}
3651
aliguori6d16c2f2009-01-22 16:59:11 +00003652/* Map a physical memory region into a host virtual address.
3653 * May map a subset of the requested range, given by and returned in *plen.
3654 * May return NULL if resources needed to perform the mapping are exhausted.
3655 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00003656 * Use cpu_register_map_client() to know when retrying the map operation is
3657 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00003658 */
Avi Kivityac1970f2012-10-03 16:22:53 +02003659void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02003660 hwaddr addr,
3661 hwaddr *plen,
Peter Maydellf26404f2018-05-31 14:50:52 +01003662 bool is_write,
3663 MemTxAttrs attrs)
aliguori6d16c2f2009-01-22 16:59:11 +00003664{
Avi Kivitya8170e52012-10-23 12:30:10 +02003665 hwaddr len = *plen;
Paolo Bonzini715c31e2016-11-22 12:04:31 +01003666 hwaddr l, xlat;
3667 MemoryRegion *mr;
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003668 void *ptr;
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003669 FlatView *fv;
aliguori6d16c2f2009-01-22 16:59:11 +00003670
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003671 if (len == 0) {
3672 return NULL;
3673 }
aliguori6d16c2f2009-01-22 16:59:11 +00003674
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003675 l = len;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003676 rcu_read_lock();
Paolo Bonziniad0c60f2018-03-05 00:23:26 +01003677 fv = address_space_to_flatview(as);
Peter Maydellefa99a22018-05-31 14:50:52 +01003678 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
Paolo Bonzini41063e12015-03-18 14:21:43 +01003679
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003680 if (!memory_access_is_direct(mr, is_write)) {
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003681 if (atomic_xchg(&bounce.in_use, true)) {
Paolo Bonzini41063e12015-03-18 14:21:43 +01003682 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003683 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00003684 }
Kevin Wolfe85d9db2013-07-22 14:30:23 +02003685 /* Avoid unbounded allocations */
3686 l = MIN(l, TARGET_PAGE_SIZE);
3687 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003688 bounce.addr = addr;
3689 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003690
3691 memory_region_ref(mr);
3692 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003693 if (!is_write) {
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003694 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
Peter Maydell5c9eb022015-04-26 16:49:24 +01003695 bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01003696 }
aliguori6d16c2f2009-01-22 16:59:11 +00003697
Paolo Bonzini41063e12015-03-18 14:21:43 +01003698 rcu_read_unlock();
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003699 *plen = l;
3700 return bounce.buffer;
3701 }
3702
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02003703
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003704 memory_region_ref(mr);
Alexey Kardashevskiy16620682017-09-21 18:50:58 +10003705 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
Peter Maydell53d07902018-05-31 14:50:52 +01003706 l, is_write, attrs);
Anthony PERARDf5aa69b2017-07-26 17:53:26 +01003707 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);
Paolo Bonzinie81bcda2015-12-16 10:31:26 +01003708 rcu_read_unlock();
3709
3710 return ptr;
aliguori6d16c2f2009-01-22 16:59:11 +00003711}
3712
Avi Kivityac1970f2012-10-03 16:22:53 +02003713/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00003714 * Will also mark the memory as dirty if is_write == 1. access_len gives
3715 * the amount of memory that was actually read or written by the caller.
3716 */
Avi Kivitya8170e52012-10-23 12:30:10 +02003717void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3718 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00003719{
3720 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003721 MemoryRegion *mr;
3722 ram_addr_t addr1;
3723
Paolo Bonzini07bdaa42016-03-25 12:55:08 +01003724 mr = memory_region_from_host(buffer, &addr1);
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003725 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00003726 if (is_write) {
Paolo Bonzini845b6212015-03-23 11:45:53 +01003727 invalidate_and_set_dirty(mr, addr1, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003728 }
Jan Kiszka868bb332011-06-21 22:59:09 +02003729 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02003730 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01003731 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003732 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00003733 return;
3734 }
3735 if (is_write) {
Peter Maydell5c9eb022015-04-26 16:49:24 +01003736 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3737 bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00003738 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00003739 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00003740 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02003741 memory_region_unref(bounce.mr);
Fam Zhengc2cba0f2015-03-16 17:03:33 +08003742 atomic_mb_set(&bounce.in_use, false);
aliguoriba223c22009-01-22 16:59:16 +00003743 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00003744}
bellardd0ecd2a2006-04-23 17:14:48 +00003745
Avi Kivitya8170e52012-10-23 12:30:10 +02003746void *cpu_physical_memory_map(hwaddr addr,
3747 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02003748 int is_write)
3749{
Peter Maydellf26404f2018-05-31 14:50:52 +01003750 return address_space_map(&address_space_memory, addr, plen, is_write,
3751 MEMTXATTRS_UNSPECIFIED);
Avi Kivityac1970f2012-10-03 16:22:53 +02003752}
3753
Avi Kivitya8170e52012-10-23 12:30:10 +02003754void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3755 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02003756{
3757 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3758}
3759
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003760#define ARG1_DECL AddressSpace *as
3761#define ARG1 as
3762#define SUFFIX
3763#define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
Paolo Bonzini0ce265f2016-11-22 11:34:02 +01003764#define RCU_READ_LOCK(...) rcu_read_lock()
3765#define RCU_READ_UNLOCK(...) rcu_read_unlock()
3766#include "memory_ldst.inc.c"
Alexander Graf1e78bcc2011-07-06 09:09:23 +02003767
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003768int64_t address_space_cache_init(MemoryRegionCache *cache,
3769 AddressSpace *as,
3770 hwaddr addr,
3771 hwaddr len,
3772 bool is_write)
3773{
Paolo Bonzini48564042018-03-18 18:26:36 +01003774 AddressSpaceDispatch *d;
3775 hwaddr l;
3776 MemoryRegion *mr;
3777
3778 assert(len > 0);
3779
3780 l = len;
3781 cache->fv = address_space_get_flatview(as);
3782 d = flatview_to_dispatch(cache->fv);
3783 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3784
3785 mr = cache->mrs.mr;
3786 memory_region_ref(mr);
3787 if (memory_access_is_direct(mr, is_write)) {
Peter Maydell53d07902018-05-31 14:50:52 +01003788 /* We don't care about the memory attributes here as we're only
3789 * doing this if we found actual RAM, which behaves the same
3790 * regardless of attributes; so UNSPECIFIED is fine.
3791 */
Paolo Bonzini48564042018-03-18 18:26:36 +01003792 l = flatview_extend_translation(cache->fv, addr, len, mr,
Peter Maydell53d07902018-05-31 14:50:52 +01003793 cache->xlat, l, is_write,
3794 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003795 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
3796 } else {
3797 cache->ptr = NULL;
3798 }
3799
3800 cache->len = l;
3801 cache->is_write = is_write;
3802 return l;
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003803}
3804
3805void address_space_cache_invalidate(MemoryRegionCache *cache,
3806 hwaddr addr,
3807 hwaddr access_len)
3808{
Paolo Bonzini48564042018-03-18 18:26:36 +01003809 assert(cache->is_write);
3810 if (likely(cache->ptr)) {
3811 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3812 }
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003813}
3814
3815void address_space_cache_destroy(MemoryRegionCache *cache)
3816{
Paolo Bonzini48564042018-03-18 18:26:36 +01003817 if (!cache->mrs.mr) {
3818 return;
3819 }
3820
3821 if (xen_enabled()) {
3822 xen_invalidate_map_cache_entry(cache->ptr);
3823 }
3824 memory_region_unref(cache->mrs.mr);
3825 flatview_unref(cache->fv);
3826 cache->mrs.mr = NULL;
3827 cache->fv = NULL;
3828}
3829
3830/* Called from RCU critical section. This function has the same
3831 * semantics as address_space_translate, but it only works on a
3832 * predefined range of a MemoryRegion that was mapped with
3833 * address_space_cache_init.
3834 */
3835static inline MemoryRegion *address_space_translate_cached(
3836 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003837 hwaddr *plen, bool is_write, MemTxAttrs attrs)
Paolo Bonzini48564042018-03-18 18:26:36 +01003838{
3839 MemoryRegionSection section;
3840 MemoryRegion *mr;
3841 IOMMUMemoryRegion *iommu_mr;
3842 AddressSpace *target_as;
3843
3844 assert(!cache->ptr);
3845 *xlat = addr + cache->xlat;
3846
3847 mr = cache->mrs.mr;
3848 iommu_mr = memory_region_get_iommu(mr);
3849 if (!iommu_mr) {
3850 /* MMIO region. */
3851 return mr;
3852 }
3853
3854 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3855 NULL, is_write, true,
Peter Maydell2f7b0092018-05-31 14:50:53 +01003856 &target_as, attrs);
Paolo Bonzini48564042018-03-18 18:26:36 +01003857 return section.mr;
3858}
3859
3860/* Called from RCU critical section. address_space_read_cached uses this
3861 * out of line function when the target is an MMIO or IOMMU region.
3862 */
3863void
3864address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003865 void *buf, hwaddr len)
Paolo Bonzini48564042018-03-18 18:26:36 +01003866{
3867 hwaddr addr1, l;
3868 MemoryRegion *mr;
3869
3870 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003871 mr = address_space_translate_cached(cache, addr, &addr1, &l, false,
3872 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003873 flatview_read_continue(cache->fv,
3874 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3875 addr1, l, mr);
3876}
3877
3878/* Called from RCU critical section. address_space_write_cached uses this
3879 * out of line function when the target is an MMIO or IOMMU region.
3880 */
3881void
3882address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003883 const void *buf, hwaddr len)
Paolo Bonzini48564042018-03-18 18:26:36 +01003884{
3885 hwaddr addr1, l;
3886 MemoryRegion *mr;
3887
3888 l = len;
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003889 mr = address_space_translate_cached(cache, addr, &addr1, &l, true,
3890 MEMTXATTRS_UNSPECIFIED);
Paolo Bonzini48564042018-03-18 18:26:36 +01003891 flatview_write_continue(cache->fv,
3892 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3893 addr1, l, mr);
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003894}
3895
3896#define ARG1_DECL MemoryRegionCache *cache
3897#define ARG1 cache
Paolo Bonzini48564042018-03-18 18:26:36 +01003898#define SUFFIX _cached_slow
3899#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
Paolo Bonzini48564042018-03-18 18:26:36 +01003900#define RCU_READ_LOCK() ((void)0)
3901#define RCU_READ_UNLOCK() ((void)0)
Paolo Bonzini1f4e4962016-11-22 12:04:52 +01003902#include "memory_ldst.inc.c"
3903
aliguori5e2972f2009-03-28 17:51:36 +00003904/* virtual memory access for debug (includes writing to ROM) */
Andreas Färberf17ec442013-06-29 19:40:58 +02003905int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
Li Zhijian0c249ff2019-01-17 20:49:01 +08003906 uint8_t *buf, target_ulong len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00003907{
Avi Kivitya8170e52012-10-23 12:30:10 +02003908 hwaddr phys_addr;
Li Zhijian0c249ff2019-01-17 20:49:01 +08003909 target_ulong l, page;
bellard13eb76e2004-01-24 15:23:36 +00003910
Christian Borntraeger79ca7a12017-03-07 15:19:08 +01003911 cpu_synchronize_state(cpu);
bellard13eb76e2004-01-24 15:23:36 +00003912 while (len > 0) {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003913 int asidx;
3914 MemTxAttrs attrs;
3915
bellard13eb76e2004-01-24 15:23:36 +00003916 page = addr & TARGET_PAGE_MASK;
Peter Maydell5232e4c2016-01-21 14:15:06 +00003917 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3918 asidx = cpu_asidx_from_attrs(cpu, attrs);
bellard13eb76e2004-01-24 15:23:36 +00003919 /* if no physical page mapped, return an error */
3920 if (phys_addr == -1)
3921 return -1;
3922 l = (page + TARGET_PAGE_SIZE) - addr;
3923 if (l > len)
3924 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00003925 phys_addr += (addr & ~TARGET_PAGE_MASK);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003926 if (is_write) {
Peter Maydell3c8133f2018-12-14 13:30:48 +00003927 address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
Peter Maydellea7a5332019-01-29 11:46:04 +00003928 attrs, buf, l);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003929 } else {
Peter Maydell5232e4c2016-01-21 14:15:06 +00003930 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
Peter Maydellea7a5332019-01-29 11:46:04 +00003931 attrs, buf, l, 0);
Edgar E. Iglesias2e388472013-12-13 16:31:02 +10003932 }
bellard13eb76e2004-01-24 15:23:36 +00003933 len -= l;
3934 buf += l;
3935 addr += l;
3936 }
3937 return 0;
3938}
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003939
3940/*
3941 * Allows code that needs to deal with migration bitmaps etc to still be built
3942 * target independent.
3943 */
Juan Quintela20afaed2017-03-21 09:09:14 +01003944size_t qemu_target_page_size(void)
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003945{
Juan Quintela20afaed2017-03-21 09:09:14 +01003946 return TARGET_PAGE_SIZE;
Dr. David Alan Gilbert038629a2015-11-05 18:10:29 +00003947}
3948
Juan Quintela46d702b2017-04-24 21:03:48 +02003949int qemu_target_page_bits(void)
3950{
3951 return TARGET_PAGE_BITS;
3952}
3953
3954int qemu_target_page_bits_min(void)
3955{
3956 return TARGET_PAGE_BITS_MIN;
3957}
Paul Brooka68fe892010-03-01 00:08:59 +00003958#endif
bellard13eb76e2004-01-24 15:23:36 +00003959
Greg Kurz98ed8ec2014-06-24 19:26:29 +02003960bool target_words_bigendian(void)
Blue Swirl8e4a4242013-01-06 18:30:17 +00003961{
3962#if defined(TARGET_WORDS_BIGENDIAN)
3963 return true;
3964#else
3965 return false;
3966#endif
3967}
3968
Wen Congyang76f35532012-05-07 12:04:18 +08003969#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02003970bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08003971{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003972 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02003973 hwaddr l = 1;
Paolo Bonzini41063e12015-03-18 14:21:43 +01003974 bool res;
Wen Congyang76f35532012-05-07 12:04:18 +08003975
Paolo Bonzini41063e12015-03-18 14:21:43 +01003976 rcu_read_lock();
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02003977 mr = address_space_translate(&address_space_memory,
Peter Maydellbc6b1ce2018-05-31 14:50:52 +01003978 phys_addr, &phys_addr, &l, false,
3979 MEMTXATTRS_UNSPECIFIED);
Wen Congyang76f35532012-05-07 12:04:18 +08003980
Paolo Bonzini41063e12015-03-18 14:21:43 +01003981 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3982 rcu_read_unlock();
3983 return res;
Wen Congyang76f35532012-05-07 12:04:18 +08003984}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003985
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003986int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003987{
3988 RAMBlock *block;
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003989 int ret = 0;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003990
Mike Day0dc3f442013-09-05 14:41:35 -04003991 rcu_read_lock();
Peter Xu99e15582017-05-12 12:17:39 +08003992 RAMBLOCK_FOREACH(block) {
Yury Kotov754cb9c2019-02-15 20:45:44 +03003993 ret = func(block, opaque);
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003994 if (ret) {
3995 break;
3996 }
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04003997 }
Mike Day0dc3f442013-09-05 14:41:35 -04003998 rcu_read_unlock();
Dr. David Alan Gilberte3807052015-05-21 13:24:13 +01003999 return ret;
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04004000}
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004001
4002/*
4003 * Unmap pages of memory from start to start+length such that
4004 * they a) read as 0, b) Trigger whatever fault mechanism
4005 * the OS provides for postcopy.
4006 * The pages must be unmapped by the end of the function.
4007 * Returns: 0 on success, none-0 on failure
4008 *
4009 */
4010int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
4011{
4012 int ret = -1;
4013
4014 uint8_t *host_startaddr = rb->host + start;
4015
4016 if ((uintptr_t)host_startaddr & (rb->page_size - 1)) {
4017 error_report("ram_block_discard_range: Unaligned start address: %p",
4018 host_startaddr);
4019 goto err;
4020 }
4021
4022 if ((start + length) <= rb->used_length) {
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004023 bool need_madvise, need_fallocate;
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004024 uint8_t *host_endaddr = host_startaddr + length;
4025 if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
4026 error_report("ram_block_discard_range: Unaligned end address: %p",
4027 host_endaddr);
4028 goto err;
4029 }
4030
4031 errno = ENOTSUP; /* If we are missing MADVISE etc */
4032
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004033 /* The logic here is messy;
4034 * madvise DONTNEED fails for hugepages
4035 * fallocate works on hugepages and shmem
4036 */
4037 need_madvise = (rb->page_size == qemu_host_page_size);
4038 need_fallocate = rb->fd != -1;
4039 if (need_fallocate) {
4040 /* For a file, this causes the area of the file to be zero'd
4041 * if read, and for hugetlbfs also causes it to be unmapped
4042 * so a userfault will trigger.
Dr. David Alan Gilberte2fa71f2017-02-24 18:28:33 +00004043 */
4044#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
4045 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
4046 start, length);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004047 if (ret) {
4048 ret = -errno;
4049 error_report("ram_block_discard_range: Failed to fallocate "
4050 "%s:%" PRIx64 " +%zx (%d)",
4051 rb->idstr, start, length, ret);
4052 goto err;
4053 }
4054#else
4055 ret = -ENOSYS;
4056 error_report("ram_block_discard_range: fallocate not available/file"
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004057 "%s:%" PRIx64 " +%zx (%d)",
4058 rb->idstr, start, length, ret);
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004059 goto err;
4060#endif
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004061 }
Dr. David Alan Gilbertdb144f72018-03-12 17:20:56 +00004062 if (need_madvise) {
4063 /* For normal RAM this causes it to be unmapped,
4064 * for shared memory it causes the local mapping to disappear
4065 * and to fall back on the file contents (which we just
4066 * fallocate'd away).
4067 */
4068#if defined(CONFIG_MADVISE)
4069 ret = madvise(host_startaddr, length, MADV_DONTNEED);
4070 if (ret) {
4071 ret = -errno;
4072 error_report("ram_block_discard_range: Failed to discard range "
4073 "%s:%" PRIx64 " +%zx (%d)",
4074 rb->idstr, start, length, ret);
4075 goto err;
4076 }
4077#else
4078 ret = -ENOSYS;
4079 error_report("ram_block_discard_range: MADVISE not available"
4080 "%s:%" PRIx64 " +%zx (%d)",
4081 rb->idstr, start, length, ret);
4082 goto err;
4083#endif
4084 }
4085 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
4086 need_madvise, need_fallocate, ret);
Dr. David Alan Gilbertd3a50382017-02-24 18:28:32 +00004087 } else {
4088 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
4089 "/%zx/" RAM_ADDR_FMT")",
4090 rb->idstr, start, length, rb->used_length);
4091 }
4092
4093err:
4094 return ret;
4095}
4096
Junyan Hea4de8552018-07-18 15:48:00 +08004097bool ramblock_is_pmem(RAMBlock *rb)
4098{
4099 return rb->flags & RAM_PMEM;
4100}
4101
Peter Maydellec3f8c92013-06-27 20:53:38 +01004102#endif
Yang Zhonga0be0c52017-07-03 18:12:13 +08004103
4104void page_size_init(void)
4105{
4106 /* NOTE: we can always suppose that qemu_host_page_size >=
4107 TARGET_PAGE_SIZE */
Yang Zhonga0be0c52017-07-03 18:12:13 +08004108 if (qemu_host_page_size == 0) {
4109 qemu_host_page_size = qemu_real_host_page_size;
4110 }
4111 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
4112 qemu_host_page_size = TARGET_PAGE_SIZE;
4113 }
4114 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
4115}
Alexey Kardashevskiy5e8fd942017-09-21 18:51:06 +10004116
4117#if !defined(CONFIG_USER_ONLY)
4118
4119static void mtree_print_phys_entries(fprintf_function mon, void *f,
4120 int start, int end, int skip, int ptr)
4121{
4122 if (start == end - 1) {
4123 mon(f, "\t%3d ", start);
4124 } else {
4125 mon(f, "\t%3d..%-3d ", start, end - 1);
4126 }
4127 mon(f, " skip=%d ", skip);
4128 if (ptr == PHYS_MAP_NODE_NIL) {
4129 mon(f, " ptr=NIL");
4130 } else if (!skip) {
4131 mon(f, " ptr=#%d", ptr);
4132 } else {
4133 mon(f, " ptr=[%d]", ptr);
4134 }
4135 mon(f, "\n");
4136}
4137
4138#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4139 int128_sub((size), int128_one())) : 0)
4140
4141void mtree_print_dispatch(fprintf_function mon, void *f,
4142 AddressSpaceDispatch *d, MemoryRegion *root)
4143{
4144 int i;
4145
4146 mon(f, " Dispatch\n");
4147 mon(f, " Physical sections\n");
4148
4149 for (i = 0; i < d->map.sections_nb; ++i) {
4150 MemoryRegionSection *s = d->map.sections + i;
4151 const char *names[] = { " [unassigned]", " [not dirty]",
4152 " [ROM]", " [watch]" };
4153
4154 mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s",
4155 i,
4156 s->offset_within_address_space,
4157 s->offset_within_address_space + MR_SIZE(s->mr->size),
4158 s->mr->name ? s->mr->name : "(noname)",
4159 i < ARRAY_SIZE(names) ? names[i] : "",
4160 s->mr == root ? " [ROOT]" : "",
4161 s == d->mru_section ? " [MRU]" : "",
4162 s->mr->is_iommu ? " [iommu]" : "");
4163
4164 if (s->mr->alias) {
4165 mon(f, " alias=%s", s->mr->alias->name ?
4166 s->mr->alias->name : "noname");
4167 }
4168 mon(f, "\n");
4169 }
4170
4171 mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4172 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
4173 for (i = 0; i < d->map.nodes_nb; ++i) {
4174 int j, jprev;
4175 PhysPageEntry prev;
4176 Node *n = d->map.nodes + i;
4177
4178 mon(f, " [%d]\n", i);
4179
4180 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
4181 PhysPageEntry *pe = *n + j;
4182
4183 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
4184 continue;
4185 }
4186
4187 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4188
4189 jprev = j;
4190 prev = *pe;
4191 }
4192
4193 if (jprev != ARRAY_SIZE(*n)) {
4194 mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr);
4195 }
4196 }
4197}
4198
4199#endif