bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1 | /* |
bellard | 3fc6c08 | 2005-07-02 20:59:34 +0000 | [diff] [blame] | 2 | * PowerPC emulation helpers for qemu. |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
aurel32 | fad6cb1 | 2009-01-04 22:05:52 +0000 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 19 | */ |
aurel32 | 7b239be | 2009-01-04 22:09:19 +0000 | [diff] [blame] | 20 | #include <string.h> |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 21 | #include "exec.h" |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 22 | #include "host-utils.h" |
pbrook | a7812ae | 2008-11-17 14:43:54 +0000 | [diff] [blame] | 23 | #include "helper.h" |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 24 | |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 25 | #include "helper_regs.h" |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 26 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 27 | //#define DEBUG_OP |
| 28 | //#define DEBUG_EXCEPTIONS |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 29 | //#define DEBUG_SOFTWARE_TLB |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 30 | |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 31 | /*****************************************************************************/ |
| 32 | /* Exceptions processing helpers */ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 33 | |
aurel32 | 64adab3 | 2008-11-22 10:09:17 +0000 | [diff] [blame] | 34 | void helper_raise_exception_err (uint32_t exception, uint32_t error_code) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 35 | { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 36 | #if 0 |
| 37 | printf("Raise exception %3x code : %d\n", exception, error_code); |
| 38 | #endif |
| 39 | env->exception_index = exception; |
| 40 | env->error_code = error_code; |
| 41 | cpu_loop_exit(); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 42 | } |
bellard | 9fddaa0 | 2004-05-21 12:59:32 +0000 | [diff] [blame] | 43 | |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 44 | void helper_raise_exception (uint32_t exception) |
bellard | 9fddaa0 | 2004-05-21 12:59:32 +0000 | [diff] [blame] | 45 | { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 46 | helper_raise_exception_err(exception, 0); |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 47 | } |
| 48 | |
| 49 | /*****************************************************************************/ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 50 | /* Registers load and stores */ |
pbrook | a7812ae | 2008-11-17 14:43:54 +0000 | [diff] [blame] | 51 | target_ulong helper_load_cr (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 52 | { |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 53 | return (env->crf[0] << 28) | |
| 54 | (env->crf[1] << 24) | |
| 55 | (env->crf[2] << 20) | |
| 56 | (env->crf[3] << 16) | |
| 57 | (env->crf[4] << 12) | |
| 58 | (env->crf[5] << 8) | |
| 59 | (env->crf[6] << 4) | |
| 60 | (env->crf[7] << 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 61 | } |
| 62 | |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 63 | void helper_store_cr (target_ulong val, uint32_t mask) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 64 | { |
| 65 | int i, sh; |
| 66 | |
j_mayer | 3608160 | 2007-09-17 08:21:54 +0000 | [diff] [blame] | 67 | for (i = 0, sh = 7; i < 8; i++, sh--) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 68 | if (mask & (1 << sh)) |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 69 | env->crf[i] = (val >> (sh * 4)) & 0xFUL; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 70 | } |
| 71 | } |
| 72 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 73 | /*****************************************************************************/ |
| 74 | /* SPR accesses */ |
| 75 | void helper_load_dump_spr (uint32_t sprn) |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 76 | { |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 77 | if (loglevel != 0) { |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 78 | fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
| 79 | sprn, sprn, env->spr[sprn]); |
| 80 | } |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 81 | } |
| 82 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 83 | void helper_store_dump_spr (uint32_t sprn) |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 84 | { |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 85 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 86 | fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n", |
| 87 | sprn, sprn, env->spr[sprn]); |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 88 | } |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 89 | } |
| 90 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 91 | target_ulong helper_load_tbl (void) |
| 92 | { |
| 93 | return cpu_ppc_load_tbl(env); |
| 94 | } |
| 95 | |
| 96 | target_ulong helper_load_tbu (void) |
| 97 | { |
| 98 | return cpu_ppc_load_tbu(env); |
| 99 | } |
| 100 | |
| 101 | target_ulong helper_load_atbl (void) |
| 102 | { |
| 103 | return cpu_ppc_load_atbl(env); |
| 104 | } |
| 105 | |
| 106 | target_ulong helper_load_atbu (void) |
| 107 | { |
| 108 | return cpu_ppc_load_atbu(env); |
| 109 | } |
| 110 | |
| 111 | target_ulong helper_load_601_rtcl (void) |
| 112 | { |
| 113 | return cpu_ppc601_load_rtcl(env); |
| 114 | } |
| 115 | |
| 116 | target_ulong helper_load_601_rtcu (void) |
| 117 | { |
| 118 | return cpu_ppc601_load_rtcu(env); |
| 119 | } |
| 120 | |
| 121 | #if !defined(CONFIG_USER_ONLY) |
| 122 | #if defined (TARGET_PPC64) |
| 123 | void helper_store_asr (target_ulong val) |
| 124 | { |
| 125 | ppc_store_asr(env, val); |
| 126 | } |
| 127 | #endif |
| 128 | |
| 129 | void helper_store_sdr1 (target_ulong val) |
| 130 | { |
| 131 | ppc_store_sdr1(env, val); |
| 132 | } |
| 133 | |
| 134 | void helper_store_tbl (target_ulong val) |
| 135 | { |
| 136 | cpu_ppc_store_tbl(env, val); |
| 137 | } |
| 138 | |
| 139 | void helper_store_tbu (target_ulong val) |
| 140 | { |
| 141 | cpu_ppc_store_tbu(env, val); |
| 142 | } |
| 143 | |
| 144 | void helper_store_atbl (target_ulong val) |
| 145 | { |
| 146 | cpu_ppc_store_atbl(env, val); |
| 147 | } |
| 148 | |
| 149 | void helper_store_atbu (target_ulong val) |
| 150 | { |
| 151 | cpu_ppc_store_atbu(env, val); |
| 152 | } |
| 153 | |
| 154 | void helper_store_601_rtcl (target_ulong val) |
| 155 | { |
| 156 | cpu_ppc601_store_rtcl(env, val); |
| 157 | } |
| 158 | |
| 159 | void helper_store_601_rtcu (target_ulong val) |
| 160 | { |
| 161 | cpu_ppc601_store_rtcu(env, val); |
| 162 | } |
| 163 | |
| 164 | target_ulong helper_load_decr (void) |
| 165 | { |
| 166 | return cpu_ppc_load_decr(env); |
| 167 | } |
| 168 | |
| 169 | void helper_store_decr (target_ulong val) |
| 170 | { |
| 171 | cpu_ppc_store_decr(env, val); |
| 172 | } |
| 173 | |
| 174 | void helper_store_hid0_601 (target_ulong val) |
| 175 | { |
| 176 | target_ulong hid0; |
| 177 | |
| 178 | hid0 = env->spr[SPR_HID0]; |
| 179 | if ((val ^ hid0) & 0x00000008) { |
| 180 | /* Change current endianness */ |
| 181 | env->hflags &= ~(1 << MSR_LE); |
| 182 | env->hflags_nmsr &= ~(1 << MSR_LE); |
| 183 | env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); |
| 184 | env->hflags |= env->hflags_nmsr; |
| 185 | if (loglevel != 0) { |
| 186 | fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n", |
| 187 | __func__, val & 0x8 ? 'l' : 'b', env->hflags); |
| 188 | } |
| 189 | } |
| 190 | env->spr[SPR_HID0] = (uint32_t)val; |
| 191 | } |
| 192 | |
| 193 | void helper_store_403_pbr (uint32_t num, target_ulong value) |
| 194 | { |
| 195 | if (likely(env->pb[num] != value)) { |
| 196 | env->pb[num] = value; |
| 197 | /* Should be optimized */ |
| 198 | tlb_flush(env, 1); |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | target_ulong helper_load_40x_pit (void) |
| 203 | { |
| 204 | return load_40x_pit(env); |
| 205 | } |
| 206 | |
| 207 | void helper_store_40x_pit (target_ulong val) |
| 208 | { |
| 209 | store_40x_pit(env, val); |
| 210 | } |
| 211 | |
| 212 | void helper_store_40x_dbcr0 (target_ulong val) |
| 213 | { |
| 214 | store_40x_dbcr0(env, val); |
| 215 | } |
| 216 | |
| 217 | void helper_store_40x_sler (target_ulong val) |
| 218 | { |
| 219 | store_40x_sler(env, val); |
| 220 | } |
| 221 | |
| 222 | void helper_store_booke_tcr (target_ulong val) |
| 223 | { |
| 224 | store_booke_tcr(env, val); |
| 225 | } |
| 226 | |
| 227 | void helper_store_booke_tsr (target_ulong val) |
| 228 | { |
| 229 | store_booke_tsr(env, val); |
| 230 | } |
| 231 | |
| 232 | void helper_store_ibatu (uint32_t nr, target_ulong val) |
| 233 | { |
| 234 | ppc_store_ibatu(env, nr, val); |
| 235 | } |
| 236 | |
| 237 | void helper_store_ibatl (uint32_t nr, target_ulong val) |
| 238 | { |
| 239 | ppc_store_ibatl(env, nr, val); |
| 240 | } |
| 241 | |
| 242 | void helper_store_dbatu (uint32_t nr, target_ulong val) |
| 243 | { |
| 244 | ppc_store_dbatu(env, nr, val); |
| 245 | } |
| 246 | |
| 247 | void helper_store_dbatl (uint32_t nr, target_ulong val) |
| 248 | { |
| 249 | ppc_store_dbatl(env, nr, val); |
| 250 | } |
| 251 | |
| 252 | void helper_store_601_batl (uint32_t nr, target_ulong val) |
| 253 | { |
| 254 | ppc_store_ibatl_601(env, nr, val); |
| 255 | } |
| 256 | |
| 257 | void helper_store_601_batu (uint32_t nr, target_ulong val) |
| 258 | { |
| 259 | ppc_store_ibatu_601(env, nr, val); |
| 260 | } |
| 261 | #endif |
| 262 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 263 | /*****************************************************************************/ |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 264 | /* Memory load and stores */ |
| 265 | |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 266 | static always_inline target_ulong addr_add(target_ulong addr, target_long arg) |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 267 | { |
| 268 | #if defined(TARGET_PPC64) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 269 | if (!msr_sf) |
| 270 | return (uint32_t)(addr + arg); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 271 | else |
| 272 | #endif |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 273 | return addr + arg; |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | void helper_lmw (target_ulong addr, uint32_t reg) |
| 277 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 278 | for (; reg < 32; reg++) { |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 279 | if (msr_le) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 280 | env->gpr[reg] = bswap32(ldl(addr)); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 281 | else |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 282 | env->gpr[reg] = ldl(addr); |
| 283 | addr = addr_add(addr, 4); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 284 | } |
| 285 | } |
| 286 | |
| 287 | void helper_stmw (target_ulong addr, uint32_t reg) |
| 288 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 289 | for (; reg < 32; reg++) { |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 290 | if (msr_le) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 291 | stl(addr, bswap32((uint32_t)env->gpr[reg])); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 292 | else |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 293 | stl(addr, (uint32_t)env->gpr[reg]); |
| 294 | addr = addr_add(addr, 4); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 295 | } |
| 296 | } |
| 297 | |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 298 | void helper_lsw(target_ulong addr, uint32_t nb, uint32_t reg) |
| 299 | { |
| 300 | int sh; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 301 | for (; nb > 3; nb -= 4) { |
| 302 | env->gpr[reg] = ldl(addr); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 303 | reg = (reg + 1) % 32; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 304 | addr = addr_add(addr, 4); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 305 | } |
| 306 | if (unlikely(nb > 0)) { |
| 307 | env->gpr[reg] = 0; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 308 | for (sh = 24; nb > 0; nb--, sh -= 8) { |
| 309 | env->gpr[reg] |= ldub(addr) << sh; |
| 310 | addr = addr_add(addr, 1); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 311 | } |
| 312 | } |
| 313 | } |
| 314 | /* PPC32 specification says we must generate an exception if |
| 315 | * rA is in the range of registers to be loaded. |
| 316 | * In an other hand, IBM says this is valid, but rA won't be loaded. |
| 317 | * For now, I'll follow the spec... |
| 318 | */ |
| 319 | void helper_lswx(target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) |
| 320 | { |
| 321 | if (likely(xer_bc != 0)) { |
| 322 | if (unlikely((ra != 0 && reg < ra && (reg + xer_bc) > ra) || |
| 323 | (reg < rb && (reg + xer_bc) > rb))) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 324 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 325 | POWERPC_EXCP_INVAL | |
| 326 | POWERPC_EXCP_INVAL_LSWX); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 327 | } else { |
| 328 | helper_lsw(addr, xer_bc, reg); |
| 329 | } |
| 330 | } |
| 331 | } |
| 332 | |
| 333 | void helper_stsw(target_ulong addr, uint32_t nb, uint32_t reg) |
| 334 | { |
| 335 | int sh; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 336 | for (; nb > 3; nb -= 4) { |
| 337 | stl(addr, env->gpr[reg]); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 338 | reg = (reg + 1) % 32; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 339 | addr = addr_add(addr, 4); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 340 | } |
| 341 | if (unlikely(nb > 0)) { |
aurel32 | a16b45e | 2008-12-29 09:46:58 +0000 | [diff] [blame] | 342 | for (sh = 24; nb > 0; nb--, sh -= 8) { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 343 | stb(addr, (env->gpr[reg] >> sh) & 0xFF); |
aurel32 | a16b45e | 2008-12-29 09:46:58 +0000 | [diff] [blame] | 344 | addr = addr_add(addr, 1); |
| 345 | } |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 346 | } |
| 347 | } |
| 348 | |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 349 | static void do_dcbz(target_ulong addr, int dcache_line_size) |
| 350 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 351 | addr &= ~(dcache_line_size - 1); |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 352 | int i; |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 353 | for (i = 0 ; i < dcache_line_size ; i += 4) { |
aurel32 | dcc532c | 2008-11-30 17:54:21 +0000 | [diff] [blame] | 354 | stl(addr + i , 0); |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 355 | } |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 356 | if (env->reserve == addr) |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 357 | env->reserve = (target_ulong)-1ULL; |
| 358 | } |
| 359 | |
| 360 | void helper_dcbz(target_ulong addr) |
| 361 | { |
| 362 | do_dcbz(addr, env->dcache_line_size); |
| 363 | } |
| 364 | |
| 365 | void helper_dcbz_970(target_ulong addr) |
| 366 | { |
| 367 | if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) |
| 368 | do_dcbz(addr, 32); |
| 369 | else |
| 370 | do_dcbz(addr, env->dcache_line_size); |
| 371 | } |
| 372 | |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 373 | void helper_icbi(target_ulong addr) |
| 374 | { |
| 375 | uint32_t tmp; |
| 376 | |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 377 | addr &= ~(env->dcache_line_size - 1); |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 378 | /* Invalidate one cache line : |
| 379 | * PowerPC specification says this is to be treated like a load |
| 380 | * (not a fetch) by the MMU. To be sure it will be so, |
| 381 | * do the load "by hand". |
| 382 | */ |
aurel32 | dcc532c | 2008-11-30 17:54:21 +0000 | [diff] [blame] | 383 | tmp = ldl(addr); |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 384 | tb_invalidate_page_range(addr, addr + env->icache_line_size); |
| 385 | } |
| 386 | |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 387 | // XXX: to be tested |
| 388 | target_ulong helper_lscbx (target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) |
| 389 | { |
| 390 | int i, c, d; |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 391 | d = 24; |
| 392 | for (i = 0; i < xer_bc; i++) { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 393 | c = ldub(addr); |
| 394 | addr = addr_add(addr, 1); |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 395 | /* ra (if not 0) and rb are never modified */ |
| 396 | if (likely(reg != rb && (ra == 0 || reg != ra))) { |
| 397 | env->gpr[reg] = (env->gpr[reg] & ~(0xFF << d)) | (c << d); |
| 398 | } |
| 399 | if (unlikely(c == xer_cmp)) |
| 400 | break; |
| 401 | if (likely(d != 0)) { |
| 402 | d -= 8; |
| 403 | } else { |
| 404 | d = 24; |
| 405 | reg++; |
| 406 | reg = reg & 0x1F; |
| 407 | } |
| 408 | } |
| 409 | return i; |
| 410 | } |
| 411 | |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 412 | /*****************************************************************************/ |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 413 | /* Fixed point operations helpers */ |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 414 | #if defined(TARGET_PPC64) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 415 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 416 | /* multiply high word */ |
| 417 | uint64_t helper_mulhd (uint64_t arg1, uint64_t arg2) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 418 | { |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 419 | uint64_t tl, th; |
| 420 | |
| 421 | muls64(&tl, &th, arg1, arg2); |
| 422 | return th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 423 | } |
| 424 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 425 | /* multiply high word unsigned */ |
| 426 | uint64_t helper_mulhdu (uint64_t arg1, uint64_t arg2) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 427 | { |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 428 | uint64_t tl, th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 429 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 430 | mulu64(&tl, &th, arg1, arg2); |
| 431 | return th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 432 | } |
| 433 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 434 | uint64_t helper_mulldo (uint64_t arg1, uint64_t arg2) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 435 | { |
| 436 | int64_t th; |
| 437 | uint64_t tl; |
| 438 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 439 | muls64(&tl, (uint64_t *)&th, arg1, arg2); |
j_mayer | 88ad920 | 2007-10-25 23:36:08 +0000 | [diff] [blame] | 440 | /* If th != 0 && th != -1, then we had an overflow */ |
j_mayer | 6f2d897 | 2007-11-12 00:04:48 +0000 | [diff] [blame] | 441 | if (likely((uint64_t)(th + 1) <= 1)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 442 | env->xer &= ~(1 << XER_OV); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 443 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 444 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 445 | } |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 446 | return (int64_t)tl; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 447 | } |
| 448 | #endif |
| 449 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 450 | target_ulong helper_cntlzw (target_ulong t) |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 451 | { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 452 | return clz32(t); |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 456 | target_ulong helper_cntlzd (target_ulong t) |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 457 | { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 458 | return clz64(t); |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 459 | } |
| 460 | #endif |
| 461 | |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 462 | /* shift right arithmetic helper */ |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 463 | target_ulong helper_sraw (target_ulong value, target_ulong shift) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 464 | { |
| 465 | int32_t ret; |
| 466 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 467 | if (likely(!(shift & 0x20))) { |
| 468 | if (likely((uint32_t)shift != 0)) { |
| 469 | shift &= 0x1f; |
| 470 | ret = (int32_t)value >> shift; |
| 471 | if (likely(ret >= 0 || (value & ((1 << shift) - 1)) == 0)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 472 | env->xer &= ~(1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 473 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 474 | env->xer |= (1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 475 | } |
| 476 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 477 | ret = (int32_t)value; |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 478 | env->xer &= ~(1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 479 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 480 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 481 | ret = (int32_t)value >> 31; |
| 482 | if (ret) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 483 | env->xer |= (1 << XER_CA); |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 484 | } else { |
| 485 | env->xer &= ~(1 << XER_CA); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 486 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 487 | } |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 488 | return (target_long)ret; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 489 | } |
| 490 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 491 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 492 | target_ulong helper_srad (target_ulong value, target_ulong shift) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 493 | { |
| 494 | int64_t ret; |
| 495 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 496 | if (likely(!(shift & 0x40))) { |
| 497 | if (likely((uint64_t)shift != 0)) { |
| 498 | shift &= 0x3f; |
| 499 | ret = (int64_t)value >> shift; |
| 500 | if (likely(ret >= 0 || (value & ((1 << shift) - 1)) == 0)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 501 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 502 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 503 | env->xer |= (1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 504 | } |
| 505 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 506 | ret = (int64_t)value; |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 507 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 508 | } |
| 509 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 510 | ret = (int64_t)value >> 63; |
| 511 | if (ret) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 512 | env->xer |= (1 << XER_CA); |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 513 | } else { |
| 514 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 515 | } |
| 516 | } |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 517 | return ret; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 518 | } |
| 519 | #endif |
| 520 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 521 | target_ulong helper_popcntb (target_ulong val) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 522 | { |
aurel32 | 6176a26 | 2008-11-01 00:54:33 +0000 | [diff] [blame] | 523 | val = (val & 0x55555555) + ((val >> 1) & 0x55555555); |
| 524 | val = (val & 0x33333333) + ((val >> 2) & 0x33333333); |
| 525 | val = (val & 0x0f0f0f0f) + ((val >> 4) & 0x0f0f0f0f); |
| 526 | return val; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 527 | } |
| 528 | |
| 529 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 530 | target_ulong helper_popcntb_64 (target_ulong val) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 531 | { |
aurel32 | 6176a26 | 2008-11-01 00:54:33 +0000 | [diff] [blame] | 532 | val = (val & 0x5555555555555555ULL) + ((val >> 1) & 0x5555555555555555ULL); |
| 533 | val = (val & 0x3333333333333333ULL) + ((val >> 2) & 0x3333333333333333ULL); |
| 534 | val = (val & 0x0f0f0f0f0f0f0f0fULL) + ((val >> 4) & 0x0f0f0f0f0f0f0f0fULL); |
| 535 | return val; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 536 | } |
| 537 | #endif |
| 538 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 539 | /*****************************************************************************/ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 540 | /* Floating point operations helpers */ |
aurel32 | a0d7d5a | 2008-11-23 16:30:50 +0000 | [diff] [blame] | 541 | uint64_t helper_float32_to_float64(uint32_t arg) |
| 542 | { |
| 543 | CPU_FloatU f; |
| 544 | CPU_DoubleU d; |
| 545 | f.l = arg; |
| 546 | d.d = float32_to_float64(f.f, &env->fp_status); |
| 547 | return d.ll; |
| 548 | } |
| 549 | |
| 550 | uint32_t helper_float64_to_float32(uint64_t arg) |
| 551 | { |
| 552 | CPU_FloatU f; |
| 553 | CPU_DoubleU d; |
| 554 | d.ll = arg; |
| 555 | f.f = float64_to_float32(d.d, &env->fp_status); |
| 556 | return f.l; |
| 557 | } |
| 558 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 559 | static always_inline int isden (float64 d) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 560 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 561 | CPU_DoubleU u; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 562 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 563 | u.d = d; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 564 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 565 | return ((u.ll >> 52) & 0x7FF) == 0; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 566 | } |
| 567 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 568 | uint32_t helper_compute_fprf (uint64_t arg, uint32_t set_fprf) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 569 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 570 | CPU_DoubleU farg; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 571 | int isneg; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 572 | int ret; |
| 573 | farg.ll = arg; |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 574 | isneg = float64_is_neg(farg.d); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 575 | if (unlikely(float64_is_nan(farg.d))) { |
| 576 | if (float64_is_signaling_nan(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 577 | /* Signaling NaN: flags are undefined */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 578 | ret = 0x00; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 579 | } else { |
| 580 | /* Quiet NaN */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 581 | ret = 0x11; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 582 | } |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 583 | } else if (unlikely(float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 584 | /* +/- infinity */ |
| 585 | if (isneg) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 586 | ret = 0x09; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 587 | else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 588 | ret = 0x05; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 589 | } else { |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 590 | if (float64_is_zero(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 591 | /* +/- zero */ |
| 592 | if (isneg) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 593 | ret = 0x12; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 594 | else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 595 | ret = 0x02; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 596 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 597 | if (isden(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 598 | /* Denormalized numbers */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 599 | ret = 0x10; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 600 | } else { |
| 601 | /* Normalized numbers */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 602 | ret = 0x00; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 603 | } |
| 604 | if (isneg) { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 605 | ret |= 0x08; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 606 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 607 | ret |= 0x04; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 608 | } |
| 609 | } |
| 610 | } |
| 611 | if (set_fprf) { |
| 612 | /* We update FPSCR_FPRF */ |
| 613 | env->fpscr &= ~(0x1F << FPSCR_FPRF); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 614 | env->fpscr |= ret << FPSCR_FPRF; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 615 | } |
| 616 | /* We just need fpcc to update Rc1 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 617 | return ret & 0xF; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 618 | } |
| 619 | |
| 620 | /* Floating-point invalid operations exception */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 621 | static always_inline uint64_t fload_invalid_op_excp (int op) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 622 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 623 | uint64_t ret = 0; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 624 | int ve; |
| 625 | |
| 626 | ve = fpscr_ve; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 627 | switch (op) { |
| 628 | case POWERPC_EXCP_FP_VXSNAN: |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 629 | env->fpscr |= 1 << FPSCR_VXSNAN; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 630 | break; |
| 631 | case POWERPC_EXCP_FP_VXSOFT: |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 632 | env->fpscr |= 1 << FPSCR_VXSOFT; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 633 | break; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 634 | case POWERPC_EXCP_FP_VXISI: |
| 635 | /* Magnitude subtraction of infinities */ |
| 636 | env->fpscr |= 1 << FPSCR_VXISI; |
| 637 | goto update_arith; |
| 638 | case POWERPC_EXCP_FP_VXIDI: |
| 639 | /* Division of infinity by infinity */ |
| 640 | env->fpscr |= 1 << FPSCR_VXIDI; |
| 641 | goto update_arith; |
| 642 | case POWERPC_EXCP_FP_VXZDZ: |
| 643 | /* Division of zero by zero */ |
| 644 | env->fpscr |= 1 << FPSCR_VXZDZ; |
| 645 | goto update_arith; |
| 646 | case POWERPC_EXCP_FP_VXIMZ: |
| 647 | /* Multiplication of zero by infinity */ |
| 648 | env->fpscr |= 1 << FPSCR_VXIMZ; |
| 649 | goto update_arith; |
| 650 | case POWERPC_EXCP_FP_VXVC: |
| 651 | /* Ordered comparison of NaN */ |
| 652 | env->fpscr |= 1 << FPSCR_VXVC; |
| 653 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 654 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 655 | /* We must update the target FPR before raising the exception */ |
| 656 | if (ve != 0) { |
| 657 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 658 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_VXVC; |
| 659 | /* Update the floating-point enabled exception summary */ |
| 660 | env->fpscr |= 1 << FPSCR_FEX; |
| 661 | /* Exception is differed */ |
| 662 | ve = 0; |
| 663 | } |
| 664 | break; |
| 665 | case POWERPC_EXCP_FP_VXSQRT: |
| 666 | /* Square root of a negative number */ |
| 667 | env->fpscr |= 1 << FPSCR_VXSQRT; |
| 668 | update_arith: |
| 669 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 670 | if (ve == 0) { |
| 671 | /* Set the result to quiet NaN */ |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 672 | ret = 0xFFF8000000000000ULL; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 673 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 674 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 675 | } |
| 676 | break; |
| 677 | case POWERPC_EXCP_FP_VXCVI: |
| 678 | /* Invalid conversion */ |
| 679 | env->fpscr |= 1 << FPSCR_VXCVI; |
| 680 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 681 | if (ve == 0) { |
| 682 | /* Set the result to quiet NaN */ |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 683 | ret = 0xFFF8000000000000ULL; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 684 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 685 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 686 | } |
| 687 | break; |
| 688 | } |
| 689 | /* Update the floating-point invalid operation summary */ |
| 690 | env->fpscr |= 1 << FPSCR_VX; |
| 691 | /* Update the floating-point exception summary */ |
| 692 | env->fpscr |= 1 << FPSCR_FX; |
| 693 | if (ve != 0) { |
| 694 | /* Update the floating-point enabled exception summary */ |
| 695 | env->fpscr |= 1 << FPSCR_FEX; |
| 696 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 697 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 698 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 699 | return ret; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 700 | } |
| 701 | |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 702 | static always_inline void float_zero_divide_excp (void) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 703 | { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 704 | env->fpscr |= 1 << FPSCR_ZX; |
| 705 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 706 | /* Update the floating-point exception summary */ |
| 707 | env->fpscr |= 1 << FPSCR_FX; |
| 708 | if (fpscr_ze != 0) { |
| 709 | /* Update the floating-point enabled exception summary */ |
| 710 | env->fpscr |= 1 << FPSCR_FEX; |
| 711 | if (msr_fe0 != 0 || msr_fe1 != 0) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 712 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 713 | POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 714 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 715 | } |
| 716 | } |
| 717 | |
| 718 | static always_inline void float_overflow_excp (void) |
| 719 | { |
| 720 | env->fpscr |= 1 << FPSCR_OX; |
| 721 | /* Update the floating-point exception summary */ |
| 722 | env->fpscr |= 1 << FPSCR_FX; |
| 723 | if (fpscr_oe != 0) { |
| 724 | /* XXX: should adjust the result */ |
| 725 | /* Update the floating-point enabled exception summary */ |
| 726 | env->fpscr |= 1 << FPSCR_FEX; |
| 727 | /* We must update the target FPR before raising the exception */ |
| 728 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 729 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX; |
| 730 | } else { |
| 731 | env->fpscr |= 1 << FPSCR_XX; |
| 732 | env->fpscr |= 1 << FPSCR_FI; |
| 733 | } |
| 734 | } |
| 735 | |
| 736 | static always_inline void float_underflow_excp (void) |
| 737 | { |
| 738 | env->fpscr |= 1 << FPSCR_UX; |
| 739 | /* Update the floating-point exception summary */ |
| 740 | env->fpscr |= 1 << FPSCR_FX; |
| 741 | if (fpscr_ue != 0) { |
| 742 | /* XXX: should adjust the result */ |
| 743 | /* Update the floating-point enabled exception summary */ |
| 744 | env->fpscr |= 1 << FPSCR_FEX; |
| 745 | /* We must update the target FPR before raising the exception */ |
| 746 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 747 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX; |
| 748 | } |
| 749 | } |
| 750 | |
| 751 | static always_inline void float_inexact_excp (void) |
| 752 | { |
| 753 | env->fpscr |= 1 << FPSCR_XX; |
| 754 | /* Update the floating-point exception summary */ |
| 755 | env->fpscr |= 1 << FPSCR_FX; |
| 756 | if (fpscr_xe != 0) { |
| 757 | /* Update the floating-point enabled exception summary */ |
| 758 | env->fpscr |= 1 << FPSCR_FEX; |
| 759 | /* We must update the target FPR before raising the exception */ |
| 760 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 761 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX; |
| 762 | } |
| 763 | } |
| 764 | |
| 765 | static always_inline void fpscr_set_rounding_mode (void) |
| 766 | { |
| 767 | int rnd_type; |
| 768 | |
| 769 | /* Set rounding mode */ |
| 770 | switch (fpscr_rn) { |
| 771 | case 0: |
| 772 | /* Best approximation (round to nearest) */ |
| 773 | rnd_type = float_round_nearest_even; |
| 774 | break; |
| 775 | case 1: |
| 776 | /* Smaller magnitude (round toward zero) */ |
| 777 | rnd_type = float_round_to_zero; |
| 778 | break; |
| 779 | case 2: |
| 780 | /* Round toward +infinite */ |
| 781 | rnd_type = float_round_up; |
| 782 | break; |
| 783 | default: |
| 784 | case 3: |
| 785 | /* Round toward -infinite */ |
| 786 | rnd_type = float_round_down; |
| 787 | break; |
| 788 | } |
| 789 | set_float_rounding_mode(rnd_type, &env->fp_status); |
| 790 | } |
| 791 | |
aurel32 | 6e35d52 | 2008-12-14 18:40:58 +0000 | [diff] [blame] | 792 | void helper_fpscr_clrbit (uint32_t bit) |
| 793 | { |
| 794 | int prev; |
| 795 | |
| 796 | prev = (env->fpscr >> bit) & 1; |
| 797 | env->fpscr &= ~(1 << bit); |
| 798 | if (prev == 1) { |
| 799 | switch (bit) { |
| 800 | case FPSCR_RN1: |
| 801 | case FPSCR_RN: |
| 802 | fpscr_set_rounding_mode(); |
| 803 | break; |
| 804 | default: |
| 805 | break; |
| 806 | } |
| 807 | } |
| 808 | } |
| 809 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 810 | void helper_fpscr_setbit (uint32_t bit) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 811 | { |
| 812 | int prev; |
| 813 | |
| 814 | prev = (env->fpscr >> bit) & 1; |
| 815 | env->fpscr |= 1 << bit; |
| 816 | if (prev == 0) { |
| 817 | switch (bit) { |
| 818 | case FPSCR_VX: |
| 819 | env->fpscr |= 1 << FPSCR_FX; |
| 820 | if (fpscr_ve) |
| 821 | goto raise_ve; |
| 822 | case FPSCR_OX: |
| 823 | env->fpscr |= 1 << FPSCR_FX; |
| 824 | if (fpscr_oe) |
| 825 | goto raise_oe; |
| 826 | break; |
| 827 | case FPSCR_UX: |
| 828 | env->fpscr |= 1 << FPSCR_FX; |
| 829 | if (fpscr_ue) |
| 830 | goto raise_ue; |
| 831 | break; |
| 832 | case FPSCR_ZX: |
| 833 | env->fpscr |= 1 << FPSCR_FX; |
| 834 | if (fpscr_ze) |
| 835 | goto raise_ze; |
| 836 | break; |
| 837 | case FPSCR_XX: |
| 838 | env->fpscr |= 1 << FPSCR_FX; |
| 839 | if (fpscr_xe) |
| 840 | goto raise_xe; |
| 841 | break; |
| 842 | case FPSCR_VXSNAN: |
| 843 | case FPSCR_VXISI: |
| 844 | case FPSCR_VXIDI: |
| 845 | case FPSCR_VXZDZ: |
| 846 | case FPSCR_VXIMZ: |
| 847 | case FPSCR_VXVC: |
| 848 | case FPSCR_VXSOFT: |
| 849 | case FPSCR_VXSQRT: |
| 850 | case FPSCR_VXCVI: |
| 851 | env->fpscr |= 1 << FPSCR_VX; |
| 852 | env->fpscr |= 1 << FPSCR_FX; |
| 853 | if (fpscr_ve != 0) |
| 854 | goto raise_ve; |
| 855 | break; |
| 856 | case FPSCR_VE: |
| 857 | if (fpscr_vx != 0) { |
| 858 | raise_ve: |
| 859 | env->error_code = POWERPC_EXCP_FP; |
| 860 | if (fpscr_vxsnan) |
| 861 | env->error_code |= POWERPC_EXCP_FP_VXSNAN; |
| 862 | if (fpscr_vxisi) |
| 863 | env->error_code |= POWERPC_EXCP_FP_VXISI; |
| 864 | if (fpscr_vxidi) |
| 865 | env->error_code |= POWERPC_EXCP_FP_VXIDI; |
| 866 | if (fpscr_vxzdz) |
| 867 | env->error_code |= POWERPC_EXCP_FP_VXZDZ; |
| 868 | if (fpscr_vximz) |
| 869 | env->error_code |= POWERPC_EXCP_FP_VXIMZ; |
| 870 | if (fpscr_vxvc) |
| 871 | env->error_code |= POWERPC_EXCP_FP_VXVC; |
| 872 | if (fpscr_vxsoft) |
| 873 | env->error_code |= POWERPC_EXCP_FP_VXSOFT; |
| 874 | if (fpscr_vxsqrt) |
| 875 | env->error_code |= POWERPC_EXCP_FP_VXSQRT; |
| 876 | if (fpscr_vxcvi) |
| 877 | env->error_code |= POWERPC_EXCP_FP_VXCVI; |
| 878 | goto raise_excp; |
| 879 | } |
| 880 | break; |
| 881 | case FPSCR_OE: |
| 882 | if (fpscr_ox != 0) { |
| 883 | raise_oe: |
| 884 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX; |
| 885 | goto raise_excp; |
| 886 | } |
| 887 | break; |
| 888 | case FPSCR_UE: |
| 889 | if (fpscr_ux != 0) { |
| 890 | raise_ue: |
| 891 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX; |
| 892 | goto raise_excp; |
| 893 | } |
| 894 | break; |
| 895 | case FPSCR_ZE: |
| 896 | if (fpscr_zx != 0) { |
| 897 | raise_ze: |
| 898 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX; |
| 899 | goto raise_excp; |
| 900 | } |
| 901 | break; |
| 902 | case FPSCR_XE: |
| 903 | if (fpscr_xx != 0) { |
| 904 | raise_xe: |
| 905 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX; |
| 906 | goto raise_excp; |
| 907 | } |
| 908 | break; |
| 909 | case FPSCR_RN1: |
| 910 | case FPSCR_RN: |
| 911 | fpscr_set_rounding_mode(); |
| 912 | break; |
| 913 | default: |
| 914 | break; |
| 915 | raise_excp: |
| 916 | /* Update the floating-point enabled exception summary */ |
| 917 | env->fpscr |= 1 << FPSCR_FEX; |
| 918 | /* We have to update Rc1 before raising the exception */ |
| 919 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 920 | break; |
| 921 | } |
| 922 | } |
| 923 | } |
| 924 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 925 | void helper_store_fpscr (uint64_t arg, uint32_t mask) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 926 | { |
| 927 | /* |
| 928 | * We use only the 32 LSB of the incoming fpr |
| 929 | */ |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 930 | uint32_t prev, new; |
| 931 | int i; |
| 932 | |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 933 | prev = env->fpscr; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 934 | new = (uint32_t)arg; |
aurel32 | 27ee5df | 2008-12-15 00:30:28 +0000 | [diff] [blame] | 935 | new &= ~0x60000000; |
| 936 | new |= prev & 0x60000000; |
| 937 | for (i = 0; i < 8; i++) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 938 | if (mask & (1 << i)) { |
| 939 | env->fpscr &= ~(0xF << (4 * i)); |
| 940 | env->fpscr |= new & (0xF << (4 * i)); |
| 941 | } |
| 942 | } |
| 943 | /* Update VX and FEX */ |
| 944 | if (fpscr_ix != 0) |
| 945 | env->fpscr |= 1 << FPSCR_VX; |
aurel32 | 5567025 | 2008-03-10 00:09:28 +0000 | [diff] [blame] | 946 | else |
| 947 | env->fpscr &= ~(1 << FPSCR_VX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 948 | if ((fpscr_ex & fpscr_eex) != 0) { |
| 949 | env->fpscr |= 1 << FPSCR_FEX; |
| 950 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 951 | /* XXX: we should compute it properly */ |
| 952 | env->error_code = POWERPC_EXCP_FP; |
| 953 | } |
aurel32 | 5567025 | 2008-03-10 00:09:28 +0000 | [diff] [blame] | 954 | else |
| 955 | env->fpscr &= ~(1 << FPSCR_FEX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 956 | fpscr_set_rounding_mode(); |
| 957 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 958 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 959 | void helper_float_check_status (void) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 960 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 961 | #ifdef CONFIG_SOFTFLOAT |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 962 | if (env->exception_index == POWERPC_EXCP_PROGRAM && |
| 963 | (env->error_code & POWERPC_EXCP_FP)) { |
| 964 | /* Differred floating-point exception after target FPR update */ |
| 965 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 966 | helper_raise_exception_err(env->exception_index, env->error_code); |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 967 | } else { |
| 968 | int status = get_float_exception_flags(&env->fp_status); |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 969 | if (status & float_flag_divbyzero) { |
| 970 | float_zero_divide_excp(); |
| 971 | } else if (status & float_flag_overflow) { |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 972 | float_overflow_excp(); |
| 973 | } else if (status & float_flag_underflow) { |
| 974 | float_underflow_excp(); |
| 975 | } else if (status & float_flag_inexact) { |
| 976 | float_inexact_excp(); |
| 977 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 978 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 979 | #else |
| 980 | if (env->exception_index == POWERPC_EXCP_PROGRAM && |
| 981 | (env->error_code & POWERPC_EXCP_FP)) { |
| 982 | /* Differred floating-point exception after target FPR update */ |
| 983 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 984 | helper_raise_exception_err(env->exception_index, env->error_code); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 985 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 986 | #endif |
| 987 | } |
| 988 | |
| 989 | #ifdef CONFIG_SOFTFLOAT |
| 990 | void helper_reset_fpstatus (void) |
| 991 | { |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 992 | set_float_exception_flags(0, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 993 | } |
| 994 | #endif |
| 995 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 996 | /* fadd - fadd. */ |
| 997 | uint64_t helper_fadd (uint64_t arg1, uint64_t arg2) |
| 998 | { |
| 999 | CPU_DoubleU farg1, farg2; |
| 1000 | |
| 1001 | farg1.ll = arg1; |
| 1002 | farg2.ll = arg2; |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1003 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1004 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1005 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1006 | /* sNaN addition */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1007 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1008 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
| 1009 | float64_is_neg(farg1.d) != float64_is_neg(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1010 | /* Magnitude subtraction of infinities */ |
aurel32 | cf1cf21 | 2008-12-13 11:46:36 +0000 | [diff] [blame] | 1011 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1012 | } else { |
| 1013 | farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1014 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1015 | #else |
| 1016 | farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
| 1017 | #endif |
| 1018 | return farg1.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1019 | } |
| 1020 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1021 | /* fsub - fsub. */ |
| 1022 | uint64_t helper_fsub (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1023 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1024 | CPU_DoubleU farg1, farg2; |
| 1025 | |
| 1026 | farg1.ll = arg1; |
| 1027 | farg2.ll = arg2; |
| 1028 | #if USE_PRECISE_EMULATION |
| 1029 | { |
| 1030 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1031 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1032 | /* sNaN subtraction */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1033 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1034 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
| 1035 | float64_is_neg(farg1.d) == float64_is_neg(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1036 | /* Magnitude subtraction of infinities */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1037 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1038 | } else { |
| 1039 | farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1040 | } |
| 1041 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1042 | #else |
| 1043 | farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
| 1044 | #endif |
| 1045 | return farg1.ll; |
| 1046 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1047 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1048 | /* fmul - fmul. */ |
| 1049 | uint64_t helper_fmul (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1050 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1051 | CPU_DoubleU farg1, farg2; |
| 1052 | |
| 1053 | farg1.ll = arg1; |
| 1054 | farg2.ll = arg2; |
| 1055 | #if USE_PRECISE_EMULATION |
| 1056 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1057 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1058 | /* sNaN multiplication */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1059 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1060 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1061 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1062 | /* Multiplication of zero by infinity */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1063 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1064 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1065 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1066 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1067 | #else |
| 1068 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1069 | #endif |
| 1070 | return farg1.ll; |
| 1071 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1072 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1073 | /* fdiv - fdiv. */ |
| 1074 | uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1075 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1076 | CPU_DoubleU farg1, farg2; |
| 1077 | |
| 1078 | farg1.ll = arg1; |
| 1079 | farg2.ll = arg2; |
| 1080 | #if USE_PRECISE_EMULATION |
| 1081 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1082 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1083 | /* sNaN division */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1084 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1085 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1086 | /* Division of infinity by infinity */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1087 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI); |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 1088 | } else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.d))) { |
| 1089 | /* Division of zero by zero */ |
| 1090 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXZDZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1091 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1092 | farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1093 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1094 | #else |
| 1095 | farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
| 1096 | #endif |
| 1097 | return farg1.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1098 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1099 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1100 | /* fabs */ |
| 1101 | uint64_t helper_fabs (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1102 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1103 | CPU_DoubleU farg; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1104 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1105 | farg.ll = arg; |
| 1106 | farg.d = float64_abs(farg.d); |
| 1107 | return farg.ll; |
| 1108 | } |
| 1109 | |
| 1110 | /* fnabs */ |
| 1111 | uint64_t helper_fnabs (uint64_t arg) |
| 1112 | { |
| 1113 | CPU_DoubleU farg; |
| 1114 | |
| 1115 | farg.ll = arg; |
| 1116 | farg.d = float64_abs(farg.d); |
| 1117 | farg.d = float64_chs(farg.d); |
| 1118 | return farg.ll; |
| 1119 | } |
| 1120 | |
| 1121 | /* fneg */ |
| 1122 | uint64_t helper_fneg (uint64_t arg) |
| 1123 | { |
| 1124 | CPU_DoubleU farg; |
| 1125 | |
| 1126 | farg.ll = arg; |
| 1127 | farg.d = float64_chs(farg.d); |
| 1128 | return farg.ll; |
| 1129 | } |
| 1130 | |
| 1131 | /* fctiw - fctiw. */ |
| 1132 | uint64_t helper_fctiw (uint64_t arg) |
| 1133 | { |
| 1134 | CPU_DoubleU farg; |
| 1135 | farg.ll = arg; |
| 1136 | |
| 1137 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1138 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1139 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1140 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1141 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1142 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1143 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1144 | farg.ll = float64_to_int32(farg.d, &env->fp_status); |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1145 | #if USE_PRECISE_EMULATION |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1146 | /* XXX: higher bits are not supposed to be significant. |
| 1147 | * to make tests easier, return the same as a real PowerPC 750 |
| 1148 | */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1149 | farg.ll |= 0xFFF80000ULL << 32; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1150 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1151 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1152 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1153 | } |
| 1154 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1155 | /* fctiwz - fctiwz. */ |
| 1156 | uint64_t helper_fctiwz (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1157 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1158 | CPU_DoubleU farg; |
| 1159 | farg.ll = arg; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1160 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1161 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1162 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1163 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1164 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1165 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1166 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1167 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1168 | farg.ll = float64_to_int32_round_to_zero(farg.d, &env->fp_status); |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1169 | #if USE_PRECISE_EMULATION |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1170 | /* XXX: higher bits are not supposed to be significant. |
| 1171 | * to make tests easier, return the same as a real PowerPC 750 |
| 1172 | */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1173 | farg.ll |= 0xFFF80000ULL << 32; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1174 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1175 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1176 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1177 | } |
| 1178 | |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1179 | #if defined(TARGET_PPC64) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1180 | /* fcfid - fcfid. */ |
| 1181 | uint64_t helper_fcfid (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1182 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1183 | CPU_DoubleU farg; |
| 1184 | farg.d = int64_to_float64(arg, &env->fp_status); |
| 1185 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1186 | } |
| 1187 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1188 | /* fctid - fctid. */ |
| 1189 | uint64_t helper_fctid (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1190 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1191 | CPU_DoubleU farg; |
| 1192 | farg.ll = arg; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1193 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1194 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1195 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1196 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1197 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1198 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1199 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1200 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1201 | farg.ll = float64_to_int64(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1202 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1203 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1204 | } |
| 1205 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1206 | /* fctidz - fctidz. */ |
| 1207 | uint64_t helper_fctidz (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1208 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1209 | CPU_DoubleU farg; |
| 1210 | farg.ll = arg; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1211 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1212 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1213 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1214 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1215 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1216 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1217 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1218 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1219 | farg.ll = float64_to_int64_round_to_zero(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1220 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1221 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1222 | } |
| 1223 | |
| 1224 | #endif |
| 1225 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1226 | static always_inline uint64_t do_fri (uint64_t arg, int rounding_mode) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1227 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1228 | CPU_DoubleU farg; |
| 1229 | farg.ll = arg; |
| 1230 | |
| 1231 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1232 | /* sNaN round */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1233 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1234 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1235 | /* qNan / infinity round */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1236 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1237 | } else { |
| 1238 | set_float_rounding_mode(rounding_mode, &env->fp_status); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1239 | farg.ll = float64_round_to_int(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1240 | /* Restore rounding mode from FPSCR */ |
| 1241 | fpscr_set_rounding_mode(); |
| 1242 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1243 | return farg.ll; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1244 | } |
| 1245 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1246 | uint64_t helper_frin (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1247 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1248 | return do_fri(arg, float_round_nearest_even); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1249 | } |
| 1250 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1251 | uint64_t helper_friz (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1252 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1253 | return do_fri(arg, float_round_to_zero); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1254 | } |
| 1255 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1256 | uint64_t helper_frip (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1257 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1258 | return do_fri(arg, float_round_up); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1259 | } |
| 1260 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1261 | uint64_t helper_frim (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1262 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1263 | return do_fri(arg, float_round_down); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1264 | } |
| 1265 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1266 | /* fmadd - fmadd. */ |
| 1267 | uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
| 1268 | { |
| 1269 | CPU_DoubleU farg1, farg2, farg3; |
| 1270 | |
| 1271 | farg1.ll = arg1; |
| 1272 | farg2.ll = arg2; |
| 1273 | farg3.ll = arg3; |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1274 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1275 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1276 | float64_is_signaling_nan(farg2.d) || |
| 1277 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1278 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1279 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1280 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1281 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1282 | /* Multiplication of zero by infinity */ |
| 1283 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1284 | } else { |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1285 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1286 | /* This is the way the PowerPC specification defines it */ |
| 1287 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1288 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1289 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1290 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1291 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1292 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1293 | float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { |
| 1294 | /* Magnitude subtraction of infinities */ |
| 1295 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1296 | } else { |
| 1297 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1298 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
| 1299 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1300 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1301 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1302 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1303 | farg1.d = (farg1.d * farg2.d) + farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1304 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1305 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1306 | #else |
| 1307 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1308 | farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
| 1309 | #endif |
| 1310 | return farg1.ll; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1311 | } |
| 1312 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1313 | /* fmsub - fmsub. */ |
| 1314 | uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1315 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1316 | CPU_DoubleU farg1, farg2, farg3; |
| 1317 | |
| 1318 | farg1.ll = arg1; |
| 1319 | farg2.ll = arg2; |
| 1320 | farg3.ll = arg3; |
| 1321 | #if USE_PRECISE_EMULATION |
| 1322 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1323 | float64_is_signaling_nan(farg2.d) || |
| 1324 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1325 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1326 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1327 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1328 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1329 | /* Multiplication of zero by infinity */ |
| 1330 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1331 | } else { |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1332 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1333 | /* This is the way the PowerPC specification defines it */ |
| 1334 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1335 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1336 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1337 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1338 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1339 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1340 | float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { |
| 1341 | /* Magnitude subtraction of infinities */ |
| 1342 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1343 | } else { |
| 1344 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1345 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
| 1346 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1347 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1348 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1349 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1350 | farg1.d = (farg1.d * farg2.d) - farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1351 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1352 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1353 | #else |
| 1354 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1355 | farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
| 1356 | #endif |
| 1357 | return farg1.ll; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1358 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1359 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1360 | /* fnmadd - fnmadd. */ |
| 1361 | uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1362 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1363 | CPU_DoubleU farg1, farg2, farg3; |
| 1364 | |
| 1365 | farg1.ll = arg1; |
| 1366 | farg2.ll = arg2; |
| 1367 | farg3.ll = arg3; |
| 1368 | |
| 1369 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1370 | float64_is_signaling_nan(farg2.d) || |
| 1371 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1372 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1373 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1374 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1375 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1376 | /* Multiplication of zero by infinity */ |
| 1377 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1378 | } else { |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1379 | #if USE_PRECISE_EMULATION |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1380 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1381 | /* This is the way the PowerPC specification defines it */ |
| 1382 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1383 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1384 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1385 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1386 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1387 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1388 | float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { |
| 1389 | /* Magnitude subtraction of infinities */ |
| 1390 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1391 | } else { |
| 1392 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1393 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
| 1394 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1395 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1396 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1397 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1398 | farg1.d = (farg1.d * farg2.d) + farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1399 | #endif |
| 1400 | #else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1401 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1402 | farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1403 | #endif |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 1404 | if (likely(!float64_is_nan(farg1.d))) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1405 | farg1.d = float64_chs(farg1.d); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1406 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1407 | return farg1.ll; |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1408 | } |
| 1409 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1410 | /* fnmsub - fnmsub. */ |
| 1411 | uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1412 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1413 | CPU_DoubleU farg1, farg2, farg3; |
| 1414 | |
| 1415 | farg1.ll = arg1; |
| 1416 | farg2.ll = arg2; |
| 1417 | farg3.ll = arg3; |
| 1418 | |
| 1419 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1420 | float64_is_signaling_nan(farg2.d) || |
| 1421 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1422 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1423 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1424 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1425 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1426 | /* Multiplication of zero by infinity */ |
| 1427 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1428 | } else { |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1429 | #if USE_PRECISE_EMULATION |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1430 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1431 | /* This is the way the PowerPC specification defines it */ |
| 1432 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1433 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1434 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1435 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1436 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1437 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1438 | float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { |
| 1439 | /* Magnitude subtraction of infinities */ |
| 1440 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1441 | } else { |
| 1442 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1443 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
| 1444 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1445 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1446 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1447 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1448 | farg1.d = (farg1.d * farg2.d) - farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1449 | #endif |
| 1450 | #else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1451 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1452 | farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1453 | #endif |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 1454 | if (likely(!float64_is_nan(farg1.d))) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1455 | farg1.d = float64_chs(farg1.d); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1456 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1457 | return farg1.ll; |
bellard | 1ef59d0 | 2004-04-26 19:48:05 +0000 | [diff] [blame] | 1458 | } |
| 1459 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1460 | /* frsp - frsp. */ |
| 1461 | uint64_t helper_frsp (uint64_t arg) |
| 1462 | { |
| 1463 | CPU_DoubleU farg; |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1464 | float32 f32; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1465 | farg.ll = arg; |
| 1466 | |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1467 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1468 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1469 | /* sNaN square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1470 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1471 | } else { |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1472 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1473 | farg.d = float32_to_float64(f32, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1474 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1475 | #else |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1476 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1477 | farg.d = float32_to_float64(f32, &env->fp_status); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1478 | #endif |
| 1479 | return farg.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1480 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1481 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1482 | /* fsqrt - fsqrt. */ |
| 1483 | uint64_t helper_fsqrt (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1484 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1485 | CPU_DoubleU farg; |
| 1486 | farg.ll = arg; |
| 1487 | |
| 1488 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1489 | /* sNaN square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1490 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1491 | } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1492 | /* Square root of a negative nonzero number */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1493 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1494 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1495 | farg.d = float64_sqrt(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1496 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1497 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1498 | } |
| 1499 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1500 | /* fre - fre. */ |
| 1501 | uint64_t helper_fre (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1502 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1503 | CPU_DoubleU fone, farg; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1504 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1505 | farg.ll = arg; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1506 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1507 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1508 | /* sNaN reciprocal */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1509 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1510 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1511 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1512 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1513 | return farg.d; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1514 | } |
| 1515 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1516 | /* fres - fres. */ |
| 1517 | uint64_t helper_fres (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1518 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1519 | CPU_DoubleU fone, farg; |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1520 | float32 f32; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1521 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1522 | farg.ll = arg; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1523 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1524 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1525 | /* sNaN reciprocal */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1526 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1527 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1528 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
| 1529 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1530 | farg.d = float32_to_float64(f32, &env->fp_status); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1531 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1532 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1533 | } |
| 1534 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1535 | /* frsqrte - frsqrte. */ |
| 1536 | uint64_t helper_frsqrte (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1537 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1538 | CPU_DoubleU fone, farg; |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1539 | float32 f32; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1540 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1541 | farg.ll = arg; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1542 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1543 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1544 | /* sNaN reciprocal square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1545 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1546 | } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1547 | /* Reciprocal square root of a negative nonzero number */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1548 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1549 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1550 | farg.d = float64_sqrt(farg.d, &env->fp_status); |
| 1551 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
| 1552 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1553 | farg.d = float32_to_float64(f32, &env->fp_status); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1554 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1555 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1556 | } |
| 1557 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1558 | /* fsel - fsel. */ |
| 1559 | uint64_t helper_fsel (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1560 | { |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1561 | CPU_DoubleU farg1; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1562 | |
| 1563 | farg1.ll = arg1; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1564 | |
aurel32 | 572c895 | 2008-12-29 09:47:11 +0000 | [diff] [blame] | 1565 | if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && !float64_is_nan(farg1.d)) |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1566 | return arg2; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1567 | else |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1568 | return arg3; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1569 | } |
| 1570 | |
aurel32 | 9a81937 | 2008-12-14 19:34:09 +0000 | [diff] [blame] | 1571 | void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1572 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1573 | CPU_DoubleU farg1, farg2; |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 1574 | uint32_t ret = 0; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1575 | farg1.ll = arg1; |
| 1576 | farg2.ll = arg2; |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 1577 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1578 | if (unlikely(float64_is_nan(farg1.d) || |
| 1579 | float64_is_nan(farg2.d))) { |
aurel32 | 9a81937 | 2008-12-14 19:34:09 +0000 | [diff] [blame] | 1580 | ret = 0x01UL; |
| 1581 | } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { |
| 1582 | ret = 0x08UL; |
| 1583 | } else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) { |
| 1584 | ret = 0x04UL; |
| 1585 | } else { |
| 1586 | ret = 0x02UL; |
| 1587 | } |
| 1588 | |
| 1589 | env->fpscr &= ~(0x0F << FPSCR_FPRF); |
| 1590 | env->fpscr |= ret << FPSCR_FPRF; |
| 1591 | env->crf[crfD] = ret; |
| 1592 | if (unlikely(ret == 0x01UL |
| 1593 | && (float64_is_signaling_nan(farg1.d) || |
| 1594 | float64_is_signaling_nan(farg2.d)))) { |
| 1595 | /* sNaN comparison */ |
| 1596 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
| 1597 | } |
| 1598 | } |
| 1599 | |
| 1600 | void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) |
| 1601 | { |
| 1602 | CPU_DoubleU farg1, farg2; |
| 1603 | uint32_t ret = 0; |
| 1604 | farg1.ll = arg1; |
| 1605 | farg2.ll = arg2; |
| 1606 | |
| 1607 | if (unlikely(float64_is_nan(farg1.d) || |
| 1608 | float64_is_nan(farg2.d))) { |
| 1609 | ret = 0x01UL; |
| 1610 | } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { |
| 1611 | ret = 0x08UL; |
| 1612 | } else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) { |
| 1613 | ret = 0x04UL; |
| 1614 | } else { |
| 1615 | ret = 0x02UL; |
| 1616 | } |
| 1617 | |
| 1618 | env->fpscr &= ~(0x0F << FPSCR_FPRF); |
| 1619 | env->fpscr |= ret << FPSCR_FPRF; |
| 1620 | env->crf[crfD] = ret; |
| 1621 | if (unlikely (ret == 0x01UL)) { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1622 | if (float64_is_signaling_nan(farg1.d) || |
| 1623 | float64_is_signaling_nan(farg2.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1624 | /* sNaN comparison */ |
| 1625 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | |
| 1626 | POWERPC_EXCP_FP_VXVC); |
| 1627 | } else { |
| 1628 | /* qNaN comparison */ |
| 1629 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXVC); |
| 1630 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1631 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1632 | } |
| 1633 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1634 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | 6527f6e | 2008-12-06 13:03:35 +0000 | [diff] [blame] | 1635 | void helper_store_msr (target_ulong val) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1636 | { |
aurel32 | 6527f6e | 2008-12-06 13:03:35 +0000 | [diff] [blame] | 1637 | val = hreg_store_msr(env, val, 0); |
| 1638 | if (val != 0) { |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1639 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1640 | helper_raise_exception(val); |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1641 | } |
| 1642 | } |
| 1643 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1644 | static always_inline void do_rfi (target_ulong nip, target_ulong msr, |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1645 | target_ulong msrm, int keep_msrh) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1646 | { |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1647 | #if defined(TARGET_PPC64) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1648 | if (msr & (1ULL << MSR_SF)) { |
| 1649 | nip = (uint64_t)nip; |
| 1650 | msr &= (uint64_t)msrm; |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1651 | } else { |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1652 | nip = (uint32_t)nip; |
| 1653 | msr = (uint32_t)(msr & msrm); |
| 1654 | if (keep_msrh) |
| 1655 | msr |= env->msr & ~((uint64_t)0xFFFFFFFF); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1656 | } |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1657 | #else |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1658 | nip = (uint32_t)nip; |
| 1659 | msr &= (uint32_t)msrm; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1660 | #endif |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1661 | /* XXX: beware: this is false if VLE is supported */ |
| 1662 | env->nip = nip & ~((target_ulong)0x00000003); |
j_mayer | a4f3071 | 2007-11-17 21:14:09 +0000 | [diff] [blame] | 1663 | hreg_store_msr(env, msr, 1); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1664 | #if defined (DEBUG_OP) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1665 | cpu_dump_rfi(env->nip, env->msr); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1666 | #endif |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1667 | /* No need to raise an exception here, |
| 1668 | * as rfi is always the last insn of a TB |
| 1669 | */ |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1670 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
| 1671 | } |
| 1672 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1673 | void helper_rfi (void) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1674 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1675 | do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
| 1676 | ~((target_ulong)0xFFFF0000), 1); |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1677 | } |
| 1678 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1679 | #if defined(TARGET_PPC64) |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1680 | void helper_rfid (void) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1681 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1682 | do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
| 1683 | ~((target_ulong)0xFFFF0000), 0); |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1684 | } |
j_mayer | 7863667 | 2007-11-16 14:11:28 +0000 | [diff] [blame] | 1685 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1686 | void helper_hrfid (void) |
j_mayer | be147d0 | 2007-09-30 13:03:23 +0000 | [diff] [blame] | 1687 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1688 | do_rfi(env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], |
| 1689 | ~((target_ulong)0xFFFF0000), 0); |
j_mayer | be147d0 | 2007-09-30 13:03:23 +0000 | [diff] [blame] | 1690 | } |
| 1691 | #endif |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1692 | #endif |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1693 | |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1694 | void helper_tw (target_ulong arg1, target_ulong arg2, uint32_t flags) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1695 | { |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1696 | if (!likely(!(((int32_t)arg1 < (int32_t)arg2 && (flags & 0x10)) || |
| 1697 | ((int32_t)arg1 > (int32_t)arg2 && (flags & 0x08)) || |
| 1698 | ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) || |
| 1699 | ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) || |
| 1700 | ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1701 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1702 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1703 | } |
| 1704 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1705 | #if defined(TARGET_PPC64) |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1706 | void helper_td (target_ulong arg1, target_ulong arg2, uint32_t flags) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1707 | { |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1708 | if (!likely(!(((int64_t)arg1 < (int64_t)arg2 && (flags & 0x10)) || |
| 1709 | ((int64_t)arg1 > (int64_t)arg2 && (flags & 0x08)) || |
| 1710 | ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || |
| 1711 | ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || |
| 1712 | ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1713 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1714 | } |
| 1715 | #endif |
| 1716 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 1717 | /*****************************************************************************/ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1718 | /* PowerPC 601 specific instructions (POWER bridge) */ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1719 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1720 | target_ulong helper_clcs (uint32_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1721 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1722 | switch (arg) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1723 | case 0x0CUL: |
| 1724 | /* Instruction cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1725 | return env->icache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1726 | break; |
| 1727 | case 0x0DUL: |
| 1728 | /* Data cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1729 | return env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1730 | break; |
| 1731 | case 0x0EUL: |
| 1732 | /* Minimum cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1733 | return (env->icache_line_size < env->dcache_line_size) ? |
| 1734 | env->icache_line_size : env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1735 | break; |
| 1736 | case 0x0FUL: |
| 1737 | /* Maximum cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1738 | return (env->icache_line_size > env->dcache_line_size) ? |
| 1739 | env->icache_line_size : env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1740 | break; |
| 1741 | default: |
| 1742 | /* Undefined */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1743 | return 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1744 | break; |
| 1745 | } |
| 1746 | } |
| 1747 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1748 | target_ulong helper_div (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1749 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1750 | uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1751 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1752 | if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1753 | (int32_t)arg2 == 0) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1754 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1755 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1756 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1757 | env->spr[SPR_MQ] = tmp % arg2; |
| 1758 | return tmp / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1759 | } |
| 1760 | } |
| 1761 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1762 | target_ulong helper_divo (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1763 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1764 | uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1765 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1766 | if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1767 | (int32_t)arg2 == 0) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1768 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1769 | env->spr[SPR_MQ] = 0; |
| 1770 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1771 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1772 | env->spr[SPR_MQ] = tmp % arg2; |
| 1773 | tmp /= (int32_t)arg2; |
| 1774 | if ((int32_t)tmp != tmp) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1775 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1776 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1777 | env->xer &= ~(1 << XER_OV); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1778 | } |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1779 | return tmp; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1780 | } |
| 1781 | } |
| 1782 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1783 | target_ulong helper_divs (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1784 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1785 | if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1786 | (int32_t)arg2 == 0) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1787 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1788 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1789 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1790 | env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2; |
| 1791 | return (int32_t)arg1 / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1792 | } |
| 1793 | } |
| 1794 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1795 | target_ulong helper_divso (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1796 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1797 | if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1798 | (int32_t)arg2 == 0) { |
| 1799 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1800 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1801 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1802 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1803 | env->xer &= ~(1 << XER_OV); |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1804 | env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2; |
| 1805 | return (int32_t)arg1 / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1806 | } |
| 1807 | } |
| 1808 | |
| 1809 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1810 | target_ulong helper_rac (target_ulong addr) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1811 | { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1812 | mmu_ctx_t ctx; |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1813 | int nb_BATs; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1814 | target_ulong ret = 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1815 | |
| 1816 | /* We don't have to generate many instances of this instruction, |
| 1817 | * as rac is supervisor only. |
| 1818 | */ |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1819 | /* XXX: FIX THIS: Pretend we have no BAT */ |
| 1820 | nb_BATs = env->nb_BATs; |
| 1821 | env->nb_BATs = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1822 | if (get_physical_address(env, &ctx, addr, 0, ACCESS_INT) == 0) |
| 1823 | ret = ctx.raddr; |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1824 | env->nb_BATs = nb_BATs; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1825 | return ret; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1826 | } |
| 1827 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1828 | void helper_rfsvc (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1829 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1830 | do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1831 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1832 | #endif |
| 1833 | |
| 1834 | /*****************************************************************************/ |
| 1835 | /* 602 specific instructions */ |
| 1836 | /* mfrom is the most crazy instruction ever seen, imho ! */ |
| 1837 | /* Real implementation uses a ROM table. Do the same */ |
aurel32 | 5e9ae18 | 2008-12-13 12:30:21 +0000 | [diff] [blame] | 1838 | /* Extremly decomposed: |
| 1839 | * -arg / 256 |
| 1840 | * return 256 * log10(10 + 1.0) + 0.5 |
| 1841 | */ |
aurel32 | db9a16a | 2008-12-08 18:11:50 +0000 | [diff] [blame] | 1842 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1843 | target_ulong helper_602_mfrom (target_ulong arg) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1844 | { |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1845 | if (likely(arg < 602)) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1846 | #include "mfrom_table.c" |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1847 | return mfrom_ROM_table[arg]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1848 | } else { |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1849 | return 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1850 | } |
| 1851 | } |
aurel32 | db9a16a | 2008-12-08 18:11:50 +0000 | [diff] [blame] | 1852 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1853 | |
| 1854 | /*****************************************************************************/ |
| 1855 | /* Embedded PowerPC specific helpers */ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1856 | |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1857 | /* XXX: to be improved to check access rights when in user-mode */ |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1858 | target_ulong helper_load_dcr (target_ulong dcrn) |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1859 | { |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1860 | target_ulong val = 0; |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1861 | |
| 1862 | if (unlikely(env->dcr_env == NULL)) { |
| 1863 | if (loglevel != 0) { |
| 1864 | fprintf(logfile, "No DCR environment\n"); |
| 1865 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1866 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1867 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1868 | } else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) { |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1869 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1870 | fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1871 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1872 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1873 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1874 | } |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1875 | return val; |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1876 | } |
| 1877 | |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1878 | void helper_store_dcr (target_ulong dcrn, target_ulong val) |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1879 | { |
| 1880 | if (unlikely(env->dcr_env == NULL)) { |
| 1881 | if (loglevel != 0) { |
| 1882 | fprintf(logfile, "No DCR environment\n"); |
| 1883 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1884 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1885 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1886 | } else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) { |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1887 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1888 | fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1889 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1890 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1891 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1892 | } |
| 1893 | } |
| 1894 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1895 | #if !defined(CONFIG_USER_ONLY) |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1896 | void helper_40x_rfci (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1897 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1898 | do_rfi(env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], |
| 1899 | ~((target_ulong)0xFFFF0000), 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1900 | } |
| 1901 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1902 | void helper_rfci (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1903 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1904 | do_rfi(env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, |
| 1905 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1906 | } |
| 1907 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1908 | void helper_rfdi (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1909 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1910 | do_rfi(env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, |
| 1911 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1912 | } |
| 1913 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1914 | void helper_rfmci (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1915 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1916 | do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, |
| 1917 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1918 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1919 | #endif |
| 1920 | |
| 1921 | /* 440 specific */ |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1922 | target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1923 | { |
| 1924 | target_ulong mask; |
| 1925 | int i; |
| 1926 | |
| 1927 | i = 1; |
| 1928 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1929 | if ((high & mask) == 0) { |
| 1930 | if (update_Rc) { |
| 1931 | env->crf[0] = 0x4; |
| 1932 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1933 | goto done; |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1934 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1935 | i++; |
| 1936 | } |
| 1937 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1938 | if ((low & mask) == 0) { |
| 1939 | if (update_Rc) { |
| 1940 | env->crf[0] = 0x8; |
| 1941 | } |
| 1942 | goto done; |
| 1943 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1944 | i++; |
| 1945 | } |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1946 | if (update_Rc) { |
| 1947 | env->crf[0] = 0x2; |
| 1948 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1949 | done: |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1950 | env->xer = (env->xer & ~0x7F) | i; |
| 1951 | if (update_Rc) { |
| 1952 | env->crf[0] |= xer_so; |
| 1953 | } |
| 1954 | return i; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1955 | } |
| 1956 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 1957 | /*****************************************************************************/ |
aurel32 | d6a46fe | 2009-01-03 13:31:19 +0000 | [diff] [blame] | 1958 | /* Altivec extension helpers */ |
| 1959 | #if defined(WORDS_BIGENDIAN) |
| 1960 | #define HI_IDX 0 |
| 1961 | #define LO_IDX 1 |
| 1962 | #else |
| 1963 | #define HI_IDX 1 |
| 1964 | #define LO_IDX 0 |
| 1965 | #endif |
| 1966 | |
| 1967 | #if defined(WORDS_BIGENDIAN) |
| 1968 | #define VECTOR_FOR_INORDER_I(index, element) \ |
| 1969 | for (index = 0; index < ARRAY_SIZE(r->element); index++) |
| 1970 | #else |
| 1971 | #define VECTOR_FOR_INORDER_I(index, element) \ |
| 1972 | for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) |
| 1973 | #endif |
| 1974 | |
aurel32 | 00d3b8f | 2009-01-04 22:11:59 +0000 | [diff] [blame] | 1975 | /* Saturating arithmetic helpers. */ |
| 1976 | #define SATCVT(from, to, from_type, to_type, min, max, use_min, use_max) \ |
| 1977 | static always_inline to_type cvt##from##to (from_type x, int *sat) \ |
| 1978 | { \ |
| 1979 | to_type r; \ |
| 1980 | if (use_min && x < min) { \ |
| 1981 | r = min; \ |
| 1982 | *sat = 1; \ |
| 1983 | } else if (use_max && x > max) { \ |
| 1984 | r = max; \ |
| 1985 | *sat = 1; \ |
| 1986 | } else { \ |
| 1987 | r = x; \ |
| 1988 | } \ |
| 1989 | return r; \ |
| 1990 | } |
| 1991 | SATCVT(sh, sb, int16_t, int8_t, INT8_MIN, INT8_MAX, 1, 1) |
| 1992 | SATCVT(sw, sh, int32_t, int16_t, INT16_MIN, INT16_MAX, 1, 1) |
| 1993 | SATCVT(sd, sw, int64_t, int32_t, INT32_MIN, INT32_MAX, 1, 1) |
| 1994 | SATCVT(uh, ub, uint16_t, uint8_t, 0, UINT8_MAX, 0, 1) |
| 1995 | SATCVT(uw, uh, uint32_t, uint16_t, 0, UINT16_MAX, 0, 1) |
| 1996 | SATCVT(ud, uw, uint64_t, uint32_t, 0, UINT32_MAX, 0, 1) |
| 1997 | SATCVT(sh, ub, int16_t, uint8_t, 0, UINT8_MAX, 1, 1) |
| 1998 | SATCVT(sw, uh, int32_t, uint16_t, 0, UINT16_MAX, 1, 1) |
| 1999 | SATCVT(sd, uw, int64_t, uint32_t, 0, UINT32_MAX, 1, 1) |
| 2000 | #undef SATCVT |
| 2001 | |
aurel32 | bf8d8de | 2009-01-04 22:09:42 +0000 | [diff] [blame] | 2002 | void helper_lvsl (ppc_avr_t *r, target_ulong sh) |
| 2003 | { |
| 2004 | int i, j = (sh & 0xf); |
| 2005 | |
| 2006 | VECTOR_FOR_INORDER_I (i, u8) { |
| 2007 | r->u8[i] = j++; |
| 2008 | } |
| 2009 | } |
| 2010 | |
| 2011 | void helper_lvsr (ppc_avr_t *r, target_ulong sh) |
| 2012 | { |
| 2013 | int i, j = 0x10 - (sh & 0xf); |
| 2014 | |
| 2015 | VECTOR_FOR_INORDER_I (i, u8) { |
| 2016 | r->u8[i] = j++; |
| 2017 | } |
| 2018 | } |
| 2019 | |
aurel32 | e343da7 | 2009-01-04 22:09:31 +0000 | [diff] [blame] | 2020 | void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) |
| 2021 | { |
| 2022 | int i; |
| 2023 | for (i = 0; i < ARRAY_SIZE(r->u32); i++) { |
| 2024 | r->u32[i] = ~a->u32[i] < b->u32[i]; |
| 2025 | } |
| 2026 | } |
| 2027 | |
aurel32 | 7872c51 | 2009-01-03 13:31:40 +0000 | [diff] [blame] | 2028 | #define VARITH_DO(name, op, element) \ |
| 2029 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2030 | { \ |
| 2031 | int i; \ |
| 2032 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2033 | r->element[i] = a->element[i] op b->element[i]; \ |
| 2034 | } \ |
| 2035 | } |
| 2036 | #define VARITH(suffix, element) \ |
| 2037 | VARITH_DO(add##suffix, +, element) \ |
| 2038 | VARITH_DO(sub##suffix, -, element) |
| 2039 | VARITH(ubm, u8) |
| 2040 | VARITH(uhm, u16) |
| 2041 | VARITH(uwm, u32) |
| 2042 | #undef VARITH_DO |
| 2043 | #undef VARITH |
| 2044 | |
aurel32 | fab3cbe | 2009-01-03 13:31:49 +0000 | [diff] [blame] | 2045 | #define VAVG_DO(name, element, etype) \ |
| 2046 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2047 | { \ |
| 2048 | int i; \ |
| 2049 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2050 | etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \ |
| 2051 | r->element[i] = x >> 1; \ |
| 2052 | } \ |
| 2053 | } |
| 2054 | |
| 2055 | #define VAVG(type, signed_element, signed_type, unsigned_element, unsigned_type) \ |
| 2056 | VAVG_DO(avgs##type, signed_element, signed_type) \ |
| 2057 | VAVG_DO(avgu##type, unsigned_element, unsigned_type) |
| 2058 | VAVG(b, s8, int16_t, u8, uint16_t) |
| 2059 | VAVG(h, s16, int32_t, u16, uint32_t) |
| 2060 | VAVG(w, s32, int64_t, u32, uint64_t) |
| 2061 | #undef VAVG_DO |
| 2062 | #undef VAVG |
| 2063 | |
aurel32 | e403933 | 2009-01-03 13:31:58 +0000 | [diff] [blame] | 2064 | #define VMINMAX_DO(name, compare, element) \ |
| 2065 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2066 | { \ |
| 2067 | int i; \ |
| 2068 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2069 | if (a->element[i] compare b->element[i]) { \ |
| 2070 | r->element[i] = b->element[i]; \ |
| 2071 | } else { \ |
| 2072 | r->element[i] = a->element[i]; \ |
| 2073 | } \ |
| 2074 | } \ |
| 2075 | } |
| 2076 | #define VMINMAX(suffix, element) \ |
| 2077 | VMINMAX_DO(min##suffix, >, element) \ |
| 2078 | VMINMAX_DO(max##suffix, <, element) |
| 2079 | VMINMAX(sb, s8) |
| 2080 | VMINMAX(sh, s16) |
| 2081 | VMINMAX(sw, s32) |
| 2082 | VMINMAX(ub, u8) |
| 2083 | VMINMAX(uh, u16) |
| 2084 | VMINMAX(uw, u32) |
| 2085 | #undef VMINMAX_DO |
| 2086 | #undef VMINMAX |
| 2087 | |
aurel32 | 3b43004 | 2009-01-04 22:08:38 +0000 | [diff] [blame] | 2088 | #define VMRG_DO(name, element, highp) \ |
| 2089 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2090 | { \ |
| 2091 | ppc_avr_t result; \ |
| 2092 | int i; \ |
| 2093 | size_t n_elems = ARRAY_SIZE(r->element); \ |
| 2094 | for (i = 0; i < n_elems/2; i++) { \ |
| 2095 | if (highp) { \ |
| 2096 | result.element[i*2+HI_IDX] = a->element[i]; \ |
| 2097 | result.element[i*2+LO_IDX] = b->element[i]; \ |
| 2098 | } else { \ |
| 2099 | result.element[n_elems - i*2 - (1+HI_IDX)] = b->element[n_elems - i - 1]; \ |
| 2100 | result.element[n_elems - i*2 - (1+LO_IDX)] = a->element[n_elems - i - 1]; \ |
| 2101 | } \ |
| 2102 | } \ |
| 2103 | *r = result; \ |
| 2104 | } |
| 2105 | #if defined(WORDS_BIGENDIAN) |
| 2106 | #define MRGHI 0 |
| 2107 | #define MRGL0 1 |
| 2108 | #else |
| 2109 | #define MRGHI 1 |
| 2110 | #define MRGLO 0 |
| 2111 | #endif |
| 2112 | #define VMRG(suffix, element) \ |
| 2113 | VMRG_DO(mrgl##suffix, element, MRGHI) \ |
| 2114 | VMRG_DO(mrgh##suffix, element, MRGLO) |
| 2115 | VMRG(b, u8) |
| 2116 | VMRG(h, u16) |
| 2117 | VMRG(w, u32) |
| 2118 | #undef VMRG_DO |
| 2119 | #undef VMRG |
| 2120 | #undef MRGHI |
| 2121 | #undef MRGLO |
| 2122 | |
aurel32 | b04ae98 | 2009-01-04 22:11:39 +0000 | [diff] [blame] | 2123 | void helper_vmsummbm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) |
| 2124 | { |
| 2125 | int32_t prod[16]; |
| 2126 | int i; |
| 2127 | |
| 2128 | for (i = 0; i < ARRAY_SIZE(r->s8); i++) { |
| 2129 | prod[i] = (int32_t)a->s8[i] * b->u8[i]; |
| 2130 | } |
| 2131 | |
| 2132 | VECTOR_FOR_INORDER_I(i, s32) { |
| 2133 | r->s32[i] = c->s32[i] + prod[4*i] + prod[4*i+1] + prod[4*i+2] + prod[4*i+3]; |
| 2134 | } |
| 2135 | } |
| 2136 | |
| 2137 | void helper_vmsumubm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) |
| 2138 | { |
| 2139 | uint16_t prod[16]; |
| 2140 | int i; |
| 2141 | |
| 2142 | for (i = 0; i < ARRAY_SIZE(r->u8); i++) { |
| 2143 | prod[i] = a->u8[i] * b->u8[i]; |
| 2144 | } |
| 2145 | |
| 2146 | VECTOR_FOR_INORDER_I(i, u32) { |
| 2147 | r->u32[i] = c->u32[i] + prod[4*i] + prod[4*i+1] + prod[4*i+2] + prod[4*i+3]; |
| 2148 | } |
| 2149 | } |
| 2150 | |
aurel32 | 2c27790 | 2009-01-04 22:08:48 +0000 | [diff] [blame] | 2151 | #define VMUL_DO(name, mul_element, prod_element, evenp) \ |
| 2152 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2153 | { \ |
| 2154 | int i; \ |
| 2155 | VECTOR_FOR_INORDER_I(i, prod_element) { \ |
| 2156 | if (evenp) { \ |
| 2157 | r->prod_element[i] = a->mul_element[i*2+HI_IDX] * b->mul_element[i*2+HI_IDX]; \ |
| 2158 | } else { \ |
| 2159 | r->prod_element[i] = a->mul_element[i*2+LO_IDX] * b->mul_element[i*2+LO_IDX]; \ |
| 2160 | } \ |
| 2161 | } \ |
| 2162 | } |
| 2163 | #define VMUL(suffix, mul_element, prod_element) \ |
| 2164 | VMUL_DO(mule##suffix, mul_element, prod_element, 1) \ |
| 2165 | VMUL_DO(mulo##suffix, mul_element, prod_element, 0) |
| 2166 | VMUL(sb, s8, s16) |
| 2167 | VMUL(sh, s16, s32) |
| 2168 | VMUL(ub, u8, u16) |
| 2169 | VMUL(uh, u16, u32) |
| 2170 | #undef VMUL_DO |
| 2171 | #undef VMUL |
| 2172 | |
aurel32 | d125869 | 2009-01-04 22:11:49 +0000 | [diff] [blame] | 2173 | void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) |
| 2174 | { |
| 2175 | ppc_avr_t result; |
| 2176 | int i; |
| 2177 | VECTOR_FOR_INORDER_I (i, u8) { |
| 2178 | int s = c->u8[i] & 0x1f; |
| 2179 | #if defined(WORDS_BIGENDIAN) |
| 2180 | int index = s & 0xf; |
| 2181 | #else |
| 2182 | int index = 15 - (s & 0xf); |
| 2183 | #endif |
| 2184 | if (s & 0x10) { |
| 2185 | result.u8[i] = b->u8[index]; |
| 2186 | } else { |
| 2187 | result.u8[i] = a->u8[index]; |
| 2188 | } |
| 2189 | } |
| 2190 | *r = result; |
| 2191 | } |
| 2192 | |
aurel32 | 5335a14 | 2009-01-04 22:12:09 +0000 | [diff] [blame^] | 2193 | #if defined(WORDS_BIGENDIAN) |
| 2194 | #define PKBIG 1 |
| 2195 | #else |
| 2196 | #define PKBIG 0 |
| 2197 | #endif |
| 2198 | #define VPK(suffix, from, to, cvt, dosat) \ |
| 2199 | void helper_vpk##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2200 | { \ |
| 2201 | int i; \ |
| 2202 | int sat = 0; \ |
| 2203 | ppc_avr_t result; \ |
| 2204 | ppc_avr_t *a0 = PKBIG ? a : b; \ |
| 2205 | ppc_avr_t *a1 = PKBIG ? b : a; \ |
| 2206 | VECTOR_FOR_INORDER_I (i, from) { \ |
| 2207 | result.to[i] = cvt(a0->from[i], &sat); \ |
| 2208 | result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \ |
| 2209 | } \ |
| 2210 | *r = result; \ |
| 2211 | if (dosat && sat) { \ |
| 2212 | env->vscr |= (1 << VSCR_SAT); \ |
| 2213 | } \ |
| 2214 | } |
| 2215 | #define I(x, y) (x) |
| 2216 | VPK(shss, s16, s8, cvtshsb, 1) |
| 2217 | VPK(shus, s16, u8, cvtshub, 1) |
| 2218 | VPK(swss, s32, s16, cvtswsh, 1) |
| 2219 | VPK(swus, s32, u16, cvtswuh, 1) |
| 2220 | VPK(uhus, u16, u8, cvtuhub, 1) |
| 2221 | VPK(uwus, u32, u16, cvtuwuh, 1) |
| 2222 | VPK(uhum, u16, u8, I, 0) |
| 2223 | VPK(uwum, u32, u16, I, 0) |
| 2224 | #undef I |
| 2225 | #undef VPK |
| 2226 | #undef PKBIG |
| 2227 | |
aurel32 | 5e1d098 | 2009-01-04 22:09:52 +0000 | [diff] [blame] | 2228 | #define VROTATE(suffix, element) \ |
| 2229 | void helper_vrl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2230 | { \ |
| 2231 | int i; \ |
| 2232 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2233 | unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ |
| 2234 | unsigned int shift = b->element[i] & mask; \ |
| 2235 | r->element[i] = (a->element[i] << shift) | (a->element[i] >> (sizeof(a->element[0]) * 8 - shift)); \ |
| 2236 | } \ |
| 2237 | } |
| 2238 | VROTATE(b, u8) |
| 2239 | VROTATE(h, u16) |
| 2240 | VROTATE(w, u32) |
| 2241 | #undef VROTATE |
| 2242 | |
aurel32 | d125869 | 2009-01-04 22:11:49 +0000 | [diff] [blame] | 2243 | void helper_vsel (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) |
| 2244 | { |
| 2245 | r->u64[0] = (a->u64[0] & ~c->u64[0]) | (b->u64[0] & c->u64[0]); |
| 2246 | r->u64[1] = (a->u64[1] & ~c->u64[1]) | (b->u64[1] & c->u64[1]); |
| 2247 | } |
| 2248 | |
aurel32 | d79f080 | 2009-01-04 22:09:08 +0000 | [diff] [blame] | 2249 | #define VSL(suffix, element) \ |
| 2250 | void helper_vsl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2251 | { \ |
| 2252 | int i; \ |
| 2253 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2254 | unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ |
| 2255 | unsigned int shift = b->element[i] & mask; \ |
| 2256 | r->element[i] = a->element[i] << shift; \ |
| 2257 | } \ |
| 2258 | } |
| 2259 | VSL(b, u8) |
| 2260 | VSL(h, u16) |
| 2261 | VSL(w, u32) |
| 2262 | #undef VSL |
| 2263 | |
aurel32 | cd633b1 | 2009-01-04 22:10:09 +0000 | [diff] [blame] | 2264 | void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) |
| 2265 | { |
| 2266 | int sh = shift & 0xf; |
| 2267 | int i; |
| 2268 | ppc_avr_t result; |
| 2269 | |
| 2270 | #if defined(WORDS_BIGENDIAN) |
| 2271 | for (i = 0; i < ARRAY_SIZE(r->u8); i++) { |
| 2272 | int index = sh + i; |
| 2273 | if (index > 0xf) { |
| 2274 | result.u8[i] = b->u8[index-0x10]; |
| 2275 | } else { |
| 2276 | result.u8[i] = a->u8[index]; |
| 2277 | } |
| 2278 | } |
| 2279 | #else |
| 2280 | for (i = 0; i < ARRAY_SIZE(r->u8); i++) { |
| 2281 | int index = (16 - sh) + i; |
| 2282 | if (index > 0xf) { |
| 2283 | result.u8[i] = a->u8[index-0x10]; |
| 2284 | } else { |
| 2285 | result.u8[i] = b->u8[index]; |
| 2286 | } |
| 2287 | } |
| 2288 | #endif |
| 2289 | *r = result; |
| 2290 | } |
| 2291 | |
aurel32 | 7b239be | 2009-01-04 22:09:19 +0000 | [diff] [blame] | 2292 | void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) |
| 2293 | { |
| 2294 | int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; |
| 2295 | |
| 2296 | #if defined (WORDS_BIGENDIAN) |
| 2297 | memmove (&r->u8[0], &a->u8[sh], 16-sh); |
| 2298 | memset (&r->u8[16-sh], 0, sh); |
| 2299 | #else |
| 2300 | memmove (&r->u8[sh], &a->u8[0], 16-sh); |
| 2301 | memset (&r->u8[0], 0, sh); |
| 2302 | #endif |
| 2303 | } |
| 2304 | |
aurel32 | e4e6bee | 2009-01-04 22:10:49 +0000 | [diff] [blame] | 2305 | /* Experimental testing shows that hardware masks the immediate. */ |
| 2306 | #define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1)) |
| 2307 | #if defined(WORDS_BIGENDIAN) |
| 2308 | #define SPLAT_ELEMENT(element) _SPLAT_MASKED(element) |
| 2309 | #else |
| 2310 | #define SPLAT_ELEMENT(element) (ARRAY_SIZE(r->element)-1 - _SPLAT_MASKED(element)) |
| 2311 | #endif |
| 2312 | #define VSPLT(suffix, element) \ |
| 2313 | void helper_vsplt##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ |
| 2314 | { \ |
| 2315 | uint32_t s = b->element[SPLAT_ELEMENT(element)]; \ |
| 2316 | int i; \ |
| 2317 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2318 | r->element[i] = s; \ |
| 2319 | } \ |
| 2320 | } |
| 2321 | VSPLT(b, u8) |
| 2322 | VSPLT(h, u16) |
| 2323 | VSPLT(w, u32) |
| 2324 | #undef VSPLT |
| 2325 | #undef SPLAT_ELEMENT |
| 2326 | #undef _SPLAT_MASKED |
| 2327 | |
aurel32 | 07ef34c | 2009-01-04 22:08:58 +0000 | [diff] [blame] | 2328 | #define VSR(suffix, element) \ |
| 2329 | void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2330 | { \ |
| 2331 | int i; \ |
| 2332 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2333 | unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ |
| 2334 | unsigned int shift = b->element[i] & mask; \ |
| 2335 | r->element[i] = a->element[i] >> shift; \ |
| 2336 | } \ |
| 2337 | } |
| 2338 | VSR(ab, s8) |
| 2339 | VSR(ah, s16) |
| 2340 | VSR(aw, s32) |
| 2341 | VSR(b, u8) |
| 2342 | VSR(h, u16) |
| 2343 | VSR(w, u32) |
| 2344 | #undef VSR |
| 2345 | |
aurel32 | 7b239be | 2009-01-04 22:09:19 +0000 | [diff] [blame] | 2346 | void helper_vsro (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) |
| 2347 | { |
| 2348 | int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; |
| 2349 | |
| 2350 | #if defined (WORDS_BIGENDIAN) |
| 2351 | memmove (&r->u8[sh], &a->u8[0], 16-sh); |
| 2352 | memset (&r->u8[0], 0, sh); |
| 2353 | #else |
| 2354 | memmove (&r->u8[0], &a->u8[sh], 16-sh); |
| 2355 | memset (&r->u8[16-sh], 0, sh); |
| 2356 | #endif |
| 2357 | } |
| 2358 | |
aurel32 | e343da7 | 2009-01-04 22:09:31 +0000 | [diff] [blame] | 2359 | void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) |
| 2360 | { |
| 2361 | int i; |
| 2362 | for (i = 0; i < ARRAY_SIZE(r->u32); i++) { |
| 2363 | r->u32[i] = a->u32[i] >= b->u32[i]; |
| 2364 | } |
| 2365 | } |
| 2366 | |
aurel32 | 79f85c3 | 2009-01-04 22:11:10 +0000 | [diff] [blame] | 2367 | #if defined(WORDS_BIGENDIAN) |
| 2368 | #define UPKHI 1 |
| 2369 | #define UPKLO 0 |
| 2370 | #else |
| 2371 | #define UPKHI 0 |
| 2372 | #define UPKLO 1 |
| 2373 | #endif |
| 2374 | #define VUPKPX(suffix, hi) \ |
| 2375 | void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ |
| 2376 | { \ |
| 2377 | int i; \ |
| 2378 | ppc_avr_t result; \ |
| 2379 | for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ |
| 2380 | uint16_t e = b->u16[hi ? i : i+4]; \ |
| 2381 | uint8_t a = (e >> 15) ? 0xff : 0; \ |
| 2382 | uint8_t r = (e >> 10) & 0x1f; \ |
| 2383 | uint8_t g = (e >> 5) & 0x1f; \ |
| 2384 | uint8_t b = e & 0x1f; \ |
| 2385 | result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \ |
| 2386 | } \ |
| 2387 | *r = result; \ |
| 2388 | } |
| 2389 | VUPKPX(lpx, UPKLO) |
| 2390 | VUPKPX(hpx, UPKHI) |
| 2391 | #undef VUPKPX |
| 2392 | |
aurel32 | 6cf1c6e | 2009-01-04 22:11:20 +0000 | [diff] [blame] | 2393 | #define VUPK(suffix, unpacked, packee, hi) \ |
| 2394 | void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ |
| 2395 | { \ |
| 2396 | int i; \ |
| 2397 | ppc_avr_t result; \ |
| 2398 | if (hi) { \ |
| 2399 | for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \ |
| 2400 | result.unpacked[i] = b->packee[i]; \ |
| 2401 | } \ |
| 2402 | } else { \ |
| 2403 | for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); i++) { \ |
| 2404 | result.unpacked[i-ARRAY_SIZE(r->unpacked)] = b->packee[i]; \ |
| 2405 | } \ |
| 2406 | } \ |
| 2407 | *r = result; \ |
| 2408 | } |
| 2409 | VUPK(hsb, s16, s8, UPKHI) |
| 2410 | VUPK(hsh, s32, s16, UPKHI) |
| 2411 | VUPK(lsb, s16, s8, UPKLO) |
| 2412 | VUPK(lsh, s32, s16, UPKLO) |
| 2413 | #undef VUPK |
aurel32 | 79f85c3 | 2009-01-04 22:11:10 +0000 | [diff] [blame] | 2414 | #undef UPKHI |
| 2415 | #undef UPKLO |
| 2416 | |
aurel32 | d6a46fe | 2009-01-03 13:31:19 +0000 | [diff] [blame] | 2417 | #undef VECTOR_FOR_INORDER_I |
| 2418 | #undef HI_IDX |
| 2419 | #undef LO_IDX |
| 2420 | |
| 2421 | /*****************************************************************************/ |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2422 | /* SPE extension helpers */ |
| 2423 | /* Use a table to make this quicker */ |
| 2424 | static uint8_t hbrev[16] = { |
| 2425 | 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
| 2426 | 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
| 2427 | }; |
| 2428 | |
j_mayer | b068d6a | 2007-10-07 17:13:44 +0000 | [diff] [blame] | 2429 | static always_inline uint8_t byte_reverse (uint8_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2430 | { |
| 2431 | return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
| 2432 | } |
| 2433 | |
j_mayer | b068d6a | 2007-10-07 17:13:44 +0000 | [diff] [blame] | 2434 | static always_inline uint32_t word_reverse (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2435 | { |
| 2436 | return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
| 2437 | (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
| 2438 | } |
| 2439 | |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2440 | #define MASKBITS 16 // Random value - to be fixed (implementation dependant) |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2441 | target_ulong helper_brinc (target_ulong arg1, target_ulong arg2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2442 | { |
| 2443 | uint32_t a, b, d, mask; |
| 2444 | |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2445 | mask = UINT32_MAX >> (32 - MASKBITS); |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2446 | a = arg1 & mask; |
| 2447 | b = arg2 & mask; |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2448 | d = word_reverse(1 + word_reverse(a | ~b)); |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2449 | return (arg1 & ~mask) | (d & b); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2450 | } |
| 2451 | |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2452 | uint32_t helper_cntlsw32 (uint32_t val) |
| 2453 | { |
| 2454 | if (val & 0x80000000) |
| 2455 | return clz32(~val); |
| 2456 | else |
| 2457 | return clz32(val); |
| 2458 | } |
| 2459 | |
| 2460 | uint32_t helper_cntlzw32 (uint32_t val) |
| 2461 | { |
| 2462 | return clz32(val); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2463 | } |
| 2464 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2465 | /* Single-precision floating-point conversions */ |
| 2466 | static always_inline uint32_t efscfsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2467 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2468 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2469 | |
| 2470 | u.f = int32_to_float32(val, &env->spe_status); |
| 2471 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2472 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2473 | } |
| 2474 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2475 | static always_inline uint32_t efscfui (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2476 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2477 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2478 | |
| 2479 | u.f = uint32_to_float32(val, &env->spe_status); |
| 2480 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2481 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2482 | } |
| 2483 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2484 | static always_inline int32_t efsctsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2485 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2486 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2487 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2488 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2489 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2490 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2491 | return 0; |
| 2492 | |
| 2493 | return float32_to_int32(u.f, &env->spe_status); |
| 2494 | } |
| 2495 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2496 | static always_inline uint32_t efsctui (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2497 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2498 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2499 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2500 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2501 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2502 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2503 | return 0; |
| 2504 | |
| 2505 | return float32_to_uint32(u.f, &env->spe_status); |
| 2506 | } |
| 2507 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2508 | static always_inline uint32_t efsctsiz (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2509 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2510 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2511 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2512 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2513 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2514 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2515 | return 0; |
| 2516 | |
| 2517 | return float32_to_int32_round_to_zero(u.f, &env->spe_status); |
| 2518 | } |
| 2519 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2520 | static always_inline uint32_t efsctuiz (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2521 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2522 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2523 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2524 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2525 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2526 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2527 | return 0; |
| 2528 | |
| 2529 | return float32_to_uint32_round_to_zero(u.f, &env->spe_status); |
| 2530 | } |
| 2531 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2532 | static always_inline uint32_t efscfsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2533 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2534 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2535 | float32 tmp; |
| 2536 | |
| 2537 | u.f = int32_to_float32(val, &env->spe_status); |
| 2538 | tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
| 2539 | u.f = float32_div(u.f, tmp, &env->spe_status); |
| 2540 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2541 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2542 | } |
| 2543 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2544 | static always_inline uint32_t efscfuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2545 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2546 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2547 | float32 tmp; |
| 2548 | |
| 2549 | u.f = uint32_to_float32(val, &env->spe_status); |
| 2550 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2551 | u.f = float32_div(u.f, tmp, &env->spe_status); |
| 2552 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2553 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2554 | } |
| 2555 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2556 | static always_inline uint32_t efsctsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2557 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2558 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2559 | float32 tmp; |
| 2560 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2561 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2562 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2563 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2564 | return 0; |
| 2565 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2566 | u.f = float32_mul(u.f, tmp, &env->spe_status); |
| 2567 | |
| 2568 | return float32_to_int32(u.f, &env->spe_status); |
| 2569 | } |
| 2570 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2571 | static always_inline uint32_t efsctuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2572 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2573 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2574 | float32 tmp; |
| 2575 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2576 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2577 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2578 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2579 | return 0; |
| 2580 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2581 | u.f = float32_mul(u.f, tmp, &env->spe_status); |
| 2582 | |
| 2583 | return float32_to_uint32(u.f, &env->spe_status); |
| 2584 | } |
| 2585 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2586 | #define HELPER_SPE_SINGLE_CONV(name) \ |
| 2587 | uint32_t helper_e##name (uint32_t val) \ |
| 2588 | { \ |
| 2589 | return e##name(val); \ |
| 2590 | } |
| 2591 | /* efscfsi */ |
| 2592 | HELPER_SPE_SINGLE_CONV(fscfsi); |
| 2593 | /* efscfui */ |
| 2594 | HELPER_SPE_SINGLE_CONV(fscfui); |
| 2595 | /* efscfuf */ |
| 2596 | HELPER_SPE_SINGLE_CONV(fscfuf); |
| 2597 | /* efscfsf */ |
| 2598 | HELPER_SPE_SINGLE_CONV(fscfsf); |
| 2599 | /* efsctsi */ |
| 2600 | HELPER_SPE_SINGLE_CONV(fsctsi); |
| 2601 | /* efsctui */ |
| 2602 | HELPER_SPE_SINGLE_CONV(fsctui); |
| 2603 | /* efsctsiz */ |
| 2604 | HELPER_SPE_SINGLE_CONV(fsctsiz); |
| 2605 | /* efsctuiz */ |
| 2606 | HELPER_SPE_SINGLE_CONV(fsctuiz); |
| 2607 | /* efsctsf */ |
| 2608 | HELPER_SPE_SINGLE_CONV(fsctsf); |
| 2609 | /* efsctuf */ |
| 2610 | HELPER_SPE_SINGLE_CONV(fsctuf); |
| 2611 | |
| 2612 | #define HELPER_SPE_VECTOR_CONV(name) \ |
| 2613 | uint64_t helper_ev##name (uint64_t val) \ |
| 2614 | { \ |
| 2615 | return ((uint64_t)e##name(val >> 32) << 32) | \ |
| 2616 | (uint64_t)e##name(val); \ |
| 2617 | } |
| 2618 | /* evfscfsi */ |
| 2619 | HELPER_SPE_VECTOR_CONV(fscfsi); |
| 2620 | /* evfscfui */ |
| 2621 | HELPER_SPE_VECTOR_CONV(fscfui); |
| 2622 | /* evfscfuf */ |
| 2623 | HELPER_SPE_VECTOR_CONV(fscfuf); |
| 2624 | /* evfscfsf */ |
| 2625 | HELPER_SPE_VECTOR_CONV(fscfsf); |
| 2626 | /* evfsctsi */ |
| 2627 | HELPER_SPE_VECTOR_CONV(fsctsi); |
| 2628 | /* evfsctui */ |
| 2629 | HELPER_SPE_VECTOR_CONV(fsctui); |
| 2630 | /* evfsctsiz */ |
| 2631 | HELPER_SPE_VECTOR_CONV(fsctsiz); |
| 2632 | /* evfsctuiz */ |
| 2633 | HELPER_SPE_VECTOR_CONV(fsctuiz); |
| 2634 | /* evfsctsf */ |
| 2635 | HELPER_SPE_VECTOR_CONV(fsctsf); |
| 2636 | /* evfsctuf */ |
| 2637 | HELPER_SPE_VECTOR_CONV(fsctuf); |
| 2638 | |
| 2639 | /* Single-precision floating-point arithmetic */ |
| 2640 | static always_inline uint32_t efsadd (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2641 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2642 | CPU_FloatU u1, u2; |
| 2643 | u1.l = op1; |
| 2644 | u2.l = op2; |
| 2645 | u1.f = float32_add(u1.f, u2.f, &env->spe_status); |
| 2646 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2647 | } |
| 2648 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2649 | static always_inline uint32_t efssub (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2650 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2651 | CPU_FloatU u1, u2; |
| 2652 | u1.l = op1; |
| 2653 | u2.l = op2; |
| 2654 | u1.f = float32_sub(u1.f, u2.f, &env->spe_status); |
| 2655 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2656 | } |
| 2657 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2658 | static always_inline uint32_t efsmul (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2659 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2660 | CPU_FloatU u1, u2; |
| 2661 | u1.l = op1; |
| 2662 | u2.l = op2; |
| 2663 | u1.f = float32_mul(u1.f, u2.f, &env->spe_status); |
| 2664 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2665 | } |
| 2666 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2667 | static always_inline uint32_t efsdiv (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2668 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2669 | CPU_FloatU u1, u2; |
| 2670 | u1.l = op1; |
| 2671 | u2.l = op2; |
| 2672 | u1.f = float32_div(u1.f, u2.f, &env->spe_status); |
| 2673 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2674 | } |
| 2675 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2676 | #define HELPER_SPE_SINGLE_ARITH(name) \ |
| 2677 | uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ |
| 2678 | { \ |
| 2679 | return e##name(op1, op2); \ |
| 2680 | } |
| 2681 | /* efsadd */ |
| 2682 | HELPER_SPE_SINGLE_ARITH(fsadd); |
| 2683 | /* efssub */ |
| 2684 | HELPER_SPE_SINGLE_ARITH(fssub); |
| 2685 | /* efsmul */ |
| 2686 | HELPER_SPE_SINGLE_ARITH(fsmul); |
| 2687 | /* efsdiv */ |
| 2688 | HELPER_SPE_SINGLE_ARITH(fsdiv); |
| 2689 | |
| 2690 | #define HELPER_SPE_VECTOR_ARITH(name) \ |
| 2691 | uint64_t helper_ev##name (uint64_t op1, uint64_t op2) \ |
| 2692 | { \ |
| 2693 | return ((uint64_t)e##name(op1 >> 32, op2 >> 32) << 32) | \ |
| 2694 | (uint64_t)e##name(op1, op2); \ |
| 2695 | } |
| 2696 | /* evfsadd */ |
| 2697 | HELPER_SPE_VECTOR_ARITH(fsadd); |
| 2698 | /* evfssub */ |
| 2699 | HELPER_SPE_VECTOR_ARITH(fssub); |
| 2700 | /* evfsmul */ |
| 2701 | HELPER_SPE_VECTOR_ARITH(fsmul); |
| 2702 | /* evfsdiv */ |
| 2703 | HELPER_SPE_VECTOR_ARITH(fsdiv); |
| 2704 | |
| 2705 | /* Single-precision floating-point comparisons */ |
| 2706 | static always_inline uint32_t efststlt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2707 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2708 | CPU_FloatU u1, u2; |
| 2709 | u1.l = op1; |
| 2710 | u2.l = op2; |
| 2711 | return float32_lt(u1.f, u2.f, &env->spe_status) ? 4 : 0; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2712 | } |
| 2713 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2714 | static always_inline uint32_t efststgt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2715 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2716 | CPU_FloatU u1, u2; |
| 2717 | u1.l = op1; |
| 2718 | u2.l = op2; |
| 2719 | return float32_le(u1.f, u2.f, &env->spe_status) ? 0 : 4; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2720 | } |
| 2721 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2722 | static always_inline uint32_t efststeq (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2723 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2724 | CPU_FloatU u1, u2; |
| 2725 | u1.l = op1; |
| 2726 | u2.l = op2; |
| 2727 | return float32_eq(u1.f, u2.f, &env->spe_status) ? 4 : 0; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2728 | } |
| 2729 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2730 | static always_inline uint32_t efscmplt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2731 | { |
| 2732 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2733 | return efststlt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2734 | } |
| 2735 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2736 | static always_inline uint32_t efscmpgt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2737 | { |
| 2738 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2739 | return efststgt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2740 | } |
| 2741 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2742 | static always_inline uint32_t efscmpeq (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2743 | { |
| 2744 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2745 | return efststeq(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2746 | } |
| 2747 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2748 | #define HELPER_SINGLE_SPE_CMP(name) \ |
| 2749 | uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ |
| 2750 | { \ |
| 2751 | return e##name(op1, op2) << 2; \ |
| 2752 | } |
| 2753 | /* efststlt */ |
| 2754 | HELPER_SINGLE_SPE_CMP(fststlt); |
| 2755 | /* efststgt */ |
| 2756 | HELPER_SINGLE_SPE_CMP(fststgt); |
| 2757 | /* efststeq */ |
| 2758 | HELPER_SINGLE_SPE_CMP(fststeq); |
| 2759 | /* efscmplt */ |
| 2760 | HELPER_SINGLE_SPE_CMP(fscmplt); |
| 2761 | /* efscmpgt */ |
| 2762 | HELPER_SINGLE_SPE_CMP(fscmpgt); |
| 2763 | /* efscmpeq */ |
| 2764 | HELPER_SINGLE_SPE_CMP(fscmpeq); |
| 2765 | |
| 2766 | static always_inline uint32_t evcmp_merge (int t0, int t1) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2767 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2768 | return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2769 | } |
| 2770 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2771 | #define HELPER_VECTOR_SPE_CMP(name) \ |
| 2772 | uint32_t helper_ev##name (uint64_t op1, uint64_t op2) \ |
| 2773 | { \ |
| 2774 | return evcmp_merge(e##name(op1 >> 32, op2 >> 32), e##name(op1, op2)); \ |
| 2775 | } |
| 2776 | /* evfststlt */ |
| 2777 | HELPER_VECTOR_SPE_CMP(fststlt); |
| 2778 | /* evfststgt */ |
| 2779 | HELPER_VECTOR_SPE_CMP(fststgt); |
| 2780 | /* evfststeq */ |
| 2781 | HELPER_VECTOR_SPE_CMP(fststeq); |
| 2782 | /* evfscmplt */ |
| 2783 | HELPER_VECTOR_SPE_CMP(fscmplt); |
| 2784 | /* evfscmpgt */ |
| 2785 | HELPER_VECTOR_SPE_CMP(fscmpgt); |
| 2786 | /* evfscmpeq */ |
| 2787 | HELPER_VECTOR_SPE_CMP(fscmpeq); |
| 2788 | |
| 2789 | /* Double-precision floating-point conversion */ |
| 2790 | uint64_t helper_efdcfsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2791 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2792 | CPU_DoubleU u; |
| 2793 | |
| 2794 | u.d = int32_to_float64(val, &env->spe_status); |
| 2795 | |
| 2796 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2797 | } |
| 2798 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2799 | uint64_t helper_efdcfsid (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2800 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2801 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2802 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2803 | u.d = int64_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2804 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2805 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2806 | } |
| 2807 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2808 | uint64_t helper_efdcfui (uint32_t val) |
| 2809 | { |
| 2810 | CPU_DoubleU u; |
| 2811 | |
| 2812 | u.d = uint32_to_float64(val, &env->spe_status); |
| 2813 | |
| 2814 | return u.ll; |
| 2815 | } |
| 2816 | |
| 2817 | uint64_t helper_efdcfuid (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2818 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2819 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2820 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2821 | u.d = uint64_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2822 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2823 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2824 | } |
| 2825 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2826 | uint32_t helper_efdctsi (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2827 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2828 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2829 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2830 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2831 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2832 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2833 | return 0; |
| 2834 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2835 | return float64_to_int32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2836 | } |
| 2837 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2838 | uint32_t helper_efdctui (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2839 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2840 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2841 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2842 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2843 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2844 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2845 | return 0; |
| 2846 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2847 | return float64_to_uint32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2848 | } |
| 2849 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2850 | uint32_t helper_efdctsiz (uint64_t val) |
| 2851 | { |
| 2852 | CPU_DoubleU u; |
| 2853 | |
| 2854 | u.ll = val; |
| 2855 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2856 | if (unlikely(float64_is_nan(u.d))) |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2857 | return 0; |
| 2858 | |
| 2859 | return float64_to_int32_round_to_zero(u.d, &env->spe_status); |
| 2860 | } |
| 2861 | |
| 2862 | uint64_t helper_efdctsidz (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2863 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2864 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2865 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2866 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2867 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2868 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2869 | return 0; |
| 2870 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2871 | return float64_to_int64_round_to_zero(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2872 | } |
| 2873 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2874 | uint32_t helper_efdctuiz (uint64_t val) |
| 2875 | { |
| 2876 | CPU_DoubleU u; |
| 2877 | |
| 2878 | u.ll = val; |
| 2879 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2880 | if (unlikely(float64_is_nan(u.d))) |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2881 | return 0; |
| 2882 | |
| 2883 | return float64_to_uint32_round_to_zero(u.d, &env->spe_status); |
| 2884 | } |
| 2885 | |
| 2886 | uint64_t helper_efdctuidz (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2887 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2888 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2889 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2890 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2891 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2892 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2893 | return 0; |
| 2894 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2895 | return float64_to_uint64_round_to_zero(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2896 | } |
| 2897 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2898 | uint64_t helper_efdcfsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2899 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2900 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2901 | float64 tmp; |
| 2902 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2903 | u.d = int32_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2904 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2905 | u.d = float64_div(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2906 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2907 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2908 | } |
| 2909 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2910 | uint64_t helper_efdcfuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2911 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2912 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2913 | float64 tmp; |
| 2914 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2915 | u.d = uint32_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2916 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2917 | u.d = float64_div(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2918 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2919 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2920 | } |
| 2921 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2922 | uint32_t helper_efdctsf (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2923 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2924 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2925 | float64 tmp; |
| 2926 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2927 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2928 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2929 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2930 | return 0; |
| 2931 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2932 | u.d = float64_mul(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2933 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2934 | return float64_to_int32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2935 | } |
| 2936 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2937 | uint32_t helper_efdctuf (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2938 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2939 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2940 | float64 tmp; |
| 2941 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2942 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2943 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2944 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2945 | return 0; |
| 2946 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2947 | u.d = float64_mul(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2948 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2949 | return float64_to_uint32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2950 | } |
| 2951 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2952 | uint32_t helper_efscfd (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2953 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2954 | CPU_DoubleU u1; |
| 2955 | CPU_FloatU u2; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2956 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2957 | u1.ll = val; |
| 2958 | u2.f = float64_to_float32(u1.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2959 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2960 | return u2.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2961 | } |
| 2962 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2963 | uint64_t helper_efdcfs (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2964 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2965 | CPU_DoubleU u2; |
| 2966 | CPU_FloatU u1; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2967 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2968 | u1.l = val; |
| 2969 | u2.d = float32_to_float64(u1.f, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2970 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2971 | return u2.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2972 | } |
| 2973 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2974 | /* Double precision fixed-point arithmetic */ |
| 2975 | uint64_t helper_efdadd (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2976 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2977 | CPU_DoubleU u1, u2; |
| 2978 | u1.ll = op1; |
| 2979 | u2.ll = op2; |
| 2980 | u1.d = float64_add(u1.d, u2.d, &env->spe_status); |
| 2981 | return u1.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2982 | } |
| 2983 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2984 | uint64_t helper_efdsub (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2985 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2986 | CPU_DoubleU u1, u2; |
| 2987 | u1.ll = op1; |
| 2988 | u2.ll = op2; |
| 2989 | u1.d = float64_sub(u1.d, u2.d, &env->spe_status); |
| 2990 | return u1.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2991 | } |
| 2992 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2993 | uint64_t helper_efdmul (uint64_t op1, uint64_t op2) |
| 2994 | { |
| 2995 | CPU_DoubleU u1, u2; |
| 2996 | u1.ll = op1; |
| 2997 | u2.ll = op2; |
| 2998 | u1.d = float64_mul(u1.d, u2.d, &env->spe_status); |
| 2999 | return u1.ll; |
| 3000 | } |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3001 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3002 | uint64_t helper_efddiv (uint64_t op1, uint64_t op2) |
| 3003 | { |
| 3004 | CPU_DoubleU u1, u2; |
| 3005 | u1.ll = op1; |
| 3006 | u2.ll = op2; |
| 3007 | u1.d = float64_div(u1.d, u2.d, &env->spe_status); |
| 3008 | return u1.ll; |
| 3009 | } |
| 3010 | |
| 3011 | /* Double precision floating point helpers */ |
| 3012 | uint32_t helper_efdtstlt (uint64_t op1, uint64_t op2) |
| 3013 | { |
| 3014 | CPU_DoubleU u1, u2; |
| 3015 | u1.ll = op1; |
| 3016 | u2.ll = op2; |
| 3017 | return float64_lt(u1.d, u2.d, &env->spe_status) ? 4 : 0; |
| 3018 | } |
| 3019 | |
| 3020 | uint32_t helper_efdtstgt (uint64_t op1, uint64_t op2) |
| 3021 | { |
| 3022 | CPU_DoubleU u1, u2; |
| 3023 | u1.ll = op1; |
| 3024 | u2.ll = op2; |
| 3025 | return float64_le(u1.d, u2.d, &env->spe_status) ? 0 : 4; |
| 3026 | } |
| 3027 | |
| 3028 | uint32_t helper_efdtsteq (uint64_t op1, uint64_t op2) |
| 3029 | { |
| 3030 | CPU_DoubleU u1, u2; |
| 3031 | u1.ll = op1; |
| 3032 | u2.ll = op2; |
| 3033 | return float64_eq(u1.d, u2.d, &env->spe_status) ? 4 : 0; |
| 3034 | } |
| 3035 | |
| 3036 | uint32_t helper_efdcmplt (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3037 | { |
| 3038 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3039 | return helper_efdtstlt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3040 | } |
| 3041 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3042 | uint32_t helper_efdcmpgt (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3043 | { |
| 3044 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3045 | return helper_efdtstgt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3046 | } |
| 3047 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3048 | uint32_t helper_efdcmpeq (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3049 | { |
| 3050 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 3051 | return helper_efdtsteq(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 3052 | } |
| 3053 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3054 | /*****************************************************************************/ |
| 3055 | /* Softmmu support */ |
| 3056 | #if !defined (CONFIG_USER_ONLY) |
| 3057 | |
| 3058 | #define MMUSUFFIX _mmu |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3059 | |
| 3060 | #define SHIFT 0 |
| 3061 | #include "softmmu_template.h" |
| 3062 | |
| 3063 | #define SHIFT 1 |
| 3064 | #include "softmmu_template.h" |
| 3065 | |
| 3066 | #define SHIFT 2 |
| 3067 | #include "softmmu_template.h" |
| 3068 | |
| 3069 | #define SHIFT 3 |
| 3070 | #include "softmmu_template.h" |
| 3071 | |
| 3072 | /* try to fill the TLB and return an exception if error. If retaddr is |
| 3073 | NULL, it means that the function was called in C code (i.e. not |
| 3074 | from generated code or from helper.c) */ |
| 3075 | /* XXX: fix it to restore all registers */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 3076 | void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3077 | { |
| 3078 | TranslationBlock *tb; |
| 3079 | CPUState *saved_env; |
bellard | 44f8625 | 2007-11-11 12:35:55 +0000 | [diff] [blame] | 3080 | unsigned long pc; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3081 | int ret; |
| 3082 | |
| 3083 | /* XXX: hack to restore env in all cases, even if not called from |
| 3084 | generated code */ |
| 3085 | saved_env = env; |
| 3086 | env = cpu_single_env; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 3087 | ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3088 | if (unlikely(ret != 0)) { |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3089 | if (likely(retaddr)) { |
| 3090 | /* now we have a real cpu fault */ |
bellard | 44f8625 | 2007-11-11 12:35:55 +0000 | [diff] [blame] | 3091 | pc = (unsigned long)retaddr; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3092 | tb = tb_find_pc(pc); |
| 3093 | if (likely(tb)) { |
| 3094 | /* the PC is inside the translated code. It means that we have |
| 3095 | a virtual CPU fault */ |
| 3096 | cpu_restore_state(tb, env, pc, NULL); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3097 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3098 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 3099 | helper_raise_exception_err(env->exception_index, env->error_code); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3100 | } |
| 3101 | env = saved_env; |
| 3102 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 3103 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3104 | /* Segment registers load and store */ |
| 3105 | target_ulong helper_load_sr (target_ulong sr_num) |
| 3106 | { |
| 3107 | return env->sr[sr_num]; |
| 3108 | } |
| 3109 | |
| 3110 | void helper_store_sr (target_ulong sr_num, target_ulong val) |
| 3111 | { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 3112 | ppc_store_sr(env, sr_num, val); |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3113 | } |
| 3114 | |
| 3115 | /* SLB management */ |
| 3116 | #if defined(TARGET_PPC64) |
| 3117 | target_ulong helper_load_slb (target_ulong slb_nr) |
| 3118 | { |
| 3119 | return ppc_load_slb(env, slb_nr); |
| 3120 | } |
| 3121 | |
| 3122 | void helper_store_slb (target_ulong slb_nr, target_ulong rs) |
| 3123 | { |
| 3124 | ppc_store_slb(env, slb_nr, rs); |
| 3125 | } |
| 3126 | |
| 3127 | void helper_slbia (void) |
| 3128 | { |
| 3129 | ppc_slb_invalidate_all(env); |
| 3130 | } |
| 3131 | |
| 3132 | void helper_slbie (target_ulong addr) |
| 3133 | { |
| 3134 | ppc_slb_invalidate_one(env, addr); |
| 3135 | } |
| 3136 | |
| 3137 | #endif /* defined(TARGET_PPC64) */ |
| 3138 | |
| 3139 | /* TLB management */ |
| 3140 | void helper_tlbia (void) |
| 3141 | { |
| 3142 | ppc_tlb_invalidate_all(env); |
| 3143 | } |
| 3144 | |
| 3145 | void helper_tlbie (target_ulong addr) |
| 3146 | { |
| 3147 | ppc_tlb_invalidate_one(env, addr); |
| 3148 | } |
| 3149 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3150 | /* Software driven TLBs management */ |
| 3151 | /* PowerPC 602/603 software TLB load instructions helpers */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3152 | static void do_6xx_tlb (target_ulong new_EPN, int is_code) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3153 | { |
| 3154 | target_ulong RPN, CMP, EPN; |
| 3155 | int way; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 3156 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3157 | RPN = env->spr[SPR_RPA]; |
| 3158 | if (is_code) { |
| 3159 | CMP = env->spr[SPR_ICMP]; |
| 3160 | EPN = env->spr[SPR_IMISS]; |
| 3161 | } else { |
| 3162 | CMP = env->spr[SPR_DCMP]; |
| 3163 | EPN = env->spr[SPR_DMISS]; |
| 3164 | } |
| 3165 | way = (env->spr[SPR_SRR1] >> 17) & 1; |
| 3166 | #if defined (DEBUG_SOFTWARE_TLB) |
| 3167 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3168 | fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX |
j_mayer | 6b542af | 2007-11-24 02:03:55 +0000 | [diff] [blame] | 3169 | " PTE1 " ADDRX " way %d\n", |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3170 | __func__, new_EPN, EPN, CMP, RPN, way); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3171 | } |
| 3172 | #endif |
| 3173 | /* Store this TLB */ |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3174 | ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK), |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 3175 | way, is_code, CMP, RPN); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3176 | } |
| 3177 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3178 | void helper_6xx_tlbd (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3179 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3180 | do_6xx_tlb(EPN, 0); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3181 | } |
| 3182 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3183 | void helper_6xx_tlbi (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3184 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3185 | do_6xx_tlb(EPN, 1); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3186 | } |
| 3187 | |
| 3188 | /* PowerPC 74xx software TLB load instructions helpers */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3189 | static void do_74xx_tlb (target_ulong new_EPN, int is_code) |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 3190 | { |
| 3191 | target_ulong RPN, CMP, EPN; |
| 3192 | int way; |
| 3193 | |
| 3194 | RPN = env->spr[SPR_PTELO]; |
| 3195 | CMP = env->spr[SPR_PTEHI]; |
| 3196 | EPN = env->spr[SPR_TLBMISS] & ~0x3; |
| 3197 | way = env->spr[SPR_TLBMISS] & 0x3; |
| 3198 | #if defined (DEBUG_SOFTWARE_TLB) |
| 3199 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3200 | fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX |
j_mayer | 6b542af | 2007-11-24 02:03:55 +0000 | [diff] [blame] | 3201 | " PTE1 " ADDRX " way %d\n", |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3202 | __func__, new_EPN, EPN, CMP, RPN, way); |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 3203 | } |
| 3204 | #endif |
| 3205 | /* Store this TLB */ |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3206 | ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK), |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 3207 | way, is_code, CMP, RPN); |
| 3208 | } |
| 3209 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3210 | void helper_74xx_tlbd (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3211 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3212 | do_74xx_tlb(EPN, 0); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3213 | } |
| 3214 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3215 | void helper_74xx_tlbi (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3216 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3217 | do_74xx_tlb(EPN, 1); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 3218 | } |
| 3219 | |
j_mayer | a11b815 | 2007-10-28 00:55:05 +0000 | [diff] [blame] | 3220 | static always_inline target_ulong booke_tlb_to_page_size (int size) |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3221 | { |
| 3222 | return 1024 << (2 * size); |
| 3223 | } |
| 3224 | |
j_mayer | a11b815 | 2007-10-28 00:55:05 +0000 | [diff] [blame] | 3225 | static always_inline int booke_page_size_to_tlb (target_ulong page_size) |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3226 | { |
| 3227 | int size; |
| 3228 | |
| 3229 | switch (page_size) { |
| 3230 | case 0x00000400UL: |
| 3231 | size = 0x0; |
| 3232 | break; |
| 3233 | case 0x00001000UL: |
| 3234 | size = 0x1; |
| 3235 | break; |
| 3236 | case 0x00004000UL: |
| 3237 | size = 0x2; |
| 3238 | break; |
| 3239 | case 0x00010000UL: |
| 3240 | size = 0x3; |
| 3241 | break; |
| 3242 | case 0x00040000UL: |
| 3243 | size = 0x4; |
| 3244 | break; |
| 3245 | case 0x00100000UL: |
| 3246 | size = 0x5; |
| 3247 | break; |
| 3248 | case 0x00400000UL: |
| 3249 | size = 0x6; |
| 3250 | break; |
| 3251 | case 0x01000000UL: |
| 3252 | size = 0x7; |
| 3253 | break; |
| 3254 | case 0x04000000UL: |
| 3255 | size = 0x8; |
| 3256 | break; |
| 3257 | case 0x10000000UL: |
| 3258 | size = 0x9; |
| 3259 | break; |
| 3260 | case 0x40000000UL: |
| 3261 | size = 0xA; |
| 3262 | break; |
| 3263 | #if defined (TARGET_PPC64) |
| 3264 | case 0x000100000000ULL: |
| 3265 | size = 0xB; |
| 3266 | break; |
| 3267 | case 0x000400000000ULL: |
| 3268 | size = 0xC; |
| 3269 | break; |
| 3270 | case 0x001000000000ULL: |
| 3271 | size = 0xD; |
| 3272 | break; |
| 3273 | case 0x004000000000ULL: |
| 3274 | size = 0xE; |
| 3275 | break; |
| 3276 | case 0x010000000000ULL: |
| 3277 | size = 0xF; |
| 3278 | break; |
| 3279 | #endif |
| 3280 | default: |
| 3281 | size = -1; |
| 3282 | break; |
| 3283 | } |
| 3284 | |
| 3285 | return size; |
| 3286 | } |
| 3287 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3288 | /* Helpers for 4xx TLB management */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3289 | target_ulong helper_4xx_tlbre_lo (target_ulong entry) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3290 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3291 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3292 | target_ulong ret; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3293 | int size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3294 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3295 | entry &= 0x3F; |
| 3296 | tlb = &env->tlb[entry].tlbe; |
| 3297 | ret = tlb->EPN; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3298 | if (tlb->prot & PAGE_VALID) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3299 | ret |= 0x400; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3300 | size = booke_page_size_to_tlb(tlb->size); |
| 3301 | if (size < 0 || size > 0x7) |
| 3302 | size = 1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3303 | ret |= size << 7; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3304 | env->spr[SPR_40x_PID] = tlb->PID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3305 | return ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3306 | } |
| 3307 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3308 | target_ulong helper_4xx_tlbre_hi (target_ulong entry) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3309 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3310 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3311 | target_ulong ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3312 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3313 | entry &= 0x3F; |
| 3314 | tlb = &env->tlb[entry].tlbe; |
| 3315 | ret = tlb->RPN; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3316 | if (tlb->prot & PAGE_EXEC) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3317 | ret |= 0x200; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3318 | if (tlb->prot & PAGE_WRITE) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3319 | ret |= 0x100; |
| 3320 | return ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3321 | } |
| 3322 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3323 | void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3324 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3325 | ppcemb_tlb_t *tlb; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3326 | target_ulong page, end; |
| 3327 | |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3328 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3329 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3330 | fprintf(logfile, "%s entry %d val " ADDRX "\n", __func__, (int)entry, val); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3331 | } |
| 3332 | #endif |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3333 | entry &= 0x3F; |
| 3334 | tlb = &env->tlb[entry].tlbe; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3335 | /* Invalidate previous TLB (if it's valid) */ |
| 3336 | if (tlb->prot & PAGE_VALID) { |
| 3337 | end = tlb->EPN + tlb->size; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3338 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3339 | if (loglevel != 0) { |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3340 | fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3341 | " end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3342 | } |
| 3343 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3344 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
| 3345 | tlb_flush_page(env, page); |
| 3346 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3347 | tlb->size = booke_tlb_to_page_size((val >> 7) & 0x7); |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3348 | /* We cannot handle TLB size < TARGET_PAGE_SIZE. |
| 3349 | * If this ever occurs, one should use the ppcemb target instead |
| 3350 | * of the ppc or ppc64 one |
| 3351 | */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3352 | if ((val & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
j_mayer | 71c8b8f | 2007-09-19 05:46:03 +0000 | [diff] [blame] | 3353 | cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
| 3354 | "are not supported (%d)\n", |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3355 | tlb->size, TARGET_PAGE_SIZE, (int)((val >> 7) & 0x7)); |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3356 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3357 | tlb->EPN = val & ~(tlb->size - 1); |
| 3358 | if (val & 0x40) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3359 | tlb->prot |= PAGE_VALID; |
| 3360 | else |
| 3361 | tlb->prot &= ~PAGE_VALID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3362 | if (val & 0x20) { |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3363 | /* XXX: TO BE FIXED */ |
| 3364 | cpu_abort(env, "Little-endian TLB entries are not supported by now\n"); |
| 3365 | } |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3366 | tlb->PID = env->spr[SPR_40x_PID]; /* PID */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3367 | tlb->attr = val & 0xFF; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3368 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3369 | if (loglevel != 0) { |
| 3370 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3371 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3372 | (int)entry, tlb->RPN, tlb->EPN, tlb->size, |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3373 | tlb->prot & PAGE_READ ? 'r' : '-', |
| 3374 | tlb->prot & PAGE_WRITE ? 'w' : '-', |
| 3375 | tlb->prot & PAGE_EXEC ? 'x' : '-', |
| 3376 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
| 3377 | } |
| 3378 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3379 | /* Invalidate new TLB (if valid) */ |
| 3380 | if (tlb->prot & PAGE_VALID) { |
| 3381 | end = tlb->EPN + tlb->size; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3382 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3383 | if (loglevel != 0) { |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3384 | fprintf(logfile, "%s: invalidate TLB %d start " ADDRX |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3385 | " end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3386 | } |
| 3387 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3388 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
| 3389 | tlb_flush_page(env, page); |
| 3390 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3391 | } |
| 3392 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3393 | void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3394 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3395 | ppcemb_tlb_t *tlb; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3396 | |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3397 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3398 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3399 | fprintf(logfile, "%s entry %i val " ADDRX "\n", __func__, (int)entry, val); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3400 | } |
| 3401 | #endif |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3402 | entry &= 0x3F; |
| 3403 | tlb = &env->tlb[entry].tlbe; |
| 3404 | tlb->RPN = val & 0xFFFFFC00; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3405 | tlb->prot = PAGE_READ; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3406 | if (val & 0x200) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3407 | tlb->prot |= PAGE_EXEC; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3408 | if (val & 0x100) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3409 | tlb->prot |= PAGE_WRITE; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3410 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3411 | if (loglevel != 0) { |
| 3412 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3413 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3414 | (int)entry, tlb->RPN, tlb->EPN, tlb->size, |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3415 | tlb->prot & PAGE_READ ? 'r' : '-', |
| 3416 | tlb->prot & PAGE_WRITE ? 'w' : '-', |
| 3417 | tlb->prot & PAGE_EXEC ? 'x' : '-', |
| 3418 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
| 3419 | } |
| 3420 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3421 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3422 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3423 | target_ulong helper_4xx_tlbsx (target_ulong address) |
| 3424 | { |
| 3425 | return ppcemb_tlb_search(env, address, env->spr[SPR_40x_PID]); |
| 3426 | } |
| 3427 | |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3428 | /* PowerPC 440 TLB management */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3429 | void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3430 | { |
| 3431 | ppcemb_tlb_t *tlb; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3432 | target_ulong EPN, RPN, size; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3433 | int do_flush_tlbs; |
| 3434 | |
| 3435 | #if defined (DEBUG_SOFTWARE_TLB) |
| 3436 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3437 | fprintf(logfile, "%s word %d entry %d value " ADDRX "\n", |
| 3438 | __func__, word, (int)entry, value); |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3439 | } |
| 3440 | #endif |
| 3441 | do_flush_tlbs = 0; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3442 | entry &= 0x3F; |
| 3443 | tlb = &env->tlb[entry].tlbe; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3444 | switch (word) { |
| 3445 | default: |
| 3446 | /* Just here to please gcc */ |
| 3447 | case 0: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3448 | EPN = value & 0xFFFFFC00; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3449 | if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3450 | do_flush_tlbs = 1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3451 | tlb->EPN = EPN; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3452 | size = booke_tlb_to_page_size((value >> 4) & 0xF); |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3453 | if ((tlb->prot & PAGE_VALID) && tlb->size < size) |
| 3454 | do_flush_tlbs = 1; |
| 3455 | tlb->size = size; |
| 3456 | tlb->attr &= ~0x1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3457 | tlb->attr |= (value >> 8) & 1; |
| 3458 | if (value & 0x200) { |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3459 | tlb->prot |= PAGE_VALID; |
| 3460 | } else { |
| 3461 | if (tlb->prot & PAGE_VALID) { |
| 3462 | tlb->prot &= ~PAGE_VALID; |
| 3463 | do_flush_tlbs = 1; |
| 3464 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3465 | } |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3466 | tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF; |
| 3467 | if (do_flush_tlbs) |
| 3468 | tlb_flush(env, 1); |
| 3469 | break; |
| 3470 | case 1: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3471 | RPN = value & 0xFFFFFC0F; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3472 | if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) |
| 3473 | tlb_flush(env, 1); |
| 3474 | tlb->RPN = RPN; |
| 3475 | break; |
| 3476 | case 2: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3477 | tlb->attr = (tlb->attr & 0x1) | (value & 0x0000FF00); |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3478 | tlb->prot = tlb->prot & PAGE_VALID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3479 | if (value & 0x1) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3480 | tlb->prot |= PAGE_READ << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3481 | if (value & 0x2) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3482 | tlb->prot |= PAGE_WRITE << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3483 | if (value & 0x4) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3484 | tlb->prot |= PAGE_EXEC << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3485 | if (value & 0x8) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3486 | tlb->prot |= PAGE_READ; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3487 | if (value & 0x10) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3488 | tlb->prot |= PAGE_WRITE; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3489 | if (value & 0x20) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3490 | tlb->prot |= PAGE_EXEC; |
| 3491 | break; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3492 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3493 | } |
| 3494 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3495 | target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3496 | { |
| 3497 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3498 | target_ulong ret; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3499 | int size; |
| 3500 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3501 | entry &= 0x3F; |
| 3502 | tlb = &env->tlb[entry].tlbe; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3503 | switch (word) { |
| 3504 | default: |
| 3505 | /* Just here to please gcc */ |
| 3506 | case 0: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3507 | ret = tlb->EPN; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3508 | size = booke_page_size_to_tlb(tlb->size); |
| 3509 | if (size < 0 || size > 0xF) |
| 3510 | size = 1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3511 | ret |= size << 4; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3512 | if (tlb->attr & 0x1) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3513 | ret |= 0x100; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3514 | if (tlb->prot & PAGE_VALID) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3515 | ret |= 0x200; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3516 | env->spr[SPR_440_MMUCR] &= ~0x000000FF; |
| 3517 | env->spr[SPR_440_MMUCR] |= tlb->PID; |
| 3518 | break; |
| 3519 | case 1: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3520 | ret = tlb->RPN; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3521 | break; |
| 3522 | case 2: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3523 | ret = tlb->attr & ~0x1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3524 | if (tlb->prot & (PAGE_READ << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3525 | ret |= 0x1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3526 | if (tlb->prot & (PAGE_WRITE << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3527 | ret |= 0x2; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3528 | if (tlb->prot & (PAGE_EXEC << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3529 | ret |= 0x4; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3530 | if (tlb->prot & PAGE_READ) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3531 | ret |= 0x8; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3532 | if (tlb->prot & PAGE_WRITE) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3533 | ret |= 0x10; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3534 | if (tlb->prot & PAGE_EXEC) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3535 | ret |= 0x20; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3536 | break; |
| 3537 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3538 | return ret; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3539 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3540 | |
| 3541 | target_ulong helper_440_tlbsx (target_ulong address) |
| 3542 | { |
| 3543 | return ppcemb_tlb_search(env, address, env->spr[SPR_440_MMUCR] & 0xFF); |
| 3544 | } |
| 3545 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3546 | #endif /* !CONFIG_USER_ONLY */ |