target-ppc: fix fload_invalid_op_excp()
The argument is a value, not a flag. Update the tests accordingly. Also
set a correct default value for NaN.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6047 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 28cbc6f..2ba1e2b 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -671,15 +671,13 @@
int ve;
ve = fpscr_ve;
- if (op & POWERPC_EXCP_FP_VXSNAN) {
- /* Operation on signaling NaN */
+ switch (op) {
+ case POWERPC_EXCP_FP_VXSNAN:
env->fpscr |= 1 << FPSCR_VXSNAN;
- }
- if (op & POWERPC_EXCP_FP_VXSOFT) {
- /* Software-defined condition */
+ break;
+ case POWERPC_EXCP_FP_VXSOFT:
env->fpscr |= 1 << FPSCR_VXSOFT;
- }
- switch (op & ~(POWERPC_EXCP_FP_VXSOFT | POWERPC_EXCP_FP_VXSNAN)) {
+ break;
case POWERPC_EXCP_FP_VXISI:
/* Magnitude subtraction of infinities */
env->fpscr |= 1 << FPSCR_VXISI;
@@ -718,7 +716,7 @@
env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
if (ve == 0) {
/* Set the result to quiet NaN */
- ret = UINT64_MAX;
+ ret = 0xFFF8000000000000ULL;
env->fpscr &= ~(0xF << FPSCR_FPCC);
env->fpscr |= 0x11 << FPSCR_FPCC;
}
@@ -729,7 +727,7 @@
env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
if (ve == 0) {
/* Set the result to quiet NaN */
- ret = UINT64_MAX;
+ ret = 0xFFF8000000000000ULL;
env->fpscr &= ~(0xF << FPSCR_FPCC);
env->fpscr |= 0x11 << FPSCR_FPCC;
}