bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1 | /* |
bellard | 3fc6c08 | 2005-07-02 20:59:34 +0000 | [diff] [blame] | 2 | * PowerPC emulation helpers for qemu. |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
aurel32 | fad6cb1 | 2009-01-04 22:05:52 +0000 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 19 | */ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 20 | #include "exec.h" |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 21 | #include "host-utils.h" |
pbrook | a7812ae | 2008-11-17 14:43:54 +0000 | [diff] [blame] | 22 | #include "helper.h" |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 23 | |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 24 | #include "helper_regs.h" |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 25 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 26 | //#define DEBUG_OP |
| 27 | //#define DEBUG_EXCEPTIONS |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 28 | //#define DEBUG_SOFTWARE_TLB |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 29 | |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 30 | /*****************************************************************************/ |
| 31 | /* Exceptions processing helpers */ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 32 | |
aurel32 | 64adab3 | 2008-11-22 10:09:17 +0000 | [diff] [blame] | 33 | void helper_raise_exception_err (uint32_t exception, uint32_t error_code) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 34 | { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 35 | #if 0 |
| 36 | printf("Raise exception %3x code : %d\n", exception, error_code); |
| 37 | #endif |
| 38 | env->exception_index = exception; |
| 39 | env->error_code = error_code; |
| 40 | cpu_loop_exit(); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 41 | } |
bellard | 9fddaa0 | 2004-05-21 12:59:32 +0000 | [diff] [blame] | 42 | |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 43 | void helper_raise_exception (uint32_t exception) |
bellard | 9fddaa0 | 2004-05-21 12:59:32 +0000 | [diff] [blame] | 44 | { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 45 | helper_raise_exception_err(exception, 0); |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 46 | } |
| 47 | |
| 48 | /*****************************************************************************/ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 49 | /* Registers load and stores */ |
pbrook | a7812ae | 2008-11-17 14:43:54 +0000 | [diff] [blame] | 50 | target_ulong helper_load_cr (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 51 | { |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 52 | return (env->crf[0] << 28) | |
| 53 | (env->crf[1] << 24) | |
| 54 | (env->crf[2] << 20) | |
| 55 | (env->crf[3] << 16) | |
| 56 | (env->crf[4] << 12) | |
| 57 | (env->crf[5] << 8) | |
| 58 | (env->crf[6] << 4) | |
| 59 | (env->crf[7] << 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 60 | } |
| 61 | |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 62 | void helper_store_cr (target_ulong val, uint32_t mask) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 63 | { |
| 64 | int i, sh; |
| 65 | |
j_mayer | 3608160 | 2007-09-17 08:21:54 +0000 | [diff] [blame] | 66 | for (i = 0, sh = 7; i < 8; i++, sh--) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 67 | if (mask & (1 << sh)) |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 68 | env->crf[i] = (val >> (sh * 4)) & 0xFUL; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 69 | } |
| 70 | } |
| 71 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 72 | /*****************************************************************************/ |
| 73 | /* SPR accesses */ |
| 74 | void helper_load_dump_spr (uint32_t sprn) |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 75 | { |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 76 | if (loglevel != 0) { |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 77 | fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
| 78 | sprn, sprn, env->spr[sprn]); |
| 79 | } |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 80 | } |
| 81 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 82 | void helper_store_dump_spr (uint32_t sprn) |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 83 | { |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 84 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 85 | fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n", |
| 86 | sprn, sprn, env->spr[sprn]); |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 87 | } |
j_mayer | a496775 | 2007-04-16 07:10:48 +0000 | [diff] [blame] | 88 | } |
| 89 | |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 90 | target_ulong helper_load_tbl (void) |
| 91 | { |
| 92 | return cpu_ppc_load_tbl(env); |
| 93 | } |
| 94 | |
| 95 | target_ulong helper_load_tbu (void) |
| 96 | { |
| 97 | return cpu_ppc_load_tbu(env); |
| 98 | } |
| 99 | |
| 100 | target_ulong helper_load_atbl (void) |
| 101 | { |
| 102 | return cpu_ppc_load_atbl(env); |
| 103 | } |
| 104 | |
| 105 | target_ulong helper_load_atbu (void) |
| 106 | { |
| 107 | return cpu_ppc_load_atbu(env); |
| 108 | } |
| 109 | |
| 110 | target_ulong helper_load_601_rtcl (void) |
| 111 | { |
| 112 | return cpu_ppc601_load_rtcl(env); |
| 113 | } |
| 114 | |
| 115 | target_ulong helper_load_601_rtcu (void) |
| 116 | { |
| 117 | return cpu_ppc601_load_rtcu(env); |
| 118 | } |
| 119 | |
| 120 | #if !defined(CONFIG_USER_ONLY) |
| 121 | #if defined (TARGET_PPC64) |
| 122 | void helper_store_asr (target_ulong val) |
| 123 | { |
| 124 | ppc_store_asr(env, val); |
| 125 | } |
| 126 | #endif |
| 127 | |
| 128 | void helper_store_sdr1 (target_ulong val) |
| 129 | { |
| 130 | ppc_store_sdr1(env, val); |
| 131 | } |
| 132 | |
| 133 | void helper_store_tbl (target_ulong val) |
| 134 | { |
| 135 | cpu_ppc_store_tbl(env, val); |
| 136 | } |
| 137 | |
| 138 | void helper_store_tbu (target_ulong val) |
| 139 | { |
| 140 | cpu_ppc_store_tbu(env, val); |
| 141 | } |
| 142 | |
| 143 | void helper_store_atbl (target_ulong val) |
| 144 | { |
| 145 | cpu_ppc_store_atbl(env, val); |
| 146 | } |
| 147 | |
| 148 | void helper_store_atbu (target_ulong val) |
| 149 | { |
| 150 | cpu_ppc_store_atbu(env, val); |
| 151 | } |
| 152 | |
| 153 | void helper_store_601_rtcl (target_ulong val) |
| 154 | { |
| 155 | cpu_ppc601_store_rtcl(env, val); |
| 156 | } |
| 157 | |
| 158 | void helper_store_601_rtcu (target_ulong val) |
| 159 | { |
| 160 | cpu_ppc601_store_rtcu(env, val); |
| 161 | } |
| 162 | |
| 163 | target_ulong helper_load_decr (void) |
| 164 | { |
| 165 | return cpu_ppc_load_decr(env); |
| 166 | } |
| 167 | |
| 168 | void helper_store_decr (target_ulong val) |
| 169 | { |
| 170 | cpu_ppc_store_decr(env, val); |
| 171 | } |
| 172 | |
| 173 | void helper_store_hid0_601 (target_ulong val) |
| 174 | { |
| 175 | target_ulong hid0; |
| 176 | |
| 177 | hid0 = env->spr[SPR_HID0]; |
| 178 | if ((val ^ hid0) & 0x00000008) { |
| 179 | /* Change current endianness */ |
| 180 | env->hflags &= ~(1 << MSR_LE); |
| 181 | env->hflags_nmsr &= ~(1 << MSR_LE); |
| 182 | env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); |
| 183 | env->hflags |= env->hflags_nmsr; |
| 184 | if (loglevel != 0) { |
| 185 | fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n", |
| 186 | __func__, val & 0x8 ? 'l' : 'b', env->hflags); |
| 187 | } |
| 188 | } |
| 189 | env->spr[SPR_HID0] = (uint32_t)val; |
| 190 | } |
| 191 | |
| 192 | void helper_store_403_pbr (uint32_t num, target_ulong value) |
| 193 | { |
| 194 | if (likely(env->pb[num] != value)) { |
| 195 | env->pb[num] = value; |
| 196 | /* Should be optimized */ |
| 197 | tlb_flush(env, 1); |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | target_ulong helper_load_40x_pit (void) |
| 202 | { |
| 203 | return load_40x_pit(env); |
| 204 | } |
| 205 | |
| 206 | void helper_store_40x_pit (target_ulong val) |
| 207 | { |
| 208 | store_40x_pit(env, val); |
| 209 | } |
| 210 | |
| 211 | void helper_store_40x_dbcr0 (target_ulong val) |
| 212 | { |
| 213 | store_40x_dbcr0(env, val); |
| 214 | } |
| 215 | |
| 216 | void helper_store_40x_sler (target_ulong val) |
| 217 | { |
| 218 | store_40x_sler(env, val); |
| 219 | } |
| 220 | |
| 221 | void helper_store_booke_tcr (target_ulong val) |
| 222 | { |
| 223 | store_booke_tcr(env, val); |
| 224 | } |
| 225 | |
| 226 | void helper_store_booke_tsr (target_ulong val) |
| 227 | { |
| 228 | store_booke_tsr(env, val); |
| 229 | } |
| 230 | |
| 231 | void helper_store_ibatu (uint32_t nr, target_ulong val) |
| 232 | { |
| 233 | ppc_store_ibatu(env, nr, val); |
| 234 | } |
| 235 | |
| 236 | void helper_store_ibatl (uint32_t nr, target_ulong val) |
| 237 | { |
| 238 | ppc_store_ibatl(env, nr, val); |
| 239 | } |
| 240 | |
| 241 | void helper_store_dbatu (uint32_t nr, target_ulong val) |
| 242 | { |
| 243 | ppc_store_dbatu(env, nr, val); |
| 244 | } |
| 245 | |
| 246 | void helper_store_dbatl (uint32_t nr, target_ulong val) |
| 247 | { |
| 248 | ppc_store_dbatl(env, nr, val); |
| 249 | } |
| 250 | |
| 251 | void helper_store_601_batl (uint32_t nr, target_ulong val) |
| 252 | { |
| 253 | ppc_store_ibatl_601(env, nr, val); |
| 254 | } |
| 255 | |
| 256 | void helper_store_601_batu (uint32_t nr, target_ulong val) |
| 257 | { |
| 258 | ppc_store_ibatu_601(env, nr, val); |
| 259 | } |
| 260 | #endif |
| 261 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 262 | /*****************************************************************************/ |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 263 | /* Memory load and stores */ |
| 264 | |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 265 | static always_inline target_ulong addr_add(target_ulong addr, target_long arg) |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 266 | { |
| 267 | #if defined(TARGET_PPC64) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 268 | if (!msr_sf) |
| 269 | return (uint32_t)(addr + arg); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 270 | else |
| 271 | #endif |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 272 | return addr + arg; |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 273 | } |
| 274 | |
| 275 | void helper_lmw (target_ulong addr, uint32_t reg) |
| 276 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 277 | for (; reg < 32; reg++) { |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 278 | if (msr_le) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 279 | env->gpr[reg] = bswap32(ldl(addr)); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 280 | else |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 281 | env->gpr[reg] = ldl(addr); |
| 282 | addr = addr_add(addr, 4); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 283 | } |
| 284 | } |
| 285 | |
| 286 | void helper_stmw (target_ulong addr, uint32_t reg) |
| 287 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 288 | for (; reg < 32; reg++) { |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 289 | if (msr_le) |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 290 | stl(addr, bswap32((uint32_t)env->gpr[reg])); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 291 | else |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 292 | stl(addr, (uint32_t)env->gpr[reg]); |
| 293 | addr = addr_add(addr, 4); |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 294 | } |
| 295 | } |
| 296 | |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 297 | void helper_lsw(target_ulong addr, uint32_t nb, uint32_t reg) |
| 298 | { |
| 299 | int sh; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 300 | for (; nb > 3; nb -= 4) { |
| 301 | env->gpr[reg] = ldl(addr); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 302 | reg = (reg + 1) % 32; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 303 | addr = addr_add(addr, 4); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 304 | } |
| 305 | if (unlikely(nb > 0)) { |
| 306 | env->gpr[reg] = 0; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 307 | for (sh = 24; nb > 0; nb--, sh -= 8) { |
| 308 | env->gpr[reg] |= ldub(addr) << sh; |
| 309 | addr = addr_add(addr, 1); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 310 | } |
| 311 | } |
| 312 | } |
| 313 | /* PPC32 specification says we must generate an exception if |
| 314 | * rA is in the range of registers to be loaded. |
| 315 | * In an other hand, IBM says this is valid, but rA won't be loaded. |
| 316 | * For now, I'll follow the spec... |
| 317 | */ |
| 318 | void helper_lswx(target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) |
| 319 | { |
| 320 | if (likely(xer_bc != 0)) { |
| 321 | if (unlikely((ra != 0 && reg < ra && (reg + xer_bc) > ra) || |
| 322 | (reg < rb && (reg + xer_bc) > rb))) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 323 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 324 | POWERPC_EXCP_INVAL | |
| 325 | POWERPC_EXCP_INVAL_LSWX); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 326 | } else { |
| 327 | helper_lsw(addr, xer_bc, reg); |
| 328 | } |
| 329 | } |
| 330 | } |
| 331 | |
| 332 | void helper_stsw(target_ulong addr, uint32_t nb, uint32_t reg) |
| 333 | { |
| 334 | int sh; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 335 | for (; nb > 3; nb -= 4) { |
| 336 | stl(addr, env->gpr[reg]); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 337 | reg = (reg + 1) % 32; |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 338 | addr = addr_add(addr, 4); |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 339 | } |
| 340 | if (unlikely(nb > 0)) { |
aurel32 | a16b45e | 2008-12-29 09:46:58 +0000 | [diff] [blame] | 341 | for (sh = 24; nb > 0; nb--, sh -= 8) { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 342 | stb(addr, (env->gpr[reg] >> sh) & 0xFF); |
aurel32 | a16b45e | 2008-12-29 09:46:58 +0000 | [diff] [blame] | 343 | addr = addr_add(addr, 1); |
| 344 | } |
aurel32 | dfbc799 | 2008-11-30 16:24:21 +0000 | [diff] [blame] | 345 | } |
| 346 | } |
| 347 | |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 348 | static void do_dcbz(target_ulong addr, int dcache_line_size) |
| 349 | { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 350 | addr &= ~(dcache_line_size - 1); |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 351 | int i; |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 352 | for (i = 0 ; i < dcache_line_size ; i += 4) { |
aurel32 | dcc532c | 2008-11-30 17:54:21 +0000 | [diff] [blame] | 353 | stl(addr + i , 0); |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 354 | } |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 355 | if (env->reserve == addr) |
aurel32 | 799a8c8 | 2008-11-30 16:24:05 +0000 | [diff] [blame] | 356 | env->reserve = (target_ulong)-1ULL; |
| 357 | } |
| 358 | |
| 359 | void helper_dcbz(target_ulong addr) |
| 360 | { |
| 361 | do_dcbz(addr, env->dcache_line_size); |
| 362 | } |
| 363 | |
| 364 | void helper_dcbz_970(target_ulong addr) |
| 365 | { |
| 366 | if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) |
| 367 | do_dcbz(addr, 32); |
| 368 | else |
| 369 | do_dcbz(addr, env->dcache_line_size); |
| 370 | } |
| 371 | |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 372 | void helper_icbi(target_ulong addr) |
| 373 | { |
| 374 | uint32_t tmp; |
| 375 | |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 376 | addr &= ~(env->dcache_line_size - 1); |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 377 | /* Invalidate one cache line : |
| 378 | * PowerPC specification says this is to be treated like a load |
| 379 | * (not a fetch) by the MMU. To be sure it will be so, |
| 380 | * do the load "by hand". |
| 381 | */ |
aurel32 | dcc532c | 2008-11-30 17:54:21 +0000 | [diff] [blame] | 382 | tmp = ldl(addr); |
aurel32 | 37d269d | 2008-11-30 16:24:13 +0000 | [diff] [blame] | 383 | tb_invalidate_page_range(addr, addr + env->icache_line_size); |
| 384 | } |
| 385 | |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 386 | // XXX: to be tested |
| 387 | target_ulong helper_lscbx (target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) |
| 388 | { |
| 389 | int i, c, d; |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 390 | d = 24; |
| 391 | for (i = 0; i < xer_bc; i++) { |
aurel32 | 76db3ba | 2008-12-08 18:11:21 +0000 | [diff] [blame] | 392 | c = ldub(addr); |
| 393 | addr = addr_add(addr, 1); |
aurel32 | bdb4b68 | 2008-11-30 16:24:30 +0000 | [diff] [blame] | 394 | /* ra (if not 0) and rb are never modified */ |
| 395 | if (likely(reg != rb && (ra == 0 || reg != ra))) { |
| 396 | env->gpr[reg] = (env->gpr[reg] & ~(0xFF << d)) | (c << d); |
| 397 | } |
| 398 | if (unlikely(c == xer_cmp)) |
| 399 | break; |
| 400 | if (likely(d != 0)) { |
| 401 | d -= 8; |
| 402 | } else { |
| 403 | d = 24; |
| 404 | reg++; |
| 405 | reg = reg & 0x1F; |
| 406 | } |
| 407 | } |
| 408 | return i; |
| 409 | } |
| 410 | |
aurel32 | ff4a62c | 2008-11-30 16:23:56 +0000 | [diff] [blame] | 411 | /*****************************************************************************/ |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 412 | /* Fixed point operations helpers */ |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 413 | #if defined(TARGET_PPC64) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 414 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 415 | /* multiply high word */ |
| 416 | uint64_t helper_mulhd (uint64_t arg1, uint64_t arg2) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 417 | { |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 418 | uint64_t tl, th; |
| 419 | |
| 420 | muls64(&tl, &th, arg1, arg2); |
| 421 | return th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 422 | } |
| 423 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 424 | /* multiply high word unsigned */ |
| 425 | uint64_t helper_mulhdu (uint64_t arg1, uint64_t arg2) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 426 | { |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 427 | uint64_t tl, th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 428 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 429 | mulu64(&tl, &th, arg1, arg2); |
| 430 | return th; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 431 | } |
| 432 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 433 | uint64_t helper_mulldo (uint64_t arg1, uint64_t arg2) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 434 | { |
| 435 | int64_t th; |
| 436 | uint64_t tl; |
| 437 | |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 438 | muls64(&tl, (uint64_t *)&th, arg1, arg2); |
j_mayer | 88ad920 | 2007-10-25 23:36:08 +0000 | [diff] [blame] | 439 | /* If th != 0 && th != -1, then we had an overflow */ |
j_mayer | 6f2d897 | 2007-11-12 00:04:48 +0000 | [diff] [blame] | 440 | if (likely((uint64_t)(th + 1) <= 1)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 441 | env->xer &= ~(1 << XER_OV); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 442 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 443 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 444 | } |
aurel32 | 7463740 | 2008-11-01 00:54:12 +0000 | [diff] [blame] | 445 | return (int64_t)tl; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 446 | } |
| 447 | #endif |
| 448 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 449 | target_ulong helper_cntlzw (target_ulong t) |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 450 | { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 451 | return clz32(t); |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 452 | } |
| 453 | |
| 454 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 455 | target_ulong helper_cntlzd (target_ulong t) |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 456 | { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 457 | return clz64(t); |
j_mayer | 603fccc | 2007-10-28 12:54:53 +0000 | [diff] [blame] | 458 | } |
| 459 | #endif |
| 460 | |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 461 | /* shift right arithmetic helper */ |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 462 | target_ulong helper_sraw (target_ulong value, target_ulong shift) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 463 | { |
| 464 | int32_t ret; |
| 465 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 466 | if (likely(!(shift & 0x20))) { |
| 467 | if (likely((uint32_t)shift != 0)) { |
| 468 | shift &= 0x1f; |
| 469 | ret = (int32_t)value >> shift; |
| 470 | if (likely(ret >= 0 || (value & ((1 << shift) - 1)) == 0)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 471 | env->xer &= ~(1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 472 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 473 | env->xer |= (1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 474 | } |
| 475 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 476 | ret = (int32_t)value; |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 477 | env->xer &= ~(1 << XER_CA); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 478 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 479 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 480 | ret = (int32_t)value >> 31; |
| 481 | if (ret) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 482 | env->xer |= (1 << XER_CA); |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 483 | } else { |
| 484 | env->xer &= ~(1 << XER_CA); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 485 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 486 | } |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 487 | return (target_long)ret; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 488 | } |
| 489 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 490 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 491 | target_ulong helper_srad (target_ulong value, target_ulong shift) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 492 | { |
| 493 | int64_t ret; |
| 494 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 495 | if (likely(!(shift & 0x40))) { |
| 496 | if (likely((uint64_t)shift != 0)) { |
| 497 | shift &= 0x3f; |
| 498 | ret = (int64_t)value >> shift; |
| 499 | if (likely(ret >= 0 || (value & ((1 << shift) - 1)) == 0)) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 500 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 501 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 502 | env->xer |= (1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 503 | } |
| 504 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 505 | ret = (int64_t)value; |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 506 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 507 | } |
| 508 | } else { |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 509 | ret = (int64_t)value >> 63; |
| 510 | if (ret) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 511 | env->xer |= (1 << XER_CA); |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 512 | } else { |
| 513 | env->xer &= ~(1 << XER_CA); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 514 | } |
| 515 | } |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 516 | return ret; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 517 | } |
| 518 | #endif |
| 519 | |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 520 | target_ulong helper_popcntb (target_ulong val) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 521 | { |
aurel32 | 6176a26 | 2008-11-01 00:54:33 +0000 | [diff] [blame] | 522 | val = (val & 0x55555555) + ((val >> 1) & 0x55555555); |
| 523 | val = (val & 0x33333333) + ((val >> 2) & 0x33333333); |
| 524 | val = (val & 0x0f0f0f0f) + ((val >> 4) & 0x0f0f0f0f); |
| 525 | return val; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 526 | } |
| 527 | |
| 528 | #if defined(TARGET_PPC64) |
aurel32 | 26d6736 | 2008-10-21 11:31:27 +0000 | [diff] [blame] | 529 | target_ulong helper_popcntb_64 (target_ulong val) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 530 | { |
aurel32 | 6176a26 | 2008-11-01 00:54:33 +0000 | [diff] [blame] | 531 | val = (val & 0x5555555555555555ULL) + ((val >> 1) & 0x5555555555555555ULL); |
| 532 | val = (val & 0x3333333333333333ULL) + ((val >> 2) & 0x3333333333333333ULL); |
| 533 | val = (val & 0x0f0f0f0f0f0f0f0fULL) + ((val >> 4) & 0x0f0f0f0f0f0f0f0fULL); |
| 534 | return val; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 535 | } |
| 536 | #endif |
| 537 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 538 | /*****************************************************************************/ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 539 | /* Floating point operations helpers */ |
aurel32 | a0d7d5a | 2008-11-23 16:30:50 +0000 | [diff] [blame] | 540 | uint64_t helper_float32_to_float64(uint32_t arg) |
| 541 | { |
| 542 | CPU_FloatU f; |
| 543 | CPU_DoubleU d; |
| 544 | f.l = arg; |
| 545 | d.d = float32_to_float64(f.f, &env->fp_status); |
| 546 | return d.ll; |
| 547 | } |
| 548 | |
| 549 | uint32_t helper_float64_to_float32(uint64_t arg) |
| 550 | { |
| 551 | CPU_FloatU f; |
| 552 | CPU_DoubleU d; |
| 553 | d.ll = arg; |
| 554 | f.f = float64_to_float32(d.d, &env->fp_status); |
| 555 | return f.l; |
| 556 | } |
| 557 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 558 | static always_inline int isden (float64 d) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 559 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 560 | CPU_DoubleU u; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 561 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 562 | u.d = d; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 563 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 564 | return ((u.ll >> 52) & 0x7FF) == 0; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 565 | } |
| 566 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 567 | uint32_t helper_compute_fprf (uint64_t arg, uint32_t set_fprf) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 568 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 569 | CPU_DoubleU farg; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 570 | int isneg; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 571 | int ret; |
| 572 | farg.ll = arg; |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 573 | isneg = float64_is_neg(farg.d); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 574 | if (unlikely(float64_is_nan(farg.d))) { |
| 575 | if (float64_is_signaling_nan(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 576 | /* Signaling NaN: flags are undefined */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 577 | ret = 0x00; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 578 | } else { |
| 579 | /* Quiet NaN */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 580 | ret = 0x11; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 581 | } |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 582 | } else if (unlikely(float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 583 | /* +/- infinity */ |
| 584 | if (isneg) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 585 | ret = 0x09; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 586 | else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 587 | ret = 0x05; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 588 | } else { |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 589 | if (float64_is_zero(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 590 | /* +/- zero */ |
| 591 | if (isneg) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 592 | ret = 0x12; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 593 | else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 594 | ret = 0x02; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 595 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 596 | if (isden(farg.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 597 | /* Denormalized numbers */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 598 | ret = 0x10; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 599 | } else { |
| 600 | /* Normalized numbers */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 601 | ret = 0x00; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 602 | } |
| 603 | if (isneg) { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 604 | ret |= 0x08; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 605 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 606 | ret |= 0x04; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 607 | } |
| 608 | } |
| 609 | } |
| 610 | if (set_fprf) { |
| 611 | /* We update FPSCR_FPRF */ |
| 612 | env->fpscr &= ~(0x1F << FPSCR_FPRF); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 613 | env->fpscr |= ret << FPSCR_FPRF; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 614 | } |
| 615 | /* We just need fpcc to update Rc1 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 616 | return ret & 0xF; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 617 | } |
| 618 | |
| 619 | /* Floating-point invalid operations exception */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 620 | static always_inline uint64_t fload_invalid_op_excp (int op) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 621 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 622 | uint64_t ret = 0; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 623 | int ve; |
| 624 | |
| 625 | ve = fpscr_ve; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 626 | switch (op) { |
| 627 | case POWERPC_EXCP_FP_VXSNAN: |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 628 | env->fpscr |= 1 << FPSCR_VXSNAN; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 629 | break; |
| 630 | case POWERPC_EXCP_FP_VXSOFT: |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 631 | env->fpscr |= 1 << FPSCR_VXSOFT; |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 632 | break; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 633 | case POWERPC_EXCP_FP_VXISI: |
| 634 | /* Magnitude subtraction of infinities */ |
| 635 | env->fpscr |= 1 << FPSCR_VXISI; |
| 636 | goto update_arith; |
| 637 | case POWERPC_EXCP_FP_VXIDI: |
| 638 | /* Division of infinity by infinity */ |
| 639 | env->fpscr |= 1 << FPSCR_VXIDI; |
| 640 | goto update_arith; |
| 641 | case POWERPC_EXCP_FP_VXZDZ: |
| 642 | /* Division of zero by zero */ |
| 643 | env->fpscr |= 1 << FPSCR_VXZDZ; |
| 644 | goto update_arith; |
| 645 | case POWERPC_EXCP_FP_VXIMZ: |
| 646 | /* Multiplication of zero by infinity */ |
| 647 | env->fpscr |= 1 << FPSCR_VXIMZ; |
| 648 | goto update_arith; |
| 649 | case POWERPC_EXCP_FP_VXVC: |
| 650 | /* Ordered comparison of NaN */ |
| 651 | env->fpscr |= 1 << FPSCR_VXVC; |
| 652 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 653 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 654 | /* We must update the target FPR before raising the exception */ |
| 655 | if (ve != 0) { |
| 656 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 657 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_VXVC; |
| 658 | /* Update the floating-point enabled exception summary */ |
| 659 | env->fpscr |= 1 << FPSCR_FEX; |
| 660 | /* Exception is differed */ |
| 661 | ve = 0; |
| 662 | } |
| 663 | break; |
| 664 | case POWERPC_EXCP_FP_VXSQRT: |
| 665 | /* Square root of a negative number */ |
| 666 | env->fpscr |= 1 << FPSCR_VXSQRT; |
| 667 | update_arith: |
| 668 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 669 | if (ve == 0) { |
| 670 | /* Set the result to quiet NaN */ |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 671 | ret = 0xFFF8000000000000ULL; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 672 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 673 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 674 | } |
| 675 | break; |
| 676 | case POWERPC_EXCP_FP_VXCVI: |
| 677 | /* Invalid conversion */ |
| 678 | env->fpscr |= 1 << FPSCR_VXCVI; |
| 679 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 680 | if (ve == 0) { |
| 681 | /* Set the result to quiet NaN */ |
aurel32 | e0147e4 | 2008-12-15 17:13:55 +0000 | [diff] [blame] | 682 | ret = 0xFFF8000000000000ULL; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 683 | env->fpscr &= ~(0xF << FPSCR_FPCC); |
| 684 | env->fpscr |= 0x11 << FPSCR_FPCC; |
| 685 | } |
| 686 | break; |
| 687 | } |
| 688 | /* Update the floating-point invalid operation summary */ |
| 689 | env->fpscr |= 1 << FPSCR_VX; |
| 690 | /* Update the floating-point exception summary */ |
| 691 | env->fpscr |= 1 << FPSCR_FX; |
| 692 | if (ve != 0) { |
| 693 | /* Update the floating-point enabled exception summary */ |
| 694 | env->fpscr |= 1 << FPSCR_FEX; |
| 695 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 696 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 697 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 698 | return ret; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 699 | } |
| 700 | |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 701 | static always_inline void float_zero_divide_excp (void) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 702 | { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 703 | env->fpscr |= 1 << FPSCR_ZX; |
| 704 | env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); |
| 705 | /* Update the floating-point exception summary */ |
| 706 | env->fpscr |= 1 << FPSCR_FX; |
| 707 | if (fpscr_ze != 0) { |
| 708 | /* Update the floating-point enabled exception summary */ |
| 709 | env->fpscr |= 1 << FPSCR_FEX; |
| 710 | if (msr_fe0 != 0 || msr_fe1 != 0) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 711 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 712 | POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 713 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 714 | } |
| 715 | } |
| 716 | |
| 717 | static always_inline void float_overflow_excp (void) |
| 718 | { |
| 719 | env->fpscr |= 1 << FPSCR_OX; |
| 720 | /* Update the floating-point exception summary */ |
| 721 | env->fpscr |= 1 << FPSCR_FX; |
| 722 | if (fpscr_oe != 0) { |
| 723 | /* XXX: should adjust the result */ |
| 724 | /* Update the floating-point enabled exception summary */ |
| 725 | env->fpscr |= 1 << FPSCR_FEX; |
| 726 | /* We must update the target FPR before raising the exception */ |
| 727 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 728 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX; |
| 729 | } else { |
| 730 | env->fpscr |= 1 << FPSCR_XX; |
| 731 | env->fpscr |= 1 << FPSCR_FI; |
| 732 | } |
| 733 | } |
| 734 | |
| 735 | static always_inline void float_underflow_excp (void) |
| 736 | { |
| 737 | env->fpscr |= 1 << FPSCR_UX; |
| 738 | /* Update the floating-point exception summary */ |
| 739 | env->fpscr |= 1 << FPSCR_FX; |
| 740 | if (fpscr_ue != 0) { |
| 741 | /* XXX: should adjust the result */ |
| 742 | /* Update the floating-point enabled exception summary */ |
| 743 | env->fpscr |= 1 << FPSCR_FEX; |
| 744 | /* We must update the target FPR before raising the exception */ |
| 745 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 746 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX; |
| 747 | } |
| 748 | } |
| 749 | |
| 750 | static always_inline void float_inexact_excp (void) |
| 751 | { |
| 752 | env->fpscr |= 1 << FPSCR_XX; |
| 753 | /* Update the floating-point exception summary */ |
| 754 | env->fpscr |= 1 << FPSCR_FX; |
| 755 | if (fpscr_xe != 0) { |
| 756 | /* Update the floating-point enabled exception summary */ |
| 757 | env->fpscr |= 1 << FPSCR_FEX; |
| 758 | /* We must update the target FPR before raising the exception */ |
| 759 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 760 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX; |
| 761 | } |
| 762 | } |
| 763 | |
| 764 | static always_inline void fpscr_set_rounding_mode (void) |
| 765 | { |
| 766 | int rnd_type; |
| 767 | |
| 768 | /* Set rounding mode */ |
| 769 | switch (fpscr_rn) { |
| 770 | case 0: |
| 771 | /* Best approximation (round to nearest) */ |
| 772 | rnd_type = float_round_nearest_even; |
| 773 | break; |
| 774 | case 1: |
| 775 | /* Smaller magnitude (round toward zero) */ |
| 776 | rnd_type = float_round_to_zero; |
| 777 | break; |
| 778 | case 2: |
| 779 | /* Round toward +infinite */ |
| 780 | rnd_type = float_round_up; |
| 781 | break; |
| 782 | default: |
| 783 | case 3: |
| 784 | /* Round toward -infinite */ |
| 785 | rnd_type = float_round_down; |
| 786 | break; |
| 787 | } |
| 788 | set_float_rounding_mode(rnd_type, &env->fp_status); |
| 789 | } |
| 790 | |
aurel32 | 6e35d52 | 2008-12-14 18:40:58 +0000 | [diff] [blame] | 791 | void helper_fpscr_clrbit (uint32_t bit) |
| 792 | { |
| 793 | int prev; |
| 794 | |
| 795 | prev = (env->fpscr >> bit) & 1; |
| 796 | env->fpscr &= ~(1 << bit); |
| 797 | if (prev == 1) { |
| 798 | switch (bit) { |
| 799 | case FPSCR_RN1: |
| 800 | case FPSCR_RN: |
| 801 | fpscr_set_rounding_mode(); |
| 802 | break; |
| 803 | default: |
| 804 | break; |
| 805 | } |
| 806 | } |
| 807 | } |
| 808 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 809 | void helper_fpscr_setbit (uint32_t bit) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 810 | { |
| 811 | int prev; |
| 812 | |
| 813 | prev = (env->fpscr >> bit) & 1; |
| 814 | env->fpscr |= 1 << bit; |
| 815 | if (prev == 0) { |
| 816 | switch (bit) { |
| 817 | case FPSCR_VX: |
| 818 | env->fpscr |= 1 << FPSCR_FX; |
| 819 | if (fpscr_ve) |
| 820 | goto raise_ve; |
| 821 | case FPSCR_OX: |
| 822 | env->fpscr |= 1 << FPSCR_FX; |
| 823 | if (fpscr_oe) |
| 824 | goto raise_oe; |
| 825 | break; |
| 826 | case FPSCR_UX: |
| 827 | env->fpscr |= 1 << FPSCR_FX; |
| 828 | if (fpscr_ue) |
| 829 | goto raise_ue; |
| 830 | break; |
| 831 | case FPSCR_ZX: |
| 832 | env->fpscr |= 1 << FPSCR_FX; |
| 833 | if (fpscr_ze) |
| 834 | goto raise_ze; |
| 835 | break; |
| 836 | case FPSCR_XX: |
| 837 | env->fpscr |= 1 << FPSCR_FX; |
| 838 | if (fpscr_xe) |
| 839 | goto raise_xe; |
| 840 | break; |
| 841 | case FPSCR_VXSNAN: |
| 842 | case FPSCR_VXISI: |
| 843 | case FPSCR_VXIDI: |
| 844 | case FPSCR_VXZDZ: |
| 845 | case FPSCR_VXIMZ: |
| 846 | case FPSCR_VXVC: |
| 847 | case FPSCR_VXSOFT: |
| 848 | case FPSCR_VXSQRT: |
| 849 | case FPSCR_VXCVI: |
| 850 | env->fpscr |= 1 << FPSCR_VX; |
| 851 | env->fpscr |= 1 << FPSCR_FX; |
| 852 | if (fpscr_ve != 0) |
| 853 | goto raise_ve; |
| 854 | break; |
| 855 | case FPSCR_VE: |
| 856 | if (fpscr_vx != 0) { |
| 857 | raise_ve: |
| 858 | env->error_code = POWERPC_EXCP_FP; |
| 859 | if (fpscr_vxsnan) |
| 860 | env->error_code |= POWERPC_EXCP_FP_VXSNAN; |
| 861 | if (fpscr_vxisi) |
| 862 | env->error_code |= POWERPC_EXCP_FP_VXISI; |
| 863 | if (fpscr_vxidi) |
| 864 | env->error_code |= POWERPC_EXCP_FP_VXIDI; |
| 865 | if (fpscr_vxzdz) |
| 866 | env->error_code |= POWERPC_EXCP_FP_VXZDZ; |
| 867 | if (fpscr_vximz) |
| 868 | env->error_code |= POWERPC_EXCP_FP_VXIMZ; |
| 869 | if (fpscr_vxvc) |
| 870 | env->error_code |= POWERPC_EXCP_FP_VXVC; |
| 871 | if (fpscr_vxsoft) |
| 872 | env->error_code |= POWERPC_EXCP_FP_VXSOFT; |
| 873 | if (fpscr_vxsqrt) |
| 874 | env->error_code |= POWERPC_EXCP_FP_VXSQRT; |
| 875 | if (fpscr_vxcvi) |
| 876 | env->error_code |= POWERPC_EXCP_FP_VXCVI; |
| 877 | goto raise_excp; |
| 878 | } |
| 879 | break; |
| 880 | case FPSCR_OE: |
| 881 | if (fpscr_ox != 0) { |
| 882 | raise_oe: |
| 883 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX; |
| 884 | goto raise_excp; |
| 885 | } |
| 886 | break; |
| 887 | case FPSCR_UE: |
| 888 | if (fpscr_ux != 0) { |
| 889 | raise_ue: |
| 890 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX; |
| 891 | goto raise_excp; |
| 892 | } |
| 893 | break; |
| 894 | case FPSCR_ZE: |
| 895 | if (fpscr_zx != 0) { |
| 896 | raise_ze: |
| 897 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX; |
| 898 | goto raise_excp; |
| 899 | } |
| 900 | break; |
| 901 | case FPSCR_XE: |
| 902 | if (fpscr_xx != 0) { |
| 903 | raise_xe: |
| 904 | env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX; |
| 905 | goto raise_excp; |
| 906 | } |
| 907 | break; |
| 908 | case FPSCR_RN1: |
| 909 | case FPSCR_RN: |
| 910 | fpscr_set_rounding_mode(); |
| 911 | break; |
| 912 | default: |
| 913 | break; |
| 914 | raise_excp: |
| 915 | /* Update the floating-point enabled exception summary */ |
| 916 | env->fpscr |= 1 << FPSCR_FEX; |
| 917 | /* We have to update Rc1 before raising the exception */ |
| 918 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 919 | break; |
| 920 | } |
| 921 | } |
| 922 | } |
| 923 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 924 | void helper_store_fpscr (uint64_t arg, uint32_t mask) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 925 | { |
| 926 | /* |
| 927 | * We use only the 32 LSB of the incoming fpr |
| 928 | */ |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 929 | uint32_t prev, new; |
| 930 | int i; |
| 931 | |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 932 | prev = env->fpscr; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 933 | new = (uint32_t)arg; |
aurel32 | 27ee5df | 2008-12-15 00:30:28 +0000 | [diff] [blame] | 934 | new &= ~0x60000000; |
| 935 | new |= prev & 0x60000000; |
| 936 | for (i = 0; i < 8; i++) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 937 | if (mask & (1 << i)) { |
| 938 | env->fpscr &= ~(0xF << (4 * i)); |
| 939 | env->fpscr |= new & (0xF << (4 * i)); |
| 940 | } |
| 941 | } |
| 942 | /* Update VX and FEX */ |
| 943 | if (fpscr_ix != 0) |
| 944 | env->fpscr |= 1 << FPSCR_VX; |
aurel32 | 5567025 | 2008-03-10 00:09:28 +0000 | [diff] [blame] | 945 | else |
| 946 | env->fpscr &= ~(1 << FPSCR_VX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 947 | if ((fpscr_ex & fpscr_eex) != 0) { |
| 948 | env->fpscr |= 1 << FPSCR_FEX; |
| 949 | env->exception_index = POWERPC_EXCP_PROGRAM; |
| 950 | /* XXX: we should compute it properly */ |
| 951 | env->error_code = POWERPC_EXCP_FP; |
| 952 | } |
aurel32 | 5567025 | 2008-03-10 00:09:28 +0000 | [diff] [blame] | 953 | else |
| 954 | env->fpscr &= ~(1 << FPSCR_FEX); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 955 | fpscr_set_rounding_mode(); |
| 956 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 957 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 958 | void helper_float_check_status (void) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 959 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 960 | #ifdef CONFIG_SOFTFLOAT |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 961 | if (env->exception_index == POWERPC_EXCP_PROGRAM && |
| 962 | (env->error_code & POWERPC_EXCP_FP)) { |
| 963 | /* Differred floating-point exception after target FPR update */ |
| 964 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 965 | helper_raise_exception_err(env->exception_index, env->error_code); |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 966 | } else { |
| 967 | int status = get_float_exception_flags(&env->fp_status); |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 968 | if (status & float_flag_divbyzero) { |
| 969 | float_zero_divide_excp(); |
| 970 | } else if (status & float_flag_overflow) { |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 971 | float_overflow_excp(); |
| 972 | } else if (status & float_flag_underflow) { |
| 973 | float_underflow_excp(); |
| 974 | } else if (status & float_flag_inexact) { |
| 975 | float_inexact_excp(); |
| 976 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 977 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 978 | #else |
| 979 | if (env->exception_index == POWERPC_EXCP_PROGRAM && |
| 980 | (env->error_code & POWERPC_EXCP_FP)) { |
| 981 | /* Differred floating-point exception after target FPR update */ |
| 982 | if (msr_fe0 != 0 || msr_fe1 != 0) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 983 | helper_raise_exception_err(env->exception_index, env->error_code); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 984 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 985 | #endif |
| 986 | } |
| 987 | |
| 988 | #ifdef CONFIG_SOFTFLOAT |
| 989 | void helper_reset_fpstatus (void) |
| 990 | { |
aurel32 | be94c95 | 2008-12-13 12:13:33 +0000 | [diff] [blame] | 991 | set_float_exception_flags(0, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 992 | } |
| 993 | #endif |
| 994 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 995 | /* fadd - fadd. */ |
| 996 | uint64_t helper_fadd (uint64_t arg1, uint64_t arg2) |
| 997 | { |
| 998 | CPU_DoubleU farg1, farg2; |
| 999 | |
| 1000 | farg1.ll = arg1; |
| 1001 | farg2.ll = arg2; |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1002 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1003 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1004 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1005 | /* sNaN addition */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1006 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1007 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
| 1008 | float64_is_neg(farg1.d) != float64_is_neg(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1009 | /* Magnitude subtraction of infinities */ |
aurel32 | cf1cf21 | 2008-12-13 11:46:36 +0000 | [diff] [blame] | 1010 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1011 | } else { |
| 1012 | farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1013 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1014 | #else |
| 1015 | farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
| 1016 | #endif |
| 1017 | return farg1.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1018 | } |
| 1019 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1020 | /* fsub - fsub. */ |
| 1021 | uint64_t helper_fsub (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1022 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1023 | CPU_DoubleU farg1, farg2; |
| 1024 | |
| 1025 | farg1.ll = arg1; |
| 1026 | farg2.ll = arg2; |
| 1027 | #if USE_PRECISE_EMULATION |
| 1028 | { |
| 1029 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1030 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1031 | /* sNaN subtraction */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1032 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1033 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
| 1034 | float64_is_neg(farg1.d) == float64_is_neg(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1035 | /* Magnitude subtraction of infinities */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1036 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
aurel32 | 17218d1 | 2008-12-15 17:14:35 +0000 | [diff] [blame] | 1037 | } else { |
| 1038 | farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1039 | } |
| 1040 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1041 | #else |
| 1042 | farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
| 1043 | #endif |
| 1044 | return farg1.ll; |
| 1045 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1046 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1047 | /* fmul - fmul. */ |
| 1048 | uint64_t helper_fmul (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1049 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1050 | CPU_DoubleU farg1, farg2; |
| 1051 | |
| 1052 | farg1.ll = arg1; |
| 1053 | farg2.ll = arg2; |
| 1054 | #if USE_PRECISE_EMULATION |
| 1055 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1056 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1057 | /* sNaN multiplication */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1058 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1059 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1060 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1061 | /* Multiplication of zero by infinity */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1062 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1063 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1064 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1065 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1066 | #else |
| 1067 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1068 | #endif |
| 1069 | return farg1.ll; |
| 1070 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1071 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1072 | /* fdiv - fdiv. */ |
| 1073 | uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2) |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1074 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1075 | CPU_DoubleU farg1, farg2; |
| 1076 | |
| 1077 | farg1.ll = arg1; |
| 1078 | farg2.ll = arg2; |
| 1079 | #if USE_PRECISE_EMULATION |
| 1080 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1081 | float64_is_signaling_nan(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1082 | /* sNaN division */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1083 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1084 | } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1085 | /* Division of infinity by infinity */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1086 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI); |
aurel32 | e33e94f | 2008-12-18 22:44:21 +0000 | [diff] [blame] | 1087 | } else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.d))) { |
| 1088 | /* Division of zero by zero */ |
| 1089 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXZDZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1090 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1091 | farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1092 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1093 | #else |
| 1094 | farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
| 1095 | #endif |
| 1096 | return farg1.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1097 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1098 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1099 | /* fabs */ |
| 1100 | uint64_t helper_fabs (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1101 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1102 | CPU_DoubleU farg; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1103 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1104 | farg.ll = arg; |
| 1105 | farg.d = float64_abs(farg.d); |
| 1106 | return farg.ll; |
| 1107 | } |
| 1108 | |
| 1109 | /* fnabs */ |
| 1110 | uint64_t helper_fnabs (uint64_t arg) |
| 1111 | { |
| 1112 | CPU_DoubleU farg; |
| 1113 | |
| 1114 | farg.ll = arg; |
| 1115 | farg.d = float64_abs(farg.d); |
| 1116 | farg.d = float64_chs(farg.d); |
| 1117 | return farg.ll; |
| 1118 | } |
| 1119 | |
| 1120 | /* fneg */ |
| 1121 | uint64_t helper_fneg (uint64_t arg) |
| 1122 | { |
| 1123 | CPU_DoubleU farg; |
| 1124 | |
| 1125 | farg.ll = arg; |
| 1126 | farg.d = float64_chs(farg.d); |
| 1127 | return farg.ll; |
| 1128 | } |
| 1129 | |
| 1130 | /* fctiw - fctiw. */ |
| 1131 | uint64_t helper_fctiw (uint64_t arg) |
| 1132 | { |
| 1133 | CPU_DoubleU farg; |
| 1134 | farg.ll = arg; |
| 1135 | |
| 1136 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1137 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1138 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1139 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1140 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1141 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1142 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1143 | farg.ll = float64_to_int32(farg.d, &env->fp_status); |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1144 | #if USE_PRECISE_EMULATION |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1145 | /* XXX: higher bits are not supposed to be significant. |
| 1146 | * to make tests easier, return the same as a real PowerPC 750 |
| 1147 | */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1148 | farg.ll |= 0xFFF80000ULL << 32; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1149 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1150 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1151 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1152 | } |
| 1153 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1154 | /* fctiwz - fctiwz. */ |
| 1155 | uint64_t helper_fctiwz (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1156 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1157 | CPU_DoubleU farg; |
| 1158 | farg.ll = arg; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1159 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1160 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1161 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1162 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1163 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1164 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1165 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1166 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1167 | farg.ll = float64_to_int32_round_to_zero(farg.d, &env->fp_status); |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1168 | #if USE_PRECISE_EMULATION |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1169 | /* XXX: higher bits are not supposed to be significant. |
| 1170 | * to make tests easier, return the same as a real PowerPC 750 |
| 1171 | */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1172 | farg.ll |= 0xFFF80000ULL << 32; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1173 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1174 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1175 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1176 | } |
| 1177 | |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1178 | #if defined(TARGET_PPC64) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1179 | /* fcfid - fcfid. */ |
| 1180 | uint64_t helper_fcfid (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1181 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1182 | CPU_DoubleU farg; |
| 1183 | farg.d = int64_to_float64(arg, &env->fp_status); |
| 1184 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1185 | } |
| 1186 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1187 | /* fctid - fctid. */ |
| 1188 | uint64_t helper_fctid (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1189 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1190 | CPU_DoubleU farg; |
| 1191 | farg.ll = arg; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1192 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1193 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1194 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1195 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1196 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1197 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1198 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1199 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1200 | farg.ll = float64_to_int64(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1201 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1202 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1203 | } |
| 1204 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1205 | /* fctidz - fctidz. */ |
| 1206 | uint64_t helper_fctidz (uint64_t arg) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1207 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1208 | CPU_DoubleU farg; |
| 1209 | farg.ll = arg; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1210 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1211 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1212 | /* sNaN conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1213 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1214 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1215 | /* qNan / infinity conversion */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1216 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1217 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1218 | farg.ll = float64_to_int64_round_to_zero(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1219 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1220 | return farg.ll; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1221 | } |
| 1222 | |
| 1223 | #endif |
| 1224 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1225 | static always_inline uint64_t do_fri (uint64_t arg, int rounding_mode) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1226 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1227 | CPU_DoubleU farg; |
| 1228 | farg.ll = arg; |
| 1229 | |
| 1230 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1231 | /* sNaN round */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1232 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1233 | } else if (unlikely(float64_is_nan(farg.d) || float64_is_infinity(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1234 | /* qNan / infinity round */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1235 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1236 | } else { |
| 1237 | set_float_rounding_mode(rounding_mode, &env->fp_status); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1238 | farg.ll = float64_round_to_int(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1239 | /* Restore rounding mode from FPSCR */ |
| 1240 | fpscr_set_rounding_mode(); |
| 1241 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1242 | return farg.ll; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1243 | } |
| 1244 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1245 | uint64_t helper_frin (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1246 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1247 | return do_fri(arg, float_round_nearest_even); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1248 | } |
| 1249 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1250 | uint64_t helper_friz (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1251 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1252 | return do_fri(arg, float_round_to_zero); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1253 | } |
| 1254 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1255 | uint64_t helper_frip (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1256 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1257 | return do_fri(arg, float_round_up); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1258 | } |
| 1259 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1260 | uint64_t helper_frim (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1261 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1262 | return do_fri(arg, float_round_down); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1263 | } |
| 1264 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1265 | /* fmadd - fmadd. */ |
| 1266 | uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
| 1267 | { |
| 1268 | CPU_DoubleU farg1, farg2, farg3; |
| 1269 | |
| 1270 | farg1.ll = arg1; |
| 1271 | farg2.ll = arg2; |
| 1272 | farg3.ll = arg3; |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1273 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1274 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1275 | float64_is_signaling_nan(farg2.d) || |
| 1276 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1277 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1278 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1279 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1280 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1281 | /* Multiplication of zero by infinity */ |
| 1282 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1283 | } else { |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1284 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1285 | /* This is the way the PowerPC specification defines it */ |
| 1286 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1287 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1288 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1289 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1290 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1291 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1292 | float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { |
| 1293 | /* Magnitude subtraction of infinities */ |
| 1294 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1295 | } else { |
| 1296 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1297 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
| 1298 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1299 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1300 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1301 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1302 | farg1.d = (farg1.d * farg2.d) + farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1303 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1304 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1305 | #else |
| 1306 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1307 | farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
| 1308 | #endif |
| 1309 | return farg1.ll; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1310 | } |
| 1311 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1312 | /* fmsub - fmsub. */ |
| 1313 | uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1314 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1315 | CPU_DoubleU farg1, farg2, farg3; |
| 1316 | |
| 1317 | farg1.ll = arg1; |
| 1318 | farg2.ll = arg2; |
| 1319 | farg3.ll = arg3; |
| 1320 | #if USE_PRECISE_EMULATION |
| 1321 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1322 | float64_is_signaling_nan(farg2.d) || |
| 1323 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1324 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1325 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1326 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1327 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1328 | /* Multiplication of zero by infinity */ |
| 1329 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1330 | } else { |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1331 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1332 | /* This is the way the PowerPC specification defines it */ |
| 1333 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1334 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1335 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1336 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1337 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1338 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1339 | float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { |
| 1340 | /* Magnitude subtraction of infinities */ |
| 1341 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1342 | } else { |
| 1343 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1344 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
| 1345 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1346 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1347 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1348 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1349 | farg1.d = (farg1.d * farg2.d) - farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1350 | #endif |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1351 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1352 | #else |
| 1353 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1354 | farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
| 1355 | #endif |
| 1356 | return farg1.ll; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1357 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1358 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1359 | /* fnmadd - fnmadd. */ |
| 1360 | uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1361 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1362 | CPU_DoubleU farg1, farg2, farg3; |
| 1363 | |
| 1364 | farg1.ll = arg1; |
| 1365 | farg2.ll = arg2; |
| 1366 | farg3.ll = arg3; |
| 1367 | |
| 1368 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1369 | float64_is_signaling_nan(farg2.d) || |
| 1370 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1371 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1372 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1373 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1374 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1375 | /* Multiplication of zero by infinity */ |
| 1376 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1377 | } else { |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1378 | #if USE_PRECISE_EMULATION |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1379 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1380 | /* This is the way the PowerPC specification defines it */ |
| 1381 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1382 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1383 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1384 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1385 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1386 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1387 | float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { |
| 1388 | /* Magnitude subtraction of infinities */ |
| 1389 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1390 | } else { |
| 1391 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1392 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
| 1393 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1394 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1395 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1396 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1397 | farg1.d = (farg1.d * farg2.d) + farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1398 | #endif |
| 1399 | #else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1400 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1401 | farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1402 | #endif |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 1403 | if (likely(!float64_is_nan(farg1.d))) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1404 | farg1.d = float64_chs(farg1.d); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1405 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1406 | return farg1.ll; |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1407 | } |
| 1408 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1409 | /* fnmsub - fnmsub. */ |
| 1410 | uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 4b3686f | 2004-05-23 22:18:12 +0000 | [diff] [blame] | 1411 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1412 | CPU_DoubleU farg1, farg2, farg3; |
| 1413 | |
| 1414 | farg1.ll = arg1; |
| 1415 | farg2.ll = arg2; |
| 1416 | farg3.ll = arg3; |
| 1417 | |
| 1418 | if (unlikely(float64_is_signaling_nan(farg1.d) || |
| 1419 | float64_is_signaling_nan(farg2.d) || |
| 1420 | float64_is_signaling_nan(farg3.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1421 | /* sNaN operation */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1422 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1423 | } else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
| 1424 | (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { |
| 1425 | /* Multiplication of zero by infinity */ |
| 1426 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1427 | } else { |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1428 | #if USE_PRECISE_EMULATION |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1429 | #ifdef FLOAT128 |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1430 | /* This is the way the PowerPC specification defines it */ |
| 1431 | float128 ft0_128, ft1_128; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1432 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1433 | ft0_128 = float64_to_float128(farg1.d, &env->fp_status); |
| 1434 | ft1_128 = float64_to_float128(farg2.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1435 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
aurel32 | da1e7ac | 2008-12-15 17:14:43 +0000 | [diff] [blame] | 1436 | if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && |
| 1437 | float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { |
| 1438 | /* Magnitude subtraction of infinities */ |
| 1439 | farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1440 | } else { |
| 1441 | ft1_128 = float64_to_float128(farg3.d, &env->fp_status); |
| 1442 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
| 1443 | farg1.d = float128_to_float64(ft0_128, &env->fp_status); |
| 1444 | } |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1445 | #else |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1446 | /* This is OK on x86 hosts */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1447 | farg1.d = (farg1.d * farg2.d) - farg3.d; |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1448 | #endif |
| 1449 | #else |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1450 | farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1451 | farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); |
j_mayer | e864cab | 2007-03-22 22:17:08 +0000 | [diff] [blame] | 1452 | #endif |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 1453 | if (likely(!float64_is_nan(farg1.d))) |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1454 | farg1.d = float64_chs(farg1.d); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1455 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1456 | return farg1.ll; |
bellard | 1ef59d0 | 2004-04-26 19:48:05 +0000 | [diff] [blame] | 1457 | } |
| 1458 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1459 | /* frsp - frsp. */ |
| 1460 | uint64_t helper_frsp (uint64_t arg) |
| 1461 | { |
| 1462 | CPU_DoubleU farg; |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1463 | float32 f32; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1464 | farg.ll = arg; |
| 1465 | |
aurel32 | 1cdb9c3 | 2008-04-07 21:24:25 +0000 | [diff] [blame] | 1466 | #if USE_PRECISE_EMULATION |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1467 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1468 | /* sNaN square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1469 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1470 | } else { |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1471 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1472 | farg.d = float32_to_float64(f32, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1473 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1474 | #else |
aurel32 | 6ad193e | 2008-12-15 01:00:17 +0000 | [diff] [blame] | 1475 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1476 | farg.d = float32_to_float64(f32, &env->fp_status); |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1477 | #endif |
| 1478 | return farg.ll; |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1479 | } |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1480 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1481 | /* fsqrt - fsqrt. */ |
| 1482 | uint64_t helper_fsqrt (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1483 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1484 | CPU_DoubleU farg; |
| 1485 | farg.ll = arg; |
| 1486 | |
| 1487 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1488 | /* sNaN square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1489 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1490 | } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1491 | /* Square root of a negative nonzero number */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1492 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1493 | } else { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1494 | farg.d = float64_sqrt(farg.d, &env->fp_status); |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1495 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1496 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1497 | } |
| 1498 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1499 | /* fre - fre. */ |
| 1500 | uint64_t helper_fre (uint64_t arg) |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1501 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1502 | CPU_DoubleU fone, farg; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1503 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1504 | farg.ll = arg; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1505 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1506 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1507 | /* sNaN reciprocal */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1508 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1509 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1510 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1511 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1512 | return farg.d; |
j_mayer | d7e4b87 | 2007-09-30 01:11:48 +0000 | [diff] [blame] | 1513 | } |
| 1514 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1515 | /* fres - fres. */ |
| 1516 | uint64_t helper_fres (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1517 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1518 | CPU_DoubleU fone, farg; |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1519 | float32 f32; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1520 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1521 | farg.ll = arg; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1522 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1523 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1524 | /* sNaN reciprocal */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1525 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1526 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1527 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
| 1528 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1529 | farg.d = float32_to_float64(f32, &env->fp_status); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1530 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1531 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1532 | } |
| 1533 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1534 | /* frsqrte - frsqrte. */ |
| 1535 | uint64_t helper_frsqrte (uint64_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1536 | { |
aurel32 | 05b9360 | 2008-12-15 17:13:48 +0000 | [diff] [blame] | 1537 | CPU_DoubleU fone, farg; |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1538 | float32 f32; |
aurel32 | 01feec0 | 2008-12-16 10:44:29 +0000 | [diff] [blame] | 1539 | fone.ll = 0x3FF0000000000000ULL; /* 1.0 */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1540 | farg.ll = arg; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1541 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1542 | if (unlikely(float64_is_signaling_nan(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1543 | /* sNaN reciprocal square root */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1544 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
aurel32 | f23c346 | 2008-12-15 17:14:27 +0000 | [diff] [blame] | 1545 | } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1546 | /* Reciprocal square root of a negative nonzero number */ |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1547 | farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1548 | } else { |
aurel32 | 6c01bf6 | 2008-12-18 22:42:23 +0000 | [diff] [blame] | 1549 | farg.d = float64_sqrt(farg.d, &env->fp_status); |
| 1550 | farg.d = float64_div(fone.d, farg.d, &env->fp_status); |
| 1551 | f32 = float64_to_float32(farg.d, &env->fp_status); |
| 1552 | farg.d = float32_to_float64(f32, &env->fp_status); |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1553 | } |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1554 | return farg.ll; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1555 | } |
| 1556 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1557 | /* fsel - fsel. */ |
| 1558 | uint64_t helper_fsel (uint64_t arg1, uint64_t arg2, uint64_t arg3) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1559 | { |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1560 | CPU_DoubleU farg1; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1561 | |
| 1562 | farg1.ll = arg1; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1563 | |
aurel32 | 572c895 | 2008-12-29 09:47:11 +0000 | [diff] [blame] | 1564 | if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && !float64_is_nan(farg1.d)) |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1565 | return arg2; |
bellard | 4ecc319 | 2005-03-13 17:01:22 +0000 | [diff] [blame] | 1566 | else |
aurel32 | 6ad7365 | 2008-12-14 11:12:10 +0000 | [diff] [blame] | 1567 | return arg3; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1568 | } |
| 1569 | |
aurel32 | 9a81937 | 2008-12-14 19:34:09 +0000 | [diff] [blame] | 1570 | void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1571 | { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1572 | CPU_DoubleU farg1, farg2; |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 1573 | uint32_t ret = 0; |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1574 | farg1.ll = arg1; |
| 1575 | farg2.ll = arg2; |
aurel32 | e157190 | 2008-10-21 11:31:14 +0000 | [diff] [blame] | 1576 | |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1577 | if (unlikely(float64_is_nan(farg1.d) || |
| 1578 | float64_is_nan(farg2.d))) { |
aurel32 | 9a81937 | 2008-12-14 19:34:09 +0000 | [diff] [blame] | 1579 | ret = 0x01UL; |
| 1580 | } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { |
| 1581 | ret = 0x08UL; |
| 1582 | } else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) { |
| 1583 | ret = 0x04UL; |
| 1584 | } else { |
| 1585 | ret = 0x02UL; |
| 1586 | } |
| 1587 | |
| 1588 | env->fpscr &= ~(0x0F << FPSCR_FPRF); |
| 1589 | env->fpscr |= ret << FPSCR_FPRF; |
| 1590 | env->crf[crfD] = ret; |
| 1591 | if (unlikely(ret == 0x01UL |
| 1592 | && (float64_is_signaling_nan(farg1.d) || |
| 1593 | float64_is_signaling_nan(farg2.d)))) { |
| 1594 | /* sNaN comparison */ |
| 1595 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
| 1596 | } |
| 1597 | } |
| 1598 | |
| 1599 | void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) |
| 1600 | { |
| 1601 | CPU_DoubleU farg1, farg2; |
| 1602 | uint32_t ret = 0; |
| 1603 | farg1.ll = arg1; |
| 1604 | farg2.ll = arg2; |
| 1605 | |
| 1606 | if (unlikely(float64_is_nan(farg1.d) || |
| 1607 | float64_is_nan(farg2.d))) { |
| 1608 | ret = 0x01UL; |
| 1609 | } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { |
| 1610 | ret = 0x08UL; |
| 1611 | } else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) { |
| 1612 | ret = 0x04UL; |
| 1613 | } else { |
| 1614 | ret = 0x02UL; |
| 1615 | } |
| 1616 | |
| 1617 | env->fpscr &= ~(0x0F << FPSCR_FPRF); |
| 1618 | env->fpscr |= ret << FPSCR_FPRF; |
| 1619 | env->crf[crfD] = ret; |
| 1620 | if (unlikely (ret == 0x01UL)) { |
aurel32 | af12906 | 2008-11-19 16:10:23 +0000 | [diff] [blame] | 1621 | if (float64_is_signaling_nan(farg1.d) || |
| 1622 | float64_is_signaling_nan(farg2.d)) { |
j_mayer | 7c58044 | 2007-10-27 17:54:30 +0000 | [diff] [blame] | 1623 | /* sNaN comparison */ |
| 1624 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | |
| 1625 | POWERPC_EXCP_FP_VXVC); |
| 1626 | } else { |
| 1627 | /* qNaN comparison */ |
| 1628 | fload_invalid_op_excp(POWERPC_EXCP_FP_VXVC); |
| 1629 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1630 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1631 | } |
| 1632 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1633 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | 6527f6e | 2008-12-06 13:03:35 +0000 | [diff] [blame] | 1634 | void helper_store_msr (target_ulong val) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1635 | { |
aurel32 | 6527f6e | 2008-12-06 13:03:35 +0000 | [diff] [blame] | 1636 | val = hreg_store_msr(env, val, 0); |
| 1637 | if (val != 0) { |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1638 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1639 | helper_raise_exception(val); |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1640 | } |
| 1641 | } |
| 1642 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1643 | static always_inline void do_rfi (target_ulong nip, target_ulong msr, |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1644 | target_ulong msrm, int keep_msrh) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1645 | { |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1646 | #if defined(TARGET_PPC64) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1647 | if (msr & (1ULL << MSR_SF)) { |
| 1648 | nip = (uint64_t)nip; |
| 1649 | msr &= (uint64_t)msrm; |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1650 | } else { |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1651 | nip = (uint32_t)nip; |
| 1652 | msr = (uint32_t)(msr & msrm); |
| 1653 | if (keep_msrh) |
| 1654 | msr |= env->msr & ~((uint64_t)0xFFFFFFFF); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1655 | } |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1656 | #else |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1657 | nip = (uint32_t)nip; |
| 1658 | msr &= (uint32_t)msrm; |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1659 | #endif |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1660 | /* XXX: beware: this is false if VLE is supported */ |
| 1661 | env->nip = nip & ~((target_ulong)0x00000003); |
j_mayer | a4f3071 | 2007-11-17 21:14:09 +0000 | [diff] [blame] | 1662 | hreg_store_msr(env, msr, 1); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1663 | #if defined (DEBUG_OP) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1664 | cpu_dump_rfi(env->nip, env->msr); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1665 | #endif |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1666 | /* No need to raise an exception here, |
| 1667 | * as rfi is always the last insn of a TB |
| 1668 | */ |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1669 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
| 1670 | } |
| 1671 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1672 | void helper_rfi (void) |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1673 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1674 | do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
| 1675 | ~((target_ulong)0xFFFF0000), 1); |
j_mayer | 0411a97 | 2007-10-25 21:35:50 +0000 | [diff] [blame] | 1676 | } |
| 1677 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1678 | #if defined(TARGET_PPC64) |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1679 | void helper_rfid (void) |
j_mayer | 426613d | 2007-03-23 09:45:27 +0000 | [diff] [blame] | 1680 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1681 | do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
| 1682 | ~((target_ulong)0xFFFF0000), 0); |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1683 | } |
j_mayer | 7863667 | 2007-11-16 14:11:28 +0000 | [diff] [blame] | 1684 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1685 | void helper_hrfid (void) |
j_mayer | be147d0 | 2007-09-30 13:03:23 +0000 | [diff] [blame] | 1686 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1687 | do_rfi(env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], |
| 1688 | ~((target_ulong)0xFFFF0000), 0); |
j_mayer | be147d0 | 2007-09-30 13:03:23 +0000 | [diff] [blame] | 1689 | } |
| 1690 | #endif |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1691 | #endif |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1692 | |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1693 | void helper_tw (target_ulong arg1, target_ulong arg2, uint32_t flags) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1694 | { |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1695 | if (!likely(!(((int32_t)arg1 < (int32_t)arg2 && (flags & 0x10)) || |
| 1696 | ((int32_t)arg1 > (int32_t)arg2 && (flags & 0x08)) || |
| 1697 | ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) || |
| 1698 | ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) || |
| 1699 | ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) { |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1700 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1701 | } |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1702 | } |
| 1703 | |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1704 | #if defined(TARGET_PPC64) |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1705 | void helper_td (target_ulong arg1, target_ulong arg2, uint32_t flags) |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1706 | { |
aurel32 | cab3bee | 2008-11-24 11:28:19 +0000 | [diff] [blame] | 1707 | if (!likely(!(((int64_t)arg1 < (int64_t)arg2 && (flags & 0x10)) || |
| 1708 | ((int64_t)arg1 > (int64_t)arg2 && (flags & 0x08)) || |
| 1709 | ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || |
| 1710 | ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || |
| 1711 | ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1712 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 1713 | } |
| 1714 | #endif |
| 1715 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 1716 | /*****************************************************************************/ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1717 | /* PowerPC 601 specific instructions (POWER bridge) */ |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1718 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1719 | target_ulong helper_clcs (uint32_t arg) |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1720 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1721 | switch (arg) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1722 | case 0x0CUL: |
| 1723 | /* Instruction cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1724 | return env->icache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1725 | break; |
| 1726 | case 0x0DUL: |
| 1727 | /* Data cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1728 | return env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1729 | break; |
| 1730 | case 0x0EUL: |
| 1731 | /* Minimum cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1732 | return (env->icache_line_size < env->dcache_line_size) ? |
| 1733 | env->icache_line_size : env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1734 | break; |
| 1735 | case 0x0FUL: |
| 1736 | /* Maximum cache line size */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1737 | return (env->icache_line_size > env->dcache_line_size) ? |
| 1738 | env->icache_line_size : env->dcache_line_size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1739 | break; |
| 1740 | default: |
| 1741 | /* Undefined */ |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1742 | return 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1743 | break; |
| 1744 | } |
| 1745 | } |
| 1746 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1747 | target_ulong helper_div (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1748 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1749 | uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1750 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1751 | if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1752 | (int32_t)arg2 == 0) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1753 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1754 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1755 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1756 | env->spr[SPR_MQ] = tmp % arg2; |
| 1757 | return tmp / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1758 | } |
| 1759 | } |
| 1760 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1761 | target_ulong helper_divo (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1762 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1763 | uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1764 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1765 | if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1766 | (int32_t)arg2 == 0) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1767 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1768 | env->spr[SPR_MQ] = 0; |
| 1769 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1770 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1771 | env->spr[SPR_MQ] = tmp % arg2; |
| 1772 | tmp /= (int32_t)arg2; |
| 1773 | if ((int32_t)tmp != tmp) { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1774 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1775 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1776 | env->xer &= ~(1 << XER_OV); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1777 | } |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1778 | return tmp; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1779 | } |
| 1780 | } |
| 1781 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1782 | target_ulong helper_divs (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1783 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1784 | if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1785 | (int32_t)arg2 == 0) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1786 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1787 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1788 | } else { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1789 | env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2; |
| 1790 | return (int32_t)arg1 / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1791 | } |
| 1792 | } |
| 1793 | |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1794 | target_ulong helper_divso (target_ulong arg1, target_ulong arg2) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1795 | { |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1796 | if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || |
| 1797 | (int32_t)arg2 == 0) { |
| 1798 | env->xer |= (1 << XER_OV) | (1 << XER_SO); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1799 | env->spr[SPR_MQ] = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1800 | return INT32_MIN; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1801 | } else { |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 1802 | env->xer &= ~(1 << XER_OV); |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1803 | env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2; |
| 1804 | return (int32_t)arg1 / (int32_t)arg2; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1805 | } |
| 1806 | } |
| 1807 | |
| 1808 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1809 | target_ulong helper_rac (target_ulong addr) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1810 | { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1811 | mmu_ctx_t ctx; |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1812 | int nb_BATs; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1813 | target_ulong ret = 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1814 | |
| 1815 | /* We don't have to generate many instances of this instruction, |
| 1816 | * as rac is supervisor only. |
| 1817 | */ |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1818 | /* XXX: FIX THIS: Pretend we have no BAT */ |
| 1819 | nb_BATs = env->nb_BATs; |
| 1820 | env->nb_BATs = 0; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1821 | if (get_physical_address(env, &ctx, addr, 0, ACCESS_INT) == 0) |
| 1822 | ret = ctx.raddr; |
j_mayer | faadf50 | 2007-11-03 13:37:12 +0000 | [diff] [blame] | 1823 | env->nb_BATs = nb_BATs; |
aurel32 | 22e0e17 | 2008-12-06 12:19:14 +0000 | [diff] [blame] | 1824 | return ret; |
bellard | 9a64fbe | 2004-01-04 22:58:38 +0000 | [diff] [blame] | 1825 | } |
| 1826 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1827 | void helper_rfsvc (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1828 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1829 | do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1830 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1831 | #endif |
| 1832 | |
| 1833 | /*****************************************************************************/ |
| 1834 | /* 602 specific instructions */ |
| 1835 | /* mfrom is the most crazy instruction ever seen, imho ! */ |
| 1836 | /* Real implementation uses a ROM table. Do the same */ |
aurel32 | 5e9ae18 | 2008-12-13 12:30:21 +0000 | [diff] [blame] | 1837 | /* Extremly decomposed: |
| 1838 | * -arg / 256 |
| 1839 | * return 256 * log10(10 + 1.0) + 0.5 |
| 1840 | */ |
aurel32 | db9a16a | 2008-12-08 18:11:50 +0000 | [diff] [blame] | 1841 | #if !defined (CONFIG_USER_ONLY) |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1842 | target_ulong helper_602_mfrom (target_ulong arg) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1843 | { |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1844 | if (likely(arg < 602)) { |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1845 | #include "mfrom_table.c" |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1846 | return mfrom_ROM_table[arg]; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1847 | } else { |
aurel32 | cf02a65 | 2008-11-30 16:23:35 +0000 | [diff] [blame] | 1848 | return 0; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1849 | } |
| 1850 | } |
aurel32 | db9a16a | 2008-12-08 18:11:50 +0000 | [diff] [blame] | 1851 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1852 | |
| 1853 | /*****************************************************************************/ |
| 1854 | /* Embedded PowerPC specific helpers */ |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1855 | |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1856 | /* XXX: to be improved to check access rights when in user-mode */ |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1857 | target_ulong helper_load_dcr (target_ulong dcrn) |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1858 | { |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1859 | target_ulong val = 0; |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1860 | |
| 1861 | if (unlikely(env->dcr_env == NULL)) { |
| 1862 | if (loglevel != 0) { |
| 1863 | fprintf(logfile, "No DCR environment\n"); |
| 1864 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1865 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1866 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1867 | } else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) { |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1868 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1869 | fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1870 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1871 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1872 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1873 | } |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1874 | return val; |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1875 | } |
| 1876 | |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1877 | void helper_store_dcr (target_ulong dcrn, target_ulong val) |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1878 | { |
| 1879 | if (unlikely(env->dcr_env == NULL)) { |
| 1880 | if (loglevel != 0) { |
| 1881 | fprintf(logfile, "No DCR environment\n"); |
| 1882 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1883 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1884 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
aurel32 | 06dca6a | 2008-12-06 16:37:18 +0000 | [diff] [blame] | 1885 | } else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) { |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1886 | if (loglevel != 0) { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 1887 | fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1888 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 1889 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
| 1890 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
j_mayer | a750fc0 | 2007-09-26 23:54:22 +0000 | [diff] [blame] | 1891 | } |
| 1892 | } |
| 1893 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1894 | #if !defined(CONFIG_USER_ONLY) |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1895 | void helper_40x_rfci (void) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1896 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1897 | do_rfi(env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], |
| 1898 | ~((target_ulong)0xFFFF0000), 0); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1899 | } |
| 1900 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1901 | void helper_rfci (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1902 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1903 | do_rfi(env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, |
| 1904 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1905 | } |
| 1906 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1907 | void helper_rfdi (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1908 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1909 | do_rfi(env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, |
| 1910 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1911 | } |
| 1912 | |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1913 | void helper_rfmci (void) |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1914 | { |
aurel32 | d72a19f | 2008-11-30 16:24:55 +0000 | [diff] [blame] | 1915 | do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, |
| 1916 | ~((target_ulong)0x3FFF0000), 0); |
j_mayer | a42bd6c | 2007-03-30 10:22:46 +0000 | [diff] [blame] | 1917 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1918 | #endif |
| 1919 | |
| 1920 | /* 440 specific */ |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1921 | target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1922 | { |
| 1923 | target_ulong mask; |
| 1924 | int i; |
| 1925 | |
| 1926 | i = 1; |
| 1927 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1928 | if ((high & mask) == 0) { |
| 1929 | if (update_Rc) { |
| 1930 | env->crf[0] = 0x4; |
| 1931 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1932 | goto done; |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1933 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1934 | i++; |
| 1935 | } |
| 1936 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1937 | if ((low & mask) == 0) { |
| 1938 | if (update_Rc) { |
| 1939 | env->crf[0] = 0x8; |
| 1940 | } |
| 1941 | goto done; |
| 1942 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1943 | i++; |
| 1944 | } |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1945 | if (update_Rc) { |
| 1946 | env->crf[0] = 0x2; |
| 1947 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1948 | done: |
aurel32 | ef0d51a | 2008-11-30 17:26:29 +0000 | [diff] [blame] | 1949 | env->xer = (env->xer & ~0x7F) | i; |
| 1950 | if (update_Rc) { |
| 1951 | env->crf[0] |= xer_so; |
| 1952 | } |
| 1953 | return i; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 1954 | } |
| 1955 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 1956 | /*****************************************************************************/ |
aurel32 | d6a46fe | 2009-01-03 13:31:19 +0000 | [diff] [blame] | 1957 | /* Altivec extension helpers */ |
| 1958 | #if defined(WORDS_BIGENDIAN) |
| 1959 | #define HI_IDX 0 |
| 1960 | #define LO_IDX 1 |
| 1961 | #else |
| 1962 | #define HI_IDX 1 |
| 1963 | #define LO_IDX 0 |
| 1964 | #endif |
| 1965 | |
| 1966 | #if defined(WORDS_BIGENDIAN) |
| 1967 | #define VECTOR_FOR_INORDER_I(index, element) \ |
| 1968 | for (index = 0; index < ARRAY_SIZE(r->element); index++) |
| 1969 | #else |
| 1970 | #define VECTOR_FOR_INORDER_I(index, element) \ |
| 1971 | for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) |
| 1972 | #endif |
| 1973 | |
aurel32 | 7872c51 | 2009-01-03 13:31:40 +0000 | [diff] [blame] | 1974 | #define VARITH_DO(name, op, element) \ |
| 1975 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 1976 | { \ |
| 1977 | int i; \ |
| 1978 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 1979 | r->element[i] = a->element[i] op b->element[i]; \ |
| 1980 | } \ |
| 1981 | } |
| 1982 | #define VARITH(suffix, element) \ |
| 1983 | VARITH_DO(add##suffix, +, element) \ |
| 1984 | VARITH_DO(sub##suffix, -, element) |
| 1985 | VARITH(ubm, u8) |
| 1986 | VARITH(uhm, u16) |
| 1987 | VARITH(uwm, u32) |
| 1988 | #undef VARITH_DO |
| 1989 | #undef VARITH |
| 1990 | |
aurel32 | fab3cbe | 2009-01-03 13:31:49 +0000 | [diff] [blame] | 1991 | #define VAVG_DO(name, element, etype) \ |
| 1992 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 1993 | { \ |
| 1994 | int i; \ |
| 1995 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 1996 | etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \ |
| 1997 | r->element[i] = x >> 1; \ |
| 1998 | } \ |
| 1999 | } |
| 2000 | |
| 2001 | #define VAVG(type, signed_element, signed_type, unsigned_element, unsigned_type) \ |
| 2002 | VAVG_DO(avgs##type, signed_element, signed_type) \ |
| 2003 | VAVG_DO(avgu##type, unsigned_element, unsigned_type) |
| 2004 | VAVG(b, s8, int16_t, u8, uint16_t) |
| 2005 | VAVG(h, s16, int32_t, u16, uint32_t) |
| 2006 | VAVG(w, s32, int64_t, u32, uint64_t) |
| 2007 | #undef VAVG_DO |
| 2008 | #undef VAVG |
| 2009 | |
aurel32 | e403933 | 2009-01-03 13:31:58 +0000 | [diff] [blame] | 2010 | #define VMINMAX_DO(name, compare, element) \ |
| 2011 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2012 | { \ |
| 2013 | int i; \ |
| 2014 | for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ |
| 2015 | if (a->element[i] compare b->element[i]) { \ |
| 2016 | r->element[i] = b->element[i]; \ |
| 2017 | } else { \ |
| 2018 | r->element[i] = a->element[i]; \ |
| 2019 | } \ |
| 2020 | } \ |
| 2021 | } |
| 2022 | #define VMINMAX(suffix, element) \ |
| 2023 | VMINMAX_DO(min##suffix, >, element) \ |
| 2024 | VMINMAX_DO(max##suffix, <, element) |
| 2025 | VMINMAX(sb, s8) |
| 2026 | VMINMAX(sh, s16) |
| 2027 | VMINMAX(sw, s32) |
| 2028 | VMINMAX(ub, u8) |
| 2029 | VMINMAX(uh, u16) |
| 2030 | VMINMAX(uw, u32) |
| 2031 | #undef VMINMAX_DO |
| 2032 | #undef VMINMAX |
| 2033 | |
aurel32 | 3b43004 | 2009-01-04 22:08:38 +0000 | [diff] [blame^] | 2034 | #define VMRG_DO(name, element, highp) \ |
| 2035 | void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |
| 2036 | { \ |
| 2037 | ppc_avr_t result; \ |
| 2038 | int i; \ |
| 2039 | size_t n_elems = ARRAY_SIZE(r->element); \ |
| 2040 | for (i = 0; i < n_elems/2; i++) { \ |
| 2041 | if (highp) { \ |
| 2042 | result.element[i*2+HI_IDX] = a->element[i]; \ |
| 2043 | result.element[i*2+LO_IDX] = b->element[i]; \ |
| 2044 | } else { \ |
| 2045 | result.element[n_elems - i*2 - (1+HI_IDX)] = b->element[n_elems - i - 1]; \ |
| 2046 | result.element[n_elems - i*2 - (1+LO_IDX)] = a->element[n_elems - i - 1]; \ |
| 2047 | } \ |
| 2048 | } \ |
| 2049 | *r = result; \ |
| 2050 | } |
| 2051 | #if defined(WORDS_BIGENDIAN) |
| 2052 | #define MRGHI 0 |
| 2053 | #define MRGL0 1 |
| 2054 | #else |
| 2055 | #define MRGHI 1 |
| 2056 | #define MRGLO 0 |
| 2057 | #endif |
| 2058 | #define VMRG(suffix, element) \ |
| 2059 | VMRG_DO(mrgl##suffix, element, MRGHI) \ |
| 2060 | VMRG_DO(mrgh##suffix, element, MRGLO) |
| 2061 | VMRG(b, u8) |
| 2062 | VMRG(h, u16) |
| 2063 | VMRG(w, u32) |
| 2064 | #undef VMRG_DO |
| 2065 | #undef VMRG |
| 2066 | #undef MRGHI |
| 2067 | #undef MRGLO |
| 2068 | |
aurel32 | d6a46fe | 2009-01-03 13:31:19 +0000 | [diff] [blame] | 2069 | #undef VECTOR_FOR_INORDER_I |
| 2070 | #undef HI_IDX |
| 2071 | #undef LO_IDX |
| 2072 | |
| 2073 | /*****************************************************************************/ |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2074 | /* SPE extension helpers */ |
| 2075 | /* Use a table to make this quicker */ |
| 2076 | static uint8_t hbrev[16] = { |
| 2077 | 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
| 2078 | 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
| 2079 | }; |
| 2080 | |
j_mayer | b068d6a | 2007-10-07 17:13:44 +0000 | [diff] [blame] | 2081 | static always_inline uint8_t byte_reverse (uint8_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2082 | { |
| 2083 | return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
| 2084 | } |
| 2085 | |
j_mayer | b068d6a | 2007-10-07 17:13:44 +0000 | [diff] [blame] | 2086 | static always_inline uint32_t word_reverse (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2087 | { |
| 2088 | return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
| 2089 | (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
| 2090 | } |
| 2091 | |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2092 | #define MASKBITS 16 // Random value - to be fixed (implementation dependant) |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2093 | target_ulong helper_brinc (target_ulong arg1, target_ulong arg2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2094 | { |
| 2095 | uint32_t a, b, d, mask; |
| 2096 | |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2097 | mask = UINT32_MAX >> (32 - MASKBITS); |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2098 | a = arg1 & mask; |
| 2099 | b = arg2 & mask; |
j_mayer | 3cd7d1d | 2007-11-12 01:56:18 +0000 | [diff] [blame] | 2100 | d = word_reverse(1 + word_reverse(a | ~b)); |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2101 | return (arg1 & ~mask) | (d & b); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2102 | } |
| 2103 | |
aurel32 | 57951c2 | 2008-11-10 11:10:23 +0000 | [diff] [blame] | 2104 | uint32_t helper_cntlsw32 (uint32_t val) |
| 2105 | { |
| 2106 | if (val & 0x80000000) |
| 2107 | return clz32(~val); |
| 2108 | else |
| 2109 | return clz32(val); |
| 2110 | } |
| 2111 | |
| 2112 | uint32_t helper_cntlzw32 (uint32_t val) |
| 2113 | { |
| 2114 | return clz32(val); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2115 | } |
| 2116 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2117 | /* Single-precision floating-point conversions */ |
| 2118 | static always_inline uint32_t efscfsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2119 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2120 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2121 | |
| 2122 | u.f = int32_to_float32(val, &env->spe_status); |
| 2123 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2124 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2125 | } |
| 2126 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2127 | static always_inline uint32_t efscfui (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2128 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2129 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2130 | |
| 2131 | u.f = uint32_to_float32(val, &env->spe_status); |
| 2132 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2133 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2134 | } |
| 2135 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2136 | static always_inline int32_t efsctsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2137 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2138 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2139 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2140 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2141 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2142 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2143 | return 0; |
| 2144 | |
| 2145 | return float32_to_int32(u.f, &env->spe_status); |
| 2146 | } |
| 2147 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2148 | static always_inline uint32_t efsctui (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2149 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2150 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2151 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2152 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2153 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2154 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2155 | return 0; |
| 2156 | |
| 2157 | return float32_to_uint32(u.f, &env->spe_status); |
| 2158 | } |
| 2159 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2160 | static always_inline uint32_t efsctsiz (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2161 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2162 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2163 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2164 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2165 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2166 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2167 | return 0; |
| 2168 | |
| 2169 | return float32_to_int32_round_to_zero(u.f, &env->spe_status); |
| 2170 | } |
| 2171 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2172 | static always_inline uint32_t efsctuiz (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2173 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2174 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2175 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2176 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2177 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2178 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2179 | return 0; |
| 2180 | |
| 2181 | return float32_to_uint32_round_to_zero(u.f, &env->spe_status); |
| 2182 | } |
| 2183 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2184 | static always_inline uint32_t efscfsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2185 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2186 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2187 | float32 tmp; |
| 2188 | |
| 2189 | u.f = int32_to_float32(val, &env->spe_status); |
| 2190 | tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
| 2191 | u.f = float32_div(u.f, tmp, &env->spe_status); |
| 2192 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2193 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2194 | } |
| 2195 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2196 | static always_inline uint32_t efscfuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2197 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2198 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2199 | float32 tmp; |
| 2200 | |
| 2201 | u.f = uint32_to_float32(val, &env->spe_status); |
| 2202 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2203 | u.f = float32_div(u.f, tmp, &env->spe_status); |
| 2204 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2205 | return u.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2206 | } |
| 2207 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2208 | static always_inline uint32_t efsctsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2209 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2210 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2211 | float32 tmp; |
| 2212 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2213 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2214 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2215 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2216 | return 0; |
| 2217 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2218 | u.f = float32_mul(u.f, tmp, &env->spe_status); |
| 2219 | |
| 2220 | return float32_to_int32(u.f, &env->spe_status); |
| 2221 | } |
| 2222 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2223 | static always_inline uint32_t efsctuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2224 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2225 | CPU_FloatU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2226 | float32 tmp; |
| 2227 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2228 | u.l = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2229 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2230 | if (unlikely(float32_is_nan(u.f))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2231 | return 0; |
| 2232 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
| 2233 | u.f = float32_mul(u.f, tmp, &env->spe_status); |
| 2234 | |
| 2235 | return float32_to_uint32(u.f, &env->spe_status); |
| 2236 | } |
| 2237 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2238 | #define HELPER_SPE_SINGLE_CONV(name) \ |
| 2239 | uint32_t helper_e##name (uint32_t val) \ |
| 2240 | { \ |
| 2241 | return e##name(val); \ |
| 2242 | } |
| 2243 | /* efscfsi */ |
| 2244 | HELPER_SPE_SINGLE_CONV(fscfsi); |
| 2245 | /* efscfui */ |
| 2246 | HELPER_SPE_SINGLE_CONV(fscfui); |
| 2247 | /* efscfuf */ |
| 2248 | HELPER_SPE_SINGLE_CONV(fscfuf); |
| 2249 | /* efscfsf */ |
| 2250 | HELPER_SPE_SINGLE_CONV(fscfsf); |
| 2251 | /* efsctsi */ |
| 2252 | HELPER_SPE_SINGLE_CONV(fsctsi); |
| 2253 | /* efsctui */ |
| 2254 | HELPER_SPE_SINGLE_CONV(fsctui); |
| 2255 | /* efsctsiz */ |
| 2256 | HELPER_SPE_SINGLE_CONV(fsctsiz); |
| 2257 | /* efsctuiz */ |
| 2258 | HELPER_SPE_SINGLE_CONV(fsctuiz); |
| 2259 | /* efsctsf */ |
| 2260 | HELPER_SPE_SINGLE_CONV(fsctsf); |
| 2261 | /* efsctuf */ |
| 2262 | HELPER_SPE_SINGLE_CONV(fsctuf); |
| 2263 | |
| 2264 | #define HELPER_SPE_VECTOR_CONV(name) \ |
| 2265 | uint64_t helper_ev##name (uint64_t val) \ |
| 2266 | { \ |
| 2267 | return ((uint64_t)e##name(val >> 32) << 32) | \ |
| 2268 | (uint64_t)e##name(val); \ |
| 2269 | } |
| 2270 | /* evfscfsi */ |
| 2271 | HELPER_SPE_VECTOR_CONV(fscfsi); |
| 2272 | /* evfscfui */ |
| 2273 | HELPER_SPE_VECTOR_CONV(fscfui); |
| 2274 | /* evfscfuf */ |
| 2275 | HELPER_SPE_VECTOR_CONV(fscfuf); |
| 2276 | /* evfscfsf */ |
| 2277 | HELPER_SPE_VECTOR_CONV(fscfsf); |
| 2278 | /* evfsctsi */ |
| 2279 | HELPER_SPE_VECTOR_CONV(fsctsi); |
| 2280 | /* evfsctui */ |
| 2281 | HELPER_SPE_VECTOR_CONV(fsctui); |
| 2282 | /* evfsctsiz */ |
| 2283 | HELPER_SPE_VECTOR_CONV(fsctsiz); |
| 2284 | /* evfsctuiz */ |
| 2285 | HELPER_SPE_VECTOR_CONV(fsctuiz); |
| 2286 | /* evfsctsf */ |
| 2287 | HELPER_SPE_VECTOR_CONV(fsctsf); |
| 2288 | /* evfsctuf */ |
| 2289 | HELPER_SPE_VECTOR_CONV(fsctuf); |
| 2290 | |
| 2291 | /* Single-precision floating-point arithmetic */ |
| 2292 | static always_inline uint32_t efsadd (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2293 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2294 | CPU_FloatU u1, u2; |
| 2295 | u1.l = op1; |
| 2296 | u2.l = op2; |
| 2297 | u1.f = float32_add(u1.f, u2.f, &env->spe_status); |
| 2298 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2299 | } |
| 2300 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2301 | static always_inline uint32_t efssub (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2302 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2303 | CPU_FloatU u1, u2; |
| 2304 | u1.l = op1; |
| 2305 | u2.l = op2; |
| 2306 | u1.f = float32_sub(u1.f, u2.f, &env->spe_status); |
| 2307 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2308 | } |
| 2309 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2310 | static always_inline uint32_t efsmul (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2311 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2312 | CPU_FloatU u1, u2; |
| 2313 | u1.l = op1; |
| 2314 | u2.l = op2; |
| 2315 | u1.f = float32_mul(u1.f, u2.f, &env->spe_status); |
| 2316 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2317 | } |
| 2318 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2319 | static always_inline uint32_t efsdiv (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2320 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2321 | CPU_FloatU u1, u2; |
| 2322 | u1.l = op1; |
| 2323 | u2.l = op2; |
| 2324 | u1.f = float32_div(u1.f, u2.f, &env->spe_status); |
| 2325 | return u1.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2326 | } |
| 2327 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2328 | #define HELPER_SPE_SINGLE_ARITH(name) \ |
| 2329 | uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ |
| 2330 | { \ |
| 2331 | return e##name(op1, op2); \ |
| 2332 | } |
| 2333 | /* efsadd */ |
| 2334 | HELPER_SPE_SINGLE_ARITH(fsadd); |
| 2335 | /* efssub */ |
| 2336 | HELPER_SPE_SINGLE_ARITH(fssub); |
| 2337 | /* efsmul */ |
| 2338 | HELPER_SPE_SINGLE_ARITH(fsmul); |
| 2339 | /* efsdiv */ |
| 2340 | HELPER_SPE_SINGLE_ARITH(fsdiv); |
| 2341 | |
| 2342 | #define HELPER_SPE_VECTOR_ARITH(name) \ |
| 2343 | uint64_t helper_ev##name (uint64_t op1, uint64_t op2) \ |
| 2344 | { \ |
| 2345 | return ((uint64_t)e##name(op1 >> 32, op2 >> 32) << 32) | \ |
| 2346 | (uint64_t)e##name(op1, op2); \ |
| 2347 | } |
| 2348 | /* evfsadd */ |
| 2349 | HELPER_SPE_VECTOR_ARITH(fsadd); |
| 2350 | /* evfssub */ |
| 2351 | HELPER_SPE_VECTOR_ARITH(fssub); |
| 2352 | /* evfsmul */ |
| 2353 | HELPER_SPE_VECTOR_ARITH(fsmul); |
| 2354 | /* evfsdiv */ |
| 2355 | HELPER_SPE_VECTOR_ARITH(fsdiv); |
| 2356 | |
| 2357 | /* Single-precision floating-point comparisons */ |
| 2358 | static always_inline uint32_t efststlt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2359 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2360 | CPU_FloatU u1, u2; |
| 2361 | u1.l = op1; |
| 2362 | u2.l = op2; |
| 2363 | return float32_lt(u1.f, u2.f, &env->spe_status) ? 4 : 0; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2364 | } |
| 2365 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2366 | static always_inline uint32_t efststgt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2367 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2368 | CPU_FloatU u1, u2; |
| 2369 | u1.l = op1; |
| 2370 | u2.l = op2; |
| 2371 | return float32_le(u1.f, u2.f, &env->spe_status) ? 0 : 4; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2372 | } |
| 2373 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2374 | static always_inline uint32_t efststeq (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2375 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2376 | CPU_FloatU u1, u2; |
| 2377 | u1.l = op1; |
| 2378 | u2.l = op2; |
| 2379 | return float32_eq(u1.f, u2.f, &env->spe_status) ? 4 : 0; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2380 | } |
| 2381 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2382 | static always_inline uint32_t efscmplt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2383 | { |
| 2384 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2385 | return efststlt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2386 | } |
| 2387 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2388 | static always_inline uint32_t efscmpgt (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2389 | { |
| 2390 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2391 | return efststgt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2392 | } |
| 2393 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2394 | static always_inline uint32_t efscmpeq (uint32_t op1, uint32_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2395 | { |
| 2396 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2397 | return efststeq(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2398 | } |
| 2399 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2400 | #define HELPER_SINGLE_SPE_CMP(name) \ |
| 2401 | uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ |
| 2402 | { \ |
| 2403 | return e##name(op1, op2) << 2; \ |
| 2404 | } |
| 2405 | /* efststlt */ |
| 2406 | HELPER_SINGLE_SPE_CMP(fststlt); |
| 2407 | /* efststgt */ |
| 2408 | HELPER_SINGLE_SPE_CMP(fststgt); |
| 2409 | /* efststeq */ |
| 2410 | HELPER_SINGLE_SPE_CMP(fststeq); |
| 2411 | /* efscmplt */ |
| 2412 | HELPER_SINGLE_SPE_CMP(fscmplt); |
| 2413 | /* efscmpgt */ |
| 2414 | HELPER_SINGLE_SPE_CMP(fscmpgt); |
| 2415 | /* efscmpeq */ |
| 2416 | HELPER_SINGLE_SPE_CMP(fscmpeq); |
| 2417 | |
| 2418 | static always_inline uint32_t evcmp_merge (int t0, int t1) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2419 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2420 | return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2421 | } |
| 2422 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2423 | #define HELPER_VECTOR_SPE_CMP(name) \ |
| 2424 | uint32_t helper_ev##name (uint64_t op1, uint64_t op2) \ |
| 2425 | { \ |
| 2426 | return evcmp_merge(e##name(op1 >> 32, op2 >> 32), e##name(op1, op2)); \ |
| 2427 | } |
| 2428 | /* evfststlt */ |
| 2429 | HELPER_VECTOR_SPE_CMP(fststlt); |
| 2430 | /* evfststgt */ |
| 2431 | HELPER_VECTOR_SPE_CMP(fststgt); |
| 2432 | /* evfststeq */ |
| 2433 | HELPER_VECTOR_SPE_CMP(fststeq); |
| 2434 | /* evfscmplt */ |
| 2435 | HELPER_VECTOR_SPE_CMP(fscmplt); |
| 2436 | /* evfscmpgt */ |
| 2437 | HELPER_VECTOR_SPE_CMP(fscmpgt); |
| 2438 | /* evfscmpeq */ |
| 2439 | HELPER_VECTOR_SPE_CMP(fscmpeq); |
| 2440 | |
| 2441 | /* Double-precision floating-point conversion */ |
| 2442 | uint64_t helper_efdcfsi (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2443 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2444 | CPU_DoubleU u; |
| 2445 | |
| 2446 | u.d = int32_to_float64(val, &env->spe_status); |
| 2447 | |
| 2448 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2449 | } |
| 2450 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2451 | uint64_t helper_efdcfsid (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2452 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2453 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2454 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2455 | u.d = int64_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2456 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2457 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2458 | } |
| 2459 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2460 | uint64_t helper_efdcfui (uint32_t val) |
| 2461 | { |
| 2462 | CPU_DoubleU u; |
| 2463 | |
| 2464 | u.d = uint32_to_float64(val, &env->spe_status); |
| 2465 | |
| 2466 | return u.ll; |
| 2467 | } |
| 2468 | |
| 2469 | uint64_t helper_efdcfuid (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2470 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2471 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2472 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2473 | u.d = uint64_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2474 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2475 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2476 | } |
| 2477 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2478 | uint32_t helper_efdctsi (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2479 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2480 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2481 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2482 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2483 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2484 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2485 | return 0; |
| 2486 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2487 | return float64_to_int32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2488 | } |
| 2489 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2490 | uint32_t helper_efdctui (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2491 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2492 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2493 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2494 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2495 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2496 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2497 | return 0; |
| 2498 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2499 | return float64_to_uint32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2500 | } |
| 2501 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2502 | uint32_t helper_efdctsiz (uint64_t val) |
| 2503 | { |
| 2504 | CPU_DoubleU u; |
| 2505 | |
| 2506 | u.ll = val; |
| 2507 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2508 | if (unlikely(float64_is_nan(u.d))) |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2509 | return 0; |
| 2510 | |
| 2511 | return float64_to_int32_round_to_zero(u.d, &env->spe_status); |
| 2512 | } |
| 2513 | |
| 2514 | uint64_t helper_efdctsidz (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2515 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2516 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2517 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2518 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2519 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2520 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2521 | return 0; |
| 2522 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2523 | return float64_to_int64_round_to_zero(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2524 | } |
| 2525 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2526 | uint32_t helper_efdctuiz (uint64_t val) |
| 2527 | { |
| 2528 | CPU_DoubleU u; |
| 2529 | |
| 2530 | u.ll = val; |
| 2531 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2532 | if (unlikely(float64_is_nan(u.d))) |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2533 | return 0; |
| 2534 | |
| 2535 | return float64_to_uint32_round_to_zero(u.d, &env->spe_status); |
| 2536 | } |
| 2537 | |
| 2538 | uint64_t helper_efdctuidz (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2539 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2540 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2541 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2542 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2543 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2544 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2545 | return 0; |
| 2546 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2547 | return float64_to_uint64_round_to_zero(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2548 | } |
| 2549 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2550 | uint64_t helper_efdcfsf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2551 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2552 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2553 | float64 tmp; |
| 2554 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2555 | u.d = int32_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2556 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2557 | u.d = float64_div(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2558 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2559 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2560 | } |
| 2561 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2562 | uint64_t helper_efdcfuf (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2563 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2564 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2565 | float64 tmp; |
| 2566 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2567 | u.d = uint32_to_float64(val, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2568 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2569 | u.d = float64_div(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2570 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2571 | return u.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2572 | } |
| 2573 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2574 | uint32_t helper_efdctsf (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2575 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2576 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2577 | float64 tmp; |
| 2578 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2579 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2580 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2581 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2582 | return 0; |
| 2583 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2584 | u.d = float64_mul(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2585 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2586 | return float64_to_int32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2587 | } |
| 2588 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2589 | uint32_t helper_efdctuf (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2590 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2591 | CPU_DoubleU u; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2592 | float64 tmp; |
| 2593 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2594 | u.ll = val; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2595 | /* NaN are not treated the same way IEEE 754 does */ |
aurel32 | a44d2ce | 2008-12-13 11:46:27 +0000 | [diff] [blame] | 2596 | if (unlikely(float64_is_nan(u.d))) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2597 | return 0; |
| 2598 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2599 | u.d = float64_mul(u.d, tmp, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2600 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2601 | return float64_to_uint32(u.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2602 | } |
| 2603 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2604 | uint32_t helper_efscfd (uint64_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2605 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2606 | CPU_DoubleU u1; |
| 2607 | CPU_FloatU u2; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2608 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2609 | u1.ll = val; |
| 2610 | u2.f = float64_to_float32(u1.d, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2611 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2612 | return u2.l; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2613 | } |
| 2614 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2615 | uint64_t helper_efdcfs (uint32_t val) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2616 | { |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2617 | CPU_DoubleU u2; |
| 2618 | CPU_FloatU u1; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2619 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2620 | u1.l = val; |
| 2621 | u2.d = float32_to_float64(u1.f, &env->spe_status); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2622 | |
aurel32 | 0ca9d38 | 2008-03-13 19:19:16 +0000 | [diff] [blame] | 2623 | return u2.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2624 | } |
| 2625 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2626 | /* Double precision fixed-point arithmetic */ |
| 2627 | uint64_t helper_efdadd (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2628 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2629 | CPU_DoubleU u1, u2; |
| 2630 | u1.ll = op1; |
| 2631 | u2.ll = op2; |
| 2632 | u1.d = float64_add(u1.d, u2.d, &env->spe_status); |
| 2633 | return u1.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2634 | } |
| 2635 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2636 | uint64_t helper_efdsub (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2637 | { |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2638 | CPU_DoubleU u1, u2; |
| 2639 | u1.ll = op1; |
| 2640 | u2.ll = op2; |
| 2641 | u1.d = float64_sub(u1.d, u2.d, &env->spe_status); |
| 2642 | return u1.ll; |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2643 | } |
| 2644 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2645 | uint64_t helper_efdmul (uint64_t op1, uint64_t op2) |
| 2646 | { |
| 2647 | CPU_DoubleU u1, u2; |
| 2648 | u1.ll = op1; |
| 2649 | u2.ll = op2; |
| 2650 | u1.d = float64_mul(u1.d, u2.d, &env->spe_status); |
| 2651 | return u1.ll; |
| 2652 | } |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2653 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2654 | uint64_t helper_efddiv (uint64_t op1, uint64_t op2) |
| 2655 | { |
| 2656 | CPU_DoubleU u1, u2; |
| 2657 | u1.ll = op1; |
| 2658 | u2.ll = op2; |
| 2659 | u1.d = float64_div(u1.d, u2.d, &env->spe_status); |
| 2660 | return u1.ll; |
| 2661 | } |
| 2662 | |
| 2663 | /* Double precision floating point helpers */ |
| 2664 | uint32_t helper_efdtstlt (uint64_t op1, uint64_t op2) |
| 2665 | { |
| 2666 | CPU_DoubleU u1, u2; |
| 2667 | u1.ll = op1; |
| 2668 | u2.ll = op2; |
| 2669 | return float64_lt(u1.d, u2.d, &env->spe_status) ? 4 : 0; |
| 2670 | } |
| 2671 | |
| 2672 | uint32_t helper_efdtstgt (uint64_t op1, uint64_t op2) |
| 2673 | { |
| 2674 | CPU_DoubleU u1, u2; |
| 2675 | u1.ll = op1; |
| 2676 | u2.ll = op2; |
| 2677 | return float64_le(u1.d, u2.d, &env->spe_status) ? 0 : 4; |
| 2678 | } |
| 2679 | |
| 2680 | uint32_t helper_efdtsteq (uint64_t op1, uint64_t op2) |
| 2681 | { |
| 2682 | CPU_DoubleU u1, u2; |
| 2683 | u1.ll = op1; |
| 2684 | u2.ll = op2; |
| 2685 | return float64_eq(u1.d, u2.d, &env->spe_status) ? 4 : 0; |
| 2686 | } |
| 2687 | |
| 2688 | uint32_t helper_efdcmplt (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2689 | { |
| 2690 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2691 | return helper_efdtstlt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2692 | } |
| 2693 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2694 | uint32_t helper_efdcmpgt (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2695 | { |
| 2696 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2697 | return helper_efdtstgt(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2698 | } |
| 2699 | |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2700 | uint32_t helper_efdcmpeq (uint64_t op1, uint64_t op2) |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2701 | { |
| 2702 | /* XXX: TODO: test special values (NaN, infinites, ...) */ |
aurel32 | 1c97856 | 2008-11-23 10:54:04 +0000 | [diff] [blame] | 2703 | return helper_efdtsteq(op1, op2); |
j_mayer | 0487d6a | 2007-03-20 22:11:31 +0000 | [diff] [blame] | 2704 | } |
| 2705 | |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2706 | /*****************************************************************************/ |
| 2707 | /* Softmmu support */ |
| 2708 | #if !defined (CONFIG_USER_ONLY) |
| 2709 | |
| 2710 | #define MMUSUFFIX _mmu |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2711 | |
| 2712 | #define SHIFT 0 |
| 2713 | #include "softmmu_template.h" |
| 2714 | |
| 2715 | #define SHIFT 1 |
| 2716 | #include "softmmu_template.h" |
| 2717 | |
| 2718 | #define SHIFT 2 |
| 2719 | #include "softmmu_template.h" |
| 2720 | |
| 2721 | #define SHIFT 3 |
| 2722 | #include "softmmu_template.h" |
| 2723 | |
| 2724 | /* try to fill the TLB and return an exception if error. If retaddr is |
| 2725 | NULL, it means that the function was called in C code (i.e. not |
| 2726 | from generated code or from helper.c) */ |
| 2727 | /* XXX: fix it to restore all registers */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 2728 | void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2729 | { |
| 2730 | TranslationBlock *tb; |
| 2731 | CPUState *saved_env; |
bellard | 44f8625 | 2007-11-11 12:35:55 +0000 | [diff] [blame] | 2732 | unsigned long pc; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2733 | int ret; |
| 2734 | |
| 2735 | /* XXX: hack to restore env in all cases, even if not called from |
| 2736 | generated code */ |
| 2737 | saved_env = env; |
| 2738 | env = cpu_single_env; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 2739 | ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2740 | if (unlikely(ret != 0)) { |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2741 | if (likely(retaddr)) { |
| 2742 | /* now we have a real cpu fault */ |
bellard | 44f8625 | 2007-11-11 12:35:55 +0000 | [diff] [blame] | 2743 | pc = (unsigned long)retaddr; |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2744 | tb = tb_find_pc(pc); |
| 2745 | if (likely(tb)) { |
| 2746 | /* the PC is inside the translated code. It means that we have |
| 2747 | a virtual CPU fault */ |
| 2748 | cpu_restore_state(tb, env, pc, NULL); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2749 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2750 | } |
aurel32 | e06fcd7 | 2008-12-11 22:42:14 +0000 | [diff] [blame] | 2751 | helper_raise_exception_err(env->exception_index, env->error_code); |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2752 | } |
| 2753 | env = saved_env; |
| 2754 | } |
bellard | fdabc36 | 2005-07-04 22:17:05 +0000 | [diff] [blame] | 2755 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2756 | /* Segment registers load and store */ |
| 2757 | target_ulong helper_load_sr (target_ulong sr_num) |
| 2758 | { |
| 2759 | return env->sr[sr_num]; |
| 2760 | } |
| 2761 | |
| 2762 | void helper_store_sr (target_ulong sr_num, target_ulong val) |
| 2763 | { |
aurel32 | 45d827d | 2008-12-07 13:40:29 +0000 | [diff] [blame] | 2764 | ppc_store_sr(env, sr_num, val); |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2765 | } |
| 2766 | |
| 2767 | /* SLB management */ |
| 2768 | #if defined(TARGET_PPC64) |
| 2769 | target_ulong helper_load_slb (target_ulong slb_nr) |
| 2770 | { |
| 2771 | return ppc_load_slb(env, slb_nr); |
| 2772 | } |
| 2773 | |
| 2774 | void helper_store_slb (target_ulong slb_nr, target_ulong rs) |
| 2775 | { |
| 2776 | ppc_store_slb(env, slb_nr, rs); |
| 2777 | } |
| 2778 | |
| 2779 | void helper_slbia (void) |
| 2780 | { |
| 2781 | ppc_slb_invalidate_all(env); |
| 2782 | } |
| 2783 | |
| 2784 | void helper_slbie (target_ulong addr) |
| 2785 | { |
| 2786 | ppc_slb_invalidate_one(env, addr); |
| 2787 | } |
| 2788 | |
| 2789 | #endif /* defined(TARGET_PPC64) */ |
| 2790 | |
| 2791 | /* TLB management */ |
| 2792 | void helper_tlbia (void) |
| 2793 | { |
| 2794 | ppc_tlb_invalidate_all(env); |
| 2795 | } |
| 2796 | |
| 2797 | void helper_tlbie (target_ulong addr) |
| 2798 | { |
| 2799 | ppc_tlb_invalidate_one(env, addr); |
| 2800 | } |
| 2801 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2802 | /* Software driven TLBs management */ |
| 2803 | /* PowerPC 602/603 software TLB load instructions helpers */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2804 | static void do_6xx_tlb (target_ulong new_EPN, int is_code) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2805 | { |
| 2806 | target_ulong RPN, CMP, EPN; |
| 2807 | int way; |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 2808 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2809 | RPN = env->spr[SPR_RPA]; |
| 2810 | if (is_code) { |
| 2811 | CMP = env->spr[SPR_ICMP]; |
| 2812 | EPN = env->spr[SPR_IMISS]; |
| 2813 | } else { |
| 2814 | CMP = env->spr[SPR_DCMP]; |
| 2815 | EPN = env->spr[SPR_DMISS]; |
| 2816 | } |
| 2817 | way = (env->spr[SPR_SRR1] >> 17) & 1; |
| 2818 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2819 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 2820 | fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX |
j_mayer | 6b542af | 2007-11-24 02:03:55 +0000 | [diff] [blame] | 2821 | " PTE1 " ADDRX " way %d\n", |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 2822 | __func__, new_EPN, EPN, CMP, RPN, way); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2823 | } |
| 2824 | #endif |
| 2825 | /* Store this TLB */ |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2826 | ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK), |
j_mayer | d9bce9d | 2007-03-17 14:02:15 +0000 | [diff] [blame] | 2827 | way, is_code, CMP, RPN); |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2828 | } |
| 2829 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2830 | void helper_6xx_tlbd (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2831 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2832 | do_6xx_tlb(EPN, 0); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2833 | } |
| 2834 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2835 | void helper_6xx_tlbi (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2836 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2837 | do_6xx_tlb(EPN, 1); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2838 | } |
| 2839 | |
| 2840 | /* PowerPC 74xx software TLB load instructions helpers */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2841 | static void do_74xx_tlb (target_ulong new_EPN, int is_code) |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 2842 | { |
| 2843 | target_ulong RPN, CMP, EPN; |
| 2844 | int way; |
| 2845 | |
| 2846 | RPN = env->spr[SPR_PTELO]; |
| 2847 | CMP = env->spr[SPR_PTEHI]; |
| 2848 | EPN = env->spr[SPR_TLBMISS] & ~0x3; |
| 2849 | way = env->spr[SPR_TLBMISS] & 0x3; |
| 2850 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2851 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 2852 | fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX |
j_mayer | 6b542af | 2007-11-24 02:03:55 +0000 | [diff] [blame] | 2853 | " PTE1 " ADDRX " way %d\n", |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 2854 | __func__, new_EPN, EPN, CMP, RPN, way); |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 2855 | } |
| 2856 | #endif |
| 2857 | /* Store this TLB */ |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2858 | ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK), |
j_mayer | 7dbe11a | 2007-10-01 05:16:57 +0000 | [diff] [blame] | 2859 | way, is_code, CMP, RPN); |
| 2860 | } |
| 2861 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2862 | void helper_74xx_tlbd (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2863 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2864 | do_74xx_tlb(EPN, 0); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2865 | } |
| 2866 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2867 | void helper_74xx_tlbi (target_ulong EPN) |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2868 | { |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2869 | do_74xx_tlb(EPN, 1); |
aurel32 | 0f3955e | 2008-11-30 16:22:56 +0000 | [diff] [blame] | 2870 | } |
| 2871 | |
j_mayer | a11b815 | 2007-10-28 00:55:05 +0000 | [diff] [blame] | 2872 | static always_inline target_ulong booke_tlb_to_page_size (int size) |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2873 | { |
| 2874 | return 1024 << (2 * size); |
| 2875 | } |
| 2876 | |
j_mayer | a11b815 | 2007-10-28 00:55:05 +0000 | [diff] [blame] | 2877 | static always_inline int booke_page_size_to_tlb (target_ulong page_size) |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2878 | { |
| 2879 | int size; |
| 2880 | |
| 2881 | switch (page_size) { |
| 2882 | case 0x00000400UL: |
| 2883 | size = 0x0; |
| 2884 | break; |
| 2885 | case 0x00001000UL: |
| 2886 | size = 0x1; |
| 2887 | break; |
| 2888 | case 0x00004000UL: |
| 2889 | size = 0x2; |
| 2890 | break; |
| 2891 | case 0x00010000UL: |
| 2892 | size = 0x3; |
| 2893 | break; |
| 2894 | case 0x00040000UL: |
| 2895 | size = 0x4; |
| 2896 | break; |
| 2897 | case 0x00100000UL: |
| 2898 | size = 0x5; |
| 2899 | break; |
| 2900 | case 0x00400000UL: |
| 2901 | size = 0x6; |
| 2902 | break; |
| 2903 | case 0x01000000UL: |
| 2904 | size = 0x7; |
| 2905 | break; |
| 2906 | case 0x04000000UL: |
| 2907 | size = 0x8; |
| 2908 | break; |
| 2909 | case 0x10000000UL: |
| 2910 | size = 0x9; |
| 2911 | break; |
| 2912 | case 0x40000000UL: |
| 2913 | size = 0xA; |
| 2914 | break; |
| 2915 | #if defined (TARGET_PPC64) |
| 2916 | case 0x000100000000ULL: |
| 2917 | size = 0xB; |
| 2918 | break; |
| 2919 | case 0x000400000000ULL: |
| 2920 | size = 0xC; |
| 2921 | break; |
| 2922 | case 0x001000000000ULL: |
| 2923 | size = 0xD; |
| 2924 | break; |
| 2925 | case 0x004000000000ULL: |
| 2926 | size = 0xE; |
| 2927 | break; |
| 2928 | case 0x010000000000ULL: |
| 2929 | size = 0xF; |
| 2930 | break; |
| 2931 | #endif |
| 2932 | default: |
| 2933 | size = -1; |
| 2934 | break; |
| 2935 | } |
| 2936 | |
| 2937 | return size; |
| 2938 | } |
| 2939 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2940 | /* Helpers for 4xx TLB management */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2941 | target_ulong helper_4xx_tlbre_lo (target_ulong entry) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2942 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2943 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2944 | target_ulong ret; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2945 | int size; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2946 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2947 | entry &= 0x3F; |
| 2948 | tlb = &env->tlb[entry].tlbe; |
| 2949 | ret = tlb->EPN; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2950 | if (tlb->prot & PAGE_VALID) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2951 | ret |= 0x400; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2952 | size = booke_page_size_to_tlb(tlb->size); |
| 2953 | if (size < 0 || size > 0x7) |
| 2954 | size = 1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2955 | ret |= size << 7; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2956 | env->spr[SPR_40x_PID] = tlb->PID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2957 | return ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2958 | } |
| 2959 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2960 | target_ulong helper_4xx_tlbre_hi (target_ulong entry) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2961 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2962 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2963 | target_ulong ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2964 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2965 | entry &= 0x3F; |
| 2966 | tlb = &env->tlb[entry].tlbe; |
| 2967 | ret = tlb->RPN; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2968 | if (tlb->prot & PAGE_EXEC) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2969 | ret |= 0x200; |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2970 | if (tlb->prot & PAGE_WRITE) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2971 | ret |= 0x100; |
| 2972 | return ret; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2973 | } |
| 2974 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2975 | void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2976 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 2977 | ppcemb_tlb_t *tlb; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2978 | target_ulong page, end; |
| 2979 | |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 2980 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 2981 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 2982 | fprintf(logfile, "%s entry %d val " ADDRX "\n", __func__, (int)entry, val); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 2983 | } |
| 2984 | #endif |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2985 | entry &= 0x3F; |
| 2986 | tlb = &env->tlb[entry].tlbe; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2987 | /* Invalidate previous TLB (if it's valid) */ |
| 2988 | if (tlb->prot & PAGE_VALID) { |
| 2989 | end = tlb->EPN + tlb->size; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 2990 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 2991 | if (loglevel != 0) { |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 2992 | fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2993 | " end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 2994 | } |
| 2995 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 2996 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
| 2997 | tlb_flush_page(env, page); |
| 2998 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 2999 | tlb->size = booke_tlb_to_page_size((val >> 7) & 0x7); |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3000 | /* We cannot handle TLB size < TARGET_PAGE_SIZE. |
| 3001 | * If this ever occurs, one should use the ppcemb target instead |
| 3002 | * of the ppc or ppc64 one |
| 3003 | */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3004 | if ((val & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
j_mayer | 71c8b8f | 2007-09-19 05:46:03 +0000 | [diff] [blame] | 3005 | cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
| 3006 | "are not supported (%d)\n", |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3007 | tlb->size, TARGET_PAGE_SIZE, (int)((val >> 7) & 0x7)); |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3008 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3009 | tlb->EPN = val & ~(tlb->size - 1); |
| 3010 | if (val & 0x40) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3011 | tlb->prot |= PAGE_VALID; |
| 3012 | else |
| 3013 | tlb->prot &= ~PAGE_VALID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3014 | if (val & 0x20) { |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3015 | /* XXX: TO BE FIXED */ |
| 3016 | cpu_abort(env, "Little-endian TLB entries are not supported by now\n"); |
| 3017 | } |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3018 | tlb->PID = env->spr[SPR_40x_PID]; /* PID */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3019 | tlb->attr = val & 0xFF; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3020 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | c294fc5 | 2007-04-24 06:44:14 +0000 | [diff] [blame] | 3021 | if (loglevel != 0) { |
| 3022 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3023 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3024 | (int)entry, tlb->RPN, tlb->EPN, tlb->size, |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3025 | tlb->prot & PAGE_READ ? 'r' : '-', |
| 3026 | tlb->prot & PAGE_WRITE ? 'w' : '-', |
| 3027 | tlb->prot & PAGE_EXEC ? 'x' : '-', |
| 3028 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
| 3029 | } |
| 3030 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3031 | /* Invalidate new TLB (if valid) */ |
| 3032 | if (tlb->prot & PAGE_VALID) { |
| 3033 | end = tlb->EPN + tlb->size; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3034 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3035 | if (loglevel != 0) { |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3036 | fprintf(logfile, "%s: invalidate TLB %d start " ADDRX |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3037 | " end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3038 | } |
| 3039 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3040 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
| 3041 | tlb_flush_page(env, page); |
| 3042 | } |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3043 | } |
| 3044 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3045 | void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3046 | { |
j_mayer | a8dea12 | 2007-03-31 11:33:48 +0000 | [diff] [blame] | 3047 | ppcemb_tlb_t *tlb; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3048 | |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3049 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3050 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3051 | fprintf(logfile, "%s entry %i val " ADDRX "\n", __func__, (int)entry, val); |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3052 | } |
| 3053 | #endif |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3054 | entry &= 0x3F; |
| 3055 | tlb = &env->tlb[entry].tlbe; |
| 3056 | tlb->RPN = val & 0xFFFFFC00; |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3057 | tlb->prot = PAGE_READ; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3058 | if (val & 0x200) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3059 | tlb->prot |= PAGE_EXEC; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3060 | if (val & 0x100) |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3061 | tlb->prot |= PAGE_WRITE; |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3062 | #if defined (DEBUG_SOFTWARE_TLB) |
j_mayer | 6b80055 | 2007-04-24 07:36:03 +0000 | [diff] [blame] | 3063 | if (loglevel != 0) { |
| 3064 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3065 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3066 | (int)entry, tlb->RPN, tlb->EPN, tlb->size, |
j_mayer | c55e9ae | 2007-04-16 09:21:46 +0000 | [diff] [blame] | 3067 | tlb->prot & PAGE_READ ? 'r' : '-', |
| 3068 | tlb->prot & PAGE_WRITE ? 'w' : '-', |
| 3069 | tlb->prot & PAGE_EXEC ? 'x' : '-', |
| 3070 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
| 3071 | } |
| 3072 | #endif |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3073 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3074 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3075 | target_ulong helper_4xx_tlbsx (target_ulong address) |
| 3076 | { |
| 3077 | return ppcemb_tlb_search(env, address, env->spr[SPR_40x_PID]); |
| 3078 | } |
| 3079 | |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3080 | /* PowerPC 440 TLB management */ |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3081 | void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3082 | { |
| 3083 | ppcemb_tlb_t *tlb; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3084 | target_ulong EPN, RPN, size; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3085 | int do_flush_tlbs; |
| 3086 | |
| 3087 | #if defined (DEBUG_SOFTWARE_TLB) |
| 3088 | if (loglevel != 0) { |
aurel32 | 0e69805 | 2008-12-08 18:11:42 +0000 | [diff] [blame] | 3089 | fprintf(logfile, "%s word %d entry %d value " ADDRX "\n", |
| 3090 | __func__, word, (int)entry, value); |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3091 | } |
| 3092 | #endif |
| 3093 | do_flush_tlbs = 0; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3094 | entry &= 0x3F; |
| 3095 | tlb = &env->tlb[entry].tlbe; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3096 | switch (word) { |
| 3097 | default: |
| 3098 | /* Just here to please gcc */ |
| 3099 | case 0: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3100 | EPN = value & 0xFFFFFC00; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3101 | if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3102 | do_flush_tlbs = 1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3103 | tlb->EPN = EPN; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3104 | size = booke_tlb_to_page_size((value >> 4) & 0xF); |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3105 | if ((tlb->prot & PAGE_VALID) && tlb->size < size) |
| 3106 | do_flush_tlbs = 1; |
| 3107 | tlb->size = size; |
| 3108 | tlb->attr &= ~0x1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3109 | tlb->attr |= (value >> 8) & 1; |
| 3110 | if (value & 0x200) { |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3111 | tlb->prot |= PAGE_VALID; |
| 3112 | } else { |
| 3113 | if (tlb->prot & PAGE_VALID) { |
| 3114 | tlb->prot &= ~PAGE_VALID; |
| 3115 | do_flush_tlbs = 1; |
| 3116 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3117 | } |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3118 | tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF; |
| 3119 | if (do_flush_tlbs) |
| 3120 | tlb_flush(env, 1); |
| 3121 | break; |
| 3122 | case 1: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3123 | RPN = value & 0xFFFFFC0F; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3124 | if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) |
| 3125 | tlb_flush(env, 1); |
| 3126 | tlb->RPN = RPN; |
| 3127 | break; |
| 3128 | case 2: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3129 | tlb->attr = (tlb->attr & 0x1) | (value & 0x0000FF00); |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3130 | tlb->prot = tlb->prot & PAGE_VALID; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3131 | if (value & 0x1) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3132 | tlb->prot |= PAGE_READ << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3133 | if (value & 0x2) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3134 | tlb->prot |= PAGE_WRITE << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3135 | if (value & 0x4) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3136 | tlb->prot |= PAGE_EXEC << 4; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3137 | if (value & 0x8) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3138 | tlb->prot |= PAGE_READ; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3139 | if (value & 0x10) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3140 | tlb->prot |= PAGE_WRITE; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3141 | if (value & 0x20) |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3142 | tlb->prot |= PAGE_EXEC; |
| 3143 | break; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3144 | } |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3145 | } |
| 3146 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3147 | target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3148 | { |
| 3149 | ppcemb_tlb_t *tlb; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3150 | target_ulong ret; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3151 | int size; |
| 3152 | |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3153 | entry &= 0x3F; |
| 3154 | tlb = &env->tlb[entry].tlbe; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3155 | switch (word) { |
| 3156 | default: |
| 3157 | /* Just here to please gcc */ |
| 3158 | case 0: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3159 | ret = tlb->EPN; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3160 | size = booke_page_size_to_tlb(tlb->size); |
| 3161 | if (size < 0 || size > 0xF) |
| 3162 | size = 1; |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3163 | ret |= size << 4; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3164 | if (tlb->attr & 0x1) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3165 | ret |= 0x100; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3166 | if (tlb->prot & PAGE_VALID) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3167 | ret |= 0x200; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3168 | env->spr[SPR_440_MMUCR] &= ~0x000000FF; |
| 3169 | env->spr[SPR_440_MMUCR] |= tlb->PID; |
| 3170 | break; |
| 3171 | case 1: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3172 | ret = tlb->RPN; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3173 | break; |
| 3174 | case 2: |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3175 | ret = tlb->attr & ~0x1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3176 | if (tlb->prot & (PAGE_READ << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3177 | ret |= 0x1; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3178 | if (tlb->prot & (PAGE_WRITE << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3179 | ret |= 0x2; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3180 | if (tlb->prot & (PAGE_EXEC << 4)) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3181 | ret |= 0x4; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3182 | if (tlb->prot & PAGE_READ) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3183 | ret |= 0x8; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3184 | if (tlb->prot & PAGE_WRITE) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3185 | ret |= 0x10; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3186 | if (tlb->prot & PAGE_EXEC) |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3187 | ret |= 0x20; |
j_mayer | a4bb6c3 | 2007-09-21 05:28:33 +0000 | [diff] [blame] | 3188 | break; |
| 3189 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3190 | return ret; |
j_mayer | 5eb7995 | 2007-09-19 05:44:04 +0000 | [diff] [blame] | 3191 | } |
aurel32 | 74d3779 | 2008-12-06 21:46:17 +0000 | [diff] [blame] | 3192 | |
| 3193 | target_ulong helper_440_tlbsx (target_ulong address) |
| 3194 | { |
| 3195 | return ppcemb_tlb_search(env, address, env->spr[SPR_440_MMUCR] & 0xFF); |
| 3196 | } |
| 3197 | |
j_mayer | 76a6625 | 2007-03-07 08:32:30 +0000 | [diff] [blame] | 3198 | #endif /* !CONFIG_USER_ONLY */ |