blob: 5dbe11c3c83b9fcb0a0c593d99d20ca009dfcad1 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Richard Henderson170ba882017-11-22 09:07:11 +010035#define CASE_OP_32_64_VEC(x) \
36 glue(glue(case INDEX_op_, x), _i32): \
37 glue(glue(case INDEX_op_, x), _i64): \
38 glue(glue(case INDEX_op_, x), _vec)
39
Kirill Batuzov22613af2011-07-07 16:37:13 +040040struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020041 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070042 TCGTemp *prev_copy;
43 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040044 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080045 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046};
47
Richard Henderson63490392017-06-20 13:43:15 -070048static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049{
Richard Henderson63490392017-06-20 13:43:15 -070050 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020051}
52
Richard Henderson63490392017-06-20 13:43:15 -070053static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054{
Richard Henderson63490392017-06-20 13:43:15 -070055 return ts_info(arg_temp(arg));
56}
57
58static inline bool ts_is_const(TCGTemp *ts)
59{
60 return ts_info(ts)->is_const;
61}
62
63static inline bool arg_is_const(TCGArg arg)
64{
65 return ts_is_const(arg_temp(arg));
66}
67
68static inline bool ts_is_copy(TCGTemp *ts)
69{
70 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020071}
72
Aurelien Jarnob41059d2015-07-27 12:41:44 +020073/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070074static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040075{
Richard Henderson63490392017-06-20 13:43:15 -070076 struct tcg_temp_info *ti = ts_info(ts);
77 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
78 struct tcg_temp_info *ni = ts_info(ti->next_copy);
79
80 ni->prev_copy = ti->prev_copy;
81 pi->next_copy = ti->next_copy;
82 ti->next_copy = ts;
83 ti->prev_copy = ts;
84 ti->is_const = false;
85 ti->mask = -1;
86}
87
88static void reset_temp(TCGArg arg)
89{
90 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040091}
92
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020093/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040094static void init_ts_info(struct tcg_temp_info *infos,
95 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020096{
Richard Henderson63490392017-06-20 13:43:15 -070097 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040098 if (!test_bit(idx, temps_used->l)) {
99 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -0700100
101 ts->state_ptr = ti;
102 ti->next_copy = ts;
103 ti->prev_copy = ts;
104 ti->is_const = false;
105 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400106 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200107 }
108}
109
Emilio G. Cota34184b02017-07-19 14:32:24 -0400110static void init_arg_info(struct tcg_temp_info *infos,
111 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700112{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400113 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700114}
115
Richard Henderson63490392017-06-20 13:43:15 -0700116static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200117{
Richard Henderson63490392017-06-20 13:43:15 -0700118 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200119
120 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600121 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700122 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200123 }
124
125 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700126 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
127 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200128 return i;
129 }
130 }
131
132 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600133 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700134 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
135 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136 return i;
137 }
138 }
139 }
140
141 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700142 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200143}
144
Richard Henderson63490392017-06-20 13:43:15 -0700145static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146{
Richard Henderson63490392017-06-20 13:43:15 -0700147 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148
Richard Henderson63490392017-06-20 13:43:15 -0700149 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200150 return true;
151 }
152
Richard Henderson63490392017-06-20 13:43:15 -0700153 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200154 return false;
155 }
156
Richard Henderson63490392017-06-20 13:43:15 -0700157 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
158 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159 return true;
160 }
161 }
162
163 return false;
164}
165
Richard Henderson63490392017-06-20 13:43:15 -0700166static bool args_are_copies(TCGArg arg1, TCGArg arg2)
167{
168 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
169}
170
Richard Hendersonacd93702016-12-08 12:28:42 -0800171static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200172{
Richard Henderson170ba882017-11-22 09:07:11 +0100173 const TCGOpDef *def;
174 TCGOpcode new_op;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200175 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700176 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200177
Richard Henderson170ba882017-11-22 09:07:11 +0100178 def = &tcg_op_defs[op->opc];
179 if (def->flags & TCG_OPF_VECTOR) {
180 new_op = INDEX_op_dupi_vec;
181 } else if (def->flags & TCG_OPF_64BIT) {
182 new_op = INDEX_op_movi_i64;
183 } else {
184 new_op = INDEX_op_movi_i32;
185 }
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200186 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100187 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
188 op->args[0] = dst;
189 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200190
191 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700192 di->is_const = true;
193 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200194 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200195 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200196 /* High bits of the destination are now garbage. */
197 mask |= ~0xffffffffull;
198 }
Richard Henderson63490392017-06-20 13:43:15 -0700199 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200200}
201
Richard Hendersonacd93702016-12-08 12:28:42 -0800202static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400203{
Richard Henderson63490392017-06-20 13:43:15 -0700204 TCGTemp *dst_ts = arg_temp(dst);
205 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100206 const TCGOpDef *def;
Richard Henderson63490392017-06-20 13:43:15 -0700207 struct tcg_temp_info *di;
208 struct tcg_temp_info *si;
209 tcg_target_ulong mask;
210 TCGOpcode new_op;
211
212 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200213 tcg_op_remove(s, op);
214 return;
215 }
216
Richard Henderson63490392017-06-20 13:43:15 -0700217 reset_ts(dst_ts);
218 di = ts_info(dst_ts);
219 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100220 def = &tcg_op_defs[op->opc];
221 if (def->flags & TCG_OPF_VECTOR) {
222 new_op = INDEX_op_mov_vec;
223 } else if (def->flags & TCG_OPF_64BIT) {
224 new_op = INDEX_op_mov_i64;
225 } else {
226 new_op = INDEX_op_mov_i32;
227 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700228 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100229 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700230 op->args[0] = dst;
231 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700232
Richard Henderson63490392017-06-20 13:43:15 -0700233 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700234 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
235 /* High bits of the destination are now garbage. */
236 mask |= ~0xffffffffull;
237 }
Richard Henderson63490392017-06-20 13:43:15 -0700238 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700239
Richard Henderson63490392017-06-20 13:43:15 -0700240 if (src_ts->type == dst_ts->type) {
241 struct tcg_temp_info *ni = ts_info(si->next_copy);
242
243 di->next_copy = si->next_copy;
244 di->prev_copy = src_ts;
245 ni->prev_copy = dst_ts;
246 si->next_copy = dst_ts;
247 di->is_const = si->is_const;
248 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800249 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400250}
251
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000252static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400253{
Richard Henderson03271522013-08-14 14:35:56 -0700254 uint64_t l64, h64;
255
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400256 switch (op) {
257 CASE_OP_32_64(add):
258 return x + y;
259
260 CASE_OP_32_64(sub):
261 return x - y;
262
263 CASE_OP_32_64(mul):
264 return x * y;
265
Kirill Batuzov9a810902011-07-07 16:37:15 +0400266 CASE_OP_32_64(and):
267 return x & y;
268
269 CASE_OP_32_64(or):
270 return x | y;
271
272 CASE_OP_32_64(xor):
273 return x ^ y;
274
Kirill Batuzov55c09752011-07-07 16:37:16 +0400275 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700276 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700279 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280
281 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700305 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400306 return ~x;
307
Richard Hendersoncb25c802011-08-17 14:11:47 -0700308 CASE_OP_32_64(neg):
309 return -x;
310
311 CASE_OP_32_64(andc):
312 return x & ~y;
313
314 CASE_OP_32_64(orc):
315 return x | ~y;
316
317 CASE_OP_32_64(eqv):
318 return ~(x ^ y);
319
320 CASE_OP_32_64(nand):
321 return ~(x & y);
322
323 CASE_OP_32_64(nor):
324 return ~(x | y);
325
Richard Henderson0e28d002016-11-16 09:23:28 +0100326 case INDEX_op_clz_i32:
327 return (uint32_t)x ? clz32(x) : y;
328
329 case INDEX_op_clz_i64:
330 return x ? clz64(x) : y;
331
332 case INDEX_op_ctz_i32:
333 return (uint32_t)x ? ctz32(x) : y;
334
335 case INDEX_op_ctz_i64:
336 return x ? ctz64(x) : y;
337
Richard Hendersona768e4e2016-11-21 11:13:39 +0100338 case INDEX_op_ctpop_i32:
339 return ctpop32(x);
340
341 case INDEX_op_ctpop_i64:
342 return ctpop64(x);
343
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700344 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400345 return (int8_t)x;
346
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700347 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400348 return (int16_t)x;
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (uint8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (uint16_t)x;
355
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200356 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 case INDEX_op_ext32s_i64:
358 return (int32_t)x;
359
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200360 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700361 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400362 case INDEX_op_ext32u_i64:
363 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400364
Richard Henderson609ad702015-07-24 07:16:00 -0700365 case INDEX_op_extrh_i64_i32:
366 return (uint64_t)x >> 32;
367
Richard Henderson03271522013-08-14 14:35:56 -0700368 case INDEX_op_muluh_i32:
369 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
370 case INDEX_op_mulsh_i32:
371 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
372
373 case INDEX_op_muluh_i64:
374 mulu64(&l64, &h64, x, y);
375 return h64;
376 case INDEX_op_mulsh_i64:
377 muls64(&l64, &h64, x, y);
378 return h64;
379
Richard Henderson01547f72013-08-14 15:22:46 -0700380 case INDEX_op_div_i32:
381 /* Avoid crashing on divide by zero, otherwise undefined. */
382 return (int32_t)x / ((int32_t)y ? : 1);
383 case INDEX_op_divu_i32:
384 return (uint32_t)x / ((uint32_t)y ? : 1);
385 case INDEX_op_div_i64:
386 return (int64_t)x / ((int64_t)y ? : 1);
387 case INDEX_op_divu_i64:
388 return (uint64_t)x / ((uint64_t)y ? : 1);
389
390 case INDEX_op_rem_i32:
391 return (int32_t)x % ((int32_t)y ? : 1);
392 case INDEX_op_remu_i32:
393 return (uint32_t)x % ((uint32_t)y ? : 1);
394 case INDEX_op_rem_i64:
395 return (int64_t)x % ((int64_t)y ? : 1);
396 case INDEX_op_remu_i64:
397 return (uint64_t)x % ((uint64_t)y ? : 1);
398
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400399 default:
400 fprintf(stderr,
401 "Unrecognized operation %d in do_constant_folding.\n", op);
402 tcg_abort();
403 }
404}
405
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000406static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400407{
Richard Henderson170ba882017-11-22 09:07:11 +0100408 const TCGOpDef *def = &tcg_op_defs[op];
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400409 TCGArg res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100410 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200411 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400412 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400413 return res;
414}
415
Richard Henderson9519da72012-10-02 11:32:26 -0700416static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
417{
418 switch (c) {
419 case TCG_COND_EQ:
420 return x == y;
421 case TCG_COND_NE:
422 return x != y;
423 case TCG_COND_LT:
424 return (int32_t)x < (int32_t)y;
425 case TCG_COND_GE:
426 return (int32_t)x >= (int32_t)y;
427 case TCG_COND_LE:
428 return (int32_t)x <= (int32_t)y;
429 case TCG_COND_GT:
430 return (int32_t)x > (int32_t)y;
431 case TCG_COND_LTU:
432 return x < y;
433 case TCG_COND_GEU:
434 return x >= y;
435 case TCG_COND_LEU:
436 return x <= y;
437 case TCG_COND_GTU:
438 return x > y;
439 default:
440 tcg_abort();
441 }
442}
443
444static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
445{
446 switch (c) {
447 case TCG_COND_EQ:
448 return x == y;
449 case TCG_COND_NE:
450 return x != y;
451 case TCG_COND_LT:
452 return (int64_t)x < (int64_t)y;
453 case TCG_COND_GE:
454 return (int64_t)x >= (int64_t)y;
455 case TCG_COND_LE:
456 return (int64_t)x <= (int64_t)y;
457 case TCG_COND_GT:
458 return (int64_t)x > (int64_t)y;
459 case TCG_COND_LTU:
460 return x < y;
461 case TCG_COND_GEU:
462 return x >= y;
463 case TCG_COND_LEU:
464 return x <= y;
465 case TCG_COND_GTU:
466 return x > y;
467 default:
468 tcg_abort();
469 }
470}
471
472static bool do_constant_folding_cond_eq(TCGCond c)
473{
474 switch (c) {
475 case TCG_COND_GT:
476 case TCG_COND_LTU:
477 case TCG_COND_LT:
478 case TCG_COND_GTU:
479 case TCG_COND_NE:
480 return 0;
481 case TCG_COND_GE:
482 case TCG_COND_GEU:
483 case TCG_COND_LE:
484 case TCG_COND_LEU:
485 case TCG_COND_EQ:
486 return 1;
487 default:
488 tcg_abort();
489 }
490}
491
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200492/* Return 2 if the condition can't be simplified, and the result
493 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200494static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
495 TCGArg y, TCGCond c)
496{
Richard Henderson63490392017-06-20 13:43:15 -0700497 tcg_target_ulong xv = arg_info(x)->val;
498 tcg_target_ulong yv = arg_info(y)->val;
499 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100500 const TCGOpDef *def = &tcg_op_defs[op];
501 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
502 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700503 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100504 } else {
505 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200506 }
Richard Henderson63490392017-06-20 13:43:15 -0700507 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700508 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700509 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200510 switch (c) {
511 case TCG_COND_LTU:
512 return 0;
513 case TCG_COND_GEU:
514 return 1;
515 default:
516 return 2;
517 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200518 }
Alex Bennée550276a2016-09-30 22:30:55 +0100519 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200520}
521
Richard Henderson6c4382f2012-10-02 11:32:27 -0700522/* Return 2 if the condition can't be simplified, and the result
523 of the condition (0 or 1) if it can */
524static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
525{
526 TCGArg al = p1[0], ah = p1[1];
527 TCGArg bl = p2[0], bh = p2[1];
528
Richard Henderson63490392017-06-20 13:43:15 -0700529 if (arg_is_const(bl) && arg_is_const(bh)) {
530 tcg_target_ulong blv = arg_info(bl)->val;
531 tcg_target_ulong bhv = arg_info(bh)->val;
532 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700533
Richard Henderson63490392017-06-20 13:43:15 -0700534 if (arg_is_const(al) && arg_is_const(ah)) {
535 tcg_target_ulong alv = arg_info(al)->val;
536 tcg_target_ulong ahv = arg_info(ah)->val;
537 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700538 return do_constant_folding_cond_64(a, b, c);
539 }
540 if (b == 0) {
541 switch (c) {
542 case TCG_COND_LTU:
543 return 0;
544 case TCG_COND_GEU:
545 return 1;
546 default:
547 break;
548 }
549 }
550 }
Richard Henderson63490392017-06-20 13:43:15 -0700551 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700552 return do_constant_folding_cond_eq(c);
553 }
554 return 2;
555}
556
Richard Henderson24c9ae42012-10-02 11:32:21 -0700557static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
558{
559 TCGArg a1 = *p1, a2 = *p2;
560 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700561 sum += arg_is_const(a1);
562 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700563
564 /* Prefer the constant in second argument, and then the form
565 op a, a, b, which is better handled on non-RISC hosts. */
566 if (sum > 0 || (sum == 0 && dest == a2)) {
567 *p1 = a2;
568 *p2 = a1;
569 return true;
570 }
571 return false;
572}
573
Richard Henderson0bfcb862012-10-02 11:32:23 -0700574static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
575{
576 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700577 sum += arg_is_const(p1[0]);
578 sum += arg_is_const(p1[1]);
579 sum -= arg_is_const(p2[0]);
580 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700581 if (sum > 0) {
582 TCGArg t;
583 t = p1[0], p1[0] = p2[0], p2[0] = t;
584 t = p1[1], p1[1] = p2[1], p2[1] = t;
585 return true;
586 }
587 return false;
588}
589
Kirill Batuzov22613af2011-07-07 16:37:13 +0400590/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200591void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400592{
Richard Henderson15fa08f2017-11-02 15:19:14 +0100593 int nb_temps, nb_globals;
594 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400595 struct tcg_temp_info *infos;
596 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700597
Kirill Batuzov22613af2011-07-07 16:37:13 +0400598 /* Array VALS has an element for each temp.
599 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200600 If this temp is a copy of other ones then the other copies are
601 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400602
603 nb_temps = s->nb_temps;
604 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400605 bitmap_zero(temps_used.l, nb_temps);
606 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400607
Richard Henderson15fa08f2017-11-02 15:19:14 +0100608 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700609 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700610 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700611 TCGArg tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700612 TCGOpcode opc = op->opc;
613 const TCGOpDef *def = &tcg_op_defs[opc];
614
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200615 /* Count the arguments, and initialize the temps that are
616 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700617 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100618 nb_oargs = TCGOP_CALLO(op);
619 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200620 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700621 TCGTemp *ts = arg_temp(op->args[i]);
622 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400623 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200624 }
625 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200626 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700627 nb_oargs = def->nb_oargs;
628 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200629 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400630 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200631 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700632 }
633
634 /* Do copy propagation */
635 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700636 TCGTemp *ts = arg_temp(op->args[i]);
637 if (ts && ts_is_copy(ts)) {
638 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400639 }
640 }
641
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400642 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700643 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100644 CASE_OP_32_64_VEC(add):
645 CASE_OP_32_64_VEC(mul):
646 CASE_OP_32_64_VEC(and):
647 CASE_OP_32_64_VEC(or):
648 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700649 CASE_OP_32_64(eqv):
650 CASE_OP_32_64(nand):
651 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700652 CASE_OP_32_64(muluh):
653 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800654 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400655 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200656 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800657 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
658 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200659 }
660 break;
661 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800662 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
663 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200664 }
665 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700666 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800667 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
668 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700669 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700670 /* For movcond, we canonicalize the "false" input reg to match
671 the destination reg so that the tcg backend can implement
672 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800673 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
674 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700675 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700676 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800677 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800678 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
679 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700680 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800681 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800682 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800683 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700684 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700685 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800686 if (swap_commutative2(&op->args[0], &op->args[2])) {
687 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700688 }
689 break;
690 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800691 if (swap_commutative2(&op->args[1], &op->args[3])) {
692 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700693 }
694 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400695 default:
696 break;
697 }
698
Richard Henderson2d497542013-03-21 09:13:33 -0700699 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
700 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700701 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200702 CASE_OP_32_64(shl):
703 CASE_OP_32_64(shr):
704 CASE_OP_32_64(sar):
705 CASE_OP_32_64(rotl):
706 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700707 if (arg_is_const(op->args[1])
708 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800709 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200710 continue;
711 }
712 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100713 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700714 {
715 TCGOpcode neg_op;
716 bool have_neg;
717
Richard Henderson63490392017-06-20 13:43:15 -0700718 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700719 /* Proceed with possible constant folding. */
720 break;
721 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700722 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700723 neg_op = INDEX_op_neg_i32;
724 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100725 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700726 neg_op = INDEX_op_neg_i64;
727 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Henderson170ba882017-11-22 09:07:11 +0100728 } else {
729 neg_op = INDEX_op_neg_vec;
730 have_neg = TCG_TARGET_HAS_neg_vec;
Richard Henderson2d497542013-03-21 09:13:33 -0700731 }
732 if (!have_neg) {
733 break;
734 }
Richard Henderson63490392017-06-20 13:43:15 -0700735 if (arg_is_const(op->args[1])
736 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700737 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800738 reset_temp(op->args[0]);
739 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700740 continue;
741 }
742 }
743 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100744 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800745 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700746 if (!arg_is_const(op->args[1])
747 && arg_is_const(op->args[2])
748 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800749 i = 1;
750 goto try_not;
751 }
752 break;
753 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700754 if (!arg_is_const(op->args[1])
755 && arg_is_const(op->args[2])
756 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800757 i = 1;
758 goto try_not;
759 }
760 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100761 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700762 if (!arg_is_const(op->args[2])
763 && arg_is_const(op->args[1])
764 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800765 i = 2;
766 goto try_not;
767 }
768 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100769 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800770 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700771 if (!arg_is_const(op->args[2])
772 && arg_is_const(op->args[1])
773 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800774 i = 2;
775 goto try_not;
776 }
777 break;
778 try_not:
779 {
780 TCGOpcode not_op;
781 bool have_not;
782
Richard Henderson170ba882017-11-22 09:07:11 +0100783 if (def->flags & TCG_OPF_VECTOR) {
784 not_op = INDEX_op_not_vec;
785 have_not = TCG_TARGET_HAS_not_vec;
786 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800787 not_op = INDEX_op_not_i64;
788 have_not = TCG_TARGET_HAS_not_i64;
789 } else {
790 not_op = INDEX_op_not_i32;
791 have_not = TCG_TARGET_HAS_not_i32;
792 }
793 if (!have_not) {
794 break;
795 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700796 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800797 reset_temp(op->args[0]);
798 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800799 continue;
800 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200801 default:
802 break;
803 }
804
Richard Henderson464a1442014-01-31 07:42:11 -0600805 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700806 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100807 CASE_OP_32_64_VEC(add):
808 CASE_OP_32_64_VEC(sub):
809 CASE_OP_32_64_VEC(or):
810 CASE_OP_32_64_VEC(xor):
811 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400812 CASE_OP_32_64(shl):
813 CASE_OP_32_64(shr):
814 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700815 CASE_OP_32_64(rotl):
816 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700817 if (!arg_is_const(op->args[1])
818 && arg_is_const(op->args[2])
819 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800820 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200821 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400822 }
823 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100824 CASE_OP_32_64_VEC(and):
825 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600826 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700827 if (!arg_is_const(op->args[1])
828 && arg_is_const(op->args[2])
829 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800830 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200831 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600832 }
833 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200834 default:
835 break;
836 }
837
Aurelien Jarno30312442013-09-03 08:27:38 +0200838 /* Simplify using known-zero bits. Currently only ops with a single
839 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800840 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800841 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700842 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800843 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700844 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800845 break;
846 }
847 CASE_OP_32_64(ext8u):
848 mask = 0xff;
849 goto and_const;
850 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700851 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800852 break;
853 }
854 CASE_OP_32_64(ext16u):
855 mask = 0xffff;
856 goto and_const;
857 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700858 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800859 break;
860 }
861 case INDEX_op_ext32u_i64:
862 mask = 0xffffffffU;
863 goto and_const;
864
865 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700866 mask = arg_info(op->args[2])->mask;
867 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800868 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700869 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800870 }
Richard Henderson63490392017-06-20 13:43:15 -0700871 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800872 break;
873
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200874 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700875 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200876 break;
877 }
878 case INDEX_op_extu_i32_i64:
879 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700880 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200881 break;
882
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800883 CASE_OP_32_64(andc):
884 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800885 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700886 if (arg_is_const(op->args[2])) {
887 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800888 goto and_const;
889 }
Richard Henderson63490392017-06-20 13:43:15 -0700890 /* But we certainly know nothing outside args[1] may be set. */
891 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800892 break;
893
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200894 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700895 if (arg_is_const(op->args[2])) {
896 tmp = arg_info(op->args[2])->val & 31;
897 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200898 }
899 break;
900 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700901 if (arg_is_const(op->args[2])) {
902 tmp = arg_info(op->args[2])->val & 63;
903 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800904 }
905 break;
906
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200907 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700908 if (arg_is_const(op->args[2])) {
909 tmp = arg_info(op->args[2])->val & 31;
910 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200911 }
912 break;
913 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700914 if (arg_is_const(op->args[2])) {
915 tmp = arg_info(op->args[2])->val & 63;
916 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800917 }
918 break;
919
Richard Henderson609ad702015-07-24 07:16:00 -0700920 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700921 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700922 break;
923 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700924 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700925 break;
926
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800927 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700928 if (arg_is_const(op->args[2])) {
929 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
930 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800931 }
932 break;
933
934 CASE_OP_32_64(neg):
935 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700936 mask = -(arg_info(op->args[1])->mask
937 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800938 break;
939
940 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700941 mask = deposit64(arg_info(op->args[1])->mask,
942 op->args[3], op->args[4],
943 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800944 break;
945
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500946 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700947 mask = extract64(arg_info(op->args[1])->mask,
948 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800949 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700950 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500951 }
952 break;
953 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700954 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800955 op->args[2], op->args[3]);
956 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700957 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500958 }
959 break;
960
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800961 CASE_OP_32_64(or):
962 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700963 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800964 break;
965
Richard Henderson0e28d002016-11-16 09:23:28 +0100966 case INDEX_op_clz_i32:
967 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700968 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100969 break;
970
971 case INDEX_op_clz_i64:
972 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700973 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100974 break;
975
Richard Hendersona768e4e2016-11-21 11:13:39 +0100976 case INDEX_op_ctpop_i32:
977 mask = 32 | 31;
978 break;
979 case INDEX_op_ctpop_i64:
980 mask = 64 | 63;
981 break;
982
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800983 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700984 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800985 mask = 1;
986 break;
987
988 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -0700989 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800990 break;
991
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200992 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200993 mask = 0xff;
994 break;
995 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200996 mask = 0xffff;
997 break;
998 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200999 mask = 0xffffffffu;
1000 break;
1001
1002 CASE_OP_32_64(qemu_ld):
1003 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001004 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001005 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001006 if (!(mop & MO_SIGN)) {
1007 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1008 }
1009 }
1010 break;
1011
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001012 default:
1013 break;
1014 }
1015
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001016 /* 32-bit ops generate 32-bit results. For the result is zero test
1017 below, we can ignore high bits, but for further optimizations we
1018 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001019 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001020 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001021 mask |= ~(tcg_target_ulong)0xffffffffu;
1022 partmask &= 0xffffffffu;
1023 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001024 }
1025
Richard Henderson24666ba2014-05-22 11:14:10 -07001026 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001027 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001028 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001029 continue;
1030 }
1031 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001032 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001033 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001034 continue;
1035 }
1036
Aurelien Jarno56e49432012-09-06 16:47:13 +02001037 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001038 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001039 CASE_OP_32_64_VEC(and):
1040 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001041 CASE_OP_32_64(muluh):
1042 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001043 if (arg_is_const(op->args[2])
1044 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001045 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001046 continue;
1047 }
1048 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001049 default:
1050 break;
1051 }
1052
1053 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001054 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001055 CASE_OP_32_64_VEC(or):
1056 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001057 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001058 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001059 continue;
1060 }
1061 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001062 default:
1063 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001064 }
1065
Aurelien Jarno3c941932012-09-18 19:12:36 +02001066 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001067 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001068 CASE_OP_32_64_VEC(andc):
1069 CASE_OP_32_64_VEC(sub):
1070 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001071 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001072 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001073 continue;
1074 }
1075 break;
1076 default:
1077 break;
1078 }
1079
Kirill Batuzov22613af2011-07-07 16:37:13 +04001080 /* Propagate constants through copy operations and do constant
1081 folding. Constants will be substituted to arguments by register
1082 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001083 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001084 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001085 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001086 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001087 CASE_OP_32_64(movi):
Richard Henderson170ba882017-11-22 09:07:11 +01001088 case INDEX_op_dupi_vec:
Richard Hendersonacd93702016-12-08 12:28:42 -08001089 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001090 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001091
Richard Henderson170ba882017-11-22 09:07:11 +01001092 case INDEX_op_dup_vec:
1093 if (arg_is_const(op->args[1])) {
1094 tmp = arg_info(op->args[1])->val;
1095 tmp = dup_const(TCGOP_VECE(op), tmp);
1096 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001097 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001098 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001099 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001100
Kirill Batuzova640f032011-07-07 16:37:17 +04001101 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001102 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001103 CASE_OP_32_64(ext8s):
1104 CASE_OP_32_64(ext8u):
1105 CASE_OP_32_64(ext16s):
1106 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001107 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001108 case INDEX_op_ext32s_i64:
1109 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001110 case INDEX_op_ext_i32_i64:
1111 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001112 case INDEX_op_extrl_i64_i32:
1113 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001114 if (arg_is_const(op->args[1])) {
1115 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001116 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001117 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001118 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001119 goto do_default;
1120
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001121 CASE_OP_32_64(add):
1122 CASE_OP_32_64(sub):
1123 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001124 CASE_OP_32_64(or):
1125 CASE_OP_32_64(and):
1126 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001127 CASE_OP_32_64(shl):
1128 CASE_OP_32_64(shr):
1129 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001130 CASE_OP_32_64(rotl):
1131 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001132 CASE_OP_32_64(andc):
1133 CASE_OP_32_64(orc):
1134 CASE_OP_32_64(eqv):
1135 CASE_OP_32_64(nand):
1136 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001137 CASE_OP_32_64(muluh):
1138 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001139 CASE_OP_32_64(div):
1140 CASE_OP_32_64(divu):
1141 CASE_OP_32_64(rem):
1142 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001143 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1144 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1145 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001146 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001147 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001148 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001149 goto do_default;
1150
Richard Henderson0e28d002016-11-16 09:23:28 +01001151 CASE_OP_32_64(clz):
1152 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001153 if (arg_is_const(op->args[1])) {
1154 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001155 if (v != 0) {
1156 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001157 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001158 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001159 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001160 }
1161 break;
1162 }
1163 goto do_default;
1164
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001165 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001166 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1167 tmp = deposit64(arg_info(op->args[1])->val,
1168 op->args[3], op->args[4],
1169 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001170 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001171 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001172 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001173 goto do_default;
1174
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001175 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001176 if (arg_is_const(op->args[1])) {
1177 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001178 op->args[2], op->args[3]);
1179 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001180 break;
1181 }
1182 goto do_default;
1183
1184 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001185 if (arg_is_const(op->args[1])) {
1186 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001187 op->args[2], op->args[3]);
1188 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001189 break;
1190 }
1191 goto do_default;
1192
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001193 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001194 tmp = do_constant_folding_cond(opc, op->args[1],
1195 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001196 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001197 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001198 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001199 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001200 goto do_default;
1201
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001202 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001203 tmp = do_constant_folding_cond(opc, op->args[0],
1204 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001205 if (tmp != 2) {
1206 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001207 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001208 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001209 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001210 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001211 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001212 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001213 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001214 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001215 goto do_default;
1216
Richard Hendersonfa01a202012-09-21 10:13:37 -07001217 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001218 tmp = do_constant_folding_cond(opc, op->args[1],
1219 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001220 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001221 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001222 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001223 }
Richard Henderson63490392017-06-20 13:43:15 -07001224 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1225 tcg_target_ulong tv = arg_info(op->args[3])->val;
1226 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001227 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001228 if (fv == 1 && tv == 0) {
1229 cond = tcg_invert_cond(cond);
1230 } else if (!(tv == 1 && fv == 0)) {
1231 goto do_default;
1232 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001233 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001234 op->opc = opc = (opc == INDEX_op_movcond_i32
1235 ? INDEX_op_setcond_i32
1236 : INDEX_op_setcond_i64);
1237 nb_iargs = 2;
1238 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001239 goto do_default;
1240
Richard Henderson212c3282012-10-02 11:32:28 -07001241 case INDEX_op_add2_i32:
1242 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001243 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1244 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1245 uint32_t al = arg_info(op->args[2])->val;
1246 uint32_t ah = arg_info(op->args[3])->val;
1247 uint32_t bl = arg_info(op->args[4])->val;
1248 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001249 uint64_t a = ((uint64_t)ah << 32) | al;
1250 uint64_t b = ((uint64_t)bh << 32) | bl;
1251 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001252 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001253
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001254 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001255 a += b;
1256 } else {
1257 a -= b;
1258 }
1259
Richard Hendersonacd93702016-12-08 12:28:42 -08001260 rl = op->args[0];
1261 rh = op->args[1];
1262 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1263 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001264 break;
1265 }
1266 goto do_default;
1267
Richard Henderson14149682012-10-02 11:32:30 -07001268 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001269 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1270 uint32_t a = arg_info(op->args[2])->val;
1271 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001272 uint64_t r = (uint64_t)a * b;
1273 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001274 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001275
Richard Hendersonacd93702016-12-08 12:28:42 -08001276 rl = op->args[0];
1277 rh = op->args[1];
1278 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1279 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001280 break;
1281 }
1282 goto do_default;
1283
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001284 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001285 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1286 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001287 if (tmp != 2) {
1288 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001289 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001290 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001291 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001292 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001293 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001294 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001295 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001296 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001297 } else if ((op->args[4] == TCG_COND_LT
1298 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001299 && arg_is_const(op->args[2])
1300 && arg_info(op->args[2])->val == 0
1301 && arg_is_const(op->args[3])
1302 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001303 /* Simplify LT/GE comparisons vs zero to a single compare
1304 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001305 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001306 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001307 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001308 op->args[0] = op->args[1];
1309 op->args[1] = op->args[3];
1310 op->args[2] = op->args[4];
1311 op->args[3] = op->args[5];
1312 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001313 /* Simplify EQ comparisons where one of the pairs
1314 can be simplified. */
1315 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001316 op->args[0], op->args[2],
1317 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001318 if (tmp == 0) {
1319 goto do_brcond_false;
1320 } else if (tmp == 1) {
1321 goto do_brcond_high;
1322 }
1323 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001324 op->args[1], op->args[3],
1325 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001326 if (tmp == 0) {
1327 goto do_brcond_false;
1328 } else if (tmp != 1) {
1329 goto do_default;
1330 }
1331 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001332 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001333 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001334 op->args[1] = op->args[2];
1335 op->args[2] = op->args[4];
1336 op->args[3] = op->args[5];
1337 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001338 /* Simplify NE comparisons where one of the pairs
1339 can be simplified. */
1340 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001341 op->args[0], op->args[2],
1342 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001343 if (tmp == 0) {
1344 goto do_brcond_high;
1345 } else if (tmp == 1) {
1346 goto do_brcond_true;
1347 }
1348 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001349 op->args[1], op->args[3],
1350 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001351 if (tmp == 0) {
1352 goto do_brcond_low;
1353 } else if (tmp == 1) {
1354 goto do_brcond_true;
1355 }
1356 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001357 } else {
1358 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001359 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001360 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001361
1362 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001363 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1364 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001365 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001366 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001367 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1368 } else if ((op->args[5] == TCG_COND_LT
1369 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001370 && arg_is_const(op->args[3])
1371 && arg_info(op->args[3])->val == 0
1372 && arg_is_const(op->args[4])
1373 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001374 /* Simplify LT/GE comparisons vs zero to a single compare
1375 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001376 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001377 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001378 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001379 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001380 op->args[1] = op->args[2];
1381 op->args[2] = op->args[4];
1382 op->args[3] = op->args[5];
1383 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001384 /* Simplify EQ comparisons where one of the pairs
1385 can be simplified. */
1386 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001387 op->args[1], op->args[3],
1388 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001389 if (tmp == 0) {
1390 goto do_setcond_const;
1391 } else if (tmp == 1) {
1392 goto do_setcond_high;
1393 }
1394 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001395 op->args[2], op->args[4],
1396 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001397 if (tmp == 0) {
1398 goto do_setcond_high;
1399 } else if (tmp != 1) {
1400 goto do_default;
1401 }
1402 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001403 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001404 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001405 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001406 op->args[2] = op->args[3];
1407 op->args[3] = op->args[5];
1408 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001409 /* Simplify NE comparisons where one of the pairs
1410 can be simplified. */
1411 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001412 op->args[1], op->args[3],
1413 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001414 if (tmp == 0) {
1415 goto do_setcond_high;
1416 } else if (tmp == 1) {
1417 goto do_setcond_const;
1418 }
1419 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001420 op->args[2], op->args[4],
1421 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001422 if (tmp == 0) {
1423 goto do_setcond_low;
1424 } else if (tmp == 1) {
1425 goto do_setcond_const;
1426 }
1427 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001428 } else {
1429 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001430 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001431 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001432
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001433 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001434 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001435 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001436 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001437 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001438 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001439 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001440 }
1441 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001442 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001443
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001444 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001445 do_default:
1446 /* Default case: we know nothing about operation (or were unable
1447 to compute the operation result) so no propagation is done.
1448 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001449 block, otherwise we only trash the output args. "mask" is
1450 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001451 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001452 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001453 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001454 do_reset_output:
1455 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001456 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001457 /* Save the corresponding known-zero bits mask for the
1458 first output argument (only one supported so far). */
1459 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001460 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001461 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001462 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001463 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001464 break;
1465 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001466
1467 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001468 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001469 switch (opc) {
1470 case INDEX_op_mb:
1471 /* Merge two barriers of the same type into one,
1472 * or a weaker barrier into a stronger one,
1473 * or two weaker barriers into a stronger one.
1474 * mb X; mb Y => mb X|Y
1475 * mb; strl => mb; st
1476 * ldaq; mb => ld; mb
1477 * ldaq; strl => ld; mb; st
1478 * Other combinations are also merged into a strong
1479 * barrier. This is stricter than specified but for
1480 * the purposes of TCG is better than not optimizing.
1481 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001482 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001483 tcg_op_remove(s, op);
1484 break;
1485
1486 default:
1487 /* Opcodes that end the block stop the optimization. */
1488 if ((def->flags & TCG_OPF_BB_END) == 0) {
1489 break;
1490 }
1491 /* fallthru */
1492 case INDEX_op_qemu_ld_i32:
1493 case INDEX_op_qemu_ld_i64:
1494 case INDEX_op_qemu_st_i32:
1495 case INDEX_op_qemu_st_i64:
1496 case INDEX_op_call:
1497 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001498 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001499 break;
1500 }
1501 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001502 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001503 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001504 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001505}