ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU VMware-SVGA "chipset". |
| 3 | * |
| 4 | * Copyright (c) 2007 Andrzej Zaborowski <balrog@zabor.org> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
Peter Maydell | 47df515 | 2016-01-26 18:17:13 +0000 | [diff] [blame] | 24 | #include "qemu/osdep.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 25 | #include "qapi/error.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 26 | #include "hw/hw.h" |
| 27 | #include "hw/loader.h" |
Stefan Weil | ac86048 | 2013-11-10 14:20:16 +0100 | [diff] [blame] | 28 | #include "trace.h" |
Paolo Bonzini | 28ecbae | 2012-11-28 12:06:30 +0100 | [diff] [blame] | 29 | #include "ui/console.h" |
Peter Lieven | 2f487a3d | 2014-03-17 18:38:58 +0100 | [diff] [blame] | 30 | #include "ui/vnc.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 31 | #include "hw/pci/pci.h" |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 32 | |
Jan Kiszka | ca0508d | 2011-08-22 19:12:09 +0200 | [diff] [blame] | 33 | #undef VERBOSE |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 34 | #define HW_RECT_ACCEL |
| 35 | #define HW_FILL_ACCEL |
| 36 | #define HW_MOUSE_ACCEL |
| 37 | |
Paolo Bonzini | 47b43a1 | 2013-03-18 17:36:02 +0100 | [diff] [blame] | 38 | #include "vga_int.h" |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 39 | |
| 40 | /* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 41 | |
| 42 | struct vmsvga_state_s { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 43 | VGACommonState vga; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 44 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 45 | int invalidated; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 46 | int enable; |
| 47 | int config; |
| 48 | struct { |
| 49 | int id; |
| 50 | int x; |
| 51 | int y; |
| 52 | int on; |
| 53 | } cursor; |
| 54 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 55 | int index; |
| 56 | int scratch_size; |
| 57 | uint32_t *scratch; |
| 58 | int new_width; |
| 59 | int new_height; |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 60 | int new_depth; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 61 | uint32_t guest; |
| 62 | uint32_t svgaid; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 63 | int syncing; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 64 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 65 | MemoryRegion fifo_ram; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 66 | uint8_t *fifo_ptr; |
| 67 | unsigned int fifo_size; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 68 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 69 | uint32_t *fifo; |
| 70 | uint32_t fifo_min; |
| 71 | uint32_t fifo_max; |
| 72 | uint32_t fifo_next; |
| 73 | uint32_t fifo_stop; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 74 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 75 | #define REDRAW_FIFO_LEN 512 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 76 | struct vmsvga_rect_s { |
| 77 | int x, y, w, h; |
| 78 | } redraw_fifo[REDRAW_FIFO_LEN]; |
| 79 | int redraw_fifo_first, redraw_fifo_last; |
| 80 | }; |
| 81 | |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 82 | #define TYPE_VMWARE_SVGA "vmware-svga" |
| 83 | |
| 84 | #define VMWARE_SVGA(obj) \ |
| 85 | OBJECT_CHECK(struct pci_vmsvga_state_s, (obj), TYPE_VMWARE_SVGA) |
| 86 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 87 | struct pci_vmsvga_state_s { |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 88 | /*< private >*/ |
| 89 | PCIDevice parent_obj; |
| 90 | /*< public >*/ |
| 91 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 92 | struct vmsvga_state_s chip; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 93 | MemoryRegion io_bar; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 94 | }; |
| 95 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 96 | #define SVGA_MAGIC 0x900000UL |
| 97 | #define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver)) |
| 98 | #define SVGA_ID_0 SVGA_MAKE_ID(0) |
| 99 | #define SVGA_ID_1 SVGA_MAKE_ID(1) |
| 100 | #define SVGA_ID_2 SVGA_MAKE_ID(2) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 101 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 102 | #define SVGA_LEGACY_BASE_PORT 0x4560 |
| 103 | #define SVGA_INDEX_PORT 0x0 |
| 104 | #define SVGA_VALUE_PORT 0x1 |
| 105 | #define SVGA_BIOS_PORT 0x2 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 106 | |
| 107 | #define SVGA_VERSION_2 |
| 108 | |
| 109 | #ifdef SVGA_VERSION_2 |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 110 | # define SVGA_ID SVGA_ID_2 |
| 111 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 112 | # define SVGA_IO_MUL 1 |
| 113 | # define SVGA_FIFO_SIZE 0x10000 |
| 114 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA2 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 115 | #else |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 116 | # define SVGA_ID SVGA_ID_1 |
| 117 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 118 | # define SVGA_IO_MUL 4 |
| 119 | # define SVGA_FIFO_SIZE 0x10000 |
| 120 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 121 | #endif |
| 122 | |
| 123 | enum { |
| 124 | /* ID 0, 1 and 2 registers */ |
| 125 | SVGA_REG_ID = 0, |
| 126 | SVGA_REG_ENABLE = 1, |
| 127 | SVGA_REG_WIDTH = 2, |
| 128 | SVGA_REG_HEIGHT = 3, |
| 129 | SVGA_REG_MAX_WIDTH = 4, |
| 130 | SVGA_REG_MAX_HEIGHT = 5, |
| 131 | SVGA_REG_DEPTH = 6, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 132 | SVGA_REG_BITS_PER_PIXEL = 7, /* Current bpp in the guest */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 133 | SVGA_REG_PSEUDOCOLOR = 8, |
| 134 | SVGA_REG_RED_MASK = 9, |
| 135 | SVGA_REG_GREEN_MASK = 10, |
| 136 | SVGA_REG_BLUE_MASK = 11, |
| 137 | SVGA_REG_BYTES_PER_LINE = 12, |
| 138 | SVGA_REG_FB_START = 13, |
| 139 | SVGA_REG_FB_OFFSET = 14, |
| 140 | SVGA_REG_VRAM_SIZE = 15, |
| 141 | SVGA_REG_FB_SIZE = 16, |
| 142 | |
| 143 | /* ID 1 and 2 registers */ |
| 144 | SVGA_REG_CAPABILITIES = 17, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 145 | SVGA_REG_MEM_START = 18, /* Memory for command FIFO */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 146 | SVGA_REG_MEM_SIZE = 19, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 147 | SVGA_REG_CONFIG_DONE = 20, /* Set when memory area configured */ |
| 148 | SVGA_REG_SYNC = 21, /* Write to force synchronization */ |
| 149 | SVGA_REG_BUSY = 22, /* Read to check if sync is done */ |
| 150 | SVGA_REG_GUEST_ID = 23, /* Set guest OS identifier */ |
| 151 | SVGA_REG_CURSOR_ID = 24, /* ID of cursor */ |
| 152 | SVGA_REG_CURSOR_X = 25, /* Set cursor X position */ |
| 153 | SVGA_REG_CURSOR_Y = 26, /* Set cursor Y position */ |
| 154 | SVGA_REG_CURSOR_ON = 27, /* Turn cursor on/off */ |
| 155 | SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* Current bpp in the host */ |
| 156 | SVGA_REG_SCRATCH_SIZE = 29, /* Number of scratch registers */ |
| 157 | SVGA_REG_MEM_REGS = 30, /* Number of FIFO registers */ |
| 158 | SVGA_REG_NUM_DISPLAYS = 31, /* Number of guest displays */ |
| 159 | SVGA_REG_PITCHLOCK = 32, /* Fixed pitch for all modes */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 160 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 161 | SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 162 | SVGA_PALETTE_END = SVGA_PALETTE_BASE + 767, |
| 163 | SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + 768, |
| 164 | }; |
| 165 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 166 | #define SVGA_CAP_NONE 0 |
| 167 | #define SVGA_CAP_RECT_FILL (1 << 0) |
| 168 | #define SVGA_CAP_RECT_COPY (1 << 1) |
| 169 | #define SVGA_CAP_RECT_PAT_FILL (1 << 2) |
| 170 | #define SVGA_CAP_LEGACY_OFFSCREEN (1 << 3) |
| 171 | #define SVGA_CAP_RASTER_OP (1 << 4) |
| 172 | #define SVGA_CAP_CURSOR (1 << 5) |
| 173 | #define SVGA_CAP_CURSOR_BYPASS (1 << 6) |
| 174 | #define SVGA_CAP_CURSOR_BYPASS_2 (1 << 7) |
| 175 | #define SVGA_CAP_8BIT_EMULATION (1 << 8) |
| 176 | #define SVGA_CAP_ALPHA_CURSOR (1 << 9) |
| 177 | #define SVGA_CAP_GLYPH (1 << 10) |
| 178 | #define SVGA_CAP_GLYPH_CLIPPING (1 << 11) |
| 179 | #define SVGA_CAP_OFFSCREEN_1 (1 << 12) |
| 180 | #define SVGA_CAP_ALPHA_BLEND (1 << 13) |
| 181 | #define SVGA_CAP_3D (1 << 14) |
| 182 | #define SVGA_CAP_EXTENDED_FIFO (1 << 15) |
| 183 | #define SVGA_CAP_MULTIMON (1 << 16) |
| 184 | #define SVGA_CAP_PITCHLOCK (1 << 17) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 185 | |
| 186 | /* |
| 187 | * FIFO offsets (seen as an array of 32-bit words) |
| 188 | */ |
| 189 | enum { |
| 190 | /* |
| 191 | * The original defined FIFO offsets |
| 192 | */ |
| 193 | SVGA_FIFO_MIN = 0, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 194 | SVGA_FIFO_MAX, /* The distance from MIN to MAX must be at least 10K */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 195 | SVGA_FIFO_NEXT, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 196 | SVGA_FIFO_STOP, |
| 197 | |
| 198 | /* |
| 199 | * Additional offsets added as of SVGA_CAP_EXTENDED_FIFO |
| 200 | */ |
| 201 | SVGA_FIFO_CAPABILITIES = 4, |
| 202 | SVGA_FIFO_FLAGS, |
| 203 | SVGA_FIFO_FENCE, |
| 204 | SVGA_FIFO_3D_HWVERSION, |
| 205 | SVGA_FIFO_PITCHLOCK, |
| 206 | }; |
| 207 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 208 | #define SVGA_FIFO_CAP_NONE 0 |
| 209 | #define SVGA_FIFO_CAP_FENCE (1 << 0) |
| 210 | #define SVGA_FIFO_CAP_ACCELFRONT (1 << 1) |
| 211 | #define SVGA_FIFO_CAP_PITCHLOCK (1 << 2) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 212 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 213 | #define SVGA_FIFO_FLAG_NONE 0 |
| 214 | #define SVGA_FIFO_FLAG_ACCELFRONT (1 << 0) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 215 | |
| 216 | /* These values can probably be changed arbitrarily. */ |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 217 | #define SVGA_SCRATCH_SIZE 0x8000 |
Peter Lieven | 2f487a3d | 2014-03-17 18:38:58 +0100 | [diff] [blame] | 218 | #define SVGA_MAX_WIDTH ROUND_UP(2360, VNC_DIRTY_PIXELS_PER_BIT) |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 219 | #define SVGA_MAX_HEIGHT 1770 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 220 | |
| 221 | #ifdef VERBOSE |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 222 | # define GUEST_OS_BASE 0x5001 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 223 | static const char *vmsvga_guest_id[] = { |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 224 | [0x00] = "Dos", |
| 225 | [0x01] = "Windows 3.1", |
| 226 | [0x02] = "Windows 95", |
| 227 | [0x03] = "Windows 98", |
| 228 | [0x04] = "Windows ME", |
| 229 | [0x05] = "Windows NT", |
| 230 | [0x06] = "Windows 2000", |
| 231 | [0x07] = "Linux", |
| 232 | [0x08] = "OS/2", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 233 | [0x09] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 234 | [0x0a] = "BSD", |
| 235 | [0x0b] = "Whistler", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 236 | [0x0c] = "an unknown OS", |
| 237 | [0x0d] = "an unknown OS", |
| 238 | [0x0e] = "an unknown OS", |
| 239 | [0x0f] = "an unknown OS", |
| 240 | [0x10] = "an unknown OS", |
| 241 | [0x11] = "an unknown OS", |
| 242 | [0x12] = "an unknown OS", |
| 243 | [0x13] = "an unknown OS", |
| 244 | [0x14] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 245 | [0x15] = "Windows 2003", |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 246 | }; |
| 247 | #endif |
| 248 | |
| 249 | enum { |
| 250 | SVGA_CMD_INVALID_CMD = 0, |
| 251 | SVGA_CMD_UPDATE = 1, |
| 252 | SVGA_CMD_RECT_FILL = 2, |
| 253 | SVGA_CMD_RECT_COPY = 3, |
| 254 | SVGA_CMD_DEFINE_BITMAP = 4, |
| 255 | SVGA_CMD_DEFINE_BITMAP_SCANLINE = 5, |
| 256 | SVGA_CMD_DEFINE_PIXMAP = 6, |
| 257 | SVGA_CMD_DEFINE_PIXMAP_SCANLINE = 7, |
| 258 | SVGA_CMD_RECT_BITMAP_FILL = 8, |
| 259 | SVGA_CMD_RECT_PIXMAP_FILL = 9, |
| 260 | SVGA_CMD_RECT_BITMAP_COPY = 10, |
| 261 | SVGA_CMD_RECT_PIXMAP_COPY = 11, |
| 262 | SVGA_CMD_FREE_OBJECT = 12, |
| 263 | SVGA_CMD_RECT_ROP_FILL = 13, |
| 264 | SVGA_CMD_RECT_ROP_COPY = 14, |
| 265 | SVGA_CMD_RECT_ROP_BITMAP_FILL = 15, |
| 266 | SVGA_CMD_RECT_ROP_PIXMAP_FILL = 16, |
| 267 | SVGA_CMD_RECT_ROP_BITMAP_COPY = 17, |
| 268 | SVGA_CMD_RECT_ROP_PIXMAP_COPY = 18, |
| 269 | SVGA_CMD_DEFINE_CURSOR = 19, |
| 270 | SVGA_CMD_DISPLAY_CURSOR = 20, |
| 271 | SVGA_CMD_MOVE_CURSOR = 21, |
| 272 | SVGA_CMD_DEFINE_ALPHA_CURSOR = 22, |
| 273 | SVGA_CMD_DRAW_GLYPH = 23, |
| 274 | SVGA_CMD_DRAW_GLYPH_CLIPPED = 24, |
| 275 | SVGA_CMD_UPDATE_VERBOSE = 25, |
| 276 | SVGA_CMD_SURFACE_FILL = 26, |
| 277 | SVGA_CMD_SURFACE_COPY = 27, |
| 278 | SVGA_CMD_SURFACE_ALPHA_BLEND = 28, |
| 279 | SVGA_CMD_FRONT_ROP_FILL = 29, |
| 280 | SVGA_CMD_FENCE = 30, |
| 281 | }; |
| 282 | |
| 283 | /* Legal values for the SVGA_REG_CURSOR_ON register in cursor bypass mode */ |
| 284 | enum { |
| 285 | SVGA_CURSOR_ON_HIDE = 0, |
| 286 | SVGA_CURSOR_ON_SHOW = 1, |
| 287 | SVGA_CURSOR_ON_REMOVE_FROM_FB = 2, |
| 288 | SVGA_CURSOR_ON_RESTORE_TO_FB = 3, |
| 289 | }; |
| 290 | |
Gerd Hoffmann | 0725890 | 2014-10-06 11:51:54 +0200 | [diff] [blame] | 291 | static inline bool vmsvga_verify_rect(DisplaySurface *surface, |
| 292 | const char *name, |
| 293 | int x, int y, int w, int h) |
| 294 | { |
| 295 | if (x < 0) { |
| 296 | fprintf(stderr, "%s: x was < 0 (%d)\n", name, x); |
| 297 | return false; |
| 298 | } |
| 299 | if (x > SVGA_MAX_WIDTH) { |
| 300 | fprintf(stderr, "%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x); |
| 301 | return false; |
| 302 | } |
| 303 | if (w < 0) { |
| 304 | fprintf(stderr, "%s: w was < 0 (%d)\n", name, w); |
| 305 | return false; |
| 306 | } |
| 307 | if (w > SVGA_MAX_WIDTH) { |
| 308 | fprintf(stderr, "%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w); |
| 309 | return false; |
| 310 | } |
| 311 | if (x + w > surface_width(surface)) { |
| 312 | fprintf(stderr, "%s: width was > %d (x: %d, w: %d)\n", |
| 313 | name, surface_width(surface), x, w); |
| 314 | return false; |
| 315 | } |
| 316 | |
| 317 | if (y < 0) { |
| 318 | fprintf(stderr, "%s: y was < 0 (%d)\n", name, y); |
| 319 | return false; |
| 320 | } |
| 321 | if (y > SVGA_MAX_HEIGHT) { |
| 322 | fprintf(stderr, "%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y); |
| 323 | return false; |
| 324 | } |
| 325 | if (h < 0) { |
| 326 | fprintf(stderr, "%s: h was < 0 (%d)\n", name, h); |
| 327 | return false; |
| 328 | } |
| 329 | if (h > SVGA_MAX_HEIGHT) { |
| 330 | fprintf(stderr, "%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h); |
| 331 | return false; |
| 332 | } |
| 333 | if (y + h > surface_height(surface)) { |
| 334 | fprintf(stderr, "%s: update height > %d (y: %d, h: %d)\n", |
| 335 | name, surface_height(surface), y, h); |
| 336 | return false; |
| 337 | } |
| 338 | |
| 339 | return true; |
| 340 | } |
| 341 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 342 | static inline void vmsvga_update_rect(struct vmsvga_state_s *s, |
Gerd Hoffmann | 0725890 | 2014-10-06 11:51:54 +0200 | [diff] [blame] | 343 | int x, int y, int w, int h) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 344 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 345 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
balrog | a8fbaf9 | 2008-03-06 20:43:34 +0000 | [diff] [blame] | 346 | int line; |
| 347 | int bypl; |
| 348 | int width; |
| 349 | int start; |
| 350 | uint8_t *src; |
| 351 | uint8_t *dst; |
| 352 | |
Gerd Hoffmann | 1735fe1 | 2014-10-06 11:58:22 +0200 | [diff] [blame] | 353 | if (!vmsvga_verify_rect(surface, __func__, x, y, w, h)) { |
| 354 | /* go for a fullscreen update as fallback */ |
Michael Tokarev | 8cb6bfb | 2013-01-25 21:23:24 +0400 | [diff] [blame] | 355 | x = 0; |
Michael Tokarev | 8cb6bfb | 2013-01-25 21:23:24 +0400 | [diff] [blame] | 356 | y = 0; |
Gerd Hoffmann | 1735fe1 | 2014-10-06 11:58:22 +0200 | [diff] [blame] | 357 | w = surface_width(surface); |
| 358 | h = surface_height(surface); |
balrog | a8fbaf9 | 2008-03-06 20:43:34 +0000 | [diff] [blame] | 359 | } |
| 360 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 361 | bypl = surface_stride(surface); |
| 362 | width = surface_bytes_per_pixel(surface) * w; |
| 363 | start = surface_bytes_per_pixel(surface) * x + bypl * y; |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 364 | src = s->vga.vram_ptr + start; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 365 | dst = surface_data(surface) + start; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 366 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 367 | for (line = h; line > 0; line--, src += bypl, dst += bypl) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 368 | memcpy(dst, src, width); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 369 | } |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 370 | dpy_gfx_update(s->vga.con, x, y, w, h); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 371 | } |
| 372 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 373 | static inline void vmsvga_update_rect_delayed(struct vmsvga_state_s *s, |
| 374 | int x, int y, int w, int h) |
| 375 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 376 | struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++]; |
| 377 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 378 | s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1; |
| 379 | rect->x = x; |
| 380 | rect->y = y; |
| 381 | rect->w = w; |
| 382 | rect->h = h; |
| 383 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 384 | |
| 385 | static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) |
| 386 | { |
| 387 | struct vmsvga_rect_s *rect; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 388 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 389 | if (s->invalidated) { |
| 390 | s->redraw_fifo_first = s->redraw_fifo_last; |
| 391 | return; |
| 392 | } |
| 393 | /* Overlapping region updates can be optimised out here - if someone |
| 394 | * knows a smart algorithm to do that, please share. */ |
| 395 | while (s->redraw_fifo_first != s->redraw_fifo_last) { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 396 | rect = &s->redraw_fifo[s->redraw_fifo_first++]; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 397 | s->redraw_fifo_first &= REDRAW_FIFO_LEN - 1; |
| 398 | vmsvga_update_rect(s, rect->x, rect->y, rect->w, rect->h); |
| 399 | } |
| 400 | } |
| 401 | |
| 402 | #ifdef HW_RECT_ACCEL |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 403 | static inline int vmsvga_copy_rect(struct vmsvga_state_s *s, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 404 | int x0, int y0, int x1, int y1, int w, int h) |
| 405 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 406 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 407 | uint8_t *vram = s->vga.vram_ptr; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 408 | int bypl = surface_stride(surface); |
| 409 | int bypp = surface_bytes_per_pixel(surface); |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 410 | int width = bypp * w; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 411 | int line = h; |
| 412 | uint8_t *ptr[2]; |
| 413 | |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 414 | if (!vmsvga_verify_rect(surface, "vmsvga_copy_rect/src", x0, y0, w, h)) { |
| 415 | return -1; |
| 416 | } |
| 417 | if (!vmsvga_verify_rect(surface, "vmsvga_copy_rect/dst", x1, y1, w, h)) { |
| 418 | return -1; |
| 419 | } |
| 420 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 421 | if (y1 > y0) { |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 422 | ptr[0] = vram + bypp * x0 + bypl * (y0 + h - 1); |
| 423 | ptr[1] = vram + bypp * x1 + bypl * (y1 + h - 1); |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 424 | for (; line > 0; line --, ptr[0] -= bypl, ptr[1] -= bypl) { |
| 425 | memmove(ptr[1], ptr[0], width); |
| 426 | } |
| 427 | } else { |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 428 | ptr[0] = vram + bypp * x0 + bypl * y0; |
| 429 | ptr[1] = vram + bypp * x1 + bypl * y1; |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 430 | for (; line > 0; line --, ptr[0] += bypl, ptr[1] += bypl) { |
| 431 | memmove(ptr[1], ptr[0], width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 432 | } |
| 433 | } |
| 434 | |
| 435 | vmsvga_update_rect_delayed(s, x1, y1, w, h); |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 436 | return 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 437 | } |
| 438 | #endif |
| 439 | |
| 440 | #ifdef HW_FILL_ACCEL |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 441 | static inline int vmsvga_fill_rect(struct vmsvga_state_s *s, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 442 | uint32_t c, int x, int y, int w, int h) |
| 443 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 444 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
| 445 | int bypl = surface_stride(surface); |
| 446 | int width = surface_bytes_per_pixel(surface) * w; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 447 | int line = h; |
| 448 | int column; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 449 | uint8_t *fst; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 450 | uint8_t *dst; |
| 451 | uint8_t *src; |
| 452 | uint8_t col[4]; |
| 453 | |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 454 | if (!vmsvga_verify_rect(surface, __func__, x, y, w, h)) { |
| 455 | return -1; |
| 456 | } |
| 457 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 458 | col[0] = c; |
| 459 | col[1] = c >> 8; |
| 460 | col[2] = c >> 16; |
| 461 | col[3] = c >> 24; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 462 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 463 | fst = s->vga.vram_ptr + surface_bytes_per_pixel(surface) * x + bypl * y; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 464 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 465 | if (line--) { |
| 466 | dst = fst; |
| 467 | src = col; |
| 468 | for (column = width; column > 0; column--) { |
| 469 | *(dst++) = *(src++); |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 470 | if (src - col == surface_bytes_per_pixel(surface)) { |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 471 | src = col; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 472 | } |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 473 | } |
| 474 | dst = fst; |
| 475 | for (; line > 0; line--) { |
| 476 | dst += bypl; |
| 477 | memcpy(dst, fst, width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 478 | } |
| 479 | } |
| 480 | |
| 481 | vmsvga_update_rect_delayed(s, x, y, w, h); |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 482 | return 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 483 | } |
| 484 | #endif |
| 485 | |
| 486 | struct vmsvga_cursor_definition_s { |
Gerd Hoffmann | 5829b09 | 2015-09-29 09:58:05 +0200 | [diff] [blame] | 487 | uint32_t width; |
| 488 | uint32_t height; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 489 | int id; |
Gerd Hoffmann | 5829b09 | 2015-09-29 09:58:05 +0200 | [diff] [blame] | 490 | uint32_t bpp; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 491 | int hot_x; |
| 492 | int hot_y; |
| 493 | uint32_t mask[1024]; |
Dave Airlie | 8095cb3 | 2009-12-18 08:08:11 +1000 | [diff] [blame] | 494 | uint32_t image[4096]; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 495 | }; |
| 496 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 497 | #define SVGA_BITMAP_SIZE(w, h) ((((w) + 31) >> 5) * (h)) |
| 498 | #define SVGA_PIXMAP_SIZE(w, h, bpp) (((((w) * (bpp)) + 31) >> 5) * (h)) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 499 | |
| 500 | #ifdef HW_MOUSE_ACCEL |
| 501 | static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, |
| 502 | struct vmsvga_cursor_definition_s *c) |
| 503 | { |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 504 | QEMUCursor *qc; |
| 505 | int i, pixels; |
| 506 | |
| 507 | qc = cursor_alloc(c->width, c->height); |
| 508 | qc->hot_x = c->hot_x; |
| 509 | qc->hot_y = c->hot_y; |
| 510 | switch (c->bpp) { |
| 511 | case 1: |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 512 | cursor_set_mono(qc, 0xffffff, 0x000000, (void *)c->image, |
| 513 | 1, (void *)c->mask); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 514 | #ifdef DEBUG |
| 515 | cursor_print_ascii_art(qc, "vmware/mono"); |
| 516 | #endif |
| 517 | break; |
| 518 | case 32: |
| 519 | /* fill alpha channel from mask, set color to zero */ |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 520 | cursor_set_mono(qc, 0x000000, 0x000000, (void *)c->mask, |
| 521 | 1, (void *)c->mask); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 522 | /* add in rgb values */ |
| 523 | pixels = c->width * c->height; |
| 524 | for (i = 0; i < pixels; i++) { |
| 525 | qc->data[i] |= c->image[i] & 0xffffff; |
| 526 | } |
| 527 | #ifdef DEBUG |
| 528 | cursor_print_ascii_art(qc, "vmware/32bit"); |
| 529 | #endif |
| 530 | break; |
| 531 | default: |
| 532 | fprintf(stderr, "%s: unhandled bpp %d, using fallback cursor\n", |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 533 | __func__, c->bpp); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 534 | cursor_put(qc); |
| 535 | qc = cursor_builtin_left_ptr(); |
| 536 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 537 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 538 | dpy_cursor_define(s->vga.con, qc); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 539 | cursor_put(qc); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 540 | } |
| 541 | #endif |
| 542 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 543 | static inline int vmsvga_fifo_length(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 544 | { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 545 | int num; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 546 | |
| 547 | if (!s->config || !s->enable) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 548 | return 0; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 549 | } |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 550 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 551 | s->fifo_min = le32_to_cpu(s->fifo[SVGA_FIFO_MIN]); |
| 552 | s->fifo_max = le32_to_cpu(s->fifo[SVGA_FIFO_MAX]); |
| 553 | s->fifo_next = le32_to_cpu(s->fifo[SVGA_FIFO_NEXT]); |
| 554 | s->fifo_stop = le32_to_cpu(s->fifo[SVGA_FIFO_STOP]); |
| 555 | |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 556 | /* Check range and alignment. */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 557 | if ((s->fifo_min | s->fifo_max | s->fifo_next | s->fifo_stop) & 3) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 558 | return 0; |
| 559 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 560 | if (s->fifo_min < sizeof(uint32_t) * 4) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 561 | return 0; |
| 562 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 563 | if (s->fifo_max > SVGA_FIFO_SIZE || |
| 564 | s->fifo_min >= SVGA_FIFO_SIZE || |
| 565 | s->fifo_stop >= SVGA_FIFO_SIZE || |
| 566 | s->fifo_next >= SVGA_FIFO_SIZE) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 567 | return 0; |
| 568 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 569 | if (s->fifo_max < s->fifo_min + 10 * 1024) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 570 | return 0; |
| 571 | } |
| 572 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 573 | num = s->fifo_next - s->fifo_stop; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 574 | if (num < 0) { |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 575 | num += s->fifo_max - s->fifo_min; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 576 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 577 | return num >> 2; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 578 | } |
| 579 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 580 | static inline uint32_t vmsvga_fifo_read_raw(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 581 | { |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 582 | uint32_t cmd = s->fifo[s->fifo_stop >> 2]; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 583 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 584 | s->fifo_stop += 4; |
| 585 | if (s->fifo_stop >= s->fifo_max) { |
| 586 | s->fifo_stop = s->fifo_min; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 587 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 588 | s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 589 | return cmd; |
| 590 | } |
| 591 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 592 | static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s) |
| 593 | { |
| 594 | return le32_to_cpu(vmsvga_fifo_read_raw(s)); |
| 595 | } |
| 596 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 597 | static void vmsvga_fifo_run(struct vmsvga_state_s *s) |
| 598 | { |
| 599 | uint32_t cmd, colour; |
Gerd Hoffmann | 4e68a0e | 2016-05-30 09:09:21 +0200 | [diff] [blame] | 600 | int args, len, maxloop = 1024; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 601 | int x, y, dx, dy, width, height; |
| 602 | struct vmsvga_cursor_definition_s cursor; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 603 | uint32_t cmd_start; |
| 604 | |
| 605 | len = vmsvga_fifo_length(s); |
Gerd Hoffmann | 4e68a0e | 2016-05-30 09:09:21 +0200 | [diff] [blame] | 606 | while (len > 0 && --maxloop > 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 607 | /* May need to go back to the start of the command if incomplete */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 608 | cmd_start = s->fifo_stop; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 609 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 610 | switch (cmd = vmsvga_fifo_read(s)) { |
| 611 | case SVGA_CMD_UPDATE: |
| 612 | case SVGA_CMD_UPDATE_VERBOSE: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 613 | len -= 5; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 614 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 615 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 616 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 617 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 618 | x = vmsvga_fifo_read(s); |
| 619 | y = vmsvga_fifo_read(s); |
| 620 | width = vmsvga_fifo_read(s); |
| 621 | height = vmsvga_fifo_read(s); |
| 622 | vmsvga_update_rect_delayed(s, x, y, width, height); |
| 623 | break; |
| 624 | |
| 625 | case SVGA_CMD_RECT_FILL: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 626 | len -= 6; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 627 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 628 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 629 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 630 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 631 | colour = vmsvga_fifo_read(s); |
| 632 | x = vmsvga_fifo_read(s); |
| 633 | y = vmsvga_fifo_read(s); |
| 634 | width = vmsvga_fifo_read(s); |
| 635 | height = vmsvga_fifo_read(s); |
| 636 | #ifdef HW_FILL_ACCEL |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 637 | if (vmsvga_fill_rect(s, colour, x, y, width, height) == 0) { |
| 638 | break; |
| 639 | } |
| 640 | #endif |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 641 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 642 | goto badcmd; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 643 | |
| 644 | case SVGA_CMD_RECT_COPY: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 645 | len -= 7; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 646 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 647 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 648 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 649 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 650 | x = vmsvga_fifo_read(s); |
| 651 | y = vmsvga_fifo_read(s); |
| 652 | dx = vmsvga_fifo_read(s); |
| 653 | dy = vmsvga_fifo_read(s); |
| 654 | width = vmsvga_fifo_read(s); |
| 655 | height = vmsvga_fifo_read(s); |
| 656 | #ifdef HW_RECT_ACCEL |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 657 | if (vmsvga_copy_rect(s, x, y, dx, dy, width, height) == 0) { |
| 658 | break; |
| 659 | } |
| 660 | #endif |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 661 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 662 | goto badcmd; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 663 | |
| 664 | case SVGA_CMD_DEFINE_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 665 | len -= 8; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 666 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 667 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 668 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 669 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 670 | cursor.id = vmsvga_fifo_read(s); |
| 671 | cursor.hot_x = vmsvga_fifo_read(s); |
| 672 | cursor.hot_y = vmsvga_fifo_read(s); |
| 673 | cursor.width = x = vmsvga_fifo_read(s); |
| 674 | cursor.height = y = vmsvga_fifo_read(s); |
| 675 | vmsvga_fifo_read(s); |
| 676 | cursor.bpp = vmsvga_fifo_read(s); |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 677 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 678 | args = SVGA_BITMAP_SIZE(x, y) + SVGA_PIXMAP_SIZE(x, y, cursor.bpp); |
Prasad J Pandit | 167d97a | 2016-09-08 18:15:54 +0530 | [diff] [blame] | 679 | if (cursor.width > 256 |
| 680 | || cursor.height > 256 |
| 681 | || cursor.bpp > 32 |
| 682 | || SVGA_BITMAP_SIZE(x, y) |
| 683 | > sizeof(cursor.mask) / sizeof(cursor.mask[0]) |
| 684 | || SVGA_PIXMAP_SIZE(x, y, cursor.bpp) |
| 685 | > sizeof(cursor.image) / sizeof(cursor.image[0])) { |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 686 | goto badcmd; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 687 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 688 | |
| 689 | len -= args; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 690 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 691 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 692 | } |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 693 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 694 | for (args = 0; args < SVGA_BITMAP_SIZE(x, y); args++) { |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 695 | cursor.mask[args] = vmsvga_fifo_read_raw(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 696 | } |
| 697 | for (args = 0; args < SVGA_PIXMAP_SIZE(x, y, cursor.bpp); args++) { |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 698 | cursor.image[args] = vmsvga_fifo_read_raw(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 699 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 700 | #ifdef HW_MOUSE_ACCEL |
| 701 | vmsvga_cursor_define(s, &cursor); |
| 702 | break; |
| 703 | #else |
| 704 | args = 0; |
| 705 | goto badcmd; |
| 706 | #endif |
| 707 | |
| 708 | /* |
| 709 | * Other commands that we at least know the number of arguments |
| 710 | * for so we can avoid FIFO desync if driver uses them illegally. |
| 711 | */ |
| 712 | case SVGA_CMD_DEFINE_ALPHA_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 713 | len -= 6; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 714 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 715 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 716 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 717 | vmsvga_fifo_read(s); |
| 718 | vmsvga_fifo_read(s); |
| 719 | vmsvga_fifo_read(s); |
| 720 | x = vmsvga_fifo_read(s); |
| 721 | y = vmsvga_fifo_read(s); |
| 722 | args = x * y; |
| 723 | goto badcmd; |
| 724 | case SVGA_CMD_RECT_ROP_FILL: |
| 725 | args = 6; |
| 726 | goto badcmd; |
| 727 | case SVGA_CMD_RECT_ROP_COPY: |
| 728 | args = 7; |
| 729 | goto badcmd; |
| 730 | case SVGA_CMD_DRAW_GLYPH_CLIPPED: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 731 | len -= 4; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 732 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 733 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 734 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 735 | vmsvga_fifo_read(s); |
| 736 | vmsvga_fifo_read(s); |
| 737 | args = 7 + (vmsvga_fifo_read(s) >> 2); |
| 738 | goto badcmd; |
| 739 | case SVGA_CMD_SURFACE_ALPHA_BLEND: |
| 740 | args = 12; |
| 741 | goto badcmd; |
| 742 | |
| 743 | /* |
| 744 | * Other commands that are not listed as depending on any |
| 745 | * CAPABILITIES bits, but are not described in the README either. |
| 746 | */ |
| 747 | case SVGA_CMD_SURFACE_FILL: |
| 748 | case SVGA_CMD_SURFACE_COPY: |
| 749 | case SVGA_CMD_FRONT_ROP_FILL: |
| 750 | case SVGA_CMD_FENCE: |
| 751 | case SVGA_CMD_INVALID_CMD: |
| 752 | break; /* Nop */ |
| 753 | |
| 754 | default: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 755 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 756 | badcmd: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 757 | len -= args; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 758 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 759 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 760 | } |
| 761 | while (args--) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 762 | vmsvga_fifo_read(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 763 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 764 | printf("%s: Unknown command 0x%02x in SVGA command FIFO\n", |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 765 | __func__, cmd); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 766 | break; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 767 | |
| 768 | rewind: |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 769 | s->fifo_stop = cmd_start; |
| 770 | s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop); |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 771 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 772 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 773 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 774 | |
| 775 | s->syncing = 0; |
| 776 | } |
| 777 | |
| 778 | static uint32_t vmsvga_index_read(void *opaque, uint32_t address) |
| 779 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 780 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 781 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 782 | return s->index; |
| 783 | } |
| 784 | |
| 785 | static void vmsvga_index_write(void *opaque, uint32_t address, uint32_t index) |
| 786 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 787 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 788 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 789 | s->index = index; |
| 790 | } |
| 791 | |
| 792 | static uint32_t vmsvga_value_read(void *opaque, uint32_t address) |
| 793 | { |
| 794 | uint32_t caps; |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 795 | struct vmsvga_state_s *s = opaque; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 796 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 797 | PixelFormat pf; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 798 | uint32_t ret; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 799 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 800 | switch (s->index) { |
| 801 | case SVGA_REG_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 802 | ret = s->svgaid; |
| 803 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 804 | |
| 805 | case SVGA_REG_ENABLE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 806 | ret = s->enable; |
| 807 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 808 | |
| 809 | case SVGA_REG_WIDTH: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 810 | ret = s->new_width ? s->new_width : surface_width(surface); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 811 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 812 | |
| 813 | case SVGA_REG_HEIGHT: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 814 | ret = s->new_height ? s->new_height : surface_height(surface); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 815 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 816 | |
| 817 | case SVGA_REG_MAX_WIDTH: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 818 | ret = SVGA_MAX_WIDTH; |
| 819 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 820 | |
| 821 | case SVGA_REG_MAX_HEIGHT: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 822 | ret = SVGA_MAX_HEIGHT; |
| 823 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 824 | |
| 825 | case SVGA_REG_DEPTH: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 826 | ret = (s->new_depth == 32) ? 24 : s->new_depth; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 827 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 828 | |
| 829 | case SVGA_REG_BITS_PER_PIXEL: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 830 | case SVGA_REG_HOST_BITS_PER_PIXEL: |
| 831 | ret = s->new_depth; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 832 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 833 | |
| 834 | case SVGA_REG_PSEUDOCOLOR: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 835 | ret = 0x0; |
| 836 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 837 | |
| 838 | case SVGA_REG_RED_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 839 | pf = qemu_default_pixelformat(s->new_depth); |
| 840 | ret = pf.rmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 841 | break; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 842 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 843 | case SVGA_REG_GREEN_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 844 | pf = qemu_default_pixelformat(s->new_depth); |
| 845 | ret = pf.gmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 846 | break; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 847 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 848 | case SVGA_REG_BLUE_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 849 | pf = qemu_default_pixelformat(s->new_depth); |
| 850 | ret = pf.bmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 851 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 852 | |
| 853 | case SVGA_REG_BYTES_PER_LINE: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 854 | if (s->new_width) { |
| 855 | ret = (s->new_depth * s->new_width) / 8; |
| 856 | } else { |
| 857 | ret = surface_stride(surface); |
| 858 | } |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 859 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 860 | |
Avi Kivity | 7b619b9 | 2011-08-08 16:08:56 +0300 | [diff] [blame] | 861 | case SVGA_REG_FB_START: { |
| 862 | struct pci_vmsvga_state_s *pci_vmsvga |
| 863 | = container_of(s, struct pci_vmsvga_state_s, chip); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 864 | ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 1); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 865 | break; |
Avi Kivity | 7b619b9 | 2011-08-08 16:08:56 +0300 | [diff] [blame] | 866 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 867 | |
| 868 | case SVGA_REG_FB_OFFSET: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 869 | ret = 0x0; |
| 870 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 871 | |
| 872 | case SVGA_REG_VRAM_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 873 | ret = s->vga.vram_size; /* No physical VRAM besides the framebuffer */ |
| 874 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 875 | |
| 876 | case SVGA_REG_FB_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 877 | ret = s->vga.vram_size; |
| 878 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 879 | |
| 880 | case SVGA_REG_CAPABILITIES: |
| 881 | caps = SVGA_CAP_NONE; |
| 882 | #ifdef HW_RECT_ACCEL |
| 883 | caps |= SVGA_CAP_RECT_COPY; |
| 884 | #endif |
| 885 | #ifdef HW_FILL_ACCEL |
| 886 | caps |= SVGA_CAP_RECT_FILL; |
| 887 | #endif |
| 888 | #ifdef HW_MOUSE_ACCEL |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 889 | if (dpy_cursor_define_supported(s->vga.con)) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 890 | caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 | |
| 891 | SVGA_CAP_CURSOR_BYPASS; |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 892 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 893 | #endif |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 894 | ret = caps; |
| 895 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 896 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 897 | case SVGA_REG_MEM_START: { |
| 898 | struct pci_vmsvga_state_s *pci_vmsvga |
| 899 | = container_of(s, struct pci_vmsvga_state_s, chip); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 900 | ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 2); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 901 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 902 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 903 | |
| 904 | case SVGA_REG_MEM_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 905 | ret = s->fifo_size; |
| 906 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 907 | |
| 908 | case SVGA_REG_CONFIG_DONE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 909 | ret = s->config; |
| 910 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 911 | |
| 912 | case SVGA_REG_SYNC: |
| 913 | case SVGA_REG_BUSY: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 914 | ret = s->syncing; |
| 915 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 916 | |
| 917 | case SVGA_REG_GUEST_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 918 | ret = s->guest; |
| 919 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 920 | |
| 921 | case SVGA_REG_CURSOR_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 922 | ret = s->cursor.id; |
| 923 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 924 | |
| 925 | case SVGA_REG_CURSOR_X: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 926 | ret = s->cursor.x; |
| 927 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 928 | |
| 929 | case SVGA_REG_CURSOR_Y: |
Nicolas Owens | e2bb4ae | 2014-06-08 22:19:17 -0700 | [diff] [blame] | 930 | ret = s->cursor.y; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 931 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 932 | |
| 933 | case SVGA_REG_CURSOR_ON: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 934 | ret = s->cursor.on; |
| 935 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 936 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 937 | case SVGA_REG_SCRATCH_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 938 | ret = s->scratch_size; |
| 939 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 940 | |
| 941 | case SVGA_REG_MEM_REGS: |
| 942 | case SVGA_REG_NUM_DISPLAYS: |
| 943 | case SVGA_REG_PITCHLOCK: |
| 944 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 945 | ret = 0; |
| 946 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 947 | |
| 948 | default: |
| 949 | if (s->index >= SVGA_SCRATCH_BASE && |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 950 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) { |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 951 | ret = s->scratch[s->index - SVGA_SCRATCH_BASE]; |
| 952 | break; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 953 | } |
| 954 | printf("%s: Bad register %02x\n", __func__, s->index); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 955 | ret = 0; |
| 956 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 957 | } |
| 958 | |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 959 | if (s->index >= SVGA_SCRATCH_BASE) { |
| 960 | trace_vmware_scratch_read(s->index, ret); |
| 961 | } else if (s->index >= SVGA_PALETTE_BASE) { |
| 962 | trace_vmware_palette_read(s->index, ret); |
| 963 | } else { |
| 964 | trace_vmware_value_read(s->index, ret); |
| 965 | } |
| 966 | return ret; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 967 | } |
| 968 | |
| 969 | static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) |
| 970 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 971 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 972 | |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 973 | if (s->index >= SVGA_SCRATCH_BASE) { |
| 974 | trace_vmware_scratch_write(s->index, value); |
| 975 | } else if (s->index >= SVGA_PALETTE_BASE) { |
| 976 | trace_vmware_palette_write(s->index, value); |
| 977 | } else { |
| 978 | trace_vmware_value_write(s->index, value); |
| 979 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 980 | switch (s->index) { |
| 981 | case SVGA_REG_ID: |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 982 | if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 983 | s->svgaid = value; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 984 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 985 | break; |
| 986 | |
| 987 | case SVGA_REG_ENABLE: |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 988 | s->enable = !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 989 | s->invalidated = 1; |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 990 | s->vga.hw_ops->invalidate(&s->vga); |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 991 | if (s->enable && s->config) { |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 992 | vga_dirty_log_stop(&s->vga); |
| 993 | } else { |
| 994 | vga_dirty_log_start(&s->vga); |
| 995 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 996 | break; |
| 997 | |
| 998 | case SVGA_REG_WIDTH: |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 999 | if (value <= SVGA_MAX_WIDTH) { |
| 1000 | s->new_width = value; |
| 1001 | s->invalidated = 1; |
| 1002 | } else { |
| 1003 | printf("%s: Bad width: %i\n", __func__, value); |
| 1004 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1005 | break; |
| 1006 | |
| 1007 | case SVGA_REG_HEIGHT: |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1008 | if (value <= SVGA_MAX_HEIGHT) { |
| 1009 | s->new_height = value; |
| 1010 | s->invalidated = 1; |
| 1011 | } else { |
| 1012 | printf("%s: Bad height: %i\n", __func__, value); |
| 1013 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1014 | break; |
| 1015 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1016 | case SVGA_REG_BITS_PER_PIXEL: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1017 | if (value != 32) { |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1018 | printf("%s: Bad bits per pixel: %i bits\n", __func__, value); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1019 | s->config = 0; |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1020 | s->invalidated = 1; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1021 | } |
| 1022 | break; |
| 1023 | |
| 1024 | case SVGA_REG_CONFIG_DONE: |
| 1025 | if (value) { |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1026 | s->fifo = (uint32_t *) s->fifo_ptr; |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1027 | vga_dirty_log_stop(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1028 | } |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 1029 | s->config = !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1030 | break; |
| 1031 | |
| 1032 | case SVGA_REG_SYNC: |
| 1033 | s->syncing = 1; |
| 1034 | vmsvga_fifo_run(s); /* Or should we just wait for update_display? */ |
| 1035 | break; |
| 1036 | |
| 1037 | case SVGA_REG_GUEST_ID: |
| 1038 | s->guest = value; |
| 1039 | #ifdef VERBOSE |
| 1040 | if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE + |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1041 | ARRAY_SIZE(vmsvga_guest_id)) { |
| 1042 | printf("%s: guest runs %s.\n", __func__, |
| 1043 | vmsvga_guest_id[value - GUEST_OS_BASE]); |
| 1044 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1045 | #endif |
| 1046 | break; |
| 1047 | |
| 1048 | case SVGA_REG_CURSOR_ID: |
| 1049 | s->cursor.id = value; |
| 1050 | break; |
| 1051 | |
| 1052 | case SVGA_REG_CURSOR_X: |
| 1053 | s->cursor.x = value; |
| 1054 | break; |
| 1055 | |
| 1056 | case SVGA_REG_CURSOR_Y: |
| 1057 | s->cursor.y = value; |
| 1058 | break; |
| 1059 | |
| 1060 | case SVGA_REG_CURSOR_ON: |
| 1061 | s->cursor.on |= (value == SVGA_CURSOR_ON_SHOW); |
| 1062 | s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); |
| 1063 | #ifdef HW_MOUSE_ACCEL |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 1064 | if (value <= SVGA_CURSOR_ON_SHOW) { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1065 | dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 1066 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1067 | #endif |
| 1068 | break; |
| 1069 | |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1070 | case SVGA_REG_DEPTH: |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1071 | case SVGA_REG_MEM_REGS: |
| 1072 | case SVGA_REG_NUM_DISPLAYS: |
| 1073 | case SVGA_REG_PITCHLOCK: |
| 1074 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
| 1075 | break; |
| 1076 | |
| 1077 | default: |
| 1078 | if (s->index >= SVGA_SCRATCH_BASE && |
| 1079 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) { |
| 1080 | s->scratch[s->index - SVGA_SCRATCH_BASE] = value; |
| 1081 | break; |
| 1082 | } |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1083 | printf("%s: Bad register %02x\n", __func__, s->index); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1084 | } |
| 1085 | } |
| 1086 | |
| 1087 | static uint32_t vmsvga_bios_read(void *opaque, uint32_t address) |
| 1088 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1089 | printf("%s: what are we supposed to return?\n", __func__); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1090 | return 0xcafe; |
| 1091 | } |
| 1092 | |
| 1093 | static void vmsvga_bios_write(void *opaque, uint32_t address, uint32_t data) |
| 1094 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1095 | printf("%s: what are we supposed to do with (%08x)?\n", __func__, data); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1096 | } |
| 1097 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1098 | static inline void vmsvga_check_size(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1099 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1100 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
| 1101 | |
| 1102 | if (s->new_width != surface_width(surface) || |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1103 | s->new_height != surface_height(surface) || |
| 1104 | s->new_depth != surface_bits_per_pixel(surface)) { |
| 1105 | int stride = (s->new_depth * s->new_width) / 8; |
Gerd Hoffmann | 30f1e66 | 2014-06-18 11:03:15 +0200 | [diff] [blame] | 1106 | pixman_format_code_t format = |
| 1107 | qemu_default_pixman_format(s->new_depth, true); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1108 | trace_vmware_setmode(s->new_width, s->new_height, s->new_depth); |
| 1109 | surface = qemu_create_displaysurface_from(s->new_width, s->new_height, |
Gerd Hoffmann | 30f1e66 | 2014-06-18 11:03:15 +0200 | [diff] [blame] | 1110 | format, stride, |
| 1111 | s->vga.vram_ptr); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1112 | dpy_gfx_replace_surface(s->vga.con, surface); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1113 | s->invalidated = 1; |
| 1114 | } |
| 1115 | } |
| 1116 | |
| 1117 | static void vmsvga_update_display(void *opaque) |
| 1118 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1119 | struct vmsvga_state_s *s = opaque; |
Igor Mitsyanko | 17866fc | 2013-03-19 23:44:56 +0400 | [diff] [blame] | 1120 | DisplaySurface *surface; |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1121 | bool dirty = false; |
| 1122 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1123 | if (!s->enable) { |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1124 | s->vga.hw_ops->gfx_update(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1125 | return; |
| 1126 | } |
| 1127 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1128 | vmsvga_check_size(s); |
Igor Mitsyanko | 17866fc | 2013-03-19 23:44:56 +0400 | [diff] [blame] | 1129 | surface = qemu_console_surface(s->vga.con); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1130 | |
| 1131 | vmsvga_fifo_run(s); |
| 1132 | vmsvga_update_rect_flush(s); |
| 1133 | |
| 1134 | /* |
| 1135 | * Is it more efficient to look at vram VGA-dirty bits or wait |
| 1136 | * for the driver to issue SVGA_CMD_UPDATE? |
| 1137 | */ |
Paolo Bonzini | 2d1a35b | 2015-03-23 10:50:57 +0100 | [diff] [blame] | 1138 | if (memory_region_is_logging(&s->vga.vram, DIRTY_MEMORY_VGA)) { |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1139 | vga_sync_dirty_bitmap(&s->vga); |
| 1140 | dirty = memory_region_get_dirty(&s->vga.vram, 0, |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1141 | surface_stride(surface) * surface_height(surface), |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1142 | DIRTY_MEMORY_VGA); |
| 1143 | } |
| 1144 | if (s->invalidated || dirty) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1145 | s->invalidated = 0; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1146 | dpy_gfx_update(s->vga.con, 0, 0, |
| 1147 | surface_width(surface), surface_height(surface)); |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1148 | } |
| 1149 | if (dirty) { |
| 1150 | memory_region_reset_dirty(&s->vga.vram, 0, |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1151 | surface_stride(surface) * surface_height(surface), |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1152 | DIRTY_MEMORY_VGA); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1153 | } |
| 1154 | } |
| 1155 | |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 1156 | static void vmsvga_reset(DeviceState *dev) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1157 | { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1158 | struct pci_vmsvga_state_s *pci = VMWARE_SVGA(dev); |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 1159 | struct vmsvga_state_s *s = &pci->chip; |
| 1160 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1161 | s->index = 0; |
| 1162 | s->enable = 0; |
| 1163 | s->config = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1164 | s->svgaid = SVGA_ID; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1165 | s->cursor.on = 0; |
| 1166 | s->redraw_fifo_first = 0; |
| 1167 | s->redraw_fifo_last = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1168 | s->syncing = 0; |
Anthony Liguori | b5cc6e3 | 2009-12-18 08:08:10 +1000 | [diff] [blame] | 1169 | |
| 1170 | vga_dirty_log_start(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1171 | } |
| 1172 | |
| 1173 | static void vmsvga_invalidate_display(void *opaque) |
| 1174 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1175 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1176 | if (!s->enable) { |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1177 | s->vga.hw_ops->invalidate(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1178 | return; |
| 1179 | } |
| 1180 | |
| 1181 | s->invalidated = 1; |
| 1182 | } |
| 1183 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1184 | static void vmsvga_text_update(void *opaque, console_ch_t *chardata) |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1185 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1186 | struct vmsvga_state_s *s = opaque; |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1187 | |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1188 | if (s->vga.hw_ops->text_update) { |
| 1189 | s->vga.hw_ops->text_update(&s->vga, chardata); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1190 | } |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1191 | } |
| 1192 | |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1193 | static int vmsvga_post_load(void *opaque, int version_id) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1194 | { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1195 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1196 | |
| 1197 | s->invalidated = 1; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1198 | if (s->config) { |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1199 | s->fifo = (uint32_t *) s->fifo_ptr; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1200 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1201 | return 0; |
| 1202 | } |
| 1203 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1204 | static const VMStateDescription vmstate_vmware_vga_internal = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1205 | .name = "vmware_vga_internal", |
| 1206 | .version_id = 0, |
| 1207 | .minimum_version_id = 0, |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1208 | .post_load = vmsvga_post_load, |
Juan Quintela | d49805a | 2014-04-16 15:32:32 +0200 | [diff] [blame] | 1209 | .fields = (VMStateField[]) { |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1210 | VMSTATE_INT32_EQUAL(new_depth, struct vmsvga_state_s), |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1211 | VMSTATE_INT32(enable, struct vmsvga_state_s), |
| 1212 | VMSTATE_INT32(config, struct vmsvga_state_s), |
| 1213 | VMSTATE_INT32(cursor.id, struct vmsvga_state_s), |
| 1214 | VMSTATE_INT32(cursor.x, struct vmsvga_state_s), |
| 1215 | VMSTATE_INT32(cursor.y, struct vmsvga_state_s), |
| 1216 | VMSTATE_INT32(cursor.on, struct vmsvga_state_s), |
| 1217 | VMSTATE_INT32(index, struct vmsvga_state_s), |
| 1218 | VMSTATE_VARRAY_INT32(scratch, struct vmsvga_state_s, |
| 1219 | scratch_size, 0, vmstate_info_uint32, uint32_t), |
| 1220 | VMSTATE_INT32(new_width, struct vmsvga_state_s), |
| 1221 | VMSTATE_INT32(new_height, struct vmsvga_state_s), |
| 1222 | VMSTATE_UINT32(guest, struct vmsvga_state_s), |
| 1223 | VMSTATE_UINT32(svgaid, struct vmsvga_state_s), |
| 1224 | VMSTATE_INT32(syncing, struct vmsvga_state_s), |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1225 | VMSTATE_UNUSED(4), /* was fb_size */ |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1226 | VMSTATE_END_OF_LIST() |
| 1227 | } |
| 1228 | }; |
| 1229 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1230 | static const VMStateDescription vmstate_vmware_vga = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1231 | .name = "vmware_vga", |
| 1232 | .version_id = 0, |
| 1233 | .minimum_version_id = 0, |
Juan Quintela | d49805a | 2014-04-16 15:32:32 +0200 | [diff] [blame] | 1234 | .fields = (VMStateField[]) { |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1235 | VMSTATE_PCI_DEVICE(parent_obj, struct pci_vmsvga_state_s), |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1236 | VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0, |
| 1237 | vmstate_vmware_vga_internal, struct vmsvga_state_s), |
| 1238 | VMSTATE_END_OF_LIST() |
| 1239 | } |
| 1240 | }; |
| 1241 | |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1242 | static const GraphicHwOps vmsvga_ops = { |
| 1243 | .invalidate = vmsvga_invalidate_display, |
| 1244 | .gfx_update = vmsvga_update_display, |
| 1245 | .text_update = vmsvga_text_update, |
| 1246 | }; |
| 1247 | |
Gerd Hoffmann | aa2beaa | 2013-04-17 10:21:27 +0200 | [diff] [blame] | 1248 | static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, |
Richard Henderson | 0a039dc | 2011-08-16 08:27:39 -0700 | [diff] [blame] | 1249 | MemoryRegion *address_space, MemoryRegion *io) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1250 | { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1251 | s->scratch_size = SVGA_SCRATCH_SIZE; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1252 | s->scratch = g_malloc(s->scratch_size * 4); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1253 | |
Gerd Hoffmann | 5643706 | 2014-01-24 15:35:21 +0100 | [diff] [blame] | 1254 | s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); |
Andrzej Zaborowski | 4445b0a | 2009-08-23 19:00:58 +0200 | [diff] [blame] | 1255 | |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1256 | s->fifo_size = SVGA_FIFO_SIZE; |
Hu Tao | 4994653 | 2014-09-09 13:27:55 +0800 | [diff] [blame] | 1257 | memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, |
Markus Armbruster | f8ed85a | 2015-09-11 16:51:43 +0200 | [diff] [blame] | 1258 | &error_fatal); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1259 | vmstate_register_ram_global(&s->fifo_ram); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1260 | s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1261 | |
Gerd Hoffmann | e2bbfc8 | 2013-10-11 19:56:59 +0200 | [diff] [blame] | 1262 | vga_common_init(&s->vga, OBJECT(dev), true); |
Paolo Bonzini | 712f0cc | 2013-06-06 21:21:13 -0400 | [diff] [blame] | 1263 | vga_init(&s->vga, OBJECT(dev), address_space, io, true); |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 1264 | vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1265 | s->new_depth = 32; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1266 | } |
| 1267 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1268 | static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, unsigned size) |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1269 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1270 | struct vmsvga_state_s *s = opaque; |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1271 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1272 | switch (addr) { |
| 1273 | case SVGA_IO_MUL * SVGA_INDEX_PORT: return vmsvga_index_read(s, addr); |
| 1274 | case SVGA_IO_MUL * SVGA_VALUE_PORT: return vmsvga_value_read(s, addr); |
| 1275 | case SVGA_IO_MUL * SVGA_BIOS_PORT: return vmsvga_bios_read(s, addr); |
| 1276 | default: return -1u; |
| 1277 | } |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1278 | } |
| 1279 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1280 | static void vmsvga_io_write(void *opaque, hwaddr addr, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1281 | uint64_t data, unsigned size) |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1282 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1283 | struct vmsvga_state_s *s = opaque; |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1284 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1285 | switch (addr) { |
| 1286 | case SVGA_IO_MUL * SVGA_INDEX_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1287 | vmsvga_index_write(s, addr, data); |
| 1288 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1289 | case SVGA_IO_MUL * SVGA_VALUE_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1290 | vmsvga_value_write(s, addr, data); |
| 1291 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1292 | case SVGA_IO_MUL * SVGA_BIOS_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1293 | vmsvga_bios_write(s, addr, data); |
| 1294 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1295 | } |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1296 | } |
| 1297 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1298 | static const MemoryRegionOps vmsvga_io_ops = { |
| 1299 | .read = vmsvga_io_read, |
| 1300 | .write = vmsvga_io_write, |
| 1301 | .endianness = DEVICE_LITTLE_ENDIAN, |
| 1302 | .valid = { |
| 1303 | .min_access_size = 4, |
| 1304 | .max_access_size = 4, |
Jan Kiszka | 04e8cd5 | 2013-06-22 08:07:02 +0200 | [diff] [blame] | 1305 | .unaligned = true, |
| 1306 | }, |
| 1307 | .impl = { |
| 1308 | .unaligned = true, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1309 | }, |
| 1310 | }; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1311 | |
Markus Armbruster | 9af21db | 2015-01-19 15:52:30 +0100 | [diff] [blame] | 1312 | static void pci_vmsvga_realize(PCIDevice *dev, Error **errp) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1313 | { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1314 | struct pci_vmsvga_state_s *s = VMWARE_SVGA(dev); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1315 | |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1316 | dev->config[PCI_CACHE_LINE_SIZE] = 0x08; |
| 1317 | dev->config[PCI_LATENCY_TIMER] = 0x40; |
| 1318 | dev->config[PCI_INTERRUPT_LINE] = 0xff; /* End */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1319 | |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1320 | memory_region_init_io(&s->io_bar, NULL, &vmsvga_io_ops, &s->chip, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1321 | "vmsvga-io", 0x10); |
Jan Kiszka | bd8f2f5 | 2012-08-23 13:02:33 +0200 | [diff] [blame] | 1322 | memory_region_set_flush_coalesced(&s->io_bar); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1323 | pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1324 | |
Gerd Hoffmann | aa2beaa | 2013-04-17 10:21:27 +0200 | [diff] [blame] | 1325 | vmsvga_init(DEVICE(dev), &s->chip, |
| 1326 | pci_address_space(dev), pci_address_space_io(dev)); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1327 | |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1328 | pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1329 | &s->chip.vga.vram); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1330 | pci_register_bar(dev, 2, PCI_BASE_ADDRESS_MEM_PREFETCH, |
Avi Kivity | e824b2c | 2011-08-08 16:09:31 +0300 | [diff] [blame] | 1331 | &s->chip.fifo_ram); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1332 | |
Gerd Hoffmann | 281a26b | 2010-11-17 12:06:44 +0100 | [diff] [blame] | 1333 | if (!dev->rom_bar) { |
| 1334 | /* compatibility with pc-0.13 and older */ |
Paolo Bonzini | 8311832 | 2013-06-06 21:21:13 -0400 | [diff] [blame] | 1335 | vga_init_vbe(&s->chip.vga, OBJECT(dev), pci_address_space(dev)); |
Gerd Hoffmann | 281a26b | 2010-11-17 12:06:44 +0100 | [diff] [blame] | 1336 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1337 | } |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1338 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1339 | static Property vga_vmware_properties[] = { |
| 1340 | DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s, |
Gerd Hoffmann | 9e56edc | 2012-06-11 10:42:53 +0200 | [diff] [blame] | 1341 | chip.vga.vram_size_mb, 16), |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1342 | DEFINE_PROP_END_OF_LIST(), |
| 1343 | }; |
| 1344 | |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1345 | static void vmsvga_class_init(ObjectClass *klass, void *data) |
| 1346 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1347 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1348 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
Isaku Yamahata | 310faae | 2011-05-25 10:58:04 +0900 | [diff] [blame] | 1349 | |
Markus Armbruster | 9af21db | 2015-01-19 15:52:30 +0100 | [diff] [blame] | 1350 | k->realize = pci_vmsvga_realize; |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1351 | k->romfile = "vgabios-vmware.bin"; |
| 1352 | k->vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1353 | k->device_id = SVGA_PCI_DEVICE_ID; |
| 1354 | k->class_id = PCI_CLASS_DISPLAY_VGA; |
| 1355 | k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1356 | k->subsystem_id = SVGA_PCI_DEVICE_ID; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1357 | dc->reset = vmsvga_reset; |
| 1358 | dc->vmsd = &vmstate_vmware_vga; |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1359 | dc->props = vga_vmware_properties; |
Igor Mammedov | 2897ae0 | 2014-02-05 16:36:48 +0100 | [diff] [blame] | 1360 | dc->hotpluggable = false; |
Marcel Apfelbaum | 125ee0e | 2013-07-29 17:17:45 +0300 | [diff] [blame] | 1361 | set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1362 | } |
| 1363 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 1364 | static const TypeInfo vmsvga_info = { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1365 | .name = TYPE_VMWARE_SVGA, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1366 | .parent = TYPE_PCI_DEVICE, |
| 1367 | .instance_size = sizeof(struct pci_vmsvga_state_s), |
| 1368 | .class_init = vmsvga_class_init, |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1369 | }; |
| 1370 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1371 | static void vmsvga_register_types(void) |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1372 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1373 | type_register_static(&vmsvga_info); |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1374 | } |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1375 | |
| 1376 | type_init(vmsvga_register_types) |