ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU VMware-SVGA "chipset". |
| 3 | * |
| 4 | * Copyright (c) 2007 Andrzej Zaborowski <balrog@zabor.org> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 24 | #include "hw.h" |
Dave Airlie | b3c3f12 | 2009-12-11 15:47:44 +1000 | [diff] [blame] | 25 | #include "loader.h" |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 26 | #include "console.h" |
| 27 | #include "pci.h" |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 28 | |
Jan Kiszka | ca0508d | 2011-08-22 19:12:09 +0200 | [diff] [blame] | 29 | #undef VERBOSE |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 30 | #define HW_RECT_ACCEL |
| 31 | #define HW_FILL_ACCEL |
| 32 | #define HW_MOUSE_ACCEL |
| 33 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 34 | # include "vga_int.h" |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 35 | |
| 36 | struct vmsvga_state_s { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 37 | VGACommonState vga; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 38 | |
| 39 | int width; |
| 40 | int height; |
| 41 | int invalidated; |
| 42 | int depth; |
| 43 | int bypp; |
| 44 | int enable; |
| 45 | int config; |
| 46 | struct { |
| 47 | int id; |
| 48 | int x; |
| 49 | int y; |
| 50 | int on; |
| 51 | } cursor; |
| 52 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 53 | int index; |
| 54 | int scratch_size; |
| 55 | uint32_t *scratch; |
| 56 | int new_width; |
| 57 | int new_height; |
| 58 | uint32_t guest; |
| 59 | uint32_t svgaid; |
| 60 | uint32_t wred; |
| 61 | uint32_t wgreen; |
| 62 | uint32_t wblue; |
| 63 | int syncing; |
| 64 | int fb_size; |
| 65 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 66 | MemoryRegion fifo_ram; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 67 | uint8_t *fifo_ptr; |
| 68 | unsigned int fifo_size; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 69 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 70 | union { |
| 71 | uint32_t *fifo; |
Stefan Weil | 541dc0d | 2011-08-31 12:38:01 +0200 | [diff] [blame] | 72 | struct QEMU_PACKED { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 73 | uint32_t min; |
| 74 | uint32_t max; |
| 75 | uint32_t next_cmd; |
| 76 | uint32_t stop; |
| 77 | /* Add registers here when adding capabilities. */ |
| 78 | uint32_t fifo[0]; |
| 79 | } *cmd; |
| 80 | }; |
| 81 | |
| 82 | #define REDRAW_FIFO_LEN 512 |
| 83 | struct vmsvga_rect_s { |
| 84 | int x, y, w, h; |
| 85 | } redraw_fifo[REDRAW_FIFO_LEN]; |
| 86 | int redraw_fifo_first, redraw_fifo_last; |
| 87 | }; |
| 88 | |
| 89 | struct pci_vmsvga_state_s { |
| 90 | PCIDevice card; |
| 91 | struct vmsvga_state_s chip; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 92 | MemoryRegion io_bar; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | #define SVGA_MAGIC 0x900000UL |
| 96 | #define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver)) |
| 97 | #define SVGA_ID_0 SVGA_MAKE_ID(0) |
| 98 | #define SVGA_ID_1 SVGA_MAKE_ID(1) |
| 99 | #define SVGA_ID_2 SVGA_MAKE_ID(2) |
| 100 | |
| 101 | #define SVGA_LEGACY_BASE_PORT 0x4560 |
| 102 | #define SVGA_INDEX_PORT 0x0 |
| 103 | #define SVGA_VALUE_PORT 0x1 |
| 104 | #define SVGA_BIOS_PORT 0x2 |
| 105 | |
| 106 | #define SVGA_VERSION_2 |
| 107 | |
| 108 | #ifdef SVGA_VERSION_2 |
| 109 | # define SVGA_ID SVGA_ID_2 |
| 110 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 111 | # define SVGA_IO_MUL 1 |
| 112 | # define SVGA_FIFO_SIZE 0x10000 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 113 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA2 |
| 114 | #else |
| 115 | # define SVGA_ID SVGA_ID_1 |
| 116 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 117 | # define SVGA_IO_MUL 4 |
| 118 | # define SVGA_FIFO_SIZE 0x10000 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 119 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA |
| 120 | #endif |
| 121 | |
| 122 | enum { |
| 123 | /* ID 0, 1 and 2 registers */ |
| 124 | SVGA_REG_ID = 0, |
| 125 | SVGA_REG_ENABLE = 1, |
| 126 | SVGA_REG_WIDTH = 2, |
| 127 | SVGA_REG_HEIGHT = 3, |
| 128 | SVGA_REG_MAX_WIDTH = 4, |
| 129 | SVGA_REG_MAX_HEIGHT = 5, |
| 130 | SVGA_REG_DEPTH = 6, |
| 131 | SVGA_REG_BITS_PER_PIXEL = 7, /* Current bpp in the guest */ |
| 132 | SVGA_REG_PSEUDOCOLOR = 8, |
| 133 | SVGA_REG_RED_MASK = 9, |
| 134 | SVGA_REG_GREEN_MASK = 10, |
| 135 | SVGA_REG_BLUE_MASK = 11, |
| 136 | SVGA_REG_BYTES_PER_LINE = 12, |
| 137 | SVGA_REG_FB_START = 13, |
| 138 | SVGA_REG_FB_OFFSET = 14, |
| 139 | SVGA_REG_VRAM_SIZE = 15, |
| 140 | SVGA_REG_FB_SIZE = 16, |
| 141 | |
| 142 | /* ID 1 and 2 registers */ |
| 143 | SVGA_REG_CAPABILITIES = 17, |
| 144 | SVGA_REG_MEM_START = 18, /* Memory for command FIFO */ |
| 145 | SVGA_REG_MEM_SIZE = 19, |
| 146 | SVGA_REG_CONFIG_DONE = 20, /* Set when memory area configured */ |
| 147 | SVGA_REG_SYNC = 21, /* Write to force synchronization */ |
| 148 | SVGA_REG_BUSY = 22, /* Read to check if sync is done */ |
| 149 | SVGA_REG_GUEST_ID = 23, /* Set guest OS identifier */ |
| 150 | SVGA_REG_CURSOR_ID = 24, /* ID of cursor */ |
| 151 | SVGA_REG_CURSOR_X = 25, /* Set cursor X position */ |
| 152 | SVGA_REG_CURSOR_Y = 26, /* Set cursor Y position */ |
| 153 | SVGA_REG_CURSOR_ON = 27, /* Turn cursor on/off */ |
| 154 | SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* Current bpp in the host */ |
| 155 | SVGA_REG_SCRATCH_SIZE = 29, /* Number of scratch registers */ |
| 156 | SVGA_REG_MEM_REGS = 30, /* Number of FIFO registers */ |
| 157 | SVGA_REG_NUM_DISPLAYS = 31, /* Number of guest displays */ |
| 158 | SVGA_REG_PITCHLOCK = 32, /* Fixed pitch for all modes */ |
| 159 | |
| 160 | SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */ |
| 161 | SVGA_PALETTE_END = SVGA_PALETTE_BASE + 767, |
| 162 | SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + 768, |
| 163 | }; |
| 164 | |
| 165 | #define SVGA_CAP_NONE 0 |
| 166 | #define SVGA_CAP_RECT_FILL (1 << 0) |
| 167 | #define SVGA_CAP_RECT_COPY (1 << 1) |
| 168 | #define SVGA_CAP_RECT_PAT_FILL (1 << 2) |
| 169 | #define SVGA_CAP_LEGACY_OFFSCREEN (1 << 3) |
| 170 | #define SVGA_CAP_RASTER_OP (1 << 4) |
| 171 | #define SVGA_CAP_CURSOR (1 << 5) |
| 172 | #define SVGA_CAP_CURSOR_BYPASS (1 << 6) |
| 173 | #define SVGA_CAP_CURSOR_BYPASS_2 (1 << 7) |
| 174 | #define SVGA_CAP_8BIT_EMULATION (1 << 8) |
| 175 | #define SVGA_CAP_ALPHA_CURSOR (1 << 9) |
| 176 | #define SVGA_CAP_GLYPH (1 << 10) |
| 177 | #define SVGA_CAP_GLYPH_CLIPPING (1 << 11) |
| 178 | #define SVGA_CAP_OFFSCREEN_1 (1 << 12) |
| 179 | #define SVGA_CAP_ALPHA_BLEND (1 << 13) |
| 180 | #define SVGA_CAP_3D (1 << 14) |
| 181 | #define SVGA_CAP_EXTENDED_FIFO (1 << 15) |
| 182 | #define SVGA_CAP_MULTIMON (1 << 16) |
| 183 | #define SVGA_CAP_PITCHLOCK (1 << 17) |
| 184 | |
| 185 | /* |
| 186 | * FIFO offsets (seen as an array of 32-bit words) |
| 187 | */ |
| 188 | enum { |
| 189 | /* |
| 190 | * The original defined FIFO offsets |
| 191 | */ |
| 192 | SVGA_FIFO_MIN = 0, |
| 193 | SVGA_FIFO_MAX, /* The distance from MIN to MAX must be at least 10K */ |
| 194 | SVGA_FIFO_NEXT_CMD, |
| 195 | SVGA_FIFO_STOP, |
| 196 | |
| 197 | /* |
| 198 | * Additional offsets added as of SVGA_CAP_EXTENDED_FIFO |
| 199 | */ |
| 200 | SVGA_FIFO_CAPABILITIES = 4, |
| 201 | SVGA_FIFO_FLAGS, |
| 202 | SVGA_FIFO_FENCE, |
| 203 | SVGA_FIFO_3D_HWVERSION, |
| 204 | SVGA_FIFO_PITCHLOCK, |
| 205 | }; |
| 206 | |
| 207 | #define SVGA_FIFO_CAP_NONE 0 |
| 208 | #define SVGA_FIFO_CAP_FENCE (1 << 0) |
| 209 | #define SVGA_FIFO_CAP_ACCELFRONT (1 << 1) |
| 210 | #define SVGA_FIFO_CAP_PITCHLOCK (1 << 2) |
| 211 | |
| 212 | #define SVGA_FIFO_FLAG_NONE 0 |
| 213 | #define SVGA_FIFO_FLAG_ACCELFRONT (1 << 0) |
| 214 | |
| 215 | /* These values can probably be changed arbitrarily. */ |
| 216 | #define SVGA_SCRATCH_SIZE 0x8000 |
| 217 | #define SVGA_MAX_WIDTH 2360 |
| 218 | #define SVGA_MAX_HEIGHT 1770 |
| 219 | |
| 220 | #ifdef VERBOSE |
| 221 | # define GUEST_OS_BASE 0x5001 |
| 222 | static const char *vmsvga_guest_id[] = { |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 223 | [0x00] = "Dos", |
| 224 | [0x01] = "Windows 3.1", |
| 225 | [0x02] = "Windows 95", |
| 226 | [0x03] = "Windows 98", |
| 227 | [0x04] = "Windows ME", |
| 228 | [0x05] = "Windows NT", |
| 229 | [0x06] = "Windows 2000", |
| 230 | [0x07] = "Linux", |
| 231 | [0x08] = "OS/2", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 232 | [0x09] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 233 | [0x0a] = "BSD", |
| 234 | [0x0b] = "Whistler", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 235 | [0x0c] = "an unknown OS", |
| 236 | [0x0d] = "an unknown OS", |
| 237 | [0x0e] = "an unknown OS", |
| 238 | [0x0f] = "an unknown OS", |
| 239 | [0x10] = "an unknown OS", |
| 240 | [0x11] = "an unknown OS", |
| 241 | [0x12] = "an unknown OS", |
| 242 | [0x13] = "an unknown OS", |
| 243 | [0x14] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 244 | [0x15] = "Windows 2003", |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 245 | }; |
| 246 | #endif |
| 247 | |
| 248 | enum { |
| 249 | SVGA_CMD_INVALID_CMD = 0, |
| 250 | SVGA_CMD_UPDATE = 1, |
| 251 | SVGA_CMD_RECT_FILL = 2, |
| 252 | SVGA_CMD_RECT_COPY = 3, |
| 253 | SVGA_CMD_DEFINE_BITMAP = 4, |
| 254 | SVGA_CMD_DEFINE_BITMAP_SCANLINE = 5, |
| 255 | SVGA_CMD_DEFINE_PIXMAP = 6, |
| 256 | SVGA_CMD_DEFINE_PIXMAP_SCANLINE = 7, |
| 257 | SVGA_CMD_RECT_BITMAP_FILL = 8, |
| 258 | SVGA_CMD_RECT_PIXMAP_FILL = 9, |
| 259 | SVGA_CMD_RECT_BITMAP_COPY = 10, |
| 260 | SVGA_CMD_RECT_PIXMAP_COPY = 11, |
| 261 | SVGA_CMD_FREE_OBJECT = 12, |
| 262 | SVGA_CMD_RECT_ROP_FILL = 13, |
| 263 | SVGA_CMD_RECT_ROP_COPY = 14, |
| 264 | SVGA_CMD_RECT_ROP_BITMAP_FILL = 15, |
| 265 | SVGA_CMD_RECT_ROP_PIXMAP_FILL = 16, |
| 266 | SVGA_CMD_RECT_ROP_BITMAP_COPY = 17, |
| 267 | SVGA_CMD_RECT_ROP_PIXMAP_COPY = 18, |
| 268 | SVGA_CMD_DEFINE_CURSOR = 19, |
| 269 | SVGA_CMD_DISPLAY_CURSOR = 20, |
| 270 | SVGA_CMD_MOVE_CURSOR = 21, |
| 271 | SVGA_CMD_DEFINE_ALPHA_CURSOR = 22, |
| 272 | SVGA_CMD_DRAW_GLYPH = 23, |
| 273 | SVGA_CMD_DRAW_GLYPH_CLIPPED = 24, |
| 274 | SVGA_CMD_UPDATE_VERBOSE = 25, |
| 275 | SVGA_CMD_SURFACE_FILL = 26, |
| 276 | SVGA_CMD_SURFACE_COPY = 27, |
| 277 | SVGA_CMD_SURFACE_ALPHA_BLEND = 28, |
| 278 | SVGA_CMD_FRONT_ROP_FILL = 29, |
| 279 | SVGA_CMD_FENCE = 30, |
| 280 | }; |
| 281 | |
| 282 | /* Legal values for the SVGA_REG_CURSOR_ON register in cursor bypass mode */ |
| 283 | enum { |
| 284 | SVGA_CURSOR_ON_HIDE = 0, |
| 285 | SVGA_CURSOR_ON_SHOW = 1, |
| 286 | SVGA_CURSOR_ON_REMOVE_FROM_FB = 2, |
| 287 | SVGA_CURSOR_ON_RESTORE_TO_FB = 3, |
| 288 | }; |
| 289 | |
| 290 | static inline void vmsvga_update_rect(struct vmsvga_state_s *s, |
| 291 | int x, int y, int w, int h) |
| 292 | { |
balrog | a8fbaf9 | 2008-03-06 20:43:34 +0000 | [diff] [blame] | 293 | int line; |
| 294 | int bypl; |
| 295 | int width; |
| 296 | int start; |
| 297 | uint8_t *src; |
| 298 | uint8_t *dst; |
| 299 | |
| 300 | if (x + w > s->width) { |
| 301 | fprintf(stderr, "%s: update width too large x: %d, w: %d\n", |
| 302 | __FUNCTION__, x, w); |
| 303 | x = MIN(x, s->width); |
| 304 | w = s->width - x; |
| 305 | } |
| 306 | |
| 307 | if (y + h > s->height) { |
| 308 | fprintf(stderr, "%s: update height too large y: %d, h: %d\n", |
| 309 | __FUNCTION__, y, h); |
| 310 | y = MIN(y, s->height); |
| 311 | h = s->height - y; |
| 312 | } |
| 313 | |
| 314 | line = h; |
| 315 | bypl = s->bypp * s->width; |
| 316 | width = s->bypp * w; |
| 317 | start = s->bypp * x + bypl * y; |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 318 | src = s->vga.vram_ptr + start; |
| 319 | dst = ds_get_data(s->vga.ds) + start; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 320 | |
| 321 | for (; line > 0; line --, src += bypl, dst += bypl) |
| 322 | memcpy(dst, src, width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 323 | |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 324 | dpy_update(s->vga.ds, x, y, w, h); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 325 | } |
| 326 | |
| 327 | static inline void vmsvga_update_screen(struct vmsvga_state_s *s) |
| 328 | { |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 329 | memcpy(ds_get_data(s->vga.ds), s->vga.vram_ptr, |
| 330 | s->bypp * s->width * s->height); |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 331 | dpy_update(s->vga.ds, 0, 0, s->width, s->height); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 332 | } |
| 333 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 334 | static inline void vmsvga_update_rect_delayed(struct vmsvga_state_s *s, |
| 335 | int x, int y, int w, int h) |
| 336 | { |
| 337 | struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last ++]; |
| 338 | s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1; |
| 339 | rect->x = x; |
| 340 | rect->y = y; |
| 341 | rect->w = w; |
| 342 | rect->h = h; |
| 343 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 344 | |
| 345 | static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) |
| 346 | { |
| 347 | struct vmsvga_rect_s *rect; |
| 348 | if (s->invalidated) { |
| 349 | s->redraw_fifo_first = s->redraw_fifo_last; |
| 350 | return; |
| 351 | } |
| 352 | /* Overlapping region updates can be optimised out here - if someone |
| 353 | * knows a smart algorithm to do that, please share. */ |
| 354 | while (s->redraw_fifo_first != s->redraw_fifo_last) { |
| 355 | rect = &s->redraw_fifo[s->redraw_fifo_first ++]; |
| 356 | s->redraw_fifo_first &= REDRAW_FIFO_LEN - 1; |
| 357 | vmsvga_update_rect(s, rect->x, rect->y, rect->w, rect->h); |
| 358 | } |
| 359 | } |
| 360 | |
| 361 | #ifdef HW_RECT_ACCEL |
| 362 | static inline void vmsvga_copy_rect(struct vmsvga_state_s *s, |
| 363 | int x0, int y0, int x1, int y1, int w, int h) |
| 364 | { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 365 | uint8_t *vram = s->vga.vram_ptr; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 366 | int bypl = s->bypp * s->width; |
| 367 | int width = s->bypp * w; |
| 368 | int line = h; |
| 369 | uint8_t *ptr[2]; |
| 370 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 371 | if (y1 > y0) { |
| 372 | ptr[0] = vram + s->bypp * x0 + bypl * (y0 + h - 1); |
| 373 | ptr[1] = vram + s->bypp * x1 + bypl * (y1 + h - 1); |
| 374 | for (; line > 0; line --, ptr[0] -= bypl, ptr[1] -= bypl) { |
| 375 | memmove(ptr[1], ptr[0], width); |
| 376 | } |
| 377 | } else { |
| 378 | ptr[0] = vram + s->bypp * x0 + bypl * y0; |
| 379 | ptr[1] = vram + s->bypp * x1 + bypl * y1; |
| 380 | for (; line > 0; line --, ptr[0] += bypl, ptr[1] += bypl) { |
| 381 | memmove(ptr[1], ptr[0], width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 382 | } |
| 383 | } |
| 384 | |
| 385 | vmsvga_update_rect_delayed(s, x1, y1, w, h); |
| 386 | } |
| 387 | #endif |
| 388 | |
| 389 | #ifdef HW_FILL_ACCEL |
| 390 | static inline void vmsvga_fill_rect(struct vmsvga_state_s *s, |
| 391 | uint32_t c, int x, int y, int w, int h) |
| 392 | { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 393 | uint8_t *vram = s->vga.vram_ptr; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 394 | int bypp = s->bypp; |
| 395 | int bypl = bypp * s->width; |
| 396 | int width = bypp * w; |
| 397 | int line = h; |
| 398 | int column; |
| 399 | uint8_t *fst = vram + bypp * x + bypl * y; |
| 400 | uint8_t *dst; |
| 401 | uint8_t *src; |
| 402 | uint8_t col[4]; |
| 403 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 404 | col[0] = c; |
| 405 | col[1] = c >> 8; |
| 406 | col[2] = c >> 16; |
| 407 | col[3] = c >> 24; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 408 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 409 | if (line--) { |
| 410 | dst = fst; |
| 411 | src = col; |
| 412 | for (column = width; column > 0; column--) { |
| 413 | *(dst++) = *(src++); |
| 414 | if (src - col == bypp) { |
| 415 | src = col; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 416 | } |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 417 | } |
| 418 | dst = fst; |
| 419 | for (; line > 0; line--) { |
| 420 | dst += bypl; |
| 421 | memcpy(dst, fst, width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 422 | } |
| 423 | } |
| 424 | |
| 425 | vmsvga_update_rect_delayed(s, x, y, w, h); |
| 426 | } |
| 427 | #endif |
| 428 | |
| 429 | struct vmsvga_cursor_definition_s { |
| 430 | int width; |
| 431 | int height; |
| 432 | int id; |
| 433 | int bpp; |
| 434 | int hot_x; |
| 435 | int hot_y; |
| 436 | uint32_t mask[1024]; |
Dave Airlie | 8095cb3 | 2009-12-18 08:08:11 +1000 | [diff] [blame] | 437 | uint32_t image[4096]; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 438 | }; |
| 439 | |
| 440 | #define SVGA_BITMAP_SIZE(w, h) ((((w) + 31) >> 5) * (h)) |
| 441 | #define SVGA_PIXMAP_SIZE(w, h, bpp) (((((w) * (bpp)) + 31) >> 5) * (h)) |
| 442 | |
| 443 | #ifdef HW_MOUSE_ACCEL |
| 444 | static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, |
| 445 | struct vmsvga_cursor_definition_s *c) |
| 446 | { |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 447 | QEMUCursor *qc; |
| 448 | int i, pixels; |
| 449 | |
| 450 | qc = cursor_alloc(c->width, c->height); |
| 451 | qc->hot_x = c->hot_x; |
| 452 | qc->hot_y = c->hot_y; |
| 453 | switch (c->bpp) { |
| 454 | case 1: |
| 455 | cursor_set_mono(qc, 0xffffff, 0x000000, (void*)c->image, |
| 456 | 1, (void*)c->mask); |
| 457 | #ifdef DEBUG |
| 458 | cursor_print_ascii_art(qc, "vmware/mono"); |
| 459 | #endif |
| 460 | break; |
| 461 | case 32: |
| 462 | /* fill alpha channel from mask, set color to zero */ |
| 463 | cursor_set_mono(qc, 0x000000, 0x000000, (void*)c->mask, |
| 464 | 1, (void*)c->mask); |
| 465 | /* add in rgb values */ |
| 466 | pixels = c->width * c->height; |
| 467 | for (i = 0; i < pixels; i++) { |
| 468 | qc->data[i] |= c->image[i] & 0xffffff; |
| 469 | } |
| 470 | #ifdef DEBUG |
| 471 | cursor_print_ascii_art(qc, "vmware/32bit"); |
| 472 | #endif |
| 473 | break; |
| 474 | default: |
| 475 | fprintf(stderr, "%s: unhandled bpp %d, using fallback cursor\n", |
| 476 | __FUNCTION__, c->bpp); |
| 477 | cursor_put(qc); |
| 478 | qc = cursor_builtin_left_ptr(); |
| 479 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 480 | |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 481 | if (s->vga.ds->cursor_define) |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 482 | s->vga.ds->cursor_define(qc); |
| 483 | cursor_put(qc); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 484 | } |
| 485 | #endif |
| 486 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 487 | #define CMD(f) le32_to_cpu(s->cmd->f) |
| 488 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 489 | static inline int vmsvga_fifo_length(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 490 | { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 491 | int num; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 492 | if (!s->config || !s->enable) |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 493 | return 0; |
| 494 | num = CMD(next_cmd) - CMD(stop); |
| 495 | if (num < 0) |
| 496 | num += CMD(max) - CMD(min); |
| 497 | return num >> 2; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 498 | } |
| 499 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 500 | static inline uint32_t vmsvga_fifo_read_raw(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 501 | { |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 502 | uint32_t cmd = s->fifo[CMD(stop) >> 2]; |
| 503 | s->cmd->stop = cpu_to_le32(CMD(stop) + 4); |
| 504 | if (CMD(stop) >= CMD(max)) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 505 | s->cmd->stop = s->cmd->min; |
| 506 | return cmd; |
| 507 | } |
| 508 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 509 | static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s) |
| 510 | { |
| 511 | return le32_to_cpu(vmsvga_fifo_read_raw(s)); |
| 512 | } |
| 513 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 514 | static void vmsvga_fifo_run(struct vmsvga_state_s *s) |
| 515 | { |
| 516 | uint32_t cmd, colour; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 517 | int args, len; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 518 | int x, y, dx, dy, width, height; |
| 519 | struct vmsvga_cursor_definition_s cursor; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 520 | uint32_t cmd_start; |
| 521 | |
| 522 | len = vmsvga_fifo_length(s); |
| 523 | while (len > 0) { |
| 524 | /* May need to go back to the start of the command if incomplete */ |
| 525 | cmd_start = s->cmd->stop; |
| 526 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 527 | switch (cmd = vmsvga_fifo_read(s)) { |
| 528 | case SVGA_CMD_UPDATE: |
| 529 | case SVGA_CMD_UPDATE_VERBOSE: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 530 | len -= 5; |
| 531 | if (len < 0) |
| 532 | goto rewind; |
| 533 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 534 | x = vmsvga_fifo_read(s); |
| 535 | y = vmsvga_fifo_read(s); |
| 536 | width = vmsvga_fifo_read(s); |
| 537 | height = vmsvga_fifo_read(s); |
| 538 | vmsvga_update_rect_delayed(s, x, y, width, height); |
| 539 | break; |
| 540 | |
| 541 | case SVGA_CMD_RECT_FILL: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 542 | len -= 6; |
| 543 | if (len < 0) |
| 544 | goto rewind; |
| 545 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 546 | colour = vmsvga_fifo_read(s); |
| 547 | x = vmsvga_fifo_read(s); |
| 548 | y = vmsvga_fifo_read(s); |
| 549 | width = vmsvga_fifo_read(s); |
| 550 | height = vmsvga_fifo_read(s); |
| 551 | #ifdef HW_FILL_ACCEL |
| 552 | vmsvga_fill_rect(s, colour, x, y, width, height); |
| 553 | break; |
| 554 | #else |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 555 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 556 | goto badcmd; |
| 557 | #endif |
| 558 | |
| 559 | case SVGA_CMD_RECT_COPY: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 560 | len -= 7; |
| 561 | if (len < 0) |
| 562 | goto rewind; |
| 563 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 564 | x = vmsvga_fifo_read(s); |
| 565 | y = vmsvga_fifo_read(s); |
| 566 | dx = vmsvga_fifo_read(s); |
| 567 | dy = vmsvga_fifo_read(s); |
| 568 | width = vmsvga_fifo_read(s); |
| 569 | height = vmsvga_fifo_read(s); |
| 570 | #ifdef HW_RECT_ACCEL |
| 571 | vmsvga_copy_rect(s, x, y, dx, dy, width, height); |
| 572 | break; |
| 573 | #else |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 574 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 575 | goto badcmd; |
| 576 | #endif |
| 577 | |
| 578 | case SVGA_CMD_DEFINE_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 579 | len -= 8; |
| 580 | if (len < 0) |
| 581 | goto rewind; |
| 582 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 583 | cursor.id = vmsvga_fifo_read(s); |
| 584 | cursor.hot_x = vmsvga_fifo_read(s); |
| 585 | cursor.hot_y = vmsvga_fifo_read(s); |
| 586 | cursor.width = x = vmsvga_fifo_read(s); |
| 587 | cursor.height = y = vmsvga_fifo_read(s); |
| 588 | vmsvga_fifo_read(s); |
| 589 | cursor.bpp = vmsvga_fifo_read(s); |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 590 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 591 | args = SVGA_BITMAP_SIZE(x, y) + SVGA_PIXMAP_SIZE(x, y, cursor.bpp); |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 592 | if (SVGA_BITMAP_SIZE(x, y) > sizeof cursor.mask || |
| 593 | SVGA_PIXMAP_SIZE(x, y, cursor.bpp) > sizeof cursor.image) |
| 594 | goto badcmd; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 595 | |
| 596 | len -= args; |
| 597 | if (len < 0) |
| 598 | goto rewind; |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 599 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 600 | for (args = 0; args < SVGA_BITMAP_SIZE(x, y); args ++) |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 601 | cursor.mask[args] = vmsvga_fifo_read_raw(s); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 602 | for (args = 0; args < SVGA_PIXMAP_SIZE(x, y, cursor.bpp); args ++) |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 603 | cursor.image[args] = vmsvga_fifo_read_raw(s); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 604 | #ifdef HW_MOUSE_ACCEL |
| 605 | vmsvga_cursor_define(s, &cursor); |
| 606 | break; |
| 607 | #else |
| 608 | args = 0; |
| 609 | goto badcmd; |
| 610 | #endif |
| 611 | |
| 612 | /* |
| 613 | * Other commands that we at least know the number of arguments |
| 614 | * for so we can avoid FIFO desync if driver uses them illegally. |
| 615 | */ |
| 616 | case SVGA_CMD_DEFINE_ALPHA_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 617 | len -= 6; |
| 618 | if (len < 0) |
| 619 | goto rewind; |
| 620 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 621 | vmsvga_fifo_read(s); |
| 622 | vmsvga_fifo_read(s); |
| 623 | vmsvga_fifo_read(s); |
| 624 | x = vmsvga_fifo_read(s); |
| 625 | y = vmsvga_fifo_read(s); |
| 626 | args = x * y; |
| 627 | goto badcmd; |
| 628 | case SVGA_CMD_RECT_ROP_FILL: |
| 629 | args = 6; |
| 630 | goto badcmd; |
| 631 | case SVGA_CMD_RECT_ROP_COPY: |
| 632 | args = 7; |
| 633 | goto badcmd; |
| 634 | case SVGA_CMD_DRAW_GLYPH_CLIPPED: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 635 | len -= 4; |
| 636 | if (len < 0) |
| 637 | goto rewind; |
| 638 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 639 | vmsvga_fifo_read(s); |
| 640 | vmsvga_fifo_read(s); |
| 641 | args = 7 + (vmsvga_fifo_read(s) >> 2); |
| 642 | goto badcmd; |
| 643 | case SVGA_CMD_SURFACE_ALPHA_BLEND: |
| 644 | args = 12; |
| 645 | goto badcmd; |
| 646 | |
| 647 | /* |
| 648 | * Other commands that are not listed as depending on any |
| 649 | * CAPABILITIES bits, but are not described in the README either. |
| 650 | */ |
| 651 | case SVGA_CMD_SURFACE_FILL: |
| 652 | case SVGA_CMD_SURFACE_COPY: |
| 653 | case SVGA_CMD_FRONT_ROP_FILL: |
| 654 | case SVGA_CMD_FENCE: |
| 655 | case SVGA_CMD_INVALID_CMD: |
| 656 | break; /* Nop */ |
| 657 | |
| 658 | default: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 659 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 660 | badcmd: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 661 | len -= args; |
| 662 | if (len < 0) |
| 663 | goto rewind; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 664 | while (args --) |
| 665 | vmsvga_fifo_read(s); |
| 666 | printf("%s: Unknown command 0x%02x in SVGA command FIFO\n", |
| 667 | __FUNCTION__, cmd); |
| 668 | break; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 669 | |
| 670 | rewind: |
| 671 | s->cmd->stop = cmd_start; |
| 672 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 673 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 674 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 675 | |
| 676 | s->syncing = 0; |
| 677 | } |
| 678 | |
| 679 | static uint32_t vmsvga_index_read(void *opaque, uint32_t address) |
| 680 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 681 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 682 | return s->index; |
| 683 | } |
| 684 | |
| 685 | static void vmsvga_index_write(void *opaque, uint32_t address, uint32_t index) |
| 686 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 687 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 688 | s->index = index; |
| 689 | } |
| 690 | |
| 691 | static uint32_t vmsvga_value_read(void *opaque, uint32_t address) |
| 692 | { |
| 693 | uint32_t caps; |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 694 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 695 | switch (s->index) { |
| 696 | case SVGA_REG_ID: |
| 697 | return s->svgaid; |
| 698 | |
| 699 | case SVGA_REG_ENABLE: |
| 700 | return s->enable; |
| 701 | |
| 702 | case SVGA_REG_WIDTH: |
| 703 | return s->width; |
| 704 | |
| 705 | case SVGA_REG_HEIGHT: |
| 706 | return s->height; |
| 707 | |
| 708 | case SVGA_REG_MAX_WIDTH: |
| 709 | return SVGA_MAX_WIDTH; |
| 710 | |
| 711 | case SVGA_REG_MAX_HEIGHT: |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 712 | return SVGA_MAX_HEIGHT; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 713 | |
| 714 | case SVGA_REG_DEPTH: |
| 715 | return s->depth; |
| 716 | |
| 717 | case SVGA_REG_BITS_PER_PIXEL: |
| 718 | return (s->depth + 7) & ~7; |
| 719 | |
| 720 | case SVGA_REG_PSEUDOCOLOR: |
| 721 | return 0x0; |
| 722 | |
| 723 | case SVGA_REG_RED_MASK: |
| 724 | return s->wred; |
| 725 | case SVGA_REG_GREEN_MASK: |
| 726 | return s->wgreen; |
| 727 | case SVGA_REG_BLUE_MASK: |
| 728 | return s->wblue; |
| 729 | |
| 730 | case SVGA_REG_BYTES_PER_LINE: |
| 731 | return ((s->depth + 7) >> 3) * s->new_width; |
| 732 | |
Avi Kivity | 7b619b9 | 2011-08-08 16:08:56 +0300 | [diff] [blame] | 733 | case SVGA_REG_FB_START: { |
| 734 | struct pci_vmsvga_state_s *pci_vmsvga |
| 735 | = container_of(s, struct pci_vmsvga_state_s, chip); |
| 736 | return pci_get_bar_addr(&pci_vmsvga->card, 1); |
| 737 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 738 | |
| 739 | case SVGA_REG_FB_OFFSET: |
| 740 | return 0x0; |
| 741 | |
| 742 | case SVGA_REG_VRAM_SIZE: |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 743 | return s->vga.vram_size; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 744 | |
| 745 | case SVGA_REG_FB_SIZE: |
| 746 | return s->fb_size; |
| 747 | |
| 748 | case SVGA_REG_CAPABILITIES: |
| 749 | caps = SVGA_CAP_NONE; |
| 750 | #ifdef HW_RECT_ACCEL |
| 751 | caps |= SVGA_CAP_RECT_COPY; |
| 752 | #endif |
| 753 | #ifdef HW_FILL_ACCEL |
| 754 | caps |= SVGA_CAP_RECT_FILL; |
| 755 | #endif |
| 756 | #ifdef HW_MOUSE_ACCEL |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 757 | if (s->vga.ds->mouse_set) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 758 | caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 | |
| 759 | SVGA_CAP_CURSOR_BYPASS; |
| 760 | #endif |
| 761 | return caps; |
| 762 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 763 | case SVGA_REG_MEM_START: { |
| 764 | struct pci_vmsvga_state_s *pci_vmsvga |
| 765 | = container_of(s, struct pci_vmsvga_state_s, chip); |
| 766 | return pci_get_bar_addr(&pci_vmsvga->card, 2); |
| 767 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 768 | |
| 769 | case SVGA_REG_MEM_SIZE: |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 770 | return s->fifo_size; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 771 | |
| 772 | case SVGA_REG_CONFIG_DONE: |
| 773 | return s->config; |
| 774 | |
| 775 | case SVGA_REG_SYNC: |
| 776 | case SVGA_REG_BUSY: |
| 777 | return s->syncing; |
| 778 | |
| 779 | case SVGA_REG_GUEST_ID: |
| 780 | return s->guest; |
| 781 | |
| 782 | case SVGA_REG_CURSOR_ID: |
| 783 | return s->cursor.id; |
| 784 | |
| 785 | case SVGA_REG_CURSOR_X: |
| 786 | return s->cursor.x; |
| 787 | |
| 788 | case SVGA_REG_CURSOR_Y: |
| 789 | return s->cursor.x; |
| 790 | |
| 791 | case SVGA_REG_CURSOR_ON: |
| 792 | return s->cursor.on; |
| 793 | |
| 794 | case SVGA_REG_HOST_BITS_PER_PIXEL: |
| 795 | return (s->depth + 7) & ~7; |
| 796 | |
| 797 | case SVGA_REG_SCRATCH_SIZE: |
| 798 | return s->scratch_size; |
| 799 | |
| 800 | case SVGA_REG_MEM_REGS: |
| 801 | case SVGA_REG_NUM_DISPLAYS: |
| 802 | case SVGA_REG_PITCHLOCK: |
| 803 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
| 804 | return 0; |
| 805 | |
| 806 | default: |
| 807 | if (s->index >= SVGA_SCRATCH_BASE && |
| 808 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) |
| 809 | return s->scratch[s->index - SVGA_SCRATCH_BASE]; |
| 810 | printf("%s: Bad register %02x\n", __FUNCTION__, s->index); |
| 811 | } |
| 812 | |
| 813 | return 0; |
| 814 | } |
| 815 | |
| 816 | static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) |
| 817 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 818 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 819 | switch (s->index) { |
| 820 | case SVGA_REG_ID: |
| 821 | if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) |
| 822 | s->svgaid = value; |
| 823 | break; |
| 824 | |
| 825 | case SVGA_REG_ENABLE: |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 826 | s->enable = value; |
| 827 | s->config &= !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 828 | s->width = -1; |
| 829 | s->height = -1; |
| 830 | s->invalidated = 1; |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 831 | s->vga.invalidate(&s->vga); |
Anthony Liguori | b5cc6e3 | 2009-12-18 08:08:10 +1000 | [diff] [blame] | 832 | if (s->enable) { |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 833 | s->fb_size = ((s->depth + 7) >> 3) * s->new_width * s->new_height; |
| 834 | vga_dirty_log_stop(&s->vga); |
| 835 | } else { |
| 836 | vga_dirty_log_start(&s->vga); |
| 837 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 838 | break; |
| 839 | |
| 840 | case SVGA_REG_WIDTH: |
| 841 | s->new_width = value; |
| 842 | s->invalidated = 1; |
| 843 | break; |
| 844 | |
| 845 | case SVGA_REG_HEIGHT: |
| 846 | s->new_height = value; |
| 847 | s->invalidated = 1; |
| 848 | break; |
| 849 | |
| 850 | case SVGA_REG_DEPTH: |
| 851 | case SVGA_REG_BITS_PER_PIXEL: |
| 852 | if (value != s->depth) { |
| 853 | printf("%s: Bad colour depth: %i bits\n", __FUNCTION__, value); |
| 854 | s->config = 0; |
| 855 | } |
| 856 | break; |
| 857 | |
| 858 | case SVGA_REG_CONFIG_DONE: |
| 859 | if (value) { |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 860 | s->fifo = (uint32_t *) s->fifo_ptr; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 861 | /* Check range and alignment. */ |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 862 | if ((CMD(min) | CMD(max) | |
| 863 | CMD(next_cmd) | CMD(stop)) & 3) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 864 | break; |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 865 | if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 866 | break; |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 867 | if (CMD(max) > SVGA_FIFO_SIZE) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 868 | break; |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 869 | if (CMD(max) < CMD(min) + 10 * 1024) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 870 | break; |
| 871 | } |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 872 | s->config = !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 873 | break; |
| 874 | |
| 875 | case SVGA_REG_SYNC: |
| 876 | s->syncing = 1; |
| 877 | vmsvga_fifo_run(s); /* Or should we just wait for update_display? */ |
| 878 | break; |
| 879 | |
| 880 | case SVGA_REG_GUEST_ID: |
| 881 | s->guest = value; |
| 882 | #ifdef VERBOSE |
| 883 | if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE + |
malc | b1503cd | 2008-12-22 20:33:55 +0000 | [diff] [blame] | 884 | ARRAY_SIZE(vmsvga_guest_id)) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 885 | printf("%s: guest runs %s.\n", __FUNCTION__, |
| 886 | vmsvga_guest_id[value - GUEST_OS_BASE]); |
| 887 | #endif |
| 888 | break; |
| 889 | |
| 890 | case SVGA_REG_CURSOR_ID: |
| 891 | s->cursor.id = value; |
| 892 | break; |
| 893 | |
| 894 | case SVGA_REG_CURSOR_X: |
| 895 | s->cursor.x = value; |
| 896 | break; |
| 897 | |
| 898 | case SVGA_REG_CURSOR_Y: |
| 899 | s->cursor.y = value; |
| 900 | break; |
| 901 | |
| 902 | case SVGA_REG_CURSOR_ON: |
| 903 | s->cursor.on |= (value == SVGA_CURSOR_ON_SHOW); |
| 904 | s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); |
| 905 | #ifdef HW_MOUSE_ACCEL |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 906 | if (s->vga.ds->mouse_set && value <= SVGA_CURSOR_ON_SHOW) |
| 907 | s->vga.ds->mouse_set(s->cursor.x, s->cursor.y, s->cursor.on); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 908 | #endif |
| 909 | break; |
| 910 | |
| 911 | case SVGA_REG_MEM_REGS: |
| 912 | case SVGA_REG_NUM_DISPLAYS: |
| 913 | case SVGA_REG_PITCHLOCK: |
| 914 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
| 915 | break; |
| 916 | |
| 917 | default: |
| 918 | if (s->index >= SVGA_SCRATCH_BASE && |
| 919 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) { |
| 920 | s->scratch[s->index - SVGA_SCRATCH_BASE] = value; |
| 921 | break; |
| 922 | } |
| 923 | printf("%s: Bad register %02x\n", __FUNCTION__, s->index); |
| 924 | } |
| 925 | } |
| 926 | |
| 927 | static uint32_t vmsvga_bios_read(void *opaque, uint32_t address) |
| 928 | { |
| 929 | printf("%s: what are we supposed to return?\n", __FUNCTION__); |
| 930 | return 0xcafe; |
| 931 | } |
| 932 | |
| 933 | static void vmsvga_bios_write(void *opaque, uint32_t address, uint32_t data) |
| 934 | { |
| 935 | printf("%s: what are we supposed to do with (%08x)?\n", |
| 936 | __FUNCTION__, data); |
| 937 | } |
| 938 | |
| 939 | static inline void vmsvga_size(struct vmsvga_state_s *s) |
| 940 | { |
| 941 | if (s->new_width != s->width || s->new_height != s->height) { |
| 942 | s->width = s->new_width; |
| 943 | s->height = s->new_height; |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 944 | qemu_console_resize(s->vga.ds, s->width, s->height); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 945 | s->invalidated = 1; |
| 946 | } |
| 947 | } |
| 948 | |
| 949 | static void vmsvga_update_display(void *opaque) |
| 950 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 951 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 952 | if (!s->enable) { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 953 | s->vga.update(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 954 | return; |
| 955 | } |
| 956 | |
| 957 | vmsvga_size(s); |
| 958 | |
| 959 | vmsvga_fifo_run(s); |
| 960 | vmsvga_update_rect_flush(s); |
| 961 | |
| 962 | /* |
| 963 | * Is it more efficient to look at vram VGA-dirty bits or wait |
| 964 | * for the driver to issue SVGA_CMD_UPDATE? |
| 965 | */ |
| 966 | if (s->invalidated) { |
| 967 | s->invalidated = 0; |
| 968 | vmsvga_update_screen(s); |
| 969 | } |
| 970 | } |
| 971 | |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 972 | static void vmsvga_reset(DeviceState *dev) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 973 | { |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 974 | struct pci_vmsvga_state_s *pci = |
| 975 | DO_UPCAST(struct pci_vmsvga_state_s, card.qdev, dev); |
| 976 | struct vmsvga_state_s *s = &pci->chip; |
| 977 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 978 | s->index = 0; |
| 979 | s->enable = 0; |
| 980 | s->config = 0; |
| 981 | s->width = -1; |
| 982 | s->height = -1; |
| 983 | s->svgaid = SVGA_ID; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 984 | s->cursor.on = 0; |
| 985 | s->redraw_fifo_first = 0; |
| 986 | s->redraw_fifo_last = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 987 | s->syncing = 0; |
Anthony Liguori | b5cc6e3 | 2009-12-18 08:08:10 +1000 | [diff] [blame] | 988 | |
| 989 | vga_dirty_log_start(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 990 | } |
| 991 | |
| 992 | static void vmsvga_invalidate_display(void *opaque) |
| 993 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 994 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 995 | if (!s->enable) { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 996 | s->vga.invalidate(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 997 | return; |
| 998 | } |
| 999 | |
| 1000 | s->invalidated = 1; |
| 1001 | } |
| 1002 | |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 1003 | /* save the vga display in a PPM image even if no display is |
| 1004 | available */ |
Luiz Capitulino | d709813 | 2012-05-21 16:41:37 -0300 | [diff] [blame] | 1005 | static void vmsvga_screen_dump(void *opaque, const char *filename, bool cswitch, |
| 1006 | Error **errp) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1007 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1008 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1009 | if (!s->enable) { |
Luiz Capitulino | d709813 | 2012-05-21 16:41:37 -0300 | [diff] [blame] | 1010 | s->vga.screen_dump(&s->vga, filename, cswitch, errp); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1011 | return; |
| 1012 | } |
| 1013 | |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 1014 | if (s->depth == 32) { |
aliguori | e07d630 | 2009-01-16 19:07:10 +0000 | [diff] [blame] | 1015 | DisplaySurface *ds = qemu_create_displaysurface_from(s->width, |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 1016 | s->height, 32, ds_get_linesize(s->vga.ds), s->vga.vram_ptr); |
Luiz Capitulino | d663174 | 2012-05-24 10:42:25 -0300 | [diff] [blame] | 1017 | ppm_save(filename, ds, errp); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1018 | g_free(ds); |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 1019 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1020 | } |
| 1021 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1022 | static void vmsvga_text_update(void *opaque, console_ch_t *chardata) |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1023 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1024 | struct vmsvga_state_s *s = opaque; |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1025 | |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 1026 | if (s->vga.text_update) |
| 1027 | s->vga.text_update(&s->vga, chardata); |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1028 | } |
| 1029 | |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1030 | static int vmsvga_post_load(void *opaque, int version_id) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1031 | { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1032 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1033 | |
| 1034 | s->invalidated = 1; |
| 1035 | if (s->config) |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1036 | s->fifo = (uint32_t *) s->fifo_ptr; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1037 | |
| 1038 | return 0; |
| 1039 | } |
| 1040 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1041 | static const VMStateDescription vmstate_vmware_vga_internal = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1042 | .name = "vmware_vga_internal", |
| 1043 | .version_id = 0, |
| 1044 | .minimum_version_id = 0, |
| 1045 | .minimum_version_id_old = 0, |
| 1046 | .post_load = vmsvga_post_load, |
| 1047 | .fields = (VMStateField []) { |
| 1048 | VMSTATE_INT32_EQUAL(depth, struct vmsvga_state_s), |
| 1049 | VMSTATE_INT32(enable, struct vmsvga_state_s), |
| 1050 | VMSTATE_INT32(config, struct vmsvga_state_s), |
| 1051 | VMSTATE_INT32(cursor.id, struct vmsvga_state_s), |
| 1052 | VMSTATE_INT32(cursor.x, struct vmsvga_state_s), |
| 1053 | VMSTATE_INT32(cursor.y, struct vmsvga_state_s), |
| 1054 | VMSTATE_INT32(cursor.on, struct vmsvga_state_s), |
| 1055 | VMSTATE_INT32(index, struct vmsvga_state_s), |
| 1056 | VMSTATE_VARRAY_INT32(scratch, struct vmsvga_state_s, |
| 1057 | scratch_size, 0, vmstate_info_uint32, uint32_t), |
| 1058 | VMSTATE_INT32(new_width, struct vmsvga_state_s), |
| 1059 | VMSTATE_INT32(new_height, struct vmsvga_state_s), |
| 1060 | VMSTATE_UINT32(guest, struct vmsvga_state_s), |
| 1061 | VMSTATE_UINT32(svgaid, struct vmsvga_state_s), |
| 1062 | VMSTATE_INT32(syncing, struct vmsvga_state_s), |
| 1063 | VMSTATE_INT32(fb_size, struct vmsvga_state_s), |
| 1064 | VMSTATE_END_OF_LIST() |
| 1065 | } |
| 1066 | }; |
| 1067 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1068 | static const VMStateDescription vmstate_vmware_vga = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1069 | .name = "vmware_vga", |
| 1070 | .version_id = 0, |
| 1071 | .minimum_version_id = 0, |
| 1072 | .minimum_version_id_old = 0, |
| 1073 | .fields = (VMStateField []) { |
| 1074 | VMSTATE_PCI_DEVICE(card, struct pci_vmsvga_state_s), |
| 1075 | VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0, |
| 1076 | vmstate_vmware_vga_internal, struct vmsvga_state_s), |
| 1077 | VMSTATE_END_OF_LIST() |
| 1078 | } |
| 1079 | }; |
| 1080 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1081 | static void vmsvga_init(struct vmsvga_state_s *s, |
Richard Henderson | 0a039dc | 2011-08-16 08:27:39 -0700 | [diff] [blame] | 1082 | MemoryRegion *address_space, MemoryRegion *io) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1083 | { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1084 | s->scratch_size = SVGA_SCRATCH_SIZE; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1085 | s->scratch = g_malloc(s->scratch_size * 4); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1086 | |
Anthony Liguori | a6109ff | 2009-12-18 08:08:09 +1000 | [diff] [blame] | 1087 | s->vga.ds = graphic_console_init(vmsvga_update_display, |
| 1088 | vmsvga_invalidate_display, |
| 1089 | vmsvga_screen_dump, |
| 1090 | vmsvga_text_update, s); |
| 1091 | |
Andrzej Zaborowski | 4445b0a | 2009-08-23 19:00:58 +0200 | [diff] [blame] | 1092 | |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1093 | s->fifo_size = SVGA_FIFO_SIZE; |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1094 | memory_region_init_ram(&s->fifo_ram, "vmsvga.fifo", s->fifo_size); |
| 1095 | vmstate_register_ram_global(&s->fifo_ram); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1096 | s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1097 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1098 | vga_common_init(&s->vga); |
Richard Henderson | 0a039dc | 2011-08-16 08:27:39 -0700 | [diff] [blame] | 1099 | vga_init(&s->vga, address_space, io, true); |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 1100 | vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); |
balrog | e93a5f4 | 2008-07-16 04:31:20 +0000 | [diff] [blame] | 1101 | |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 1102 | s->depth = ds_get_bits_per_pixel(s->vga.ds); |
| 1103 | s->bypp = ds_get_bytes_per_pixel(s->vga.ds); |
| 1104 | switch (s->depth) { |
| 1105 | case 8: |
| 1106 | s->wred = 0x00000007; |
| 1107 | s->wgreen = 0x00000038; |
| 1108 | s->wblue = 0x000000c0; |
| 1109 | break; |
| 1110 | case 15: |
| 1111 | s->wred = 0x0000001f; |
| 1112 | s->wgreen = 0x000003e0; |
| 1113 | s->wblue = 0x00007c00; |
| 1114 | break; |
| 1115 | case 16: |
| 1116 | s->wred = 0x0000001f; |
| 1117 | s->wgreen = 0x000007e0; |
| 1118 | s->wblue = 0x0000f800; |
| 1119 | break; |
| 1120 | case 24: |
| 1121 | s->wred = 0x00ff0000; |
| 1122 | s->wgreen = 0x0000ff00; |
| 1123 | s->wblue = 0x000000ff; |
| 1124 | break; |
| 1125 | case 32: |
| 1126 | s->wred = 0x00ff0000; |
| 1127 | s->wgreen = 0x0000ff00; |
| 1128 | s->wblue = 0x000000ff; |
| 1129 | break; |
| 1130 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1131 | } |
| 1132 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame^] | 1133 | static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1134 | unsigned size) |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1135 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1136 | struct vmsvga_state_s *s = opaque; |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1137 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1138 | switch (addr) { |
| 1139 | case SVGA_IO_MUL * SVGA_INDEX_PORT: return vmsvga_index_read(s, addr); |
| 1140 | case SVGA_IO_MUL * SVGA_VALUE_PORT: return vmsvga_value_read(s, addr); |
| 1141 | case SVGA_IO_MUL * SVGA_BIOS_PORT: return vmsvga_bios_read(s, addr); |
| 1142 | default: return -1u; |
| 1143 | } |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1144 | } |
| 1145 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame^] | 1146 | static void vmsvga_io_write(void *opaque, hwaddr addr, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1147 | uint64_t data, unsigned size) |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1148 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1149 | struct vmsvga_state_s *s = opaque; |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1150 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1151 | switch (addr) { |
| 1152 | case SVGA_IO_MUL * SVGA_INDEX_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1153 | vmsvga_index_write(s, addr, data); |
| 1154 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1155 | case SVGA_IO_MUL * SVGA_VALUE_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1156 | vmsvga_value_write(s, addr, data); |
| 1157 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1158 | case SVGA_IO_MUL * SVGA_BIOS_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1159 | vmsvga_bios_write(s, addr, data); |
| 1160 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1161 | } |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1162 | } |
| 1163 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1164 | static const MemoryRegionOps vmsvga_io_ops = { |
| 1165 | .read = vmsvga_io_read, |
| 1166 | .write = vmsvga_io_write, |
| 1167 | .endianness = DEVICE_LITTLE_ENDIAN, |
| 1168 | .valid = { |
| 1169 | .min_access_size = 4, |
| 1170 | .max_access_size = 4, |
| 1171 | }, |
| 1172 | }; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1173 | |
Gerd Hoffmann | 81a322d | 2009-08-14 10:36:05 +0200 | [diff] [blame] | 1174 | static int pci_vmsvga_initfn(PCIDevice *dev) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1175 | { |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1176 | struct pci_vmsvga_state_s *s = |
| 1177 | DO_UPCAST(struct pci_vmsvga_state_s, card, dev); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1178 | MemoryRegion *iomem; |
| 1179 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1180 | iomem = &s->chip.vga.vram; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1181 | |
Michael S. Tsirkin | 3fa0f95 | 2009-12-10 18:51:49 +0200 | [diff] [blame] | 1182 | s->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */ |
| 1183 | s->card.config[PCI_LATENCY_TIMER] = 0x40; /* Latency timer */ |
Michael S. Tsirkin | 3fa0f95 | 2009-12-10 18:51:49 +0200 | [diff] [blame] | 1184 | s->card.config[PCI_INTERRUPT_LINE] = 0xff; /* End */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1185 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1186 | memory_region_init_io(&s->io_bar, &vmsvga_io_ops, &s->chip, |
| 1187 | "vmsvga-io", 0x10); |
Jan Kiszka | bd8f2f5 | 2012-08-23 13:02:33 +0200 | [diff] [blame] | 1188 | memory_region_set_flush_coalesced(&s->io_bar); |
Avi Kivity | e824b2c | 2011-08-08 16:09:31 +0300 | [diff] [blame] | 1189 | pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1190 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1191 | vmsvga_init(&s->chip, pci_address_space(dev), |
Richard Henderson | 0a039dc | 2011-08-16 08:27:39 -0700 | [diff] [blame] | 1192 | pci_address_space_io(dev)); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1193 | |
Avi Kivity | e824b2c | 2011-08-08 16:09:31 +0300 | [diff] [blame] | 1194 | pci_register_bar(&s->card, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, iomem); |
| 1195 | pci_register_bar(&s->card, 2, PCI_BASE_ADDRESS_MEM_PREFETCH, |
| 1196 | &s->chip.fifo_ram); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1197 | |
Gerd Hoffmann | 281a26b | 2010-11-17 12:06:44 +0100 | [diff] [blame] | 1198 | if (!dev->rom_bar) { |
| 1199 | /* compatibility with pc-0.13 and older */ |
Avi Kivity | be20f9e | 2011-08-15 17:17:37 +0300 | [diff] [blame] | 1200 | vga_init_vbe(&s->chip.vga, pci_address_space(dev)); |
Gerd Hoffmann | 281a26b | 2010-11-17 12:06:44 +0100 | [diff] [blame] | 1201 | } |
| 1202 | |
Gerd Hoffmann | 81a322d | 2009-08-14 10:36:05 +0200 | [diff] [blame] | 1203 | return 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1204 | } |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1205 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1206 | static Property vga_vmware_properties[] = { |
| 1207 | DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s, |
Gerd Hoffmann | 9e56edc | 2012-06-11 10:42:53 +0200 | [diff] [blame] | 1208 | chip.vga.vram_size_mb, 16), |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1209 | DEFINE_PROP_END_OF_LIST(), |
| 1210 | }; |
| 1211 | |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1212 | static void vmsvga_class_init(ObjectClass *klass, void *data) |
| 1213 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1214 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1215 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
Isaku Yamahata | 310faae | 2011-05-25 10:58:04 +0900 | [diff] [blame] | 1216 | |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1217 | k->no_hotplug = 1; |
| 1218 | k->init = pci_vmsvga_initfn; |
| 1219 | k->romfile = "vgabios-vmware.bin"; |
| 1220 | k->vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1221 | k->device_id = SVGA_PCI_DEVICE_ID; |
| 1222 | k->class_id = PCI_CLASS_DISPLAY_VGA; |
| 1223 | k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1224 | k->subsystem_id = SVGA_PCI_DEVICE_ID; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1225 | dc->reset = vmsvga_reset; |
| 1226 | dc->vmsd = &vmstate_vmware_vga; |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1227 | dc->props = vga_vmware_properties; |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1228 | } |
| 1229 | |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1230 | static TypeInfo vmsvga_info = { |
| 1231 | .name = "vmware-svga", |
| 1232 | .parent = TYPE_PCI_DEVICE, |
| 1233 | .instance_size = sizeof(struct pci_vmsvga_state_s), |
| 1234 | .class_init = vmsvga_class_init, |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1235 | }; |
| 1236 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1237 | static void vmsvga_register_types(void) |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1238 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1239 | type_register_static(&vmsvga_info); |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1240 | } |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1241 | |
| 1242 | type_init(vmsvga_register_types) |