ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU VMware-SVGA "chipset". |
| 3 | * |
| 4 | * Copyright (c) 2007 Andrzej Zaborowski <balrog@zabor.org> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
Markus Armbruster | 0b8fa32 | 2019-05-23 16:35:07 +0200 | [diff] [blame] | 24 | |
Peter Maydell | 47df515 | 2016-01-26 18:17:13 +0000 | [diff] [blame] | 25 | #include "qemu/osdep.h" |
Markus Armbruster | 0b8fa32 | 2019-05-23 16:35:07 +0200 | [diff] [blame] | 26 | #include "qemu/module.h" |
Philippe Mathieu-Daudé | f0353b0 | 2018-06-25 09:42:06 -0300 | [diff] [blame] | 27 | #include "qemu/units.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 28 | #include "qapi/error.h" |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 29 | #include "qemu/log.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 30 | #include "hw/loader.h" |
Stefan Weil | ac86048 | 2013-11-10 14:20:16 +0100 | [diff] [blame] | 31 | #include "trace.h" |
Peter Lieven | 2f487a3d | 2014-03-17 18:38:58 +0100 | [diff] [blame] | 32 | #include "ui/vnc.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 33 | #include "hw/pci/pci.h" |
Markus Armbruster | a27bd6c | 2019-08-12 07:23:51 +0200 | [diff] [blame] | 34 | #include "hw/qdev-properties.h" |
Markus Armbruster | d645427 | 2019-08-12 07:23:45 +0200 | [diff] [blame] | 35 | #include "migration/vmstate.h" |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 36 | #include "qom/object.h" |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 37 | |
Jan Kiszka | ca0508d | 2011-08-22 19:12:09 +0200 | [diff] [blame] | 38 | #undef VERBOSE |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 39 | #define HW_RECT_ACCEL |
| 40 | #define HW_FILL_ACCEL |
| 41 | #define HW_MOUSE_ACCEL |
| 42 | |
Paolo Bonzini | 47b43a1 | 2013-03-18 17:36:02 +0100 | [diff] [blame] | 43 | #include "vga_int.h" |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 44 | |
| 45 | /* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 46 | |
| 47 | struct vmsvga_state_s { |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 48 | VGACommonState vga; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 49 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 50 | int invalidated; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 51 | int enable; |
| 52 | int config; |
| 53 | struct { |
| 54 | int id; |
| 55 | int x; |
| 56 | int y; |
| 57 | int on; |
| 58 | } cursor; |
| 59 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 60 | int index; |
| 61 | int scratch_size; |
| 62 | uint32_t *scratch; |
| 63 | int new_width; |
| 64 | int new_height; |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 65 | int new_depth; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 66 | uint32_t guest; |
| 67 | uint32_t svgaid; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 68 | int syncing; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 69 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 70 | MemoryRegion fifo_ram; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 71 | uint8_t *fifo_ptr; |
| 72 | unsigned int fifo_size; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 73 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 74 | uint32_t *fifo; |
| 75 | uint32_t fifo_min; |
| 76 | uint32_t fifo_max; |
| 77 | uint32_t fifo_next; |
| 78 | uint32_t fifo_stop; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 79 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 80 | #define REDRAW_FIFO_LEN 512 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 81 | struct vmsvga_rect_s { |
| 82 | int x, y, w, h; |
| 83 | } redraw_fifo[REDRAW_FIFO_LEN]; |
| 84 | int redraw_fifo_first, redraw_fifo_last; |
| 85 | }; |
| 86 | |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 87 | #define TYPE_VMWARE_SVGA "vmware-svga" |
| 88 | |
Eduardo Habkost | 8110fa1 | 2020-08-31 17:07:33 -0400 | [diff] [blame] | 89 | DECLARE_INSTANCE_CHECKER(struct pci_vmsvga_state_s, VMWARE_SVGA, |
| 90 | TYPE_VMWARE_SVGA) |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 91 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 92 | struct pci_vmsvga_state_s { |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 93 | /*< private >*/ |
| 94 | PCIDevice parent_obj; |
| 95 | /*< public >*/ |
| 96 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 97 | struct vmsvga_state_s chip; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 98 | MemoryRegion io_bar; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 99 | }; |
| 100 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 101 | #define SVGA_MAGIC 0x900000UL |
| 102 | #define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver)) |
| 103 | #define SVGA_ID_0 SVGA_MAKE_ID(0) |
| 104 | #define SVGA_ID_1 SVGA_MAKE_ID(1) |
| 105 | #define SVGA_ID_2 SVGA_MAKE_ID(2) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 106 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 107 | #define SVGA_LEGACY_BASE_PORT 0x4560 |
| 108 | #define SVGA_INDEX_PORT 0x0 |
| 109 | #define SVGA_VALUE_PORT 0x1 |
| 110 | #define SVGA_BIOS_PORT 0x2 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 111 | |
| 112 | #define SVGA_VERSION_2 |
| 113 | |
| 114 | #ifdef SVGA_VERSION_2 |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 115 | # define SVGA_ID SVGA_ID_2 |
| 116 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 117 | # define SVGA_IO_MUL 1 |
| 118 | # define SVGA_FIFO_SIZE 0x10000 |
| 119 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA2 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 120 | #else |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 121 | # define SVGA_ID SVGA_ID_1 |
| 122 | # define SVGA_IO_BASE SVGA_LEGACY_BASE_PORT |
| 123 | # define SVGA_IO_MUL 4 |
| 124 | # define SVGA_FIFO_SIZE 0x10000 |
| 125 | # define SVGA_PCI_DEVICE_ID PCI_DEVICE_ID_VMWARE_SVGA |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 126 | #endif |
| 127 | |
| 128 | enum { |
| 129 | /* ID 0, 1 and 2 registers */ |
| 130 | SVGA_REG_ID = 0, |
| 131 | SVGA_REG_ENABLE = 1, |
| 132 | SVGA_REG_WIDTH = 2, |
| 133 | SVGA_REG_HEIGHT = 3, |
| 134 | SVGA_REG_MAX_WIDTH = 4, |
| 135 | SVGA_REG_MAX_HEIGHT = 5, |
| 136 | SVGA_REG_DEPTH = 6, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 137 | SVGA_REG_BITS_PER_PIXEL = 7, /* Current bpp in the guest */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 138 | SVGA_REG_PSEUDOCOLOR = 8, |
| 139 | SVGA_REG_RED_MASK = 9, |
| 140 | SVGA_REG_GREEN_MASK = 10, |
| 141 | SVGA_REG_BLUE_MASK = 11, |
| 142 | SVGA_REG_BYTES_PER_LINE = 12, |
| 143 | SVGA_REG_FB_START = 13, |
| 144 | SVGA_REG_FB_OFFSET = 14, |
| 145 | SVGA_REG_VRAM_SIZE = 15, |
| 146 | SVGA_REG_FB_SIZE = 16, |
| 147 | |
| 148 | /* ID 1 and 2 registers */ |
| 149 | SVGA_REG_CAPABILITIES = 17, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 150 | SVGA_REG_MEM_START = 18, /* Memory for command FIFO */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 151 | SVGA_REG_MEM_SIZE = 19, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 152 | SVGA_REG_CONFIG_DONE = 20, /* Set when memory area configured */ |
| 153 | SVGA_REG_SYNC = 21, /* Write to force synchronization */ |
| 154 | SVGA_REG_BUSY = 22, /* Read to check if sync is done */ |
| 155 | SVGA_REG_GUEST_ID = 23, /* Set guest OS identifier */ |
| 156 | SVGA_REG_CURSOR_ID = 24, /* ID of cursor */ |
| 157 | SVGA_REG_CURSOR_X = 25, /* Set cursor X position */ |
| 158 | SVGA_REG_CURSOR_Y = 26, /* Set cursor Y position */ |
| 159 | SVGA_REG_CURSOR_ON = 27, /* Turn cursor on/off */ |
| 160 | SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* Current bpp in the host */ |
| 161 | SVGA_REG_SCRATCH_SIZE = 29, /* Number of scratch registers */ |
| 162 | SVGA_REG_MEM_REGS = 30, /* Number of FIFO registers */ |
| 163 | SVGA_REG_NUM_DISPLAYS = 31, /* Number of guest displays */ |
| 164 | SVGA_REG_PITCHLOCK = 32, /* Fixed pitch for all modes */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 165 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 166 | SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 167 | SVGA_PALETTE_END = SVGA_PALETTE_BASE + 767, |
| 168 | SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + 768, |
| 169 | }; |
| 170 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 171 | #define SVGA_CAP_NONE 0 |
| 172 | #define SVGA_CAP_RECT_FILL (1 << 0) |
| 173 | #define SVGA_CAP_RECT_COPY (1 << 1) |
| 174 | #define SVGA_CAP_RECT_PAT_FILL (1 << 2) |
| 175 | #define SVGA_CAP_LEGACY_OFFSCREEN (1 << 3) |
| 176 | #define SVGA_CAP_RASTER_OP (1 << 4) |
| 177 | #define SVGA_CAP_CURSOR (1 << 5) |
| 178 | #define SVGA_CAP_CURSOR_BYPASS (1 << 6) |
| 179 | #define SVGA_CAP_CURSOR_BYPASS_2 (1 << 7) |
| 180 | #define SVGA_CAP_8BIT_EMULATION (1 << 8) |
| 181 | #define SVGA_CAP_ALPHA_CURSOR (1 << 9) |
| 182 | #define SVGA_CAP_GLYPH (1 << 10) |
| 183 | #define SVGA_CAP_GLYPH_CLIPPING (1 << 11) |
| 184 | #define SVGA_CAP_OFFSCREEN_1 (1 << 12) |
| 185 | #define SVGA_CAP_ALPHA_BLEND (1 << 13) |
| 186 | #define SVGA_CAP_3D (1 << 14) |
| 187 | #define SVGA_CAP_EXTENDED_FIFO (1 << 15) |
| 188 | #define SVGA_CAP_MULTIMON (1 << 16) |
| 189 | #define SVGA_CAP_PITCHLOCK (1 << 17) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 190 | |
| 191 | /* |
| 192 | * FIFO offsets (seen as an array of 32-bit words) |
| 193 | */ |
| 194 | enum { |
| 195 | /* |
| 196 | * The original defined FIFO offsets |
| 197 | */ |
| 198 | SVGA_FIFO_MIN = 0, |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 199 | SVGA_FIFO_MAX, /* The distance from MIN to MAX must be at least 10K */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 200 | SVGA_FIFO_NEXT, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 201 | SVGA_FIFO_STOP, |
| 202 | |
| 203 | /* |
| 204 | * Additional offsets added as of SVGA_CAP_EXTENDED_FIFO |
| 205 | */ |
| 206 | SVGA_FIFO_CAPABILITIES = 4, |
| 207 | SVGA_FIFO_FLAGS, |
| 208 | SVGA_FIFO_FENCE, |
| 209 | SVGA_FIFO_3D_HWVERSION, |
| 210 | SVGA_FIFO_PITCHLOCK, |
| 211 | }; |
| 212 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 213 | #define SVGA_FIFO_CAP_NONE 0 |
| 214 | #define SVGA_FIFO_CAP_FENCE (1 << 0) |
| 215 | #define SVGA_FIFO_CAP_ACCELFRONT (1 << 1) |
| 216 | #define SVGA_FIFO_CAP_PITCHLOCK (1 << 2) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 217 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 218 | #define SVGA_FIFO_FLAG_NONE 0 |
| 219 | #define SVGA_FIFO_FLAG_ACCELFRONT (1 << 0) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 220 | |
| 221 | /* These values can probably be changed arbitrarily. */ |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 222 | #define SVGA_SCRATCH_SIZE 0x8000 |
Peter Lieven | 2f487a3d | 2014-03-17 18:38:58 +0100 | [diff] [blame] | 223 | #define SVGA_MAX_WIDTH ROUND_UP(2360, VNC_DIRTY_PIXELS_PER_BIT) |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 224 | #define SVGA_MAX_HEIGHT 1770 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 225 | |
| 226 | #ifdef VERBOSE |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 227 | # define GUEST_OS_BASE 0x5001 |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 228 | static const char *vmsvga_guest_id[] = { |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 229 | [0x00] = "Dos", |
| 230 | [0x01] = "Windows 3.1", |
| 231 | [0x02] = "Windows 95", |
| 232 | [0x03] = "Windows 98", |
| 233 | [0x04] = "Windows ME", |
| 234 | [0x05] = "Windows NT", |
| 235 | [0x06] = "Windows 2000", |
| 236 | [0x07] = "Linux", |
| 237 | [0x08] = "OS/2", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 238 | [0x09] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 239 | [0x0a] = "BSD", |
| 240 | [0x0b] = "Whistler", |
blueswir1 | 511d2b1 | 2009-03-07 15:32:56 +0000 | [diff] [blame] | 241 | [0x0c] = "an unknown OS", |
| 242 | [0x0d] = "an unknown OS", |
| 243 | [0x0e] = "an unknown OS", |
| 244 | [0x0f] = "an unknown OS", |
| 245 | [0x10] = "an unknown OS", |
| 246 | [0x11] = "an unknown OS", |
| 247 | [0x12] = "an unknown OS", |
| 248 | [0x13] = "an unknown OS", |
| 249 | [0x14] = "an unknown OS", |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 250 | [0x15] = "Windows 2003", |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 251 | }; |
| 252 | #endif |
| 253 | |
| 254 | enum { |
| 255 | SVGA_CMD_INVALID_CMD = 0, |
| 256 | SVGA_CMD_UPDATE = 1, |
| 257 | SVGA_CMD_RECT_FILL = 2, |
| 258 | SVGA_CMD_RECT_COPY = 3, |
| 259 | SVGA_CMD_DEFINE_BITMAP = 4, |
| 260 | SVGA_CMD_DEFINE_BITMAP_SCANLINE = 5, |
| 261 | SVGA_CMD_DEFINE_PIXMAP = 6, |
| 262 | SVGA_CMD_DEFINE_PIXMAP_SCANLINE = 7, |
| 263 | SVGA_CMD_RECT_BITMAP_FILL = 8, |
| 264 | SVGA_CMD_RECT_PIXMAP_FILL = 9, |
| 265 | SVGA_CMD_RECT_BITMAP_COPY = 10, |
| 266 | SVGA_CMD_RECT_PIXMAP_COPY = 11, |
| 267 | SVGA_CMD_FREE_OBJECT = 12, |
| 268 | SVGA_CMD_RECT_ROP_FILL = 13, |
| 269 | SVGA_CMD_RECT_ROP_COPY = 14, |
| 270 | SVGA_CMD_RECT_ROP_BITMAP_FILL = 15, |
| 271 | SVGA_CMD_RECT_ROP_PIXMAP_FILL = 16, |
| 272 | SVGA_CMD_RECT_ROP_BITMAP_COPY = 17, |
| 273 | SVGA_CMD_RECT_ROP_PIXMAP_COPY = 18, |
| 274 | SVGA_CMD_DEFINE_CURSOR = 19, |
| 275 | SVGA_CMD_DISPLAY_CURSOR = 20, |
| 276 | SVGA_CMD_MOVE_CURSOR = 21, |
| 277 | SVGA_CMD_DEFINE_ALPHA_CURSOR = 22, |
| 278 | SVGA_CMD_DRAW_GLYPH = 23, |
| 279 | SVGA_CMD_DRAW_GLYPH_CLIPPED = 24, |
| 280 | SVGA_CMD_UPDATE_VERBOSE = 25, |
| 281 | SVGA_CMD_SURFACE_FILL = 26, |
| 282 | SVGA_CMD_SURFACE_COPY = 27, |
| 283 | SVGA_CMD_SURFACE_ALPHA_BLEND = 28, |
| 284 | SVGA_CMD_FRONT_ROP_FILL = 29, |
| 285 | SVGA_CMD_FENCE = 30, |
| 286 | }; |
| 287 | |
| 288 | /* Legal values for the SVGA_REG_CURSOR_ON register in cursor bypass mode */ |
| 289 | enum { |
| 290 | SVGA_CURSOR_ON_HIDE = 0, |
| 291 | SVGA_CURSOR_ON_SHOW = 1, |
| 292 | SVGA_CURSOR_ON_REMOVE_FROM_FB = 2, |
| 293 | SVGA_CURSOR_ON_RESTORE_TO_FB = 3, |
| 294 | }; |
| 295 | |
Gerd Hoffmann | 0725890 | 2014-10-06 11:51:54 +0200 | [diff] [blame] | 296 | static inline bool vmsvga_verify_rect(DisplaySurface *surface, |
| 297 | const char *name, |
| 298 | int x, int y, int w, int h) |
| 299 | { |
| 300 | if (x < 0) { |
| 301 | fprintf(stderr, "%s: x was < 0 (%d)\n", name, x); |
| 302 | return false; |
| 303 | } |
| 304 | if (x > SVGA_MAX_WIDTH) { |
| 305 | fprintf(stderr, "%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x); |
| 306 | return false; |
| 307 | } |
| 308 | if (w < 0) { |
| 309 | fprintf(stderr, "%s: w was < 0 (%d)\n", name, w); |
| 310 | return false; |
| 311 | } |
| 312 | if (w > SVGA_MAX_WIDTH) { |
| 313 | fprintf(stderr, "%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w); |
| 314 | return false; |
| 315 | } |
| 316 | if (x + w > surface_width(surface)) { |
| 317 | fprintf(stderr, "%s: width was > %d (x: %d, w: %d)\n", |
| 318 | name, surface_width(surface), x, w); |
| 319 | return false; |
| 320 | } |
| 321 | |
| 322 | if (y < 0) { |
| 323 | fprintf(stderr, "%s: y was < 0 (%d)\n", name, y); |
| 324 | return false; |
| 325 | } |
| 326 | if (y > SVGA_MAX_HEIGHT) { |
| 327 | fprintf(stderr, "%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y); |
| 328 | return false; |
| 329 | } |
| 330 | if (h < 0) { |
| 331 | fprintf(stderr, "%s: h was < 0 (%d)\n", name, h); |
| 332 | return false; |
| 333 | } |
| 334 | if (h > SVGA_MAX_HEIGHT) { |
| 335 | fprintf(stderr, "%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h); |
| 336 | return false; |
| 337 | } |
| 338 | if (y + h > surface_height(surface)) { |
| 339 | fprintf(stderr, "%s: update height > %d (y: %d, h: %d)\n", |
| 340 | name, surface_height(surface), y, h); |
| 341 | return false; |
| 342 | } |
| 343 | |
| 344 | return true; |
| 345 | } |
| 346 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 347 | static inline void vmsvga_update_rect(struct vmsvga_state_s *s, |
Gerd Hoffmann | 0725890 | 2014-10-06 11:51:54 +0200 | [diff] [blame] | 348 | int x, int y, int w, int h) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 349 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 350 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
balrog | a8fbaf9 | 2008-03-06 20:43:34 +0000 | [diff] [blame] | 351 | int line; |
| 352 | int bypl; |
| 353 | int width; |
| 354 | int start; |
| 355 | uint8_t *src; |
| 356 | uint8_t *dst; |
| 357 | |
Gerd Hoffmann | 1735fe1 | 2014-10-06 11:58:22 +0200 | [diff] [blame] | 358 | if (!vmsvga_verify_rect(surface, __func__, x, y, w, h)) { |
| 359 | /* go for a fullscreen update as fallback */ |
Michael Tokarev | 8cb6bfb | 2013-01-25 21:23:24 +0400 | [diff] [blame] | 360 | x = 0; |
Michael Tokarev | 8cb6bfb | 2013-01-25 21:23:24 +0400 | [diff] [blame] | 361 | y = 0; |
Gerd Hoffmann | 1735fe1 | 2014-10-06 11:58:22 +0200 | [diff] [blame] | 362 | w = surface_width(surface); |
| 363 | h = surface_height(surface); |
balrog | a8fbaf9 | 2008-03-06 20:43:34 +0000 | [diff] [blame] | 364 | } |
| 365 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 366 | bypl = surface_stride(surface); |
| 367 | width = surface_bytes_per_pixel(surface) * w; |
| 368 | start = surface_bytes_per_pixel(surface) * x + bypl * y; |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 369 | src = s->vga.vram_ptr + start; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 370 | dst = surface_data(surface) + start; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 371 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 372 | for (line = h; line > 0; line--, src += bypl, dst += bypl) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 373 | memcpy(dst, src, width); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 374 | } |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 375 | dpy_gfx_update(s->vga.con, x, y, w, h); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 376 | } |
| 377 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 378 | static inline void vmsvga_update_rect_delayed(struct vmsvga_state_s *s, |
| 379 | int x, int y, int w, int h) |
| 380 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 381 | struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++]; |
| 382 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 383 | s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1; |
| 384 | rect->x = x; |
| 385 | rect->y = y; |
| 386 | rect->w = w; |
| 387 | rect->h = h; |
| 388 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 389 | |
| 390 | static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) |
| 391 | { |
| 392 | struct vmsvga_rect_s *rect; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 393 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 394 | if (s->invalidated) { |
| 395 | s->redraw_fifo_first = s->redraw_fifo_last; |
| 396 | return; |
| 397 | } |
| 398 | /* Overlapping region updates can be optimised out here - if someone |
| 399 | * knows a smart algorithm to do that, please share. */ |
| 400 | while (s->redraw_fifo_first != s->redraw_fifo_last) { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 401 | rect = &s->redraw_fifo[s->redraw_fifo_first++]; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 402 | s->redraw_fifo_first &= REDRAW_FIFO_LEN - 1; |
| 403 | vmsvga_update_rect(s, rect->x, rect->y, rect->w, rect->h); |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | #ifdef HW_RECT_ACCEL |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 408 | static inline int vmsvga_copy_rect(struct vmsvga_state_s *s, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 409 | int x0, int y0, int x1, int y1, int w, int h) |
| 410 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 411 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
Avi Kivity | 4e12cd9 | 2009-05-03 22:25:16 +0300 | [diff] [blame] | 412 | uint8_t *vram = s->vga.vram_ptr; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 413 | int bypl = surface_stride(surface); |
| 414 | int bypp = surface_bytes_per_pixel(surface); |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 415 | int width = bypp * w; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 416 | int line = h; |
| 417 | uint8_t *ptr[2]; |
| 418 | |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 419 | if (!vmsvga_verify_rect(surface, "vmsvga_copy_rect/src", x0, y0, w, h)) { |
| 420 | return -1; |
| 421 | } |
| 422 | if (!vmsvga_verify_rect(surface, "vmsvga_copy_rect/dst", x1, y1, w, h)) { |
| 423 | return -1; |
| 424 | } |
| 425 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 426 | if (y1 > y0) { |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 427 | ptr[0] = vram + bypp * x0 + bypl * (y0 + h - 1); |
| 428 | ptr[1] = vram + bypp * x1 + bypl * (y1 + h - 1); |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 429 | for (; line > 0; line --, ptr[0] -= bypl, ptr[1] -= bypl) { |
| 430 | memmove(ptr[1], ptr[0], width); |
| 431 | } |
| 432 | } else { |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 433 | ptr[0] = vram + bypp * x0 + bypl * y0; |
| 434 | ptr[1] = vram + bypp * x1 + bypl * y1; |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 435 | for (; line > 0; line --, ptr[0] += bypl, ptr[1] += bypl) { |
| 436 | memmove(ptr[1], ptr[0], width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 437 | } |
| 438 | } |
| 439 | |
| 440 | vmsvga_update_rect_delayed(s, x1, y1, w, h); |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 441 | return 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 442 | } |
| 443 | #endif |
| 444 | |
| 445 | #ifdef HW_FILL_ACCEL |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 446 | static inline int vmsvga_fill_rect(struct vmsvga_state_s *s, |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 447 | uint32_t c, int x, int y, int w, int h) |
| 448 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 449 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
| 450 | int bypl = surface_stride(surface); |
| 451 | int width = surface_bytes_per_pixel(surface) * w; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 452 | int line = h; |
| 453 | int column; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 454 | uint8_t *fst; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 455 | uint8_t *dst; |
| 456 | uint8_t *src; |
| 457 | uint8_t col[4]; |
| 458 | |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 459 | if (!vmsvga_verify_rect(surface, __func__, x, y, w, h)) { |
| 460 | return -1; |
| 461 | } |
| 462 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 463 | col[0] = c; |
| 464 | col[1] = c >> 8; |
| 465 | col[2] = c >> 16; |
| 466 | col[3] = c >> 24; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 467 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 468 | fst = s->vga.vram_ptr + surface_bytes_per_pixel(surface) * x + bypl * y; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 469 | |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 470 | if (line--) { |
| 471 | dst = fst; |
| 472 | src = col; |
| 473 | for (column = width; column > 0; column--) { |
| 474 | *(dst++) = *(src++); |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 475 | if (src - col == surface_bytes_per_pixel(surface)) { |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 476 | src = col; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 477 | } |
Jan Kiszka | 8d121d4 | 2011-08-22 19:12:10 +0200 | [diff] [blame] | 478 | } |
| 479 | dst = fst; |
| 480 | for (; line > 0; line--) { |
| 481 | dst += bypl; |
| 482 | memcpy(dst, fst, width); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 483 | } |
| 484 | } |
| 485 | |
| 486 | vmsvga_update_rect_delayed(s, x, y, w, h); |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 487 | return 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 488 | } |
| 489 | #endif |
| 490 | |
| 491 | struct vmsvga_cursor_definition_s { |
Gerd Hoffmann | 5829b09 | 2015-09-29 09:58:05 +0200 | [diff] [blame] | 492 | uint32_t width; |
| 493 | uint32_t height; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 494 | int id; |
Gerd Hoffmann | 5829b09 | 2015-09-29 09:58:05 +0200 | [diff] [blame] | 495 | uint32_t bpp; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 496 | int hot_x; |
| 497 | int hot_y; |
| 498 | uint32_t mask[1024]; |
Dave Airlie | 8095cb3 | 2009-12-18 08:08:11 +1000 | [diff] [blame] | 499 | uint32_t image[4096]; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 500 | }; |
| 501 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 502 | #define SVGA_BITMAP_SIZE(w, h) ((((w) + 31) >> 5) * (h)) |
| 503 | #define SVGA_PIXMAP_SIZE(w, h, bpp) (((((w) * (bpp)) + 31) >> 5) * (h)) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 504 | |
| 505 | #ifdef HW_MOUSE_ACCEL |
| 506 | static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, |
| 507 | struct vmsvga_cursor_definition_s *c) |
| 508 | { |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 509 | QEMUCursor *qc; |
| 510 | int i, pixels; |
| 511 | |
| 512 | qc = cursor_alloc(c->width, c->height); |
| 513 | qc->hot_x = c->hot_x; |
| 514 | qc->hot_y = c->hot_y; |
| 515 | switch (c->bpp) { |
| 516 | case 1: |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 517 | cursor_set_mono(qc, 0xffffff, 0x000000, (void *)c->image, |
| 518 | 1, (void *)c->mask); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 519 | #ifdef DEBUG |
| 520 | cursor_print_ascii_art(qc, "vmware/mono"); |
| 521 | #endif |
| 522 | break; |
| 523 | case 32: |
| 524 | /* fill alpha channel from mask, set color to zero */ |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 525 | cursor_set_mono(qc, 0x000000, 0x000000, (void *)c->mask, |
| 526 | 1, (void *)c->mask); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 527 | /* add in rgb values */ |
| 528 | pixels = c->width * c->height; |
| 529 | for (i = 0; i < pixels; i++) { |
| 530 | qc->data[i] |= c->image[i] & 0xffffff; |
| 531 | } |
| 532 | #ifdef DEBUG |
| 533 | cursor_print_ascii_art(qc, "vmware/32bit"); |
| 534 | #endif |
| 535 | break; |
| 536 | default: |
| 537 | fprintf(stderr, "%s: unhandled bpp %d, using fallback cursor\n", |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 538 | __func__, c->bpp); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 539 | cursor_put(qc); |
| 540 | qc = cursor_builtin_left_ptr(); |
| 541 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 542 | |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 543 | dpy_cursor_define(s->vga.con, qc); |
Gerd Hoffmann | fbe6d7a | 2010-05-21 11:54:33 +0200 | [diff] [blame] | 544 | cursor_put(qc); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 545 | } |
| 546 | #endif |
| 547 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 548 | static inline int vmsvga_fifo_length(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 549 | { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 550 | int num; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 551 | |
| 552 | if (!s->config || !s->enable) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 553 | return 0; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 554 | } |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 555 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 556 | s->fifo_min = le32_to_cpu(s->fifo[SVGA_FIFO_MIN]); |
| 557 | s->fifo_max = le32_to_cpu(s->fifo[SVGA_FIFO_MAX]); |
| 558 | s->fifo_next = le32_to_cpu(s->fifo[SVGA_FIFO_NEXT]); |
| 559 | s->fifo_stop = le32_to_cpu(s->fifo[SVGA_FIFO_STOP]); |
| 560 | |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 561 | /* Check range and alignment. */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 562 | if ((s->fifo_min | s->fifo_max | s->fifo_next | s->fifo_stop) & 3) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 563 | return 0; |
| 564 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 565 | if (s->fifo_min < sizeof(uint32_t) * 4) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 566 | return 0; |
| 567 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 568 | if (s->fifo_max > SVGA_FIFO_SIZE || |
| 569 | s->fifo_min >= SVGA_FIFO_SIZE || |
| 570 | s->fifo_stop >= SVGA_FIFO_SIZE || |
| 571 | s->fifo_next >= SVGA_FIFO_SIZE) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 572 | return 0; |
| 573 | } |
Philippe Mathieu-Daudé | f0353b0 | 2018-06-25 09:42:06 -0300 | [diff] [blame] | 574 | if (s->fifo_max < s->fifo_min + 10 * KiB) { |
Gerd Hoffmann | 5213602 | 2016-05-30 09:09:18 +0200 | [diff] [blame] | 575 | return 0; |
| 576 | } |
| 577 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 578 | num = s->fifo_next - s->fifo_stop; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 579 | if (num < 0) { |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 580 | num += s->fifo_max - s->fifo_min; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 581 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 582 | return num >> 2; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 583 | } |
| 584 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 585 | static inline uint32_t vmsvga_fifo_read_raw(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 586 | { |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 587 | uint32_t cmd = s->fifo[s->fifo_stop >> 2]; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 588 | |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 589 | s->fifo_stop += 4; |
| 590 | if (s->fifo_stop >= s->fifo_max) { |
| 591 | s->fifo_stop = s->fifo_min; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 592 | } |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 593 | s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 594 | return cmd; |
| 595 | } |
| 596 | |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 597 | static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s) |
| 598 | { |
| 599 | return le32_to_cpu(vmsvga_fifo_read_raw(s)); |
| 600 | } |
| 601 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 602 | static void vmsvga_fifo_run(struct vmsvga_state_s *s) |
| 603 | { |
| 604 | uint32_t cmd, colour; |
Gerd Hoffmann | 4e68a0e | 2016-05-30 09:09:21 +0200 | [diff] [blame] | 605 | int args, len, maxloop = 1024; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 606 | int x, y, dx, dy, width, height; |
| 607 | struct vmsvga_cursor_definition_s cursor; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 608 | uint32_t cmd_start; |
| 609 | |
| 610 | len = vmsvga_fifo_length(s); |
Gerd Hoffmann | 4e68a0e | 2016-05-30 09:09:21 +0200 | [diff] [blame] | 611 | while (len > 0 && --maxloop > 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 612 | /* May need to go back to the start of the command if incomplete */ |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 613 | cmd_start = s->fifo_stop; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 614 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 615 | switch (cmd = vmsvga_fifo_read(s)) { |
| 616 | case SVGA_CMD_UPDATE: |
| 617 | case SVGA_CMD_UPDATE_VERBOSE: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 618 | len -= 5; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 619 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 620 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 621 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 622 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 623 | x = vmsvga_fifo_read(s); |
| 624 | y = vmsvga_fifo_read(s); |
| 625 | width = vmsvga_fifo_read(s); |
| 626 | height = vmsvga_fifo_read(s); |
| 627 | vmsvga_update_rect_delayed(s, x, y, width, height); |
| 628 | break; |
| 629 | |
| 630 | case SVGA_CMD_RECT_FILL: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 631 | len -= 6; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 632 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 633 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 634 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 635 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 636 | colour = vmsvga_fifo_read(s); |
| 637 | x = vmsvga_fifo_read(s); |
| 638 | y = vmsvga_fifo_read(s); |
| 639 | width = vmsvga_fifo_read(s); |
| 640 | height = vmsvga_fifo_read(s); |
| 641 | #ifdef HW_FILL_ACCEL |
Gerd Hoffmann | bd9ccd8 | 2014-10-06 11:59:51 +0200 | [diff] [blame] | 642 | if (vmsvga_fill_rect(s, colour, x, y, width, height) == 0) { |
| 643 | break; |
| 644 | } |
| 645 | #endif |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 646 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 647 | goto badcmd; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 648 | |
| 649 | case SVGA_CMD_RECT_COPY: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 650 | len -= 7; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 651 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 652 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 653 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 654 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 655 | x = vmsvga_fifo_read(s); |
| 656 | y = vmsvga_fifo_read(s); |
| 657 | dx = vmsvga_fifo_read(s); |
| 658 | dy = vmsvga_fifo_read(s); |
| 659 | width = vmsvga_fifo_read(s); |
| 660 | height = vmsvga_fifo_read(s); |
| 661 | #ifdef HW_RECT_ACCEL |
Gerd Hoffmann | 61b41b4 | 2014-10-06 11:58:51 +0200 | [diff] [blame] | 662 | if (vmsvga_copy_rect(s, x, y, dx, dy, width, height) == 0) { |
| 663 | break; |
| 664 | } |
| 665 | #endif |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 666 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 667 | goto badcmd; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 668 | |
| 669 | case SVGA_CMD_DEFINE_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 670 | len -= 8; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 671 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 672 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 673 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 674 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 675 | cursor.id = vmsvga_fifo_read(s); |
| 676 | cursor.hot_x = vmsvga_fifo_read(s); |
| 677 | cursor.hot_y = vmsvga_fifo_read(s); |
| 678 | cursor.width = x = vmsvga_fifo_read(s); |
| 679 | cursor.height = y = vmsvga_fifo_read(s); |
| 680 | vmsvga_fifo_read(s); |
| 681 | cursor.bpp = vmsvga_fifo_read(s); |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 682 | |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 683 | args = SVGA_BITMAP_SIZE(x, y) + SVGA_PIXMAP_SIZE(x, y, cursor.bpp); |
Prasad J Pandit | 167d97a | 2016-09-08 18:15:54 +0530 | [diff] [blame] | 684 | if (cursor.width > 256 |
| 685 | || cursor.height > 256 |
| 686 | || cursor.bpp > 32 |
Philippe Mathieu-Daudé | cf7040e | 2017-07-18 03:09:58 -0300 | [diff] [blame] | 687 | || SVGA_BITMAP_SIZE(x, y) > ARRAY_SIZE(cursor.mask) |
Prasad J Pandit | 167d97a | 2016-09-08 18:15:54 +0530 | [diff] [blame] | 688 | || SVGA_PIXMAP_SIZE(x, y, cursor.bpp) |
Philippe Mathieu-Daudé | cf7040e | 2017-07-18 03:09:58 -0300 | [diff] [blame] | 689 | > ARRAY_SIZE(cursor.image)) { |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 690 | goto badcmd; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 691 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 692 | |
| 693 | len -= args; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 694 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 695 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 696 | } |
Roland Dreier | f2d928d | 2010-01-05 20:43:34 -0800 | [diff] [blame] | 697 | |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 698 | for (args = 0; args < SVGA_BITMAP_SIZE(x, y); args++) { |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 699 | cursor.mask[args] = vmsvga_fifo_read_raw(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 700 | } |
| 701 | for (args = 0; args < SVGA_PIXMAP_SIZE(x, y, cursor.bpp); args++) { |
balrog | ff9cf2c | 2008-07-16 04:45:12 +0000 | [diff] [blame] | 702 | cursor.image[args] = vmsvga_fifo_read_raw(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 703 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 704 | #ifdef HW_MOUSE_ACCEL |
| 705 | vmsvga_cursor_define(s, &cursor); |
| 706 | break; |
| 707 | #else |
| 708 | args = 0; |
| 709 | goto badcmd; |
| 710 | #endif |
| 711 | |
| 712 | /* |
| 713 | * Other commands that we at least know the number of arguments |
| 714 | * for so we can avoid FIFO desync if driver uses them illegally. |
| 715 | */ |
| 716 | case SVGA_CMD_DEFINE_ALPHA_CURSOR: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 717 | len -= 6; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 718 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 719 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 720 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 721 | vmsvga_fifo_read(s); |
| 722 | vmsvga_fifo_read(s); |
| 723 | vmsvga_fifo_read(s); |
| 724 | x = vmsvga_fifo_read(s); |
| 725 | y = vmsvga_fifo_read(s); |
| 726 | args = x * y; |
| 727 | goto badcmd; |
| 728 | case SVGA_CMD_RECT_ROP_FILL: |
| 729 | args = 6; |
| 730 | goto badcmd; |
| 731 | case SVGA_CMD_RECT_ROP_COPY: |
| 732 | args = 7; |
| 733 | goto badcmd; |
| 734 | case SVGA_CMD_DRAW_GLYPH_CLIPPED: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 735 | len -= 4; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 736 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 737 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 738 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 739 | vmsvga_fifo_read(s); |
| 740 | vmsvga_fifo_read(s); |
| 741 | args = 7 + (vmsvga_fifo_read(s) >> 2); |
| 742 | goto badcmd; |
| 743 | case SVGA_CMD_SURFACE_ALPHA_BLEND: |
| 744 | args = 12; |
| 745 | goto badcmd; |
| 746 | |
| 747 | /* |
| 748 | * Other commands that are not listed as depending on any |
| 749 | * CAPABILITIES bits, but are not described in the README either. |
| 750 | */ |
| 751 | case SVGA_CMD_SURFACE_FILL: |
| 752 | case SVGA_CMD_SURFACE_COPY: |
| 753 | case SVGA_CMD_FRONT_ROP_FILL: |
| 754 | case SVGA_CMD_FENCE: |
| 755 | case SVGA_CMD_INVALID_CMD: |
| 756 | break; /* Nop */ |
| 757 | |
| 758 | default: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 759 | args = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 760 | badcmd: |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 761 | len -= args; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 762 | if (len < 0) { |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 763 | goto rewind; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 764 | } |
| 765 | while (args--) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 766 | vmsvga_fifo_read(s); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 767 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 768 | printf("%s: Unknown command 0x%02x in SVGA command FIFO\n", |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 769 | __func__, cmd); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 770 | break; |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 771 | |
| 772 | rewind: |
Gerd Hoffmann | 7e486f7 | 2016-05-30 09:09:20 +0200 | [diff] [blame] | 773 | s->fifo_stop = cmd_start; |
| 774 | s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop); |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 775 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 776 | } |
Andrzej Zaborowski | 4dedc07 | 2010-09-10 02:23:31 +0200 | [diff] [blame] | 777 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 778 | |
| 779 | s->syncing = 0; |
| 780 | } |
| 781 | |
| 782 | static uint32_t vmsvga_index_read(void *opaque, uint32_t address) |
| 783 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 784 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 785 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 786 | return s->index; |
| 787 | } |
| 788 | |
| 789 | static void vmsvga_index_write(void *opaque, uint32_t address, uint32_t index) |
| 790 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 791 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 792 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 793 | s->index = index; |
| 794 | } |
| 795 | |
| 796 | static uint32_t vmsvga_value_read(void *opaque, uint32_t address) |
| 797 | { |
| 798 | uint32_t caps; |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 799 | struct vmsvga_state_s *s = opaque; |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 800 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 801 | PixelFormat pf; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 802 | uint32_t ret; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 803 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 804 | switch (s->index) { |
| 805 | case SVGA_REG_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 806 | ret = s->svgaid; |
| 807 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 808 | |
| 809 | case SVGA_REG_ENABLE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 810 | ret = s->enable; |
| 811 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 812 | |
| 813 | case SVGA_REG_WIDTH: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 814 | ret = s->new_width ? s->new_width : surface_width(surface); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 815 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 816 | |
| 817 | case SVGA_REG_HEIGHT: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 818 | ret = s->new_height ? s->new_height : surface_height(surface); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 819 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 820 | |
| 821 | case SVGA_REG_MAX_WIDTH: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 822 | ret = SVGA_MAX_WIDTH; |
| 823 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 824 | |
| 825 | case SVGA_REG_MAX_HEIGHT: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 826 | ret = SVGA_MAX_HEIGHT; |
| 827 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 828 | |
| 829 | case SVGA_REG_DEPTH: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 830 | ret = (s->new_depth == 32) ? 24 : s->new_depth; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 831 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 832 | |
| 833 | case SVGA_REG_BITS_PER_PIXEL: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 834 | case SVGA_REG_HOST_BITS_PER_PIXEL: |
| 835 | ret = s->new_depth; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 836 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 837 | |
| 838 | case SVGA_REG_PSEUDOCOLOR: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 839 | ret = 0x0; |
| 840 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 841 | |
| 842 | case SVGA_REG_RED_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 843 | pf = qemu_default_pixelformat(s->new_depth); |
| 844 | ret = pf.rmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 845 | break; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 846 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 847 | case SVGA_REG_GREEN_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 848 | pf = qemu_default_pixelformat(s->new_depth); |
| 849 | ret = pf.gmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 850 | break; |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 851 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 852 | case SVGA_REG_BLUE_MASK: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 853 | pf = qemu_default_pixelformat(s->new_depth); |
| 854 | ret = pf.bmask; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 855 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 856 | |
| 857 | case SVGA_REG_BYTES_PER_LINE: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 858 | if (s->new_width) { |
| 859 | ret = (s->new_depth * s->new_width) / 8; |
| 860 | } else { |
| 861 | ret = surface_stride(surface); |
| 862 | } |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 863 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 864 | |
Avi Kivity | 7b619b9 | 2011-08-08 16:08:56 +0300 | [diff] [blame] | 865 | case SVGA_REG_FB_START: { |
| 866 | struct pci_vmsvga_state_s *pci_vmsvga |
| 867 | = container_of(s, struct pci_vmsvga_state_s, chip); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 868 | ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 1); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 869 | break; |
Avi Kivity | 7b619b9 | 2011-08-08 16:08:56 +0300 | [diff] [blame] | 870 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 871 | |
| 872 | case SVGA_REG_FB_OFFSET: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 873 | ret = 0x0; |
| 874 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 875 | |
| 876 | case SVGA_REG_VRAM_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 877 | ret = s->vga.vram_size; /* No physical VRAM besides the framebuffer */ |
| 878 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 879 | |
| 880 | case SVGA_REG_FB_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 881 | ret = s->vga.vram_size; |
| 882 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 883 | |
| 884 | case SVGA_REG_CAPABILITIES: |
| 885 | caps = SVGA_CAP_NONE; |
| 886 | #ifdef HW_RECT_ACCEL |
| 887 | caps |= SVGA_CAP_RECT_COPY; |
| 888 | #endif |
| 889 | #ifdef HW_FILL_ACCEL |
| 890 | caps |= SVGA_CAP_RECT_FILL; |
| 891 | #endif |
| 892 | #ifdef HW_MOUSE_ACCEL |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 893 | if (dpy_cursor_define_supported(s->vga.con)) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 894 | caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 | |
| 895 | SVGA_CAP_CURSOR_BYPASS; |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 896 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 897 | #endif |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 898 | ret = caps; |
| 899 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 900 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 901 | case SVGA_REG_MEM_START: { |
| 902 | struct pci_vmsvga_state_s *pci_vmsvga |
| 903 | = container_of(s, struct pci_vmsvga_state_s, chip); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 904 | ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 2); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 905 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 906 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 907 | |
| 908 | case SVGA_REG_MEM_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 909 | ret = s->fifo_size; |
| 910 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 911 | |
| 912 | case SVGA_REG_CONFIG_DONE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 913 | ret = s->config; |
| 914 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 915 | |
| 916 | case SVGA_REG_SYNC: |
| 917 | case SVGA_REG_BUSY: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 918 | ret = s->syncing; |
| 919 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 920 | |
| 921 | case SVGA_REG_GUEST_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 922 | ret = s->guest; |
| 923 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 924 | |
| 925 | case SVGA_REG_CURSOR_ID: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 926 | ret = s->cursor.id; |
| 927 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 928 | |
| 929 | case SVGA_REG_CURSOR_X: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 930 | ret = s->cursor.x; |
| 931 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 932 | |
| 933 | case SVGA_REG_CURSOR_Y: |
Nicolas Owens | e2bb4ae | 2014-06-08 22:19:17 -0700 | [diff] [blame] | 934 | ret = s->cursor.y; |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 935 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 936 | |
| 937 | case SVGA_REG_CURSOR_ON: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 938 | ret = s->cursor.on; |
| 939 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 940 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 941 | case SVGA_REG_SCRATCH_SIZE: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 942 | ret = s->scratch_size; |
| 943 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 944 | |
| 945 | case SVGA_REG_MEM_REGS: |
| 946 | case SVGA_REG_NUM_DISPLAYS: |
| 947 | case SVGA_REG_PITCHLOCK: |
| 948 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 949 | ret = 0; |
| 950 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 951 | |
| 952 | default: |
| 953 | if (s->index >= SVGA_SCRATCH_BASE && |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 954 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) { |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 955 | ret = s->scratch[s->index - SVGA_SCRATCH_BASE]; |
| 956 | break; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 957 | } |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 958 | qemu_log_mask(LOG_GUEST_ERROR, |
| 959 | "%s: Bad register %02x\n", __func__, s->index); |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 960 | ret = 0; |
| 961 | break; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 962 | } |
| 963 | |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 964 | if (s->index >= SVGA_SCRATCH_BASE) { |
| 965 | trace_vmware_scratch_read(s->index, ret); |
| 966 | } else if (s->index >= SVGA_PALETTE_BASE) { |
| 967 | trace_vmware_palette_read(s->index, ret); |
| 968 | } else { |
| 969 | trace_vmware_value_read(s->index, ret); |
| 970 | } |
| 971 | return ret; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 972 | } |
| 973 | |
| 974 | static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) |
| 975 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 976 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 977 | |
Gerd Hoffmann | 7a6404c | 2013-03-25 09:53:35 +0100 | [diff] [blame] | 978 | if (s->index >= SVGA_SCRATCH_BASE) { |
| 979 | trace_vmware_scratch_write(s->index, value); |
| 980 | } else if (s->index >= SVGA_PALETTE_BASE) { |
| 981 | trace_vmware_palette_write(s->index, value); |
| 982 | } else { |
| 983 | trace_vmware_value_write(s->index, value); |
| 984 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 985 | switch (s->index) { |
| 986 | case SVGA_REG_ID: |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 987 | if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 988 | s->svgaid = value; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 989 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 990 | break; |
| 991 | |
| 992 | case SVGA_REG_ENABLE: |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 993 | s->enable = !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 994 | s->invalidated = 1; |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 995 | s->vga.hw_ops->invalidate(&s->vga); |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 996 | if (s->enable && s->config) { |
Andrzej Zaborowski | 9f810be | 2010-09-10 02:30:04 +0200 | [diff] [blame] | 997 | vga_dirty_log_stop(&s->vga); |
| 998 | } else { |
| 999 | vga_dirty_log_start(&s->vga); |
| 1000 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1001 | break; |
| 1002 | |
| 1003 | case SVGA_REG_WIDTH: |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1004 | if (value <= SVGA_MAX_WIDTH) { |
| 1005 | s->new_width = value; |
| 1006 | s->invalidated = 1; |
| 1007 | } else { |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 1008 | qemu_log_mask(LOG_GUEST_ERROR, |
| 1009 | "%s: Bad width: %i\n", __func__, value); |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1010 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1011 | break; |
| 1012 | |
| 1013 | case SVGA_REG_HEIGHT: |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1014 | if (value <= SVGA_MAX_HEIGHT) { |
| 1015 | s->new_height = value; |
| 1016 | s->invalidated = 1; |
| 1017 | } else { |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 1018 | qemu_log_mask(LOG_GUEST_ERROR, |
| 1019 | "%s: Bad height: %i\n", __func__, value); |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1020 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1021 | break; |
| 1022 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1023 | case SVGA_REG_BITS_PER_PIXEL: |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1024 | if (value != 32) { |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 1025 | qemu_log_mask(LOG_GUEST_ERROR, |
| 1026 | "%s: Bad bits per pixel: %i bits\n", __func__, value); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1027 | s->config = 0; |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1028 | s->invalidated = 1; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1029 | } |
| 1030 | break; |
| 1031 | |
| 1032 | case SVGA_REG_CONFIG_DONE: |
| 1033 | if (value) { |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1034 | s->fifo = (uint32_t *) s->fifo_ptr; |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1035 | vga_dirty_log_stop(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1036 | } |
balrog | f707cfb | 2007-05-13 13:26:49 +0000 | [diff] [blame] | 1037 | s->config = !!value; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1038 | break; |
| 1039 | |
| 1040 | case SVGA_REG_SYNC: |
| 1041 | s->syncing = 1; |
| 1042 | vmsvga_fifo_run(s); /* Or should we just wait for update_display? */ |
| 1043 | break; |
| 1044 | |
| 1045 | case SVGA_REG_GUEST_ID: |
| 1046 | s->guest = value; |
| 1047 | #ifdef VERBOSE |
| 1048 | if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE + |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1049 | ARRAY_SIZE(vmsvga_guest_id)) { |
| 1050 | printf("%s: guest runs %s.\n", __func__, |
| 1051 | vmsvga_guest_id[value - GUEST_OS_BASE]); |
| 1052 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1053 | #endif |
| 1054 | break; |
| 1055 | |
| 1056 | case SVGA_REG_CURSOR_ID: |
| 1057 | s->cursor.id = value; |
| 1058 | break; |
| 1059 | |
| 1060 | case SVGA_REG_CURSOR_X: |
| 1061 | s->cursor.x = value; |
| 1062 | break; |
| 1063 | |
| 1064 | case SVGA_REG_CURSOR_Y: |
| 1065 | s->cursor.y = value; |
| 1066 | break; |
| 1067 | |
| 1068 | case SVGA_REG_CURSOR_ON: |
| 1069 | s->cursor.on |= (value == SVGA_CURSOR_ON_SHOW); |
| 1070 | s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); |
| 1071 | #ifdef HW_MOUSE_ACCEL |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 1072 | if (value <= SVGA_CURSOR_ON_SHOW) { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1073 | dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); |
Gerd Hoffmann | bf2fde7 | 2012-09-12 07:56:45 +0200 | [diff] [blame] | 1074 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1075 | #endif |
| 1076 | break; |
| 1077 | |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1078 | case SVGA_REG_DEPTH: |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1079 | case SVGA_REG_MEM_REGS: |
| 1080 | case SVGA_REG_NUM_DISPLAYS: |
| 1081 | case SVGA_REG_PITCHLOCK: |
| 1082 | case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: |
| 1083 | break; |
| 1084 | |
| 1085 | default: |
| 1086 | if (s->index >= SVGA_SCRATCH_BASE && |
| 1087 | s->index < SVGA_SCRATCH_BASE + s->scratch_size) { |
| 1088 | s->scratch[s->index - SVGA_SCRATCH_BASE] = value; |
| 1089 | break; |
| 1090 | } |
Philippe Mathieu-Daudé | aa0fd16 | 2020-05-26 08:22:48 +0200 | [diff] [blame] | 1091 | qemu_log_mask(LOG_GUEST_ERROR, |
| 1092 | "%s: Bad register %02x\n", __func__, s->index); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1093 | } |
| 1094 | } |
| 1095 | |
| 1096 | static uint32_t vmsvga_bios_read(void *opaque, uint32_t address) |
| 1097 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1098 | printf("%s: what are we supposed to return?\n", __func__); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1099 | return 0xcafe; |
| 1100 | } |
| 1101 | |
| 1102 | static void vmsvga_bios_write(void *opaque, uint32_t address, uint32_t data) |
| 1103 | { |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1104 | printf("%s: what are we supposed to do with (%08x)?\n", __func__, data); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1105 | } |
| 1106 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1107 | static inline void vmsvga_check_size(struct vmsvga_state_s *s) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1108 | { |
Gerd Hoffmann | c78f713 | 2013-03-05 15:24:14 +0100 | [diff] [blame] | 1109 | DisplaySurface *surface = qemu_console_surface(s->vga.con); |
| 1110 | |
| 1111 | if (s->new_width != surface_width(surface) || |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1112 | s->new_height != surface_height(surface) || |
| 1113 | s->new_depth != surface_bits_per_pixel(surface)) { |
| 1114 | int stride = (s->new_depth * s->new_width) / 8; |
Gerd Hoffmann | 30f1e66 | 2014-06-18 11:03:15 +0200 | [diff] [blame] | 1115 | pixman_format_code_t format = |
| 1116 | qemu_default_pixman_format(s->new_depth, true); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1117 | trace_vmware_setmode(s->new_width, s->new_height, s->new_depth); |
| 1118 | surface = qemu_create_displaysurface_from(s->new_width, s->new_height, |
Gerd Hoffmann | 30f1e66 | 2014-06-18 11:03:15 +0200 | [diff] [blame] | 1119 | format, stride, |
| 1120 | s->vga.vram_ptr); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1121 | dpy_gfx_replace_surface(s->vga.con, surface); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1122 | s->invalidated = 1; |
| 1123 | } |
| 1124 | } |
| 1125 | |
| 1126 | static void vmsvga_update_display(void *opaque) |
| 1127 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1128 | struct vmsvga_state_s *s = opaque; |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1129 | |
Gerd Hoffmann | 104bd1d | 2017-04-21 11:16:31 +0200 | [diff] [blame] | 1130 | if (!s->enable || !s->config) { |
| 1131 | /* in standard vga mode */ |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1132 | s->vga.hw_ops->gfx_update(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1133 | return; |
| 1134 | } |
| 1135 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1136 | vmsvga_check_size(s); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1137 | |
| 1138 | vmsvga_fifo_run(s); |
| 1139 | vmsvga_update_rect_flush(s); |
| 1140 | |
Gerd Hoffmann | 104bd1d | 2017-04-21 11:16:31 +0200 | [diff] [blame] | 1141 | if (s->invalidated) { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1142 | s->invalidated = 0; |
Gerd Hoffmann | 91155f8 | 2018-08-10 15:28:56 +0200 | [diff] [blame] | 1143 | dpy_gfx_update_full(s->vga.con); |
BALATON Zoltan | b51d7b2 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1144 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1145 | } |
| 1146 | |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 1147 | static void vmsvga_reset(DeviceState *dev) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1148 | { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1149 | struct pci_vmsvga_state_s *pci = VMWARE_SVGA(dev); |
Jan Kiszka | 8a9501b | 2011-08-22 19:12:08 +0200 | [diff] [blame] | 1150 | struct vmsvga_state_s *s = &pci->chip; |
| 1151 | |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1152 | s->index = 0; |
| 1153 | s->enable = 0; |
| 1154 | s->config = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1155 | s->svgaid = SVGA_ID; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1156 | s->cursor.on = 0; |
| 1157 | s->redraw_fifo_first = 0; |
| 1158 | s->redraw_fifo_last = 0; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1159 | s->syncing = 0; |
Anthony Liguori | b5cc6e3 | 2009-12-18 08:08:10 +1000 | [diff] [blame] | 1160 | |
| 1161 | vga_dirty_log_start(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1162 | } |
| 1163 | |
| 1164 | static void vmsvga_invalidate_display(void *opaque) |
| 1165 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1166 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1167 | if (!s->enable) { |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1168 | s->vga.hw_ops->invalidate(&s->vga); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1169 | return; |
| 1170 | } |
| 1171 | |
| 1172 | s->invalidated = 1; |
| 1173 | } |
| 1174 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1175 | static void vmsvga_text_update(void *opaque, console_ch_t *chardata) |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1176 | { |
Juan Quintela | 467d44b | 2009-10-14 17:49:08 +0200 | [diff] [blame] | 1177 | struct vmsvga_state_s *s = opaque; |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1178 | |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1179 | if (s->vga.hw_ops->text_update) { |
| 1180 | s->vga.hw_ops->text_update(&s->vga, chardata); |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1181 | } |
balrog | 4d3b6f6 | 2008-02-10 16:33:14 +0000 | [diff] [blame] | 1182 | } |
| 1183 | |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1184 | static int vmsvga_post_load(void *opaque, int version_id) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1185 | { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1186 | struct vmsvga_state_s *s = opaque; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1187 | |
| 1188 | s->invalidated = 1; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1189 | if (s->config) { |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1190 | s->fifo = (uint32_t *) s->fifo_ptr; |
BALATON Zoltan | 0d79379 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1191 | } |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1192 | return 0; |
| 1193 | } |
| 1194 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1195 | static const VMStateDescription vmstate_vmware_vga_internal = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1196 | .name = "vmware_vga_internal", |
| 1197 | .version_id = 0, |
| 1198 | .minimum_version_id = 0, |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1199 | .post_load = vmsvga_post_load, |
Juan Quintela | d49805a | 2014-04-16 15:32:32 +0200 | [diff] [blame] | 1200 | .fields = (VMStateField[]) { |
Halil Pasic | d2164ad | 2017-06-23 16:48:23 +0200 | [diff] [blame] | 1201 | VMSTATE_INT32_EQUAL(new_depth, struct vmsvga_state_s, NULL), |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1202 | VMSTATE_INT32(enable, struct vmsvga_state_s), |
| 1203 | VMSTATE_INT32(config, struct vmsvga_state_s), |
| 1204 | VMSTATE_INT32(cursor.id, struct vmsvga_state_s), |
| 1205 | VMSTATE_INT32(cursor.x, struct vmsvga_state_s), |
| 1206 | VMSTATE_INT32(cursor.y, struct vmsvga_state_s), |
| 1207 | VMSTATE_INT32(cursor.on, struct vmsvga_state_s), |
| 1208 | VMSTATE_INT32(index, struct vmsvga_state_s), |
| 1209 | VMSTATE_VARRAY_INT32(scratch, struct vmsvga_state_s, |
| 1210 | scratch_size, 0, vmstate_info_uint32, uint32_t), |
| 1211 | VMSTATE_INT32(new_width, struct vmsvga_state_s), |
| 1212 | VMSTATE_INT32(new_height, struct vmsvga_state_s), |
| 1213 | VMSTATE_UINT32(guest, struct vmsvga_state_s), |
| 1214 | VMSTATE_UINT32(svgaid, struct vmsvga_state_s), |
| 1215 | VMSTATE_INT32(syncing, struct vmsvga_state_s), |
BALATON Zoltan | 5b9575c | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1216 | VMSTATE_UNUSED(4), /* was fb_size */ |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1217 | VMSTATE_END_OF_LIST() |
| 1218 | } |
| 1219 | }; |
| 1220 | |
Blue Swirl | d05ac8f | 2009-12-04 20:44:44 +0000 | [diff] [blame] | 1221 | static const VMStateDescription vmstate_vmware_vga = { |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1222 | .name = "vmware_vga", |
| 1223 | .version_id = 0, |
| 1224 | .minimum_version_id = 0, |
Juan Quintela | d49805a | 2014-04-16 15:32:32 +0200 | [diff] [blame] | 1225 | .fields = (VMStateField[]) { |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1226 | VMSTATE_PCI_DEVICE(parent_obj, struct pci_vmsvga_state_s), |
Juan Quintela | bacbe28 | 2009-10-14 19:30:22 +0200 | [diff] [blame] | 1227 | VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0, |
| 1228 | vmstate_vmware_vga_internal, struct vmsvga_state_s), |
| 1229 | VMSTATE_END_OF_LIST() |
| 1230 | } |
| 1231 | }; |
| 1232 | |
Gerd Hoffmann | 380cd05 | 2013-03-13 14:04:18 +0100 | [diff] [blame] | 1233 | static const GraphicHwOps vmsvga_ops = { |
| 1234 | .invalidate = vmsvga_invalidate_display, |
| 1235 | .gfx_update = vmsvga_update_display, |
| 1236 | .text_update = vmsvga_text_update, |
| 1237 | }; |
| 1238 | |
Gerd Hoffmann | aa2beaa | 2013-04-17 10:21:27 +0200 | [diff] [blame] | 1239 | static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, |
Richard Henderson | 0a039dc | 2011-08-16 08:27:39 -0700 | [diff] [blame] | 1240 | MemoryRegion *address_space, MemoryRegion *io) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1241 | { |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1242 | s->scratch_size = SVGA_SCRATCH_SIZE; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1243 | s->scratch = g_malloc(s->scratch_size * 4); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1244 | |
Gerd Hoffmann | 5643706 | 2014-01-24 15:35:21 +0100 | [diff] [blame] | 1245 | s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); |
Andrzej Zaborowski | 4445b0a | 2009-08-23 19:00:58 +0200 | [diff] [blame] | 1246 | |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1247 | s->fifo_size = SVGA_FIFO_SIZE; |
Peter Maydell | 98a99ce | 2017-07-07 15:42:53 +0100 | [diff] [blame] | 1248 | memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, |
Markus Armbruster | f8ed85a | 2015-09-11 16:51:43 +0200 | [diff] [blame] | 1249 | &error_fatal); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1250 | s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1251 | |
Gerd Hoffmann | 1fcfdc4 | 2018-07-02 18:33:44 +0200 | [diff] [blame] | 1252 | vga_common_init(&s->vga, OBJECT(dev)); |
Paolo Bonzini | 712f0cc | 2013-06-06 21:21:13 -0400 | [diff] [blame] | 1253 | vga_init(&s->vga, OBJECT(dev), address_space, io, true); |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 1254 | vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); |
Gerd Hoffmann | eb2f9b0 | 2013-03-25 11:44:21 +0100 | [diff] [blame] | 1255 | s->new_depth = 32; |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1256 | } |
| 1257 | |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1258 | static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, unsigned size) |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1259 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1260 | struct vmsvga_state_s *s = opaque; |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1261 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1262 | switch (addr) { |
| 1263 | case SVGA_IO_MUL * SVGA_INDEX_PORT: return vmsvga_index_read(s, addr); |
| 1264 | case SVGA_IO_MUL * SVGA_VALUE_PORT: return vmsvga_value_read(s, addr); |
| 1265 | case SVGA_IO_MUL * SVGA_BIOS_PORT: return vmsvga_bios_read(s, addr); |
| 1266 | default: return -1u; |
| 1267 | } |
balrog | 1492a3c | 2008-01-14 01:52:52 +0000 | [diff] [blame] | 1268 | } |
| 1269 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1270 | static void vmsvga_io_write(void *opaque, hwaddr addr, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1271 | uint64_t data, unsigned size) |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1272 | { |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1273 | struct vmsvga_state_s *s = opaque; |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1274 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1275 | switch (addr) { |
| 1276 | case SVGA_IO_MUL * SVGA_INDEX_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1277 | vmsvga_index_write(s, addr, data); |
| 1278 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1279 | case SVGA_IO_MUL * SVGA_VALUE_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1280 | vmsvga_value_write(s, addr, data); |
| 1281 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1282 | case SVGA_IO_MUL * SVGA_BIOS_PORT: |
Blue Swirl | 0ed8b6f | 2012-07-08 06:56:53 +0000 | [diff] [blame] | 1283 | vmsvga_bios_write(s, addr, data); |
| 1284 | break; |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1285 | } |
balrog | 3016d80 | 2008-03-06 20:28:49 +0000 | [diff] [blame] | 1286 | } |
| 1287 | |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1288 | static const MemoryRegionOps vmsvga_io_ops = { |
| 1289 | .read = vmsvga_io_read, |
| 1290 | .write = vmsvga_io_write, |
| 1291 | .endianness = DEVICE_LITTLE_ENDIAN, |
| 1292 | .valid = { |
| 1293 | .min_access_size = 4, |
| 1294 | .max_access_size = 4, |
Jan Kiszka | 04e8cd5 | 2013-06-22 08:07:02 +0200 | [diff] [blame] | 1295 | .unaligned = true, |
| 1296 | }, |
| 1297 | .impl = { |
| 1298 | .unaligned = true, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1299 | }, |
| 1300 | }; |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1301 | |
Markus Armbruster | 9af21db | 2015-01-19 15:52:30 +0100 | [diff] [blame] | 1302 | static void pci_vmsvga_realize(PCIDevice *dev, Error **errp) |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1303 | { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1304 | struct pci_vmsvga_state_s *s = VMWARE_SVGA(dev); |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1305 | |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1306 | dev->config[PCI_CACHE_LINE_SIZE] = 0x08; |
| 1307 | dev->config[PCI_LATENCY_TIMER] = 0x40; |
| 1308 | dev->config[PCI_INTERRUPT_LINE] = 0xff; /* End */ |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1309 | |
Philippe Mathieu-Daudé | becce5e | 2020-05-26 08:22:49 +0200 | [diff] [blame] | 1310 | memory_region_init_io(&s->io_bar, OBJECT(dev), &vmsvga_io_ops, &s->chip, |
Avi Kivity | b195043 | 2011-08-08 16:08:57 +0300 | [diff] [blame] | 1311 | "vmsvga-io", 0x10); |
Jan Kiszka | bd8f2f5 | 2012-08-23 13:02:33 +0200 | [diff] [blame] | 1312 | memory_region_set_flush_coalesced(&s->io_bar); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1313 | pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar); |
Dave Airlie | f351d05 | 2009-12-18 08:08:06 +1000 | [diff] [blame] | 1314 | |
Gerd Hoffmann | aa2beaa | 2013-04-17 10:21:27 +0200 | [diff] [blame] | 1315 | vmsvga_init(DEVICE(dev), &s->chip, |
| 1316 | pci_address_space(dev), pci_address_space_io(dev)); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1317 | |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1318 | pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, |
BALATON Zoltan | aa32b38 | 2012-11-03 12:47:08 +0100 | [diff] [blame] | 1319 | &s->chip.vga.vram); |
Andreas Färber | af21c74 | 2013-06-30 15:01:36 +0200 | [diff] [blame] | 1320 | pci_register_bar(dev, 2, PCI_BASE_ADDRESS_MEM_PREFETCH, |
Avi Kivity | e824b2c | 2011-08-08 16:09:31 +0300 | [diff] [blame] | 1321 | &s->chip.fifo_ram); |
ths | d34cab9 | 2007-04-02 01:10:46 +0000 | [diff] [blame] | 1322 | } |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1323 | |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1324 | static Property vga_vmware_properties[] = { |
| 1325 | DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s, |
Gerd Hoffmann | 9e56edc | 2012-06-11 10:42:53 +0200 | [diff] [blame] | 1326 | chip.vga.vram_size_mb, 16), |
Gerd Hoffmann | 1fcfdc4 | 2018-07-02 18:33:44 +0200 | [diff] [blame] | 1327 | DEFINE_PROP_BOOL("global-vmstate", struct pci_vmsvga_state_s, |
| 1328 | chip.vga.global_vmstate, false), |
Gerd Hoffmann | 4a1e244 | 2012-05-24 09:59:44 +0200 | [diff] [blame] | 1329 | DEFINE_PROP_END_OF_LIST(), |
| 1330 | }; |
| 1331 | |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1332 | static void vmsvga_class_init(ObjectClass *klass, void *data) |
| 1333 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1334 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1335 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
Isaku Yamahata | 310faae | 2011-05-25 10:58:04 +0900 | [diff] [blame] | 1336 | |
Markus Armbruster | 9af21db | 2015-01-19 15:52:30 +0100 | [diff] [blame] | 1337 | k->realize = pci_vmsvga_realize; |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1338 | k->romfile = "vgabios-vmware.bin"; |
| 1339 | k->vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1340 | k->device_id = SVGA_PCI_DEVICE_ID; |
| 1341 | k->class_id = PCI_CLASS_DISPLAY_VGA; |
| 1342 | k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE; |
| 1343 | k->subsystem_id = SVGA_PCI_DEVICE_ID; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1344 | dc->reset = vmsvga_reset; |
| 1345 | dc->vmsd = &vmstate_vmware_vga; |
Marc-André Lureau | 4f67d30 | 2020-01-10 19:30:32 +0400 | [diff] [blame] | 1346 | device_class_set_props(dc, vga_vmware_properties); |
Igor Mammedov | 2897ae0 | 2014-02-05 16:36:48 +0100 | [diff] [blame] | 1347 | dc->hotpluggable = false; |
Marcel Apfelbaum | 125ee0e | 2013-07-29 17:17:45 +0300 | [diff] [blame] | 1348 | set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); |
Anthony Liguori | 40021f0 | 2011-12-04 12:22:06 -0600 | [diff] [blame] | 1349 | } |
| 1350 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 1351 | static const TypeInfo vmsvga_info = { |
Peter Crosthwaite | 39d4598 | 2013-06-24 16:58:45 +1000 | [diff] [blame] | 1352 | .name = TYPE_VMWARE_SVGA, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1353 | .parent = TYPE_PCI_DEVICE, |
| 1354 | .instance_size = sizeof(struct pci_vmsvga_state_s), |
| 1355 | .class_init = vmsvga_class_init, |
Eduardo Habkost | fd3b02c | 2017-09-27 16:56:34 -0300 | [diff] [blame] | 1356 | .interfaces = (InterfaceInfo[]) { |
| 1357 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
| 1358 | { }, |
| 1359 | }, |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1360 | }; |
| 1361 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1362 | static void vmsvga_register_types(void) |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1363 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 1364 | type_register_static(&vmsvga_info); |
Gerd Hoffmann | a414c30 | 2009-07-28 18:18:00 +0200 | [diff] [blame] | 1365 | } |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 1366 | |
| 1367 | type_init(vmsvga_register_types) |