bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 2 | * Virtual page mapping |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
bellard | 67b915a | 2004-03-31 23:37:16 +0000 | [diff] [blame] | 19 | #include "config.h" |
Stefan Weil | 777872e | 2014-02-23 18:02:08 +0100 | [diff] [blame] | 20 | #ifndef _WIN32 |
bellard | a98d49b | 2004-11-14 16:22:05 +0000 | [diff] [blame] | 21 | #include <sys/types.h> |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 22 | #include <sys/mman.h> |
| 23 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 24 | |
Stefan Weil | 055403b | 2010-10-22 23:03:32 +0200 | [diff] [blame] | 25 | #include "qemu-common.h" |
bellard | 6180a18 | 2003-09-30 21:04:53 +0000 | [diff] [blame] | 26 | #include "cpu.h" |
bellard | b67d9a5 | 2008-05-23 09:57:34 +0000 | [diff] [blame] | 27 | #include "tcg.h" |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 28 | #include "hw/hw.h" |
Alex Williamson | cc9e98c | 2010-06-25 11:09:43 -0600 | [diff] [blame] | 29 | #include "hw/qdev.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 30 | #include "qemu/osdep.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 31 | #include "sysemu/kvm.h" |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 32 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 33 | #include "hw/xen/xen.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 34 | #include "qemu/timer.h" |
| 35 | #include "qemu/config-file.h" |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 36 | #include "qemu/error-report.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 37 | #include "exec/memory.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 38 | #include "sysemu/dma.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 39 | #include "exec/address-spaces.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 40 | #if defined(CONFIG_USER_ONLY) |
| 41 | #include <qemu.h> |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 42 | #else /* !CONFIG_USER_ONLY */ |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 43 | #include "sysemu/xen-mapcache.h" |
Stefano Stabellini | 6506e4f | 2011-05-19 18:35:44 +0100 | [diff] [blame] | 44 | #include "trace.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 45 | #endif |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 46 | #include "exec/cpu-all.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 47 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 48 | #include "exec/cputlb.h" |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 49 | #include "translate-all.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 50 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 51 | #include "exec/memory-internal.h" |
Juan Quintela | 220c3eb | 2013-10-14 17:13:59 +0200 | [diff] [blame] | 52 | #include "exec/ram_addr.h" |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 53 | #include "qemu/cache-utils.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 54 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 55 | #include "qemu/range.h" |
| 56 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 57 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 58 | |
pbrook | 99773bd | 2006-04-16 15:14:59 +0000 | [diff] [blame] | 59 | #if !defined(CONFIG_USER_ONLY) |
Juan Quintela | 981fdf2 | 2013-10-10 11:54:09 +0200 | [diff] [blame] | 60 | static bool in_migration; |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 61 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 62 | RAMList ram_list = { .blocks = QTAILQ_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 63 | |
| 64 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 65 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 66 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 67 | AddressSpace address_space_io; |
| 68 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 69 | |
Paolo Bonzini | 0844e00 | 2013-05-24 14:37:28 +0200 | [diff] [blame] | 70 | MemoryRegion io_mem_rom, io_mem_notdirty; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 71 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 72 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 73 | #endif |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 74 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 75 | struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 76 | /* current CPU in the current thread. It is only valid inside |
| 77 | cpu_exec() */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 78 | DEFINE_TLS(CPUState *, current_cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 79 | /* 0 = Do not count executed instructions. |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 80 | 1 = Precise instruction counting. |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 81 | 2 = Adaptive rate instruction counting. */ |
Paolo Bonzini | 5708fc6 | 2012-11-26 15:36:40 +0100 | [diff] [blame] | 82 | int use_icount; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 83 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 84 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 85 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 86 | typedef struct PhysPageEntry PhysPageEntry; |
| 87 | |
| 88 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 89 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 90 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 91 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 92 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 93 | }; |
| 94 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 95 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 96 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 97 | /* Size of the L2 (and L3, etc) page tables. */ |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 98 | #define ADDR_SPACE_BITS 64 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 99 | |
Michael S. Tsirkin | 026736c | 2013-11-13 20:13:03 +0200 | [diff] [blame] | 100 | #define P_L2_BITS 9 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 101 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 102 | |
| 103 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 104 | |
| 105 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 106 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 107 | typedef struct PhysPageMap { |
| 108 | unsigned sections_nb; |
| 109 | unsigned sections_nb_alloc; |
| 110 | unsigned nodes_nb; |
| 111 | unsigned nodes_nb_alloc; |
| 112 | Node *nodes; |
| 113 | MemoryRegionSection *sections; |
| 114 | } PhysPageMap; |
| 115 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 116 | struct AddressSpaceDispatch { |
| 117 | /* This is a multi-level map on the physical address space. |
| 118 | * The bottom level has pointers to MemoryRegionSections. |
| 119 | */ |
| 120 | PhysPageEntry phys_map; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 121 | PhysPageMap map; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 122 | AddressSpace *as; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 123 | }; |
| 124 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 125 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 126 | typedef struct subpage_t { |
| 127 | MemoryRegion iomem; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 128 | AddressSpace *as; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 129 | hwaddr base; |
| 130 | uint16_t sub_section[TARGET_PAGE_SIZE]; |
| 131 | } subpage_t; |
| 132 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 133 | #define PHYS_SECTION_UNASSIGNED 0 |
| 134 | #define PHYS_SECTION_NOTDIRTY 1 |
| 135 | #define PHYS_SECTION_ROM 2 |
| 136 | #define PHYS_SECTION_WATCH 3 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 137 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 138 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 139 | static void memory_map_init(void); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 140 | static void tcg_commit(MemoryListener *listener); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 141 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 142 | static MemoryRegion io_mem_watch; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 143 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 144 | |
Paul Brook | 6d9a130 | 2010-02-28 23:55:53 +0000 | [diff] [blame] | 145 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 146 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 147 | static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 148 | { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 149 | if (map->nodes_nb + nodes > map->nodes_nb_alloc) { |
| 150 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc * 2, 16); |
| 151 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes); |
| 152 | map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 153 | } |
| 154 | } |
| 155 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 156 | static uint32_t phys_map_node_alloc(PhysPageMap *map) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 157 | { |
| 158 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 159 | uint32_t ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 160 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 161 | ret = map->nodes_nb++; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 162 | assert(ret != PHYS_MAP_NODE_NIL); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 163 | assert(ret != map->nodes_nb_alloc); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 164 | for (i = 0; i < P_L2_SIZE; ++i) { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 165 | map->nodes[ret][i].skip = 1; |
| 166 | map->nodes[ret][i].ptr = PHYS_MAP_NODE_NIL; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 167 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 168 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 169 | } |
| 170 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 171 | static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp, |
| 172 | hwaddr *index, hwaddr *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 173 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 174 | { |
| 175 | PhysPageEntry *p; |
| 176 | int i; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 177 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 178 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 179 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 180 | lp->ptr = phys_map_node_alloc(map); |
| 181 | p = map->nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 182 | if (level == 0) { |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 183 | for (i = 0; i < P_L2_SIZE; i++) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 184 | p[i].skip = 0; |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 185 | p[i].ptr = PHYS_SECTION_UNASSIGNED; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 189 | p = map->nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 190 | } |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 191 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 192 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 193 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 194 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 195 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 196 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 197 | *index += step; |
| 198 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 199 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 200 | phys_page_set_level(map, lp, index, nb, leaf, level - 1); |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 201 | } |
| 202 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 203 | } |
| 204 | } |
| 205 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 206 | static void phys_page_set(AddressSpaceDispatch *d, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 207 | hwaddr index, hwaddr nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 208 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 209 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 210 | /* Wildly overreserve - it doesn't matter much. */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 211 | phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 212 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 213 | phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 214 | } |
| 215 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 216 | /* Compact a non leaf page entry. Simply detect that the entry has a single child, |
| 217 | * and update our entry so we can skip it and go directly to the destination. |
| 218 | */ |
| 219 | static void phys_page_compact(PhysPageEntry *lp, Node *nodes, unsigned long *compacted) |
| 220 | { |
| 221 | unsigned valid_ptr = P_L2_SIZE; |
| 222 | int valid = 0; |
| 223 | PhysPageEntry *p; |
| 224 | int i; |
| 225 | |
| 226 | if (lp->ptr == PHYS_MAP_NODE_NIL) { |
| 227 | return; |
| 228 | } |
| 229 | |
| 230 | p = nodes[lp->ptr]; |
| 231 | for (i = 0; i < P_L2_SIZE; i++) { |
| 232 | if (p[i].ptr == PHYS_MAP_NODE_NIL) { |
| 233 | continue; |
| 234 | } |
| 235 | |
| 236 | valid_ptr = i; |
| 237 | valid++; |
| 238 | if (p[i].skip) { |
| 239 | phys_page_compact(&p[i], nodes, compacted); |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | /* We can only compress if there's only one child. */ |
| 244 | if (valid != 1) { |
| 245 | return; |
| 246 | } |
| 247 | |
| 248 | assert(valid_ptr < P_L2_SIZE); |
| 249 | |
| 250 | /* Don't compress if it won't fit in the # of bits we have. */ |
| 251 | if (lp->skip + p[valid_ptr].skip >= (1 << 3)) { |
| 252 | return; |
| 253 | } |
| 254 | |
| 255 | lp->ptr = p[valid_ptr].ptr; |
| 256 | if (!p[valid_ptr].skip) { |
| 257 | /* If our only child is a leaf, make this a leaf. */ |
| 258 | /* By design, we should have made this node a leaf to begin with so we |
| 259 | * should never reach here. |
| 260 | * But since it's so simple to handle this, let's do it just in case we |
| 261 | * change this rule. |
| 262 | */ |
| 263 | lp->skip = 0; |
| 264 | } else { |
| 265 | lp->skip += p[valid_ptr].skip; |
| 266 | } |
| 267 | } |
| 268 | |
| 269 | static void phys_page_compact_all(AddressSpaceDispatch *d, int nodes_nb) |
| 270 | { |
| 271 | DECLARE_BITMAP(compacted, nodes_nb); |
| 272 | |
| 273 | if (d->phys_map.skip) { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 274 | phys_page_compact(&d->phys_map, d->map.nodes, compacted); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 275 | } |
| 276 | } |
| 277 | |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 278 | static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr addr, |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 279 | Node *nodes, MemoryRegionSection *sections) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 280 | { |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 281 | PhysPageEntry *p; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 282 | hwaddr index = addr >> TARGET_PAGE_BITS; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 283 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 284 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 285 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 286 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 287 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 288 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 289 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 290 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 291 | } |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 292 | |
| 293 | if (sections[lp.ptr].size.hi || |
| 294 | range_covers_byte(sections[lp.ptr].offset_within_address_space, |
| 295 | sections[lp.ptr].size.lo, addr)) { |
| 296 | return §ions[lp.ptr]; |
| 297 | } else { |
| 298 | return §ions[PHYS_SECTION_UNASSIGNED]; |
| 299 | } |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 300 | } |
| 301 | |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 302 | bool memory_region_is_unassigned(MemoryRegion *mr) |
| 303 | { |
Paolo Bonzini | 2a8e749 | 2013-05-24 14:34:08 +0200 | [diff] [blame] | 304 | return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 305 | && mr != &io_mem_watch; |
| 306 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 307 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 308 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 309 | hwaddr addr, |
| 310 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 311 | { |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 312 | MemoryRegionSection *section; |
| 313 | subpage_t *subpage; |
| 314 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 315 | section = phys_page_find(d->phys_map, addr, d->map.nodes, d->map.sections); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 316 | if (resolve_subpage && section->mr->subpage) { |
| 317 | subpage = container_of(section->mr, subpage_t, iomem); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 318 | section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 319 | } |
| 320 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 321 | } |
| 322 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 323 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 324 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 325 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 326 | { |
| 327 | MemoryRegionSection *section; |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 328 | Int128 diff; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 329 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 330 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 331 | /* Compute offset within MemoryRegionSection */ |
| 332 | addr -= section->offset_within_address_space; |
| 333 | |
| 334 | /* Compute offset within MemoryRegion */ |
| 335 | *xlat = addr + section->offset_within_region; |
| 336 | |
| 337 | diff = int128_sub(section->mr->size, int128_make64(addr)); |
Peter Maydell | 3752a03 | 2013-06-20 15:18:04 +0100 | [diff] [blame] | 338 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 339 | return section; |
| 340 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 341 | |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 342 | static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) |
| 343 | { |
| 344 | if (memory_region_is_ram(mr)) { |
| 345 | return !(is_write && mr->readonly); |
| 346 | } |
| 347 | if (memory_region_is_romd(mr)) { |
| 348 | return !is_write; |
| 349 | } |
| 350 | |
| 351 | return false; |
| 352 | } |
| 353 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 354 | MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, |
| 355 | hwaddr *xlat, hwaddr *plen, |
| 356 | bool is_write) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 357 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 358 | IOMMUTLBEntry iotlb; |
| 359 | MemoryRegionSection *section; |
| 360 | MemoryRegion *mr; |
| 361 | hwaddr len = *plen; |
| 362 | |
| 363 | for (;;) { |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 364 | section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 365 | mr = section->mr; |
| 366 | |
| 367 | if (!mr->iommu_ops) { |
| 368 | break; |
| 369 | } |
| 370 | |
| 371 | iotlb = mr->iommu_ops->translate(mr, addr); |
| 372 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 373 | | (addr & iotlb.addr_mask)); |
| 374 | len = MIN(len, (addr | iotlb.addr_mask) - addr + 1); |
| 375 | if (!(iotlb.perm & (1 << is_write))) { |
| 376 | mr = &io_mem_unassigned; |
| 377 | break; |
| 378 | } |
| 379 | |
| 380 | as = iotlb.target_as; |
| 381 | } |
| 382 | |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 383 | if (memory_access_is_direct(mr, is_write)) { |
| 384 | hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; |
| 385 | len = MIN(page, len); |
| 386 | } |
| 387 | |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 388 | *plen = len; |
| 389 | *xlat = addr; |
| 390 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | MemoryRegionSection * |
| 394 | address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, |
| 395 | hwaddr *plen) |
| 396 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 397 | MemoryRegionSection *section; |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 398 | section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 399 | |
| 400 | assert(!section->mr->iommu_ops); |
| 401 | return section; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 402 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 403 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 404 | |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 405 | void cpu_exec_init_all(void) |
| 406 | { |
| 407 | #if !defined(CONFIG_USER_ONLY) |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 408 | qemu_mutex_init(&ram_list.mutex); |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 409 | memory_map_init(); |
| 410 | io_mem_init(); |
| 411 | #endif |
| 412 | } |
| 413 | |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 414 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 415 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 416 | static int cpu_common_post_load(void *opaque, int version_id) |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 417 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 418 | CPUState *cpu = opaque; |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 419 | |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 420 | /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the |
| 421 | version_id is increased. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 422 | cpu->interrupt_request &= ~0x01; |
Christian Borntraeger | c01a71c | 2014-03-17 17:13:12 +0100 | [diff] [blame] | 423 | tlb_flush(cpu, 1); |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 424 | |
| 425 | return 0; |
| 426 | } |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 427 | |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 428 | const VMStateDescription vmstate_cpu_common = { |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 429 | .name = "cpu_common", |
| 430 | .version_id = 1, |
| 431 | .minimum_version_id = 1, |
| 432 | .minimum_version_id_old = 1, |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 433 | .post_load = cpu_common_post_load, |
| 434 | .fields = (VMStateField []) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 435 | VMSTATE_UINT32(halted, CPUState), |
| 436 | VMSTATE_UINT32(interrupt_request, CPUState), |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 437 | VMSTATE_END_OF_LIST() |
| 438 | } |
| 439 | }; |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 440 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 441 | #endif |
| 442 | |
Andreas Färber | 38d8f5c | 2012-12-17 19:47:15 +0100 | [diff] [blame] | 443 | CPUState *qemu_get_cpu(int index) |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 444 | { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 445 | CPUState *cpu; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 446 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 447 | CPU_FOREACH(cpu) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 448 | if (cpu->cpu_index == index) { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 449 | return cpu; |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 450 | } |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 451 | } |
| 452 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 453 | return NULL; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 454 | } |
| 455 | |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 456 | #if !defined(CONFIG_USER_ONLY) |
| 457 | void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as) |
| 458 | { |
| 459 | /* We only support one address space per cpu at the moment. */ |
| 460 | assert(cpu->as == as); |
| 461 | |
| 462 | if (cpu->tcg_as_listener) { |
| 463 | memory_listener_unregister(cpu->tcg_as_listener); |
| 464 | } else { |
| 465 | cpu->tcg_as_listener = g_new0(MemoryListener, 1); |
| 466 | } |
| 467 | cpu->tcg_as_listener->commit = tcg_commit; |
| 468 | memory_listener_register(cpu->tcg_as_listener, as); |
| 469 | } |
| 470 | #endif |
| 471 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 472 | void cpu_exec_init(CPUArchState *env) |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 473 | { |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 474 | CPUState *cpu = ENV_GET_CPU(env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 475 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 476 | CPUState *some_cpu; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 477 | int cpu_index; |
| 478 | |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 479 | #if defined(CONFIG_USER_ONLY) |
| 480 | cpu_list_lock(); |
| 481 | #endif |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 482 | cpu_index = 0; |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 483 | CPU_FOREACH(some_cpu) { |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 484 | cpu_index++; |
| 485 | } |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 486 | cpu->cpu_index = cpu_index; |
Andreas Färber | 1b1ed8d | 2012-12-17 04:22:03 +0100 | [diff] [blame] | 487 | cpu->numa_node = 0; |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 488 | QTAILQ_INIT(&cpu->breakpoints); |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 489 | QTAILQ_INIT(&cpu->watchpoints); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 490 | #ifndef CONFIG_USER_ONLY |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 491 | cpu->as = &address_space_memory; |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 492 | cpu->thread_id = qemu_get_thread_id(); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 493 | #endif |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 494 | QTAILQ_INSERT_TAIL(&cpus, cpu, node); |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 495 | #if defined(CONFIG_USER_ONLY) |
| 496 | cpu_list_unlock(); |
| 497 | #endif |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 498 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
| 499 | vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu); |
| 500 | } |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 501 | #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 502 | register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION, |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 503 | cpu_save, cpu_load, env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 504 | assert(cc->vmsd == NULL); |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 505 | assert(qdev_get_vmsd(DEVICE(cpu)) == NULL); |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 506 | #endif |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 507 | if (cc->vmsd != NULL) { |
| 508 | vmstate_register(NULL, cpu_index, cc->vmsd, cpu); |
| 509 | } |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 510 | } |
| 511 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 512 | #if defined(TARGET_HAS_ICE) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 513 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 514 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 515 | { |
| 516 | tb_invalidate_phys_page_range(pc, pc + 1, 0); |
| 517 | } |
| 518 | #else |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 519 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 520 | { |
Max Filippov | e8262a1 | 2013-09-27 22:29:17 +0400 | [diff] [blame] | 521 | hwaddr phys = cpu_get_phys_page_debug(cpu, pc); |
| 522 | if (phys != -1) { |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 523 | tb_invalidate_phys_addr(cpu->as, |
Edgar E. Iglesias | 29d8ec7 | 2013-11-07 19:43:10 +0100 | [diff] [blame] | 524 | phys | (pc & ~TARGET_PAGE_MASK)); |
Max Filippov | e8262a1 | 2013-09-27 22:29:17 +0400 | [diff] [blame] | 525 | } |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 526 | } |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 527 | #endif |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 528 | #endif /* TARGET_HAS_ICE */ |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 529 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 530 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 531 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 532 | |
| 533 | { |
| 534 | } |
| 535 | |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 536 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 537 | int flags, CPUWatchpoint **watchpoint) |
| 538 | { |
| 539 | return -ENOSYS; |
| 540 | } |
| 541 | #else |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 542 | /* Add a watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 543 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 544 | int flags, CPUWatchpoint **watchpoint) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 545 | { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 546 | vaddr len_mask = ~(len - 1); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 547 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 548 | |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 549 | /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */ |
Max Filippov | 0dc2382 | 2012-01-29 03:15:23 +0400 | [diff] [blame] | 550 | if ((len & (len - 1)) || (addr & ~len_mask) || |
| 551 | len == 0 || len > TARGET_PAGE_SIZE) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 552 | error_report("tried to set invalid watchpoint at %" |
| 553 | VADDR_PRIx ", len=%" VADDR_PRIu, addr, len); |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 554 | return -EINVAL; |
| 555 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 556 | wp = g_malloc(sizeof(*wp)); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 557 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 558 | wp->vaddr = addr; |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 559 | wp->len_mask = len_mask; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 560 | wp->flags = flags; |
| 561 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 562 | /* keep all GDB-injected watchpoints in front */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 563 | if (flags & BP_GDB) { |
| 564 | QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); |
| 565 | } else { |
| 566 | QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); |
| 567 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 568 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 569 | tlb_flush_page(cpu, addr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 570 | |
| 571 | if (watchpoint) |
| 572 | *watchpoint = wp; |
| 573 | return 0; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 574 | } |
| 575 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 576 | /* Remove a specific watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 577 | int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 578 | int flags) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 579 | { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 580 | vaddr len_mask = ~(len - 1); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 581 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 582 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 583 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 584 | if (addr == wp->vaddr && len_mask == wp->len_mask |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 585 | && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 586 | cpu_watchpoint_remove_by_ref(cpu, wp); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 587 | return 0; |
| 588 | } |
| 589 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 590 | return -ENOENT; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 591 | } |
| 592 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 593 | /* Remove a specific watchpoint by reference. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 594 | void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 595 | { |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 596 | QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 597 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 598 | tlb_flush_page(cpu, watchpoint->vaddr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 599 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 600 | g_free(watchpoint); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 601 | } |
| 602 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 603 | /* Remove all matching watchpoints. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 604 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 605 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 606 | CPUWatchpoint *wp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 607 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 608 | QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 609 | if (wp->flags & mask) { |
| 610 | cpu_watchpoint_remove_by_ref(cpu, wp); |
| 611 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 612 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 613 | } |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 614 | #endif |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 615 | |
| 616 | /* Add a breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 617 | int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 618 | CPUBreakpoint **breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 619 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 620 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 621 | CPUBreakpoint *bp; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 622 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 623 | bp = g_malloc(sizeof(*bp)); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 624 | |
| 625 | bp->pc = pc; |
| 626 | bp->flags = flags; |
| 627 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 628 | /* keep all GDB-injected breakpoints in front */ |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 629 | if (flags & BP_GDB) { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 630 | QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 631 | } else { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 632 | QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 633 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 634 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 635 | breakpoint_invalidate(cpu, pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 636 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 637 | if (breakpoint) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 638 | *breakpoint = bp; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 639 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 640 | return 0; |
| 641 | #else |
| 642 | return -ENOSYS; |
| 643 | #endif |
| 644 | } |
| 645 | |
| 646 | /* Remove a specific breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 647 | int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 648 | { |
| 649 | #if defined(TARGET_HAS_ICE) |
| 650 | CPUBreakpoint *bp; |
| 651 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 652 | QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 653 | if (bp->pc == pc && bp->flags == flags) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 654 | cpu_breakpoint_remove_by_ref(cpu, bp); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 655 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 656 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 657 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 658 | return -ENOENT; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 659 | #else |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 660 | return -ENOSYS; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 661 | #endif |
| 662 | } |
| 663 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 664 | /* Remove a specific breakpoint by reference. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 665 | void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 666 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 667 | #if defined(TARGET_HAS_ICE) |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 668 | QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry); |
| 669 | |
| 670 | breakpoint_invalidate(cpu, breakpoint->pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 671 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 672 | g_free(breakpoint); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 673 | #endif |
| 674 | } |
| 675 | |
| 676 | /* Remove all matching breakpoints. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 677 | void cpu_breakpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 678 | { |
| 679 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 680 | CPUBreakpoint *bp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 681 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 682 | QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 683 | if (bp->flags & mask) { |
| 684 | cpu_breakpoint_remove_by_ref(cpu, bp); |
| 685 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 686 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 687 | #endif |
| 688 | } |
| 689 | |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 690 | /* enable or disable single step mode. EXCP_DEBUG is returned by the |
| 691 | CPU loop after each instruction */ |
Andreas Färber | 3825b28 | 2013-06-24 18:41:06 +0200 | [diff] [blame] | 692 | void cpu_single_step(CPUState *cpu, int enabled) |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 693 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 694 | #if defined(TARGET_HAS_ICE) |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 695 | if (cpu->singlestep_enabled != enabled) { |
| 696 | cpu->singlestep_enabled = enabled; |
| 697 | if (kvm_enabled()) { |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 698 | kvm_update_guest_debug(cpu, 0); |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 699 | } else { |
Stuart Brady | ccbb4d4 | 2009-05-03 12:15:06 +0100 | [diff] [blame] | 700 | /* must flush all the translated code to avoid inconsistencies */ |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 701 | /* XXX: only flush what is necessary */ |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 702 | CPUArchState *env = cpu->env_ptr; |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 703 | tb_flush(env); |
| 704 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 705 | } |
| 706 | #endif |
| 707 | } |
| 708 | |
Andreas Färber | a47dddd | 2013-09-03 17:38:47 +0200 | [diff] [blame] | 709 | void cpu_abort(CPUState *cpu, const char *fmt, ...) |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 710 | { |
| 711 | va_list ap; |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 712 | va_list ap2; |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 713 | |
| 714 | va_start(ap, fmt); |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 715 | va_copy(ap2, ap); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 716 | fprintf(stderr, "qemu: fatal: "); |
| 717 | vfprintf(stderr, fmt, ap); |
| 718 | fprintf(stderr, "\n"); |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 719 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 720 | if (qemu_log_enabled()) { |
| 721 | qemu_log("qemu: fatal: "); |
| 722 | qemu_log_vprintf(fmt, ap2); |
| 723 | qemu_log("\n"); |
Andreas Färber | a076285 | 2013-06-16 07:28:50 +0200 | [diff] [blame] | 724 | log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 31b1a7b | 2009-01-15 22:35:09 +0000 | [diff] [blame] | 725 | qemu_log_flush(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 726 | qemu_log_close(); |
balrog | 924edca | 2007-06-10 14:07:13 +0000 | [diff] [blame] | 727 | } |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 728 | va_end(ap2); |
j_mayer | f937329 | 2007-09-29 12:18:20 +0000 | [diff] [blame] | 729 | va_end(ap); |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 730 | #if defined(CONFIG_USER_ONLY) |
| 731 | { |
| 732 | struct sigaction act; |
| 733 | sigfillset(&act.sa_mask); |
| 734 | act.sa_handler = SIG_DFL; |
| 735 | sigaction(SIGABRT, &act, NULL); |
| 736 | } |
| 737 | #endif |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 738 | abort(); |
| 739 | } |
| 740 | |
bellard | 0124311 | 2004-01-04 15:48:17 +0000 | [diff] [blame] | 741 | #if !defined(CONFIG_USER_ONLY) |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 742 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 743 | { |
| 744 | RAMBlock *block; |
| 745 | |
| 746 | /* The list is protected by the iothread lock here. */ |
| 747 | block = ram_list.mru_block; |
| 748 | if (block && addr - block->offset < block->length) { |
| 749 | goto found; |
| 750 | } |
| 751 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 752 | if (addr - block->offset < block->length) { |
| 753 | goto found; |
| 754 | } |
| 755 | } |
| 756 | |
| 757 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 758 | abort(); |
| 759 | |
| 760 | found: |
| 761 | ram_list.mru_block = block; |
| 762 | return block; |
| 763 | } |
| 764 | |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 765 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 766 | { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 767 | ram_addr_t start1; |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 768 | RAMBlock *block; |
| 769 | ram_addr_t end; |
| 770 | |
| 771 | end = TARGET_PAGE_ALIGN(start + length); |
| 772 | start &= TARGET_PAGE_MASK; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 773 | |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 774 | block = qemu_get_ram_block(start); |
| 775 | assert(block == qemu_get_ram_block(end - 1)); |
| 776 | start1 = (uintptr_t)block->host + (start - block->offset); |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 777 | cpu_tlb_reset_dirty_all(start1, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 778 | } |
| 779 | |
| 780 | /* Note: start and end must be within the same ram block. */ |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 781 | void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t length, |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 782 | unsigned client) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 783 | { |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 784 | if (length == 0) |
| 785 | return; |
Juan Quintela | ace694c | 2013-10-09 10:36:56 +0200 | [diff] [blame] | 786 | cpu_physical_memory_clear_dirty_range(start, length, client); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 787 | |
| 788 | if (tcg_enabled()) { |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 789 | tlb_reset_dirty_range_all(start, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 790 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 791 | } |
| 792 | |
Juan Quintela | 981fdf2 | 2013-10-10 11:54:09 +0200 | [diff] [blame] | 793 | static void cpu_physical_memory_set_dirty_tracking(bool enable) |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 794 | { |
| 795 | in_migration = enable; |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 796 | } |
| 797 | |
Andreas Färber | bb0e627 | 2013-09-03 13:32:01 +0200 | [diff] [blame] | 798 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 799 | MemoryRegionSection *section, |
| 800 | target_ulong vaddr, |
| 801 | hwaddr paddr, hwaddr xlat, |
| 802 | int prot, |
| 803 | target_ulong *address) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 804 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 805 | hwaddr iotlb; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 806 | CPUWatchpoint *wp; |
| 807 | |
Blue Swirl | cc5bea6 | 2012-04-14 14:56:48 +0000 | [diff] [blame] | 808 | if (memory_region_is_ram(section->mr)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 809 | /* Normal RAM. */ |
| 810 | iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 811 | + xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 812 | if (!section->readonly) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 813 | iotlb |= PHYS_SECTION_NOTDIRTY; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 814 | } else { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 815 | iotlb |= PHYS_SECTION_ROM; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 816 | } |
| 817 | } else { |
Edgar E. Iglesias | 1b3fb98 | 2013-11-07 18:43:28 +0100 | [diff] [blame] | 818 | iotlb = section - section->address_space->dispatch->map.sections; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 819 | iotlb += xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 820 | } |
| 821 | |
| 822 | /* Make accesses to pages with watchpoints go via the |
| 823 | watchpoint trap routines. */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 824 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 825 | if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) { |
| 826 | /* Avoid trapping reads of pages with a write breakpoint. */ |
| 827 | if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 828 | iotlb = PHYS_SECTION_WATCH + paddr; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 829 | *address |= TLB_MMIO; |
| 830 | break; |
| 831 | } |
| 832 | } |
| 833 | } |
| 834 | |
| 835 | return iotlb; |
| 836 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 837 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 838 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 839 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 840 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 841 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 842 | uint16_t section); |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 843 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 844 | |
Stefan Weil | 575ddeb | 2013-09-29 20:56:45 +0200 | [diff] [blame] | 845 | static void *(*phys_mem_alloc)(size_t size) = qemu_anon_ram_alloc; |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 846 | |
| 847 | /* |
| 848 | * Set a custom physical guest memory alloator. |
| 849 | * Accelerators with unusual needs may need this. Hopefully, we can |
| 850 | * get rid of it eventually. |
| 851 | */ |
Stefan Weil | 575ddeb | 2013-09-29 20:56:45 +0200 | [diff] [blame] | 852 | void phys_mem_set_alloc(void *(*alloc)(size_t)) |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 853 | { |
| 854 | phys_mem_alloc = alloc; |
| 855 | } |
| 856 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 857 | static uint16_t phys_section_add(PhysPageMap *map, |
| 858 | MemoryRegionSection *section) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 859 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 860 | /* The physical section number is ORed with a page-aligned |
| 861 | * pointer to produce the iotlb entries. Thus it should |
| 862 | * never overflow into the page-aligned value. |
| 863 | */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 864 | assert(map->sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 865 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 866 | if (map->sections_nb == map->sections_nb_alloc) { |
| 867 | map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16); |
| 868 | map->sections = g_renew(MemoryRegionSection, map->sections, |
| 869 | map->sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 870 | } |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 871 | map->sections[map->sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 872 | memory_region_ref(section->mr); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 873 | return map->sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 874 | } |
| 875 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 876 | static void phys_section_destroy(MemoryRegion *mr) |
| 877 | { |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 878 | memory_region_unref(mr); |
| 879 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 880 | if (mr->subpage) { |
| 881 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
| 882 | memory_region_destroy(&subpage->iomem); |
| 883 | g_free(subpage); |
| 884 | } |
| 885 | } |
| 886 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 887 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 888 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 889 | while (map->sections_nb > 0) { |
| 890 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 891 | phys_section_destroy(section->mr); |
| 892 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 893 | g_free(map->sections); |
| 894 | g_free(map->nodes); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 895 | } |
| 896 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 897 | static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 898 | { |
| 899 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 900 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 901 | & TARGET_PAGE_MASK; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 902 | MemoryRegionSection *existing = phys_page_find(d->phys_map, base, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 903 | d->map.nodes, d->map.sections); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 904 | MemoryRegionSection subsection = { |
| 905 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 906 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 907 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 908 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 909 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 910 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 911 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 912 | if (!(existing->mr->subpage)) { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 913 | subpage = subpage_init(d->as, base); |
Edgar E. Iglesias | 3be91e8 | 2013-11-07 18:42:51 +0100 | [diff] [blame] | 914 | subsection.address_space = d->as; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 915 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 916 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 917 | phys_section_add(&d->map, &subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 918 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 919 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 920 | } |
| 921 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 922 | end = start + int128_get64(section->size) - 1; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 923 | subpage_register(subpage, start, end, |
| 924 | phys_section_add(&d->map, section)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 925 | } |
| 926 | |
| 927 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 928 | static void register_multipage(AddressSpaceDispatch *d, |
| 929 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 930 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 931 | hwaddr start_addr = section->offset_within_address_space; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 932 | uint16_t section_index = phys_section_add(&d->map, section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 933 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 934 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 935 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 936 | assert(num_pages); |
| 937 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 938 | } |
| 939 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 940 | static void mem_add(MemoryListener *listener, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 941 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 942 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 943 | AddressSpaceDispatch *d = as->next_dispatch; |
Paolo Bonzini | 99b9cc0 | 2013-05-27 13:18:01 +0200 | [diff] [blame] | 944 | MemoryRegionSection now = *section, remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 945 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 946 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 947 | if (now.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 948 | uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space) |
| 949 | - now.offset_within_address_space; |
| 950 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 951 | now.size = int128_min(int128_make64(left), now.size); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 952 | register_subpage(d, &now); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 953 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 954 | now.size = int128_zero(); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 955 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 956 | while (int128_ne(remain.size, now.size)) { |
| 957 | remain.size = int128_sub(remain.size, now.size); |
| 958 | remain.offset_within_address_space += int128_get64(now.size); |
| 959 | remain.offset_within_region += int128_get64(now.size); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 960 | now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 961 | if (int128_lt(remain.size, page_size)) { |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 962 | register_subpage(d, &now); |
Hu Tao | 8826624 | 2013-08-29 18:21:16 +0800 | [diff] [blame] | 963 | } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 964 | now.size = page_size; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 965 | register_subpage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 966 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 967 | now.size = int128_and(now.size, int128_neg(page_size)); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 968 | register_multipage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 969 | } |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 970 | } |
| 971 | } |
| 972 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 973 | void qemu_flush_coalesced_mmio_buffer(void) |
| 974 | { |
| 975 | if (kvm_enabled()) |
| 976 | kvm_flush_coalesced_mmio_buffer(); |
| 977 | } |
| 978 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 979 | void qemu_mutex_lock_ramlist(void) |
| 980 | { |
| 981 | qemu_mutex_lock(&ram_list.mutex); |
| 982 | } |
| 983 | |
| 984 | void qemu_mutex_unlock_ramlist(void) |
| 985 | { |
| 986 | qemu_mutex_unlock(&ram_list.mutex); |
| 987 | } |
| 988 | |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 989 | #ifdef __linux__ |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 990 | |
| 991 | #include <sys/vfs.h> |
| 992 | |
| 993 | #define HUGETLBFS_MAGIC 0x958458f6 |
| 994 | |
| 995 | static long gethugepagesize(const char *path) |
| 996 | { |
| 997 | struct statfs fs; |
| 998 | int ret; |
| 999 | |
| 1000 | do { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1001 | ret = statfs(path, &fs); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1002 | } while (ret != 0 && errno == EINTR); |
| 1003 | |
| 1004 | if (ret != 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1005 | perror(path); |
| 1006 | return 0; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1007 | } |
| 1008 | |
| 1009 | if (fs.f_type != HUGETLBFS_MAGIC) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1010 | fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1011 | |
| 1012 | return fs.f_bsize; |
| 1013 | } |
| 1014 | |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1015 | static sigjmp_buf sigjump; |
| 1016 | |
| 1017 | static void sigbus_handler(int signal) |
| 1018 | { |
| 1019 | siglongjmp(sigjump, 1); |
| 1020 | } |
| 1021 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1022 | static void *file_ram_alloc(RAMBlock *block, |
| 1023 | ram_addr_t memory, |
| 1024 | const char *path) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1025 | { |
| 1026 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1027 | char *sanitized_name; |
| 1028 | char *c; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1029 | void *area; |
| 1030 | int fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1031 | unsigned long hpagesize; |
| 1032 | |
| 1033 | hpagesize = gethugepagesize(path); |
| 1034 | if (!hpagesize) { |
Marcelo Tosatti | f9a49df | 2014-02-04 13:41:53 -0500 | [diff] [blame] | 1035 | goto error; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1036 | } |
| 1037 | |
| 1038 | if (memory < hpagesize) { |
| 1039 | return NULL; |
| 1040 | } |
| 1041 | |
| 1042 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 1043 | fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n"); |
Marcelo Tosatti | f9a49df | 2014-02-04 13:41:53 -0500 | [diff] [blame] | 1044 | goto error; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1045 | } |
| 1046 | |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1047 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
| 1048 | sanitized_name = g_strdup(block->mr->name); |
| 1049 | for (c = sanitized_name; *c != '\0'; c++) { |
| 1050 | if (*c == '/') |
| 1051 | *c = '_'; |
| 1052 | } |
| 1053 | |
| 1054 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 1055 | sanitized_name); |
| 1056 | g_free(sanitized_name); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1057 | |
| 1058 | fd = mkstemp(filename); |
| 1059 | if (fd < 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1060 | perror("unable to create backing store for hugepages"); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 1061 | g_free(filename); |
Marcelo Tosatti | f9a49df | 2014-02-04 13:41:53 -0500 | [diff] [blame] | 1062 | goto error; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1063 | } |
| 1064 | unlink(filename); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 1065 | g_free(filename); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1066 | |
| 1067 | memory = (memory+hpagesize-1) & ~(hpagesize-1); |
| 1068 | |
| 1069 | /* |
| 1070 | * ftruncate is not supported by hugetlbfs in older |
| 1071 | * hosts, so don't bother bailing out on errors. |
| 1072 | * If anything goes wrong with it under other filesystems, |
| 1073 | * mmap will fail. |
| 1074 | */ |
| 1075 | if (ftruncate(fd, memory)) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1076 | perror("ftruncate"); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1077 | |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1078 | area = mmap(0, memory, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1079 | if (area == MAP_FAILED) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1080 | perror("file_ram_alloc: can't mmap RAM pages"); |
| 1081 | close(fd); |
Marcelo Tosatti | f9a49df | 2014-02-04 13:41:53 -0500 | [diff] [blame] | 1082 | goto error; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1083 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1084 | |
| 1085 | if (mem_prealloc) { |
| 1086 | int ret, i; |
| 1087 | struct sigaction act, oldact; |
| 1088 | sigset_t set, oldset; |
| 1089 | |
| 1090 | memset(&act, 0, sizeof(act)); |
| 1091 | act.sa_handler = &sigbus_handler; |
| 1092 | act.sa_flags = 0; |
| 1093 | |
| 1094 | ret = sigaction(SIGBUS, &act, &oldact); |
| 1095 | if (ret) { |
| 1096 | perror("file_ram_alloc: failed to install signal handler"); |
| 1097 | exit(1); |
| 1098 | } |
| 1099 | |
| 1100 | /* unblock SIGBUS */ |
| 1101 | sigemptyset(&set); |
| 1102 | sigaddset(&set, SIGBUS); |
| 1103 | pthread_sigmask(SIG_UNBLOCK, &set, &oldset); |
| 1104 | |
| 1105 | if (sigsetjmp(sigjump, 1)) { |
| 1106 | fprintf(stderr, "file_ram_alloc: failed to preallocate pages\n"); |
| 1107 | exit(1); |
| 1108 | } |
| 1109 | |
| 1110 | /* MAP_POPULATE silently ignores failures */ |
Marcelo Tosatti | 2ba8285 | 2013-12-18 16:42:17 -0200 | [diff] [blame] | 1111 | for (i = 0; i < (memory/hpagesize); i++) { |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1112 | memset(area + (hpagesize*i), 0, 1); |
| 1113 | } |
| 1114 | |
| 1115 | ret = sigaction(SIGBUS, &oldact, NULL); |
| 1116 | if (ret) { |
| 1117 | perror("file_ram_alloc: failed to reinstall signal handler"); |
| 1118 | exit(1); |
| 1119 | } |
| 1120 | |
| 1121 | pthread_sigmask(SIG_SETMASK, &oldset, NULL); |
| 1122 | } |
| 1123 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1124 | block->fd = fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1125 | return area; |
Marcelo Tosatti | f9a49df | 2014-02-04 13:41:53 -0500 | [diff] [blame] | 1126 | |
| 1127 | error: |
| 1128 | if (mem_prealloc) { |
| 1129 | exit(1); |
| 1130 | } |
| 1131 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1132 | } |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1133 | #else |
| 1134 | static void *file_ram_alloc(RAMBlock *block, |
| 1135 | ram_addr_t memory, |
| 1136 | const char *path) |
| 1137 | { |
| 1138 | fprintf(stderr, "-mem-path not supported on this host\n"); |
| 1139 | exit(1); |
| 1140 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1141 | #endif |
| 1142 | |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1143 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1144 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1145 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1146 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1147 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1148 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1149 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1150 | if (QTAILQ_EMPTY(&ram_list.blocks)) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1151 | return 0; |
| 1152 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1153 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1154 | ram_addr_t end, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1155 | |
| 1156 | end = block->offset + block->length; |
| 1157 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1158 | QTAILQ_FOREACH(next_block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1159 | if (next_block->offset >= end) { |
| 1160 | next = MIN(next, next_block->offset); |
| 1161 | } |
| 1162 | } |
| 1163 | if (next - end >= size && next - end < mingap) { |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1164 | offset = end; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1165 | mingap = next - end; |
| 1166 | } |
| 1167 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1168 | |
| 1169 | if (offset == RAM_ADDR_MAX) { |
| 1170 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1171 | (uint64_t)size); |
| 1172 | abort(); |
| 1173 | } |
| 1174 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1175 | return offset; |
| 1176 | } |
| 1177 | |
Juan Quintela | 652d7ec | 2012-07-20 10:37:54 +0200 | [diff] [blame] | 1178 | ram_addr_t last_ram_offset(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1179 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1180 | RAMBlock *block; |
| 1181 | ram_addr_t last = 0; |
| 1182 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1183 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1184 | last = MAX(last, block->offset + block->length); |
| 1185 | |
| 1186 | return last; |
| 1187 | } |
| 1188 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1189 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1190 | { |
| 1191 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1192 | |
| 1193 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1194 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), |
| 1195 | "dump-guest-core", true)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1196 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1197 | if (ret) { |
| 1198 | perror("qemu_madvise"); |
| 1199 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1200 | "but dump_guest_core=off specified\n"); |
| 1201 | } |
| 1202 | } |
| 1203 | } |
| 1204 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1205 | void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev) |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1206 | { |
| 1207 | RAMBlock *new_block, *block; |
| 1208 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1209 | new_block = NULL; |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1210 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1211 | if (block->offset == addr) { |
| 1212 | new_block = block; |
| 1213 | break; |
| 1214 | } |
| 1215 | } |
| 1216 | assert(new_block); |
| 1217 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1218 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1219 | if (dev) { |
| 1220 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1221 | if (id) { |
| 1222 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1223 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1224 | } |
| 1225 | } |
| 1226 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1227 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1228 | /* This assumes the iothread lock is taken here too. */ |
| 1229 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1230 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1231 | if (block != new_block && !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1232 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1233 | new_block->idstr); |
| 1234 | abort(); |
| 1235 | } |
| 1236 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1237 | qemu_mutex_unlock_ramlist(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1238 | } |
| 1239 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1240 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1241 | { |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1242 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1243 | /* disabled by the user */ |
| 1244 | return 0; |
| 1245 | } |
| 1246 | |
| 1247 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1248 | } |
| 1249 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1250 | ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
| 1251 | MemoryRegion *mr) |
| 1252 | { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1253 | RAMBlock *block, *new_block; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1254 | ram_addr_t old_ram_size, new_ram_size; |
| 1255 | |
| 1256 | old_ram_size = last_ram_offset() >> TARGET_PAGE_BITS; |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1257 | |
| 1258 | size = TARGET_PAGE_ALIGN(size); |
| 1259 | new_block = g_malloc0(sizeof(*new_block)); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1260 | new_block->fd = -1; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1261 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1262 | /* This assumes the iothread lock is taken here too. */ |
| 1263 | qemu_mutex_lock_ramlist(); |
Avi Kivity | 7c63736 | 2011-12-21 13:09:49 +0200 | [diff] [blame] | 1264 | new_block->mr = mr; |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1265 | new_block->offset = find_ram_offset(size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1266 | if (host) { |
| 1267 | new_block->host = host; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1268 | new_block->flags |= RAM_PREALLOC_MASK; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1269 | } else if (xen_enabled()) { |
| 1270 | if (mem_path) { |
| 1271 | fprintf(stderr, "-mem-path not supported with Xen\n"); |
| 1272 | exit(1); |
| 1273 | } |
| 1274 | xen_ram_alloc(new_block->offset, size, mr); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1275 | } else { |
| 1276 | if (mem_path) { |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1277 | if (phys_mem_alloc != qemu_anon_ram_alloc) { |
| 1278 | /* |
| 1279 | * file_ram_alloc() needs to allocate just like |
| 1280 | * phys_mem_alloc, but we haven't bothered to provide |
| 1281 | * a hook there. |
| 1282 | */ |
| 1283 | fprintf(stderr, |
| 1284 | "-mem-path not supported with this accelerator\n"); |
| 1285 | exit(1); |
| 1286 | } |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1287 | new_block->host = file_ram_alloc(new_block, size, mem_path); |
Markus Armbruster | 0628c18 | 2013-07-31 15:11:06 +0200 | [diff] [blame] | 1288 | } |
| 1289 | if (!new_block->host) { |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1290 | new_block->host = phys_mem_alloc(size); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1291 | if (!new_block->host) { |
| 1292 | fprintf(stderr, "Cannot set up guest memory '%s': %s\n", |
| 1293 | new_block->mr->name, strerror(errno)); |
| 1294 | exit(1); |
| 1295 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1296 | memory_try_enable_merging(new_block->host, size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1297 | } |
| 1298 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1299 | new_block->length = size; |
| 1300 | |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1301 | /* Keep the list sorted from biggest to smallest block. */ |
| 1302 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 1303 | if (block->length < new_block->length) { |
| 1304 | break; |
| 1305 | } |
| 1306 | } |
| 1307 | if (block) { |
| 1308 | QTAILQ_INSERT_BEFORE(block, new_block, next); |
| 1309 | } else { |
| 1310 | QTAILQ_INSERT_TAIL(&ram_list.blocks, new_block, next); |
| 1311 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1312 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1313 | |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1314 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1315 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1316 | |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1317 | new_ram_size = last_ram_offset() >> TARGET_PAGE_BITS; |
| 1318 | |
| 1319 | if (new_ram_size > old_ram_size) { |
Juan Quintela | 1ab4c8c | 2013-10-08 16:14:39 +0200 | [diff] [blame] | 1320 | int i; |
| 1321 | for (i = 0; i < DIRTY_MEMORY_NUM; i++) { |
| 1322 | ram_list.dirty_memory[i] = |
| 1323 | bitmap_zero_extend(ram_list.dirty_memory[i], |
| 1324 | old_ram_size, new_ram_size); |
| 1325 | } |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1326 | } |
Juan Quintela | 75218e7 | 2013-10-08 12:31:54 +0200 | [diff] [blame] | 1327 | cpu_physical_memory_set_dirty_range(new_block->offset, size); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1328 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1329 | qemu_ram_setup_dump(new_block->host, size); |
Luiz Capitulino | ad0b532 | 2012-10-05 16:47:57 -0300 | [diff] [blame] | 1330 | qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE); |
Andrea Arcangeli | 3e469db | 2013-07-25 12:11:15 +0200 | [diff] [blame] | 1331 | qemu_madvise(new_block->host, size, QEMU_MADV_DONTFORK); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1332 | |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1333 | if (kvm_enabled()) |
| 1334 | kvm_setup_guest_memory(new_block->host, size); |
| 1335 | |
| 1336 | return new_block->offset; |
| 1337 | } |
| 1338 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1339 | ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1340 | { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1341 | return qemu_ram_alloc_from_ptr(size, NULL, mr); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1342 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1343 | |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1344 | void qemu_ram_free_from_ptr(ram_addr_t addr) |
| 1345 | { |
| 1346 | RAMBlock *block; |
| 1347 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1348 | /* This assumes the iothread lock is taken here too. */ |
| 1349 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1350 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1351 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1352 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1353 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1354 | ram_list.version++; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1355 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1356 | break; |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1357 | } |
| 1358 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1359 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1360 | } |
| 1361 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1362 | void qemu_ram_free(ram_addr_t addr) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1363 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1364 | RAMBlock *block; |
| 1365 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1366 | /* This assumes the iothread lock is taken here too. */ |
| 1367 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1368 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1369 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1370 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1371 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1372 | ram_list.version++; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1373 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1374 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1375 | } else if (xen_enabled()) { |
| 1376 | xen_invalidate_map_cache_entry(block->host); |
Stefan Weil | 089f3f7 | 2013-09-18 07:48:15 +0200 | [diff] [blame] | 1377 | #ifndef _WIN32 |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1378 | } else if (block->fd >= 0) { |
| 1379 | munmap(block->host, block->length); |
| 1380 | close(block->fd); |
Stefan Weil | 089f3f7 | 2013-09-18 07:48:15 +0200 | [diff] [blame] | 1381 | #endif |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1382 | } else { |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1383 | qemu_anon_ram_free(block->host, block->length); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1384 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1385 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1386 | break; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1387 | } |
| 1388 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1389 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1390 | |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1391 | } |
| 1392 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1393 | #ifndef _WIN32 |
| 1394 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 1395 | { |
| 1396 | RAMBlock *block; |
| 1397 | ram_addr_t offset; |
| 1398 | int flags; |
| 1399 | void *area, *vaddr; |
| 1400 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1401 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1402 | offset = addr - block->offset; |
| 1403 | if (offset < block->length) { |
| 1404 | vaddr = block->host + offset; |
| 1405 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1406 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1407 | } else if (xen_enabled()) { |
| 1408 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1409 | } else { |
| 1410 | flags = MAP_FIXED; |
| 1411 | munmap(vaddr, length); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1412 | if (block->fd >= 0) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1413 | #ifdef MAP_POPULATE |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1414 | flags |= mem_prealloc ? MAP_POPULATE | MAP_SHARED : |
| 1415 | MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1416 | #else |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1417 | flags |= MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1418 | #endif |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1419 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1420 | flags, block->fd, offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1421 | } else { |
Markus Armbruster | 2eb9fba | 2013-07-31 15:11:09 +0200 | [diff] [blame] | 1422 | /* |
| 1423 | * Remap needs to match alloc. Accelerators that |
| 1424 | * set phys_mem_alloc never remap. If they did, |
| 1425 | * we'd need a remap hook here. |
| 1426 | */ |
| 1427 | assert(phys_mem_alloc == qemu_anon_ram_alloc); |
| 1428 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1429 | flags |= MAP_PRIVATE | MAP_ANONYMOUS; |
| 1430 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1431 | flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1432 | } |
| 1433 | if (area != vaddr) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1434 | fprintf(stderr, "Could not remap addr: " |
| 1435 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n", |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1436 | length, addr); |
| 1437 | exit(1); |
| 1438 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1439 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1440 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1441 | } |
| 1442 | return; |
| 1443 | } |
| 1444 | } |
| 1445 | } |
| 1446 | #endif /* !_WIN32 */ |
| 1447 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1448 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
| 1449 | With the exception of the softmmu code in this file, this should |
| 1450 | only be used for local memory (e.g. video ram) that the device owns, |
| 1451 | and knows it isn't going to access beyond the end of the block. |
| 1452 | |
| 1453 | It should not be used for general purpose DMA. |
| 1454 | Use cpu_physical_memory_map/cpu_physical_memory_rw instead. |
| 1455 | */ |
| 1456 | void *qemu_get_ram_ptr(ram_addr_t addr) |
| 1457 | { |
| 1458 | RAMBlock *block = qemu_get_ram_block(addr); |
| 1459 | |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1460 | if (xen_enabled()) { |
| 1461 | /* We need to check if the requested address is in the RAM |
| 1462 | * because we don't want to map the entire memory in QEMU. |
| 1463 | * In that case just map until the end of the page. |
| 1464 | */ |
| 1465 | if (block->offset == 0) { |
| 1466 | return xen_map_cache(addr, 0, 0); |
| 1467 | } else if (block->host == NULL) { |
| 1468 | block->host = |
| 1469 | xen_map_cache(block->offset, block->length, 1); |
| 1470 | } |
| 1471 | } |
| 1472 | return block->host + (addr - block->offset); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 1473 | } |
| 1474 | |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1475 | /* Return a host pointer to guest's ram. Similar to qemu_get_ram_ptr |
| 1476 | * but takes a size argument */ |
Peter Maydell | cb85f7a | 2013-07-08 09:44:04 +0100 | [diff] [blame] | 1477 | static void *qemu_ram_ptr_length(ram_addr_t addr, hwaddr *size) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1478 | { |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 1479 | if (*size == 0) { |
| 1480 | return NULL; |
| 1481 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1482 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1483 | return xen_map_cache(addr, *size, 1); |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1484 | } else { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1485 | RAMBlock *block; |
| 1486 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1487 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1488 | if (addr - block->offset < block->length) { |
| 1489 | if (addr - block->offset + *size > block->length) |
| 1490 | *size = block->length - addr + block->offset; |
| 1491 | return block->host + (addr - block->offset); |
| 1492 | } |
| 1493 | } |
| 1494 | |
| 1495 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1496 | abort(); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1497 | } |
| 1498 | } |
| 1499 | |
Paolo Bonzini | 7443b43 | 2013-06-03 12:44:02 +0200 | [diff] [blame] | 1500 | /* Some of the softmmu routines need to translate from a host pointer |
| 1501 | (typically a TLB entry) back to a ram offset. */ |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1502 | MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 1503 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1504 | RAMBlock *block; |
| 1505 | uint8_t *host = ptr; |
| 1506 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1507 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1508 | *ram_addr = xen_ram_addr_from_mapcache(ptr); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1509 | return qemu_get_ram_block(*ram_addr)->mr; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 1510 | } |
| 1511 | |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1512 | block = ram_list.mru_block; |
| 1513 | if (block && block->host && host - block->host < block->length) { |
| 1514 | goto found; |
| 1515 | } |
| 1516 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1517 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1518 | /* This case append when the block is not mapped. */ |
| 1519 | if (block->host == NULL) { |
| 1520 | continue; |
| 1521 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1522 | if (host - block->host < block->length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1523 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1524 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1525 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1526 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1527 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1528 | |
| 1529 | found: |
| 1530 | *ram_addr = block->offset + (host - block->host); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1531 | return block->mr; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 1532 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1533 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1534 | static void notdirty_mem_write(void *opaque, hwaddr ram_addr, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1535 | uint64_t val, unsigned size) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1536 | { |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 1537 | if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1538 | tb_invalidate_phys_page_fast(ram_addr, size); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1539 | } |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1540 | switch (size) { |
| 1541 | case 1: |
| 1542 | stb_p(qemu_get_ram_ptr(ram_addr), val); |
| 1543 | break; |
| 1544 | case 2: |
| 1545 | stw_p(qemu_get_ram_ptr(ram_addr), val); |
| 1546 | break; |
| 1547 | case 4: |
| 1548 | stl_p(qemu_get_ram_ptr(ram_addr), val); |
| 1549 | break; |
| 1550 | default: |
| 1551 | abort(); |
| 1552 | } |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 1553 | cpu_physical_memory_set_dirty_flag(ram_addr, DIRTY_MEMORY_MIGRATION); |
| 1554 | cpu_physical_memory_set_dirty_flag(ram_addr, DIRTY_MEMORY_VGA); |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1555 | /* we remove the notdirty callback only if the code has been |
| 1556 | flushed */ |
Juan Quintela | a2cd8c8 | 2013-10-10 11:20:22 +0200 | [diff] [blame] | 1557 | if (!cpu_physical_memory_is_clean(ram_addr)) { |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1558 | CPUArchState *env = current_cpu->env_ptr; |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 1559 | tlb_set_dirty(env, current_cpu->mem_io_vaddr); |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1560 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1561 | } |
| 1562 | |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1563 | static bool notdirty_mem_accepts(void *opaque, hwaddr addr, |
| 1564 | unsigned size, bool is_write) |
| 1565 | { |
| 1566 | return is_write; |
| 1567 | } |
| 1568 | |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1569 | static const MemoryRegionOps notdirty_mem_ops = { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1570 | .write = notdirty_mem_write, |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1571 | .valid.accepts = notdirty_mem_accepts, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1572 | .endianness = DEVICE_NATIVE_ENDIAN, |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1573 | }; |
| 1574 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1575 | /* Generate a debug exception if a watchpoint has been hit. */ |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1576 | static void check_watchpoint(int offset, int len_mask, int flags) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1577 | { |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 1578 | CPUState *cpu = current_cpu; |
| 1579 | CPUArchState *env = cpu->env_ptr; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1580 | target_ulong pc, cs_base; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1581 | target_ulong vaddr; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1582 | CPUWatchpoint *wp; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1583 | int cpu_flags; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1584 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1585 | if (cpu->watchpoint_hit) { |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1586 | /* We re-entered the check after replacing the TB. Now raise |
| 1587 | * the debug interrupt so that is will trigger after the |
| 1588 | * current instruction. */ |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 1589 | cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1590 | return; |
| 1591 | } |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 1592 | vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1593 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1594 | if ((vaddr == (wp->vaddr & len_mask) || |
| 1595 | (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) { |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1596 | wp->flags |= BP_WATCHPOINT_HIT; |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1597 | if (!cpu->watchpoint_hit) { |
| 1598 | cpu->watchpoint_hit = wp; |
Andreas Färber | 239c51a | 2013-09-01 17:12:23 +0200 | [diff] [blame] | 1599 | tb_check_watchpoint(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1600 | if (wp->flags & BP_STOP_BEFORE_ACCESS) { |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 1601 | cpu->exception_index = EXCP_DEBUG; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 1602 | cpu_loop_exit(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1603 | } else { |
| 1604 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); |
Andreas Färber | 648f034 | 2013-09-01 17:43:17 +0200 | [diff] [blame] | 1605 | tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); |
Andreas Färber | 0ea8cb8 | 2013-09-03 02:12:23 +0200 | [diff] [blame] | 1606 | cpu_resume_from_signal(cpu, NULL); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1607 | } |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1608 | } |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1609 | } else { |
| 1610 | wp->flags &= ~BP_WATCHPOINT_HIT; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1611 | } |
| 1612 | } |
| 1613 | } |
| 1614 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1615 | /* Watchpoint access routines. Watchpoints are inserted using TLB tricks, |
| 1616 | so these check for a hit then pass through to the normal out-of-line |
| 1617 | phys routines. */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1618 | static uint64_t watch_mem_read(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1619 | unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1620 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1621 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ); |
| 1622 | switch (size) { |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 1623 | case 1: return ldub_phys(&address_space_memory, addr); |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 1624 | case 2: return lduw_phys(&address_space_memory, addr); |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 1625 | case 4: return ldl_phys(&address_space_memory, addr); |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1626 | default: abort(); |
| 1627 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1628 | } |
| 1629 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1630 | static void watch_mem_write(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1631 | uint64_t val, unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1632 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1633 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_WRITE); |
| 1634 | switch (size) { |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1635 | case 1: |
Edgar E. Iglesias | db3be60 | 2013-12-17 15:29:06 +1000 | [diff] [blame] | 1636 | stb_phys(&address_space_memory, addr, val); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1637 | break; |
| 1638 | case 2: |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 1639 | stw_phys(&address_space_memory, addr, val); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1640 | break; |
| 1641 | case 4: |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 1642 | stl_phys(&address_space_memory, addr, val); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1643 | break; |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1644 | default: abort(); |
| 1645 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1646 | } |
| 1647 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1648 | static const MemoryRegionOps watch_mem_ops = { |
| 1649 | .read = watch_mem_read, |
| 1650 | .write = watch_mem_write, |
| 1651 | .endianness = DEVICE_NATIVE_ENDIAN, |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1652 | }; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1653 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1654 | static uint64_t subpage_read(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1655 | unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1656 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1657 | subpage_t *subpage = opaque; |
| 1658 | uint8_t buf[4]; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 1659 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1660 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1661 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1662 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1663 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1664 | address_space_read(subpage->as, addr + subpage->base, buf, len); |
| 1665 | switch (len) { |
| 1666 | case 1: |
| 1667 | return ldub_p(buf); |
| 1668 | case 2: |
| 1669 | return lduw_p(buf); |
| 1670 | case 4: |
| 1671 | return ldl_p(buf); |
| 1672 | default: |
| 1673 | abort(); |
| 1674 | } |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1675 | } |
| 1676 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1677 | static void subpage_write(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1678 | uint64_t value, unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1679 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1680 | subpage_t *subpage = opaque; |
| 1681 | uint8_t buf[4]; |
| 1682 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1683 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1684 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1685 | " value %"PRIx64"\n", |
| 1686 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1687 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1688 | switch (len) { |
| 1689 | case 1: |
| 1690 | stb_p(buf, value); |
| 1691 | break; |
| 1692 | case 2: |
| 1693 | stw_p(buf, value); |
| 1694 | break; |
| 1695 | case 4: |
| 1696 | stl_p(buf, value); |
| 1697 | break; |
| 1698 | default: |
| 1699 | abort(); |
| 1700 | } |
| 1701 | address_space_write(subpage->as, addr + subpage->base, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1702 | } |
| 1703 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1704 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1705 | unsigned len, bool is_write) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1706 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1707 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1708 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1709 | printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1710 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1711 | #endif |
| 1712 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1713 | return address_space_access_valid(subpage->as, addr + subpage->base, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1714 | len, is_write); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1715 | } |
| 1716 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1717 | static const MemoryRegionOps subpage_ops = { |
| 1718 | .read = subpage_read, |
| 1719 | .write = subpage_write, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1720 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1721 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1722 | }; |
| 1723 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1724 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1725 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1726 | { |
| 1727 | int idx, eidx; |
| 1728 | |
| 1729 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 1730 | return -1; |
| 1731 | idx = SUBPAGE_IDX(start); |
| 1732 | eidx = SUBPAGE_IDX(end); |
| 1733 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1734 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 1735 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1736 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1737 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1738 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1739 | } |
| 1740 | |
| 1741 | return 0; |
| 1742 | } |
| 1743 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1744 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1745 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1746 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1747 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1748 | mmio = g_malloc0(sizeof(subpage_t)); |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1749 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1750 | mmio->as = as; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1751 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1752 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1753 | "subpage", TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 1754 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1755 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1756 | printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__, |
| 1757 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1758 | #endif |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1759 | subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1760 | |
| 1761 | return mmio; |
| 1762 | } |
| 1763 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1764 | static uint16_t dummy_section(PhysPageMap *map, MemoryRegion *mr) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1765 | { |
| 1766 | MemoryRegionSection section = { |
Edgar E. Iglesias | 3be91e8 | 2013-11-07 18:42:51 +0100 | [diff] [blame] | 1767 | .address_space = &address_space_memory, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1768 | .mr = mr, |
| 1769 | .offset_within_address_space = 0, |
| 1770 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1771 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1772 | }; |
| 1773 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1774 | return phys_section_add(map, §ion); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1775 | } |
| 1776 | |
Edgar E. Iglesias | 7771709 | 2013-11-07 19:55:56 +0100 | [diff] [blame] | 1777 | MemoryRegion *iotlb_to_region(AddressSpace *as, hwaddr index) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1778 | { |
Edgar E. Iglesias | 7771709 | 2013-11-07 19:55:56 +0100 | [diff] [blame] | 1779 | return as->dispatch->map.sections[index & ~TARGET_PAGE_MASK].mr; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1780 | } |
| 1781 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1782 | static void io_mem_init(void) |
| 1783 | { |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1784 | memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX); |
| 1785 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1786 | "unassigned", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1787 | memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1788 | "notdirty", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1789 | memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1790 | "watch", UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1791 | } |
| 1792 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1793 | static void mem_begin(MemoryListener *listener) |
| 1794 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1795 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1796 | AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1); |
| 1797 | uint16_t n; |
| 1798 | |
| 1799 | n = dummy_section(&d->map, &io_mem_unassigned); |
| 1800 | assert(n == PHYS_SECTION_UNASSIGNED); |
| 1801 | n = dummy_section(&d->map, &io_mem_notdirty); |
| 1802 | assert(n == PHYS_SECTION_NOTDIRTY); |
| 1803 | n = dummy_section(&d->map, &io_mem_rom); |
| 1804 | assert(n == PHYS_SECTION_ROM); |
| 1805 | n = dummy_section(&d->map, &io_mem_watch); |
| 1806 | assert(n == PHYS_SECTION_WATCH); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1807 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 1808 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1809 | d->as = as; |
| 1810 | as->next_dispatch = d; |
| 1811 | } |
| 1812 | |
| 1813 | static void mem_commit(MemoryListener *listener) |
| 1814 | { |
| 1815 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1816 | AddressSpaceDispatch *cur = as->dispatch; |
| 1817 | AddressSpaceDispatch *next = as->next_dispatch; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1818 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1819 | phys_page_compact_all(next, next->map.nodes_nb); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 1820 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1821 | as->dispatch = next; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1822 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1823 | if (cur) { |
| 1824 | phys_sections_free(&cur->map); |
| 1825 | g_free(cur); |
| 1826 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1827 | } |
| 1828 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 1829 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1830 | { |
Andreas Färber | 182735e | 2013-05-29 22:29:20 +0200 | [diff] [blame] | 1831 | CPUState *cpu; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1832 | |
| 1833 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 1834 | reset the modified entries */ |
| 1835 | /* XXX: slow ! */ |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 1836 | CPU_FOREACH(cpu) { |
Edgar E. Iglesias | 33bde2e | 2013-11-21 19:06:30 +0100 | [diff] [blame] | 1837 | /* FIXME: Disentangle the cpu.h circular files deps so we can |
| 1838 | directly get the right CPU from listener. */ |
| 1839 | if (cpu->tcg_as_listener != listener) { |
| 1840 | continue; |
| 1841 | } |
Andreas Färber | 00c8cb0 | 2013-09-04 02:19:44 +0200 | [diff] [blame] | 1842 | tlb_flush(cpu, 1); |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1843 | } |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1844 | } |
| 1845 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1846 | static void core_log_global_start(MemoryListener *listener) |
| 1847 | { |
Juan Quintela | 981fdf2 | 2013-10-10 11:54:09 +0200 | [diff] [blame] | 1848 | cpu_physical_memory_set_dirty_tracking(true); |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1849 | } |
| 1850 | |
| 1851 | static void core_log_global_stop(MemoryListener *listener) |
| 1852 | { |
Juan Quintela | 981fdf2 | 2013-10-10 11:54:09 +0200 | [diff] [blame] | 1853 | cpu_physical_memory_set_dirty_tracking(false); |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1854 | } |
| 1855 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1856 | static MemoryListener core_memory_listener = { |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1857 | .log_global_start = core_log_global_start, |
| 1858 | .log_global_stop = core_log_global_stop, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1859 | .priority = 1, |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1860 | }; |
| 1861 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1862 | void address_space_init_dispatch(AddressSpace *as) |
| 1863 | { |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1864 | as->dispatch = NULL; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1865 | as->dispatch_listener = (MemoryListener) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1866 | .begin = mem_begin, |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1867 | .commit = mem_commit, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1868 | .region_add = mem_add, |
| 1869 | .region_nop = mem_add, |
| 1870 | .priority = 0, |
| 1871 | }; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1872 | memory_listener_register(&as->dispatch_listener, as); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1873 | } |
| 1874 | |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1875 | void address_space_destroy_dispatch(AddressSpace *as) |
| 1876 | { |
| 1877 | AddressSpaceDispatch *d = as->dispatch; |
| 1878 | |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1879 | memory_listener_unregister(&as->dispatch_listener); |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1880 | g_free(d); |
| 1881 | as->dispatch = NULL; |
| 1882 | } |
| 1883 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1884 | static void memory_map_init(void) |
| 1885 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1886 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 1887 | |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 1888 | memory_region_init(system_memory, NULL, "system", UINT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1889 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1890 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1891 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 1892 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 1893 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1894 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1895 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 1896 | memory_listener_register(&core_memory_listener, &address_space_memory); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1897 | } |
| 1898 | |
| 1899 | MemoryRegion *get_system_memory(void) |
| 1900 | { |
| 1901 | return system_memory; |
| 1902 | } |
| 1903 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1904 | MemoryRegion *get_system_io(void) |
| 1905 | { |
| 1906 | return system_io; |
| 1907 | } |
| 1908 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 1909 | #endif /* !defined(CONFIG_USER_ONLY) */ |
| 1910 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1911 | /* physical memory access (slow version, mainly for debug) */ |
| 1912 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 1913 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1914 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1915 | { |
| 1916 | int l, flags; |
| 1917 | target_ulong page; |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 1918 | void * p; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1919 | |
| 1920 | while (len > 0) { |
| 1921 | page = addr & TARGET_PAGE_MASK; |
| 1922 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 1923 | if (l > len) |
| 1924 | l = len; |
| 1925 | flags = page_get_flags(page); |
| 1926 | if (!(flags & PAGE_VALID)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1927 | return -1; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1928 | if (is_write) { |
| 1929 | if (!(flags & PAGE_WRITE)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1930 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1931 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1932 | if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1933 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1934 | memcpy(p, buf, l); |
| 1935 | unlock_user(p, addr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1936 | } else { |
| 1937 | if (!(flags & PAGE_READ)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1938 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1939 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1940 | if (!(p = lock_user(VERIFY_READ, addr, l, 1))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1941 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1942 | memcpy(buf, p, l); |
aurel32 | 5b25757 | 2008-04-28 08:54:59 +0000 | [diff] [blame] | 1943 | unlock_user(p, addr, 0); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1944 | } |
| 1945 | len -= l; |
| 1946 | buf += l; |
| 1947 | addr += l; |
| 1948 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1949 | return 0; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1950 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 1951 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1952 | #else |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1953 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1954 | static void invalidate_and_set_dirty(hwaddr addr, |
| 1955 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1956 | { |
Juan Quintela | a2cd8c8 | 2013-10-10 11:20:22 +0200 | [diff] [blame] | 1957 | if (cpu_physical_memory_is_clean(addr)) { |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1958 | /* invalidate code */ |
| 1959 | tb_invalidate_phys_page_range(addr, addr + length, 0); |
| 1960 | /* set dirty bit */ |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 1961 | cpu_physical_memory_set_dirty_flag(addr, DIRTY_MEMORY_VGA); |
| 1962 | cpu_physical_memory_set_dirty_flag(addr, DIRTY_MEMORY_MIGRATION); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1963 | } |
Anthony PERARD | e226939 | 2012-10-03 13:49:22 +0000 | [diff] [blame] | 1964 | xen_modified_memory(addr, length); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1965 | } |
| 1966 | |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1967 | static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1968 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 1969 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1970 | |
| 1971 | /* Regions are assumed to support 1-4 byte accesses unless |
| 1972 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1973 | if (access_size_max == 0) { |
| 1974 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1975 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1976 | |
| 1977 | /* Bound the maximum access by the alignment of the address. */ |
| 1978 | if (!mr->ops->impl.unaligned) { |
| 1979 | unsigned align_size_max = addr & -addr; |
| 1980 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 1981 | access_size_max = align_size_max; |
| 1982 | } |
| 1983 | } |
| 1984 | |
| 1985 | /* Don't attempt accesses larger than the maximum. */ |
| 1986 | if (l > access_size_max) { |
| 1987 | l = access_size_max; |
| 1988 | } |
Paolo Bonzini | 098178f | 2013-07-29 14:27:39 +0200 | [diff] [blame] | 1989 | if (l & (l - 1)) { |
| 1990 | l = 1 << (qemu_fls(l) - 1); |
| 1991 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1992 | |
| 1993 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1994 | } |
| 1995 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1996 | bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1997 | int len, bool is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1998 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1999 | hwaddr l; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2000 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2001 | uint64_t val; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2002 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2003 | MemoryRegion *mr; |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2004 | bool error = false; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2005 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2006 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2007 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2008 | mr = address_space_translate(as, addr, &addr1, &l, is_write); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2009 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2010 | if (is_write) { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2011 | if (!memory_access_is_direct(mr, is_write)) { |
| 2012 | l = memory_access_size(mr, l, addr1); |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 2013 | /* XXX: could force current_cpu to NULL to avoid |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 2014 | potential bugs */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2015 | switch (l) { |
| 2016 | case 8: |
| 2017 | /* 64 bit write access */ |
| 2018 | val = ldq_p(buf); |
| 2019 | error |= io_mem_write(mr, addr1, val, 8); |
| 2020 | break; |
| 2021 | case 4: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 2022 | /* 32 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2023 | val = ldl_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2024 | error |= io_mem_write(mr, addr1, val, 4); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2025 | break; |
| 2026 | case 2: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 2027 | /* 16 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2028 | val = lduw_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2029 | error |= io_mem_write(mr, addr1, val, 2); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2030 | break; |
| 2031 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 2032 | /* 8 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2033 | val = ldub_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2034 | error |= io_mem_write(mr, addr1, val, 1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2035 | break; |
| 2036 | default: |
| 2037 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2038 | } |
Paolo Bonzini | 2bbfa05 | 2013-05-24 12:29:54 +0200 | [diff] [blame] | 2039 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2040 | addr1 += memory_region_get_ram_addr(mr); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2041 | /* RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2042 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2043 | memcpy(ptr, buf, l); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2044 | invalidate_and_set_dirty(addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2045 | } |
| 2046 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2047 | if (!memory_access_is_direct(mr, is_write)) { |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2048 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2049 | l = memory_access_size(mr, l, addr1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2050 | switch (l) { |
| 2051 | case 8: |
| 2052 | /* 64 bit read access */ |
| 2053 | error |= io_mem_read(mr, addr1, &val, 8); |
| 2054 | stq_p(buf, val); |
| 2055 | break; |
| 2056 | case 4: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2057 | /* 32 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2058 | error |= io_mem_read(mr, addr1, &val, 4); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2059 | stl_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2060 | break; |
| 2061 | case 2: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2062 | /* 16 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2063 | error |= io_mem_read(mr, addr1, &val, 2); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2064 | stw_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2065 | break; |
| 2066 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 2067 | /* 8 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2068 | error |= io_mem_read(mr, addr1, &val, 1); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 2069 | stb_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2070 | break; |
| 2071 | default: |
| 2072 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2073 | } |
| 2074 | } else { |
| 2075 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2076 | ptr = qemu_get_ram_ptr(mr->ram_addr + addr1); |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 2077 | memcpy(buf, ptr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2078 | } |
| 2079 | } |
| 2080 | len -= l; |
| 2081 | buf += l; |
| 2082 | addr += l; |
| 2083 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2084 | |
| 2085 | return error; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2086 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2087 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2088 | bool address_space_write(AddressSpace *as, hwaddr addr, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2089 | const uint8_t *buf, int len) |
| 2090 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2091 | return address_space_rw(as, addr, (uint8_t *)buf, len, true); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2092 | } |
| 2093 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2094 | bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2095 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2096 | return address_space_rw(as, addr, buf, len, false); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2097 | } |
| 2098 | |
| 2099 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2100 | void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2101 | int len, int is_write) |
| 2102 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2103 | address_space_rw(&address_space_memory, addr, buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2104 | } |
| 2105 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2106 | enum write_rom_type { |
| 2107 | WRITE_DATA, |
| 2108 | FLUSH_CACHE, |
| 2109 | }; |
| 2110 | |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 2111 | static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as, |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2112 | hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2113 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2114 | hwaddr l; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2115 | uint8_t *ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2116 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2117 | MemoryRegion *mr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2118 | |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2119 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2120 | l = len; |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 2121 | mr = address_space_translate(as, addr, &addr1, &l, true); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2122 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2123 | if (!(memory_region_is_ram(mr) || |
| 2124 | memory_region_is_romd(mr))) { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2125 | /* do nothing */ |
| 2126 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2127 | addr1 += memory_region_get_ram_addr(mr); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2128 | /* ROM/RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2129 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2130 | switch (type) { |
| 2131 | case WRITE_DATA: |
| 2132 | memcpy(ptr, buf, l); |
| 2133 | invalidate_and_set_dirty(addr1, l); |
| 2134 | break; |
| 2135 | case FLUSH_CACHE: |
| 2136 | flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); |
| 2137 | break; |
| 2138 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2139 | } |
| 2140 | len -= l; |
| 2141 | buf += l; |
| 2142 | addr += l; |
| 2143 | } |
| 2144 | } |
| 2145 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2146 | /* used for ROM loading : can write in RAM and ROM */ |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 2147 | void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr, |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2148 | const uint8_t *buf, int len) |
| 2149 | { |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 2150 | cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2151 | } |
| 2152 | |
| 2153 | void cpu_flush_icache_range(hwaddr start, int len) |
| 2154 | { |
| 2155 | /* |
| 2156 | * This function should do the same thing as an icache flush that was |
| 2157 | * triggered from within the guest. For TCG we are always cache coherent, |
| 2158 | * so there is no need to flush anything. For KVM / Xen we need to flush |
| 2159 | * the host's instruction cache at least. |
| 2160 | */ |
| 2161 | if (tcg_enabled()) { |
| 2162 | return; |
| 2163 | } |
| 2164 | |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 2165 | cpu_physical_memory_write_rom_internal(&address_space_memory, |
| 2166 | start, NULL, len, FLUSH_CACHE); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 2167 | } |
| 2168 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2169 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2170 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2171 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2172 | hwaddr addr; |
| 2173 | hwaddr len; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2174 | } BounceBuffer; |
| 2175 | |
| 2176 | static BounceBuffer bounce; |
| 2177 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2178 | typedef struct MapClient { |
| 2179 | void *opaque; |
| 2180 | void (*callback)(void *opaque); |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2181 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2182 | } MapClient; |
| 2183 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2184 | static QLIST_HEAD(map_client_list, MapClient) map_client_list |
| 2185 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2186 | |
| 2187 | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)) |
| 2188 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2189 | MapClient *client = g_malloc(sizeof(*client)); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2190 | |
| 2191 | client->opaque = opaque; |
| 2192 | client->callback = callback; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2193 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2194 | return client; |
| 2195 | } |
| 2196 | |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 2197 | static void cpu_unregister_map_client(void *_client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2198 | { |
| 2199 | MapClient *client = (MapClient *)_client; |
| 2200 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2201 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2202 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2203 | } |
| 2204 | |
| 2205 | static void cpu_notify_map_clients(void) |
| 2206 | { |
| 2207 | MapClient *client; |
| 2208 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2209 | while (!QLIST_EMPTY(&map_client_list)) { |
| 2210 | client = QLIST_FIRST(&map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2211 | client->callback(client->opaque); |
Isaku Yamahata | 34d5e94 | 2009-06-26 18:57:18 +0900 | [diff] [blame] | 2212 | cpu_unregister_map_client(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2213 | } |
| 2214 | } |
| 2215 | |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2216 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write) |
| 2217 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2218 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2219 | hwaddr l, xlat; |
| 2220 | |
| 2221 | while (len > 0) { |
| 2222 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2223 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2224 | if (!memory_access_is_direct(mr, is_write)) { |
| 2225 | l = memory_access_size(mr, l, addr); |
| 2226 | if (!memory_region_access_valid(mr, xlat, l, is_write)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2227 | return false; |
| 2228 | } |
| 2229 | } |
| 2230 | |
| 2231 | len -= l; |
| 2232 | addr += l; |
| 2233 | } |
| 2234 | return true; |
| 2235 | } |
| 2236 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2237 | /* Map a physical memory region into a host virtual address. |
| 2238 | * May map a subset of the requested range, given by and returned in *plen. |
| 2239 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 2240 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2241 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 2242 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2243 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2244 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2245 | hwaddr addr, |
| 2246 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2247 | bool is_write) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2248 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2249 | hwaddr len = *plen; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2250 | hwaddr done = 0; |
| 2251 | hwaddr l, xlat, base; |
| 2252 | MemoryRegion *mr, *this_mr; |
| 2253 | ram_addr_t raddr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2254 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2255 | if (len == 0) { |
| 2256 | return NULL; |
| 2257 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2258 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2259 | l = len; |
| 2260 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2261 | if (!memory_access_is_direct(mr, is_write)) { |
| 2262 | if (bounce.buffer) { |
| 2263 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2264 | } |
Kevin Wolf | e85d9db | 2013-07-22 14:30:23 +0200 | [diff] [blame] | 2265 | /* Avoid unbounded allocations */ |
| 2266 | l = MIN(l, TARGET_PAGE_SIZE); |
| 2267 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2268 | bounce.addr = addr; |
| 2269 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2270 | |
| 2271 | memory_region_ref(mr); |
| 2272 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2273 | if (!is_write) { |
| 2274 | address_space_read(as, addr, bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2275 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2276 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2277 | *plen = l; |
| 2278 | return bounce.buffer; |
| 2279 | } |
| 2280 | |
| 2281 | base = xlat; |
| 2282 | raddr = memory_region_get_ram_addr(mr); |
| 2283 | |
| 2284 | for (;;) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2285 | len -= l; |
| 2286 | addr += l; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2287 | done += l; |
| 2288 | if (len == 0) { |
| 2289 | break; |
| 2290 | } |
| 2291 | |
| 2292 | l = len; |
| 2293 | this_mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2294 | if (this_mr != mr || xlat != base + done) { |
| 2295 | break; |
| 2296 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2297 | } |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2298 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2299 | memory_region_ref(mr); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2300 | *plen = done; |
| 2301 | return qemu_ram_ptr_length(raddr + base, plen); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2302 | } |
| 2303 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2304 | /* Unmaps a memory region previously mapped by address_space_map(). |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2305 | * Will also mark the memory as dirty if is_write == 1. access_len gives |
| 2306 | * the amount of memory that was actually read or written by the caller. |
| 2307 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2308 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
| 2309 | int is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2310 | { |
| 2311 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2312 | MemoryRegion *mr; |
| 2313 | ram_addr_t addr1; |
| 2314 | |
| 2315 | mr = qemu_ram_addr_from_host(buffer, &addr1); |
| 2316 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2317 | if (is_write) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2318 | while (access_len) { |
| 2319 | unsigned l; |
| 2320 | l = TARGET_PAGE_SIZE; |
| 2321 | if (l > access_len) |
| 2322 | l = access_len; |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2323 | invalidate_and_set_dirty(addr1, l); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2324 | addr1 += l; |
| 2325 | access_len -= l; |
| 2326 | } |
| 2327 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2328 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 2329 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 2330 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2331 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2332 | return; |
| 2333 | } |
| 2334 | if (is_write) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2335 | address_space_write(as, bounce.addr, bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2336 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 2337 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2338 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2339 | memory_region_unref(bounce.mr); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2340 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2341 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2342 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2343 | void *cpu_physical_memory_map(hwaddr addr, |
| 2344 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2345 | int is_write) |
| 2346 | { |
| 2347 | return address_space_map(&address_space_memory, addr, plen, is_write); |
| 2348 | } |
| 2349 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2350 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
| 2351 | int is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2352 | { |
| 2353 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 2354 | } |
| 2355 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2356 | /* warning: addr must be aligned */ |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2357 | static inline uint32_t ldl_phys_internal(AddressSpace *as, hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2358 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2359 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2360 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2361 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2362 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2363 | hwaddr l = 4; |
| 2364 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2365 | |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2366 | mr = address_space_translate(as, addr, &addr1, &l, false); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2367 | if (l < 4 || !memory_access_is_direct(mr, false)) { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2368 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2369 | io_mem_read(mr, addr1, &val, 4); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2370 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2371 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2372 | val = bswap32(val); |
| 2373 | } |
| 2374 | #else |
| 2375 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2376 | val = bswap32(val); |
| 2377 | } |
| 2378 | #endif |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2379 | } else { |
| 2380 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2381 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2382 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2383 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2384 | switch (endian) { |
| 2385 | case DEVICE_LITTLE_ENDIAN: |
| 2386 | val = ldl_le_p(ptr); |
| 2387 | break; |
| 2388 | case DEVICE_BIG_ENDIAN: |
| 2389 | val = ldl_be_p(ptr); |
| 2390 | break; |
| 2391 | default: |
| 2392 | val = ldl_p(ptr); |
| 2393 | break; |
| 2394 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2395 | } |
| 2396 | return val; |
| 2397 | } |
| 2398 | |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2399 | uint32_t ldl_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2400 | { |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2401 | return ldl_phys_internal(as, addr, DEVICE_NATIVE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2402 | } |
| 2403 | |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2404 | uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2405 | { |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2406 | return ldl_phys_internal(as, addr, DEVICE_LITTLE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2407 | } |
| 2408 | |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2409 | uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2410 | { |
Edgar E. Iglesias | fdfba1a | 2013-11-15 14:46:38 +0100 | [diff] [blame] | 2411 | return ldl_phys_internal(as, addr, DEVICE_BIG_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2412 | } |
| 2413 | |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2414 | /* warning: addr must be aligned */ |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2415 | static inline uint64_t ldq_phys_internal(AddressSpace *as, hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2416 | enum device_endian endian) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2417 | { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2418 | uint8_t *ptr; |
| 2419 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2420 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2421 | hwaddr l = 8; |
| 2422 | hwaddr addr1; |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2423 | |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2424 | mr = address_space_translate(as, addr, &addr1, &l, |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2425 | false); |
| 2426 | if (l < 8 || !memory_access_is_direct(mr, false)) { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2427 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2428 | io_mem_read(mr, addr1, &val, 8); |
Paolo Bonzini | 968a562 | 2013-05-24 17:58:37 +0200 | [diff] [blame] | 2429 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2430 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2431 | val = bswap64(val); |
| 2432 | } |
| 2433 | #else |
| 2434 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2435 | val = bswap64(val); |
| 2436 | } |
| 2437 | #endif |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2438 | } else { |
| 2439 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2440 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2441 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2442 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2443 | switch (endian) { |
| 2444 | case DEVICE_LITTLE_ENDIAN: |
| 2445 | val = ldq_le_p(ptr); |
| 2446 | break; |
| 2447 | case DEVICE_BIG_ENDIAN: |
| 2448 | val = ldq_be_p(ptr); |
| 2449 | break; |
| 2450 | default: |
| 2451 | val = ldq_p(ptr); |
| 2452 | break; |
| 2453 | } |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2454 | } |
| 2455 | return val; |
| 2456 | } |
| 2457 | |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2458 | uint64_t ldq_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2459 | { |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2460 | return ldq_phys_internal(as, addr, DEVICE_NATIVE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2461 | } |
| 2462 | |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2463 | uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2464 | { |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2465 | return ldq_phys_internal(as, addr, DEVICE_LITTLE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2466 | } |
| 2467 | |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2468 | uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2469 | { |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2470 | return ldq_phys_internal(as, addr, DEVICE_BIG_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2471 | } |
| 2472 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2473 | /* XXX: optimize */ |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2474 | uint32_t ldub_phys(AddressSpace *as, hwaddr addr) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2475 | { |
| 2476 | uint8_t val; |
Edgar E. Iglesias | 2c17449 | 2013-12-17 14:05:40 +1000 | [diff] [blame] | 2477 | address_space_rw(as, addr, &val, 1, 0); |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2478 | return val; |
| 2479 | } |
| 2480 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2481 | /* warning: addr must be aligned */ |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2482 | static inline uint32_t lduw_phys_internal(AddressSpace *as, hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2483 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2484 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2485 | uint8_t *ptr; |
| 2486 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2487 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2488 | hwaddr l = 2; |
| 2489 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2490 | |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2491 | mr = address_space_translate(as, addr, &addr1, &l, |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2492 | false); |
| 2493 | if (l < 2 || !memory_access_is_direct(mr, false)) { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2494 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2495 | io_mem_read(mr, addr1, &val, 2); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2496 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2497 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2498 | val = bswap16(val); |
| 2499 | } |
| 2500 | #else |
| 2501 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2502 | val = bswap16(val); |
| 2503 | } |
| 2504 | #endif |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2505 | } else { |
| 2506 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2507 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2508 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2509 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2510 | switch (endian) { |
| 2511 | case DEVICE_LITTLE_ENDIAN: |
| 2512 | val = lduw_le_p(ptr); |
| 2513 | break; |
| 2514 | case DEVICE_BIG_ENDIAN: |
| 2515 | val = lduw_be_p(ptr); |
| 2516 | break; |
| 2517 | default: |
| 2518 | val = lduw_p(ptr); |
| 2519 | break; |
| 2520 | } |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2521 | } |
| 2522 | return val; |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2523 | } |
| 2524 | |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2525 | uint32_t lduw_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2526 | { |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2527 | return lduw_phys_internal(as, addr, DEVICE_NATIVE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2528 | } |
| 2529 | |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2530 | uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2531 | { |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2532 | return lduw_phys_internal(as, addr, DEVICE_LITTLE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2533 | } |
| 2534 | |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2535 | uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2536 | { |
Edgar E. Iglesias | 41701aa | 2013-12-17 14:33:56 +1000 | [diff] [blame] | 2537 | return lduw_phys_internal(as, addr, DEVICE_BIG_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2538 | } |
| 2539 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2540 | /* warning: addr must be aligned. The ram page is not masked as dirty |
| 2541 | and the code inside is not invalidated. It is useful if the dirty |
| 2542 | bits are used to track modified PTEs */ |
Edgar E. Iglesias | 2198a12 | 2013-11-28 10:13:41 +0100 | [diff] [blame] | 2543 | void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2544 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2545 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2546 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2547 | hwaddr l = 4; |
| 2548 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2549 | |
Edgar E. Iglesias | 2198a12 | 2013-11-28 10:13:41 +0100 | [diff] [blame] | 2550 | mr = address_space_translate(as, addr, &addr1, &l, |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2551 | true); |
| 2552 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
| 2553 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2554 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2555 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2556 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2557 | stl_p(ptr, val); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2558 | |
| 2559 | if (unlikely(in_migration)) { |
Juan Quintela | a2cd8c8 | 2013-10-10 11:20:22 +0200 | [diff] [blame] | 2560 | if (cpu_physical_memory_is_clean(addr1)) { |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2561 | /* invalidate code */ |
| 2562 | tb_invalidate_phys_page_range(addr1, addr1 + 4, 0); |
| 2563 | /* set dirty bit */ |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 2564 | cpu_physical_memory_set_dirty_flag(addr1, |
| 2565 | DIRTY_MEMORY_MIGRATION); |
| 2566 | cpu_physical_memory_set_dirty_flag(addr1, DIRTY_MEMORY_VGA); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2567 | } |
| 2568 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2569 | } |
| 2570 | } |
| 2571 | |
| 2572 | /* warning: addr must be aligned */ |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2573 | static inline void stl_phys_internal(AddressSpace *as, |
| 2574 | hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2575 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2576 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2577 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2578 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2579 | hwaddr l = 4; |
| 2580 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2581 | |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2582 | mr = address_space_translate(as, addr, &addr1, &l, |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2583 | true); |
| 2584 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2585 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2586 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2587 | val = bswap32(val); |
| 2588 | } |
| 2589 | #else |
| 2590 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2591 | val = bswap32(val); |
| 2592 | } |
| 2593 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2594 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2595 | } else { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2596 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2597 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2598 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2599 | switch (endian) { |
| 2600 | case DEVICE_LITTLE_ENDIAN: |
| 2601 | stl_le_p(ptr, val); |
| 2602 | break; |
| 2603 | case DEVICE_BIG_ENDIAN: |
| 2604 | stl_be_p(ptr, val); |
| 2605 | break; |
| 2606 | default: |
| 2607 | stl_p(ptr, val); |
| 2608 | break; |
| 2609 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2610 | invalidate_and_set_dirty(addr1, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2611 | } |
| 2612 | } |
| 2613 | |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2614 | void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2615 | { |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2616 | stl_phys_internal(as, addr, val, DEVICE_NATIVE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2617 | } |
| 2618 | |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2619 | void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2620 | { |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2621 | stl_phys_internal(as, addr, val, DEVICE_LITTLE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2622 | } |
| 2623 | |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2624 | void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2625 | { |
Edgar E. Iglesias | ab1da85 | 2013-12-17 15:07:29 +1000 | [diff] [blame] | 2626 | stl_phys_internal(as, addr, val, DEVICE_BIG_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2627 | } |
| 2628 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2629 | /* XXX: optimize */ |
Edgar E. Iglesias | db3be60 | 2013-12-17 15:29:06 +1000 | [diff] [blame] | 2630 | void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2631 | { |
| 2632 | uint8_t v = val; |
Edgar E. Iglesias | db3be60 | 2013-12-17 15:29:06 +1000 | [diff] [blame] | 2633 | address_space_rw(as, addr, &v, 1, 1); |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2634 | } |
| 2635 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2636 | /* warning: addr must be aligned */ |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2637 | static inline void stw_phys_internal(AddressSpace *as, |
| 2638 | hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2639 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2640 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2641 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2642 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2643 | hwaddr l = 2; |
| 2644 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2645 | |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2646 | mr = address_space_translate(as, addr, &addr1, &l, true); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2647 | if (l < 2 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2648 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2649 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2650 | val = bswap16(val); |
| 2651 | } |
| 2652 | #else |
| 2653 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2654 | val = bswap16(val); |
| 2655 | } |
| 2656 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2657 | io_mem_write(mr, addr1, val, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2658 | } else { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2659 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2660 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2661 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2662 | switch (endian) { |
| 2663 | case DEVICE_LITTLE_ENDIAN: |
| 2664 | stw_le_p(ptr, val); |
| 2665 | break; |
| 2666 | case DEVICE_BIG_ENDIAN: |
| 2667 | stw_be_p(ptr, val); |
| 2668 | break; |
| 2669 | default: |
| 2670 | stw_p(ptr, val); |
| 2671 | break; |
| 2672 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2673 | invalidate_and_set_dirty(addr1, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2674 | } |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2675 | } |
| 2676 | |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2677 | void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2678 | { |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2679 | stw_phys_internal(as, addr, val, DEVICE_NATIVE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2680 | } |
| 2681 | |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2682 | void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2683 | { |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2684 | stw_phys_internal(as, addr, val, DEVICE_LITTLE_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2685 | } |
| 2686 | |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2687 | void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2688 | { |
Edgar E. Iglesias | 5ce5944 | 2013-12-17 15:22:06 +1000 | [diff] [blame] | 2689 | stw_phys_internal(as, addr, val, DEVICE_BIG_ENDIAN); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2690 | } |
| 2691 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2692 | /* XXX: optimize */ |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2693 | void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2694 | { |
| 2695 | val = tswap64(val); |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2696 | address_space_rw(as, addr, (void *) &val, 8, 1); |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2697 | } |
| 2698 | |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2699 | void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2700 | { |
| 2701 | val = cpu_to_le64(val); |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2702 | address_space_rw(as, addr, (void *) &val, 8, 1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2703 | } |
| 2704 | |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2705 | void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2706 | { |
| 2707 | val = cpu_to_be64(val); |
Edgar E. Iglesias | f606604 | 2013-11-28 00:11:44 +0100 | [diff] [blame] | 2708 | address_space_rw(as, addr, (void *) &val, 8, 1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2709 | } |
| 2710 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2711 | /* virtual memory access for debug (includes writing to ROM) */ |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2712 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
bellard | b448f2f | 2004-02-25 23:24:04 +0000 | [diff] [blame] | 2713 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2714 | { |
| 2715 | int l; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2716 | hwaddr phys_addr; |
j_mayer | 9b3c35e | 2007-04-07 11:21:28 +0000 | [diff] [blame] | 2717 | target_ulong page; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2718 | |
| 2719 | while (len > 0) { |
| 2720 | page = addr & TARGET_PAGE_MASK; |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2721 | phys_addr = cpu_get_phys_page_debug(cpu, page); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2722 | /* if no physical page mapped, return an error */ |
| 2723 | if (phys_addr == -1) |
| 2724 | return -1; |
| 2725 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 2726 | if (l > len) |
| 2727 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2728 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 2729 | if (is_write) { |
| 2730 | cpu_physical_memory_write_rom(cpu->as, phys_addr, buf, l); |
| 2731 | } else { |
| 2732 | address_space_rw(cpu->as, phys_addr, buf, l, 0); |
| 2733 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2734 | len -= l; |
| 2735 | buf += l; |
| 2736 | addr += l; |
| 2737 | } |
| 2738 | return 0; |
| 2739 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2740 | #endif |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2741 | |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 2742 | #if !defined(CONFIG_USER_ONLY) |
| 2743 | |
| 2744 | /* |
| 2745 | * A helper function for the _utterly broken_ virtio device model to find out if |
| 2746 | * it's running on a big endian machine. Don't do this at home kids! |
| 2747 | */ |
| 2748 | bool virtio_is_big_endian(void); |
| 2749 | bool virtio_is_big_endian(void) |
| 2750 | { |
| 2751 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2752 | return true; |
| 2753 | #else |
| 2754 | return false; |
| 2755 | #endif |
| 2756 | } |
| 2757 | |
| 2758 | #endif |
| 2759 | |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2760 | #ifndef CONFIG_USER_ONLY |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2761 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2762 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2763 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2764 | hwaddr l = 1; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2765 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2766 | mr = address_space_translate(&address_space_memory, |
| 2767 | phys_addr, &phys_addr, &l, false); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2768 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2769 | return !(memory_region_is_ram(mr) || |
| 2770 | memory_region_is_romd(mr)); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2771 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 2772 | |
| 2773 | void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
| 2774 | { |
| 2775 | RAMBlock *block; |
| 2776 | |
| 2777 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 2778 | func(block->host, block->offset, block->length, opaque); |
| 2779 | } |
| 2780 | } |
Peter Maydell | ec3f8c9 | 2013-06-27 20:53:38 +0100 | [diff] [blame] | 2781 | #endif |