clext: leave the hardware cursor off and at 32x32 after a mode set

The tables of the Cirrus modes write 0x04 to SR12 (graphics cursor
attribute), which selects the 64x64 cursor.  The Cirrus BIOS writes 0x00
to SR12 and SR13 on each mode set that I measured, for the Cirrus modes
and for the standard VGA modes.

SR12 and SR13 after a mode set, with other values written before
(SR12 = 0x04 or 0x05, SR13 = 0x2a), measured on QEMU with the original
BIOS as option ROM (CL-GD5436/46 PCI VGA BIOS 1.25 on cirrus-vga,
CL-GD543x VGA BIOS 1.00a and Diamond SpeedStar BIOS 1.00 on
isa-cirrus-vga, same results):

                                                        SR12  SR13
  int 10h ah=00h  03h 12h 13h 5fh 5ch 60h 64h 6dh 74h   00h   00h
  VBE 4f02h       101h 103h 105h 107h 111h 114h 117h    00h   00h

SeaVGABIOS leaves SR12 04h, SR13 00h after the Cirrus modes, and keeps
the values from before for the standard VGA modes.

A display driver that changes only some bits of SR12 depends on this.
The Windows 3.1 drivers for WIN-OS/2 full screen sessions in OS/2 Warp 3
("Cirrus Logic GD5426/28/29/3x FULLSCREEN WINDOWS DRIVER", 64K_1024.DRV
and 256_1280.DRV) draw the mouse pointer with the hardware cursor: they
write a 32x32 pattern, select it with SR13 = 0x3e, and set bit 0 of
SR12 with a read-modify-write.  (They set bit 1 only for a short time,
to load the cursor colors into the DAC.)  After a mode set by
SeaVGABIOS, bit 2 stays set, so the card shows a 64x64 cursor and takes
its pattern from another place in video memory.

Write 0x00 to SR12 in the tables of the Cirrus modes, and write 0x00 to
SR12 and SR13 when switching back to a standard VGA mode.  With this
patch the mode sets above give the same SR12 and SR13 as with the Cirrus
BIOS.

Signed-off-by: Christian Quante <christian@quante.one>
diff --git a/vgasrc/clext.c b/vgasrc/clext.c
index 0c2f119..cf818fa 100644
--- a/vgasrc/clext.c
+++ b/vgasrc/clext.c
@@ -21,7 +21,7 @@
  ****************************************************************/
 
 /* VGA */
-static u16 cseq_vga[] VAR16 = {0x0007,0xffff};
+static u16 cseq_vga[] VAR16 = {0x0007,0x0012,0x0013,0xffff};
 static u16 cgraph_vga[] VAR16 = {0x0009,0x000a,0x000b,0xffff};
 static u16 ccrtc_vga[] VAR16 = {0x001a,0x001b,0x001d,0xffff};
 
@@ -35,7 +35,7 @@
 static u16 cseq_640x480x8[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1107,
     0x580b,0x580c,0x580d,0x580e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x331b,0x331c,0x331d,0x331e,
     0xffff
 };
@@ -51,7 +51,7 @@
 static u16 cseq_640x480x16[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1707,
     0x580b,0x580c,0x580d,0x580e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x331b,0x331c,0x331d,0x331e,
     0xffff
 };
@@ -67,7 +67,7 @@
 static u16 cseq_640x480x24[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1507,
     0x580b,0x580c,0x580d,0x580e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x331b,0x331c,0x331d,0x331e,
     0xffff
 };
@@ -83,7 +83,7 @@
 static u16 cseq_800x600x8[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1107,
     0x230b,0x230c,0x230d,0x230e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x141b,0x141c,0x141d,0x141e,
     0xffff
 };
@@ -98,7 +98,7 @@
 static u16 cseq_800x600x16[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1707,
     0x230b,0x230c,0x230d,0x230e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x141b,0x141c,0x141d,0x141e,
     0xffff
 };
@@ -113,7 +113,7 @@
 static u16 cseq_800x600x24[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1507,
     0x230b,0x230c,0x230d,0x230e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x141b,0x141c,0x141d,0x141e,
     0xffff
 };
@@ -128,7 +128,7 @@
 static u16 cseq_1024x768x8[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1107,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };
@@ -143,7 +143,7 @@
 static u16 cseq_1024x768x16[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1707,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };
@@ -158,7 +158,7 @@
 static u16 cseq_1024x768x24[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1507,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };
@@ -173,7 +173,7 @@
 static u16 cseq_1280x1024x8[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1107,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };
@@ -188,7 +188,7 @@
 static u16 cseq_1280x1024x16[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1707,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };
@@ -204,7 +204,7 @@
 static u16 cseq_1600x1200x8[] VAR16 = {
     0x0300,0x2101,0x0f02,0x0003,0x0e04,0x1107,
     0x760b,0x760c,0x760d,0x760e,
-    0x0412,0x0013,0x2017,
+    0x0012,0x0013,0x2017,
     0x341b,0x341c,0x341d,0x341e,
     0xffff
 };