clext: set the bank granularity per mode, as the Cirrus BIOS does

clext_set_mode() sets 16K bank granularity (GR0B bit 5) for the Cirrus
modes (only a VBE mode set with a linear frame buffer and without
clearing the memory leaves the bit clear), and vbe_104f01() reports a
window granularity of 16K for every mode.  In my measurements, the
Cirrus BIOS uses 16K only for the modes that need more than 1MB.
Smaller modes get 4K units (GR0B bit 5 clear); the 8 bits of GR9 still
reach all of such a mode.

GR0B bit 5 after a mode set, measured on QEMU with the original BIOS as
option ROM (CL-GD5436/46 PCI VGA BIOS 1.25 on cirrus-vga, CL-GD543x VGA
BIOS 1.00a on isa-cirrus-vga, same results; I did not measure the
15-bit and 24-bit modes):

  int 10h ah=00h  5fh 5ch 60h 64h            clear
                  6dh 74h                    set
  VBE 4f02h       101h 103h 105h 111h 114h   clear, 4f01h reports 4K
                  107h 117h                  set, 4f01h reports 16K

SeaVGABIOS sets the bit for all of them and reports 16K.  (A Diamond
SpeedStar BIOS for the CL-GD543x uses 16K for 101h, 103h and 105h, and
reports 16K for them.)

Software that sets a mode through the BIOS and then switches banks by
itself depends on this.

Set the granularity at the end of clext_set_mode() from the size of the
mode, and return the same value from clext_get_win_granularity(), which
vbe_104f01() reports.  With this patch, the 13 mode sets above give the
same GR0B, the same reported granularity and the same GR9 after 4f05h as
with the Cirrus BIOS.

Signed-off-by: Christian Quante <christian@quante.one>