balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * PXA270-based Intel Mainstone platforms. |
| 3 | * |
| 4 | * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or |
| 5 | * <akuster@mvista.com> |
| 6 | * |
| 7 | * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org> |
| 8 | * |
| 9 | * This code is licensed under the GNU GPL v2. |
Paolo Bonzini | 6b620ca | 2012-01-13 17:44:23 +0100 | [diff] [blame] | 10 | * |
| 11 | * Contributions after 2012-01-13 are licensed under the terms of the |
| 12 | * GNU GPL, version 2 or (at your option) any later version. |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 13 | */ |
Peter Maydell | 12b1672 | 2015-12-07 16:23:45 +0000 | [diff] [blame] | 14 | #include "qemu/osdep.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 15 | #include "qapi/error.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 16 | #include "hw/hw.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 17 | #include "hw/arm/pxa.h" |
Peter Maydell | bd2be15 | 2013-04-09 15:26:55 +0100 | [diff] [blame] | 18 | #include "hw/arm/arm.h" |
Paolo Bonzini | 1422e32 | 2012-10-24 08:43:34 +0200 | [diff] [blame] | 19 | #include "net/net.h" |
Peter Maydell | bd2be15 | 2013-04-09 15:26:55 +0100 | [diff] [blame] | 20 | #include "hw/devices.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 21 | #include "hw/boards.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 22 | #include "hw/block/flash.h" |
Markus Armbruster | fa1d36d | 2014-10-07 13:59:13 +0200 | [diff] [blame] | 23 | #include "sysemu/block-backend.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 24 | #include "hw/sysbus.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 25 | #include "exec/address-spaces.h" |
Andreas Färber | d2f7c49 | 2013-07-29 17:12:41 +0200 | [diff] [blame] | 26 | #include "sysemu/qtest.h" |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 27 | |
Dmitry Eremin-Solenikov | 459505a | 2011-02-12 03:15:25 +0300 | [diff] [blame] | 28 | /* Device addresses */ |
| 29 | #define MST_FPGA_PHYS 0x08000000 |
| 30 | #define MST_ETH_PHYS 0x10000300 |
| 31 | #define MST_FLASH_0 0x00000000 |
| 32 | #define MST_FLASH_1 0x04000000 |
| 33 | |
| 34 | /* IRQ definitions */ |
| 35 | #define MMC_IRQ 0 |
| 36 | #define USIM_IRQ 1 |
| 37 | #define USBC_IRQ 2 |
| 38 | #define ETHERNET_IRQ 3 |
| 39 | #define AC97_IRQ 4 |
| 40 | #define PEN_IRQ 5 |
| 41 | #define MSINS_IRQ 6 |
| 42 | #define EXBRD_IRQ 7 |
| 43 | #define S0_CD_IRQ 9 |
| 44 | #define S0_STSCHG_IRQ 10 |
| 45 | #define S0_IRQ 11 |
| 46 | #define S1_CD_IRQ 13 |
| 47 | #define S1_STSCHG_IRQ 14 |
| 48 | #define S1_IRQ 15 |
| 49 | |
Stefan Weil | 52975c3 | 2013-12-22 15:22:57 +0100 | [diff] [blame] | 50 | static const struct keymap map[0xE0] = { |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 51 | [0 ... 0xDF] = { -1, -1 }, |
| 52 | [0x1e] = {0,0}, /* a */ |
| 53 | [0x30] = {0,1}, /* b */ |
| 54 | [0x2e] = {0,2}, /* c */ |
| 55 | [0x20] = {0,3}, /* d */ |
| 56 | [0x12] = {0,4}, /* e */ |
| 57 | [0x21] = {0,5}, /* f */ |
| 58 | [0x22] = {1,0}, /* g */ |
| 59 | [0x23] = {1,1}, /* h */ |
| 60 | [0x17] = {1,2}, /* i */ |
| 61 | [0x24] = {1,3}, /* j */ |
| 62 | [0x25] = {1,4}, /* k */ |
| 63 | [0x26] = {1,5}, /* l */ |
| 64 | [0x32] = {2,0}, /* m */ |
| 65 | [0x31] = {2,1}, /* n */ |
| 66 | [0x18] = {2,2}, /* o */ |
| 67 | [0x19] = {2,3}, /* p */ |
| 68 | [0x10] = {2,4}, /* q */ |
| 69 | [0x13] = {2,5}, /* r */ |
| 70 | [0x1f] = {3,0}, /* s */ |
| 71 | [0x14] = {3,1}, /* t */ |
| 72 | [0x16] = {3,2}, /* u */ |
| 73 | [0x2f] = {3,3}, /* v */ |
| 74 | [0x11] = {3,4}, /* w */ |
| 75 | [0x2d] = {3,5}, /* x */ |
Vijay Kumar B | 0c74e95 | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 76 | [0x34] = {4,0}, /* . */ |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 77 | [0x15] = {4,2}, /* y */ |
| 78 | [0x2c] = {4,3}, /* z */ |
Vijay Kumar B | 0c74e95 | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 79 | [0x35] = {4,4}, /* / */ |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 80 | [0xc7] = {5,0}, /* Home */ |
| 81 | [0x2a] = {5,1}, /* shift */ |
Stefan Weil | 7dbc115 | 2013-12-22 20:42:05 +0100 | [diff] [blame] | 82 | /* |
| 83 | * There are two matrix positions which map to space, |
| 84 | * but QEMU can only use one of them for the reverse |
| 85 | * mapping, so simply use the second one. |
| 86 | */ |
| 87 | /* [0x39] = {5,2}, space */ |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 88 | [0x39] = {5,3}, /* space */ |
Stefan Weil | 7dbc115 | 2013-12-22 20:42:05 +0100 | [diff] [blame] | 89 | /* |
| 90 | * Matrix position {5,4} and other keys are missing here. |
| 91 | * TODO: Compare with Linux code and test real hardware. |
| 92 | */ |
Vijay Kumar B | 8cb2d2d | 2016-10-04 13:28:07 +0100 | [diff] [blame] | 93 | [0x1c] = {5,4}, /* enter */ |
Vijay Kumar B | 0c74e95 | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 94 | [0x0e] = {5,5}, /* backspace */ |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 95 | [0xc8] = {6,0}, /* up */ |
| 96 | [0xd0] = {6,1}, /* down */ |
| 97 | [0xcb] = {6,2}, /* left */ |
| 98 | [0xcd] = {6,3}, /* right */ |
| 99 | }; |
| 100 | |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 101 | enum mainstone_model_e { mainstone }; |
| 102 | |
balrog | 7fb4fdc | 2008-04-24 17:59:27 +0000 | [diff] [blame] | 103 | #define MAINSTONE_RAM 0x04000000 |
| 104 | #define MAINSTONE_ROM 0x00800000 |
| 105 | #define MAINSTONE_FLASH 0x02000000 |
| 106 | |
balrog | f93eb9f | 2008-04-14 20:27:51 +0000 | [diff] [blame] | 107 | static struct arm_boot_info mainstone_binfo = { |
| 108 | .loader_start = PXA2XX_SDRAM_BASE, |
| 109 | .ram_size = 0x04000000, |
| 110 | }; |
| 111 | |
Avi Kivity | 02e5c16 | 2011-08-08 21:08:45 +0300 | [diff] [blame] | 112 | static void mainstone_common_init(MemoryRegion *address_space_mem, |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 113 | MachineState *machine, |
Peter Maydell | 6efa6d5 | 2012-10-30 07:45:08 +0000 | [diff] [blame] | 114 | enum mainstone_model_e model, int arm_id) |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 115 | { |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 116 | uint32_t sector_len = 256 * 1024; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 117 | hwaddr mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 }; |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 118 | PXA2xxState *mpu; |
Dmitry Eremin-Solenikov | cb380f6 | 2011-02-12 03:15:24 +0300 | [diff] [blame] | 119 | DeviceState *mst_irq; |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 120 | DriveInfo *dinfo; |
| 121 | int i; |
Anthony Liguori | 01e0451 | 2011-08-25 14:39:18 -0500 | [diff] [blame] | 122 | int be; |
Avi Kivity | 02e5c16 | 2011-08-08 21:08:45 +0300 | [diff] [blame] | 123 | MemoryRegion *rom = g_new(MemoryRegion, 1); |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 124 | const char *cpu_model = machine->cpu_model; |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 125 | |
| 126 | if (!cpu_model) |
| 127 | cpu_model = "pxa270-c5"; |
| 128 | |
| 129 | /* Setup CPU & memory */ |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 130 | mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model); |
Hu Tao | 4994653 | 2014-09-09 13:27:55 +0800 | [diff] [blame] | 131 | memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM, |
Markus Armbruster | f8ed85a | 2015-09-11 16:51:43 +0200 | [diff] [blame] | 132 | &error_fatal); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 133 | vmstate_register_ram_global(rom); |
Avi Kivity | 02e5c16 | 2011-08-08 21:08:45 +0300 | [diff] [blame] | 134 | memory_region_set_readonly(rom, true); |
| 135 | memory_region_add_subregion(address_space_mem, 0, rom); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 136 | |
Blue Swirl | 3d08ff6 | 2010-03-29 19:23:56 +0000 | [diff] [blame] | 137 | #ifdef TARGET_WORDS_BIGENDIAN |
Anthony Liguori | 01e0451 | 2011-08-25 14:39:18 -0500 | [diff] [blame] | 138 | be = 1; |
Blue Swirl | 3d08ff6 | 2010-03-29 19:23:56 +0000 | [diff] [blame] | 139 | #else |
Anthony Liguori | 01e0451 | 2011-08-25 14:39:18 -0500 | [diff] [blame] | 140 | be = 0; |
Blue Swirl | 3d08ff6 | 2010-03-29 19:23:56 +0000 | [diff] [blame] | 141 | #endif |
ths | e4bcb14 | 2007-12-02 04:51:10 +0000 | [diff] [blame] | 142 | /* There are two 32MiB flash devices on the board */ |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 143 | for (i = 0; i < 2; i ++) { |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 144 | dinfo = drive_get(IF_PFLASH, 0, i); |
| 145 | if (!dinfo) { |
Andreas Färber | d2f7c49 | 2013-07-29 17:12:41 +0200 | [diff] [blame] | 146 | if (qtest_enabled()) { |
| 147 | break; |
| 148 | } |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 149 | fprintf(stderr, "Two flash images must be given with the " |
| 150 | "'pflash' parameter\n"); |
| 151 | exit(1); |
| 152 | } |
ths | 7233b35 | 2007-12-02 02:20:03 +0000 | [diff] [blame] | 153 | |
Avi Kivity | cfe5f01 | 2011-08-04 15:55:30 +0300 | [diff] [blame] | 154 | if (!pflash_cfi01_register(mainstone_flash_base[i], NULL, |
| 155 | i ? "mainstone.flash1" : "mainstone.flash0", |
| 156 | MAINSTONE_FLASH, |
Markus Armbruster | 4be7463 | 2014-10-07 13:59:18 +0200 | [diff] [blame] | 157 | blk_by_legacy_dinfo(dinfo), |
Markus Armbruster | fa1d36d | 2014-10-07 13:59:13 +0200 | [diff] [blame] | 158 | sector_len, MAINSTONE_FLASH / sector_len, |
| 159 | 4, 0, 0, 0, 0, be)) { |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 160 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
| 161 | exit(1); |
| 162 | } |
ths | e4bcb14 | 2007-12-02 04:51:10 +0000 | [diff] [blame] | 163 | } |
ths | 7233b35 | 2007-12-02 02:20:03 +0000 | [diff] [blame] | 164 | |
Dmitry Eremin-Solenikov | cb380f6 | 2011-02-12 03:15:24 +0300 | [diff] [blame] | 165 | mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS, |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 166 | qdev_get_gpio_in(mpu->gpio, 0)); |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 167 | |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 168 | /* setup keypad */ |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 169 | pxa27x_register_keypad(mpu->kp, map, 0xe0); |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 170 | |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 171 | /* MMC/SD host */ |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 172 | pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ)); |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 173 | |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 174 | pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0], |
Dmitry Eremin-Solenikov | b651fc6 | 2011-03-04 03:54:59 +0300 | [diff] [blame] | 175 | qdev_get_gpio_in(mst_irq, S0_IRQ), |
| 176 | qdev_get_gpio_in(mst_irq, S0_CD_IRQ)); |
Andreas Färber | 1c88de6 | 2012-05-14 01:11:15 +0200 | [diff] [blame] | 177 | pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1], |
Dmitry Eremin-Solenikov | b651fc6 | 2011-03-04 03:54:59 +0300 | [diff] [blame] | 178 | qdev_get_gpio_in(mst_irq, S1_IRQ), |
| 179 | qdev_get_gpio_in(mst_irq, S1_CD_IRQ)); |
| 180 | |
Dmitry Eremin-Solenikov | cb380f6 | 2011-02-12 03:15:24 +0300 | [diff] [blame] | 181 | smc91c111_init(&nd_table[0], MST_ETH_PHYS, |
| 182 | qdev_get_gpio_in(mst_irq, ETHERNET_IRQ)); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 183 | |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 184 | mainstone_binfo.kernel_filename = machine->kernel_filename; |
| 185 | mainstone_binfo.kernel_cmdline = machine->kernel_cmdline; |
| 186 | mainstone_binfo.initrd_filename = machine->initrd_filename; |
balrog | f93eb9f | 2008-04-14 20:27:51 +0000 | [diff] [blame] | 187 | mainstone_binfo.board_id = arm_id; |
Andreas Färber | 3aaa8df | 2012-05-14 02:39:57 +0200 | [diff] [blame] | 188 | arm_load_kernel(mpu->cpu, &mainstone_binfo); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 189 | } |
| 190 | |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 191 | static void mainstone_init(MachineState *machine) |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 192 | { |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 193 | mainstone_common_init(get_system_memory(), machine, mainstone, 0x196); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 194 | } |
| 195 | |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 196 | static void mainstone2_machine_init(MachineClass *mc) |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 197 | { |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 198 | mc->desc = "Mainstone II (PXA27x)"; |
| 199 | mc->init = mainstone_init; |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 200 | } |
| 201 | |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 202 | DEFINE_MACHINE("mainstone", mainstone2_machine_init) |