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ths5fafdf22007-09-16 21:08:06 +00001/*
pbrooke69954b2006-09-23 17:40:58 +00002 * ARM RealView Baseboard System emulation.
3 *
pbrooka1bb27b2007-04-06 16:49:48 +00004 * Copyright (c) 2006-2007 CodeSourcery.
pbrooke69954b2006-09-23 17:40:58 +00005 * Written by Paul Brook
6 *
Matthew Fernandez8e31bf32011-06-26 12:21:35 +10007 * This code is licensed under the GPL.
pbrooke69954b2006-09-23 17:40:58 +00008 */
9
Peter Maydell12b16722015-12-07 16:23:45 +000010#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010011#include "qapi/error.h"
Paolo Bonzini4771d752016-01-19 21:51:44 +010012#include "cpu.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010013#include "hw/sysbus.h"
Peter Maydell12ec8bd2019-05-23 14:47:43 +010014#include "hw/arm/boot.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010015#include "hw/arm/primecell.h"
Zongyuan Lid5c3eb52022-03-25 02:15:54 +080016#include "hw/core/split-irq.h"
Philippe Mathieu-Daudé66b03dc2019-04-12 18:54:13 +020017#include "hw/net/lan9118.h"
Philippe Mathieu-Daudé437cc272019-04-12 18:54:16 +020018#include "hw/net/smc91c111.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010019#include "hw/pci/pci.h"
Zongyuan Lid5c3eb52022-03-25 02:15:54 +080020#include "hw/qdev-core.h"
Paolo Bonzini1422e322012-10-24 08:43:34 +020021#include "net/net.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010022#include "sysemu/sysemu.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010023#include "hw/boards.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010024#include "hw/i2c/i2c.h"
Peter Maydellb5a3ca32014-03-17 16:31:45 +000025#include "qemu/error-report.h"
xiaoqiang zhaof0d1d2c2016-06-06 16:59:31 +010026#include "hw/char/pl011.h"
Philippe Mathieu-Daudéc2de81e2017-09-04 15:21:53 +010027#include "hw/cpu/a9mpcore.h"
28#include "hw/intc/realview_gic.h"
Markus Armbruster64552b62019-08-12 07:23:42 +020029#include "hw/irq.h"
Philippe Mathieu-Daudé440c9f92020-06-17 09:25:30 +020030#include "hw/i2c/arm_sbcon_i2c.h"
Philippe Mathieu-Daudé26c607b2020-07-05 14:24:24 +020031#include "hw/sd/sd.h"
Martin Kletzanderb8ab0302023-09-22 17:21:39 +020032#include "audio/audio.h"
Philippe Mathieu-Daudéd780d052024-01-18 21:06:38 +010033#include "target/arm/cpu-qom.h"
pbrooke69954b2006-09-23 17:40:58 +000034
Paul Brook0ef849d2009-11-16 17:06:43 +000035#define SMP_BOOT_ADDR 0xe0000000
Evgeny Voevodin078758d2012-01-13 20:52:40 +000036#define SMP_BOOTREG_ADDR 0x10000030
Paul Brookeee48502009-11-20 00:45:54 +000037
pbrooke69954b2006-09-23 17:40:58 +000038/* Board init. */
39
balrogf93eb9f2008-04-14 20:27:51 +000040static struct arm_boot_info realview_binfo = {
Paul Brook0ef849d2009-11-16 17:06:43 +000041 .smp_loader_start = SMP_BOOT_ADDR,
Evgeny Voevodin078758d2012-01-13 20:52:40 +000042 .smp_bootreg_addr = SMP_BOOTREG_ADDR,
balrogf93eb9f2008-04-14 20:27:51 +000043};
44
Paul Brookf7c70322009-11-19 16:45:21 +000045/* The following two lists must be consistent. */
Paul Brookc988bfa2009-11-13 04:31:22 +000046enum realview_board_type {
47 BOARD_EB,
Paul Brook0ef849d2009-11-16 17:06:43 +000048 BOARD_EB_MPCORE,
Paul Brookf7c70322009-11-19 16:45:21 +000049 BOARD_PB_A8,
50 BOARD_PBX_A9,
51};
52
Blue Swirld05ac8f2009-12-04 20:44:44 +000053static const int realview_board_id[] = {
Paul Brookf7c70322009-11-19 16:45:21 +000054 0x33b,
55 0x33b,
56 0x769,
57 0x76d
Paul Brookc988bfa2009-11-13 04:31:22 +000058};
59
Zongyuan Lid5c3eb52022-03-25 02:15:54 +080060static void split_irq_from_named(DeviceState *src, const char* outname,
61 qemu_irq out1, qemu_irq out2) {
62 DeviceState *splitter = qdev_new(TYPE_SPLIT_IRQ);
63
64 qdev_prop_set_uint32(splitter, "num-lines", 2);
65
66 qdev_realize_and_unref(splitter, NULL, &error_fatal);
67
68 qdev_connect_gpio_out(splitter, 0, out1);
69 qdev_connect_gpio_out(splitter, 1, out2);
70 qdev_connect_gpio_out_named(src, outname, 0,
71 qdev_get_gpio_in(splitter, 0));
72}
73
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +030074static void realview_init(MachineState *machine,
Peter Maydelldb4ff6f2012-10-30 07:45:07 +000075 enum realview_board_type board_type)
pbrooke69954b2006-09-23 17:40:58 +000076{
Andreas Färber9077f012012-05-14 03:50:56 +020077 ARMCPU *cpu = NULL;
78 CPUARMState *env;
Avi Kivity35e87822011-10-02 17:04:26 +020079 MemoryRegion *sysmem = get_system_memory();
Nikita Belovb1ab03a2014-12-11 12:07:52 +000080 MemoryRegion *ram_lo;
Avi Kivity35e87822011-10-02 17:04:26 +020081 MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
82 MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
83 MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
Peter Maydell03a0e942011-10-28 10:55:38 +010084 DeviceState *dev, *sysctl, *gpio2, *pl041;
Paul Brookc988bfa2009-11-13 04:31:22 +000085 SysBusDevice *busdev;
Paul Brookfe7e8752009-05-14 22:35:08 +010086 qemu_irq pic[64];
David Gibson29b358f2013-06-06 18:48:51 +100087 PCIBus *pci_bus = NULL;
pbrooke69954b2006-09-23 17:40:58 +000088 NICInfo *nd;
Philippe Mathieu-Daudé26c607b2020-07-05 14:24:24 +020089 DriveInfo *dinfo;
Andreas Färbera5c82852013-08-03 00:18:51 +020090 I2CBus *i2c;
pbrooke69954b2006-09-23 17:40:58 +000091 int n;
Like Xucc7d44c2019-05-19 04:54:26 +080092 unsigned int smp_cpus = machine->smp.cpus;
pbrook9ee6e8b2007-11-11 00:04:49 +000093 qemu_irq cpu_irq[4];
Paul Brookf7c70322009-11-19 16:45:21 +000094 int is_mpcore = 0;
95 int is_pb = 0;
Paul Brook26e92f62009-11-13 03:30:33 +000096 uint32_t proc_id = 0;
Paul Brook0ef849d2009-11-16 17:06:43 +000097 uint32_t sys_id;
98 ram_addr_t low_ram_size;
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +030099 ram_addr_t ram_size = machine->ram_size;
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000100 hwaddr periphbase = 0;
pbrooke69954b2006-09-23 17:40:58 +0000101
Paul Brookf7c70322009-11-19 16:45:21 +0000102 switch (board_type) {
103 case BOARD_EB:
104 break;
105 case BOARD_EB_MPCORE:
106 is_mpcore = 1;
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000107 periphbase = 0x10100000;
Paul Brookf7c70322009-11-19 16:45:21 +0000108 break;
109 case BOARD_PB_A8:
110 is_pb = 1;
111 break;
112 case BOARD_PBX_A9:
113 is_mpcore = 1;
114 is_pb = 1;
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000115 periphbase = 0x1f000000;
Paul Brookf7c70322009-11-19 16:45:21 +0000116 break;
117 }
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000118
Paul Brookc988bfa2009-11-13 04:31:22 +0000119 for (n = 0; n < smp_cpus; n++) {
Igor Mammedovba1ba5c2017-09-13 18:04:57 +0200120 Object *cpuobj = object_new(machine->cpu_type);
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000121
Greg Bellows61e2f352014-12-15 17:09:51 -0600122 /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
123 * does not currently support EL3 so the CPU EL3 property is disabled
124 * before realization.
125 */
Daniel P. Berrangéefba1592020-09-14 14:56:17 +0100126 if (object_property_find(cpuobj, "has_el3")) {
Markus Armbruster5325cc32020-07-07 18:05:54 +0200127 object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
Greg Bellows61e2f352014-12-15 17:09:51 -0600128 }
129
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000130 if (is_pb && is_mpcore) {
Markus Armbruster5325cc32020-07-07 18:05:54 +0200131 object_property_set_int(cpuobj, "reset-cbar", periphbase,
Markus Armbruster007b0652015-09-11 15:04:45 +0200132 &error_fatal);
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000133 }
134
Markus Armbrusterce189ab2020-06-10 07:32:45 +0200135 qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000136
137 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
bellardaaed9092007-11-10 15:15:54 +0000138 }
Peter Maydellb5a3ca32014-03-17 16:31:45 +0000139 cpu = ARM_CPU(first_cpu);
Andreas Färber9077f012012-05-14 03:50:56 +0200140 env = &cpu->env;
Paul Brook26e92f62009-11-13 03:30:33 +0000141 if (arm_feature(env, ARM_FEATURE_V7)) {
Paul Brookf7c70322009-11-19 16:45:21 +0000142 if (is_mpcore) {
143 proc_id = 0x0c000000;
144 } else {
145 proc_id = 0x0e000000;
146 }
Paul Brook26e92f62009-11-13 03:30:33 +0000147 } else if (arm_feature(env, ARM_FEATURE_V6K)) {
148 proc_id = 0x06000000;
149 } else if (arm_feature(env, ARM_FEATURE_V6)) {
150 proc_id = 0x04000000;
151 } else {
152 proc_id = 0x02000000;
153 }
bellardaaed9092007-11-10 15:15:54 +0000154
Paul Brook21a88942009-12-21 20:19:12 +0000155 if (is_pb && ram_size > 0x20000000) {
156 /* Core tile RAM. */
Nikita Belovb1ab03a2014-12-11 12:07:52 +0000157 ram_lo = g_new(MemoryRegion, 1);
Paul Brook21a88942009-12-21 20:19:12 +0000158 low_ram_size = ram_size - 0x20000000;
159 ram_size = 0x20000000;
Peter Maydell98a99ce2017-07-07 15:42:53 +0100160 memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200161 &error_fatal);
Avi Kivity35e87822011-10-02 17:04:26 +0200162 memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
Paul Brook21a88942009-12-21 20:19:12 +0000163 }
164
Peter Maydell98a99ce2017-07-07 15:42:53 +0100165 memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200166 &error_fatal);
Paul Brook0ef849d2009-11-16 17:06:43 +0000167 low_ram_size = ram_size;
168 if (low_ram_size > 0x10000000)
169 low_ram_size = 0x10000000;
pbrooke69954b2006-09-23 17:40:58 +0000170 /* SDRAM at address zero. */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400171 memory_region_init_alias(ram_alias, NULL, "realview.alias",
Avi Kivity35e87822011-10-02 17:04:26 +0200172 ram_hi, 0, low_ram_size);
173 memory_region_add_subregion(sysmem, 0, ram_alias);
Paul Brook0ef849d2009-11-16 17:06:43 +0000174 if (is_pb) {
175 /* And again at a high address. */
Avi Kivity35e87822011-10-02 17:04:26 +0200176 memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
Paul Brook0ef849d2009-11-16 17:06:43 +0000177 } else {
178 ram_size = low_ram_size;
179 }
pbrooke69954b2006-09-23 17:40:58 +0000180
Paul Brook0ef849d2009-11-16 17:06:43 +0000181 sys_id = is_pb ? 0x01780500 : 0xc1400400;
Markus Armbruster3e80f692020-06-10 07:31:58 +0200182 sysctl = qdev_new("realview_sysctl");
Peter Maydell26883c62011-02-21 20:57:53 +0000183 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
Peter Maydell26883c62011-02-21 20:57:53 +0000184 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200185 sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal);
Andreas Färber1356b982013-01-20 02:47:33 +0100186 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
pbrook9ee6e8b2007-11-11 00:04:49 +0000187
Paul Brookc988bfa2009-11-13 04:31:22 +0000188 if (is_mpcore) {
Markus Armbruster3e80f692020-06-10 07:31:58 +0200189 dev = qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore");
Paul Brookc988bfa2009-11-13 04:31:22 +0000190 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
Andreas Färber1356b982013-01-20 02:47:33 +0100191 busdev = SYS_BUS_DEVICE(dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200192 sysbus_realize_and_unref(busdev, &error_fatal);
Peter Maydell96eacf62012-02-16 09:56:09 +0000193 sysbus_mmio_map(busdev, 0, periphbase);
Paul Brookc988bfa2009-11-13 04:31:22 +0000194 for (n = 0; n < smp_cpus; n++) {
195 sysbus_connect_irq(busdev, n, cpu_irq[n]);
196 }
Peter Maydell96eacf62012-02-16 09:56:09 +0000197 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL);
198 /* Both A9 and 11MPCore put the GIC CPU i/f at base + 0x100 */
199 realview_binfo.gic_cpu_if_addr = periphbase + 0x100;
pbrook9ee6e8b2007-11-11 00:04:49 +0000200 } else {
Paul Brook0ef849d2009-11-16 17:06:43 +0000201 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
202 /* For now just create the nIRQ GIC, and ignore the others. */
Philippe Mathieu-Daudéc2de81e2017-09-04 15:21:53 +0100203 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
Paul Brookfe7e8752009-05-14 22:35:08 +0100204 }
205 for (n = 0; n < 64; n++) {
Paul Brook067a3dd2009-05-26 14:56:11 +0100206 pic[n] = qdev_get_gpio_in(dev, n);
pbrook9ee6e8b2007-11-11 00:04:49 +0000207 }
208
Markus Armbruster3e80f692020-06-10 07:31:58 +0200209 pl041 = qdev_new("pl041");
Peter Maydell03a0e942011-10-28 10:55:38 +0100210 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
Martin Kletzanderb8ab0302023-09-22 17:21:39 +0200211 if (machine->audiodev) {
212 qdev_prop_set_string(pl041, "audiodev", machine->audiodev);
213 }
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200214 sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal);
Andreas Färber1356b982013-01-20 02:47:33 +0100215 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
216 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);
Peter Maydell03a0e942011-10-28 10:55:38 +0100217
Paul Brook86394e92009-05-14 22:35:07 +0100218 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
219 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
pbrooke69954b2006-09-23 17:40:58 +0000220
Peter Maydell9bca0ed2018-04-20 15:52:43 +0100221 pl011_create(0x10009000, pic[12], serial_hd(0));
222 pl011_create(0x1000a000, pic[13], serial_hd(1));
223 pl011_create(0x1000b000, pic[14], serial_hd(2));
224 pl011_create(0x1000c000, pic[15], serial_hd(3));
pbrooke69954b2006-09-23 17:40:58 +0000225
226 /* DMA controller is optional, apparently. */
Markus Armbruster3e80f692020-06-10 07:31:58 +0200227 dev = qdev_new("pl081");
Markus Armbruster5325cc32020-07-07 18:05:54 +0200228 object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
Peter Maydell112a8292018-08-20 11:24:33 +0100229 &error_fatal);
Peter Maydell112a8292018-08-20 11:24:33 +0100230 busdev = SYS_BUS_DEVICE(dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200231 sysbus_realize_and_unref(busdev, &error_fatal);
Peter Maydell112a8292018-08-20 11:24:33 +0100232 sysbus_mmio_map(busdev, 0, 0x10030000);
233 sysbus_connect_irq(busdev, 0, pic[24]);
pbrooke69954b2006-09-23 17:40:58 +0000234
Paul Brook6a824ec2009-05-14 22:35:07 +0100235 sysbus_create_simple("sp804", 0x10011000, pic[4]);
236 sysbus_create_simple("sp804", 0x10012000, pic[5]);
pbrooke69954b2006-09-23 17:40:58 +0000237
Peter Maydell26883c62011-02-21 20:57:53 +0000238 sysbus_create_simple("pl061", 0x10013000, pic[6]);
239 sysbus_create_simple("pl061", 0x10014000, pic[7]);
240 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
241
Peter Maydellacb9b722011-07-22 15:36:54 +0000242 sysbus_create_simple("pl111", 0x10020000, pic[23]);
pbrooke69954b2006-09-23 17:40:58 +0000243
Peter Maydell26883c62011-02-21 20:57:53 +0000244 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
245 /* Wire up MMC card detect and read-only signals. These have
246 * to go to both the PL061 GPIO and the sysctl register.
247 * Note that the PL181 orders these lines (readonly,inserted)
248 * and the PL061 has them the other way about. Also the card
249 * detect line is inverted.
250 */
Zongyuan Lid5c3eb52022-03-25 02:15:54 +0800251 split_irq_from_named(dev, "card-read-only",
252 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT),
253 qdev_get_gpio_in(gpio2, 1));
254
255 split_irq_from_named(dev, "card-inserted",
256 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN),
257 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
258
Markus Armbruster64eaa822021-11-17 17:33:58 +0100259 dinfo = drive_get(IF_SD, 0, 0);
Philippe Mathieu-Daudé26c607b2020-07-05 14:24:24 +0200260 if (dinfo) {
261 DeviceState *card;
262
263 card = qdev_new(TYPE_SD_CARD);
264 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
265 &error_fatal);
266 qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"),
267 &error_fatal);
268 }
pbrooka1bb27b2007-04-06 16:49:48 +0000269
Paul Brooka63bdb32009-05-14 22:35:07 +0100270 sysbus_create_simple("pl031", 0x10017000, pic[10]);
pbrook7e1543c2007-06-30 17:32:17 +0000271
Paul Brook0ef849d2009-11-16 17:06:43 +0000272 if (!is_pb) {
Markus Armbruster3e80f692020-06-10 07:31:58 +0200273 dev = qdev_new("realview_pci");
Andreas Färber1356b982013-01-20 02:47:33 +0100274 busdev = SYS_BUS_DEVICE(dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200275 sysbus_realize_and_unref(busdev, &error_fatal);
Peter Maydell7468d732013-04-19 11:15:20 +0100276 sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */
Peter Maydella2bff782013-04-19 11:15:20 +0100277 sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */
278 sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */
279 sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */
Peter Maydell89a32d32013-04-19 11:15:20 +0100280 sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */
281 sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */
282 sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */
Peter Maydell7d6e7712011-09-01 18:36:53 +0100283 sysbus_connect_irq(busdev, 0, pic[48]);
284 sysbus_connect_irq(busdev, 1, pic[49]);
285 sysbus_connect_irq(busdev, 2, pic[50]);
286 sysbus_connect_irq(busdev, 3, pic[51]);
Paul Brook0ef849d2009-11-16 17:06:43 +0000287 pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
Eduardo Habkost4bcbe0b2016-06-08 17:50:25 -0300288 if (machine_usb(machine)) {
Gerd Hoffmannafb9a602012-03-07 15:06:32 +0100289 pci_create_simple(pci_bus, -1, "pci-ohci");
Paul Brook0ef849d2009-11-16 17:06:43 +0000290 }
291 n = drive_get_max_bus(IF_SCSI);
292 while (n >= 0) {
Mark Cave-Ayland877eb212018-09-19 18:20:58 +0100293 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
294 lsi53c8xx_handle_legacy_cmdline(dev);
Paul Brook0ef849d2009-11-16 17:06:43 +0000295 n--;
296 }
pbrooke69954b2006-09-23 17:40:58 +0000297 }
aliguori0ae18ce2009-01-13 19:39:36 +0000298
David Woodhousecd539912023-10-23 09:37:35 +0100299 nd = qemu_find_nic_info(is_pb ? "lan9118" : "smc91c111", true, NULL);
300 if (nd) {
301 if (is_pb) {
302 lan9118_init(nd, 0x4e000000, pic[28]);
pbrooke69954b2006-09-23 17:40:58 +0000303 } else {
David Woodhousecd539912023-10-23 09:37:35 +0100304 smc91c111_init(0x4e000000, pic[28]);
pbrooke69954b2006-09-23 17:40:58 +0000305 }
306 }
307
David Woodhousecd539912023-10-23 09:37:35 +0100308 if (pci_bus) {
309 pci_init_nic_devices(pci_bus, "rtl8139");
310 }
311
Philippe Mathieu-Daudé550da1c2023-01-10 09:25:06 +0100312 dev = sysbus_create_simple(TYPE_ARM_SBCON_I2C, 0x10002000, NULL);
Andreas Färbera5c82852013-08-03 00:18:51 +0200313 i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
Philippe Mathieu-Daudé1373b152020-07-06 00:41:53 +0200314 i2c_slave_create_simple(i2c, "ds1338", 0x68);
Paul Brookeee48502009-11-20 00:45:54 +0000315
pbrooke69954b2006-09-23 17:40:58 +0000316 /* Memory map for RealView Emulation Baseboard: */
317 /* 0x10000000 System registers. */
318 /* 0x10001000 System controller. */
Paul Brookeee48502009-11-20 00:45:54 +0000319 /* 0x10002000 Two-Wire Serial Bus. */
pbrooke69954b2006-09-23 17:40:58 +0000320 /* 0x10003000 Reserved. */
321 /* 0x10004000 AACI. */
322 /* 0x10005000 MCI. */
323 /* 0x10006000 KMI0. */
324 /* 0x10007000 KMI1. */
Paul Brook0ef849d2009-11-16 17:06:43 +0000325 /* 0x10008000 Character LCD. (EB) */
pbrooke69954b2006-09-23 17:40:58 +0000326 /* 0x10009000 UART0. */
327 /* 0x1000a000 UART1. */
328 /* 0x1000b000 UART2. */
329 /* 0x1000c000 UART3. */
330 /* 0x1000d000 SSPI. */
331 /* 0x1000e000 SCI. */
332 /* 0x1000f000 Reserved. */
333 /* 0x10010000 Watchdog. */
334 /* 0x10011000 Timer 0+1. */
335 /* 0x10012000 Timer 2+3. */
336 /* 0x10013000 GPIO 0. */
337 /* 0x10014000 GPIO 1. */
338 /* 0x10015000 GPIO 2. */
Paul Brook0ef849d2009-11-16 17:06:43 +0000339 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
pbrook7e1543c2007-06-30 17:32:17 +0000340 /* 0x10017000 RTC. */
pbrooke69954b2006-09-23 17:40:58 +0000341 /* 0x10018000 DMC. */
342 /* 0x10019000 PCI controller config. */
343 /* 0x10020000 CLCD. */
344 /* 0x10030000 DMA Controller. */
Paul Brook0ef849d2009-11-16 17:06:43 +0000345 /* 0x10040000 GIC1. (EB) */
346 /* 0x10050000 GIC2. (EB) */
347 /* 0x10060000 GIC3. (EB) */
348 /* 0x10070000 GIC4. (EB) */
pbrooke69954b2006-09-23 17:40:58 +0000349 /* 0x10080000 SMC. */
Paul Brook0ef849d2009-11-16 17:06:43 +0000350 /* 0x1e000000 GIC1. (PB) */
351 /* 0x1e001000 GIC2. (PB) */
352 /* 0x1e002000 GIC3. (PB) */
353 /* 0x1e003000 GIC4. (PB) */
pbrooke69954b2006-09-23 17:40:58 +0000354 /* 0x40000000 NOR flash. */
355 /* 0x44000000 DoC flash. */
356 /* 0x48000000 SRAM. */
357 /* 0x4c000000 Configuration flash. */
358 /* 0x4e000000 Ethernet. */
359 /* 0x4f000000 USB. */
360 /* 0x50000000 PISMO. */
361 /* 0x54000000 PISMO. */
362 /* 0x58000000 PISMO. */
363 /* 0x5c000000 PISMO. */
364 /* 0x60000000 PCI. */
Peter Maydella2bff782013-04-19 11:15:20 +0100365 /* 0x60000000 PCI Self Config. */
366 /* 0x61000000 PCI Config. */
367 /* 0x62000000 PCI IO. */
368 /* 0x63000000 PCI mem 0. */
369 /* 0x64000000 PCI mem 1. */
370 /* 0x68000000 PCI mem 2. */
pbrooke69954b2006-09-23 17:40:58 +0000371
pbrook7ffab4d2009-04-09 17:15:18 +0000372 /* ??? Hack to map an additional page of ram for the secondary CPU
373 startup code. I guess this works on real hardware because the
374 BootROM happens to be in ROM/flash or in memory that isn't clobbered
375 until after Linux boots the secondary CPUs. */
Peter Maydell98a99ce2017-07-07 15:42:53 +0100376 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200377 &error_fatal);
Avi Kivity35e87822011-10-02 17:04:26 +0200378 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
pbrook7ffab4d2009-04-09 17:15:18 +0000379
balrogf93eb9f2008-04-14 20:27:51 +0000380 realview_binfo.ram_size = ram_size;
Paul Brookf7c70322009-11-19 16:45:21 +0000381 realview_binfo.board_id = realview_board_id[board_type];
Paul Brook21a88942009-12-21 20:19:12 +0000382 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
Philippe Mathieu-Daudéf0109f72023-10-25 08:59:09 +0200383 arm_load_kernel(cpu, machine, &realview_binfo);
pbrooke69954b2006-09-23 17:40:58 +0000384}
385
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300386static void realview_eb_init(MachineState *machine)
Paul Brookc988bfa2009-11-13 04:31:22 +0000387{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300388 realview_init(machine, BOARD_EB);
Paul Brookc988bfa2009-11-13 04:31:22 +0000389}
390
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300391static void realview_eb_mpcore_init(MachineState *machine)
Paul Brookc988bfa2009-11-13 04:31:22 +0000392{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300393 realview_init(machine, BOARD_EB_MPCORE);
Paul Brookc988bfa2009-11-13 04:31:22 +0000394}
395
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300396static void realview_pb_a8_init(MachineState *machine)
Paul Brook0ef849d2009-11-16 17:06:43 +0000397{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300398 realview_init(machine, BOARD_PB_A8);
Paul Brook0ef849d2009-11-16 17:06:43 +0000399}
400
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300401static void realview_pbx_a9_init(MachineState *machine)
Paul Brookf7c70322009-11-19 16:45:21 +0000402{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300403 realview_init(machine, BOARD_PBX_A9);
Paul Brookf7c70322009-11-19 16:45:21 +0000404}
405
Andreas Färber8a661ae2015-09-19 10:49:44 +0200406static void realview_eb_class_init(ObjectClass *oc, void *data)
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500407{
Andreas Färber8a661ae2015-09-19 10:49:44 +0200408 MachineClass *mc = MACHINE_CLASS(oc);
409
Eduardo Habkoste264d292015-09-04 15:37:08 -0300410 mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
411 mc->init = realview_eb_init;
412 mc->block_default_type = IF_SCSI;
Peter Maydell4672cbd2017-09-07 13:54:54 +0100413 mc->ignore_memory_transaction_failures = true;
Igor Mammedovba1ba5c2017-09-13 18:04:57 +0200414 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
Martin Kletzanderb8ab0302023-09-22 17:21:39 +0200415
416 machine_add_audiodev_property(mc);
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500417}
418
Andreas Färber8a661ae2015-09-19 10:49:44 +0200419static const TypeInfo realview_eb_type = {
420 .name = MACHINE_TYPE_NAME("realview-eb"),
421 .parent = TYPE_MACHINE,
422 .class_init = realview_eb_class_init,
423};
Eduardo Habkoste264d292015-09-04 15:37:08 -0300424
Andreas Färber8a661ae2015-09-19 10:49:44 +0200425static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
Eduardo Habkoste264d292015-09-04 15:37:08 -0300426{
Andreas Färber8a661ae2015-09-19 10:49:44 +0200427 MachineClass *mc = MACHINE_CLASS(oc);
428
Eduardo Habkoste264d292015-09-04 15:37:08 -0300429 mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
430 mc->init = realview_eb_mpcore_init;
431 mc->block_default_type = IF_SCSI;
432 mc->max_cpus = 4;
Peter Maydell4672cbd2017-09-07 13:54:54 +0100433 mc->ignore_memory_transaction_failures = true;
Igor Mammedovba1ba5c2017-09-13 18:04:57 +0200434 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
Martin Kletzanderb8ab0302023-09-22 17:21:39 +0200435
436 machine_add_audiodev_property(mc);
Eduardo Habkoste264d292015-09-04 15:37:08 -0300437}
438
Andreas Färber8a661ae2015-09-19 10:49:44 +0200439static const TypeInfo realview_eb_mpcore_type = {
440 .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
441 .parent = TYPE_MACHINE,
442 .class_init = realview_eb_mpcore_class_init,
443};
Eduardo Habkoste264d292015-09-04 15:37:08 -0300444
Andreas Färber8a661ae2015-09-19 10:49:44 +0200445static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
Eduardo Habkoste264d292015-09-04 15:37:08 -0300446{
Andreas Färber8a661ae2015-09-19 10:49:44 +0200447 MachineClass *mc = MACHINE_CLASS(oc);
448
Eduardo Habkoste264d292015-09-04 15:37:08 -0300449 mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
450 mc->init = realview_pb_a8_init;
Peter Maydell4672cbd2017-09-07 13:54:54 +0100451 mc->ignore_memory_transaction_failures = true;
Igor Mammedovba1ba5c2017-09-13 18:04:57 +0200452 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
Martin Kletzanderb8ab0302023-09-22 17:21:39 +0200453
454 machine_add_audiodev_property(mc);
Eduardo Habkoste264d292015-09-04 15:37:08 -0300455}
456
Andreas Färber8a661ae2015-09-19 10:49:44 +0200457static const TypeInfo realview_pb_a8_type = {
458 .name = MACHINE_TYPE_NAME("realview-pb-a8"),
459 .parent = TYPE_MACHINE,
460 .class_init = realview_pb_a8_class_init,
461};
Eduardo Habkoste264d292015-09-04 15:37:08 -0300462
Andreas Färber8a661ae2015-09-19 10:49:44 +0200463static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
Eduardo Habkoste264d292015-09-04 15:37:08 -0300464{
Andreas Färber8a661ae2015-09-19 10:49:44 +0200465 MachineClass *mc = MACHINE_CLASS(oc);
466
Eduardo Habkoste264d292015-09-04 15:37:08 -0300467 mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
468 mc->init = realview_pbx_a9_init;
Eduardo Habkoste264d292015-09-04 15:37:08 -0300469 mc->max_cpus = 4;
Peter Maydell4672cbd2017-09-07 13:54:54 +0100470 mc->ignore_memory_transaction_failures = true;
Igor Mammedovba1ba5c2017-09-13 18:04:57 +0200471 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
Martin Kletzanderb8ab0302023-09-22 17:21:39 +0200472
473 machine_add_audiodev_property(mc);
Eduardo Habkoste264d292015-09-04 15:37:08 -0300474}
475
Andreas Färber8a661ae2015-09-19 10:49:44 +0200476static const TypeInfo realview_pbx_a9_type = {
477 .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
478 .parent = TYPE_MACHINE,
479 .class_init = realview_pbx_a9_class_init,
480};
481
482static void realview_machine_init(void)
483{
484 type_register_static(&realview_eb_type);
485 type_register_static(&realview_eb_mpcore_type);
486 type_register_static(&realview_pb_a8_type);
487 type_register_static(&realview_pbx_a9_type);
488}
489
Eduardo Habkost0e6aac82016-02-16 18:59:04 -0200490type_init(realview_machine_init)