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Stefan Weil73163292011-10-05 20:03:02 +02001/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009, 2011 Stefan Weil
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/*
26 * This code implements a TCG which does not generate machine code for some
27 * real target machine but which generates virtual machine code for an
28 * interpreter. Interpreted pseudo code is slow, but it works on any host.
29 *
30 * Some remarks might help in understanding the code:
31 *
32 * "target" or "TCG target" is the machine which runs the generated code.
33 * This is different to the usual meaning in QEMU where "target" is the
34 * emulated machine. So normally QEMU host is identical to TCG target.
35 * Here the TCG target is a virtual machine, but this virtual machine must
36 * use the same word size like the real machine.
37 * Therefore, we need both 32 and 64 bit virtual machines (interpreter).
38 */
39
Markus Armbruster175de522016-06-29 15:29:06 +020040#ifndef TCG_TARGET_H
Stefan Weil73163292011-10-05 20:03:02 +020041#define TCG_TARGET_H
42
Stefan Weil73163292011-10-05 20:03:02 +020043#define TCG_TARGET_INTERPRETER 1
Richard Henderson65089882021-02-01 21:27:41 -100044#define TCG_TARGET_INSN_UNIT_SIZE 4
Paolo Bonzini006f8632015-05-05 09:18:22 +020045#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
Richard Henderson26a75d12021-03-09 23:30:38 -060046#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
Stefan Weil73163292011-10-05 20:03:02 +020047
Richard Henderson78cd7b82013-08-20 14:41:29 -070048#if UINTPTR_MAX == UINT32_MAX
49# define TCG_TARGET_REG_BITS 32
50#elif UINTPTR_MAX == UINT64_MAX
51# define TCG_TARGET_REG_BITS 64
52#else
53# error Unknown pointer size for tci target
54#endif
55
Stefan Weil73163292011-10-05 20:03:02 +020056#ifdef CONFIG_DEBUG_TCG
57/* Enable debug output. */
58#define CONFIG_DEBUG_TCG_INTERPRETER
59#endif
60
Stefan Weil73163292011-10-05 20:03:02 +020061/* Optional instructions. */
62
63#define TCG_TARGET_HAS_bswap16_i32 1
64#define TCG_TARGET_HAS_bswap32_i32 1
Stefan Weil73163292011-10-05 20:03:02 +020065#define TCG_TARGET_HAS_div_i32 1
Richard Hendersonca675f42013-03-11 22:41:47 -070066#define TCG_TARGET_HAS_rem_i32 1
Stefan Weil73163292011-10-05 20:03:02 +020067#define TCG_TARGET_HAS_ext8s_i32 1
68#define TCG_TARGET_HAS_ext16s_i32 1
69#define TCG_TARGET_HAS_ext8u_i32 1
70#define TCG_TARGET_HAS_ext16u_i32 1
Richard Hendersona81520b2021-02-02 16:29:18 -080071#define TCG_TARGET_HAS_andc_i32 1
Stefan Weile24dc9f2012-09-18 22:52:14 +020072#define TCG_TARGET_HAS_deposit_i32 1
Richard Henderson0f10d7c2021-02-02 16:48:48 -080073#define TCG_TARGET_HAS_extract_i32 1
74#define TCG_TARGET_HAS_sextract_i32 1
Richard Hendersonfce12962019-02-25 10:29:25 -080075#define TCG_TARGET_HAS_extract2_i32 0
Richard Hendersona81520b2021-02-02 16:29:18 -080076#define TCG_TARGET_HAS_eqv_i32 1
77#define TCG_TARGET_HAS_nand_i32 1
78#define TCG_TARGET_HAS_nor_i32 1
Richard Henderson5255f482021-02-02 17:01:57 -080079#define TCG_TARGET_HAS_clz_i32 1
80#define TCG_TARGET_HAS_ctz_i32 1
81#define TCG_TARGET_HAS_ctpop_i32 1
Stefan Weil73163292011-10-05 20:03:02 +020082#define TCG_TARGET_HAS_neg_i32 1
83#define TCG_TARGET_HAS_not_i32 1
Richard Hendersona81520b2021-02-02 16:29:18 -080084#define TCG_TARGET_HAS_orc_i32 1
Stefan Weil73163292011-10-05 20:03:02 +020085#define TCG_TARGET_HAS_rot_i32 1
Richard Hendersondf093c12021-02-02 16:15:45 -080086#define TCG_TARGET_HAS_movcond_i32 1
Richard Hendersonf6db0d82021-02-02 17:21:27 -080087#define TCG_TARGET_HAS_muls2_i32 1
Richard Henderson03271522013-08-14 14:35:56 -070088#define TCG_TARGET_HAS_muluh_i32 0
89#define TCG_TARGET_HAS_mulsh_i32 0
Richard Henderson1670a2b2021-01-29 22:11:43 -100090#define TCG_TARGET_HAS_direct_jump 0
Richard Henderson07ce0b02020-12-09 13:58:39 -060091#define TCG_TARGET_HAS_qemu_st8_i32 0
Stefan Weil73163292011-10-05 20:03:02 +020092
93#if TCG_TARGET_REG_BITS == 64
Richard Henderson609ad702015-07-24 07:16:00 -070094#define TCG_TARGET_HAS_extrl_i64_i32 0
95#define TCG_TARGET_HAS_extrh_i64_i32 0
Stefan Weil73163292011-10-05 20:03:02 +020096#define TCG_TARGET_HAS_bswap16_i64 1
97#define TCG_TARGET_HAS_bswap32_i64 1
98#define TCG_TARGET_HAS_bswap64_i64 1
Stefan Weile24dc9f2012-09-18 22:52:14 +020099#define TCG_TARGET_HAS_deposit_i64 1
Richard Henderson0f10d7c2021-02-02 16:48:48 -0800100#define TCG_TARGET_HAS_extract_i64 1
101#define TCG_TARGET_HAS_sextract_i64 1
Richard Hendersonfce12962019-02-25 10:29:25 -0800102#define TCG_TARGET_HAS_extract2_i64 0
Richard Hendersonae40c092021-01-27 20:30:00 -1000103#define TCG_TARGET_HAS_div_i64 1
104#define TCG_TARGET_HAS_rem_i64 1
Stefan Weil73163292011-10-05 20:03:02 +0200105#define TCG_TARGET_HAS_ext8s_i64 1
106#define TCG_TARGET_HAS_ext16s_i64 1
107#define TCG_TARGET_HAS_ext32s_i64 1
108#define TCG_TARGET_HAS_ext8u_i64 1
109#define TCG_TARGET_HAS_ext16u_i64 1
110#define TCG_TARGET_HAS_ext32u_i64 1
Richard Hendersona81520b2021-02-02 16:29:18 -0800111#define TCG_TARGET_HAS_andc_i64 1
112#define TCG_TARGET_HAS_eqv_i64 1
113#define TCG_TARGET_HAS_nand_i64 1
114#define TCG_TARGET_HAS_nor_i64 1
Richard Henderson5255f482021-02-02 17:01:57 -0800115#define TCG_TARGET_HAS_clz_i64 1
116#define TCG_TARGET_HAS_ctz_i64 1
117#define TCG_TARGET_HAS_ctpop_i64 1
Stefan Weil73163292011-10-05 20:03:02 +0200118#define TCG_TARGET_HAS_neg_i64 1
119#define TCG_TARGET_HAS_not_i64 1
Richard Hendersona81520b2021-02-02 16:29:18 -0800120#define TCG_TARGET_HAS_orc_i64 1
Stefan Weil73163292011-10-05 20:03:02 +0200121#define TCG_TARGET_HAS_rot_i64 1
Richard Hendersondf093c12021-02-02 16:15:45 -0800122#define TCG_TARGET_HAS_movcond_i64 1
Richard Hendersonf6db0d82021-02-02 17:21:27 -0800123#define TCG_TARGET_HAS_muls2_i64 1
Richard Henderson08096b12021-02-02 17:40:12 -0800124#define TCG_TARGET_HAS_add2_i32 1
125#define TCG_TARGET_HAS_sub2_i32 1
Richard Hendersonf6db0d82021-02-02 17:21:27 -0800126#define TCG_TARGET_HAS_mulu2_i32 1
Richard Henderson08096b12021-02-02 17:40:12 -0800127#define TCG_TARGET_HAS_add2_i64 1
128#define TCG_TARGET_HAS_sub2_i64 1
Richard Hendersonf6db0d82021-02-02 17:21:27 -0800129#define TCG_TARGET_HAS_mulu2_i64 1
Richard Henderson03271522013-08-14 14:35:56 -0700130#define TCG_TARGET_HAS_muluh_i64 0
131#define TCG_TARGET_HAS_mulsh_i64 0
Richard Hendersondf9ebea2014-03-26 10:59:14 -0700132#else
133#define TCG_TARGET_HAS_mulu2_i32 1
Stefan Weil73163292011-10-05 20:03:02 +0200134#endif /* TCG_TARGET_REG_BITS == 64 */
135
Richard Henderson187f44d2021-01-28 14:54:16 -1000136/* Number of registers available. */
Stefan Weil73163292011-10-05 20:03:02 +0200137#define TCG_TARGET_NB_REGS 16
Stefan Weil73163292011-10-05 20:03:02 +0200138
139/* List of registers which are used by TCG. */
140typedef enum {
141 TCG_REG_R0 = 0,
142 TCG_REG_R1,
143 TCG_REG_R2,
144 TCG_REG_R3,
145 TCG_REG_R4,
146 TCG_REG_R5,
147 TCG_REG_R6,
148 TCG_REG_R7,
Stefan Weil73163292011-10-05 20:03:02 +0200149 TCG_REG_R8,
150 TCG_REG_R9,
151 TCG_REG_R10,
152 TCG_REG_R11,
153 TCG_REG_R12,
154 TCG_REG_R13,
155 TCG_REG_R14,
156 TCG_REG_R15,
Richard Henderson187f44d2021-01-28 14:54:16 -1000157
Richard Hendersonbaa94c02021-01-31 23:26:14 -1000158 TCG_REG_TMP = TCG_REG_R13,
Richard Henderson187f44d2021-01-28 14:54:16 -1000159 TCG_AREG0 = TCG_REG_R14,
160 TCG_REG_CALL_STACK = TCG_REG_R15,
Richard Henderson771142c2011-11-09 08:03:33 +0000161} TCGReg;
Stefan Weil73163292011-10-05 20:03:02 +0200162
Richard Hendersonee79c352013-03-28 05:37:55 +0000163/* Used for function call generation. */
Richard Hendersonee79c352013-03-28 05:37:55 +0000164#define TCG_TARGET_CALL_STACK_OFFSET 0
Richard Henderson7b7d8b22021-01-30 14:24:25 -0800165#define TCG_TARGET_STACK_ALIGN 8
Richard Hendersonee79c352013-03-28 05:37:55 +0000166
Paolo Bonzini5a58e882015-05-19 09:59:34 +0200167#define HAVE_TCG_QEMU_TB_EXEC
Richard Henderson65089882021-02-01 21:27:41 -1000168#define TCG_TARGET_NEED_POOL_LABELS
Stefan Weil73163292011-10-05 20:03:02 +0200169
Richard Hendersoncda4a332017-09-07 10:54:30 -0700170/* We could notice __i386__ or __s390x__ and reduce the barriers depending
171 on the host. But if you want performance, you use the normal backend.
172 We prefer consistency across hosts on this. */
173#define TCG_TARGET_DEFAULT_MO (0)
174
Richard Hendersone1dcf352018-11-20 08:37:42 +0100175#define TCG_TARGET_HAS_MEMORY_BSWAP 1
176
Richard Henderson1670a2b2021-01-29 22:11:43 -1000177/* not defined -- call should be eliminated at compile time */
178void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
Richard Hendersona8583392017-07-31 22:02:31 -0700179
Stefan Weil73163292011-10-05 20:03:02 +0200180#endif /* TCG_TARGET_H */