commit ba0e73336200a04f797ae0c13922146a135cb118
author Richard Henderson <richard.henderson@linaro.org> Fri Sep 17 11:08:09 2021 -0700
committer Richard Henderson <richard.henderson@linaro.org> Sat Oct 30 09:52:04 2021 -0700
tree 09a3dd7150c4746ba5af15dc173e627d81de4d90
parent 940b30904e928854250988c3802f334c8ee12bd4

configure: Merge riscv32 and riscv64 host architectures

The existing code for safe-syscall.inc.S will compile
without change for riscv32 and riscv64.  We may also
drop the meson.build stanza that merges them for tcg/.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>