blob: 1b25e73578e7b07aa399341edb2fd5da9a7a3f07 [file] [log] [blame]
Paolo Bonzini82f51812019-01-23 14:56:00 +08001config ARM_VIRT
2 bool
Paolo Bonzini1a67aed2024-01-25 13:36:37 +01003 default y
4 depends on ARM
Thomas Huth7951c7b2019-02-08 07:17:55 +01005 imply PCI_DEVICES
6 imply TEST_DEVICES
7 imply VFIO_AMD_XGBE
Paolo Bonzinie0e312f2019-01-23 14:56:01 +08008 imply VFIO_PLATFORM
Thomas Huth7951c7b2019-02-08 07:17:55 +01009 imply VFIO_XGMAC
Eric Augerc294ac32020-03-05 17:51:45 +010010 imply TPM_TIS_SYSBUS
Ninad Palsule139fdb32023-04-14 17:07:54 -050011 imply TPM_TIS_I2C
Philippe Mathieu-Daudécfa1f4b2021-05-11 17:53:50 +020012 imply NVDIMM
Cédric Le Goater09702382023-11-21 16:44:18 +080013 imply IOMMUFD
Andrew Jones3362c562020-11-17 12:56:32 +000014 select ARM_GIC
Thomas Huth7951c7b2019-02-08 07:17:55 +010015 select ACPI
16 select ARM_SMMUV3
17 select GPIO_KEY
Paolo Bonzinid641ec32024-04-30 21:08:15 +020018 select DEVICE_TREE
Thomas Huth7951c7b2019-02-08 07:17:55 +010019 select FW_CFG_DMA
20 select PCI_EXPRESS
21 select PCI_EXPRESS_GENERIC_BRIDGE
22 select PFLASH_CFI01
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +020023 select PL011 if !HAVE_RUST # UART
24 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth7951c7b2019-02-08 07:17:55 +010025 select PL031 # RTC
26 select PL061 # GPIO
Maxim Uvarovdaa726d2021-01-28 12:00:11 +000027 select GPIO_PWR
Thomas Huth7951c7b2019-02-08 07:17:55 +010028 select PLATFORM_BUS
29 select SMBIOS
30 select VIRTIO_MMIO
Wei Yangf13a9442019-05-21 14:28:35 +080031 select ACPI_PCI
Eric Auger1f283ae2019-09-18 14:06:26 +010032 select MEM_DEVICE
33 select DIMM
Shameer Kolothumcff51ac2019-09-18 14:06:27 +010034 select ACPI_HW_REDUCED
Philippe Mathieu-Daudéb77a52a2020-10-08 18:14:14 +020035 select ACPI_APEI
Jean-Philippe Bruckercf1a5cc2021-12-10 17:04:09 +000036 select ACPI_VIOT
Gavin Shanb1b87322022-01-11 14:33:29 +080037 select VIRTIO_MEM_SUPPORTED
Jonathan Cameronfc1e01e2022-04-29 15:40:54 +010038 select ACPI_CXL
Xiang Chen7cbd3fd2022-10-27 11:00:35 +010039 select ACPI_HMAT
Paolo Bonzini82f51812019-01-23 14:56:00 +080040
Thomas Huth5885e662019-02-08 10:18:15 +010041config CUBIEBOARD
42 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -030043 default y
44 depends on TCG && ARM
Thomas Huth5885e662019-02-08 10:18:15 +010045 select ALLWINNER_A10
46
Paolo Bonzini82f51812019-01-23 14:56:00 +080047config DIGIC
48 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -030049 default y
50 depends on TCG && ARM
Paolo Bonzini9533dcd2019-01-23 14:56:12 +080051 select PTIMER
Thomas Huth627b06e2019-02-08 10:55:38 +010052 select PFLASH_CFI02
Paolo Bonzini82f51812019-01-23 14:56:00 +080053
54config EXYNOS4
55 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -030056 default y
57 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +000058 imply I2C_DEVICES
Thomas Huthbb275e42019-02-07 10:28:01 +010059 select A9MPCORE
60 select I2C
61 select LAN9118
62 select PL310 # cache controller
Paolo Bonzini9533dcd2019-01-23 14:56:12 +080063 select PTIMER
Thomas Huthbb275e42019-02-07 10:28:01 +010064 select SDHCI
65 select USB_EHCI_SYSBUS
Philippe Mathieu-Daudé5900c7a2021-01-31 19:44:45 +010066 select OR_IRQ
Paolo Bonzini82f51812019-01-23 14:56:00 +080067
68config HIGHBANK
69 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -030070 default y
71 depends on TCG && ARM
Thomas Huth08bcda02019-02-07 10:35:22 +010072 select A9MPCORE
73 select A15MPCORE
74 select AHCI
75 select ARM_TIMER # sp804
76 select ARM_V7M
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +020077 select PL011 if !HAVE_RUST # UART
78 select X_PL011_RUST if HAVE_RUST # UART
Philippe Mathieu-Daudé58f7f3c2020-06-17 09:25:36 +020079 select PL022 # SPI
Thomas Huth08bcda02019-02-07 10:35:22 +010080 select PL031 # RTC
81 select PL061 # GPIO
82 select PL310 # cache controller
83 select XGMAC # ethernet
Paolo Bonzini82f51812019-01-23 14:56:00 +080084
85config INTEGRATOR
86 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -030087 default y
88 depends on TCG && ARM
Thomas Huth4cdea982019-02-07 15:21:27 +010089 select ARM_TIMER
90 select INTEGRATOR_DEBUG
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +020091 select PL011 if !HAVE_RUST # UART
92 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth4cdea982019-02-07 15:21:27 +010093 select PL031 # RTC
Philippe Mathieu-Daudé5df2cfb2020-02-24 00:30:32 +010094 select PL041 # audio
Thomas Huth4cdea982019-02-07 15:21:27 +010095 select PL050 # keyboard/mouse
96 select PL110 # pl111 LCD controller
97 select PL181 # display
98 select SMC91C111
Paolo Bonzini82f51812019-01-23 14:56:00 +080099
Peter Maydell273a70a2024-02-06 13:29:26 +0000100config MPS3R
101 bool
102 default y
103 depends on TCG && ARM
104
Thomas Huth08cbacc2019-02-22 19:09:51 +0100105config MUSCA
106 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300107 default y
108 depends on TCG && ARM
Thomas Huth08cbacc2019-02-22 19:09:51 +0100109 select ARMSSE
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200110 select PL011 if !HAVE_RUST # UART
111 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth08cbacc2019-02-22 19:09:51 +0100112 select PL031
Thomas Huth853c0162019-05-14 10:24:28 +0200113 select SPLIT_IRQ
Thomas Huth5aa78a82019-05-14 07:26:53 +0200114 select UNIMP
Thomas Huth08cbacc2019-02-22 19:09:51 +0100115
Philippe Mathieu-Daudé9adfbf12022-01-07 19:44:27 +0100116config MARVELL_88W8618
117 bool
118
Paolo Bonzini82f51812019-01-23 14:56:00 +0800119config MUSICPAL
120 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300121 default y
122 depends on TCG && ARM
Philippe Mathieu-Daudé498661d2020-11-07 20:34:02 +0100123 select OR_IRQ
Thomas Huth59dd3eb2019-02-07 17:05:38 +0100124 select BITBANG_I2C
125 select MARVELL_88W8618
Paolo Bonzini9533dcd2019-01-23 14:56:12 +0800126 select PTIMER
Thomas Huth59dd3eb2019-02-07 17:05:38 +0100127 select PFLASH_CFI02
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200128 select SERIAL_MM
Thomas Huth59dd3eb2019-02-07 17:05:38 +0100129 select WM8750
Paolo Bonzini82f51812019-01-23 14:56:00 +0800130
131config NETDUINO2
132 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300133 default y
134 depends on TCG && ARM
Thomas Huth6239ac72019-02-08 08:52:57 +0100135 select STM32F205_SOC
Paolo Bonzini82f51812019-01-23 14:56:00 +0800136
Alistair Francis870c0342020-01-17 14:09:29 +0000137config NETDUINOPLUS2
138 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300139 default y
140 depends on TCG && ARM
Alistair Francis870c0342020-01-17 14:09:29 +0000141 select STM32F405_SOC
142
Felipe Balbiee5bffa2022-12-30 16:57:33 +0200143config OLIMEX_STM32_H405
144 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300145 default y
146 depends on TCG && ARM
Felipe Balbiee5bffa2022-12-30 16:57:33 +0200147 select STM32F405_SOC
148
Paolo Bonzini82f51812019-01-23 14:56:00 +0800149config OMAP
150 bool
Thomas Huth4826ac62019-02-07 17:12:14 +0100151 select FRAMEBUFFER
152 select I2C
Thomas Huth4826ac62019-02-07 17:12:14 +0100153 select NAND
154 select PFLASH_CFI01
155 select SD
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200156 select SERIAL_MM
Paolo Bonzini82f51812019-01-23 14:56:00 +0800157
Paolo Bonzini82f51812019-01-23 14:56:00 +0800158config REALVIEW
159 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300160 default y
161 depends on TCG && ARM
Thomas Huth79e93e22019-02-07 20:05:05 +0100162 imply PCI_DEVICES
163 imply PCI_TESTDEV
Peter Maydelle117e972022-02-08 15:59:11 +0000164 imply I2C_DEVICES
Thomas Huth79e93e22019-02-07 20:05:05 +0100165 select SMC91C111
166 select LAN9118
167 select A9MPCORE
168 select A15MPCORE
169 select ARM11MPCORE
170 select ARM_TIMER
171 select VERSATILE_PCI
172 select WM8750 # audio codec
173 select LSI_SCSI_PCI
174 select PCI
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200175 select PL011 if !HAVE_RUST # UART
176 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth79e93e22019-02-07 20:05:05 +0100177 select PL031 # RTC
178 select PL041 # audio codec
179 select PL050 # keyboard/mouse
180 select PL061 # GPIO
181 select PL080 # DMA controller
182 select PL110
183 select PL181 # display
184 select PL310 # cache controller
Philippe Mathieu-Daudé500a64d2023-01-10 09:25:08 +0100185 select ARM_SBCON_I2C
Thomas Huth79e93e22019-02-07 20:05:05 +0100186 select DS1338 # I2C RTC+NVRAM
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100187 select USB_OHCI_SYSBUS
Paolo Bonzini82f51812019-01-23 14:56:00 +0800188
Hongbo Zhang64580902019-07-01 17:26:18 +0100189config SBSA_REF
190 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300191 default y
192 depends on TCG && AARCH64
Hongbo Zhang64580902019-07-01 17:26:18 +0100193 imply PCI_DEVICES
Paolo Bonzinid641ec32024-04-30 21:08:15 +0200194 select DEVICE_TREE
Hongbo Zhang64580902019-07-01 17:26:18 +0100195 select AHCI
196 select ARM_SMMUV3
197 select GPIO_KEY
198 select PCI_EXPRESS
199 select PCI_EXPRESS_GENERIC_BRIDGE
200 select PFLASH_CFI01
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200201 select PL011 if !HAVE_RUST # UART
202 select X_PL011_RUST if HAVE_RUST # UART
Hongbo Zhang64580902019-07-01 17:26:18 +0100203 select PL031 # RTC
204 select PL061 # GPIO
Yuquan Wang62c2b872023-07-04 14:08:47 +0100205 select USB_XHCI_SYSBUS
Shashi Mallela4204c5f2020-10-26 21:59:26 -0400206 select WDT_SBSA
Marcin Juszkiewicz93faf3b2023-06-07 11:21:12 +0200207 select BOCHS_DISPLAY
Thomas Huth7bd8b0d2024-02-20 09:55:00 +0100208 select IDE_BUS
209 select IDE_DEV
Hongbo Zhang64580902019-07-01 17:26:18 +0100210
Thomas Huth5c6e99a2019-02-08 11:28:13 +0100211config SABRELITE
212 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300213 default y
214 depends on TCG && ARM
Thomas Huth5c6e99a2019-02-08 11:28:13 +0100215 select FSL_IMX6
216 select SSI_M25P80
217
Paolo Bonzini82f51812019-01-23 14:56:00 +0800218config STELLARIS
219 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300220 default y
221 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +0000222 imply I2C_DEVICES
Thomas Huth782ef8c2019-02-07 17:33:50 +0100223 select ARM_V7M
224 select CMSDK_APB_WATCHDOG
225 select I2C
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200226 select PL011 if !HAVE_RUST # UART
227 select X_PL011_RUST if HAVE_RUST # UART
Philippe Mathieu-Daudé58f7f3c2020-06-17 09:25:36 +0200228 select PL022 # SPI
Thomas Huth782ef8c2019-02-07 17:33:50 +0100229 select PL061 # GPIO
230 select SSD0303 # OLED display
231 select SSD0323 # OLED display
232 select SSI_SD
Peter Maydellc45460d2023-10-30 11:47:57 +0000233 select STELLARIS_GAMEPAD
Thomas Huth782ef8c2019-02-07 17:33:50 +0100234 select STELLARIS_ENET # ethernet
Peter Maydellf3eb7552021-08-12 10:33:54 +0100235 select STELLARIS_GPTM # general purpose timer module
Thomas Huth5aa78a82019-05-14 07:26:53 +0200236 select UNIMP
Paolo Bonzini82f51812019-01-23 14:56:00 +0800237
Alexandre Iooss2ac24102021-06-17 18:56:45 +0200238config STM32VLDISCOVERY
239 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300240 default y
241 depends on TCG && ARM
Alexandre Iooss2ac24102021-06-17 18:56:45 +0200242 select STM32F100_SOC
243
Paolo Bonzini82f51812019-01-23 14:56:00 +0800244config STRONGARM
245 bool
Peter Maydell4dba0462024-09-03 17:07:11 +0100246 select PXA2XX_TIMER
247 select SSI
Thomas Huth839507a2019-02-08 06:39:48 +0100248
249config COLLIE
250 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300251 default y
252 depends on TCG && ARM
Thomas Huth839507a2019-02-08 06:39:48 +0100253 select PFLASH_CFI01
Peter Maydell504f9352024-09-03 17:07:05 +0100254 select ZAURUS_SCOOP
Thomas Huth839507a2019-02-08 06:39:48 +0100255 select STRONGARM
Paolo Bonzini82f51812019-01-23 14:56:00 +0800256
Thomas Huth4826ac62019-02-07 17:12:14 +0100257config SX1
258 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300259 default y
260 depends on TCG && ARM
Thomas Huth4826ac62019-02-07 17:12:14 +0100261 select OMAP
262
Paolo Bonzini82f51812019-01-23 14:56:00 +0800263config VERSATILE
264 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300265 default y
266 depends on TCG && ARM
Thomas Huth79e93e22019-02-07 20:05:05 +0100267 select ARM_TIMER # sp804
268 select PFLASH_CFI01
269 select LSI_SCSI_PCI
270 select PL050 # keyboard/mouse
271 select PL080 # DMA controller
272 select PL190 # Vector PIC
273 select REALVIEW
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100274 select USB_OHCI_SYSBUS
Thomas Huth79e93e22019-02-07 20:05:05 +0100275
276config VEXPRESS
277 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300278 default y
279 depends on TCG && ARM
Paolo Bonzinid641ec32024-04-30 21:08:15 +0200280 select DEVICE_TREE
Thomas Huth79e93e22019-02-07 20:05:05 +0100281 select A9MPCORE
282 select A15MPCORE
283 select ARM_MPTIMER
284 select ARM_TIMER # sp804
285 select LAN9118
286 select PFLASH_CFI01
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200287 select PL011 if !HAVE_RUST # UART
288 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth79e93e22019-02-07 20:05:05 +0100289 select PL041 # audio codec
290 select PL181 # display
291 select REALVIEW
292 select SII9022
293 select VIRTIO_MMIO
Paolo Bonzini82f51812019-01-23 14:56:00 +0800294
295config ZYNQ
296 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300297 default y
298 depends on TCG && ARM
Thomas Huth31576a92019-02-07 20:26:34 +0100299 select A9MPCORE
300 select CADENCE # UART
301 select PFLASH_CFI02
Sebastian Huberf2718772024-05-24 14:08:36 +0200302 select PL310 # cache controller
Thomas Huth31576a92019-02-07 20:26:34 +0100303 select PL330
304 select SDHCI
305 select SSI_M25P80
306 select USB_EHCI_SYSBUS
307 select XILINX # UART
308 select XILINX_AXI
309 select XILINX_SPI
310 select XILINX_SPIPS
311 select ZYNQ_DEVCFG
Paolo Bonzini82f51812019-01-23 14:56:00 +0800312
313config ARM_V7M
314 bool
Alex Bennéecd436482021-07-07 14:17:42 +0100315 # currently v7M must be included in a TCG build due to translate.c
Fabiano Rosas441d7012023-05-23 15:05:25 -0300316 default y
317 depends on TCG && ARM
Andrew Jones9ad5f6b2020-11-04 11:33:43 +0100318 select PTIMER
Paolo Bonzini82f51812019-01-23 14:56:00 +0800319
320config ALLWINNER_A10
321 bool
Thomas Huth5885e662019-02-08 10:18:15 +0100322 select AHCI
323 select ALLWINNER_A10_PIT
324 select ALLWINNER_A10_PIC
Strahinja Jankovic423ec282022-12-26 23:02:57 +0100325 select ALLWINNER_A10_CCM
Strahinja Jankovicedd3a592022-12-26 23:02:58 +0100326 select ALLWINNER_A10_DRAMC
Strahinja Jankovic470f9f22023-04-20 10:21:13 +0100327 select ALLWINNER_WDT
Thomas Huth5885e662019-02-08 10:18:15 +0100328 select ALLWINNER_EMAC
Strahinja Jankovic9be8a822022-12-26 23:02:59 +0100329 select ALLWINNER_I2C
Strahinja Jankovic3341d1c2024-10-14 17:05:52 +0100330 select ALLWINNER_A10_SPI
qianfan Zhaoa9545432023-06-06 10:19:32 +0100331 select AXP2XX_PMU
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200332 select SERIAL_MM
Thomas Huth5aa78a82019-05-14 07:26:53 +0200333 select UNIMP
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100334 select USB_OHCI_SYSBUS
Paolo Bonzini82f51812019-01-23 14:56:00 +0800335
Niek Linnenbank740dafc2020-03-11 23:18:37 +0100336config ALLWINNER_H3
337 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300338 default y
339 depends on TCG && ARM
Niek Linnenbank740dafc2020-03-11 23:18:37 +0100340 select ALLWINNER_A10_PIT
Niek Linnenbank29d08972020-03-11 23:18:45 +0100341 select ALLWINNER_SUN8I_EMAC
Strahinja Jankovic9be8a822022-12-26 23:02:59 +0100342 select ALLWINNER_I2C
Strahinja Jankovicc663fc92023-04-20 10:21:14 +0100343 select ALLWINNER_WDT
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200344 select SERIAL_MM
Niek Linnenbank740dafc2020-03-11 23:18:37 +0100345 select ARM_TIMER
346 select ARM_GIC
347 select UNIMP
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100348 select USB_OHCI_SYSBUS
Niek Linnenbank2e4dfe82020-03-11 23:18:40 +0100349 select USB_EHCI_SYSBUS
Niek Linnenbank82e48382020-03-11 23:18:44 +0100350 select SD
Niek Linnenbank740dafc2020-03-11 23:18:37 +0100351
qianfan Zhao8d9006a2023-06-06 10:19:31 +0100352config ALLWINNER_R40
353 bool
354 default y if TCG && ARM
Guenter Roeck2a02da72024-01-15 10:27:56 -0800355 select AHCI
qianfan Zhao05def912023-06-06 10:19:33 +0100356 select ALLWINNER_SRAMC
qianfan Zhao8d9006a2023-06-06 10:19:31 +0100357 select ALLWINNER_A10_PIT
Guenter Roeck2af71d22024-01-15 10:27:57 -0800358 select ALLWINNER_WDT
qianfan Zhaoa9545432023-06-06 10:19:32 +0100359 select AXP2XX_PMU
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200360 select SERIAL_MM
qianfan Zhao8d9006a2023-06-06 10:19:31 +0100361 select ARM_TIMER
362 select ARM_GIC
363 select UNIMP
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100364 select USB_OHCI_SYSBUS
Guenter Roeck43eef242024-01-15 10:27:55 -0800365 select USB_EHCI_SYSBUS
qianfan Zhao8d9006a2023-06-06 10:19:31 +0100366 select SD
367
Paolo Bonzini82f51812019-01-23 14:56:00 +0800368config RASPI
369 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300370 default y
371 depends on TCG && ARM
Thomas Huth1ad846a2019-02-08 10:22:54 +0100372 select FRAMEBUFFER
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200373 select PL011 if !HAVE_RUST # UART
374 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth1ad846a2019-02-08 10:22:54 +0100375 select SDHCI
Thomas Huth8d942982020-07-22 17:47:19 +0200376 select USB_DWC2
Rayhan Faizelf09c2b72024-01-30 03:48:08 +0530377 select BCM2835_SPI
Rayhan Faizelf5c63202024-02-25 00:40:37 +0530378 select BCM2835_I2C
Paolo Bonzini82f51812019-01-23 14:56:00 +0800379
Alexandre Iooss0f76deb2021-06-17 18:56:44 +0200380config STM32F100_SOC
381 bool
382 select ARM_V7M
383 select STM32F2XX_USART
384 select STM32F2XX_SPI
385
Paolo Bonzini82f51812019-01-23 14:56:00 +0800386config STM32F205_SOC
387 bool
Thomas Huth6239ac72019-02-08 08:52:57 +0100388 select ARM_V7M
Thomas Huth282467f2019-05-14 08:13:28 +0200389 select OR_IRQ
Thomas Huth6239ac72019-02-08 08:52:57 +0100390 select STM32F2XX_TIMER
391 select STM32F2XX_USART
392 select STM32F2XX_SYSCFG
393 select STM32F2XX_ADC
394 select STM32F2XX_SPI
Paolo Bonzini82f51812019-01-23 14:56:00 +0800395
Alistair Francis870c0342020-01-17 14:09:29 +0000396config STM32F405_SOC
397 bool
398 select ARM_V7M
Philippe Mathieu-Daudé9e399832021-01-31 19:44:44 +0100399 select OR_IRQ
Román Cárdenas Rodríguez950dff92024-10-14 17:05:50 +0100400 select STM32_RCC
Alistair Francis870c0342020-01-17 14:09:29 +0000401 select STM32F4XX_SYSCFG
Alistair Francise64d8c82020-01-17 14:09:29 +0000402 select STM32F4XX_EXTI
Alistair Francis870c0342020-01-17 14:09:29 +0000403
Inès Varhol41581f12024-01-08 14:58:29 +0100404config B_L475E_IOT01A
405 bool
406 default y
407 depends on TCG && ARM
408 select STM32L4X5_SOC
Inès Varhol49157202024-04-24 22:06:54 +0200409 imply DM163
Inès Varhol41581f12024-01-08 14:58:29 +0100410
Inès Varhol04a7c7b2024-01-08 14:58:28 +0100411config STM32L4X5_SOC
412 bool
413 select ARM_V7M
414 select OR_IRQ
Inès Varhol52671f62024-01-09 17:06:03 +0100415 select STM32L4X5_EXTI
Inès Varhol1c381292024-03-05 22:03:11 +0100416 select STM32L4X5_SYSCFG
Arnaud Minierd6b55a02024-03-03 15:06:36 +0100417 select STM32L4X5_RCC
Inès Varhol1c381292024-03-05 22:03:11 +0100418 select STM32L4X5_GPIO
Arnaud Minier92741432024-03-29 18:44:01 +0100419 select STM32L4X5_USART
Inès Varhol04a7c7b2024-01-08 14:58:28 +0100420
Paolo Bonzini82f51812019-01-23 14:56:00 +0800421config XLNX_ZYNQMP_ARM
422 bool
Marc-André Lureau04c4cc12023-08-30 13:38:38 +0400423 default y if PIXMAN
Fabiano Rosas441d7012023-05-23 15:05:25 -0300424 depends on TCG && AARCH64
Thomas Huthf3c3a1e2019-02-08 14:52:40 +0100425 select AHCI
426 select ARM_GIC
427 select CADENCE
Thomas Huth259181d2024-04-15 08:56:55 +0200428 select CPU_CLUSTER
Thomas Huthf3c3a1e2019-02-08 14:52:40 +0100429 select DDC
430 select DPCD
Paolo Bonzinid641ec32024-04-30 21:08:15 +0200431 select DEVICE_TREE
Thomas Huthf3c3a1e2019-02-08 14:52:40 +0100432 select SDHCI
433 select SSI
434 select SSI_M25P80
435 select XILINX_AXI
436 select XILINX_SPIPS
Xuzhou Cheng668351a2021-03-03 21:52:52 +0800437 select XLNX_CSU_DMA
Marc-André Lureau04c4cc12023-08-30 13:38:38 +0400438 select XLNX_DISPLAYPORT
Thomas Huthf3c3a1e2019-02-08 14:52:40 +0100439 select XLNX_ZYNQMP
Philippe Mathieu-Daudé6bfaec72021-01-31 19:44:46 +0100440 select XLNX_ZDMA
Philippe Mathieu-Daudéf4880c22023-02-16 10:23:27 +0100441 select USB_DWC3
Paolo Bonzini82f51812019-01-23 14:56:00 +0800442
443config XLNX_VERSAL
444 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300445 default y
446 depends on TCG && AARCH64
Thomas Huth24c7bb32019-02-09 07:16:05 +0100447 select ARM_GIC
Thomas Huth259181d2024-04-15 08:56:55 +0200448 select CPU_CLUSTER
Paolo Bonzinid641ec32024-04-30 21:08:15 +0200449 select DEVICE_TREE
Paolo Bonzinid0f0cd52024-10-10 16:11:28 +0200450 select PL011 if !HAVE_RUST # UART
451 select X_PL011_RUST if HAVE_RUST # UART
Thomas Huth24c7bb32019-02-09 07:16:05 +0100452 select CADENCE
453 select VIRTIO_MMIO
Thomas Huth5aa78a82019-05-14 07:26:53 +0200454 select UNIMP
Philippe Mathieu-Daudé6bfaec72021-01-31 19:44:46 +0100455 select XLNX_ZDMA
Philippe Mathieu-Daudé1de3b492021-01-31 19:44:47 +0100456 select XLNX_ZYNQMP
Alex Bennéed064c192021-07-07 14:17:41 +0100457 select OR_IRQ
Tong Ho393185b2021-09-16 22:23:56 -0700458 select XLNX_BBRAM
Tong Ho5f4910f2021-09-16 22:23:57 -0700459 select XLNX_EFUSE_VERSAL
Fabiano Rosasb9353ac2023-05-03 10:12:29 +0100460 select XLNX_USB_SUBSYS
Tong Ho3b223762023-10-31 11:46:10 -0700461 select XLNX_VERSAL_TRNG
Marc-André Lureaub271b6a2023-11-03 19:09:03 +0400462 select XLNX_CSU_DMA
Paolo Bonzini82f51812019-01-23 14:56:00 +0800463
Havard Skinnemoene5a7ba82020-09-10 22:20:48 -0700464config NPCM7XX
465 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300466 default y
467 depends on TCG && ARM
Havard Skinnemoen2d8f0482020-09-10 22:20:51 -0700468 select A9MPCORE
Titus Rwantare6f351a72023-10-23 23:46:44 +0000469 select ADM1266
Titus Rwantarec93488f2021-07-08 10:25:53 -0700470 select ADM1272
Havard Skinnemoen2d8f0482020-09-10 22:20:51 -0700471 select ARM_GIC
Philippe Mathieu-Daudéd43bb042021-05-13 08:55:50 +0200472 select SMBUS
Hao Wu2ef1e0d2021-02-10 14:04:24 -0800473 select AT24C # EEPROM
Titus Rwantare72154562021-07-08 10:25:55 -0700474 select MAX34451
Titus Rwantareffcdae62022-03-07 12:06:03 -0800475 select ISL_PMBUS_VR
Havard Skinnemoen2d8f0482020-09-10 22:20:51 -0700476 select PL310 # cache controller
Titus Rwantare3746d5c2021-07-08 10:25:52 -0700477 select PMBUS
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200478 select SERIAL_MM
Havard Skinnemoenb8212422020-09-10 22:20:57 -0700479 select SSI
Havard Skinnemoen2d8f0482020-09-10 22:20:51 -0700480 select UNIMP
Patrick Venture62296592021-06-08 13:25:21 -0700481 select PCA954X
Paolo Bonzini15f07fb2024-02-23 13:44:05 +0100482 select USB_OHCI_SYSBUS
Havard Skinnemoene5a7ba82020-09-10 22:20:48 -0700483
Paolo Bonzini82f51812019-01-23 14:56:00 +0800484config FSL_IMX25
485 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300486 default y
487 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +0000488 imply I2C_DEVICES
Thomas Huth02047622019-02-08 13:18:31 +0100489 select IMX
490 select IMX_FEC
491 select IMX_I2C
Guenter Roeck4f0aff02020-05-17 09:21:30 -0700492 select WDT_IMX2
Philippe Mathieu-Daudéee9ffe02021-05-13 15:20:23 +0200493 select SDHCI
Paolo Bonzini82f51812019-01-23 14:56:00 +0800494
495config FSL_IMX31
496 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300497 default y
498 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +0000499 imply I2C_DEVICES
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200500 select SERIAL_MM
Thomas Huth73129f42019-02-07 16:51:56 +0100501 select IMX
502 select IMX_I2C
Guenter Roeckb9e521d2020-05-17 09:21:31 -0700503 select WDT_IMX2
Thomas Huth73129f42019-02-07 16:51:56 +0100504 select LAN9118
Paolo Bonzini82f51812019-01-23 14:56:00 +0800505
506config FSL_IMX6
507 bool
Nikita Ostrenkov5e6be952024-01-08 14:03:25 +0000508 imply PCIE_DEVICES
Peter Maydelle117e972022-02-08 15:59:11 +0000509 imply I2C_DEVICES
Thomas Huth5c6e99a2019-02-08 11:28:13 +0100510 select A9MPCORE
511 select IMX
512 select IMX_FEC
513 select IMX_I2C
Guenter Roeck0701a5e2020-03-12 18:45:47 -0700514 select IMX_USBPHY
Guenter Roeck37f959592020-05-17 09:21:28 -0700515 select WDT_IMX2
Nikita Ostrenkovf7f57842024-01-08 14:32:58 +0000516 select PL310 # cache controller
Nikita Ostrenkov5e6be952024-01-08 14:03:25 +0000517 select PCI_EXPRESS_DESIGNWARE
Thomas Huth02047622019-02-08 13:18:31 +0100518 select SDHCI
Paolo Bonzini82f51812019-01-23 14:56:00 +0800519
520config ASPEED_SOC
521 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300522 default y
523 depends on TCG && ARM
Thomas Huth68e44dd2019-02-08 06:53:04 +0100524 select DS1338
525 select FTGMAC100
526 select I2C
Joel Stanley46560cb2021-09-20 08:50:59 +0200527 select DPS310
Thomas Huth68e44dd2019-02-08 06:53:04 +0100528 select PCA9552
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200529 select SERIAL_MM
Thomas Huth68e44dd2019-02-08 06:53:04 +0100530 select SMBUS_EEPROM
Patrick Venture3ec75e32021-06-08 13:25:22 -0700531 select PCA954X
Thomas Huth68e44dd2019-02-08 06:53:04 +0100532 select SSI
533 select SSI_M25P80
534 select TMP105
535 select TMP421
John Wang5e623f22020-12-10 12:11:03 +0100536 select EMC141X
Thomas Huth5aa78a82019-05-14 07:26:53 +0200537 select UNIMP
Philippe Mathieu-Daudé7cfbde52020-06-20 18:54:41 +0200538 select LED
Maheswara Kurapati2a75e8c2022-06-30 09:21:13 +0200539 select PMBUS
540 select MAX31785
Ninad Palsuleeb04c352024-01-26 04:49:52 -0600541 select FSI_APB2OPB_ASPEED
Patrick Leisdeb771d2024-10-28 18:14:20 +0000542 select AT24C
Paolo Bonzini82f51812019-01-23 14:56:00 +0800543
544config MPS2
545 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300546 default y
547 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +0000548 imply I2C_DEVICES
Thomas Huthd2a99d72019-02-08 10:19:41 +0100549 select ARMSSE
550 select LAN9118
551 select MPS2_FPGAIO
552 select MPS2_SCC
Thomas Huth282467f2019-05-14 08:13:28 +0200553 select OR_IRQ
Philippe Mathieu-Daudé58f7f3c2020-06-17 09:25:36 +0200554 select PL022 # SPI
Thomas Huthd2a99d72019-02-08 10:19:41 +0100555 select PL080 # DMA controller
Thomas Huth853c0162019-05-14 10:24:28 +0200556 select SPLIT_IRQ
Thomas Huth5aa78a82019-05-14 07:26:53 +0200557 select UNIMP
Philippe Mathieu-Daudéecbe51a2020-06-17 09:25:33 +0200558 select CMSDK_APB_WATCHDOG
Philippe Mathieu-Daudé500a64d2023-01-10 09:25:08 +0100559 select ARM_SBCON_I2C
Paolo Bonzini82f51812019-01-23 14:56:00 +0800560
561config FSL_IMX7
562 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300563 default y
564 depends on TCG && ARM
Thomas Huth02047622019-02-08 13:18:31 +0100565 imply PCI_DEVICES
566 imply TEST_DEVICES
Peter Maydelle117e972022-02-08 15:59:11 +0000567 imply I2C_DEVICES
Thomas Huth02047622019-02-08 13:18:31 +0100568 select A15MPCORE
569 select PCI
570 select IMX
571 select IMX_FEC
572 select IMX_I2C
Guenter Roeck37f959592020-05-17 09:21:28 -0700573 select WDT_IMX2
Thomas Huth02047622019-02-08 13:18:31 +0100574 select PCI_EXPRESS_DESIGNWARE
575 select SDHCI
Thomas Huth5aa78a82019-05-14 07:26:53 +0200576 select UNIMP
Paolo Bonzini82f51812019-01-23 14:56:00 +0800577
578config ARM_SMMUV3
579 bool
580
581config FSL_IMX6UL
582 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300583 default y
584 depends on TCG && ARM
Peter Maydelle117e972022-02-08 15:59:11 +0000585 imply I2C_DEVICES
Thomas Huth02047622019-02-08 13:18:31 +0100586 select A15MPCORE
587 select IMX
588 select IMX_FEC
589 select IMX_I2C
Guenter Roeck37f959592020-05-17 09:21:28 -0700590 select WDT_IMX2
Thomas Huth02047622019-02-08 13:18:31 +0100591 select SDHCI
Thomas Huth5aa78a82019-05-14 07:26:53 +0200592 select UNIMP
Paolo Bonzini82f51812019-01-23 14:56:00 +0800593
Thomas Huthc1c60b02019-02-08 13:33:40 +0100594config MICROBIT
595 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300596 default y
597 depends on TCG && ARM
Thomas Huthc1c60b02019-02-08 13:33:40 +0100598 select NRF51_SOC
599
Paolo Bonzini82f51812019-01-23 14:56:00 +0800600config NRF51_SOC
601 bool
Peter Maydelle117e972022-02-08 15:59:11 +0000602 imply I2C_DEVICES
Thomas Huthc1c60b02019-02-08 13:33:40 +0100603 select I2C
604 select ARM_V7M
Thomas Huth5aa78a82019-05-14 07:26:53 +0200605 select UNIMP
Paolo Bonzini82f51812019-01-23 14:56:00 +0800606
Thomas Huthb6e2b222019-02-08 12:00:29 +0100607config EMCRAFT_SF2
608 bool
Fabiano Rosas441d7012023-05-23 15:05:25 -0300609 default y
610 depends on TCG && ARM
Thomas Huthb6e2b222019-02-08 12:00:29 +0100611 select MSF2
612 select SSI_M25P80
613
Paolo Bonzini82f51812019-01-23 14:56:00 +0800614config MSF2
615 bool
Thomas Huthb6e2b222019-02-08 12:00:29 +0100616 select ARM_V7M
Paolo Bonzini9533dcd2019-01-23 14:56:12 +0800617 select PTIMER
Bernhard Beschow7e6b5492024-09-05 09:38:32 +0200618 select SERIAL_MM
Thomas Huthb6e2b222019-02-08 12:00:29 +0100619 select SSI
Thomas Huth5aa78a82019-05-14 07:26:53 +0200620 select UNIMP
Paolo Bonzini82f51812019-01-23 14:56:00 +0800621
Paolo Bonzini82f51812019-01-23 14:56:00 +0800622config ARMSSE
623 bool
Thomas Huthd2a99d72019-02-08 10:19:41 +0100624 select ARM_V7M
Peter Maydell4239b312021-02-19 14:45:53 +0000625 select ARMSSE_CPU_PWRCTRL
Thomas Huthd2a99d72019-02-08 10:19:41 +0100626 select ARMSSE_CPUID
627 select ARMSSE_MHU
628 select CMSDK_APB_TIMER
629 select CMSDK_APB_DUALTIMER
630 select CMSDK_APB_UART
631 select CMSDK_APB_WATCHDOG
Thomas Huth259181d2024-04-15 08:56:55 +0200632 select CPU_CLUSTER
Thomas Huthd2a99d72019-02-08 10:19:41 +0100633 select IOTKIT_SECCTL
634 select IOTKIT_SYSCTL
635 select IOTKIT_SYSINFO
Thomas Huth282467f2019-05-14 08:13:28 +0200636 select OR_IRQ
Thomas Huth853c0162019-05-14 10:24:28 +0200637 select SPLIT_IRQ
Thomas Huthd2a99d72019-02-08 10:19:41 +0100638 select TZ_MPC
639 select TZ_MSC
640 select TZ_PPC
Thomas Huth5aa78a82019-05-14 07:26:53 +0200641 select UNIMP
Peter Maydell0d10df32021-02-19 14:45:44 +0000642 select SSE_COUNTER
Peter Maydell0b8ceee2021-02-19 14:45:45 +0000643 select SSE_TIMER