commit | f271877307f1bb43ac4031bf6d962bdd86caa498 | [log] [tgz] |
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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | Fri May 24 14:08:36 2024 +0200 |
committer | Peter Maydell <peter.maydell@linaro.org> | Thu May 30 13:21:06 2024 +0100 |
tree | 96baa30ca22b8cbcba3c7fe12d3cf50b64d36ac8 | |
parent | d9aff83ad569714ec1b05176942a80fd80e062b7 [diff] |
hw/arm/xilinx_zynq: Add cache controller The Zynq 7000 SoCs contain a CoreLink L2C-310 cache controller. Add the corresponding Qemu device to the xilinx-zynq-a9 machine. Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Message-id: 20240524120837.10057-2-sebastian.huber@embedded-brains.de Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>