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aliguori610626a2009-03-12 20:25:12 +00001/*
2 * ioapic.c IOAPIC emulation logic
3 *
4 * Copyright (c) 2004-2005 Fabrice Bellard
5 *
6 * Split the ioapic logic from apic.c
7 * Xiantao Zhang <xiantao.zhang@intel.com>
8 *
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
18 *
19 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000020 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
aliguori610626a2009-03-12 20:25:12 +000021 */
22
23#include "hw.h"
24#include "pc.h"
Blue Swirlaa28b9b2010-03-21 19:46:26 +000025#include "apic.h"
Jan Kiszka0280b572011-02-03 22:54:11 +010026#include "ioapic.h"
Jan Kiszka244ac3a2011-10-16 19:38:22 +020027#include "ioapic_internal.h"
aliguori610626a2009-03-12 20:25:12 +000028
29//#define DEBUG_IOAPIC
30
Blue Swirl9af9b332010-05-31 18:59:45 +000031#ifdef DEBUG_IOAPIC
32#define DPRINTF(fmt, ...) \
33 do { printf("ioapic: " fmt , ## __VA_ARGS__); } while (0)
34#else
35#define DPRINTF(fmt, ...)
36#endif
37
Jan Kiszka244ac3a2011-10-16 19:38:22 +020038static IOAPICCommonState *ioapics[MAX_IOAPICS];
Jan Kiszka0280b572011-02-03 22:54:11 +010039
Jan Kiszka244ac3a2011-10-16 19:38:22 +020040static void ioapic_service(IOAPICCommonState *s)
aliguori610626a2009-03-12 20:25:12 +000041{
42 uint8_t i;
43 uint8_t trig_mode;
44 uint8_t vector;
45 uint8_t delivery_mode;
46 uint32_t mask;
47 uint64_t entry;
48 uint8_t dest;
49 uint8_t dest_mode;
aliguori610626a2009-03-12 20:25:12 +000050
51 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
52 mask = 1 << i;
53 if (s->irr & mask) {
54 entry = s->ioredtbl[i];
55 if (!(entry & IOAPIC_LVT_MASKED)) {
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010056 trig_mode = ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1);
57 dest = entry >> IOAPIC_LVT_DEST_SHIFT;
58 dest_mode = (entry >> IOAPIC_LVT_DEST_MODE_SHIFT) & 1;
59 delivery_mode =
60 (entry >> IOAPIC_LVT_DELIV_MODE_SHIFT) & IOAPIC_DM_MASK;
Jan Kiszka0280b572011-02-03 22:54:11 +010061 if (trig_mode == IOAPIC_TRIGGER_EDGE) {
aliguori610626a2009-03-12 20:25:12 +000062 s->irr &= ~mask;
Jan Kiszka0280b572011-02-03 22:54:11 +010063 } else {
64 s->ioredtbl[i] |= IOAPIC_LVT_REMOTE_IRR;
65 }
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010066 if (delivery_mode == IOAPIC_DM_EXTINT) {
aliguori610626a2009-03-12 20:25:12 +000067 vector = pic_read_irq(isa_pic);
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010068 } else {
69 vector = entry & IOAPIC_VECTOR_MASK;
70 }
aliguori610626a2009-03-12 20:25:12 +000071 apic_deliver_irq(dest, dest_mode, delivery_mode,
Jan Kiszka1f6f4082011-08-22 17:46:31 +020072 vector, trig_mode);
aliguori610626a2009-03-12 20:25:12 +000073 }
74 }
75 }
76}
77
Blue Swirl7d0500c2010-06-17 16:32:47 +000078static void ioapic_set_irq(void *opaque, int vector, int level)
aliguori610626a2009-03-12 20:25:12 +000079{
Jan Kiszka244ac3a2011-10-16 19:38:22 +020080 IOAPICCommonState *s = opaque;
aliguori610626a2009-03-12 20:25:12 +000081
82 /* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
83 * to GSI 2. GSI maps to ioapic 1-1. This is not
84 * the cleanest way of doing it but it should work. */
85
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010086 DPRINTF("%s: %s vec %x\n", __func__, level ? "raise" : "lower", vector);
87 if (vector == 0) {
aliguori610626a2009-03-12 20:25:12 +000088 vector = 2;
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010089 }
aliguori610626a2009-03-12 20:25:12 +000090 if (vector >= 0 && vector < IOAPIC_NUM_PINS) {
91 uint32_t mask = 1 << vector;
92 uint64_t entry = s->ioredtbl[vector];
93
Jan Kiszka0035e502011-08-22 17:46:42 +020094 if (entry & (1 << IOAPIC_LVT_POLARITY_SHIFT)) {
95 level = !level;
96 }
Jan Kiszka1f5e71a2011-02-03 22:54:14 +010097 if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) ==
98 IOAPIC_TRIGGER_LEVEL) {
aliguori610626a2009-03-12 20:25:12 +000099 /* level triggered */
100 if (level) {
101 s->irr |= mask;
102 ioapic_service(s);
103 } else {
104 s->irr &= ~mask;
105 }
106 } else {
Jan Kiszka47f7be32011-04-09 13:18:59 +0200107 /* According to the 82093AA manual, we must ignore edge requests
108 * if the input pin is masked. */
109 if (level && !(entry & IOAPIC_LVT_MASKED)) {
aliguori610626a2009-03-12 20:25:12 +0000110 s->irr |= mask;
111 ioapic_service(s);
112 }
113 }
114 }
115}
116
Jan Kiszka0280b572011-02-03 22:54:11 +0100117void ioapic_eoi_broadcast(int vector)
118{
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200119 IOAPICCommonState *s;
Jan Kiszka0280b572011-02-03 22:54:11 +0100120 uint64_t entry;
121 int i, n;
122
123 for (i = 0; i < MAX_IOAPICS; i++) {
124 s = ioapics[i];
125 if (!s) {
126 continue;
127 }
128 for (n = 0; n < IOAPIC_NUM_PINS; n++) {
129 entry = s->ioredtbl[n];
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100130 if ((entry & IOAPIC_LVT_REMOTE_IRR)
131 && (entry & IOAPIC_VECTOR_MASK) == vector) {
Jan Kiszka0280b572011-02-03 22:54:11 +0100132 s->ioredtbl[n] = entry & ~IOAPIC_LVT_REMOTE_IRR;
133 if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) {
134 ioapic_service(s);
135 }
136 }
137 }
138 }
139}
140
Jan Kiszka4d5bf5f2011-10-17 13:11:27 +0200141static uint64_t
142ioapic_mem_read(void *opaque, target_phys_addr_t addr, unsigned int size)
aliguori610626a2009-03-12 20:25:12 +0000143{
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200144 IOAPICCommonState *s = opaque;
aliguori610626a2009-03-12 20:25:12 +0000145 int index;
146 uint32_t val = 0;
147
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100148 switch (addr & 0xff) {
149 case IOAPIC_IOREGSEL:
aliguori610626a2009-03-12 20:25:12 +0000150 val = s->ioregsel;
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100151 break;
152 case IOAPIC_IOWIN:
Jan Kiszka1a440962011-10-17 13:11:29 +0200153 if (size != 4) {
154 break;
155 }
aliguori610626a2009-03-12 20:25:12 +0000156 switch (s->ioregsel) {
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100157 case IOAPIC_REG_ID:
158 val = s->id << IOAPIC_ID_SHIFT;
159 break;
160 case IOAPIC_REG_VER:
161 val = IOAPIC_VERSION |
162 ((IOAPIC_NUM_PINS - 1) << IOAPIC_VER_ENTRIES_SHIFT);
163 break;
164 case IOAPIC_REG_ARB:
165 val = 0;
166 break;
167 default:
168 index = (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1;
169 if (index >= 0 && index < IOAPIC_NUM_PINS) {
170 if (s->ioregsel & 1) {
171 val = s->ioredtbl[index] >> 32;
172 } else {
173 val = s->ioredtbl[index] & 0xffffffff;
aliguori610626a2009-03-12 20:25:12 +0000174 }
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100175 }
aliguori610626a2009-03-12 20:25:12 +0000176 }
Blue Swirl9af9b332010-05-31 18:59:45 +0000177 DPRINTF("read: %08x = %08x\n", s->ioregsel, val);
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100178 break;
aliguori610626a2009-03-12 20:25:12 +0000179 }
180 return val;
181}
182
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100183static void
Jan Kiszka4d5bf5f2011-10-17 13:11:27 +0200184ioapic_mem_write(void *opaque, target_phys_addr_t addr, uint64_t val,
185 unsigned int size)
aliguori610626a2009-03-12 20:25:12 +0000186{
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200187 IOAPICCommonState *s = opaque;
aliguori610626a2009-03-12 20:25:12 +0000188 int index;
189
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100190 switch (addr & 0xff) {
191 case IOAPIC_IOREGSEL:
aliguori610626a2009-03-12 20:25:12 +0000192 s->ioregsel = val;
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100193 break;
194 case IOAPIC_IOWIN:
Jan Kiszka1a440962011-10-17 13:11:29 +0200195 if (size != 4) {
196 break;
197 }
Blue Swirl9af9b332010-05-31 18:59:45 +0000198 DPRINTF("write: %08x = %08x\n", s->ioregsel, val);
aliguori610626a2009-03-12 20:25:12 +0000199 switch (s->ioregsel) {
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100200 case IOAPIC_REG_ID:
201 s->id = (val >> IOAPIC_ID_SHIFT) & IOAPIC_ID_MASK;
202 break;
203 case IOAPIC_REG_VER:
204 case IOAPIC_REG_ARB:
205 break;
206 default:
207 index = (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1;
208 if (index >= 0 && index < IOAPIC_NUM_PINS) {
209 if (s->ioregsel & 1) {
210 s->ioredtbl[index] &= 0xffffffff;
211 s->ioredtbl[index] |= (uint64_t)val << 32;
212 } else {
213 s->ioredtbl[index] &= ~0xffffffffULL;
214 s->ioredtbl[index] |= val;
aliguori610626a2009-03-12 20:25:12 +0000215 }
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100216 ioapic_service(s);
217 }
aliguori610626a2009-03-12 20:25:12 +0000218 }
Jan Kiszka1f5e71a2011-02-03 22:54:14 +0100219 break;
aliguori610626a2009-03-12 20:25:12 +0000220 }
221}
222
Jan Kiszka4d5bf5f2011-10-17 13:11:27 +0200223static const MemoryRegionOps ioapic_io_ops = {
224 .read = ioapic_mem_read,
225 .write = ioapic_mem_write,
226 .endianness = DEVICE_NATIVE_ENDIAN,
aliguori610626a2009-03-12 20:25:12 +0000227};
228
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200229static void ioapic_init(IOAPICCommonState *s, int instance_no)
aliguori610626a2009-03-12 20:25:12 +0000230{
Jan Kiszka4d5bf5f2011-10-17 13:11:27 +0200231 memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000);
aliguori610626a2009-03-12 20:25:12 +0000232
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200233 qdev_init_gpio_in(&s->busdev.qdev, ioapic_set_irq, IOAPIC_NUM_PINS);
aliguori610626a2009-03-12 20:25:12 +0000234
Jan Kiszka244ac3a2011-10-16 19:38:22 +0200235 ioapics[instance_no] = s;
aliguori610626a2009-03-12 20:25:12 +0000236}
Blue Swirl96051112010-06-19 07:41:43 +0000237
Anthony Liguori999e12b2012-01-24 13:12:29 -0600238static void ioapic_class_init(ObjectClass *klass, void *data)
239{
240 IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass);
Anthony Liguori39bffca2011-12-07 21:34:16 -0600241 DeviceClass *dc = DEVICE_CLASS(klass);
Anthony Liguori999e12b2012-01-24 13:12:29 -0600242
243 k->init = ioapic_init;
Anthony Liguori39bffca2011-12-07 21:34:16 -0600244 dc->reset = ioapic_reset_common;
Anthony Liguori999e12b2012-01-24 13:12:29 -0600245}
246
Anthony Liguori39bffca2011-12-07 21:34:16 -0600247static TypeInfo ioapic_info = {
248 .name = "ioapic",
249 .parent = TYPE_IOAPIC_COMMON,
250 .instance_size = sizeof(IOAPICCommonState),
251 .class_init = ioapic_class_init,
Blue Swirl96051112010-06-19 07:41:43 +0000252};
253
254static void ioapic_register_devices(void)
255{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600256 type_register_static(&ioapic_info);
Blue Swirl96051112010-06-19 07:41:43 +0000257}
258
259device_init(ioapic_register_devices)