bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 1 | /* |
| 2 | * gdb server stub |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 18 | */ |
pbrook | 978efd6 | 2006-06-17 18:30:42 +0000 | [diff] [blame] | 19 | #include "config.h" |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 20 | #include "qemu-common.h" |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 21 | #ifdef CONFIG_USER_ONLY |
| 22 | #include <stdlib.h> |
| 23 | #include <stdio.h> |
| 24 | #include <stdarg.h> |
| 25 | #include <string.h> |
| 26 | #include <errno.h> |
| 27 | #include <unistd.h> |
pbrook | 978efd6 | 2006-06-17 18:30:42 +0000 | [diff] [blame] | 28 | #include <fcntl.h> |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 29 | |
| 30 | #include "qemu.h" |
| 31 | #else |
Paolo Bonzini | 83c9089 | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 32 | #include "monitor/monitor.h" |
Paolo Bonzini | 927d487 | 2012-12-17 18:20:05 +0100 | [diff] [blame] | 33 | #include "char/char.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 34 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 35 | #include "exec/gdbstub.h" |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 36 | #endif |
bellard | 67b915a | 2004-03-31 23:37:16 +0000 | [diff] [blame] | 37 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 38 | #define MAX_PACKET_LENGTH 4096 |
| 39 | |
Blue Swirl | 2b41f10 | 2011-06-19 20:38:22 +0000 | [diff] [blame] | 40 | #include "cpu.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 41 | #include "qemu/sockets.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 42 | #include "sysemu/kvm.h" |
Richard Henderson | 6ee77b1 | 2012-08-23 10:44:45 -0700 | [diff] [blame] | 43 | #include "qemu/bitops.h" |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 44 | |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 45 | #ifndef TARGET_CPU_MEMORY_RW_DEBUG |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 46 | static inline int target_memory_rw_debug(CPUArchState *env, target_ulong addr, |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 47 | uint8_t *buf, int len, int is_write) |
| 48 | { |
| 49 | return cpu_memory_rw_debug(env, addr, buf, len, is_write); |
| 50 | } |
| 51 | #else |
| 52 | /* target_memory_rw_debug() defined in cpu.h */ |
| 53 | #endif |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 54 | |
| 55 | enum { |
| 56 | GDB_SIGNAL_0 = 0, |
| 57 | GDB_SIGNAL_INT = 2, |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 58 | GDB_SIGNAL_QUIT = 3, |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 59 | GDB_SIGNAL_TRAP = 5, |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 60 | GDB_SIGNAL_ABRT = 6, |
| 61 | GDB_SIGNAL_ALRM = 14, |
| 62 | GDB_SIGNAL_IO = 23, |
| 63 | GDB_SIGNAL_XCPU = 24, |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 64 | GDB_SIGNAL_UNKNOWN = 143 |
| 65 | }; |
| 66 | |
| 67 | #ifdef CONFIG_USER_ONLY |
| 68 | |
| 69 | /* Map target signal numbers to GDB protocol signal numbers and vice |
| 70 | * versa. For user emulation's currently supported systems, we can |
| 71 | * assume most signals are defined. |
| 72 | */ |
| 73 | |
| 74 | static int gdb_signal_table[] = { |
| 75 | 0, |
| 76 | TARGET_SIGHUP, |
| 77 | TARGET_SIGINT, |
| 78 | TARGET_SIGQUIT, |
| 79 | TARGET_SIGILL, |
| 80 | TARGET_SIGTRAP, |
| 81 | TARGET_SIGABRT, |
| 82 | -1, /* SIGEMT */ |
| 83 | TARGET_SIGFPE, |
| 84 | TARGET_SIGKILL, |
| 85 | TARGET_SIGBUS, |
| 86 | TARGET_SIGSEGV, |
| 87 | TARGET_SIGSYS, |
| 88 | TARGET_SIGPIPE, |
| 89 | TARGET_SIGALRM, |
| 90 | TARGET_SIGTERM, |
| 91 | TARGET_SIGURG, |
| 92 | TARGET_SIGSTOP, |
| 93 | TARGET_SIGTSTP, |
| 94 | TARGET_SIGCONT, |
| 95 | TARGET_SIGCHLD, |
| 96 | TARGET_SIGTTIN, |
| 97 | TARGET_SIGTTOU, |
| 98 | TARGET_SIGIO, |
| 99 | TARGET_SIGXCPU, |
| 100 | TARGET_SIGXFSZ, |
| 101 | TARGET_SIGVTALRM, |
| 102 | TARGET_SIGPROF, |
| 103 | TARGET_SIGWINCH, |
| 104 | -1, /* SIGLOST */ |
| 105 | TARGET_SIGUSR1, |
| 106 | TARGET_SIGUSR2, |
blueswir1 | c72d5bf | 2009-01-15 17:27:45 +0000 | [diff] [blame] | 107 | #ifdef TARGET_SIGPWR |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 108 | TARGET_SIGPWR, |
blueswir1 | c72d5bf | 2009-01-15 17:27:45 +0000 | [diff] [blame] | 109 | #else |
| 110 | -1, |
| 111 | #endif |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 112 | -1, /* SIGPOLL */ |
| 113 | -1, |
| 114 | -1, |
| 115 | -1, |
| 116 | -1, |
| 117 | -1, |
| 118 | -1, |
| 119 | -1, |
| 120 | -1, |
| 121 | -1, |
| 122 | -1, |
| 123 | -1, |
blueswir1 | c72d5bf | 2009-01-15 17:27:45 +0000 | [diff] [blame] | 124 | #ifdef __SIGRTMIN |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 125 | __SIGRTMIN + 1, |
| 126 | __SIGRTMIN + 2, |
| 127 | __SIGRTMIN + 3, |
| 128 | __SIGRTMIN + 4, |
| 129 | __SIGRTMIN + 5, |
| 130 | __SIGRTMIN + 6, |
| 131 | __SIGRTMIN + 7, |
| 132 | __SIGRTMIN + 8, |
| 133 | __SIGRTMIN + 9, |
| 134 | __SIGRTMIN + 10, |
| 135 | __SIGRTMIN + 11, |
| 136 | __SIGRTMIN + 12, |
| 137 | __SIGRTMIN + 13, |
| 138 | __SIGRTMIN + 14, |
| 139 | __SIGRTMIN + 15, |
| 140 | __SIGRTMIN + 16, |
| 141 | __SIGRTMIN + 17, |
| 142 | __SIGRTMIN + 18, |
| 143 | __SIGRTMIN + 19, |
| 144 | __SIGRTMIN + 20, |
| 145 | __SIGRTMIN + 21, |
| 146 | __SIGRTMIN + 22, |
| 147 | __SIGRTMIN + 23, |
| 148 | __SIGRTMIN + 24, |
| 149 | __SIGRTMIN + 25, |
| 150 | __SIGRTMIN + 26, |
| 151 | __SIGRTMIN + 27, |
| 152 | __SIGRTMIN + 28, |
| 153 | __SIGRTMIN + 29, |
| 154 | __SIGRTMIN + 30, |
| 155 | __SIGRTMIN + 31, |
| 156 | -1, /* SIGCANCEL */ |
| 157 | __SIGRTMIN, |
| 158 | __SIGRTMIN + 32, |
| 159 | __SIGRTMIN + 33, |
| 160 | __SIGRTMIN + 34, |
| 161 | __SIGRTMIN + 35, |
| 162 | __SIGRTMIN + 36, |
| 163 | __SIGRTMIN + 37, |
| 164 | __SIGRTMIN + 38, |
| 165 | __SIGRTMIN + 39, |
| 166 | __SIGRTMIN + 40, |
| 167 | __SIGRTMIN + 41, |
| 168 | __SIGRTMIN + 42, |
| 169 | __SIGRTMIN + 43, |
| 170 | __SIGRTMIN + 44, |
| 171 | __SIGRTMIN + 45, |
| 172 | __SIGRTMIN + 46, |
| 173 | __SIGRTMIN + 47, |
| 174 | __SIGRTMIN + 48, |
| 175 | __SIGRTMIN + 49, |
| 176 | __SIGRTMIN + 50, |
| 177 | __SIGRTMIN + 51, |
| 178 | __SIGRTMIN + 52, |
| 179 | __SIGRTMIN + 53, |
| 180 | __SIGRTMIN + 54, |
| 181 | __SIGRTMIN + 55, |
| 182 | __SIGRTMIN + 56, |
| 183 | __SIGRTMIN + 57, |
| 184 | __SIGRTMIN + 58, |
| 185 | __SIGRTMIN + 59, |
| 186 | __SIGRTMIN + 60, |
| 187 | __SIGRTMIN + 61, |
| 188 | __SIGRTMIN + 62, |
| 189 | __SIGRTMIN + 63, |
| 190 | __SIGRTMIN + 64, |
| 191 | __SIGRTMIN + 65, |
| 192 | __SIGRTMIN + 66, |
| 193 | __SIGRTMIN + 67, |
| 194 | __SIGRTMIN + 68, |
| 195 | __SIGRTMIN + 69, |
| 196 | __SIGRTMIN + 70, |
| 197 | __SIGRTMIN + 71, |
| 198 | __SIGRTMIN + 72, |
| 199 | __SIGRTMIN + 73, |
| 200 | __SIGRTMIN + 74, |
| 201 | __SIGRTMIN + 75, |
| 202 | __SIGRTMIN + 76, |
| 203 | __SIGRTMIN + 77, |
| 204 | __SIGRTMIN + 78, |
| 205 | __SIGRTMIN + 79, |
| 206 | __SIGRTMIN + 80, |
| 207 | __SIGRTMIN + 81, |
| 208 | __SIGRTMIN + 82, |
| 209 | __SIGRTMIN + 83, |
| 210 | __SIGRTMIN + 84, |
| 211 | __SIGRTMIN + 85, |
| 212 | __SIGRTMIN + 86, |
| 213 | __SIGRTMIN + 87, |
| 214 | __SIGRTMIN + 88, |
| 215 | __SIGRTMIN + 89, |
| 216 | __SIGRTMIN + 90, |
| 217 | __SIGRTMIN + 91, |
| 218 | __SIGRTMIN + 92, |
| 219 | __SIGRTMIN + 93, |
| 220 | __SIGRTMIN + 94, |
| 221 | __SIGRTMIN + 95, |
| 222 | -1, /* SIGINFO */ |
| 223 | -1, /* UNKNOWN */ |
| 224 | -1, /* DEFAULT */ |
| 225 | -1, |
| 226 | -1, |
| 227 | -1, |
| 228 | -1, |
| 229 | -1, |
| 230 | -1 |
blueswir1 | c72d5bf | 2009-01-15 17:27:45 +0000 | [diff] [blame] | 231 | #endif |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 232 | }; |
bellard | 8f447cc | 2006-06-14 15:21:14 +0000 | [diff] [blame] | 233 | #else |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 234 | /* In system mode we only need SIGINT and SIGTRAP; other signals |
| 235 | are not yet supported. */ |
| 236 | |
| 237 | enum { |
| 238 | TARGET_SIGINT = 2, |
| 239 | TARGET_SIGTRAP = 5 |
| 240 | }; |
| 241 | |
| 242 | static int gdb_signal_table[] = { |
| 243 | -1, |
| 244 | -1, |
| 245 | TARGET_SIGINT, |
| 246 | -1, |
| 247 | -1, |
| 248 | TARGET_SIGTRAP |
| 249 | }; |
bellard | 8f447cc | 2006-06-14 15:21:14 +0000 | [diff] [blame] | 250 | #endif |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 251 | |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 252 | #ifdef CONFIG_USER_ONLY |
| 253 | static int target_signal_to_gdb (int sig) |
| 254 | { |
| 255 | int i; |
| 256 | for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++) |
| 257 | if (gdb_signal_table[i] == sig) |
| 258 | return i; |
| 259 | return GDB_SIGNAL_UNKNOWN; |
| 260 | } |
| 261 | #endif |
| 262 | |
| 263 | static int gdb_signal_to_target (int sig) |
| 264 | { |
| 265 | if (sig < ARRAY_SIZE (gdb_signal_table)) |
| 266 | return gdb_signal_table[sig]; |
| 267 | else |
| 268 | return -1; |
| 269 | } |
| 270 | |
bellard | 4abe615 | 2003-07-26 18:01:58 +0000 | [diff] [blame] | 271 | //#define DEBUG_GDB |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 272 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 273 | typedef struct GDBRegisterState { |
| 274 | int base_reg; |
| 275 | int num_regs; |
| 276 | gdb_reg_cb get_reg; |
| 277 | gdb_reg_cb set_reg; |
| 278 | const char *xml; |
| 279 | struct GDBRegisterState *next; |
| 280 | } GDBRegisterState; |
| 281 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 282 | enum RSState { |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 283 | RS_INACTIVE, |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 284 | RS_IDLE, |
| 285 | RS_GETLINE, |
| 286 | RS_CHKSUM1, |
| 287 | RS_CHKSUM2, |
| 288 | }; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 289 | typedef struct GDBState { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 290 | CPUArchState *c_cpu; /* current CPU for step/continue ops */ |
| 291 | CPUArchState *g_cpu; /* current CPU for other ops */ |
| 292 | CPUArchState *query_cpu; /* for q{f|s}ThreadInfo */ |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 293 | enum RSState state; /* parsing state */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 294 | char line_buf[MAX_PACKET_LENGTH]; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 295 | int line_buf_index; |
| 296 | int line_csum; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 297 | uint8_t last_packet[MAX_PACKET_LENGTH + 4]; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 298 | int last_packet_len; |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 299 | int signal; |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 300 | #ifdef CONFIG_USER_ONLY |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 301 | int fd; |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 302 | int running_state; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 303 | #else |
| 304 | CharDriverState *chr; |
aliguori | 8a34a0f | 2009-03-05 23:01:55 +0000 | [diff] [blame] | 305 | CharDriverState *mon_chr; |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 306 | #endif |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 307 | char syscall_buf[256]; |
| 308 | gdb_syscall_complete_cb current_syscall_cb; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 309 | } GDBState; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 310 | |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 311 | /* By default use no IRQs and no timers while single stepping so as to |
| 312 | * make single stepping like an ICE HW step. |
| 313 | */ |
| 314 | static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; |
| 315 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 316 | static GDBState *gdbserver_state; |
| 317 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 318 | /* This is an ugly hack to cope with both new and old gdb. |
| 319 | If gdb sends qXfer:features:read then assume we're talking to a newish |
| 320 | gdb that understands target descriptions. */ |
| 321 | static int gdb_has_xml; |
| 322 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 323 | #ifdef CONFIG_USER_ONLY |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 324 | /* XXX: This is not thread safe. Do we care? */ |
| 325 | static int gdbserver_fd = -1; |
| 326 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 327 | static int get_char(GDBState *s) |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 328 | { |
| 329 | uint8_t ch; |
| 330 | int ret; |
| 331 | |
| 332 | for(;;) { |
Blue Swirl | 00aa004 | 2011-07-23 20:04:29 +0000 | [diff] [blame] | 333 | ret = qemu_recv(s->fd, &ch, 1, 0); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 334 | if (ret < 0) { |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 335 | if (errno == ECONNRESET) |
| 336 | s->fd = -1; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 337 | if (errno != EINTR && errno != EAGAIN) |
| 338 | return -1; |
| 339 | } else if (ret == 0) { |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 340 | close(s->fd); |
| 341 | s->fd = -1; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 342 | return -1; |
| 343 | } else { |
| 344 | break; |
| 345 | } |
| 346 | } |
| 347 | return ch; |
| 348 | } |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 349 | #endif |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 350 | |
blueswir1 | 654efcf | 2009-04-18 07:29:59 +0000 | [diff] [blame] | 351 | static enum { |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 352 | GDB_SYS_UNKNOWN, |
| 353 | GDB_SYS_ENABLED, |
| 354 | GDB_SYS_DISABLED, |
| 355 | } gdb_syscall_mode; |
| 356 | |
| 357 | /* If gdb is connected when the first semihosting syscall occurs then use |
| 358 | remote gdb syscalls. Otherwise use native file IO. */ |
| 359 | int use_gdb_syscalls(void) |
| 360 | { |
| 361 | if (gdb_syscall_mode == GDB_SYS_UNKNOWN) { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 362 | gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED |
| 363 | : GDB_SYS_DISABLED); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 364 | } |
| 365 | return gdb_syscall_mode == GDB_SYS_ENABLED; |
| 366 | } |
| 367 | |
edgar_igl | ba70a62 | 2008-03-14 06:10:42 +0000 | [diff] [blame] | 368 | /* Resume execution. */ |
| 369 | static inline void gdb_continue(GDBState *s) |
| 370 | { |
| 371 | #ifdef CONFIG_USER_ONLY |
| 372 | s->running_state = 1; |
| 373 | #else |
| 374 | vm_start(); |
| 375 | #endif |
| 376 | } |
| 377 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 378 | static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 379 | { |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 380 | #ifdef CONFIG_USER_ONLY |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 381 | int ret; |
| 382 | |
| 383 | while (len > 0) { |
bellard | 8f447cc | 2006-06-14 15:21:14 +0000 | [diff] [blame] | 384 | ret = send(s->fd, buf, len, 0); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 385 | if (ret < 0) { |
| 386 | if (errno != EINTR && errno != EAGAIN) |
| 387 | return; |
| 388 | } else { |
| 389 | buf += ret; |
| 390 | len -= ret; |
| 391 | } |
| 392 | } |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 393 | #else |
Anthony Liguori | 2cc6e0a | 2011-08-15 11:17:28 -0500 | [diff] [blame] | 394 | qemu_chr_fe_write(s->chr, buf, len); |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 395 | #endif |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 396 | } |
| 397 | |
| 398 | static inline int fromhex(int v) |
| 399 | { |
| 400 | if (v >= '0' && v <= '9') |
| 401 | return v - '0'; |
| 402 | else if (v >= 'A' && v <= 'F') |
| 403 | return v - 'A' + 10; |
| 404 | else if (v >= 'a' && v <= 'f') |
| 405 | return v - 'a' + 10; |
| 406 | else |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | static inline int tohex(int v) |
| 411 | { |
| 412 | if (v < 10) |
| 413 | return v + '0'; |
| 414 | else |
| 415 | return v - 10 + 'a'; |
| 416 | } |
| 417 | |
| 418 | static void memtohex(char *buf, const uint8_t *mem, int len) |
| 419 | { |
| 420 | int i, c; |
| 421 | char *q; |
| 422 | q = buf; |
| 423 | for(i = 0; i < len; i++) { |
| 424 | c = mem[i]; |
| 425 | *q++ = tohex(c >> 4); |
| 426 | *q++ = tohex(c & 0xf); |
| 427 | } |
| 428 | *q = '\0'; |
| 429 | } |
| 430 | |
| 431 | static void hextomem(uint8_t *mem, const char *buf, int len) |
| 432 | { |
| 433 | int i; |
| 434 | |
| 435 | for(i = 0; i < len; i++) { |
| 436 | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); |
| 437 | buf += 2; |
| 438 | } |
| 439 | } |
| 440 | |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 441 | /* return -1 if error, 0 if OK */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 442 | static int put_packet_binary(GDBState *s, const char *buf, int len) |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 443 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 444 | int csum, i; |
ths | 60fe76f | 2007-12-16 03:02:09 +0000 | [diff] [blame] | 445 | uint8_t *p; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 446 | |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 447 | for(;;) { |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 448 | p = s->last_packet; |
| 449 | *(p++) = '$'; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 450 | memcpy(p, buf, len); |
| 451 | p += len; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 452 | csum = 0; |
| 453 | for(i = 0; i < len; i++) { |
| 454 | csum += buf[i]; |
| 455 | } |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 456 | *(p++) = '#'; |
| 457 | *(p++) = tohex((csum >> 4) & 0xf); |
| 458 | *(p++) = tohex((csum) & 0xf); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 459 | |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 460 | s->last_packet_len = p - s->last_packet; |
ths | ffe8ab8 | 2007-12-16 03:16:05 +0000 | [diff] [blame] | 461 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 462 | |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 463 | #ifdef CONFIG_USER_ONLY |
| 464 | i = get_char(s); |
| 465 | if (i < 0) |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 466 | return -1; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 467 | if (i == '+') |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 468 | break; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 469 | #else |
| 470 | break; |
| 471 | #endif |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 472 | } |
| 473 | return 0; |
| 474 | } |
| 475 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 476 | /* return -1 if error, 0 if OK */ |
| 477 | static int put_packet(GDBState *s, const char *buf) |
| 478 | { |
| 479 | #ifdef DEBUG_GDB |
| 480 | printf("reply='%s'\n", buf); |
| 481 | #endif |
| 482 | |
| 483 | return put_packet_binary(s, buf, strlen(buf)); |
| 484 | } |
| 485 | |
| 486 | /* The GDB remote protocol transfers values in target byte order. This means |
| 487 | we can use the raw memory access routines to access the value buffer. |
| 488 | Conveniently, these also handle the case where the buffer is mis-aligned. |
| 489 | */ |
| 490 | #define GET_REG8(val) do { \ |
| 491 | stb_p(mem_buf, val); \ |
| 492 | return 1; \ |
| 493 | } while(0) |
| 494 | #define GET_REG16(val) do { \ |
| 495 | stw_p(mem_buf, val); \ |
| 496 | return 2; \ |
| 497 | } while(0) |
| 498 | #define GET_REG32(val) do { \ |
| 499 | stl_p(mem_buf, val); \ |
| 500 | return 4; \ |
| 501 | } while(0) |
| 502 | #define GET_REG64(val) do { \ |
| 503 | stq_p(mem_buf, val); \ |
| 504 | return 8; \ |
| 505 | } while(0) |
| 506 | |
| 507 | #if TARGET_LONG_BITS == 64 |
| 508 | #define GET_REGL(val) GET_REG64(val) |
| 509 | #define ldtul_p(addr) ldq_p(addr) |
| 510 | #else |
| 511 | #define GET_REGL(val) GET_REG32(val) |
| 512 | #define ldtul_p(addr) ldl_p(addr) |
| 513 | #endif |
| 514 | |
edgar_igl | fde3fd6 | 2008-05-09 08:50:01 +0000 | [diff] [blame] | 515 | #if defined(TARGET_I386) |
balrog | 5ad265e | 2007-10-31 00:21:35 +0000 | [diff] [blame] | 516 | |
| 517 | #ifdef TARGET_X86_64 |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 518 | static const int gpr_map[16] = { |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 519 | R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 520 | 8, 9, 10, 11, 12, 13, 14, 15 |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 521 | }; |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 522 | #else |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 523 | #define gpr_map gpr_map32 |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 524 | #endif |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 525 | static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 526 | |
| 527 | #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25) |
| 528 | |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 529 | #define IDX_IP_REG CPU_NB_REGS |
| 530 | #define IDX_FLAGS_REG (IDX_IP_REG + 1) |
| 531 | #define IDX_SEG_REGS (IDX_FLAGS_REG + 1) |
| 532 | #define IDX_FP_REGS (IDX_SEG_REGS + 6) |
| 533 | #define IDX_XMM_REGS (IDX_FP_REGS + 16) |
| 534 | #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS) |
| 535 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 536 | static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 537 | { |
| 538 | if (n < CPU_NB_REGS) { |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 539 | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
| 540 | GET_REG64(env->regs[gpr_map[n]]); |
| 541 | } else if (n < CPU_NB_REGS32) { |
| 542 | GET_REG32(env->regs[gpr_map32[n]]); |
| 543 | } |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 544 | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 545 | #ifdef USE_X86LDOUBLE |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 546 | /* FIXME: byteswap float values - after fixing fpregs layout. */ |
| 547 | memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 548 | #else |
| 549 | memset(mem_buf, 0, 10); |
| 550 | #endif |
| 551 | return 10; |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 552 | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
| 553 | n -= IDX_XMM_REGS; |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 554 | if (n < CPU_NB_REGS32 || |
| 555 | (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) { |
| 556 | stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0)); |
| 557 | stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1)); |
| 558 | return 16; |
| 559 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 560 | } else { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 561 | switch (n) { |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 562 | case IDX_IP_REG: |
| 563 | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
| 564 | GET_REG64(env->eip); |
| 565 | } else { |
| 566 | GET_REG32(env->eip); |
| 567 | } |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 568 | case IDX_FLAGS_REG: GET_REG32(env->eflags); |
| 569 | |
| 570 | case IDX_SEG_REGS: GET_REG32(env->segs[R_CS].selector); |
| 571 | case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector); |
| 572 | case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector); |
| 573 | case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector); |
| 574 | case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector); |
| 575 | case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector); |
| 576 | |
| 577 | case IDX_FP_REGS + 8: GET_REG32(env->fpuc); |
| 578 | case IDX_FP_REGS + 9: GET_REG32((env->fpus & ~0x3800) | |
| 579 | (env->fpstt & 0x7) << 11); |
| 580 | case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */ |
| 581 | case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */ |
| 582 | case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */ |
| 583 | case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */ |
| 584 | case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */ |
| 585 | case IDX_FP_REGS + 15: GET_REG32(0); /* fop */ |
| 586 | |
| 587 | case IDX_MXCSR_REG: GET_REG32(env->mxcsr); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 588 | } |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 589 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 590 | return 0; |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 591 | } |
| 592 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 593 | static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf) |
Jan Kiszka | 8427317 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 594 | { |
| 595 | uint16_t selector = ldl_p(mem_buf); |
| 596 | |
| 597 | if (selector != env->segs[sreg].selector) { |
| 598 | #if defined(CONFIG_USER_ONLY) |
| 599 | cpu_x86_load_seg(env, sreg, selector); |
| 600 | #else |
| 601 | unsigned int limit, flags; |
| 602 | target_ulong base; |
| 603 | |
| 604 | if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) { |
| 605 | base = selector << 4; |
| 606 | limit = 0xffff; |
| 607 | flags = 0; |
| 608 | } else { |
| 609 | if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags)) |
| 610 | return 4; |
| 611 | } |
| 612 | cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags); |
| 613 | #endif |
| 614 | } |
| 615 | return 4; |
| 616 | } |
| 617 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 618 | static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n) |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 619 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 620 | uint32_t tmp; |
| 621 | |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 622 | if (n < CPU_NB_REGS) { |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 623 | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
| 624 | env->regs[gpr_map[n]] = ldtul_p(mem_buf); |
| 625 | return sizeof(target_ulong); |
| 626 | } else if (n < CPU_NB_REGS32) { |
| 627 | n = gpr_map32[n]; |
| 628 | env->regs[n] &= ~0xffffffffUL; |
| 629 | env->regs[n] |= (uint32_t)ldl_p(mem_buf); |
| 630 | return 4; |
| 631 | } |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 632 | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 633 | #ifdef USE_X86LDOUBLE |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 634 | /* FIXME: byteswap float values - after fixing fpregs layout. */ |
| 635 | memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 636 | #endif |
| 637 | return 10; |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 638 | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
| 639 | n -= IDX_XMM_REGS; |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 640 | if (n < CPU_NB_REGS32 || |
| 641 | (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) { |
| 642 | env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf); |
| 643 | env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8); |
| 644 | return 16; |
| 645 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 646 | } else { |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 647 | switch (n) { |
| 648 | case IDX_IP_REG: |
Jan Kiszka | 5f30fa1 | 2009-09-17 18:14:13 +0200 | [diff] [blame] | 649 | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
| 650 | env->eip = ldq_p(mem_buf); |
| 651 | return 8; |
| 652 | } else { |
| 653 | env->eip &= ~0xffffffffUL; |
| 654 | env->eip |= (uint32_t)ldl_p(mem_buf); |
| 655 | return 4; |
| 656 | } |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 657 | case IDX_FLAGS_REG: |
| 658 | env->eflags = ldl_p(mem_buf); |
| 659 | return 4; |
| 660 | |
Jan Kiszka | 8427317 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 661 | case IDX_SEG_REGS: return cpu_x86_gdb_load_seg(env, R_CS, mem_buf); |
| 662 | case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf); |
| 663 | case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf); |
| 664 | case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf); |
| 665 | case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf); |
| 666 | case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf); |
Jan Kiszka | b1631e7 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 667 | |
| 668 | case IDX_FP_REGS + 8: |
| 669 | env->fpuc = ldl_p(mem_buf); |
| 670 | return 4; |
| 671 | case IDX_FP_REGS + 9: |
| 672 | tmp = ldl_p(mem_buf); |
| 673 | env->fpstt = (tmp >> 11) & 7; |
| 674 | env->fpus = tmp & ~0x3800; |
| 675 | return 4; |
| 676 | case IDX_FP_REGS + 10: /* ftag */ return 4; |
| 677 | case IDX_FP_REGS + 11: /* fiseg */ return 4; |
| 678 | case IDX_FP_REGS + 12: /* fioff */ return 4; |
| 679 | case IDX_FP_REGS + 13: /* foseg */ return 4; |
| 680 | case IDX_FP_REGS + 14: /* fooff */ return 4; |
| 681 | case IDX_FP_REGS + 15: /* fop */ return 4; |
| 682 | |
| 683 | case IDX_MXCSR_REG: |
| 684 | env->mxcsr = ldl_p(mem_buf); |
| 685 | return 4; |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 686 | } |
bellard | 7980857 | 2008-05-09 14:40:22 +0000 | [diff] [blame] | 687 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 688 | /* Unrecognised register. */ |
| 689 | return 0; |
bellard | 6da41ea | 2004-01-04 15:48:38 +0000 | [diff] [blame] | 690 | } |
| 691 | |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 692 | #elif defined (TARGET_PPC) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 693 | |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 694 | /* Old gdb always expects FP registers. Newer (xml-aware) gdb only |
| 695 | expects whatever the target description contains. Due to a |
| 696 | historical mishap the FP registers appear in between core integer |
| 697 | regs and PC, MSR, CR, and so forth. We hack round this by giving the |
| 698 | FP regs zero size when talking to a newer gdb. */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 699 | #define NUM_CORE_REGS 71 |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 700 | #if defined (TARGET_PPC64) |
| 701 | #define GDB_CORE_XML "power64-core.xml" |
| 702 | #else |
| 703 | #define GDB_CORE_XML "power-core.xml" |
| 704 | #endif |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 705 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 706 | static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 707 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 708 | if (n < 32) { |
| 709 | /* gprs */ |
| 710 | GET_REGL(env->gpr[n]); |
| 711 | } else if (n < 64) { |
| 712 | /* fprs */ |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 713 | if (gdb_has_xml) |
| 714 | return 0; |
aurel32 | 8d4acf9 | 2008-11-30 16:23:18 +0000 | [diff] [blame] | 715 | stfq_p(mem_buf, env->fpr[n-32]); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 716 | return 8; |
| 717 | } else { |
| 718 | switch (n) { |
| 719 | case 64: GET_REGL(env->nip); |
| 720 | case 65: GET_REGL(env->msr); |
| 721 | case 66: |
| 722 | { |
| 723 | uint32_t cr = 0; |
| 724 | int i; |
| 725 | for (i = 0; i < 8; i++) |
| 726 | cr |= env->crf[i] << (32 - ((i + 1) * 4)); |
| 727 | GET_REG32(cr); |
| 728 | } |
| 729 | case 67: GET_REGL(env->lr); |
| 730 | case 68: GET_REGL(env->ctr); |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 731 | case 69: GET_REGL(env->xer); |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 732 | case 70: |
| 733 | { |
| 734 | if (gdb_has_xml) |
| 735 | return 0; |
Fabien Chouteau | 5a576fb | 2011-09-01 04:56:00 +0000 | [diff] [blame] | 736 | GET_REG32(env->fpscr); |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 737 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 738 | } |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 739 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 740 | return 0; |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 741 | } |
| 742 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 743 | static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n) |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 744 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 745 | if (n < 32) { |
| 746 | /* gprs */ |
| 747 | env->gpr[n] = ldtul_p(mem_buf); |
| 748 | return sizeof(target_ulong); |
| 749 | } else if (n < 64) { |
| 750 | /* fprs */ |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 751 | if (gdb_has_xml) |
| 752 | return 0; |
aurel32 | 8d4acf9 | 2008-11-30 16:23:18 +0000 | [diff] [blame] | 753 | env->fpr[n-32] = ldfq_p(mem_buf); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 754 | return 8; |
| 755 | } else { |
| 756 | switch (n) { |
| 757 | case 64: |
| 758 | env->nip = ldtul_p(mem_buf); |
| 759 | return sizeof(target_ulong); |
| 760 | case 65: |
| 761 | ppc_store_msr(env, ldtul_p(mem_buf)); |
| 762 | return sizeof(target_ulong); |
| 763 | case 66: |
| 764 | { |
| 765 | uint32_t cr = ldl_p(mem_buf); |
| 766 | int i; |
| 767 | for (i = 0; i < 8; i++) |
| 768 | env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF; |
| 769 | return 4; |
| 770 | } |
| 771 | case 67: |
| 772 | env->lr = ldtul_p(mem_buf); |
| 773 | return sizeof(target_ulong); |
| 774 | case 68: |
| 775 | env->ctr = ldtul_p(mem_buf); |
| 776 | return sizeof(target_ulong); |
| 777 | case 69: |
aurel32 | 3d7b417 | 2008-10-21 11:28:46 +0000 | [diff] [blame] | 778 | env->xer = ldtul_p(mem_buf); |
| 779 | return sizeof(target_ulong); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 780 | case 70: |
| 781 | /* fpscr */ |
aurel32 | e571cb4 | 2009-01-24 15:07:42 +0000 | [diff] [blame] | 782 | if (gdb_has_xml) |
| 783 | return 0; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 784 | return 4; |
| 785 | } |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 786 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 787 | return 0; |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 788 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 789 | |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 790 | #elif defined (TARGET_SPARC) |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 791 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 792 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
| 793 | #define NUM_CORE_REGS 86 |
| 794 | #else |
blueswir1 | 5a37791 | 2009-01-13 16:28:01 +0000 | [diff] [blame] | 795 | #define NUM_CORE_REGS 72 |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 796 | #endif |
| 797 | |
| 798 | #ifdef TARGET_ABI32 |
| 799 | #define GET_REGA(val) GET_REG32(val) |
| 800 | #else |
| 801 | #define GET_REGA(val) GET_REGL(val) |
| 802 | #endif |
| 803 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 804 | static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 805 | { |
| 806 | if (n < 8) { |
| 807 | /* g0..g7 */ |
| 808 | GET_REGA(env->gregs[n]); |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 809 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 810 | if (n < 32) { |
| 811 | /* register window */ |
| 812 | GET_REGA(env->regwptr[n - 8]); |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 813 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 814 | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) |
| 815 | if (n < 64) { |
| 816 | /* fprs */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 817 | if (n & 1) { |
| 818 | GET_REG32(env->fpr[(n - 32) / 2].l.lower); |
| 819 | } else { |
| 820 | GET_REG32(env->fpr[(n - 32) / 2].l.upper); |
| 821 | } |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 822 | } |
| 823 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 824 | switch (n) { |
| 825 | case 64: GET_REGA(env->y); |
Blue Swirl | 5a834bb | 2010-05-09 20:19:04 +0000 | [diff] [blame] | 826 | case 65: GET_REGA(cpu_get_psr(env)); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 827 | case 66: GET_REGA(env->wim); |
| 828 | case 67: GET_REGA(env->tbr); |
| 829 | case 68: GET_REGA(env->pc); |
| 830 | case 69: GET_REGA(env->npc); |
| 831 | case 70: GET_REGA(env->fsr); |
| 832 | case 71: GET_REGA(0); /* csr */ |
blueswir1 | 5a37791 | 2009-01-13 16:28:01 +0000 | [diff] [blame] | 833 | default: GET_REGA(0); |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 834 | } |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 835 | #else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 836 | if (n < 64) { |
| 837 | /* f0-f31 */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 838 | if (n & 1) { |
| 839 | GET_REG32(env->fpr[(n - 32) / 2].l.lower); |
| 840 | } else { |
| 841 | GET_REG32(env->fpr[(n - 32) / 2].l.upper); |
| 842 | } |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 843 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 844 | if (n < 80) { |
| 845 | /* f32-f62 (double width, even numbers only) */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 846 | GET_REG64(env->fpr[(n - 32) / 2].ll); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 847 | } |
| 848 | switch (n) { |
| 849 | case 80: GET_REGL(env->pc); |
| 850 | case 81: GET_REGL(env->npc); |
Blue Swirl | 5a834bb | 2010-05-09 20:19:04 +0000 | [diff] [blame] | 851 | case 82: GET_REGL((cpu_get_ccr(env) << 32) | |
| 852 | ((env->asi & 0xff) << 24) | |
| 853 | ((env->pstate & 0xfff) << 8) | |
| 854 | cpu_get_cwp64(env)); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 855 | case 83: GET_REGL(env->fsr); |
| 856 | case 84: GET_REGL(env->fprs); |
| 857 | case 85: GET_REGL(env->y); |
| 858 | } |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 859 | #endif |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 860 | return 0; |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 861 | } |
| 862 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 863 | static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n) |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 864 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 865 | #if defined(TARGET_ABI32) |
| 866 | abi_ulong tmp; |
| 867 | |
| 868 | tmp = ldl_p(mem_buf); |
blueswir1 | 96d1912 | 2008-06-07 08:03:05 +0000 | [diff] [blame] | 869 | #else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 870 | target_ulong tmp; |
| 871 | |
| 872 | tmp = ldtul_p(mem_buf); |
blueswir1 | 96d1912 | 2008-06-07 08:03:05 +0000 | [diff] [blame] | 873 | #endif |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 874 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 875 | if (n < 8) { |
| 876 | /* g0..g7 */ |
| 877 | env->gregs[n] = tmp; |
| 878 | } else if (n < 32) { |
| 879 | /* register window */ |
| 880 | env->regwptr[n - 8] = tmp; |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 881 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 882 | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) |
| 883 | else if (n < 64) { |
| 884 | /* fprs */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 885 | /* f0-f31 */ |
| 886 | if (n & 1) { |
| 887 | env->fpr[(n - 32) / 2].l.lower = tmp; |
| 888 | } else { |
| 889 | env->fpr[(n - 32) / 2].l.upper = tmp; |
| 890 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 891 | } else { |
| 892 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ |
| 893 | switch (n) { |
| 894 | case 64: env->y = tmp; break; |
Blue Swirl | 5a834bb | 2010-05-09 20:19:04 +0000 | [diff] [blame] | 895 | case 65: cpu_put_psr(env, tmp); break; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 896 | case 66: env->wim = tmp; break; |
| 897 | case 67: env->tbr = tmp; break; |
| 898 | case 68: env->pc = tmp; break; |
| 899 | case 69: env->npc = tmp; break; |
| 900 | case 70: env->fsr = tmp; break; |
| 901 | default: return 0; |
| 902 | } |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 903 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 904 | return 4; |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 905 | #else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 906 | else if (n < 64) { |
| 907 | /* f0-f31 */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 908 | tmp = ldl_p(mem_buf); |
| 909 | if (n & 1) { |
| 910 | env->fpr[(n - 32) / 2].l.lower = tmp; |
| 911 | } else { |
| 912 | env->fpr[(n - 32) / 2].l.upper = tmp; |
| 913 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 914 | return 4; |
| 915 | } else if (n < 80) { |
| 916 | /* f32-f62 (double width, even numbers only) */ |
Richard Henderson | 30038fd | 2011-10-17 10:42:49 -0700 | [diff] [blame] | 917 | env->fpr[(n - 32) / 2].ll = tmp; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 918 | } else { |
| 919 | switch (n) { |
| 920 | case 80: env->pc = tmp; break; |
| 921 | case 81: env->npc = tmp; break; |
| 922 | case 82: |
Blue Swirl | 5a834bb | 2010-05-09 20:19:04 +0000 | [diff] [blame] | 923 | cpu_put_ccr(env, tmp >> 32); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 924 | env->asi = (tmp >> 24) & 0xff; |
| 925 | env->pstate = (tmp >> 8) & 0xfff; |
Blue Swirl | 5a834bb | 2010-05-09 20:19:04 +0000 | [diff] [blame] | 926 | cpu_put_cwp64(env, tmp & 0xff); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 927 | break; |
| 928 | case 83: env->fsr = tmp; break; |
| 929 | case 84: env->fprs = tmp; break; |
| 930 | case 85: env->y = tmp; break; |
| 931 | default: return 0; |
| 932 | } |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 933 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 934 | return 8; |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 935 | #endif |
bellard | 9e62fd7 | 2004-01-05 22:49:06 +0000 | [diff] [blame] | 936 | } |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 937 | #elif defined (TARGET_ARM) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 938 | |
| 939 | /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect |
| 940 | whatever the target description contains. Due to a historical mishap |
| 941 | the FPA registers appear in between core integer regs and the CPSR. |
| 942 | We hack round this by giving the FPA regs zero size when talking to a |
| 943 | newer gdb. */ |
| 944 | #define NUM_CORE_REGS 26 |
| 945 | #define GDB_CORE_XML "arm-core.xml" |
| 946 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 947 | static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 948 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 949 | if (n < 16) { |
| 950 | /* Core integer register. */ |
| 951 | GET_REG32(env->regs[n]); |
| 952 | } |
| 953 | if (n < 24) { |
| 954 | /* FPA registers. */ |
| 955 | if (gdb_has_xml) |
| 956 | return 0; |
| 957 | memset(mem_buf, 0, 12); |
| 958 | return 12; |
| 959 | } |
| 960 | switch (n) { |
| 961 | case 24: |
| 962 | /* FPA status register. */ |
| 963 | if (gdb_has_xml) |
| 964 | return 0; |
| 965 | GET_REG32(0); |
| 966 | case 25: |
| 967 | /* CPSR */ |
| 968 | GET_REG32(cpsr_read(env)); |
| 969 | } |
| 970 | /* Unknown register. */ |
| 971 | return 0; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 972 | } |
| 973 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 974 | static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 975 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 976 | uint32_t tmp; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 977 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 978 | tmp = ldl_p(mem_buf); |
| 979 | |
| 980 | /* Mask out low bit of PC to workaround gdb bugs. This will probably |
| 981 | cause problems if we ever implement the Jazelle DBX extensions. */ |
| 982 | if (n == 15) |
| 983 | tmp &= ~1; |
| 984 | |
| 985 | if (n < 16) { |
| 986 | /* Core integer register. */ |
| 987 | env->regs[n] = tmp; |
| 988 | return 4; |
| 989 | } |
| 990 | if (n < 24) { /* 16-23 */ |
| 991 | /* FPA registers (ignored). */ |
| 992 | if (gdb_has_xml) |
| 993 | return 0; |
| 994 | return 12; |
| 995 | } |
| 996 | switch (n) { |
| 997 | case 24: |
| 998 | /* FPA status register (ignored). */ |
| 999 | if (gdb_has_xml) |
| 1000 | return 0; |
| 1001 | return 4; |
| 1002 | case 25: |
| 1003 | /* CPSR */ |
| 1004 | cpsr_write (env, tmp, 0xffffffff); |
| 1005 | return 4; |
| 1006 | } |
| 1007 | /* Unknown register. */ |
| 1008 | return 0; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 1009 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1010 | |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1011 | #elif defined (TARGET_M68K) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1012 | |
| 1013 | #define NUM_CORE_REGS 18 |
| 1014 | |
| 1015 | #define GDB_CORE_XML "cf-core.xml" |
| 1016 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1017 | static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n) |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1018 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1019 | if (n < 8) { |
| 1020 | /* D0-D7 */ |
| 1021 | GET_REG32(env->dregs[n]); |
| 1022 | } else if (n < 16) { |
| 1023 | /* A0-A7 */ |
| 1024 | GET_REG32(env->aregs[n - 8]); |
| 1025 | } else { |
| 1026 | switch (n) { |
| 1027 | case 16: GET_REG32(env->sr); |
| 1028 | case 17: GET_REG32(env->pc); |
| 1029 | } |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1030 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1031 | /* FP registers not included here because they vary between |
| 1032 | ColdFire and m68k. Use XML bits for these. */ |
| 1033 | return 0; |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1034 | } |
| 1035 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1036 | static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n) |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1037 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1038 | uint32_t tmp; |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1039 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1040 | tmp = ldl_p(mem_buf); |
| 1041 | |
| 1042 | if (n < 8) { |
| 1043 | /* D0-D7 */ |
| 1044 | env->dregs[n] = tmp; |
Kazu Hirata | b3d6b95 | 2010-01-14 09:08:00 -0800 | [diff] [blame] | 1045 | } else if (n < 16) { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1046 | /* A0-A7 */ |
| 1047 | env->aregs[n - 8] = tmp; |
| 1048 | } else { |
| 1049 | switch (n) { |
| 1050 | case 16: env->sr = tmp; break; |
| 1051 | case 17: env->pc = tmp; break; |
| 1052 | default: return 0; |
| 1053 | } |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1054 | } |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1055 | return 4; |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 1056 | } |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1057 | #elif defined (TARGET_MIPS) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1058 | |
| 1059 | #define NUM_CORE_REGS 73 |
| 1060 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1061 | static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n) |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1062 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1063 | if (n < 32) { |
| 1064 | GET_REGL(env->active_tc.gpr[n]); |
| 1065 | } |
| 1066 | if (env->CP0_Config1 & (1 << CP0C1_FP)) { |
| 1067 | if (n >= 38 && n < 70) { |
ths | 7ac256b | 2007-10-25 21:30:37 +0000 | [diff] [blame] | 1068 | if (env->CP0_Status & (1 << CP0St_FR)) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1069 | GET_REGL(env->active_fpu.fpr[n - 38].d); |
ths | 7ac256b | 2007-10-25 21:30:37 +0000 | [diff] [blame] | 1070 | else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1071 | GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); |
| 1072 | } |
| 1073 | switch (n) { |
| 1074 | case 70: GET_REGL((int32_t)env->active_fpu.fcr31); |
| 1075 | case 71: GET_REGL((int32_t)env->active_fpu.fcr0); |
| 1076 | } |
| 1077 | } |
| 1078 | switch (n) { |
| 1079 | case 32: GET_REGL((int32_t)env->CP0_Status); |
| 1080 | case 33: GET_REGL(env->active_tc.LO[0]); |
| 1081 | case 34: GET_REGL(env->active_tc.HI[0]); |
| 1082 | case 35: GET_REGL(env->CP0_BadVAddr); |
| 1083 | case 36: GET_REGL((int32_t)env->CP0_Cause); |
Nathan Froyd | ff1d197 | 2009-12-08 08:06:30 -0800 | [diff] [blame] | 1084 | case 37: GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16)); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1085 | case 72: GET_REGL(0); /* fp */ |
| 1086 | case 89: GET_REGL((int32_t)env->CP0_PRid); |
| 1087 | } |
| 1088 | if (n >= 73 && n <= 88) { |
| 1089 | /* 16 embedded regs. */ |
| 1090 | GET_REGL(0); |
| 1091 | } |
ths | 36d2395 | 2007-02-28 22:37:42 +0000 | [diff] [blame] | 1092 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1093 | return 0; |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1094 | } |
| 1095 | |
ths | 8e33c08 | 2006-12-11 19:22:27 +0000 | [diff] [blame] | 1096 | /* convert MIPS rounding mode in FCR31 to IEEE library */ |
| 1097 | static unsigned int ieee_rm[] = |
| 1098 | { |
| 1099 | float_round_nearest_even, |
| 1100 | float_round_to_zero, |
| 1101 | float_round_up, |
| 1102 | float_round_down |
| 1103 | }; |
| 1104 | #define RESTORE_ROUNDING_MODE \ |
ths | f01be15 | 2008-09-18 11:57:27 +0000 | [diff] [blame] | 1105 | set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status) |
ths | 8e33c08 | 2006-12-11 19:22:27 +0000 | [diff] [blame] | 1106 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1107 | static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n) |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1108 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1109 | target_ulong tmp; |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1110 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1111 | tmp = ldtul_p(mem_buf); |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1112 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1113 | if (n < 32) { |
| 1114 | env->active_tc.gpr[n] = tmp; |
| 1115 | return sizeof(target_ulong); |
| 1116 | } |
| 1117 | if (env->CP0_Config1 & (1 << CP0C1_FP) |
| 1118 | && n >= 38 && n < 73) { |
| 1119 | if (n < 70) { |
ths | 7ac256b | 2007-10-25 21:30:37 +0000 | [diff] [blame] | 1120 | if (env->CP0_Status & (1 << CP0St_FR)) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1121 | env->active_fpu.fpr[n - 38].d = tmp; |
ths | 7ac256b | 2007-10-25 21:30:37 +0000 | [diff] [blame] | 1122 | else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1123 | env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp; |
| 1124 | } |
| 1125 | switch (n) { |
| 1126 | case 70: |
| 1127 | env->active_fpu.fcr31 = tmp & 0xFF83FFFF; |
| 1128 | /* set rounding mode */ |
| 1129 | RESTORE_ROUNDING_MODE; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1130 | break; |
| 1131 | case 71: env->active_fpu.fcr0 = tmp; break; |
| 1132 | } |
| 1133 | return sizeof(target_ulong); |
| 1134 | } |
| 1135 | switch (n) { |
| 1136 | case 32: env->CP0_Status = tmp; break; |
| 1137 | case 33: env->active_tc.LO[0] = tmp; break; |
| 1138 | case 34: env->active_tc.HI[0] = tmp; break; |
| 1139 | case 35: env->CP0_BadVAddr = tmp; break; |
| 1140 | case 36: env->CP0_Cause = tmp; break; |
Nathan Froyd | ff1d197 | 2009-12-08 08:06:30 -0800 | [diff] [blame] | 1141 | case 37: |
| 1142 | env->active_tc.PC = tmp & ~(target_ulong)1; |
| 1143 | if (tmp & 1) { |
| 1144 | env->hflags |= MIPS_HFLAG_M16; |
| 1145 | } else { |
| 1146 | env->hflags &= ~(MIPS_HFLAG_M16); |
| 1147 | } |
| 1148 | break; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1149 | case 72: /* fp, ignored */ break; |
| 1150 | default: |
| 1151 | if (n > 89) |
| 1152 | return 0; |
| 1153 | /* Other registers are readonly. Ignore writes. */ |
| 1154 | break; |
| 1155 | } |
| 1156 | |
| 1157 | return sizeof(target_ulong); |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 1158 | } |
Jia Liu | fc04355 | 2012-07-20 15:50:50 +0800 | [diff] [blame] | 1159 | #elif defined(TARGET_OPENRISC) |
| 1160 | |
| 1161 | #define NUM_CORE_REGS (32 + 3) |
| 1162 | |
| 1163 | static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) |
| 1164 | { |
| 1165 | if (n < 32) { |
| 1166 | GET_REG32(env->gpr[n]); |
| 1167 | } else { |
| 1168 | switch (n) { |
| 1169 | case 32: /* PPC */ |
| 1170 | GET_REG32(env->ppc); |
| 1171 | break; |
| 1172 | |
| 1173 | case 33: /* NPC */ |
| 1174 | GET_REG32(env->npc); |
| 1175 | break; |
| 1176 | |
| 1177 | case 34: /* SR */ |
| 1178 | GET_REG32(env->sr); |
| 1179 | break; |
| 1180 | |
| 1181 | default: |
| 1182 | break; |
| 1183 | } |
| 1184 | } |
| 1185 | return 0; |
| 1186 | } |
| 1187 | |
| 1188 | static int cpu_gdb_write_register(CPUOpenRISCState *env, |
| 1189 | uint8_t *mem_buf, int n) |
| 1190 | { |
| 1191 | uint32_t tmp; |
| 1192 | |
| 1193 | if (n > NUM_CORE_REGS) { |
| 1194 | return 0; |
| 1195 | } |
| 1196 | |
| 1197 | tmp = ldl_p(mem_buf); |
| 1198 | |
| 1199 | if (n < 32) { |
| 1200 | env->gpr[n] = tmp; |
| 1201 | } else { |
| 1202 | switch (n) { |
| 1203 | case 32: /* PPC */ |
| 1204 | env->ppc = tmp; |
| 1205 | break; |
| 1206 | |
| 1207 | case 33: /* NPC */ |
| 1208 | env->npc = tmp; |
| 1209 | break; |
| 1210 | |
| 1211 | case 34: /* SR */ |
| 1212 | env->sr = tmp; |
| 1213 | break; |
| 1214 | |
| 1215 | default: |
| 1216 | break; |
| 1217 | } |
| 1218 | } |
| 1219 | return 4; |
| 1220 | } |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1221 | #elif defined (TARGET_SH4) |
ths | 6ef99fc | 2007-05-13 16:36:24 +0000 | [diff] [blame] | 1222 | |
| 1223 | /* Hint: Use "set architecture sh4" in GDB to see fpu registers */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1224 | /* FIXME: We should use XML for this. */ |
ths | 6ef99fc | 2007-05-13 16:36:24 +0000 | [diff] [blame] | 1225 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1226 | #define NUM_CORE_REGS 59 |
| 1227 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1228 | static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1229 | { |
Aurelien Jarno | eca5c30 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 1230 | switch (n) { |
| 1231 | case 0 ... 7: |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1232 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
| 1233 | GET_REGL(env->gregs[n + 16]); |
| 1234 | } else { |
| 1235 | GET_REGL(env->gregs[n]); |
| 1236 | } |
Aurelien Jarno | eca5c30 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 1237 | case 8 ... 15: |
takasi-y@ops.dti.ne.jp | e192a45 | 2010-02-18 00:53:29 +0900 | [diff] [blame] | 1238 | GET_REGL(env->gregs[n]); |
Aurelien Jarno | eca5c30 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 1239 | case 16: |
| 1240 | GET_REGL(env->pc); |
| 1241 | case 17: |
| 1242 | GET_REGL(env->pr); |
| 1243 | case 18: |
| 1244 | GET_REGL(env->gbr); |
| 1245 | case 19: |
| 1246 | GET_REGL(env->vbr); |
| 1247 | case 20: |
| 1248 | GET_REGL(env->mach); |
| 1249 | case 21: |
| 1250 | GET_REGL(env->macl); |
| 1251 | case 22: |
| 1252 | GET_REGL(env->sr); |
| 1253 | case 23: |
| 1254 | GET_REGL(env->fpul); |
| 1255 | case 24: |
| 1256 | GET_REGL(env->fpscr); |
| 1257 | case 25 ... 40: |
| 1258 | if (env->fpscr & FPSCR_FR) { |
| 1259 | stfl_p(mem_buf, env->fregs[n - 9]); |
| 1260 | } else { |
| 1261 | stfl_p(mem_buf, env->fregs[n - 25]); |
| 1262 | } |
| 1263 | return 4; |
| 1264 | case 41: |
| 1265 | GET_REGL(env->ssr); |
| 1266 | case 42: |
| 1267 | GET_REGL(env->spc); |
| 1268 | case 43 ... 50: |
| 1269 | GET_REGL(env->gregs[n - 43]); |
| 1270 | case 51 ... 58: |
| 1271 | GET_REGL(env->gregs[n - (51 - 16)]); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1272 | } |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1273 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1274 | return 0; |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1275 | } |
| 1276 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1277 | static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n) |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1278 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1279 | switch (n) { |
Aurelien Jarno | eca5c30 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 1280 | case 0 ... 7: |
| 1281 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
| 1282 | env->gregs[n + 16] = ldl_p(mem_buf); |
| 1283 | } else { |
| 1284 | env->gregs[n] = ldl_p(mem_buf); |
| 1285 | } |
| 1286 | break; |
| 1287 | case 8 ... 15: |
| 1288 | env->gregs[n] = ldl_p(mem_buf); |
| 1289 | break; |
| 1290 | case 16: |
| 1291 | env->pc = ldl_p(mem_buf); |
| 1292 | break; |
| 1293 | case 17: |
| 1294 | env->pr = ldl_p(mem_buf); |
| 1295 | break; |
| 1296 | case 18: |
| 1297 | env->gbr = ldl_p(mem_buf); |
| 1298 | break; |
| 1299 | case 19: |
| 1300 | env->vbr = ldl_p(mem_buf); |
| 1301 | break; |
| 1302 | case 20: |
| 1303 | env->mach = ldl_p(mem_buf); |
| 1304 | break; |
| 1305 | case 21: |
| 1306 | env->macl = ldl_p(mem_buf); |
| 1307 | break; |
| 1308 | case 22: |
| 1309 | env->sr = ldl_p(mem_buf); |
| 1310 | break; |
| 1311 | case 23: |
| 1312 | env->fpul = ldl_p(mem_buf); |
| 1313 | break; |
| 1314 | case 24: |
| 1315 | env->fpscr = ldl_p(mem_buf); |
| 1316 | break; |
| 1317 | case 25 ... 40: |
| 1318 | if (env->fpscr & FPSCR_FR) { |
| 1319 | env->fregs[n - 9] = ldfl_p(mem_buf); |
| 1320 | } else { |
| 1321 | env->fregs[n - 25] = ldfl_p(mem_buf); |
| 1322 | } |
| 1323 | break; |
| 1324 | case 41: |
| 1325 | env->ssr = ldl_p(mem_buf); |
| 1326 | break; |
| 1327 | case 42: |
| 1328 | env->spc = ldl_p(mem_buf); |
| 1329 | break; |
| 1330 | case 43 ... 50: |
| 1331 | env->gregs[n - 43] = ldl_p(mem_buf); |
| 1332 | break; |
| 1333 | case 51 ... 58: |
| 1334 | env->gregs[n - (51 - 16)] = ldl_p(mem_buf); |
| 1335 | break; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1336 | default: return 0; |
| 1337 | } |
| 1338 | |
| 1339 | return 4; |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1340 | } |
Edgar E. Iglesias | d74d6a9 | 2009-05-20 20:16:31 +0200 | [diff] [blame] | 1341 | #elif defined (TARGET_MICROBLAZE) |
| 1342 | |
| 1343 | #define NUM_CORE_REGS (32 + 5) |
| 1344 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1345 | static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n) |
Edgar E. Iglesias | d74d6a9 | 2009-05-20 20:16:31 +0200 | [diff] [blame] | 1346 | { |
| 1347 | if (n < 32) { |
| 1348 | GET_REG32(env->regs[n]); |
| 1349 | } else { |
| 1350 | GET_REG32(env->sregs[n - 32]); |
| 1351 | } |
| 1352 | return 0; |
| 1353 | } |
| 1354 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1355 | static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n) |
Edgar E. Iglesias | d74d6a9 | 2009-05-20 20:16:31 +0200 | [diff] [blame] | 1356 | { |
| 1357 | uint32_t tmp; |
| 1358 | |
| 1359 | if (n > NUM_CORE_REGS) |
| 1360 | return 0; |
| 1361 | |
| 1362 | tmp = ldl_p(mem_buf); |
| 1363 | |
| 1364 | if (n < 32) { |
| 1365 | env->regs[n] = tmp; |
| 1366 | } else { |
| 1367 | env->sregs[n - 32] = tmp; |
| 1368 | } |
| 1369 | return 4; |
| 1370 | } |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1371 | #elif defined (TARGET_CRIS) |
| 1372 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1373 | #define NUM_CORE_REGS 49 |
| 1374 | |
Edgar E. Iglesias | 4a0b59f | 2010-02-20 19:51:56 +0100 | [diff] [blame] | 1375 | static int |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1376 | read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n) |
Edgar E. Iglesias | 4a0b59f | 2010-02-20 19:51:56 +0100 | [diff] [blame] | 1377 | { |
| 1378 | if (n < 15) { |
| 1379 | GET_REG32(env->regs[n]); |
| 1380 | } |
| 1381 | |
| 1382 | if (n == 15) { |
| 1383 | GET_REG32(env->pc); |
| 1384 | } |
| 1385 | |
| 1386 | if (n < 32) { |
| 1387 | switch (n) { |
| 1388 | case 16: |
| 1389 | GET_REG8(env->pregs[n - 16]); |
| 1390 | break; |
| 1391 | case 17: |
| 1392 | GET_REG8(env->pregs[n - 16]); |
| 1393 | break; |
| 1394 | case 20: |
| 1395 | case 21: |
| 1396 | GET_REG16(env->pregs[n - 16]); |
| 1397 | break; |
| 1398 | default: |
| 1399 | if (n >= 23) { |
| 1400 | GET_REG32(env->pregs[n - 16]); |
| 1401 | } |
| 1402 | break; |
| 1403 | } |
| 1404 | } |
| 1405 | return 0; |
| 1406 | } |
| 1407 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1408 | static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n) |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1409 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1410 | uint8_t srs; |
| 1411 | |
Edgar E. Iglesias | 4a0b59f | 2010-02-20 19:51:56 +0100 | [diff] [blame] | 1412 | if (env->pregs[PR_VR] < 32) |
| 1413 | return read_register_crisv10(env, mem_buf, n); |
| 1414 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1415 | srs = env->pregs[PR_SRS]; |
| 1416 | if (n < 16) { |
| 1417 | GET_REG32(env->regs[n]); |
| 1418 | } |
| 1419 | |
| 1420 | if (n >= 21 && n < 32) { |
| 1421 | GET_REG32(env->pregs[n - 16]); |
| 1422 | } |
| 1423 | if (n >= 33 && n < 49) { |
| 1424 | GET_REG32(env->sregs[srs][n - 33]); |
| 1425 | } |
| 1426 | switch (n) { |
| 1427 | case 16: GET_REG8(env->pregs[0]); |
| 1428 | case 17: GET_REG8(env->pregs[1]); |
| 1429 | case 18: GET_REG32(env->pregs[2]); |
| 1430 | case 19: GET_REG8(srs); |
| 1431 | case 20: GET_REG16(env->pregs[4]); |
| 1432 | case 32: GET_REG32(env->pc); |
| 1433 | } |
| 1434 | |
| 1435 | return 0; |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1436 | } |
| 1437 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1438 | static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n) |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1439 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1440 | uint32_t tmp; |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1441 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1442 | if (n > 49) |
| 1443 | return 0; |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1444 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1445 | tmp = ldl_p(mem_buf); |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1446 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1447 | if (n < 16) { |
| 1448 | env->regs[n] = tmp; |
| 1449 | } |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1450 | |
edgar_igl | d7b6967 | 2008-10-11 19:32:21 +0000 | [diff] [blame] | 1451 | if (n >= 21 && n < 32) { |
| 1452 | env->pregs[n - 16] = tmp; |
| 1453 | } |
| 1454 | |
| 1455 | /* FIXME: Should support function regs be writable? */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1456 | switch (n) { |
| 1457 | case 16: return 1; |
| 1458 | case 17: return 1; |
edgar_igl | d7b6967 | 2008-10-11 19:32:21 +0000 | [diff] [blame] | 1459 | case 18: env->pregs[PR_PID] = tmp; break; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1460 | case 19: return 1; |
| 1461 | case 20: return 2; |
| 1462 | case 32: env->pc = tmp; break; |
| 1463 | } |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1464 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1465 | return 4; |
ths | f1ccf90 | 2007-10-08 13:16:14 +0000 | [diff] [blame] | 1466 | } |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1467 | #elif defined (TARGET_ALPHA) |
| 1468 | |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1469 | #define NUM_CORE_REGS 67 |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1470 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1471 | static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1472 | { |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1473 | uint64_t val; |
| 1474 | CPU_DoubleU d; |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1475 | |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1476 | switch (n) { |
| 1477 | case 0 ... 30: |
| 1478 | val = env->ir[n]; |
| 1479 | break; |
| 1480 | case 32 ... 62: |
| 1481 | d.d = env->fir[n - 32]; |
| 1482 | val = d.ll; |
| 1483 | break; |
| 1484 | case 63: |
| 1485 | val = cpu_alpha_load_fpcr(env); |
| 1486 | break; |
| 1487 | case 64: |
| 1488 | val = env->pc; |
| 1489 | break; |
| 1490 | case 66: |
| 1491 | val = env->unique; |
| 1492 | break; |
| 1493 | case 31: |
| 1494 | case 65: |
| 1495 | /* 31 really is the zero register; 65 is unassigned in the |
| 1496 | gdb protocol, but is still required to occupy 8 bytes. */ |
| 1497 | val = 0; |
| 1498 | break; |
| 1499 | default: |
| 1500 | return 0; |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1501 | } |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1502 | GET_REGL(val); |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1503 | } |
| 1504 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1505 | static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n) |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1506 | { |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1507 | target_ulong tmp = ldtul_p(mem_buf); |
| 1508 | CPU_DoubleU d; |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1509 | |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1510 | switch (n) { |
| 1511 | case 0 ... 30: |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1512 | env->ir[n] = tmp; |
Richard Henderson | 7c5a90d | 2009-12-31 11:54:01 -0800 | [diff] [blame] | 1513 | break; |
| 1514 | case 32 ... 62: |
| 1515 | d.ll = tmp; |
| 1516 | env->fir[n - 32] = d.d; |
| 1517 | break; |
| 1518 | case 63: |
| 1519 | cpu_alpha_store_fpcr(env, tmp); |
| 1520 | break; |
| 1521 | case 64: |
| 1522 | env->pc = tmp; |
| 1523 | break; |
| 1524 | case 66: |
| 1525 | env->unique = tmp; |
| 1526 | break; |
| 1527 | case 31: |
| 1528 | case 65: |
| 1529 | /* 31 really is the zero register; 65 is unassigned in the |
| 1530 | gdb protocol, but is still required to occupy 8 bytes. */ |
| 1531 | break; |
| 1532 | default: |
| 1533 | return 0; |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1534 | } |
aurel32 | 19bf517 | 2008-12-07 23:26:32 +0000 | [diff] [blame] | 1535 | return 8; |
| 1536 | } |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1537 | #elif defined (TARGET_S390X) |
| 1538 | |
Richard Henderson | 6ee77b1 | 2012-08-23 10:44:45 -0700 | [diff] [blame] | 1539 | #define NUM_CORE_REGS S390_NUM_REGS |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1540 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1541 | static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n) |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1542 | { |
Richard Henderson | 6ee77b1 | 2012-08-23 10:44:45 -0700 | [diff] [blame] | 1543 | uint64_t val; |
| 1544 | int cc_op; |
| 1545 | |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1546 | switch (n) { |
Richard Henderson | 6ee77b1 | 2012-08-23 10:44:45 -0700 | [diff] [blame] | 1547 | case S390_PSWM_REGNUM: |
| 1548 | cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr); |
| 1549 | val = deposit64(env->psw.mask, 44, 2, cc_op); |
| 1550 | GET_REGL(val); |
| 1551 | break; |
| 1552 | case S390_PSWA_REGNUM: |
| 1553 | GET_REGL(env->psw.addr); |
| 1554 | break; |
| 1555 | case S390_R0_REGNUM ... S390_R15_REGNUM: |
| 1556 | GET_REGL(env->regs[n-S390_R0_REGNUM]); |
| 1557 | break; |
| 1558 | case S390_A0_REGNUM ... S390_A15_REGNUM: |
| 1559 | GET_REG32(env->aregs[n-S390_A0_REGNUM]); |
| 1560 | break; |
| 1561 | case S390_FPC_REGNUM: |
| 1562 | GET_REG32(env->fpc); |
| 1563 | break; |
| 1564 | case S390_F0_REGNUM ... S390_F15_REGNUM: |
| 1565 | GET_REG64(env->fregs[n-S390_F0_REGNUM].ll); |
| 1566 | break; |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1567 | } |
| 1568 | |
| 1569 | return 0; |
| 1570 | } |
| 1571 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1572 | static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n) |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1573 | { |
| 1574 | target_ulong tmpl; |
| 1575 | uint32_t tmp32; |
| 1576 | int r = 8; |
| 1577 | tmpl = ldtul_p(mem_buf); |
| 1578 | tmp32 = ldl_p(mem_buf); |
| 1579 | |
| 1580 | switch (n) { |
Richard Henderson | 6ee77b1 | 2012-08-23 10:44:45 -0700 | [diff] [blame] | 1581 | case S390_PSWM_REGNUM: |
| 1582 | env->psw.mask = tmpl; |
| 1583 | env->cc_op = extract64(tmpl, 44, 2); |
| 1584 | break; |
| 1585 | case S390_PSWA_REGNUM: |
| 1586 | env->psw.addr = tmpl; |
| 1587 | break; |
| 1588 | case S390_R0_REGNUM ... S390_R15_REGNUM: |
| 1589 | env->regs[n-S390_R0_REGNUM] = tmpl; |
| 1590 | break; |
| 1591 | case S390_A0_REGNUM ... S390_A15_REGNUM: |
| 1592 | env->aregs[n-S390_A0_REGNUM] = tmp32; |
| 1593 | r = 4; |
| 1594 | break; |
| 1595 | case S390_FPC_REGNUM: |
| 1596 | env->fpc = tmp32; |
| 1597 | r = 4; |
| 1598 | break; |
| 1599 | case S390_F0_REGNUM ... S390_F15_REGNUM: |
| 1600 | env->fregs[n-S390_F0_REGNUM].ll = tmpl; |
| 1601 | break; |
| 1602 | default: |
| 1603 | return 0; |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1604 | } |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 1605 | return r; |
| 1606 | } |
Michael Walle | 0c45d3d | 2011-02-17 23:45:06 +0100 | [diff] [blame] | 1607 | #elif defined (TARGET_LM32) |
| 1608 | |
| 1609 | #include "hw/lm32_pic.h" |
| 1610 | #define NUM_CORE_REGS (32 + 7) |
| 1611 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1612 | static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) |
Michael Walle | 0c45d3d | 2011-02-17 23:45:06 +0100 | [diff] [blame] | 1613 | { |
| 1614 | if (n < 32) { |
| 1615 | GET_REG32(env->regs[n]); |
| 1616 | } else { |
| 1617 | switch (n) { |
| 1618 | case 32: |
| 1619 | GET_REG32(env->pc); |
| 1620 | break; |
| 1621 | /* FIXME: put in right exception ID */ |
| 1622 | case 33: |
| 1623 | GET_REG32(0); |
| 1624 | break; |
| 1625 | case 34: |
| 1626 | GET_REG32(env->eba); |
| 1627 | break; |
| 1628 | case 35: |
| 1629 | GET_REG32(env->deba); |
| 1630 | break; |
| 1631 | case 36: |
| 1632 | GET_REG32(env->ie); |
| 1633 | break; |
| 1634 | case 37: |
| 1635 | GET_REG32(lm32_pic_get_im(env->pic_state)); |
| 1636 | break; |
| 1637 | case 38: |
| 1638 | GET_REG32(lm32_pic_get_ip(env->pic_state)); |
| 1639 | break; |
| 1640 | } |
| 1641 | } |
| 1642 | return 0; |
| 1643 | } |
| 1644 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1645 | static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n) |
Michael Walle | 0c45d3d | 2011-02-17 23:45:06 +0100 | [diff] [blame] | 1646 | { |
| 1647 | uint32_t tmp; |
| 1648 | |
| 1649 | if (n > NUM_CORE_REGS) { |
| 1650 | return 0; |
| 1651 | } |
| 1652 | |
| 1653 | tmp = ldl_p(mem_buf); |
| 1654 | |
| 1655 | if (n < 32) { |
| 1656 | env->regs[n] = tmp; |
| 1657 | } else { |
| 1658 | switch (n) { |
| 1659 | case 32: |
| 1660 | env->pc = tmp; |
| 1661 | break; |
| 1662 | case 34: |
| 1663 | env->eba = tmp; |
| 1664 | break; |
| 1665 | case 35: |
| 1666 | env->deba = tmp; |
| 1667 | break; |
| 1668 | case 36: |
| 1669 | env->ie = tmp; |
| 1670 | break; |
| 1671 | case 37: |
| 1672 | lm32_pic_set_im(env->pic_state, tmp); |
| 1673 | break; |
| 1674 | case 38: |
| 1675 | lm32_pic_set_ip(env->pic_state, tmp); |
| 1676 | break; |
| 1677 | } |
| 1678 | } |
| 1679 | return 4; |
| 1680 | } |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1681 | #elif defined(TARGET_XTENSA) |
| 1682 | |
| 1683 | /* Use num_core_regs to see only non-privileged registers in an unmodified gdb. |
| 1684 | * Use num_regs to see all registers. gdb modification is required for that: |
| 1685 | * reset bit 0 in the 'flags' field of the registers definitions in the |
| 1686 | * gdb/xtensa-config.c inside gdb source tree or inside gdb overlay. |
| 1687 | */ |
| 1688 | #define NUM_CORE_REGS (env->config->gdb_regmap.num_regs) |
| 1689 | #define num_g_regs NUM_CORE_REGS |
| 1690 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1691 | static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n) |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1692 | { |
| 1693 | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; |
| 1694 | |
| 1695 | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { |
| 1696 | return 0; |
| 1697 | } |
| 1698 | |
| 1699 | switch (reg->type) { |
| 1700 | case 9: /*pc*/ |
| 1701 | GET_REG32(env->pc); |
| 1702 | break; |
| 1703 | |
| 1704 | case 1: /*ar*/ |
| 1705 | xtensa_sync_phys_from_window(env); |
| 1706 | GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]); |
| 1707 | break; |
| 1708 | |
| 1709 | case 2: /*SR*/ |
| 1710 | GET_REG32(env->sregs[reg->targno & 0xff]); |
| 1711 | break; |
| 1712 | |
| 1713 | case 3: /*UR*/ |
| 1714 | GET_REG32(env->uregs[reg->targno & 0xff]); |
| 1715 | break; |
| 1716 | |
Max Filippov | dd519cb | 2012-09-19 04:23:54 +0400 | [diff] [blame] | 1717 | case 4: /*f*/ |
| 1718 | GET_REG32(float32_val(env->fregs[reg->targno & 0x0f])); |
| 1719 | break; |
| 1720 | |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1721 | case 8: /*a*/ |
| 1722 | GET_REG32(env->regs[reg->targno & 0x0f]); |
| 1723 | break; |
| 1724 | |
| 1725 | default: |
| 1726 | qemu_log("%s from reg %d of unsupported type %d\n", |
| 1727 | __func__, n, reg->type); |
| 1728 | return 0; |
| 1729 | } |
| 1730 | } |
| 1731 | |
Andreas Färber | f384091 | 2012-02-20 06:44:56 +0100 | [diff] [blame] | 1732 | static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n) |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1733 | { |
| 1734 | uint32_t tmp; |
| 1735 | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; |
| 1736 | |
| 1737 | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { |
| 1738 | return 0; |
| 1739 | } |
| 1740 | |
| 1741 | tmp = ldl_p(mem_buf); |
| 1742 | |
| 1743 | switch (reg->type) { |
| 1744 | case 9: /*pc*/ |
| 1745 | env->pc = tmp; |
| 1746 | break; |
| 1747 | |
| 1748 | case 1: /*ar*/ |
| 1749 | env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp; |
| 1750 | xtensa_sync_window_from_phys(env); |
| 1751 | break; |
| 1752 | |
| 1753 | case 2: /*SR*/ |
| 1754 | env->sregs[reg->targno & 0xff] = tmp; |
| 1755 | break; |
| 1756 | |
| 1757 | case 3: /*UR*/ |
| 1758 | env->uregs[reg->targno & 0xff] = tmp; |
| 1759 | break; |
| 1760 | |
Max Filippov | dd519cb | 2012-09-19 04:23:54 +0400 | [diff] [blame] | 1761 | case 4: /*f*/ |
| 1762 | env->fregs[reg->targno & 0x0f] = make_float32(tmp); |
| 1763 | break; |
| 1764 | |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1765 | case 8: /*a*/ |
| 1766 | env->regs[reg->targno & 0x0f] = tmp; |
| 1767 | break; |
| 1768 | |
| 1769 | default: |
| 1770 | qemu_log("%s to reg %d of unsupported type %d\n", |
| 1771 | __func__, n, reg->type); |
| 1772 | return 0; |
| 1773 | } |
| 1774 | |
| 1775 | return 4; |
| 1776 | } |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 1777 | #else |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1778 | |
| 1779 | #define NUM_CORE_REGS 0 |
| 1780 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1781 | static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n) |
bellard | 6da41ea | 2004-01-04 15:48:38 +0000 | [diff] [blame] | 1782 | { |
| 1783 | return 0; |
| 1784 | } |
| 1785 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1786 | static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n) |
bellard | 6da41ea | 2004-01-04 15:48:38 +0000 | [diff] [blame] | 1787 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1788 | return 0; |
bellard | 6da41ea | 2004-01-04 15:48:38 +0000 | [diff] [blame] | 1789 | } |
| 1790 | |
| 1791 | #endif |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 1792 | |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1793 | #if !defined(TARGET_XTENSA) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1794 | static int num_g_regs = NUM_CORE_REGS; |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1795 | #endif |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1796 | |
| 1797 | #ifdef GDB_CORE_XML |
| 1798 | /* Encode data using the encoding for 'x' packets. */ |
| 1799 | static int memtox(char *buf, const char *mem, int len) |
| 1800 | { |
| 1801 | char *p = buf; |
| 1802 | char c; |
| 1803 | |
| 1804 | while (len--) { |
| 1805 | c = *(mem++); |
| 1806 | switch (c) { |
| 1807 | case '#': case '$': case '*': case '}': |
| 1808 | *(p++) = '}'; |
| 1809 | *(p++) = c ^ 0x20; |
| 1810 | break; |
| 1811 | default: |
| 1812 | *(p++) = c; |
| 1813 | break; |
| 1814 | } |
| 1815 | } |
| 1816 | return p - buf; |
| 1817 | } |
| 1818 | |
aurel32 | 3faf778 | 2008-12-07 23:26:17 +0000 | [diff] [blame] | 1819 | static const char *get_feature_xml(const char *p, const char **newp) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1820 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1821 | size_t len; |
| 1822 | int i; |
| 1823 | const char *name; |
| 1824 | static char target_xml[1024]; |
| 1825 | |
| 1826 | len = 0; |
| 1827 | while (p[len] && p[len] != ':') |
| 1828 | len++; |
| 1829 | *newp = p + len; |
| 1830 | |
| 1831 | name = NULL; |
| 1832 | if (strncmp(p, "target.xml", len) == 0) { |
| 1833 | /* Generate the XML description for this CPU. */ |
| 1834 | if (!target_xml[0]) { |
| 1835 | GDBRegisterState *r; |
| 1836 | |
blueswir1 | 5b3715b | 2008-10-25 11:18:12 +0000 | [diff] [blame] | 1837 | snprintf(target_xml, sizeof(target_xml), |
| 1838 | "<?xml version=\"1.0\"?>" |
| 1839 | "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">" |
| 1840 | "<target>" |
| 1841 | "<xi:include href=\"%s\"/>", |
| 1842 | GDB_CORE_XML); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1843 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1844 | for (r = first_cpu->gdb_regs; r; r = r->next) { |
blueswir1 | 2dc766d | 2009-04-13 16:06:19 +0000 | [diff] [blame] | 1845 | pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\""); |
| 1846 | pstrcat(target_xml, sizeof(target_xml), r->xml); |
| 1847 | pstrcat(target_xml, sizeof(target_xml), "\"/>"); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1848 | } |
blueswir1 | 2dc766d | 2009-04-13 16:06:19 +0000 | [diff] [blame] | 1849 | pstrcat(target_xml, sizeof(target_xml), "</target>"); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1850 | } |
| 1851 | return target_xml; |
| 1852 | } |
| 1853 | for (i = 0; ; i++) { |
| 1854 | name = xml_builtin[i][0]; |
| 1855 | if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len)) |
| 1856 | break; |
| 1857 | } |
| 1858 | return name ? xml_builtin[i][1] : NULL; |
| 1859 | } |
| 1860 | #endif |
| 1861 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1862 | static int gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int reg) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1863 | { |
| 1864 | GDBRegisterState *r; |
| 1865 | |
| 1866 | if (reg < NUM_CORE_REGS) |
| 1867 | return cpu_gdb_read_register(env, mem_buf, reg); |
| 1868 | |
| 1869 | for (r = env->gdb_regs; r; r = r->next) { |
| 1870 | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { |
| 1871 | return r->get_reg(env, mem_buf, reg - r->base_reg); |
| 1872 | } |
| 1873 | } |
| 1874 | return 0; |
| 1875 | } |
| 1876 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1877 | static int gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int reg) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1878 | { |
| 1879 | GDBRegisterState *r; |
| 1880 | |
| 1881 | if (reg < NUM_CORE_REGS) |
| 1882 | return cpu_gdb_write_register(env, mem_buf, reg); |
| 1883 | |
| 1884 | for (r = env->gdb_regs; r; r = r->next) { |
| 1885 | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { |
| 1886 | return r->set_reg(env, mem_buf, reg - r->base_reg); |
| 1887 | } |
| 1888 | } |
| 1889 | return 0; |
| 1890 | } |
| 1891 | |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1892 | #if !defined(TARGET_XTENSA) |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1893 | /* Register a supplemental set of CPU registers. If g_pos is nonzero it |
| 1894 | specifies the first register number and these registers are included in |
| 1895 | a standard "g" packet. Direction is relative to gdb, i.e. get_reg is |
| 1896 | gdb reading a CPU register, and set_reg is gdb modifying a CPU register. |
| 1897 | */ |
| 1898 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1899 | void gdb_register_coprocessor(CPUArchState * env, |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1900 | gdb_reg_cb get_reg, gdb_reg_cb set_reg, |
| 1901 | int num_regs, const char *xml, int g_pos) |
| 1902 | { |
| 1903 | GDBRegisterState *s; |
| 1904 | GDBRegisterState **p; |
| 1905 | static int last_reg = NUM_CORE_REGS; |
| 1906 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1907 | p = &env->gdb_regs; |
| 1908 | while (*p) { |
| 1909 | /* Check for duplicates. */ |
| 1910 | if (strcmp((*p)->xml, xml) == 0) |
| 1911 | return; |
| 1912 | p = &(*p)->next; |
| 1913 | } |
Stefan Weil | 9643c25 | 2011-10-18 22:25:38 +0200 | [diff] [blame] | 1914 | |
| 1915 | s = g_new0(GDBRegisterState, 1); |
| 1916 | s->base_reg = last_reg; |
| 1917 | s->num_regs = num_regs; |
| 1918 | s->get_reg = get_reg; |
| 1919 | s->set_reg = set_reg; |
| 1920 | s->xml = xml; |
| 1921 | |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1922 | /* Add to end of list. */ |
| 1923 | last_reg += num_regs; |
| 1924 | *p = s; |
| 1925 | if (g_pos) { |
| 1926 | if (g_pos != s->base_reg) { |
| 1927 | fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n" |
| 1928 | "Expected %d got %d\n", xml, g_pos, s->base_reg); |
| 1929 | } else { |
| 1930 | num_g_regs = last_reg; |
| 1931 | } |
| 1932 | } |
| 1933 | } |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 1934 | #endif |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 1935 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1936 | #ifndef CONFIG_USER_ONLY |
| 1937 | static const int xlat_gdb_type[] = { |
| 1938 | [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, |
| 1939 | [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, |
| 1940 | [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, |
| 1941 | }; |
| 1942 | #endif |
| 1943 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1944 | static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1945 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1946 | CPUArchState *env; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1947 | int err = 0; |
| 1948 | |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 1949 | if (kvm_enabled()) |
| 1950 | return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type); |
| 1951 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1952 | switch (type) { |
| 1953 | case GDB_BREAKPOINT_SW: |
| 1954 | case GDB_BREAKPOINT_HW: |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1955 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
| 1956 | err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL); |
| 1957 | if (err) |
| 1958 | break; |
| 1959 | } |
| 1960 | return err; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1961 | #ifndef CONFIG_USER_ONLY |
| 1962 | case GDB_WATCHPOINT_WRITE: |
| 1963 | case GDB_WATCHPOINT_READ: |
| 1964 | case GDB_WATCHPOINT_ACCESS: |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1965 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
| 1966 | err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type], |
| 1967 | NULL); |
| 1968 | if (err) |
| 1969 | break; |
| 1970 | } |
| 1971 | return err; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1972 | #endif |
| 1973 | default: |
| 1974 | return -ENOSYS; |
| 1975 | } |
| 1976 | } |
| 1977 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1978 | static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1979 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 1980 | CPUArchState *env; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1981 | int err = 0; |
| 1982 | |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 1983 | if (kvm_enabled()) |
| 1984 | return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type); |
| 1985 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1986 | switch (type) { |
| 1987 | case GDB_BREAKPOINT_SW: |
| 1988 | case GDB_BREAKPOINT_HW: |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1989 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
| 1990 | err = cpu_breakpoint_remove(env, addr, BP_GDB); |
| 1991 | if (err) |
| 1992 | break; |
| 1993 | } |
| 1994 | return err; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1995 | #ifndef CONFIG_USER_ONLY |
| 1996 | case GDB_WATCHPOINT_WRITE: |
| 1997 | case GDB_WATCHPOINT_READ: |
| 1998 | case GDB_WATCHPOINT_ACCESS: |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 1999 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
| 2000 | err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]); |
| 2001 | if (err) |
| 2002 | break; |
| 2003 | } |
| 2004 | return err; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2005 | #endif |
| 2006 | default: |
| 2007 | return -ENOSYS; |
| 2008 | } |
| 2009 | } |
| 2010 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2011 | static void gdb_breakpoint_remove_all(void) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2012 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2013 | CPUArchState *env; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2014 | |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 2015 | if (kvm_enabled()) { |
| 2016 | kvm_remove_all_breakpoints(gdbserver_state->c_cpu); |
| 2017 | return; |
| 2018 | } |
| 2019 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2020 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
| 2021 | cpu_breakpoint_remove_all(env, BP_GDB); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2022 | #ifndef CONFIG_USER_ONLY |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2023 | cpu_watchpoint_remove_all(env, BP_GDB); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2024 | #endif |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2025 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2026 | } |
| 2027 | |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2028 | static void gdb_set_cpu_pc(GDBState *s, target_ulong pc) |
| 2029 | { |
Avi Kivity | 4c0960c | 2009-08-17 23:19:53 +0300 | [diff] [blame] | 2030 | cpu_synchronize_state(s->c_cpu); |
Peter Maydell | a896d03 | 2012-03-12 06:24:45 +0000 | [diff] [blame] | 2031 | #if defined(TARGET_I386) |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2032 | s->c_cpu->eip = pc; |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2033 | #elif defined (TARGET_PPC) |
| 2034 | s->c_cpu->nip = pc; |
| 2035 | #elif defined (TARGET_SPARC) |
| 2036 | s->c_cpu->pc = pc; |
| 2037 | s->c_cpu->npc = pc + 4; |
| 2038 | #elif defined (TARGET_ARM) |
| 2039 | s->c_cpu->regs[15] = pc; |
| 2040 | #elif defined (TARGET_SH4) |
| 2041 | s->c_cpu->pc = pc; |
| 2042 | #elif defined (TARGET_MIPS) |
Nathan Froyd | ff1d197 | 2009-12-08 08:06:30 -0800 | [diff] [blame] | 2043 | s->c_cpu->active_tc.PC = pc & ~(target_ulong)1; |
| 2044 | if (pc & 1) { |
| 2045 | s->c_cpu->hflags |= MIPS_HFLAG_M16; |
| 2046 | } else { |
| 2047 | s->c_cpu->hflags &= ~(MIPS_HFLAG_M16); |
| 2048 | } |
Edgar E. Iglesias | d74d6a9 | 2009-05-20 20:16:31 +0200 | [diff] [blame] | 2049 | #elif defined (TARGET_MICROBLAZE) |
| 2050 | s->c_cpu->sregs[SR_PC] = pc; |
Jia Liu | fc04355 | 2012-07-20 15:50:50 +0800 | [diff] [blame] | 2051 | #elif defined(TARGET_OPENRISC) |
| 2052 | s->c_cpu->pc = pc; |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2053 | #elif defined (TARGET_CRIS) |
| 2054 | s->c_cpu->pc = pc; |
| 2055 | #elif defined (TARGET_ALPHA) |
| 2056 | s->c_cpu->pc = pc; |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 2057 | #elif defined (TARGET_S390X) |
Alexander Graf | afcb0e4 | 2009-12-05 12:44:29 +0100 | [diff] [blame] | 2058 | s->c_cpu->psw.addr = pc; |
Michael Walle | 0c45d3d | 2011-02-17 23:45:06 +0100 | [diff] [blame] | 2059 | #elif defined (TARGET_LM32) |
| 2060 | s->c_cpu->pc = pc; |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 2061 | #elif defined(TARGET_XTENSA) |
| 2062 | s->c_cpu->pc = pc; |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2063 | #endif |
| 2064 | } |
| 2065 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2066 | static CPUArchState *find_cpu(uint32_t thread_id) |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2067 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2068 | CPUArchState *env; |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2069 | CPUState *cpu; |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2070 | |
| 2071 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2072 | cpu = ENV_GET_CPU(env); |
| 2073 | if (cpu_index(cpu) == thread_id) { |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2074 | return env; |
| 2075 | } |
| 2076 | } |
| 2077 | |
| 2078 | return NULL; |
| 2079 | } |
| 2080 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2081 | static int gdb_handle_packet(GDBState *s, const char *line_buf) |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 2082 | { |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2083 | CPUArchState *env; |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 2084 | const char *p; |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2085 | uint32_t thread; |
| 2086 | int ch, reg_size, type, res; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2087 | char buf[MAX_PACKET_LENGTH]; |
| 2088 | uint8_t mem_buf[MAX_PACKET_LENGTH]; |
| 2089 | uint8_t *registers; |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2090 | target_ulong addr, len; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2091 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2092 | #ifdef DEBUG_GDB |
| 2093 | printf("command='%s'\n", line_buf); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 2094 | #endif |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2095 | p = line_buf; |
| 2096 | ch = *p++; |
| 2097 | switch(ch) { |
| 2098 | case '?': |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2099 | /* TODO: Make this return the correct value for user-mode. */ |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2100 | snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP, |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2101 | cpu_index(ENV_GET_CPU(s->c_cpu))); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2102 | put_packet(s, buf); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 2103 | /* Remove all the breakpoints when this query is issued, |
| 2104 | * because gdb is doing and initial connect and the state |
| 2105 | * should be cleaned up. |
| 2106 | */ |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2107 | gdb_breakpoint_remove_all(); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2108 | break; |
| 2109 | case 'c': |
| 2110 | if (*p != '\0') { |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2111 | addr = strtoull(p, (char **)&p, 16); |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2112 | gdb_set_cpu_pc(s, addr); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2113 | } |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2114 | s->signal = 0; |
edgar_igl | ba70a62 | 2008-03-14 06:10:42 +0000 | [diff] [blame] | 2115 | gdb_continue(s); |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 2116 | return RS_IDLE; |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 2117 | case 'C': |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2118 | s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16)); |
| 2119 | if (s->signal == -1) |
| 2120 | s->signal = 0; |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 2121 | gdb_continue(s); |
| 2122 | return RS_IDLE; |
Jan Kiszka | dd32aa1 | 2009-06-27 09:53:51 +0200 | [diff] [blame] | 2123 | case 'v': |
| 2124 | if (strncmp(p, "Cont", 4) == 0) { |
| 2125 | int res_signal, res_thread; |
| 2126 | |
| 2127 | p += 4; |
| 2128 | if (*p == '?') { |
| 2129 | put_packet(s, "vCont;c;C;s;S"); |
| 2130 | break; |
| 2131 | } |
| 2132 | res = 0; |
| 2133 | res_signal = 0; |
| 2134 | res_thread = 0; |
| 2135 | while (*p) { |
| 2136 | int action, signal; |
| 2137 | |
| 2138 | if (*p++ != ';') { |
| 2139 | res = 0; |
| 2140 | break; |
| 2141 | } |
| 2142 | action = *p++; |
| 2143 | signal = 0; |
| 2144 | if (action == 'C' || action == 'S') { |
| 2145 | signal = strtoul(p, (char **)&p, 16); |
| 2146 | } else if (action != 'c' && action != 's') { |
| 2147 | res = 0; |
| 2148 | break; |
| 2149 | } |
| 2150 | thread = 0; |
| 2151 | if (*p == ':') { |
| 2152 | thread = strtoull(p+1, (char **)&p, 16); |
| 2153 | } |
| 2154 | action = tolower(action); |
| 2155 | if (res == 0 || (res == 'c' && action == 's')) { |
| 2156 | res = action; |
| 2157 | res_signal = signal; |
| 2158 | res_thread = thread; |
| 2159 | } |
| 2160 | } |
| 2161 | if (res) { |
| 2162 | if (res_thread != -1 && res_thread != 0) { |
| 2163 | env = find_cpu(res_thread); |
| 2164 | if (env == NULL) { |
| 2165 | put_packet(s, "E22"); |
| 2166 | break; |
| 2167 | } |
| 2168 | s->c_cpu = env; |
| 2169 | } |
| 2170 | if (res == 's') { |
| 2171 | cpu_single_step(s->c_cpu, sstep_flags); |
| 2172 | } |
| 2173 | s->signal = res_signal; |
| 2174 | gdb_continue(s); |
| 2175 | return RS_IDLE; |
| 2176 | } |
| 2177 | break; |
| 2178 | } else { |
| 2179 | goto unknown_command; |
| 2180 | } |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 2181 | case 'k': |
Jan Kiszka | 00e94db | 2012-03-06 18:32:35 +0100 | [diff] [blame] | 2182 | #ifdef CONFIG_USER_ONLY |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 2183 | /* Kill the target */ |
| 2184 | fprintf(stderr, "\nQEMU: Terminated via GDBstub\n"); |
| 2185 | exit(0); |
Jan Kiszka | 00e94db | 2012-03-06 18:32:35 +0100 | [diff] [blame] | 2186 | #endif |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 2187 | case 'D': |
| 2188 | /* Detach packet */ |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2189 | gdb_breakpoint_remove_all(); |
Daniel Gutson | 7ea06da | 2010-02-26 14:13:50 -0300 | [diff] [blame] | 2190 | gdb_syscall_mode = GDB_SYS_DISABLED; |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 2191 | gdb_continue(s); |
| 2192 | put_packet(s, "OK"); |
| 2193 | break; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2194 | case 's': |
| 2195 | if (*p != '\0') { |
ths | 8fac580 | 2007-07-12 10:05:07 +0000 | [diff] [blame] | 2196 | addr = strtoull(p, (char **)&p, 16); |
aurel32 | fab9d28 | 2009-04-08 21:29:37 +0000 | [diff] [blame] | 2197 | gdb_set_cpu_pc(s, addr); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2198 | } |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2199 | cpu_single_step(s->c_cpu, sstep_flags); |
edgar_igl | ba70a62 | 2008-03-14 06:10:42 +0000 | [diff] [blame] | 2200 | gdb_continue(s); |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 2201 | return RS_IDLE; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2202 | case 'F': |
| 2203 | { |
| 2204 | target_ulong ret; |
| 2205 | target_ulong err; |
| 2206 | |
| 2207 | ret = strtoull(p, (char **)&p, 16); |
| 2208 | if (*p == ',') { |
| 2209 | p++; |
| 2210 | err = strtoull(p, (char **)&p, 16); |
| 2211 | } else { |
| 2212 | err = 0; |
| 2213 | } |
| 2214 | if (*p == ',') |
| 2215 | p++; |
| 2216 | type = *p; |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2217 | if (s->current_syscall_cb) { |
| 2218 | s->current_syscall_cb(s->c_cpu, ret, err); |
| 2219 | s->current_syscall_cb = NULL; |
| 2220 | } |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2221 | if (type == 'C') { |
| 2222 | put_packet(s, "T02"); |
| 2223 | } else { |
edgar_igl | ba70a62 | 2008-03-14 06:10:42 +0000 | [diff] [blame] | 2224 | gdb_continue(s); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2225 | } |
| 2226 | } |
| 2227 | break; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2228 | case 'g': |
Avi Kivity | 4c0960c | 2009-08-17 23:19:53 +0300 | [diff] [blame] | 2229 | cpu_synchronize_state(s->g_cpu); |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 2230 | env = s->g_cpu; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2231 | len = 0; |
| 2232 | for (addr = 0; addr < num_g_regs; addr++) { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2233 | reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2234 | len += reg_size; |
| 2235 | } |
| 2236 | memtohex(buf, mem_buf, len); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2237 | put_packet(s, buf); |
| 2238 | break; |
| 2239 | case 'G': |
Avi Kivity | 4c0960c | 2009-08-17 23:19:53 +0300 | [diff] [blame] | 2240 | cpu_synchronize_state(s->g_cpu); |
Max Filippov | ccfcaba | 2011-09-06 03:55:52 +0400 | [diff] [blame] | 2241 | env = s->g_cpu; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2242 | registers = mem_buf; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2243 | len = strlen(p) / 2; |
| 2244 | hextomem((uint8_t *)registers, p, len); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2245 | for (addr = 0; addr < num_g_regs && len > 0; addr++) { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2246 | reg_size = gdb_write_register(s->g_cpu, registers, addr); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2247 | len -= reg_size; |
| 2248 | registers += reg_size; |
| 2249 | } |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2250 | put_packet(s, "OK"); |
| 2251 | break; |
| 2252 | case 'm': |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2253 | addr = strtoull(p, (char **)&p, 16); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2254 | if (*p == ',') |
| 2255 | p++; |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2256 | len = strtoull(p, NULL, 16); |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 2257 | if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) { |
bellard | 6f970bd | 2005-12-05 19:55:19 +0000 | [diff] [blame] | 2258 | put_packet (s, "E14"); |
| 2259 | } else { |
| 2260 | memtohex(buf, mem_buf, len); |
| 2261 | put_packet(s, buf); |
| 2262 | } |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2263 | break; |
| 2264 | case 'M': |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2265 | addr = strtoull(p, (char **)&p, 16); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2266 | if (*p == ',') |
| 2267 | p++; |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2268 | len = strtoull(p, (char **)&p, 16); |
bellard | b328f87 | 2005-01-17 22:03:16 +0000 | [diff] [blame] | 2269 | if (*p == ':') |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2270 | p++; |
| 2271 | hextomem(mem_buf, p, len); |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 2272 | if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0) { |
bellard | 905f20b | 2005-04-26 21:09:55 +0000 | [diff] [blame] | 2273 | put_packet(s, "E14"); |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 2274 | } else { |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2275 | put_packet(s, "OK"); |
Fabien Chouteau | 44520db | 2011-09-08 12:48:16 +0200 | [diff] [blame] | 2276 | } |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2277 | break; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2278 | case 'p': |
| 2279 | /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable. |
| 2280 | This works, but can be very slow. Anything new enough to |
| 2281 | understand XML also knows how to use this properly. */ |
| 2282 | if (!gdb_has_xml) |
| 2283 | goto unknown_command; |
| 2284 | addr = strtoull(p, (char **)&p, 16); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2285 | reg_size = gdb_read_register(s->g_cpu, mem_buf, addr); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2286 | if (reg_size) { |
| 2287 | memtohex(buf, mem_buf, reg_size); |
| 2288 | put_packet(s, buf); |
| 2289 | } else { |
| 2290 | put_packet(s, "E14"); |
| 2291 | } |
| 2292 | break; |
| 2293 | case 'P': |
| 2294 | if (!gdb_has_xml) |
| 2295 | goto unknown_command; |
| 2296 | addr = strtoull(p, (char **)&p, 16); |
| 2297 | if (*p == '=') |
| 2298 | p++; |
| 2299 | reg_size = strlen(p) / 2; |
| 2300 | hextomem(mem_buf, p, reg_size); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2301 | gdb_write_register(s->g_cpu, mem_buf, addr); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2302 | put_packet(s, "OK"); |
| 2303 | break; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2304 | case 'Z': |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2305 | case 'z': |
| 2306 | type = strtoul(p, (char **)&p, 16); |
| 2307 | if (*p == ',') |
| 2308 | p++; |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2309 | addr = strtoull(p, (char **)&p, 16); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2310 | if (*p == ',') |
| 2311 | p++; |
bellard | 9d9754a | 2006-06-25 15:32:37 +0000 | [diff] [blame] | 2312 | len = strtoull(p, (char **)&p, 16); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2313 | if (ch == 'Z') |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2314 | res = gdb_breakpoint_insert(addr, len, type); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2315 | else |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2316 | res = gdb_breakpoint_remove(addr, len, type); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2317 | if (res >= 0) |
| 2318 | put_packet(s, "OK"); |
| 2319 | else if (res == -ENOSYS) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2320 | put_packet(s, ""); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2321 | else |
| 2322 | put_packet(s, "E22"); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2323 | break; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2324 | case 'H': |
| 2325 | type = *p++; |
| 2326 | thread = strtoull(p, (char **)&p, 16); |
| 2327 | if (thread == -1 || thread == 0) { |
| 2328 | put_packet(s, "OK"); |
| 2329 | break; |
| 2330 | } |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2331 | env = find_cpu(thread); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2332 | if (env == NULL) { |
| 2333 | put_packet(s, "E22"); |
| 2334 | break; |
| 2335 | } |
| 2336 | switch (type) { |
| 2337 | case 'c': |
| 2338 | s->c_cpu = env; |
| 2339 | put_packet(s, "OK"); |
| 2340 | break; |
| 2341 | case 'g': |
| 2342 | s->g_cpu = env; |
| 2343 | put_packet(s, "OK"); |
| 2344 | break; |
| 2345 | default: |
| 2346 | put_packet(s, "E22"); |
| 2347 | break; |
| 2348 | } |
| 2349 | break; |
| 2350 | case 'T': |
| 2351 | thread = strtoull(p, (char **)&p, 16); |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2352 | env = find_cpu(thread); |
| 2353 | |
| 2354 | if (env != NULL) { |
| 2355 | put_packet(s, "OK"); |
| 2356 | } else { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2357 | put_packet(s, "E22"); |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2358 | } |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2359 | break; |
pbrook | 978efd6 | 2006-06-17 18:30:42 +0000 | [diff] [blame] | 2360 | case 'q': |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 2361 | case 'Q': |
| 2362 | /* parse any 'q' packets here */ |
| 2363 | if (!strcmp(p,"qemu.sstepbits")) { |
| 2364 | /* Query Breakpoint bit definitions */ |
blueswir1 | 363a37d | 2008-08-21 17:58:08 +0000 | [diff] [blame] | 2365 | snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x", |
| 2366 | SSTEP_ENABLE, |
| 2367 | SSTEP_NOIRQ, |
| 2368 | SSTEP_NOTIMER); |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 2369 | put_packet(s, buf); |
| 2370 | break; |
| 2371 | } else if (strncmp(p,"qemu.sstep",10) == 0) { |
| 2372 | /* Display or change the sstep_flags */ |
| 2373 | p += 10; |
| 2374 | if (*p != '=') { |
| 2375 | /* Display current setting */ |
blueswir1 | 363a37d | 2008-08-21 17:58:08 +0000 | [diff] [blame] | 2376 | snprintf(buf, sizeof(buf), "0x%x", sstep_flags); |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 2377 | put_packet(s, buf); |
| 2378 | break; |
| 2379 | } |
| 2380 | p++; |
| 2381 | type = strtoul(p, (char **)&p, 16); |
| 2382 | sstep_flags = type; |
| 2383 | put_packet(s, "OK"); |
| 2384 | break; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2385 | } else if (strcmp(p,"C") == 0) { |
| 2386 | /* "Current thread" remains vague in the spec, so always return |
| 2387 | * the first CPU (gdb returns the first thread). */ |
| 2388 | put_packet(s, "QC1"); |
| 2389 | break; |
| 2390 | } else if (strcmp(p,"fThreadInfo") == 0) { |
| 2391 | s->query_cpu = first_cpu; |
| 2392 | goto report_cpuinfo; |
| 2393 | } else if (strcmp(p,"sThreadInfo") == 0) { |
| 2394 | report_cpuinfo: |
| 2395 | if (s->query_cpu) { |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2396 | snprintf(buf, sizeof(buf), "m%x", |
| 2397 | cpu_index(ENV_GET_CPU(s->query_cpu))); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2398 | put_packet(s, buf); |
| 2399 | s->query_cpu = s->query_cpu->next_cpu; |
| 2400 | } else |
| 2401 | put_packet(s, "l"); |
| 2402 | break; |
| 2403 | } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) { |
| 2404 | thread = strtoull(p+16, (char **)&p, 16); |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2405 | env = find_cpu(thread); |
| 2406 | if (env != NULL) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 2407 | CPUState *cpu = ENV_GET_CPU(env); |
Avi Kivity | 4c0960c | 2009-08-17 23:19:53 +0300 | [diff] [blame] | 2408 | cpu_synchronize_state(env); |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2409 | len = snprintf((char *)mem_buf, sizeof(mem_buf), |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 2410 | "CPU#%d [%s]", cpu->cpu_index, |
Nathan Froyd | 1e9fa73 | 2009-06-03 11:33:08 -0700 | [diff] [blame] | 2411 | env->halted ? "halted " : "running"); |
| 2412 | memtohex(buf, mem_buf, len); |
| 2413 | put_packet(s, buf); |
| 2414 | } |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2415 | break; |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 2416 | } |
blueswir1 | 0b8a988 | 2009-03-07 10:51:36 +0000 | [diff] [blame] | 2417 | #ifdef CONFIG_USER_ONLY |
edgar_igl | 60897d3 | 2008-05-09 08:25:14 +0000 | [diff] [blame] | 2418 | else if (strncmp(p, "Offsets", 7) == 0) { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2419 | TaskState *ts = s->c_cpu->opaque; |
pbrook | 978efd6 | 2006-06-17 18:30:42 +0000 | [diff] [blame] | 2420 | |
blueswir1 | 363a37d | 2008-08-21 17:58:08 +0000 | [diff] [blame] | 2421 | snprintf(buf, sizeof(buf), |
| 2422 | "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx |
| 2423 | ";Bss=" TARGET_ABI_FMT_lx, |
| 2424 | ts->info->code_offset, |
| 2425 | ts->info->data_offset, |
| 2426 | ts->info->data_offset); |
pbrook | 978efd6 | 2006-06-17 18:30:42 +0000 | [diff] [blame] | 2427 | put_packet(s, buf); |
| 2428 | break; |
| 2429 | } |
blueswir1 | 0b8a988 | 2009-03-07 10:51:36 +0000 | [diff] [blame] | 2430 | #else /* !CONFIG_USER_ONLY */ |
aliguori | 8a34a0f | 2009-03-05 23:01:55 +0000 | [diff] [blame] | 2431 | else if (strncmp(p, "Rcmd,", 5) == 0) { |
| 2432 | int len = strlen(p + 5); |
| 2433 | |
| 2434 | if ((len % 2) != 0) { |
| 2435 | put_packet(s, "E01"); |
| 2436 | break; |
| 2437 | } |
| 2438 | hextomem(mem_buf, p + 5, len); |
| 2439 | len = len / 2; |
| 2440 | mem_buf[len++] = 0; |
Anthony Liguori | fa5efcc | 2011-08-15 11:17:30 -0500 | [diff] [blame] | 2441 | qemu_chr_be_write(s->mon_chr, mem_buf, len); |
aliguori | 8a34a0f | 2009-03-05 23:01:55 +0000 | [diff] [blame] | 2442 | put_packet(s, "OK"); |
| 2443 | break; |
| 2444 | } |
blueswir1 | 0b8a988 | 2009-03-07 10:51:36 +0000 | [diff] [blame] | 2445 | #endif /* !CONFIG_USER_ONLY */ |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2446 | if (strncmp(p, "Supported", 9) == 0) { |
blueswir1 | 5b3715b | 2008-10-25 11:18:12 +0000 | [diff] [blame] | 2447 | snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2448 | #ifdef GDB_CORE_XML |
blueswir1 | 2dc766d | 2009-04-13 16:06:19 +0000 | [diff] [blame] | 2449 | pstrcat(buf, sizeof(buf), ";qXfer:features:read+"); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2450 | #endif |
| 2451 | put_packet(s, buf); |
| 2452 | break; |
| 2453 | } |
| 2454 | #ifdef GDB_CORE_XML |
| 2455 | if (strncmp(p, "Xfer:features:read:", 19) == 0) { |
| 2456 | const char *xml; |
| 2457 | target_ulong total_len; |
| 2458 | |
| 2459 | gdb_has_xml = 1; |
| 2460 | p += 19; |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2461 | xml = get_feature_xml(p, &p); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2462 | if (!xml) { |
blueswir1 | 5b3715b | 2008-10-25 11:18:12 +0000 | [diff] [blame] | 2463 | snprintf(buf, sizeof(buf), "E00"); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2464 | put_packet(s, buf); |
| 2465 | break; |
| 2466 | } |
| 2467 | |
| 2468 | if (*p == ':') |
| 2469 | p++; |
| 2470 | addr = strtoul(p, (char **)&p, 16); |
| 2471 | if (*p == ',') |
| 2472 | p++; |
| 2473 | len = strtoul(p, (char **)&p, 16); |
| 2474 | |
| 2475 | total_len = strlen(xml); |
| 2476 | if (addr > total_len) { |
blueswir1 | 5b3715b | 2008-10-25 11:18:12 +0000 | [diff] [blame] | 2477 | snprintf(buf, sizeof(buf), "E00"); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2478 | put_packet(s, buf); |
| 2479 | break; |
| 2480 | } |
| 2481 | if (len > (MAX_PACKET_LENGTH - 5) / 2) |
| 2482 | len = (MAX_PACKET_LENGTH - 5) / 2; |
| 2483 | if (len < total_len - addr) { |
| 2484 | buf[0] = 'm'; |
| 2485 | len = memtox(buf + 1, xml + addr, len); |
| 2486 | } else { |
| 2487 | buf[0] = 'l'; |
| 2488 | len = memtox(buf + 1, xml + addr, total_len - addr); |
| 2489 | } |
| 2490 | put_packet_binary(s, buf, len + 1); |
| 2491 | break; |
| 2492 | } |
| 2493 | #endif |
| 2494 | /* Unrecognised 'q' command. */ |
| 2495 | goto unknown_command; |
| 2496 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2497 | default: |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2498 | unknown_command: |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2499 | /* put empty packet */ |
| 2500 | buf[0] = '\0'; |
| 2501 | put_packet(s, buf); |
| 2502 | break; |
| 2503 | } |
| 2504 | return RS_IDLE; |
| 2505 | } |
| 2506 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2507 | void gdb_set_stop_cpu(CPUArchState *env) |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2508 | { |
| 2509 | gdbserver_state->c_cpu = env; |
| 2510 | gdbserver_state->g_cpu = env; |
| 2511 | } |
| 2512 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2513 | #ifndef CONFIG_USER_ONLY |
Luiz Capitulino | 1dfb4dd | 2011-07-29 14:26:33 -0300 | [diff] [blame] | 2514 | static void gdb_vm_state_change(void *opaque, int running, RunState state) |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2515 | { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2516 | GDBState *s = gdbserver_state; |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2517 | CPUArchState *env = s->c_cpu; |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2518 | CPUState *cpu = ENV_GET_CPU(env); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2519 | char buf[256]; |
aliguori | d6fc1b3 | 2008-11-18 19:55:44 +0000 | [diff] [blame] | 2520 | const char *type; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2521 | int ret; |
| 2522 | |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2523 | if (running || s->state == RS_INACTIVE) { |
| 2524 | return; |
| 2525 | } |
| 2526 | /* Is there a GDB syscall waiting to be sent? */ |
| 2527 | if (s->current_syscall_cb) { |
| 2528 | put_packet(s, s->syscall_buf); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2529 | return; |
Jan Kiszka | e07bbac | 2011-02-09 16:29:40 +0100 | [diff] [blame] | 2530 | } |
Luiz Capitulino | 1dfb4dd | 2011-07-29 14:26:33 -0300 | [diff] [blame] | 2531 | switch (state) { |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2532 | case RUN_STATE_DEBUG: |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2533 | if (env->watchpoint_hit) { |
| 2534 | switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2535 | case BP_MEM_READ: |
aliguori | d6fc1b3 | 2008-11-18 19:55:44 +0000 | [diff] [blame] | 2536 | type = "r"; |
| 2537 | break; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2538 | case BP_MEM_ACCESS: |
aliguori | d6fc1b3 | 2008-11-18 19:55:44 +0000 | [diff] [blame] | 2539 | type = "a"; |
| 2540 | break; |
| 2541 | default: |
| 2542 | type = ""; |
| 2543 | break; |
| 2544 | } |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2545 | snprintf(buf, sizeof(buf), |
| 2546 | "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";", |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2547 | GDB_SIGNAL_TRAP, cpu_index(cpu), type, |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2548 | env->watchpoint_hit->vaddr); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2549 | env->watchpoint_hit = NULL; |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2550 | goto send_packet; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2551 | } |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2552 | tb_flush(env); |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2553 | ret = GDB_SIGNAL_TRAP; |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2554 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2555 | case RUN_STATE_PAUSED: |
aliguori | 9781e04 | 2009-01-22 17:15:29 +0000 | [diff] [blame] | 2556 | ret = GDB_SIGNAL_INT; |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2557 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2558 | case RUN_STATE_SHUTDOWN: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2559 | ret = GDB_SIGNAL_QUIT; |
| 2560 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2561 | case RUN_STATE_IO_ERROR: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2562 | ret = GDB_SIGNAL_IO; |
| 2563 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2564 | case RUN_STATE_WATCHDOG: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2565 | ret = GDB_SIGNAL_ALRM; |
| 2566 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2567 | case RUN_STATE_INTERNAL_ERROR: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2568 | ret = GDB_SIGNAL_ABRT; |
| 2569 | break; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2570 | case RUN_STATE_SAVE_VM: |
| 2571 | case RUN_STATE_RESTORE_VM: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2572 | return; |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2573 | case RUN_STATE_FINISH_MIGRATE: |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2574 | ret = GDB_SIGNAL_XCPU; |
| 2575 | break; |
| 2576 | default: |
| 2577 | ret = GDB_SIGNAL_UNKNOWN; |
| 2578 | break; |
bellard | bbeb7b5 | 2006-04-23 18:42:15 +0000 | [diff] [blame] | 2579 | } |
Andreas Färber | 0d34282 | 2012-12-17 07:12:13 +0100 | [diff] [blame] | 2580 | snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, cpu_index(cpu)); |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2581 | |
| 2582 | send_packet: |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2583 | put_packet(s, buf); |
Jan Kiszka | 425189a | 2011-03-22 11:02:09 +0100 | [diff] [blame] | 2584 | |
| 2585 | /* disable single step if it was enabled */ |
| 2586 | cpu_single_step(env, 0); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2587 | } |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2588 | #endif |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2589 | |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2590 | /* Send a gdb syscall request. |
| 2591 | This accepts limited printf-style format specifiers, specifically: |
pbrook | a87295e | 2007-05-26 15:09:38 +0000 | [diff] [blame] | 2592 | %x - target_ulong argument printed in hex. |
| 2593 | %lx - 64-bit argument printed in hex. |
| 2594 | %s - string pointer (target_ulong) and length (int) pair. */ |
blueswir1 | 7ccfb2e | 2008-09-14 06:45:34 +0000 | [diff] [blame] | 2595 | void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...) |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2596 | { |
| 2597 | va_list va; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2598 | char *p; |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2599 | char *p_end; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2600 | target_ulong addr; |
pbrook | a87295e | 2007-05-26 15:09:38 +0000 | [diff] [blame] | 2601 | uint64_t i64; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2602 | GDBState *s; |
| 2603 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2604 | s = gdbserver_state; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2605 | if (!s) |
| 2606 | return; |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2607 | s->current_syscall_cb = cb; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2608 | #ifndef CONFIG_USER_ONLY |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2609 | vm_stop(RUN_STATE_DEBUG); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2610 | #endif |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2611 | va_start(va, fmt); |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2612 | p = s->syscall_buf; |
| 2613 | p_end = &s->syscall_buf[sizeof(s->syscall_buf)]; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2614 | *(p++) = 'F'; |
| 2615 | while (*fmt) { |
| 2616 | if (*fmt == '%') { |
| 2617 | fmt++; |
| 2618 | switch (*fmt++) { |
| 2619 | case 'x': |
| 2620 | addr = va_arg(va, target_ulong); |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2621 | p += snprintf(p, p_end - p, TARGET_FMT_lx, addr); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2622 | break; |
pbrook | a87295e | 2007-05-26 15:09:38 +0000 | [diff] [blame] | 2623 | case 'l': |
| 2624 | if (*(fmt++) != 'x') |
| 2625 | goto bad_format; |
| 2626 | i64 = va_arg(va, uint64_t); |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2627 | p += snprintf(p, p_end - p, "%" PRIx64, i64); |
pbrook | a87295e | 2007-05-26 15:09:38 +0000 | [diff] [blame] | 2628 | break; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2629 | case 's': |
| 2630 | addr = va_arg(va, target_ulong); |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2631 | p += snprintf(p, p_end - p, TARGET_FMT_lx "/%x", |
blueswir1 | 363a37d | 2008-08-21 17:58:08 +0000 | [diff] [blame] | 2632 | addr, va_arg(va, int)); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2633 | break; |
| 2634 | default: |
pbrook | a87295e | 2007-05-26 15:09:38 +0000 | [diff] [blame] | 2635 | bad_format: |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2636 | fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n", |
| 2637 | fmt - 1); |
| 2638 | break; |
| 2639 | } |
| 2640 | } else { |
| 2641 | *(p++) = *(fmt++); |
| 2642 | } |
| 2643 | } |
pbrook | 8a93e02 | 2007-08-06 13:19:15 +0000 | [diff] [blame] | 2644 | *p = 0; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2645 | va_end(va); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2646 | #ifdef CONFIG_USER_ONLY |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2647 | put_packet(s, s->syscall_buf); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2648 | gdb_handlesig(s->c_cpu, 0); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2649 | #else |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 2650 | /* In this case wait to send the syscall packet until notification that |
| 2651 | the CPU has stopped. This must be done because if the packet is sent |
| 2652 | now the reply from the syscall request could be received while the CPU |
| 2653 | is still in the running state, which can cause packets to be dropped |
| 2654 | and state transition 'T' packets to be sent while the syscall is still |
| 2655 | being processed. */ |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 2656 | cpu_exit(s->c_cpu); |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2657 | #endif |
| 2658 | } |
| 2659 | |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 2660 | static void gdb_read_byte(GDBState *s, int ch) |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2661 | { |
| 2662 | int i, csum; |
ths | 60fe76f | 2007-12-16 03:02:09 +0000 | [diff] [blame] | 2663 | uint8_t reply; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2664 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2665 | #ifndef CONFIG_USER_ONLY |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2666 | if (s->last_packet_len) { |
| 2667 | /* Waiting for a response to the last packet. If we see the start |
| 2668 | of a new command then abandon the previous response. */ |
| 2669 | if (ch == '-') { |
| 2670 | #ifdef DEBUG_GDB |
| 2671 | printf("Got NACK, retransmitting\n"); |
| 2672 | #endif |
ths | ffe8ab8 | 2007-12-16 03:16:05 +0000 | [diff] [blame] | 2673 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2674 | } |
| 2675 | #ifdef DEBUG_GDB |
| 2676 | else if (ch == '+') |
| 2677 | printf("Got ACK\n"); |
| 2678 | else |
| 2679 | printf("Got '%c' when expecting ACK/NACK\n", ch); |
| 2680 | #endif |
| 2681 | if (ch == '+' || ch == '$') |
| 2682 | s->last_packet_len = 0; |
| 2683 | if (ch != '$') |
| 2684 | return; |
| 2685 | } |
Luiz Capitulino | 1354869 | 2011-07-29 15:36:43 -0300 | [diff] [blame] | 2686 | if (runstate_is_running()) { |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2687 | /* when the CPU is running, we cannot do anything except stop |
| 2688 | it when receiving a char */ |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2689 | vm_stop(RUN_STATE_PAUSED); |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 2690 | } else |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2691 | #endif |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 2692 | { |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2693 | switch(s->state) { |
| 2694 | case RS_IDLE: |
| 2695 | if (ch == '$') { |
| 2696 | s->line_buf_index = 0; |
| 2697 | s->state = RS_GETLINE; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 2698 | } |
| 2699 | break; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2700 | case RS_GETLINE: |
| 2701 | if (ch == '#') { |
| 2702 | s->state = RS_CHKSUM1; |
| 2703 | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { |
| 2704 | s->state = RS_IDLE; |
| 2705 | } else { |
| 2706 | s->line_buf[s->line_buf_index++] = ch; |
| 2707 | } |
| 2708 | break; |
| 2709 | case RS_CHKSUM1: |
| 2710 | s->line_buf[s->line_buf_index] = '\0'; |
| 2711 | s->line_csum = fromhex(ch) << 4; |
| 2712 | s->state = RS_CHKSUM2; |
| 2713 | break; |
| 2714 | case RS_CHKSUM2: |
| 2715 | s->line_csum |= fromhex(ch); |
| 2716 | csum = 0; |
| 2717 | for(i = 0; i < s->line_buf_index; i++) { |
| 2718 | csum += s->line_buf[i]; |
| 2719 | } |
| 2720 | if (s->line_csum != (csum & 0xff)) { |
ths | 60fe76f | 2007-12-16 03:02:09 +0000 | [diff] [blame] | 2721 | reply = '-'; |
| 2722 | put_buffer(s, &reply, 1); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2723 | s->state = RS_IDLE; |
| 2724 | } else { |
ths | 60fe76f | 2007-12-16 03:02:09 +0000 | [diff] [blame] | 2725 | reply = '+'; |
| 2726 | put_buffer(s, &reply, 1); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2727 | s->state = gdb_handle_packet(s, s->line_buf); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2728 | } |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 2729 | break; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2730 | default: |
| 2731 | abort(); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 2732 | } |
| 2733 | } |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2734 | } |
| 2735 | |
Paul Brook | 0e1c9c5 | 2010-06-16 13:03:51 +0100 | [diff] [blame] | 2736 | /* Tell the remote gdb that the process has exited. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2737 | void gdb_exit(CPUArchState *env, int code) |
Paul Brook | 0e1c9c5 | 2010-06-16 13:03:51 +0100 | [diff] [blame] | 2738 | { |
| 2739 | GDBState *s; |
| 2740 | char buf[4]; |
| 2741 | |
| 2742 | s = gdbserver_state; |
| 2743 | if (!s) { |
| 2744 | return; |
| 2745 | } |
| 2746 | #ifdef CONFIG_USER_ONLY |
| 2747 | if (gdbserver_fd < 0 || s->fd < 0) { |
| 2748 | return; |
| 2749 | } |
| 2750 | #endif |
| 2751 | |
| 2752 | snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code); |
| 2753 | put_packet(s, buf); |
Fabien Chouteau | e2af15b | 2011-01-13 12:46:57 +0100 | [diff] [blame] | 2754 | |
| 2755 | #ifndef CONFIG_USER_ONLY |
| 2756 | if (s->chr) { |
Anthony Liguori | 70f24fb | 2011-08-15 11:17:38 -0500 | [diff] [blame] | 2757 | qemu_chr_delete(s->chr); |
Fabien Chouteau | e2af15b | 2011-01-13 12:46:57 +0100 | [diff] [blame] | 2758 | } |
| 2759 | #endif |
Paul Brook | 0e1c9c5 | 2010-06-16 13:03:51 +0100 | [diff] [blame] | 2760 | } |
| 2761 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2762 | #ifdef CONFIG_USER_ONLY |
| 2763 | int |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2764 | gdb_queuesig (void) |
| 2765 | { |
| 2766 | GDBState *s; |
| 2767 | |
| 2768 | s = gdbserver_state; |
| 2769 | |
| 2770 | if (gdbserver_fd < 0 || s->fd < 0) |
| 2771 | return 0; |
| 2772 | else |
| 2773 | return 1; |
| 2774 | } |
| 2775 | |
| 2776 | int |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2777 | gdb_handlesig (CPUArchState *env, int sig) |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2778 | { |
| 2779 | GDBState *s; |
| 2780 | char buf[256]; |
| 2781 | int n; |
| 2782 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2783 | s = gdbserver_state; |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 2784 | if (gdbserver_fd < 0 || s->fd < 0) |
| 2785 | return sig; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2786 | |
| 2787 | /* disable single step if it was enabled */ |
| 2788 | cpu_single_step(env, 0); |
| 2789 | tb_flush(env); |
| 2790 | |
| 2791 | if (sig != 0) |
| 2792 | { |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2793 | snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig)); |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2794 | put_packet(s, buf); |
| 2795 | } |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 2796 | /* put_packet() might have detected that the peer terminated the |
| 2797 | connection. */ |
| 2798 | if (s->fd < 0) |
| 2799 | return sig; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2800 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2801 | sig = 0; |
| 2802 | s->state = RS_IDLE; |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 2803 | s->running_state = 0; |
| 2804 | while (s->running_state == 0) { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2805 | n = read (s->fd, buf, 256); |
| 2806 | if (n > 0) |
| 2807 | { |
| 2808 | int i; |
| 2809 | |
| 2810 | for (i = 0; i < n; i++) |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 2811 | gdb_read_byte (s, buf[i]); |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2812 | } |
| 2813 | else if (n == 0 || errno != EAGAIN) |
| 2814 | { |
Stefan Weil | e7d8100 | 2011-12-10 00:19:46 +0100 | [diff] [blame] | 2815 | /* XXX: Connection closed. Should probably wait for another |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2816 | connection before continuing. */ |
| 2817 | return sig; |
| 2818 | } |
bellard | 4162503 | 2005-04-24 10:07:11 +0000 | [diff] [blame] | 2819 | } |
edgar_igl | 1f487ee | 2008-05-17 22:20:53 +0000 | [diff] [blame] | 2820 | sig = s->signal; |
| 2821 | s->signal = 0; |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2822 | return sig; |
| 2823 | } |
bellard | e900967 | 2005-04-26 20:42:36 +0000 | [diff] [blame] | 2824 | |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2825 | /* Tell the remote gdb that the process has exited due to SIG. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2826 | void gdb_signalled(CPUArchState *env, int sig) |
aurel32 | ca587a8 | 2008-12-18 22:44:13 +0000 | [diff] [blame] | 2827 | { |
| 2828 | GDBState *s; |
| 2829 | char buf[4]; |
| 2830 | |
| 2831 | s = gdbserver_state; |
| 2832 | if (gdbserver_fd < 0 || s->fd < 0) |
| 2833 | return; |
| 2834 | |
| 2835 | snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig)); |
| 2836 | put_packet(s, buf); |
| 2837 | } |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 2838 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2839 | static void gdb_accept(void) |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2840 | { |
| 2841 | GDBState *s; |
| 2842 | struct sockaddr_in sockaddr; |
| 2843 | socklen_t len; |
| 2844 | int val, fd; |
| 2845 | |
| 2846 | for(;;) { |
| 2847 | len = sizeof(sockaddr); |
| 2848 | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len); |
| 2849 | if (fd < 0 && errno != EINTR) { |
| 2850 | perror("accept"); |
| 2851 | return; |
| 2852 | } else if (fd >= 0) { |
Kevin Wolf | 40ff6d7 | 2009-12-02 12:24:42 +0100 | [diff] [blame] | 2853 | #ifndef _WIN32 |
| 2854 | fcntl(fd, F_SETFD, FD_CLOEXEC); |
| 2855 | #endif |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2856 | break; |
| 2857 | } |
| 2858 | } |
| 2859 | |
| 2860 | /* set short latency */ |
| 2861 | val = 1; |
bellard | 8f447cc | 2006-06-14 15:21:14 +0000 | [diff] [blame] | 2862 | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2863 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2864 | s = g_malloc0(sizeof(GDBState)); |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2865 | s->c_cpu = first_cpu; |
| 2866 | s->g_cpu = first_cpu; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2867 | s->fd = fd; |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2868 | gdb_has_xml = 0; |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2869 | |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2870 | gdbserver_state = s; |
pbrook | a2d1eba | 2007-01-28 03:10:55 +0000 | [diff] [blame] | 2871 | |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2872 | fcntl(fd, F_SETFL, O_NONBLOCK); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2873 | } |
| 2874 | |
| 2875 | static int gdbserver_open(int port) |
| 2876 | { |
| 2877 | struct sockaddr_in sockaddr; |
| 2878 | int fd, val, ret; |
| 2879 | |
| 2880 | fd = socket(PF_INET, SOCK_STREAM, 0); |
| 2881 | if (fd < 0) { |
| 2882 | perror("socket"); |
| 2883 | return -1; |
| 2884 | } |
Kevin Wolf | 40ff6d7 | 2009-12-02 12:24:42 +0100 | [diff] [blame] | 2885 | #ifndef _WIN32 |
| 2886 | fcntl(fd, F_SETFD, FD_CLOEXEC); |
| 2887 | #endif |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2888 | |
| 2889 | /* allow fast reuse */ |
| 2890 | val = 1; |
bellard | 8f447cc | 2006-06-14 15:21:14 +0000 | [diff] [blame] | 2891 | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2892 | |
| 2893 | sockaddr.sin_family = AF_INET; |
| 2894 | sockaddr.sin_port = htons(port); |
| 2895 | sockaddr.sin_addr.s_addr = 0; |
| 2896 | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); |
| 2897 | if (ret < 0) { |
| 2898 | perror("bind"); |
Peter Maydell | bb16172 | 2011-12-24 23:37:24 +0000 | [diff] [blame] | 2899 | close(fd); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2900 | return -1; |
| 2901 | } |
| 2902 | ret = listen(fd, 0); |
| 2903 | if (ret < 0) { |
| 2904 | perror("listen"); |
Peter Maydell | bb16172 | 2011-12-24 23:37:24 +0000 | [diff] [blame] | 2905 | close(fd); |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2906 | return -1; |
| 2907 | } |
bellard | 858693c | 2004-03-31 18:52:07 +0000 | [diff] [blame] | 2908 | return fd; |
| 2909 | } |
| 2910 | |
| 2911 | int gdbserver_start(int port) |
| 2912 | { |
| 2913 | gdbserver_fd = gdbserver_open(port); |
| 2914 | if (gdbserver_fd < 0) |
| 2915 | return -1; |
| 2916 | /* accept connections */ |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2917 | gdb_accept(); |
bellard | b4608c0 | 2003-06-27 17:34:32 +0000 | [diff] [blame] | 2918 | return 0; |
| 2919 | } |
aurel32 | 2b1319c | 2008-12-18 22:44:04 +0000 | [diff] [blame] | 2920 | |
| 2921 | /* Disable gdb stub for child processes. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 2922 | void gdbserver_fork(CPUArchState *env) |
aurel32 | 2b1319c | 2008-12-18 22:44:04 +0000 | [diff] [blame] | 2923 | { |
| 2924 | GDBState *s = gdbserver_state; |
edgar_igl | 9f6164d | 2009-01-07 10:22:28 +0000 | [diff] [blame] | 2925 | if (gdbserver_fd < 0 || s->fd < 0) |
aurel32 | 2b1319c | 2008-12-18 22:44:04 +0000 | [diff] [blame] | 2926 | return; |
| 2927 | close(s->fd); |
| 2928 | s->fd = -1; |
| 2929 | cpu_breakpoint_remove_all(env, BP_GDB); |
| 2930 | cpu_watchpoint_remove_all(env, BP_GDB); |
| 2931 | } |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2932 | #else |
ths | aa1f17c | 2007-07-11 22:48:58 +0000 | [diff] [blame] | 2933 | static int gdb_chr_can_receive(void *opaque) |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2934 | { |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2935 | /* We can handle an arbitrarily large amount of data. |
| 2936 | Pick the maximum packet size, which is as good as anything. */ |
| 2937 | return MAX_PACKET_LENGTH; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2938 | } |
| 2939 | |
ths | aa1f17c | 2007-07-11 22:48:58 +0000 | [diff] [blame] | 2940 | static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2941 | { |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2942 | int i; |
| 2943 | |
| 2944 | for (i = 0; i < size; i++) { |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 2945 | gdb_read_byte(gdbserver_state, buf[i]); |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2946 | } |
| 2947 | } |
| 2948 | |
| 2949 | static void gdb_chr_event(void *opaque, int event) |
| 2950 | { |
| 2951 | switch (event) { |
Amit Shah | b6b8df5 | 2009-10-07 18:31:16 +0530 | [diff] [blame] | 2952 | case CHR_EVENT_OPENED: |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2953 | vm_stop(RUN_STATE_PAUSED); |
pbrook | 56aebc8 | 2008-10-11 17:55:29 +0000 | [diff] [blame] | 2954 | gdb_has_xml = 0; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 2955 | break; |
| 2956 | default: |
| 2957 | break; |
| 2958 | } |
| 2959 | } |
| 2960 | |
aliguori | 8a34a0f | 2009-03-05 23:01:55 +0000 | [diff] [blame] | 2961 | static void gdb_monitor_output(GDBState *s, const char *msg, int len) |
| 2962 | { |
| 2963 | char buf[MAX_PACKET_LENGTH]; |
| 2964 | |
| 2965 | buf[0] = 'O'; |
| 2966 | if (len > (MAX_PACKET_LENGTH/2) - 1) |
| 2967 | len = (MAX_PACKET_LENGTH/2) - 1; |
| 2968 | memtohex(buf + 1, (uint8_t *)msg, len); |
| 2969 | put_packet(s, buf); |
| 2970 | } |
| 2971 | |
| 2972 | static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len) |
| 2973 | { |
| 2974 | const char *p = (const char *)buf; |
| 2975 | int max_sz; |
| 2976 | |
| 2977 | max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2; |
| 2978 | for (;;) { |
| 2979 | if (len <= max_sz) { |
| 2980 | gdb_monitor_output(gdbserver_state, p, len); |
| 2981 | break; |
| 2982 | } |
| 2983 | gdb_monitor_output(gdbserver_state, p, max_sz); |
| 2984 | p += max_sz; |
| 2985 | len -= max_sz; |
| 2986 | } |
| 2987 | return len; |
| 2988 | } |
| 2989 | |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 2990 | #ifndef _WIN32 |
| 2991 | static void gdb_sigterm_handler(int signal) |
| 2992 | { |
Luiz Capitulino | 1354869 | 2011-07-29 15:36:43 -0300 | [diff] [blame] | 2993 | if (runstate_is_running()) { |
Luiz Capitulino | 0461d5a | 2011-09-30 14:45:27 -0300 | [diff] [blame] | 2994 | vm_stop(RUN_STATE_PAUSED); |
Jan Kiszka | e07bbac | 2011-02-09 16:29:40 +0100 | [diff] [blame] | 2995 | } |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 2996 | } |
| 2997 | #endif |
| 2998 | |
| 2999 | int gdbserver_start(const char *device) |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 3000 | { |
| 3001 | GDBState *s; |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 3002 | char gdbstub_device_name[128]; |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3003 | CharDriverState *chr = NULL; |
| 3004 | CharDriverState *mon_chr; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 3005 | |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 3006 | if (!device) |
| 3007 | return -1; |
| 3008 | if (strcmp(device, "none") != 0) { |
| 3009 | if (strstart(device, "tcp:", NULL)) { |
| 3010 | /* enforce required TCP attributes */ |
| 3011 | snprintf(gdbstub_device_name, sizeof(gdbstub_device_name), |
| 3012 | "%s,nowait,nodelay,server", device); |
| 3013 | device = gdbstub_device_name; |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3014 | } |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 3015 | #ifndef _WIN32 |
| 3016 | else if (strcmp(device, "stdio") == 0) { |
| 3017 | struct sigaction act; |
pbrook | cfc3475 | 2007-02-22 01:48:01 +0000 | [diff] [blame] | 3018 | |
aliguori | 59030a8 | 2009-04-05 18:43:41 +0000 | [diff] [blame] | 3019 | memset(&act, 0, sizeof(act)); |
| 3020 | act.sa_handler = gdb_sigterm_handler; |
| 3021 | sigaction(SIGINT, &act, NULL); |
| 3022 | } |
| 3023 | #endif |
Anthony Liguori | 27143a4 | 2011-08-15 11:17:36 -0500 | [diff] [blame] | 3024 | chr = qemu_chr_new("gdb", device, NULL); |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3025 | if (!chr) |
| 3026 | return -1; |
| 3027 | |
| 3028 | qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
| 3029 | gdb_chr_event, NULL); |
pbrook | cfc3475 | 2007-02-22 01:48:01 +0000 | [diff] [blame] | 3030 | } |
| 3031 | |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3032 | s = gdbserver_state; |
| 3033 | if (!s) { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3034 | s = g_malloc0(sizeof(GDBState)); |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3035 | gdbserver_state = s; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 3036 | |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3037 | qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL); |
| 3038 | |
| 3039 | /* Initialize a monitor terminal for gdb */ |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3040 | mon_chr = g_malloc0(sizeof(*mon_chr)); |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3041 | mon_chr->chr_write = gdb_monitor_write; |
| 3042 | monitor_init(mon_chr, 0); |
| 3043 | } else { |
| 3044 | if (s->chr) |
Anthony Liguori | 70f24fb | 2011-08-15 11:17:38 -0500 | [diff] [blame] | 3045 | qemu_chr_delete(s->chr); |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3046 | mon_chr = s->mon_chr; |
| 3047 | memset(s, 0, sizeof(GDBState)); |
| 3048 | } |
aliguori | 880a757 | 2008-11-18 20:30:24 +0000 | [diff] [blame] | 3049 | s->c_cpu = first_cpu; |
| 3050 | s->g_cpu = first_cpu; |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 3051 | s->chr = chr; |
aliguori | 36556b2 | 2009-03-28 18:05:53 +0000 | [diff] [blame] | 3052 | s->state = chr ? RS_IDLE : RS_INACTIVE; |
| 3053 | s->mon_chr = mon_chr; |
Meador Inge | cdb432b | 2012-03-15 17:49:45 +0000 | [diff] [blame] | 3054 | s->current_syscall_cb = NULL; |
aliguori | 8a34a0f | 2009-03-05 23:01:55 +0000 | [diff] [blame] | 3055 | |
pbrook | 4046d91 | 2007-01-28 01:53:16 +0000 | [diff] [blame] | 3056 | return 0; |
| 3057 | } |
| 3058 | #endif |