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Michal Simek00914b72011-03-14 11:29:19 +01001/*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan ml605
3 * board.
4 *
5 * Copyright (c) 2011 Michal Simek <monstr@monstr.eu>
6 * Copyright (c) 2011 PetaLogix
7 * Copyright (c) 2009 Edgar E. Iglesias.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
Peter Maydell8fd9dec2016-01-26 18:05:31 +000028#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010029#include "qapi/error.h"
Paolo Bonzini4771d752016-01-19 21:51:44 +010030#include "qemu-common.h"
31#include "cpu.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010032#include "hw/sysbus.h"
33#include "hw/hw.h"
Paolo Bonzini1422e322012-10-24 08:43:34 +020034#include "net/net.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010035#include "hw/block/flash.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010036#include "sysemu/sysemu.h"
Peter Maydellbd2be152013-04-09 15:26:55 +010037#include "hw/devices.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010038#include "hw/boards.h"
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +020039#include "sysemu/block-backend.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010040#include "hw/char/serial.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010041#include "exec/address-spaces.h"
Alistair Francis8fd06712016-01-21 14:15:03 +000042#include "hw/ssi/ssi.h"
Michal Simek00914b72011-03-14 11:29:19 +010043
Paolo Bonzini47b43a12013-03-18 17:36:02 +010044#include "boot.h"
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +100045
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010046#include "hw/stream.h"
Michal Simek00914b72011-03-14 11:29:19 +010047
48#define LMB_BRAM_SIZE (128 * 1024)
49#define FLASH_SIZE (32 * 1024 * 1024)
50
Peter A. G. Crosthwaited94e7432012-03-04 21:03:51 +100051#define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
Michal Simek00914b72011-03-14 11:29:19 +010052
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +100053#define NUM_SPI_FLASHES 4
54
Peter Crosthwaite81741962014-02-25 16:39:29 -080055#define SPI_BASEADDR 0x40a00000
Peter A. G. Crosthwaited94e7432012-03-04 21:03:51 +100056#define MEMORY_BASEADDR 0x50000000
57#define FLASH_BASEADDR 0x86000000
58#define INTC_BASEADDR 0x81800000
59#define TIMER_BASEADDR 0x83c00000
60#define UART16550_BASEADDR 0x83e00000
61#define AXIENET_BASEADDR 0x82780000
62#define AXIDMA_BASEADDR 0x84600000
Michal Simek00914b72011-03-14 11:29:19 +010063
Peter Crosthwaite81741962014-02-25 16:39:29 -080064#define AXIDMA_IRQ1 0
65#define AXIDMA_IRQ0 1
66#define TIMER_IRQ 2
67#define AXIENET_IRQ 3
68#define SPI_IRQ 4
69#define UART16550_IRQ 5
70
Michal Simek00914b72011-03-14 11:29:19 +010071static void
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +030072petalogix_ml605_init(MachineState *machine)
Michal Simek00914b72011-03-14 11:29:19 +010073{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +030074 ram_addr_t ram_size = machine->ram_size;
Richard Henderson39186d82011-08-11 16:07:16 -070075 MemoryRegion *address_space_mem = get_system_memory();
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +100076 DeviceState *dev, *dma, *eth0;
Peter Crosthwaite42bb9c92013-04-16 10:28:35 +100077 Object *ds, *cs;
Andreas Färbera9480e52012-05-05 12:19:03 +020078 MicroBlazeCPU *cpu;
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +100079 SysBusDevice *busdev;
Michal Simek00914b72011-03-14 11:29:19 +010080 DriveInfo *dinfo;
81 int i;
Avi Kivityd7973c72011-09-12 15:27:25 +030082 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
83 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
Alistair Francis73c69452014-01-13 13:35:26 +100084 qemu_irq irq[32];
Michal Simek00914b72011-03-14 11:29:19 +010085
86 /* init CPUs */
Edgar E. Iglesiasa4550442013-12-16 12:44:20 +100087 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
Edgar E. Iglesiasa7e00e22015-11-13 17:11:51 +010088 object_property_set_str(OBJECT(cpu), "8.10.a", "version", &error_abort);
Alistair Francis4e5d45a2015-05-29 16:31:58 +100089 /* Use FPU but don't use floating point conversion and square
90 * root instructions
91 */
92 object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort);
Alistair Francisa6c3ed22015-06-18 21:16:32 -070093 object_property_set_bool(OBJECT(cpu), true, "dcache-writeback",
94 &error_abort);
Alistair Francisa88bbb02015-06-18 21:16:35 -070095 object_property_set_bool(OBJECT(cpu), true, "endianness", &error_abort);
Edgar E. Iglesiasa4550442013-12-16 12:44:20 +100096 object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
Michal Simek00914b72011-03-14 11:29:19 +010097
Michal Simek00914b72011-03-14 11:29:19 +010098 /* Attach emulated BRAM through the LMB. */
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -040099 memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200100 LMB_BRAM_SIZE, &error_fatal);
Avi Kivityc5705a72011-12-20 15:59:12 +0200101 vmstate_register_ram_global(phys_lmb_bram);
Avi Kivityd7973c72011-09-12 15:27:25 +0300102 memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
Michal Simek00914b72011-03-14 11:29:19 +0100103
Hu Tao49946532014-09-09 13:27:55 +0800104 memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size,
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200105 &error_fatal);
Avi Kivityc5705a72011-12-20 15:59:12 +0200106 vmstate_register_ram_global(phys_ram);
Peter Crosthwaitef55f8852014-08-17 17:52:38 -0700107 memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram);
Michal Simek00914b72011-03-14 11:29:19 +0100108
Michal Simek00914b72011-03-14 11:29:19 +0100109 dinfo = drive_get(IF_PFLASH, 0, 0);
110 /* 5th parameter 2 means bank-width
111 * 10th paremeter 0 means little-endian */
Avi Kivitycfe5f012011-08-04 15:55:30 +0300112 pflash_cfi01_register(FLASH_BASEADDR,
113 NULL, "petalogix_ml605.flash", FLASH_SIZE,
Markus Armbruster4be74632014-10-07 13:59:18 +0200114 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +0200115 (64 * 1024), FLASH_SIZE >> 16,
Anthony Liguori01e04512011-08-25 14:39:18 -0500116 2, 0x89, 0x18, 0x0000, 0x0, 0);
Michal Simek00914b72011-03-14 11:29:19 +0100117
118
Peter Crosthwaite13c9bfb2014-02-25 16:40:04 -0800119 dev = qdev_create(NULL, "xlnx.xps-intc");
120 qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ);
121 qdev_init_nofail(dev);
122 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
123 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
124 qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
Michal Simek00914b72011-03-14 11:29:19 +0100125 for (i = 0; i < 32; i++) {
126 irq[i] = qdev_get_gpio_in(dev, i);
127 }
128
Richard Henderson39186d82011-08-11 16:07:16 -0700129 serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
Peter Crosthwaite81741962014-02-25 16:39:29 -0800130 irq[UART16550_IRQ], 115200, serial_hds[0],
131 DEVICE_LITTLE_ENDIAN);
Michal Simek00914b72011-03-14 11:29:19 +0100132
133 /* 2 timers at irq 2 @ 100 Mhz. */
Peter Crosthwaite29873712014-02-25 16:40:39 -0800134 dev = qdev_create(NULL, "xlnx.xps-timer");
135 qdev_prop_set_uint32(dev, "one-timer-only", 0);
136 qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000);
137 qdev_init_nofail(dev);
138 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
139 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
Michal Simek00914b72011-03-14 11:29:19 +0100140
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +1000141 /* axi ethernet and dma initialization. */
Peter Crosthwaitedada5c72013-02-12 11:17:10 +1000142 qemu_check_nic_model(&nd_table[0], "xlnx.axi-ethernet");
143 eth0 = qdev_create(NULL, "xlnx.axi-ethernet");
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +1000144 dma = qdev_create(NULL, "xlnx.axi-dma");
Michal Simek00914b72011-03-14 11:29:19 +0100145
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +1000146 /* FIXME: attach to the sysbus instead */
Peter Crosthwaiteb19ceaa2013-04-16 10:24:39 +1000147 object_property_add_child(qdev_get_machine(), "xilinx-eth", OBJECT(eth0),
148 NULL);
Peter Crosthwaite54ff2a32013-04-16 10:23:59 +1000149 object_property_add_child(qdev_get_machine(), "xilinx-dma", OBJECT(dma),
150 NULL);
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +1000151
Peter Crosthwaite42bb9c92013-04-16 10:28:35 +1000152 ds = object_property_get_link(OBJECT(dma),
153 "axistream-connected-target", NULL);
154 cs = object_property_get_link(OBJECT(dma),
155 "axistream-control-connected-target", NULL);
Peter Crosthwaited91a68a2014-02-25 16:41:49 -0800156 qdev_set_nic_properties(eth0, &nd_table[0]);
157 qdev_prop_set_uint32(eth0, "rxmem", 0x1000);
158 qdev_prop_set_uint32(eth0, "txmem", 0x1000);
159 object_property_set_link(OBJECT(eth0), OBJECT(ds),
160 "axistream-connected", &error_abort);
161 object_property_set_link(OBJECT(eth0), OBJECT(cs),
162 "axistream-control-connected", &error_abort);
163 qdev_init_nofail(eth0);
164 sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR);
165 sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]);
Peter A. G. Crosthwaite669b4982012-08-10 13:16:11 +1000166
Peter Crosthwaite42bb9c92013-04-16 10:28:35 +1000167 ds = object_property_get_link(OBJECT(eth0),
168 "axistream-connected-target", NULL);
169 cs = object_property_get_link(OBJECT(eth0),
170 "axistream-control-connected-target", NULL);
Peter Crosthwaited91a68a2014-02-25 16:41:49 -0800171 qdev_prop_set_uint32(dma, "freqhz", 100 * 1000000);
172 object_property_set_link(OBJECT(dma), OBJECT(ds),
173 "axistream-connected", &error_abort);
174 object_property_set_link(OBJECT(dma), OBJECT(cs),
175 "axistream-control-connected", &error_abort);
176 qdev_init_nofail(dma);
177 sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR);
178 sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]);
179 sysbus_connect_irq(SYS_BUS_DEVICE(dma), 1, irq[AXIDMA_IRQ1]);
Michal Simek00914b72011-03-14 11:29:19 +0100180
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +1000181 {
182 SSIBus *spi;
183
184 dev = qdev_create(NULL, "xlnx.xps-spi");
185 qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES);
186 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +0100187 busdev = SYS_BUS_DEVICE(dev);
Peter Crosthwaite81741962014-02-25 16:39:29 -0800188 sysbus_mmio_map(busdev, 0, SPI_BASEADDR);
189 sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]);
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +1000190
191 spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
192
193 for (i = 0; i < NUM_SPI_FLASHES; i++) {
Paolo Bonzini73bce512016-07-04 13:06:37 +0100194 DriveInfo *dinfo = drive_get_next(IF_MTD);
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +1000195 qemu_irq cs_line;
196
Paolo Bonzini73bce512016-07-04 13:06:37 +0100197 dev = ssi_create_slave_no_init(spi, "n25q128");
198 if (dinfo) {
199 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
200 &error_fatal);
201 }
202 qdev_init_nofail(dev);
203
Peter Crosthwaitede779142014-05-19 23:31:33 -0700204 cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
Peter A. G. Crosthwaiteacd3b6b2012-03-27 17:57:47 +1000205 sysbus_connect_irq(busdev, i+1, cs_line);
206 }
207 }
208
Alistair Francisa87310a2015-06-18 21:16:45 -0700209 /* setup PVR to match kernel settings */
210 cpu->env.pvr.regs[4] = 0xc56b8000;
211 cpu->env.pvr.regs[5] = 0xc56be000;
212 cpu->env.pvr.regs[10] = 0x0e000000; /* virtex 6 */
213
Peter Crosthwaitef55f8852014-08-17 17:52:38 -0700214 microblaze_load_kernel(cpu, MEMORY_BASEADDR, ram_size,
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300215 machine->initrd_filename,
Edgar E. Iglesiasd0b022a2013-05-05 10:52:41 +0200216 BINARY_DEVICE_TREE_FILE,
Alistair Francisa87310a2015-06-18 21:16:45 -0700217 NULL);
Michal Simek00914b72011-03-14 11:29:19 +0100218
Michal Simek00914b72011-03-14 11:29:19 +0100219}
220
Eduardo Habkoste264d292015-09-04 15:37:08 -0300221static void petalogix_ml605_machine_init(MachineClass *mc)
Michal Simek00914b72011-03-14 11:29:19 +0100222{
Eduardo Habkoste264d292015-09-04 15:37:08 -0300223 mc->desc = "PetaLogix linux refdesign for xilinx ml605 little endian";
224 mc->init = petalogix_ml605_init;
225 mc->is_default = 0;
Michal Simek00914b72011-03-14 11:29:19 +0100226}
227
Eduardo Habkoste264d292015-09-04 15:37:08 -0300228DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init)