bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU Sparc32 DMA controller emulation |
| 3 | * |
| 4 | * Copyright (c) 2006 Fabrice Bellard |
| 5 | * |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 6 | * Modifications: |
| 7 | * 2010-Feb-14 Artyom Tarasenko : reworked irq generation |
| 8 | * |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 9 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 10 | * of this software and associated documentation files (the "Software"), to deal |
| 11 | * in the Software without restriction, including without limitation the rights |
| 12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 13 | * copies of the Software, and to permit persons to whom the Software is |
| 14 | * furnished to do so, subject to the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice shall be included in |
| 17 | * all copies or substantial portions of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 22 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 25 | * THE SOFTWARE. |
| 26 | */ |
Blue Swirl | 6f6260c | 2009-07-15 20:45:19 +0000 | [diff] [blame] | 27 | |
Peter Maydell | 0430891 | 2016-01-26 18:17:30 +0000 | [diff] [blame] | 28 | #include "qemu/osdep.h" |
Markus Armbruster | 64552b6 | 2019-08-12 07:23:42 +0200 | [diff] [blame] | 29 | #include "hw/irq.h" |
Markus Armbruster | a27bd6c | 2019-08-12 07:23:51 +0200 | [diff] [blame] | 30 | #include "hw/qdev-properties.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 31 | #include "hw/sparc/sparc32_dma.h" |
Mark Cave-Ayland | 1527f48 | 2018-01-08 18:16:34 +0000 | [diff] [blame] | 32 | #include "hw/sparc/sun4m_iommu.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 33 | #include "hw/sysbus.h" |
Markus Armbruster | d645427 | 2019-08-12 07:23:45 +0200 | [diff] [blame] | 34 | #include "migration/vmstate.h" |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 35 | #include "sysemu/dma.h" |
Mark Cave-Ayland | 6aa62ed | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 36 | #include "qapi/error.h" |
Markus Armbruster | 0b8fa32 | 2019-05-23 16:35:07 +0200 | [diff] [blame] | 37 | #include "qemu/module.h" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 38 | #include "trace.h" |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * This is the DMA controller part of chip STP2000 (Master I/O), also |
| 42 | * produced as NCR89C100. See |
| 43 | * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt |
| 44 | * and |
| 45 | * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/DMA2.txt |
| 46 | */ |
| 47 | |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 48 | #define DMA_SIZE (4 * sizeof(uint32_t)) |
blueswir1 | 09723aa | 2008-12-15 20:24:25 +0000 | [diff] [blame] | 49 | /* We need the mask, because one instance of the device is not page |
| 50 | aligned (ledma, start address 0x0010) */ |
| 51 | #define DMA_MASK (DMA_SIZE - 1) |
Bob Breuer | e0087e6 | 2010-12-20 11:55:33 -0600 | [diff] [blame] | 52 | /* OBP says 0x20 bytes for ledma, the extras are aliased to espdma */ |
Bob Breuer | 86d1c38 | 2010-12-18 11:09:04 -0600 | [diff] [blame] | 53 | #define DMA_ETH_SIZE (8 * sizeof(uint32_t)) |
| 54 | #define DMA_MAX_REG_OFFSET (2 * DMA_SIZE - 1) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 55 | |
| 56 | #define DMA_VER 0xa0000000 |
| 57 | #define DMA_INTR 1 |
| 58 | #define DMA_INTREN 0x10 |
| 59 | #define DMA_WRITE_MEM 0x100 |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 60 | #define DMA_EN 0x200 |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 61 | #define DMA_LOADED 0x04000000 |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 62 | #define DMA_DRAIN_FIFO 0x40 |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 63 | #define DMA_RESET 0x80 |
| 64 | |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 65 | /* XXX SCSI and ethernet should have different read-only bit masks */ |
| 66 | #define DMA_CSR_RO_MASK 0xfe000007 |
| 67 | |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 68 | enum { |
| 69 | GPIO_RESET = 0, |
| 70 | GPIO_DMA, |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 71 | }; |
| 72 | |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 73 | /* Note: on sparc, the lance 16 bit bus is swapped */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 74 | void ledma_memory_read(void *opaque, hwaddr addr, |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 75 | uint8_t *buf, int len, int do_bswap) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 76 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 77 | DMADeviceState *s = opaque; |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 78 | IOMMUState *is = (IOMMUState *)s->iommu; |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 79 | int i; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 80 | |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 81 | addr |= s->dmaregs[3]; |
Mark Cave-Ayland | 331b7fc | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 82 | trace_ledma_memory_read(addr, len); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 83 | if (do_bswap) { |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 84 | dma_memory_read(&is->iommu_as, addr, buf, len); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 85 | } else { |
| 86 | addr &= ~1; |
| 87 | len &= ~1; |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 88 | dma_memory_read(&is->iommu_as, addr, buf, len); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 89 | for(i = 0; i < len; i += 2) { |
| 90 | bswap16s((uint16_t *)(buf + i)); |
| 91 | } |
| 92 | } |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 93 | } |
| 94 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 95 | void ledma_memory_write(void *opaque, hwaddr addr, |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 96 | uint8_t *buf, int len, int do_bswap) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 97 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 98 | DMADeviceState *s = opaque; |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 99 | IOMMUState *is = (IOMMUState *)s->iommu; |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 100 | int l, i; |
| 101 | uint16_t tmp_buf[32]; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 102 | |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 103 | addr |= s->dmaregs[3]; |
Mark Cave-Ayland | 331b7fc | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 104 | trace_ledma_memory_write(addr, len); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 105 | if (do_bswap) { |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 106 | dma_memory_write(&is->iommu_as, addr, buf, len); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 107 | } else { |
| 108 | addr &= ~1; |
| 109 | len &= ~1; |
| 110 | while (len > 0) { |
| 111 | l = len; |
| 112 | if (l > sizeof(tmp_buf)) |
| 113 | l = sizeof(tmp_buf); |
| 114 | for(i = 0; i < l; i += 2) { |
| 115 | tmp_buf[i >> 1] = bswap16(*(uint16_t *)(buf + i)); |
| 116 | } |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 117 | dma_memory_write(&is->iommu_as, addr, tmp_buf, l); |
bellard | 9b94dc3 | 2006-09-03 19:48:17 +0000 | [diff] [blame] | 118 | len -= l; |
| 119 | buf += l; |
| 120 | addr += l; |
| 121 | } |
| 122 | } |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 123 | } |
| 124 | |
blueswir1 | 70c0de9 | 2007-05-27 16:36:10 +0000 | [diff] [blame] | 125 | static void dma_set_irq(void *opaque, int irq, int level) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 126 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 127 | DMADeviceState *s = opaque; |
blueswir1 | 70c0de9 | 2007-05-27 16:36:10 +0000 | [diff] [blame] | 128 | if (level) { |
blueswir1 | 70c0de9 | 2007-05-27 16:36:10 +0000 | [diff] [blame] | 129 | s->dmaregs[0] |= DMA_INTR; |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 130 | if (s->dmaregs[0] & DMA_INTREN) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 131 | trace_sparc32_dma_set_irq_raise(); |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 132 | qemu_irq_raise(s->irq); |
| 133 | } |
blueswir1 | 70c0de9 | 2007-05-27 16:36:10 +0000 | [diff] [blame] | 134 | } else { |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 135 | if (s->dmaregs[0] & DMA_INTR) { |
| 136 | s->dmaregs[0] &= ~DMA_INTR; |
| 137 | if (s->dmaregs[0] & DMA_INTREN) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 138 | trace_sparc32_dma_set_irq_lower(); |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 139 | qemu_irq_lower(s->irq); |
| 140 | } |
| 141 | } |
blueswir1 | 70c0de9 | 2007-05-27 16:36:10 +0000 | [diff] [blame] | 142 | } |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 143 | } |
| 144 | |
| 145 | void espdma_memory_read(void *opaque, uint8_t *buf, int len) |
| 146 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 147 | DMADeviceState *s = opaque; |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 148 | IOMMUState *is = (IOMMUState *)s->iommu; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 149 | |
Mark Cave-Ayland | 331b7fc | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 150 | trace_espdma_memory_read(s->dmaregs[1], len); |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 151 | dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 152 | s->dmaregs[1] += len; |
| 153 | } |
| 154 | |
| 155 | void espdma_memory_write(void *opaque, uint8_t *buf, int len) |
| 156 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 157 | DMADeviceState *s = opaque; |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 158 | IOMMUState *is = (IOMMUState *)s->iommu; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 159 | |
Mark Cave-Ayland | 331b7fc | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 160 | trace_espdma_memory_write(s->dmaregs[1], len); |
Mark Cave-Ayland | c413e9a | 2017-10-27 13:09:03 +0100 | [diff] [blame] | 161 | dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 162 | s->dmaregs[1] += len; |
| 163 | } |
| 164 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 165 | static uint64_t dma_mem_read(void *opaque, hwaddr addr, |
Avi Kivity | d6c5f06 | 2011-11-14 11:55:27 +0200 | [diff] [blame] | 166 | unsigned size) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 167 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 168 | DMADeviceState *s = opaque; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 169 | uint32_t saddr; |
| 170 | |
blueswir1 | 09723aa | 2008-12-15 20:24:25 +0000 | [diff] [blame] | 171 | saddr = (addr & DMA_MASK) >> 2; |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 172 | trace_sparc32_dma_mem_readl(addr, s->dmaregs[saddr]); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 173 | return s->dmaregs[saddr]; |
| 174 | } |
| 175 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 176 | static void dma_mem_write(void *opaque, hwaddr addr, |
Avi Kivity | d6c5f06 | 2011-11-14 11:55:27 +0200 | [diff] [blame] | 177 | uint64_t val, unsigned size) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 178 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 179 | DMADeviceState *s = opaque; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 180 | uint32_t saddr; |
| 181 | |
blueswir1 | 09723aa | 2008-12-15 20:24:25 +0000 | [diff] [blame] | 182 | saddr = (addr & DMA_MASK) >> 2; |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 183 | trace_sparc32_dma_mem_writel(addr, s->dmaregs[saddr], val); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 184 | switch (saddr) { |
| 185 | case 0: |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 186 | if (val & DMA_INTREN) { |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 187 | if (s->dmaregs[0] & DMA_INTR) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 188 | trace_sparc32_dma_set_irq_raise(); |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 189 | qemu_irq_raise(s->irq); |
| 190 | } |
| 191 | } else { |
| 192 | if (s->dmaregs[0] & (DMA_INTR | DMA_INTREN)) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 193 | trace_sparc32_dma_set_irq_lower(); |
Artyom Tarasenko | 6f57bbf | 2010-02-15 18:39:50 +0100 | [diff] [blame] | 194 | qemu_irq_lower(s->irq); |
| 195 | } |
pbrook | d537cf6 | 2007-04-07 18:14:41 +0000 | [diff] [blame] | 196 | } |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 197 | if (val & DMA_RESET) { |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 198 | qemu_irq_raise(s->gpio[GPIO_RESET]); |
| 199 | qemu_irq_lower(s->gpio[GPIO_RESET]); |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 200 | } else if (val & DMA_DRAIN_FIFO) { |
| 201 | val &= ~DMA_DRAIN_FIFO; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 202 | } else if (val == 0) |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 203 | val = DMA_DRAIN_FIFO; |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 204 | |
| 205 | if (val & DMA_EN && !(s->dmaregs[0] & DMA_EN)) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 206 | trace_sparc32_dma_enable_raise(); |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 207 | qemu_irq_raise(s->gpio[GPIO_DMA]); |
| 208 | } else if (!(val & DMA_EN) && !!(s->dmaregs[0] & DMA_EN)) { |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 209 | trace_sparc32_dma_enable_lower(); |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 210 | qemu_irq_lower(s->gpio[GPIO_DMA]); |
| 211 | } |
| 212 | |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 213 | val &= ~DMA_CSR_RO_MASK; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 214 | val |= DMA_VER; |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 215 | s->dmaregs[0] = (s->dmaregs[0] & DMA_CSR_RO_MASK) | val; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 216 | break; |
| 217 | case 1: |
| 218 | s->dmaregs[0] |= DMA_LOADED; |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 219 | /* fall through */ |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 220 | default: |
Artyom Tarasenko | 65899fe | 2010-05-22 10:38:56 +0200 | [diff] [blame] | 221 | s->dmaregs[saddr] = val; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 222 | break; |
| 223 | } |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 224 | } |
| 225 | |
Avi Kivity | d6c5f06 | 2011-11-14 11:55:27 +0200 | [diff] [blame] | 226 | static const MemoryRegionOps dma_mem_ops = { |
| 227 | .read = dma_mem_read, |
| 228 | .write = dma_mem_write, |
| 229 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 230 | .valid = { |
| 231 | .min_access_size = 4, |
| 232 | .max_access_size = 4, |
| 233 | }, |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 234 | }; |
| 235 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 236 | static void sparc32_dma_device_reset(DeviceState *d) |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 237 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 238 | DMADeviceState *s = SPARC32_DMA_DEVICE(d); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 239 | |
blueswir1 | 5aca8c3 | 2007-05-26 17:39:43 +0000 | [diff] [blame] | 240 | memset(s->dmaregs, 0, DMA_SIZE); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 241 | s->dmaregs[0] = DMA_VER; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 242 | } |
| 243 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 244 | static const VMStateDescription vmstate_sparc32_dma_device = { |
Blue Swirl | 75c497d | 2009-08-28 20:46:15 +0000 | [diff] [blame] | 245 | .name ="sparc32_dma", |
| 246 | .version_id = 2, |
| 247 | .minimum_version_id = 2, |
Juan Quintela | 35d0845 | 2014-04-16 16:01:33 +0200 | [diff] [blame] | 248 | .fields = (VMStateField[]) { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 249 | VMSTATE_UINT32_ARRAY(dmaregs, DMADeviceState, DMA_REGS), |
Blue Swirl | 75c497d | 2009-08-28 20:46:15 +0000 | [diff] [blame] | 250 | VMSTATE_END_OF_LIST() |
| 251 | } |
| 252 | }; |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 253 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 254 | static void sparc32_dma_device_init(Object *obj) |
Blue Swirl | 6f6260c | 2009-07-15 20:45:19 +0000 | [diff] [blame] | 255 | { |
xiaoqiang zhao | 8c61207 | 2017-05-25 21:34:45 +0800 | [diff] [blame] | 256 | DeviceState *dev = DEVICE(obj); |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 257 | DMADeviceState *s = SPARC32_DMA_DEVICE(obj); |
xiaoqiang zhao | 8c61207 | 2017-05-25 21:34:45 +0800 | [diff] [blame] | 258 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 259 | |
Andreas Färber | 70cd8d4 | 2013-07-26 16:55:59 +0200 | [diff] [blame] | 260 | sysbus_init_irq(sbd, &s->irq); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 261 | |
Andreas Färber | 70cd8d4 | 2013-07-26 16:55:59 +0200 | [diff] [blame] | 262 | sysbus_init_mmio(sbd, &s->iomem); |
bellard | 67e999b | 2006-09-03 16:09:07 +0000 | [diff] [blame] | 263 | |
Mark Cave-Ayland | f542ad0 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 264 | object_property_add_link(OBJECT(dev), "iommu", TYPE_SUN4M_IOMMU, |
| 265 | (Object **) &s->iommu, |
| 266 | qdev_prop_allow_set_link_before_realize, |
| 267 | 0, NULL); |
| 268 | |
Andreas Färber | 70cd8d4 | 2013-07-26 16:55:59 +0200 | [diff] [blame] | 269 | qdev_init_gpio_in(dev, dma_set_irq, 1); |
| 270 | qdev_init_gpio_out(dev, s->gpio, 2); |
xiaoqiang zhao | 8c61207 | 2017-05-25 21:34:45 +0800 | [diff] [blame] | 271 | } |
Blue Swirl | 49ef6c9 | 2009-10-24 19:35:32 +0000 | [diff] [blame] | 272 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 273 | static void sparc32_dma_device_class_init(ObjectClass *klass, void *data) |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 274 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 275 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 276 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 277 | dc->reset = sparc32_dma_device_reset; |
| 278 | dc->vmsd = &vmstate_sparc32_dma_device; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 279 | } |
| 280 | |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 281 | static const TypeInfo sparc32_dma_device_info = { |
| 282 | .name = TYPE_SPARC32_DMA_DEVICE, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 283 | .parent = TYPE_SYS_BUS_DEVICE, |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 284 | .abstract = true, |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 285 | .instance_size = sizeof(DMADeviceState), |
| 286 | .instance_init = sparc32_dma_device_init, |
| 287 | .class_init = sparc32_dma_device_class_init, |
Blue Swirl | 6f6260c | 2009-07-15 20:45:19 +0000 | [diff] [blame] | 288 | }; |
| 289 | |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 290 | static void sparc32_espdma_device_init(Object *obj) |
| 291 | { |
| 292 | DMADeviceState *s = SPARC32_DMA_DEVICE(obj); |
| 293 | |
| 294 | memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s, |
| 295 | "espdma-mmio", DMA_SIZE); |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 296 | } |
| 297 | |
Mark Cave-Ayland | 7f773ff | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 298 | static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) |
| 299 | { |
| 300 | DeviceState *d; |
| 301 | SysBusESPState *sysbus; |
| 302 | ESPState *esp; |
| 303 | |
| 304 | d = qdev_create(NULL, TYPE_ESP); |
| 305 | object_property_add_child(OBJECT(dev), "esp", OBJECT(d), errp); |
| 306 | sysbus = ESP_STATE(d); |
| 307 | esp = &sysbus->esp; |
| 308 | esp->dma_memory_read = espdma_memory_read; |
| 309 | esp->dma_memory_write = espdma_memory_write; |
| 310 | esp->dma_opaque = SPARC32_DMA_DEVICE(dev); |
| 311 | sysbus->it_shift = 2; |
| 312 | esp->dma_enabled = 1; |
| 313 | qdev_init_nofail(d); |
| 314 | } |
| 315 | |
| 316 | static void sparc32_espdma_device_class_init(ObjectClass *klass, void *data) |
| 317 | { |
| 318 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 319 | |
| 320 | dc->realize = sparc32_espdma_device_realize; |
| 321 | } |
| 322 | |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 323 | static const TypeInfo sparc32_espdma_device_info = { |
| 324 | .name = TYPE_SPARC32_ESPDMA_DEVICE, |
| 325 | .parent = TYPE_SPARC32_DMA_DEVICE, |
| 326 | .instance_size = sizeof(ESPDMADeviceState), |
| 327 | .instance_init = sparc32_espdma_device_init, |
Mark Cave-Ayland | 7f773ff | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 328 | .class_init = sparc32_espdma_device_class_init, |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 329 | }; |
| 330 | |
| 331 | static void sparc32_ledma_device_init(Object *obj) |
| 332 | { |
| 333 | DMADeviceState *s = SPARC32_DMA_DEVICE(obj); |
| 334 | |
| 335 | memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s, |
Mark Cave-Ayland | 4ca3d36 | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 336 | "ledma-mmio", DMA_SIZE); |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 337 | } |
| 338 | |
Mark Cave-Ayland | e6ca02a | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 339 | static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) |
| 340 | { |
| 341 | DeviceState *d; |
| 342 | NICInfo *nd = &nd_table[0]; |
| 343 | |
| 344 | qemu_check_nic_model(nd, TYPE_LANCE); |
| 345 | |
| 346 | d = qdev_create(NULL, TYPE_LANCE); |
| 347 | object_property_add_child(OBJECT(dev), "lance", OBJECT(d), errp); |
| 348 | qdev_set_nic_properties(d, nd); |
Marc-André Lureau | 4cc7628 | 2019-10-17 17:31:48 +0200 | [diff] [blame] | 349 | object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); |
Mark Cave-Ayland | e6ca02a | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 350 | qdev_init_nofail(d); |
| 351 | } |
| 352 | |
| 353 | static void sparc32_ledma_device_class_init(ObjectClass *klass, void *data) |
| 354 | { |
| 355 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 356 | |
| 357 | dc->realize = sparc32_ledma_device_realize; |
| 358 | } |
| 359 | |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 360 | static const TypeInfo sparc32_ledma_device_info = { |
| 361 | .name = TYPE_SPARC32_LEDMA_DEVICE, |
| 362 | .parent = TYPE_SPARC32_DMA_DEVICE, |
| 363 | .instance_size = sizeof(LEDMADeviceState), |
| 364 | .instance_init = sparc32_ledma_device_init, |
Mark Cave-Ayland | e6ca02a | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 365 | .class_init = sparc32_ledma_device_class_init, |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 366 | }; |
| 367 | |
Mark Cave-Ayland | 6aa62ed | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 368 | static void sparc32_dma_realize(DeviceState *dev, Error **errp) |
| 369 | { |
| 370 | SPARC32DMAState *s = SPARC32_DMA(dev); |
| 371 | DeviceState *espdma, *esp, *ledma, *lance; |
| 372 | SysBusDevice *sbd; |
| 373 | Object *iommu; |
| 374 | |
| 375 | iommu = object_resolve_path_type("", TYPE_SUN4M_IOMMU, NULL); |
| 376 | if (!iommu) { |
| 377 | error_setg(errp, "unable to locate sun4m IOMMU device"); |
| 378 | return; |
| 379 | } |
| 380 | |
| 381 | espdma = qdev_create(NULL, TYPE_SPARC32_ESPDMA_DEVICE); |
| 382 | object_property_set_link(OBJECT(espdma), iommu, "iommu", errp); |
| 383 | object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma), errp); |
| 384 | qdev_init_nofail(espdma); |
| 385 | |
| 386 | esp = DEVICE(object_resolve_path_component(OBJECT(espdma), "esp")); |
| 387 | sbd = SYS_BUS_DEVICE(esp); |
| 388 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(espdma, 0)); |
| 389 | qdev_connect_gpio_out(espdma, 0, qdev_get_gpio_in(esp, 0)); |
| 390 | qdev_connect_gpio_out(espdma, 1, qdev_get_gpio_in(esp, 1)); |
| 391 | |
| 392 | sbd = SYS_BUS_DEVICE(espdma); |
| 393 | memory_region_add_subregion(&s->dmamem, 0x0, |
| 394 | sysbus_mmio_get_region(sbd, 0)); |
| 395 | |
| 396 | ledma = qdev_create(NULL, TYPE_SPARC32_LEDMA_DEVICE); |
| 397 | object_property_set_link(OBJECT(ledma), iommu, "iommu", errp); |
| 398 | object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma), errp); |
| 399 | qdev_init_nofail(ledma); |
| 400 | |
| 401 | lance = DEVICE(object_resolve_path_component(OBJECT(ledma), "lance")); |
| 402 | sbd = SYS_BUS_DEVICE(lance); |
| 403 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(ledma, 0)); |
| 404 | qdev_connect_gpio_out(ledma, 0, qdev_get_gpio_in(lance, 0)); |
| 405 | |
| 406 | sbd = SYS_BUS_DEVICE(ledma); |
| 407 | memory_region_add_subregion(&s->dmamem, 0x10, |
| 408 | sysbus_mmio_get_region(sbd, 0)); |
Mark Cave-Ayland | 4ca3d36 | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 409 | |
| 410 | /* Add ledma alias to handle SunOS 5.7 - Solaris 9 invalid access bug */ |
| 411 | memory_region_init_alias(&s->ledma_alias, OBJECT(dev), "ledma-alias", |
| 412 | sysbus_mmio_get_region(sbd, 0), 0x4, 0x4); |
| 413 | memory_region_add_subregion(&s->dmamem, 0x20, &s->ledma_alias); |
Mark Cave-Ayland | 6aa62ed | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 414 | } |
| 415 | |
| 416 | static void sparc32_dma_init(Object *obj) |
| 417 | { |
| 418 | SPARC32DMAState *s = SPARC32_DMA(obj); |
| 419 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
| 420 | |
| 421 | memory_region_init(&s->dmamem, OBJECT(s), "dma", DMA_SIZE + DMA_ETH_SIZE); |
| 422 | sysbus_init_mmio(sbd, &s->dmamem); |
| 423 | } |
| 424 | |
| 425 | static void sparc32_dma_class_init(ObjectClass *klass, void *data) |
| 426 | { |
| 427 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 428 | |
| 429 | dc->realize = sparc32_dma_realize; |
| 430 | } |
| 431 | |
| 432 | static const TypeInfo sparc32_dma_info = { |
| 433 | .name = TYPE_SPARC32_DMA, |
| 434 | .parent = TYPE_SYS_BUS_DEVICE, |
| 435 | .instance_size = sizeof(SPARC32DMAState), |
| 436 | .instance_init = sparc32_dma_init, |
| 437 | .class_init = sparc32_dma_class_init, |
| 438 | }; |
| 439 | |
| 440 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 441 | static void sparc32_dma_register_types(void) |
Blue Swirl | 6f6260c | 2009-07-15 20:45:19 +0000 | [diff] [blame] | 442 | { |
Mark Cave-Ayland | 6a1f53f | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 443 | type_register_static(&sparc32_dma_device_info); |
Mark Cave-Ayland | 52d39e5 | 2017-10-14 13:22:21 +0100 | [diff] [blame] | 444 | type_register_static(&sparc32_espdma_device_info); |
| 445 | type_register_static(&sparc32_ledma_device_info); |
Mark Cave-Ayland | 6aa62ed | 2017-10-14 13:22:22 +0100 | [diff] [blame] | 446 | type_register_static(&sparc32_dma_info); |
Blue Swirl | 6f6260c | 2009-07-15 20:45:19 +0000 | [diff] [blame] | 447 | } |
| 448 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 449 | type_init(sparc32_dma_register_types) |