aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU MIPS Jazz support |
| 3 | * |
| 4 | * Copyright (c) 2007-2008 Hervé Poussineau |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
Peter Maydell | c684822 | 2016-01-18 17:35:00 +0000 | [diff] [blame] | 25 | #include "qemu/osdep.h" |
Markus Armbruster | a8d2532 | 2019-05-23 16:35:08 +0200 | [diff] [blame] | 26 | #include "qemu-common.h" |
Paolo Bonzini | 2c65db5 | 2020-10-28 07:36:57 -0400 | [diff] [blame] | 27 | #include "qemu/datadir.h" |
Philippe Mathieu-Daudé | 79b99fe | 2020-10-12 11:57:59 +0200 | [diff] [blame] | 28 | #include "hw/clock.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 29 | #include "hw/mips/mips.h" |
| 30 | #include "hw/mips/cpudevs.h" |
Paolo Bonzini | 852c27e | 2019-12-12 17:15:43 +0100 | [diff] [blame] | 31 | #include "hw/intc/i8259.h" |
Philippe Mathieu-Daudé | 55f613a | 2018-03-08 23:39:23 +0100 | [diff] [blame] | 32 | #include "hw/dma/i8257.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 33 | #include "hw/char/serial.h" |
Philippe Mathieu-Daudé | bb3d5ea | 2018-03-08 23:39:22 +0100 | [diff] [blame] | 34 | #include "hw/char/parallel.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 35 | #include "hw/isa/isa.h" |
| 36 | #include "hw/block/fdc.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 37 | #include "sysemu/sysemu.h" |
| 38 | #include "sysemu/arch_init.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 39 | #include "hw/boards.h" |
Paolo Bonzini | 1422e32 | 2012-10-24 08:43:34 +0200 | [diff] [blame] | 40 | #include "net/net.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 41 | #include "hw/scsi/esp.h" |
| 42 | #include "hw/mips/bios.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 43 | #include "hw/loader.h" |
Philippe Mathieu-Daudé | bcdb906 | 2019-10-04 01:03:53 +0200 | [diff] [blame] | 44 | #include "hw/rtc/mc146818rtc.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 45 | #include "hw/timer/i8254.h" |
Philippe Mathieu-Daudé | 866e2b3 | 2017-10-17 13:44:21 -0300 | [diff] [blame] | 46 | #include "hw/display/vga.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 47 | #include "hw/audio/pcspk.h" |
Philippe Mathieu-Daudé | 47973a2 | 2018-03-08 23:39:24 +0100 | [diff] [blame] | 48 | #include "hw/input/i8042.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 49 | #include "hw/sysbus.h" |
Andreas Färber | 38c8894 | 2013-07-29 16:05:32 +0200 | [diff] [blame] | 50 | #include "sysemu/qtest.h" |
Markus Armbruster | 71e8a91 | 2019-08-12 07:23:38 +0200 | [diff] [blame] | 51 | #include "sysemu/reset.h" |
Markus Armbruster | e688df6 | 2018-02-01 12:18:31 +0100 | [diff] [blame] | 52 | #include "qapi/error.h" |
Aurelien Jarno | 2e985fe | 2013-08-03 16:03:18 +0200 | [diff] [blame] | 53 | #include "qemu/error-report.h" |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 54 | #include "qemu/help_option.h" |
Claudio Fontana | 7827168 | 2021-02-04 17:39:23 +0100 | [diff] [blame] | 55 | #ifdef CONFIG_TCG |
| 56 | #include "hw/core/tcg-cpu-ops.h" |
| 57 | #endif /* CONFIG_TCG */ |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 58 | |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 59 | enum jazz_model_e { |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 60 | JAZZ_MAGNUM, |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 61 | JAZZ_PICA61, |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | static void main_cpu_reset(void *opaque) |
| 65 | { |
Andreas Färber | f37f435 | 2012-05-05 14:06:50 +0200 | [diff] [blame] | 66 | MIPSCPU *cpu = opaque; |
| 67 | |
| 68 | cpu_reset(CPU(cpu)); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 69 | } |
| 70 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 71 | static uint64_t rtc_read(void *opaque, hwaddr addr, unsigned size) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 72 | { |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 73 | uint8_t val; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 74 | address_space_read(&address_space_memory, 0x90000071, |
| 75 | MEMTXATTRS_UNSPECIFIED, &val, 1); |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 76 | return val; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 77 | } |
| 78 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 79 | static void rtc_write(void *opaque, hwaddr addr, |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 80 | uint64_t val, unsigned size) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 81 | { |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 82 | uint8_t buf = val & 0xff; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 83 | address_space_write(&address_space_memory, 0x90000071, |
| 84 | MEMTXATTRS_UNSPECIFIED, &buf, 1); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 85 | } |
| 86 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 87 | static const MemoryRegionOps rtc_ops = { |
| 88 | .read = rtc_read, |
| 89 | .write = rtc_write, |
| 90 | .endianness = DEVICE_NATIVE_ENDIAN, |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 91 | }; |
| 92 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 93 | static uint64_t dma_dummy_read(void *opaque, hwaddr addr, |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 94 | unsigned size) |
| 95 | { |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 96 | /* |
| 97 | * Nothing to do. That is only to ensure that |
| 98 | * the current DMA acknowledge cycle is completed. |
| 99 | */ |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 100 | return 0xff; |
| 101 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 102 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 103 | static void dma_dummy_write(void *opaque, hwaddr addr, |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 104 | uint64_t val, unsigned size) |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 105 | { |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 106 | /* |
| 107 | * Nothing to do. That is only to ensure that |
| 108 | * the current DMA acknowledge cycle is completed. |
| 109 | */ |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 110 | } |
| 111 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 112 | static const MemoryRegionOps dma_dummy_ops = { |
| 113 | .read = dma_dummy_read, |
| 114 | .write = dma_dummy_write, |
| 115 | .endianness = DEVICE_NATIVE_ENDIAN, |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 116 | }; |
| 117 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 118 | #define MAGNUM_BIOS_SIZE_MAX 0x7e000 |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 119 | #define MAGNUM_BIOS_SIZE \ |
| 120 | (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) |
Claudio Fontana | cbc183d | 2021-02-04 17:39:18 +0100 | [diff] [blame] | 121 | |
Hervé Poussineau | f33772c | 2015-02-01 09:12:51 +0100 | [diff] [blame] | 122 | static void mips_jazz_init(MachineState *machine, |
Richard Henderson | c2d0d01 | 2011-08-10 15:28:11 -0700 | [diff] [blame] | 123 | enum jazz_model_e jazz_model) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 124 | { |
Hervé Poussineau | f33772c | 2015-02-01 09:12:51 +0100 | [diff] [blame] | 125 | MemoryRegion *address_space = get_system_memory(); |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 126 | char *filename; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 127 | int bios_size, n; |
Philippe Mathieu-Daudé | 79b99fe | 2020-10-12 11:57:59 +0200 | [diff] [blame] | 128 | Clock *cpuclk; |
Andreas Färber | 6bd8da6 | 2012-05-05 14:05:42 +0200 | [diff] [blame] | 129 | MIPSCPU *cpu; |
Richard Henderson | 3803b6b | 2021-02-27 12:44:00 -0800 | [diff] [blame] | 130 | MIPSCPUClass *mcc; |
Andreas Färber | 61c56c8 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 131 | CPUMIPSState *env; |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 132 | qemu_irq *i8259; |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 133 | rc4030_dma *dmas; |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 134 | IOMMUMemoryRegion *rc4030_dma_mr; |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 135 | MemoryRegion *isa_mem = g_new(MemoryRegion, 1); |
| 136 | MemoryRegion *isa_io = g_new(MemoryRegion, 1); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 137 | MemoryRegion *rtc = g_new(MemoryRegion, 1); |
Richard Henderson | dbff76a | 2011-08-10 15:28:17 -0700 | [diff] [blame] | 138 | MemoryRegion *i8042 = g_new(MemoryRegion, 1); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 139 | MemoryRegion *dma_dummy = g_new(MemoryRegion, 1); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 140 | NICInfo *nd; |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 141 | DeviceState *dev, *rc4030; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 142 | SysBusDevice *sysbus; |
Hervé Poussineau | 48a18b3 | 2011-12-15 22:09:51 +0100 | [diff] [blame] | 143 | ISABus *isa_bus; |
Blue Swirl | 64d7e9a | 2011-02-13 19:54:40 +0000 | [diff] [blame] | 144 | ISADevice *pit; |
Gerd Hoffmann | fd8014e | 2009-09-22 13:53:18 +0200 | [diff] [blame] | 145 | DriveInfo *fds[MAX_FD]; |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 146 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
| 147 | MemoryRegion *bios2 = g_new(MemoryRegion, 1); |
Mark Cave-Ayland | 09eb69a | 2018-06-13 10:47:26 +0100 | [diff] [blame] | 148 | SysBusESPState *sysbus_esp; |
Thomas Huth | 148b2ba | 2018-03-07 10:24:04 +0100 | [diff] [blame] | 149 | ESPState *esp; |
Philippe Mathieu-Daudé | 79b99fe | 2020-10-12 11:57:59 +0200 | [diff] [blame] | 150 | static const struct { |
| 151 | unsigned freq_hz; |
| 152 | unsigned pll_mult; |
| 153 | } ext_clk[] = { |
| 154 | [JAZZ_MAGNUM] = {50000000, 2}, |
| 155 | [JAZZ_PICA61] = {33333333, 4}, |
| 156 | }; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 157 | |
Igor Mammedov | 7c3dd4c | 2020-02-19 11:09:28 -0500 | [diff] [blame] | 158 | if (machine->ram_size > 256 * MiB) { |
| 159 | error_report("RAM size more than 256Mb is not supported"); |
| 160 | exit(EXIT_FAILURE); |
| 161 | } |
| 162 | |
Philippe Mathieu-Daudé | 79b99fe | 2020-10-12 11:57:59 +0200 | [diff] [blame] | 163 | cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); |
| 164 | clock_set_hz(cpuclk, ext_clk[jazz_model].freq_hz |
| 165 | * ext_clk[jazz_model].pll_mult); |
| 166 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 167 | /* init CPUs */ |
Philippe Mathieu-Daudé | 79b99fe | 2020-10-12 11:57:59 +0200 | [diff] [blame] | 168 | cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); |
Andreas Färber | 6bd8da6 | 2012-05-05 14:05:42 +0200 | [diff] [blame] | 169 | env = &cpu->env; |
Andreas Färber | f37f435 | 2012-05-05 14:06:50 +0200 | [diff] [blame] | 170 | qemu_register_reset(main_cpu_reset, cpu); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 171 | |
Peter Maydell | 8d2b871 | 2019-08-02 17:04:56 +0100 | [diff] [blame] | 172 | /* |
| 173 | * Chipset returns 0 in invalid reads and do not raise data exceptions. |
Hervé Poussineau | 54e7555 | 2013-11-04 23:26:17 +0100 | [diff] [blame] | 174 | * However, we can't simply add a global memory region to catch |
Peter Maydell | 8d2b871 | 2019-08-02 17:04:56 +0100 | [diff] [blame] | 175 | * everything, as this would make all accesses including instruction |
| 176 | * accesses be ignored and not raise exceptions. |
Peter Maydell | 8d2b871 | 2019-08-02 17:04:56 +0100 | [diff] [blame] | 177 | * |
| 178 | * NOTE: this behaviour of raising exceptions for bad instruction |
| 179 | * fetches but not bad data accesses was added in commit 54e755588cf1e9 |
| 180 | * to restore behaviour broken by c658b94f6e8c206, but it is not clear |
| 181 | * whether the real hardware behaves this way. It is possible that |
| 182 | * real hardware ignores bad instruction fetches as well -- if so then |
| 183 | * we could replace this hijacking of CPU methods with a simple global |
| 184 | * memory region that catches all memory accesses, as we do on Malta. |
| 185 | */ |
Richard Henderson | 3803b6b | 2021-02-27 12:44:00 -0800 | [diff] [blame] | 186 | mcc = MIPS_CPU_GET_CLASS(cpu); |
| 187 | mcc->no_data_aborts = true; |
Hervé Poussineau | 54e7555 | 2013-11-04 23:26:17 +0100 | [diff] [blame] | 188 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 189 | /* allocate RAM */ |
Igor Mammedov | 2a9bded | 2020-02-19 11:09:27 -0500 | [diff] [blame] | 190 | memory_region_add_subregion(address_space, 0, machine->ram); |
pbrook | dcac967 | 2009-04-09 20:05:49 +0000 | [diff] [blame] | 191 | |
Philippe Mathieu-Daudé | 3fab7f2 | 2020-02-24 21:55:08 +0100 | [diff] [blame] | 192 | memory_region_init_rom(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, |
Markus Armbruster | f8ed85a | 2015-09-11 16:51:43 +0200 | [diff] [blame] | 193 | &error_fatal); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 194 | memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios, |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 195 | 0, MAGNUM_BIOS_SIZE); |
| 196 | memory_region_add_subregion(address_space, 0x1fc00000LL, bios); |
| 197 | memory_region_add_subregion(address_space, 0xfff00000LL, bios2); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 198 | |
| 199 | /* load the BIOS image. */ |
Paolo Bonzini | 59588be | 2020-10-26 10:30:21 -0400 | [diff] [blame] | 200 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: BIOS_FILENAME); |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 201 | if (filename) { |
| 202 | bios_size = load_image_targphys(filename, 0xfff00000LL, |
| 203 | MAGNUM_BIOS_SIZE); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 204 | g_free(filename); |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 205 | } else { |
| 206 | bios_size = -1; |
| 207 | } |
Pavel Dovgalyuk | a4374f8 | 2020-07-21 09:15:05 +0300 | [diff] [blame] | 208 | if ((bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) |
Paolo Bonzini | 59588be | 2020-10-26 10:30:21 -0400 | [diff] [blame] | 209 | && machine->firmware && !qtest_enabled()) { |
| 210 | error_report("Could not load MIPS bios '%s'", machine->firmware); |
Aurelien Jarno | 2e985fe | 2013-08-03 16:03:18 +0200 | [diff] [blame] | 211 | exit(1); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 212 | } |
| 213 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 214 | /* Init CPU internal devices */ |
Paolo Bonzini | 5a975d4 | 2016-03-15 14:32:19 +0100 | [diff] [blame] | 215 | cpu_mips_irq_init_cpu(cpu); |
| 216 | cpu_mips_clock_init(cpu); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 217 | |
| 218 | /* Chipset */ |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 219 | rc4030 = rc4030_init(&dmas, &rc4030_dma_mr); |
| 220 | sysbus = SYS_BUS_DEVICE(rc4030); |
| 221 | sysbus_connect_irq(sysbus, 0, env->irq[6]); |
| 222 | sysbus_connect_irq(sysbus, 1, env->irq[3]); |
| 223 | memory_region_add_subregion(address_space, 0x80000000, |
| 224 | sysbus_mmio_get_region(sysbus, 0)); |
| 225 | memory_region_add_subregion(address_space, 0xf0000000, |
| 226 | sysbus_mmio_get_region(sysbus, 1)); |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 227 | memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, |
| 228 | NULL, "dummy_dma", 0x1000); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 229 | memory_region_add_subregion(address_space, 0x8000d000, dma_dummy); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 230 | |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 231 | /* ISA bus: IO space at 0x90000000, mem space at 0x91000000 */ |
| 232 | memory_region_init(isa_io, NULL, "isa-io", 0x00010000); |
| 233 | memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000); |
| 234 | memory_region_add_subregion(address_space, 0x90000000, isa_io); |
| 235 | memory_region_add_subregion(address_space, 0x91000000, isa_mem); |
Markus Armbruster | d10e543 | 2015-12-17 17:35:18 +0100 | [diff] [blame] | 236 | isa_bus = isa_bus_new(NULL, isa_mem, isa_io, &error_abort); |
Hervé Poussineau | 5c63bcf | 2015-02-01 09:12:52 +0100 | [diff] [blame] | 237 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 238 | /* ISA devices */ |
Hervé Poussineau | 48a18b3 | 2011-12-15 22:09:51 +0100 | [diff] [blame] | 239 | i8259 = i8259_init(isa_bus, env->irq[4]); |
| 240 | isa_bus_irqs(isa_bus, i8259); |
Philippe Mathieu-Daudé | 55f613a | 2018-03-08 23:39:23 +0100 | [diff] [blame] | 241 | i8257_dma_init(isa_bus, 0); |
Philippe Mathieu-Daudé | acf695e | 2017-10-17 13:44:15 -0300 | [diff] [blame] | 242 | pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); |
Gerd Hoffmann | 525d654 | 2020-07-02 15:25:20 +0200 | [diff] [blame] | 243 | pcspk_init(isa_new(TYPE_PC_SPEAKER), isa_bus, pit); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 244 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 245 | /* Video card */ |
| 246 | switch (jazz_model) { |
| 247 | case JAZZ_MAGNUM: |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 248 | dev = qdev_new("sysbus-g364"); |
Andreas Färber | 1356b98 | 2013-01-20 02:47:33 +0100 | [diff] [blame] | 249 | sysbus = SYS_BUS_DEVICE(dev); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 250 | sysbus_realize_and_unref(sysbus, &error_fatal); |
Hervé Poussineau | 97a3f6f | 2011-08-26 21:20:12 +0200 | [diff] [blame] | 251 | sysbus_mmio_map(sysbus, 0, 0x60080000); |
| 252 | sysbus_mmio_map(sysbus, 1, 0x40000000); |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 253 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 3)); |
Hervé Poussineau | 97a3f6f | 2011-08-26 21:20:12 +0200 | [diff] [blame] | 254 | { |
| 255 | /* Simple ROM, so user doesn't have to provide one */ |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 256 | MemoryRegion *rom_mr = g_new(MemoryRegion, 1); |
Philippe Mathieu-Daudé | 3fab7f2 | 2020-02-24 21:55:08 +0100 | [diff] [blame] | 257 | memory_region_init_rom(rom_mr, NULL, "g364fb.rom", 0x80000, |
Markus Armbruster | f8ed85a | 2015-09-11 16:51:43 +0200 | [diff] [blame] | 258 | &error_fatal); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 259 | uint8_t *rom = memory_region_get_ram_ptr(rom_mr); |
| 260 | memory_region_add_subregion(address_space, 0x60000000, rom_mr); |
Hervé Poussineau | 97a3f6f | 2011-08-26 21:20:12 +0200 | [diff] [blame] | 261 | rom[0] = 0x10; /* Mips G364 */ |
| 262 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 263 | break; |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 264 | case JAZZ_PICA61: |
Avi Kivity | be20f9e | 2011-08-15 17:17:37 +0300 | [diff] [blame] | 265 | isa_vga_mm_init(0x40000000, 0x60000000, 0, get_system_memory()); |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 266 | break; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 267 | default: |
| 268 | break; |
| 269 | } |
| 270 | |
| 271 | /* Network controller */ |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 272 | for (n = 0; n < nb_nics; n++) { |
| 273 | nd = &nd_table[n]; |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 274 | if (!nd->model) { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 275 | nd->model = g_strdup("dp83932"); |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 276 | } |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 277 | if (strcmp(nd->model, "dp83932") == 0) { |
Hervé Poussineau | 104655a | 2015-06-03 22:45:45 +0200 | [diff] [blame] | 278 | qemu_check_nic_model(nd, "dp83932"); |
| 279 | |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 280 | dev = qdev_new("dp8393x"); |
Hervé Poussineau | 104655a | 2015-06-03 22:45:45 +0200 | [diff] [blame] | 281 | qdev_set_nic_properties(dev, nd); |
| 282 | qdev_prop_set_uint8(dev, "it_shift", 2); |
Markus Armbruster | 5325cc3 | 2020-07-07 18:05:54 +0200 | [diff] [blame] | 283 | object_property_set_link(OBJECT(dev), "dma_mr", |
| 284 | OBJECT(rc4030_dma_mr), &error_abort); |
Hervé Poussineau | 104655a | 2015-06-03 22:45:45 +0200 | [diff] [blame] | 285 | sysbus = SYS_BUS_DEVICE(dev); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 286 | sysbus_realize_and_unref(sysbus, &error_fatal); |
Hervé Poussineau | 104655a | 2015-06-03 22:45:45 +0200 | [diff] [blame] | 287 | sysbus_mmio_map(sysbus, 0, 0x80001000); |
Hervé Poussineau | 89ae0ff | 2015-06-03 22:45:46 +0200 | [diff] [blame] | 288 | sysbus_mmio_map(sysbus, 1, 0x8000b000); |
Hervé Poussineau | 104655a | 2015-06-03 22:45:45 +0200 | [diff] [blame] | 289 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4)); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 290 | break; |
Peter Maydell | c8057f9 | 2012-08-02 13:45:54 +0100 | [diff] [blame] | 291 | } else if (is_help_option(nd->model)) { |
Alistair Francis | bd6e1d8 | 2018-02-03 09:43:06 +0100 | [diff] [blame] | 292 | error_report("Supported NICs: dp83932"); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 293 | exit(1); |
| 294 | } else { |
Alistair Francis | bd6e1d8 | 2018-02-03 09:43:06 +0100 | [diff] [blame] | 295 | error_report("Unsupported NIC: %s", nd->model); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 296 | exit(1); |
| 297 | } |
| 298 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 299 | |
| 300 | /* SCSI adapter */ |
Mark Cave-Ayland | 84fbefe | 2021-03-04 22:10:23 +0000 | [diff] [blame] | 301 | dev = qdev_new(TYPE_SYSBUS_ESP); |
| 302 | sysbus_esp = SYSBUS_ESP(dev); |
Mark Cave-Ayland | 09eb69a | 2018-06-13 10:47:26 +0100 | [diff] [blame] | 303 | esp = &sysbus_esp->esp; |
| 304 | esp->dma_memory_read = rc4030_dma_read; |
| 305 | esp->dma_memory_write = rc4030_dma_write; |
| 306 | esp->dma_opaque = dmas[0]; |
| 307 | sysbus_esp->it_shift = 0; |
| 308 | /* XXX for now until rc4030 has been changed to use DMA enable signal */ |
| 309 | esp->dma_enabled = 1; |
Mark Cave-Ayland | 09eb69a | 2018-06-13 10:47:26 +0100 | [diff] [blame] | 310 | |
| 311 | sysbus = SYS_BUS_DEVICE(dev); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 312 | sysbus_realize_and_unref(sysbus, &error_fatal); |
Mark Cave-Ayland | 09eb69a | 2018-06-13 10:47:26 +0100 | [diff] [blame] | 313 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 5)); |
| 314 | sysbus_mmio_map(sysbus, 0, 0x80002000); |
| 315 | |
Thomas Huth | 148b2ba | 2018-03-07 10:24:04 +0100 | [diff] [blame] | 316 | scsi_bus_legacy_handle_cmdline(&esp->bus); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 317 | |
| 318 | /* Floppy */ |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 319 | for (n = 0; n < MAX_FD; n++) { |
Gerd Hoffmann | fd8014e | 2009-09-22 13:53:18 +0200 | [diff] [blame] | 320 | fds[n] = drive_get(IF_FLOPPY, 0, n); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 321 | } |
Hervé Poussineau | 020e298 | 2016-02-03 11:28:57 -0500 | [diff] [blame] | 322 | /* FIXME: we should enable DMA with a custom IsaDma device */ |
| 323 | fdctrl_init_sysbus(qdev_get_gpio_in(rc4030, 1), -1, 0x80003000, fds); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 324 | |
| 325 | /* Real time clock */ |
Philippe Mathieu-Daudé | 6c646a1 | 2017-10-17 13:44:16 -0300 | [diff] [blame] | 326 | mc146818_rtc_init(isa_bus, 1980, NULL); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 327 | memory_region_init_io(rtc, NULL, &rtc_ops, NULL, "rtc", 0x1000); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 328 | memory_region_add_subregion(address_space, 0x80004000, rtc); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 329 | |
| 330 | /* Keyboard (i8042) */ |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 331 | i8042_mm_init(qdev_get_gpio_in(rc4030, 6), qdev_get_gpio_in(rc4030, 7), |
| 332 | i8042, 0x1000, 0x1); |
Richard Henderson | dbff76a | 2011-08-10 15:28:17 -0700 | [diff] [blame] | 333 | memory_region_add_subregion(address_space, 0x80005000, i8042); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 334 | |
| 335 | /* Serial ports */ |
Peter Maydell | 9bca0ed | 2018-04-20 15:52:43 +0100 | [diff] [blame] | 336 | if (serial_hd(0)) { |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 337 | serial_mm_init(address_space, 0x80006000, 0, |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 338 | qdev_get_gpio_in(rc4030, 8), 8000000 / 16, |
Peter Maydell | 9bca0ed | 2018-04-20 15:52:43 +0100 | [diff] [blame] | 339 | serial_hd(0), DEVICE_NATIVE_ENDIAN); |
Blue Swirl | 2d48377 | 2010-03-21 19:47:11 +0000 | [diff] [blame] | 340 | } |
Peter Maydell | 9bca0ed | 2018-04-20 15:52:43 +0100 | [diff] [blame] | 341 | if (serial_hd(1)) { |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 342 | serial_mm_init(address_space, 0x80007000, 0, |
Filip Bozuta | 68fa5f5 | 2019-12-06 14:58:03 +0100 | [diff] [blame] | 343 | qdev_get_gpio_in(rc4030, 9), 8000000 / 16, |
Peter Maydell | 9bca0ed | 2018-04-20 15:52:43 +0100 | [diff] [blame] | 344 | serial_hd(1), DEVICE_NATIVE_ENDIAN); |
Blue Swirl | 2d48377 | 2010-03-21 19:47:11 +0000 | [diff] [blame] | 345 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 346 | |
| 347 | /* Parallel port */ |
| 348 | if (parallel_hds[0]) |
Hervé Poussineau | d791d60 | 2015-06-03 22:45:41 +0200 | [diff] [blame] | 349 | parallel_mm_init(address_space, 0x80008000, 0, |
| 350 | qdev_get_gpio_in(rc4030, 0), parallel_hds[0]); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 351 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 352 | /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 353 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 354 | /* NVRAM */ |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 355 | dev = qdev_new("ds1225y"); |
Andreas Färber | 1356b98 | 2013-01-20 02:47:33 +0100 | [diff] [blame] | 356 | sysbus = SYS_BUS_DEVICE(dev); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 357 | sysbus_realize_and_unref(sysbus, &error_fatal); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 358 | sysbus_mmio_map(sysbus, 0, 0x80009000); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 359 | |
| 360 | /* LED indicator */ |
Hervé Poussineau | b39506e | 2012-02-17 20:27:16 +0100 | [diff] [blame] | 361 | sysbus_create_simple("jazz-led", 0x8000f000, NULL); |
Paolo Bonzini | 0287d89 | 2019-10-01 15:36:25 +0200 | [diff] [blame] | 362 | |
| 363 | g_free(dmas); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | static |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 367 | void mips_magnum_init(MachineState *machine) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 368 | { |
Hervé Poussineau | f33772c | 2015-02-01 09:12:51 +0100 | [diff] [blame] | 369 | mips_jazz_init(machine, JAZZ_MAGNUM); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 370 | } |
| 371 | |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 372 | static |
Marcel Apfelbaum | 3ef9622 | 2014-05-07 17:42:57 +0300 | [diff] [blame] | 373 | void mips_pica61_init(MachineState *machine) |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 374 | { |
Hervé Poussineau | f33772c | 2015-02-01 09:12:51 +0100 | [diff] [blame] | 375 | mips_jazz_init(machine, JAZZ_PICA61); |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 376 | } |
| 377 | |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 378 | static void mips_magnum_class_init(ObjectClass *oc, void *data) |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 379 | { |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 380 | MachineClass *mc = MACHINE_CLASS(oc); |
| 381 | |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 382 | mc->desc = "MIPS Magnum"; |
| 383 | mc->init = mips_magnum_init; |
| 384 | mc->block_default_type = IF_SCSI; |
Igor Mammedov | 3469e65 | 2017-10-05 15:51:12 +0200 | [diff] [blame] | 385 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000"); |
Igor Mammedov | 2a9bded | 2020-02-19 11:09:27 -0500 | [diff] [blame] | 386 | mc->default_ram_id = "mips_jazz.ram"; |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 387 | } |
| 388 | |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 389 | static const TypeInfo mips_magnum_type = { |
| 390 | .name = MACHINE_TYPE_NAME("magnum"), |
| 391 | .parent = TYPE_MACHINE, |
| 392 | .class_init = mips_magnum_class_init, |
| 393 | }; |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 394 | |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 395 | static void mips_pica61_class_init(ObjectClass *oc, void *data) |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 396 | { |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 397 | MachineClass *mc = MACHINE_CLASS(oc); |
| 398 | |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 399 | mc->desc = "Acer Pica 61"; |
| 400 | mc->init = mips_pica61_init; |
| 401 | mc->block_default_type = IF_SCSI; |
Igor Mammedov | 3469e65 | 2017-10-05 15:51:12 +0200 | [diff] [blame] | 402 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000"); |
Igor Mammedov | 2a9bded | 2020-02-19 11:09:27 -0500 | [diff] [blame] | 403 | mc->default_ram_id = "mips_jazz.ram"; |
Eduardo Habkost | e264d29 | 2015-09-04 15:37:08 -0300 | [diff] [blame] | 404 | } |
| 405 | |
Andreas Färber | 8a661ae | 2015-09-19 10:49:44 +0200 | [diff] [blame] | 406 | static const TypeInfo mips_pica61_type = { |
| 407 | .name = MACHINE_TYPE_NAME("pica61"), |
| 408 | .parent = TYPE_MACHINE, |
| 409 | .class_init = mips_pica61_class_init, |
| 410 | }; |
| 411 | |
| 412 | static void mips_jazz_machine_init(void) |
| 413 | { |
| 414 | type_register_static(&mips_magnum_type); |
| 415 | type_register_static(&mips_pica61_type); |
| 416 | } |
| 417 | |
Eduardo Habkost | 0e6aac8 | 2016-02-16 18:59:04 -0200 | [diff] [blame] | 418 | type_init(mips_jazz_machine_init) |