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bellardb4608c02003-06-27 17:34:32 +00001/*
2 * gdb server stub
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard34751872005-07-02 14:31:34 +00004 * Copyright (c) 2003-2005 Fabrice Bellard
bellardb4608c02003-06-27 17:34:32 +00005 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellardb4608c02003-06-27 17:34:32 +000018 */
pbrook978efd62006-06-17 18:30:42 +000019#include "config.h"
pbrook56aebc82008-10-11 17:55:29 +000020#include "qemu-common.h"
bellard1fddef42005-04-17 19:16:13 +000021#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
pbrook978efd62006-06-17 18:30:42 +000028#include <fcntl.h>
bellard1fddef42005-04-17 19:16:13 +000029
30#include "qemu.h"
31#else
aliguori8a34a0f2009-03-05 23:01:55 +000032#include "monitor.h"
pbrook87ecb682007-11-17 17:14:51 +000033#include "qemu-char.h"
34#include "sysemu.h"
35#include "gdbstub.h"
bellard1fddef42005-04-17 19:16:13 +000036#endif
bellard67b915a2004-03-31 23:37:16 +000037
pbrook56aebc82008-10-11 17:55:29 +000038#define MAX_PACKET_LENGTH 4096
39
bellard8f447cc2006-06-14 15:21:14 +000040#include "qemu_socket.h"
aliguorie22a25c2009-03-12 20:12:48 +000041#include "kvm.h"
aurel32ca587a82008-12-18 22:44:13 +000042
43
44enum {
45 GDB_SIGNAL_0 = 0,
46 GDB_SIGNAL_INT = 2,
47 GDB_SIGNAL_TRAP = 5,
48 GDB_SIGNAL_UNKNOWN = 143
49};
50
51#ifdef CONFIG_USER_ONLY
52
53/* Map target signal numbers to GDB protocol signal numbers and vice
54 * versa. For user emulation's currently supported systems, we can
55 * assume most signals are defined.
56 */
57
58static int gdb_signal_table[] = {
59 0,
60 TARGET_SIGHUP,
61 TARGET_SIGINT,
62 TARGET_SIGQUIT,
63 TARGET_SIGILL,
64 TARGET_SIGTRAP,
65 TARGET_SIGABRT,
66 -1, /* SIGEMT */
67 TARGET_SIGFPE,
68 TARGET_SIGKILL,
69 TARGET_SIGBUS,
70 TARGET_SIGSEGV,
71 TARGET_SIGSYS,
72 TARGET_SIGPIPE,
73 TARGET_SIGALRM,
74 TARGET_SIGTERM,
75 TARGET_SIGURG,
76 TARGET_SIGSTOP,
77 TARGET_SIGTSTP,
78 TARGET_SIGCONT,
79 TARGET_SIGCHLD,
80 TARGET_SIGTTIN,
81 TARGET_SIGTTOU,
82 TARGET_SIGIO,
83 TARGET_SIGXCPU,
84 TARGET_SIGXFSZ,
85 TARGET_SIGVTALRM,
86 TARGET_SIGPROF,
87 TARGET_SIGWINCH,
88 -1, /* SIGLOST */
89 TARGET_SIGUSR1,
90 TARGET_SIGUSR2,
blueswir1c72d5bf2009-01-15 17:27:45 +000091#ifdef TARGET_SIGPWR
aurel32ca587a82008-12-18 22:44:13 +000092 TARGET_SIGPWR,
blueswir1c72d5bf2009-01-15 17:27:45 +000093#else
94 -1,
95#endif
aurel32ca587a82008-12-18 22:44:13 +000096 -1, /* SIGPOLL */
97 -1,
98 -1,
99 -1,
100 -1,
101 -1,
102 -1,
103 -1,
104 -1,
105 -1,
106 -1,
107 -1,
blueswir1c72d5bf2009-01-15 17:27:45 +0000108#ifdef __SIGRTMIN
aurel32ca587a82008-12-18 22:44:13 +0000109 __SIGRTMIN + 1,
110 __SIGRTMIN + 2,
111 __SIGRTMIN + 3,
112 __SIGRTMIN + 4,
113 __SIGRTMIN + 5,
114 __SIGRTMIN + 6,
115 __SIGRTMIN + 7,
116 __SIGRTMIN + 8,
117 __SIGRTMIN + 9,
118 __SIGRTMIN + 10,
119 __SIGRTMIN + 11,
120 __SIGRTMIN + 12,
121 __SIGRTMIN + 13,
122 __SIGRTMIN + 14,
123 __SIGRTMIN + 15,
124 __SIGRTMIN + 16,
125 __SIGRTMIN + 17,
126 __SIGRTMIN + 18,
127 __SIGRTMIN + 19,
128 __SIGRTMIN + 20,
129 __SIGRTMIN + 21,
130 __SIGRTMIN + 22,
131 __SIGRTMIN + 23,
132 __SIGRTMIN + 24,
133 __SIGRTMIN + 25,
134 __SIGRTMIN + 26,
135 __SIGRTMIN + 27,
136 __SIGRTMIN + 28,
137 __SIGRTMIN + 29,
138 __SIGRTMIN + 30,
139 __SIGRTMIN + 31,
140 -1, /* SIGCANCEL */
141 __SIGRTMIN,
142 __SIGRTMIN + 32,
143 __SIGRTMIN + 33,
144 __SIGRTMIN + 34,
145 __SIGRTMIN + 35,
146 __SIGRTMIN + 36,
147 __SIGRTMIN + 37,
148 __SIGRTMIN + 38,
149 __SIGRTMIN + 39,
150 __SIGRTMIN + 40,
151 __SIGRTMIN + 41,
152 __SIGRTMIN + 42,
153 __SIGRTMIN + 43,
154 __SIGRTMIN + 44,
155 __SIGRTMIN + 45,
156 __SIGRTMIN + 46,
157 __SIGRTMIN + 47,
158 __SIGRTMIN + 48,
159 __SIGRTMIN + 49,
160 __SIGRTMIN + 50,
161 __SIGRTMIN + 51,
162 __SIGRTMIN + 52,
163 __SIGRTMIN + 53,
164 __SIGRTMIN + 54,
165 __SIGRTMIN + 55,
166 __SIGRTMIN + 56,
167 __SIGRTMIN + 57,
168 __SIGRTMIN + 58,
169 __SIGRTMIN + 59,
170 __SIGRTMIN + 60,
171 __SIGRTMIN + 61,
172 __SIGRTMIN + 62,
173 __SIGRTMIN + 63,
174 __SIGRTMIN + 64,
175 __SIGRTMIN + 65,
176 __SIGRTMIN + 66,
177 __SIGRTMIN + 67,
178 __SIGRTMIN + 68,
179 __SIGRTMIN + 69,
180 __SIGRTMIN + 70,
181 __SIGRTMIN + 71,
182 __SIGRTMIN + 72,
183 __SIGRTMIN + 73,
184 __SIGRTMIN + 74,
185 __SIGRTMIN + 75,
186 __SIGRTMIN + 76,
187 __SIGRTMIN + 77,
188 __SIGRTMIN + 78,
189 __SIGRTMIN + 79,
190 __SIGRTMIN + 80,
191 __SIGRTMIN + 81,
192 __SIGRTMIN + 82,
193 __SIGRTMIN + 83,
194 __SIGRTMIN + 84,
195 __SIGRTMIN + 85,
196 __SIGRTMIN + 86,
197 __SIGRTMIN + 87,
198 __SIGRTMIN + 88,
199 __SIGRTMIN + 89,
200 __SIGRTMIN + 90,
201 __SIGRTMIN + 91,
202 __SIGRTMIN + 92,
203 __SIGRTMIN + 93,
204 __SIGRTMIN + 94,
205 __SIGRTMIN + 95,
206 -1, /* SIGINFO */
207 -1, /* UNKNOWN */
208 -1, /* DEFAULT */
209 -1,
210 -1,
211 -1,
212 -1,
213 -1,
214 -1
blueswir1c72d5bf2009-01-15 17:27:45 +0000215#endif
aurel32ca587a82008-12-18 22:44:13 +0000216};
bellard8f447cc2006-06-14 15:21:14 +0000217#else
aurel32ca587a82008-12-18 22:44:13 +0000218/* In system mode we only need SIGINT and SIGTRAP; other signals
219 are not yet supported. */
220
221enum {
222 TARGET_SIGINT = 2,
223 TARGET_SIGTRAP = 5
224};
225
226static int gdb_signal_table[] = {
227 -1,
228 -1,
229 TARGET_SIGINT,
230 -1,
231 -1,
232 TARGET_SIGTRAP
233};
bellard8f447cc2006-06-14 15:21:14 +0000234#endif
bellardb4608c02003-06-27 17:34:32 +0000235
aurel32ca587a82008-12-18 22:44:13 +0000236#ifdef CONFIG_USER_ONLY
237static int target_signal_to_gdb (int sig)
238{
239 int i;
240 for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
241 if (gdb_signal_table[i] == sig)
242 return i;
243 return GDB_SIGNAL_UNKNOWN;
244}
245#endif
246
247static int gdb_signal_to_target (int sig)
248{
249 if (sig < ARRAY_SIZE (gdb_signal_table))
250 return gdb_signal_table[sig];
251 else
252 return -1;
253}
254
bellard4abe6152003-07-26 18:01:58 +0000255//#define DEBUG_GDB
bellardb4608c02003-06-27 17:34:32 +0000256
pbrook56aebc82008-10-11 17:55:29 +0000257typedef struct GDBRegisterState {
258 int base_reg;
259 int num_regs;
260 gdb_reg_cb get_reg;
261 gdb_reg_cb set_reg;
262 const char *xml;
263 struct GDBRegisterState *next;
264} GDBRegisterState;
265
bellard858693c2004-03-31 18:52:07 +0000266enum RSState {
aliguori36556b22009-03-28 18:05:53 +0000267 RS_INACTIVE,
bellard858693c2004-03-31 18:52:07 +0000268 RS_IDLE,
269 RS_GETLINE,
270 RS_CHKSUM1,
271 RS_CHKSUM2,
pbrooka2d1eba2007-01-28 03:10:55 +0000272 RS_SYSCALL,
bellard858693c2004-03-31 18:52:07 +0000273};
bellard858693c2004-03-31 18:52:07 +0000274typedef struct GDBState {
aliguori880a7572008-11-18 20:30:24 +0000275 CPUState *c_cpu; /* current CPU for step/continue ops */
276 CPUState *g_cpu; /* current CPU for other ops */
277 CPUState *query_cpu; /* for q{f|s}ThreadInfo */
bellard41625032005-04-24 10:07:11 +0000278 enum RSState state; /* parsing state */
pbrook56aebc82008-10-11 17:55:29 +0000279 char line_buf[MAX_PACKET_LENGTH];
bellard858693c2004-03-31 18:52:07 +0000280 int line_buf_index;
281 int line_csum;
pbrook56aebc82008-10-11 17:55:29 +0000282 uint8_t last_packet[MAX_PACKET_LENGTH + 4];
pbrook4046d912007-01-28 01:53:16 +0000283 int last_packet_len;
edgar_igl1f487ee2008-05-17 22:20:53 +0000284 int signal;
bellard41625032005-04-24 10:07:11 +0000285#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +0000286 int fd;
bellard41625032005-04-24 10:07:11 +0000287 int running_state;
pbrook4046d912007-01-28 01:53:16 +0000288#else
289 CharDriverState *chr;
aliguori8a34a0f2009-03-05 23:01:55 +0000290 CharDriverState *mon_chr;
bellard41625032005-04-24 10:07:11 +0000291#endif
bellard858693c2004-03-31 18:52:07 +0000292} GDBState;
bellardb4608c02003-06-27 17:34:32 +0000293
edgar_igl60897d32008-05-09 08:25:14 +0000294/* By default use no IRQs and no timers while single stepping so as to
295 * make single stepping like an ICE HW step.
296 */
297static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
298
aliguori880a7572008-11-18 20:30:24 +0000299static GDBState *gdbserver_state;
300
pbrook56aebc82008-10-11 17:55:29 +0000301/* This is an ugly hack to cope with both new and old gdb.
302 If gdb sends qXfer:features:read then assume we're talking to a newish
303 gdb that understands target descriptions. */
304static int gdb_has_xml;
305
bellard1fddef42005-04-17 19:16:13 +0000306#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +0000307/* XXX: This is not thread safe. Do we care? */
308static int gdbserver_fd = -1;
309
bellard858693c2004-03-31 18:52:07 +0000310static int get_char(GDBState *s)
bellardb4608c02003-06-27 17:34:32 +0000311{
312 uint8_t ch;
313 int ret;
314
315 for(;;) {
bellard8f447cc2006-06-14 15:21:14 +0000316 ret = recv(s->fd, &ch, 1, 0);
bellardb4608c02003-06-27 17:34:32 +0000317 if (ret < 0) {
edgar_igl1f487ee2008-05-17 22:20:53 +0000318 if (errno == ECONNRESET)
319 s->fd = -1;
bellardb4608c02003-06-27 17:34:32 +0000320 if (errno != EINTR && errno != EAGAIN)
321 return -1;
322 } else if (ret == 0) {
edgar_igl1f487ee2008-05-17 22:20:53 +0000323 close(s->fd);
324 s->fd = -1;
bellardb4608c02003-06-27 17:34:32 +0000325 return -1;
326 } else {
327 break;
328 }
329 }
330 return ch;
331}
pbrook4046d912007-01-28 01:53:16 +0000332#endif
bellardb4608c02003-06-27 17:34:32 +0000333
pbrooka2d1eba2007-01-28 03:10:55 +0000334static gdb_syscall_complete_cb gdb_current_syscall_cb;
335
blueswir1654efcf2009-04-18 07:29:59 +0000336static enum {
pbrooka2d1eba2007-01-28 03:10:55 +0000337 GDB_SYS_UNKNOWN,
338 GDB_SYS_ENABLED,
339 GDB_SYS_DISABLED,
340} gdb_syscall_mode;
341
342/* If gdb is connected when the first semihosting syscall occurs then use
343 remote gdb syscalls. Otherwise use native file IO. */
344int use_gdb_syscalls(void)
345{
346 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
aliguori880a7572008-11-18 20:30:24 +0000347 gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
348 : GDB_SYS_DISABLED);
pbrooka2d1eba2007-01-28 03:10:55 +0000349 }
350 return gdb_syscall_mode == GDB_SYS_ENABLED;
351}
352
edgar_iglba70a622008-03-14 06:10:42 +0000353/* Resume execution. */
354static inline void gdb_continue(GDBState *s)
355{
356#ifdef CONFIG_USER_ONLY
357 s->running_state = 1;
358#else
359 vm_start();
360#endif
361}
362
bellard858693c2004-03-31 18:52:07 +0000363static void put_buffer(GDBState *s, const uint8_t *buf, int len)
bellardb4608c02003-06-27 17:34:32 +0000364{
pbrook4046d912007-01-28 01:53:16 +0000365#ifdef CONFIG_USER_ONLY
bellardb4608c02003-06-27 17:34:32 +0000366 int ret;
367
368 while (len > 0) {
bellard8f447cc2006-06-14 15:21:14 +0000369 ret = send(s->fd, buf, len, 0);
bellardb4608c02003-06-27 17:34:32 +0000370 if (ret < 0) {
371 if (errno != EINTR && errno != EAGAIN)
372 return;
373 } else {
374 buf += ret;
375 len -= ret;
376 }
377 }
pbrook4046d912007-01-28 01:53:16 +0000378#else
379 qemu_chr_write(s->chr, buf, len);
380#endif
bellardb4608c02003-06-27 17:34:32 +0000381}
382
383static inline int fromhex(int v)
384{
385 if (v >= '0' && v <= '9')
386 return v - '0';
387 else if (v >= 'A' && v <= 'F')
388 return v - 'A' + 10;
389 else if (v >= 'a' && v <= 'f')
390 return v - 'a' + 10;
391 else
392 return 0;
393}
394
395static inline int tohex(int v)
396{
397 if (v < 10)
398 return v + '0';
399 else
400 return v - 10 + 'a';
401}
402
403static void memtohex(char *buf, const uint8_t *mem, int len)
404{
405 int i, c;
406 char *q;
407 q = buf;
408 for(i = 0; i < len; i++) {
409 c = mem[i];
410 *q++ = tohex(c >> 4);
411 *q++ = tohex(c & 0xf);
412 }
413 *q = '\0';
414}
415
416static void hextomem(uint8_t *mem, const char *buf, int len)
417{
418 int i;
419
420 for(i = 0; i < len; i++) {
421 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
422 buf += 2;
423 }
424}
425
bellardb4608c02003-06-27 17:34:32 +0000426/* return -1 if error, 0 if OK */
pbrook56aebc82008-10-11 17:55:29 +0000427static int put_packet_binary(GDBState *s, const char *buf, int len)
bellardb4608c02003-06-27 17:34:32 +0000428{
pbrook56aebc82008-10-11 17:55:29 +0000429 int csum, i;
ths60fe76f2007-12-16 03:02:09 +0000430 uint8_t *p;
bellardb4608c02003-06-27 17:34:32 +0000431
bellardb4608c02003-06-27 17:34:32 +0000432 for(;;) {
pbrook4046d912007-01-28 01:53:16 +0000433 p = s->last_packet;
434 *(p++) = '$';
pbrook4046d912007-01-28 01:53:16 +0000435 memcpy(p, buf, len);
436 p += len;
bellardb4608c02003-06-27 17:34:32 +0000437 csum = 0;
438 for(i = 0; i < len; i++) {
439 csum += buf[i];
440 }
pbrook4046d912007-01-28 01:53:16 +0000441 *(p++) = '#';
442 *(p++) = tohex((csum >> 4) & 0xf);
443 *(p++) = tohex((csum) & 0xf);
bellardb4608c02003-06-27 17:34:32 +0000444
pbrook4046d912007-01-28 01:53:16 +0000445 s->last_packet_len = p - s->last_packet;
thsffe8ab82007-12-16 03:16:05 +0000446 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
bellardb4608c02003-06-27 17:34:32 +0000447
pbrook4046d912007-01-28 01:53:16 +0000448#ifdef CONFIG_USER_ONLY
449 i = get_char(s);
450 if (i < 0)
bellardb4608c02003-06-27 17:34:32 +0000451 return -1;
pbrook4046d912007-01-28 01:53:16 +0000452 if (i == '+')
bellardb4608c02003-06-27 17:34:32 +0000453 break;
pbrook4046d912007-01-28 01:53:16 +0000454#else
455 break;
456#endif
bellardb4608c02003-06-27 17:34:32 +0000457 }
458 return 0;
459}
460
pbrook56aebc82008-10-11 17:55:29 +0000461/* return -1 if error, 0 if OK */
462static int put_packet(GDBState *s, const char *buf)
463{
464#ifdef DEBUG_GDB
465 printf("reply='%s'\n", buf);
466#endif
467
468 return put_packet_binary(s, buf, strlen(buf));
469}
470
471/* The GDB remote protocol transfers values in target byte order. This means
472 we can use the raw memory access routines to access the value buffer.
473 Conveniently, these also handle the case where the buffer is mis-aligned.
474 */
475#define GET_REG8(val) do { \
476 stb_p(mem_buf, val); \
477 return 1; \
478 } while(0)
479#define GET_REG16(val) do { \
480 stw_p(mem_buf, val); \
481 return 2; \
482 } while(0)
483#define GET_REG32(val) do { \
484 stl_p(mem_buf, val); \
485 return 4; \
486 } while(0)
487#define GET_REG64(val) do { \
488 stq_p(mem_buf, val); \
489 return 8; \
490 } while(0)
491
492#if TARGET_LONG_BITS == 64
493#define GET_REGL(val) GET_REG64(val)
494#define ldtul_p(addr) ldq_p(addr)
495#else
496#define GET_REGL(val) GET_REG32(val)
497#define ldtul_p(addr) ldl_p(addr)
498#endif
499
edgar_iglfde3fd62008-05-09 08:50:01 +0000500#if defined(TARGET_I386)
balrog5ad265e2007-10-31 00:21:35 +0000501
502#ifdef TARGET_X86_64
pbrook56aebc82008-10-11 17:55:29 +0000503static const int gpr_map[16] = {
bellard79808572008-05-09 14:40:22 +0000504 R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
pbrook56aebc82008-10-11 17:55:29 +0000505 8, 9, 10, 11, 12, 13, 14, 15
bellard79808572008-05-09 14:40:22 +0000506};
bellard79808572008-05-09 14:40:22 +0000507#else
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200508#define gpr_map gpr_map32
bellard79808572008-05-09 14:40:22 +0000509#endif
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200510static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
pbrook56aebc82008-10-11 17:55:29 +0000511
512#define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
513
Jan Kiszkab1631e72009-06-27 09:53:51 +0200514#define IDX_IP_REG CPU_NB_REGS
515#define IDX_FLAGS_REG (IDX_IP_REG + 1)
516#define IDX_SEG_REGS (IDX_FLAGS_REG + 1)
517#define IDX_FP_REGS (IDX_SEG_REGS + 6)
518#define IDX_XMM_REGS (IDX_FP_REGS + 16)
519#define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
520
pbrook56aebc82008-10-11 17:55:29 +0000521static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
522{
523 if (n < CPU_NB_REGS) {
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200524 if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
525 GET_REG64(env->regs[gpr_map[n]]);
526 } else if (n < CPU_NB_REGS32) {
527 GET_REG32(env->regs[gpr_map32[n]]);
528 }
Jan Kiszkab1631e72009-06-27 09:53:51 +0200529 } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
pbrook56aebc82008-10-11 17:55:29 +0000530#ifdef USE_X86LDOUBLE
Jan Kiszkab1631e72009-06-27 09:53:51 +0200531 /* FIXME: byteswap float values - after fixing fpregs layout. */
532 memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
pbrook56aebc82008-10-11 17:55:29 +0000533#else
534 memset(mem_buf, 0, 10);
535#endif
536 return 10;
Jan Kiszkab1631e72009-06-27 09:53:51 +0200537 } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
538 n -= IDX_XMM_REGS;
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200539 if (n < CPU_NB_REGS32 ||
540 (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
541 stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
542 stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
543 return 16;
544 }
pbrook56aebc82008-10-11 17:55:29 +0000545 } else {
pbrook56aebc82008-10-11 17:55:29 +0000546 switch (n) {
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200547 case IDX_IP_REG:
548 if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
549 GET_REG64(env->eip);
550 } else {
551 GET_REG32(env->eip);
552 }
Jan Kiszkab1631e72009-06-27 09:53:51 +0200553 case IDX_FLAGS_REG: GET_REG32(env->eflags);
554
555 case IDX_SEG_REGS: GET_REG32(env->segs[R_CS].selector);
556 case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector);
557 case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector);
558 case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector);
559 case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector);
560 case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector);
561
562 case IDX_FP_REGS + 8: GET_REG32(env->fpuc);
563 case IDX_FP_REGS + 9: GET_REG32((env->fpus & ~0x3800) |
564 (env->fpstt & 0x7) << 11);
565 case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */
566 case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */
567 case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */
568 case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */
569 case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */
570 case IDX_FP_REGS + 15: GET_REG32(0); /* fop */
571
572 case IDX_MXCSR_REG: GET_REG32(env->mxcsr);
pbrook56aebc82008-10-11 17:55:29 +0000573 }
bellard79808572008-05-09 14:40:22 +0000574 }
pbrook56aebc82008-10-11 17:55:29 +0000575 return 0;
bellard79808572008-05-09 14:40:22 +0000576}
577
Jan Kiszka84273172009-06-27 09:53:51 +0200578static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
579{
580 uint16_t selector = ldl_p(mem_buf);
581
582 if (selector != env->segs[sreg].selector) {
583#if defined(CONFIG_USER_ONLY)
584 cpu_x86_load_seg(env, sreg, selector);
585#else
586 unsigned int limit, flags;
587 target_ulong base;
588
589 if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
590 base = selector << 4;
591 limit = 0xffff;
592 flags = 0;
593 } else {
594 if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags))
595 return 4;
596 }
597 cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags);
598#endif
599 }
600 return 4;
601}
602
Jan Kiszkab1631e72009-06-27 09:53:51 +0200603static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellard79808572008-05-09 14:40:22 +0000604{
pbrook56aebc82008-10-11 17:55:29 +0000605 uint32_t tmp;
606
Jan Kiszkab1631e72009-06-27 09:53:51 +0200607 if (n < CPU_NB_REGS) {
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200608 if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
609 env->regs[gpr_map[n]] = ldtul_p(mem_buf);
610 return sizeof(target_ulong);
611 } else if (n < CPU_NB_REGS32) {
612 n = gpr_map32[n];
613 env->regs[n] &= ~0xffffffffUL;
614 env->regs[n] |= (uint32_t)ldl_p(mem_buf);
615 return 4;
616 }
Jan Kiszkab1631e72009-06-27 09:53:51 +0200617 } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
pbrook56aebc82008-10-11 17:55:29 +0000618#ifdef USE_X86LDOUBLE
Jan Kiszkab1631e72009-06-27 09:53:51 +0200619 /* FIXME: byteswap float values - after fixing fpregs layout. */
620 memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
pbrook56aebc82008-10-11 17:55:29 +0000621#endif
622 return 10;
Jan Kiszkab1631e72009-06-27 09:53:51 +0200623 } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
624 n -= IDX_XMM_REGS;
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200625 if (n < CPU_NB_REGS32 ||
626 (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
627 env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf);
628 env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8);
629 return 16;
630 }
pbrook56aebc82008-10-11 17:55:29 +0000631 } else {
Jan Kiszkab1631e72009-06-27 09:53:51 +0200632 switch (n) {
633 case IDX_IP_REG:
Jan Kiszka5f30fa12009-09-17 18:14:13 +0200634 if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
635 env->eip = ldq_p(mem_buf);
636 return 8;
637 } else {
638 env->eip &= ~0xffffffffUL;
639 env->eip |= (uint32_t)ldl_p(mem_buf);
640 return 4;
641 }
Jan Kiszkab1631e72009-06-27 09:53:51 +0200642 case IDX_FLAGS_REG:
643 env->eflags = ldl_p(mem_buf);
644 return 4;
645
Jan Kiszka84273172009-06-27 09:53:51 +0200646 case IDX_SEG_REGS: return cpu_x86_gdb_load_seg(env, R_CS, mem_buf);
647 case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf);
648 case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf);
649 case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf);
650 case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf);
651 case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf);
Jan Kiszkab1631e72009-06-27 09:53:51 +0200652
653 case IDX_FP_REGS + 8:
654 env->fpuc = ldl_p(mem_buf);
655 return 4;
656 case IDX_FP_REGS + 9:
657 tmp = ldl_p(mem_buf);
658 env->fpstt = (tmp >> 11) & 7;
659 env->fpus = tmp & ~0x3800;
660 return 4;
661 case IDX_FP_REGS + 10: /* ftag */ return 4;
662 case IDX_FP_REGS + 11: /* fiseg */ return 4;
663 case IDX_FP_REGS + 12: /* fioff */ return 4;
664 case IDX_FP_REGS + 13: /* foseg */ return 4;
665 case IDX_FP_REGS + 14: /* fooff */ return 4;
666 case IDX_FP_REGS + 15: /* fop */ return 4;
667
668 case IDX_MXCSR_REG:
669 env->mxcsr = ldl_p(mem_buf);
670 return 4;
bellard79808572008-05-09 14:40:22 +0000671 }
bellard79808572008-05-09 14:40:22 +0000672 }
pbrook56aebc82008-10-11 17:55:29 +0000673 /* Unrecognised register. */
674 return 0;
bellard6da41ea2004-01-04 15:48:38 +0000675}
676
bellard9e62fd72004-01-05 22:49:06 +0000677#elif defined (TARGET_PPC)
pbrook56aebc82008-10-11 17:55:29 +0000678
aurel32e571cb42009-01-24 15:07:42 +0000679/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
680 expects whatever the target description contains. Due to a
681 historical mishap the FP registers appear in between core integer
682 regs and PC, MSR, CR, and so forth. We hack round this by giving the
683 FP regs zero size when talking to a newer gdb. */
pbrook56aebc82008-10-11 17:55:29 +0000684#define NUM_CORE_REGS 71
aurel32e571cb42009-01-24 15:07:42 +0000685#if defined (TARGET_PPC64)
686#define GDB_CORE_XML "power64-core.xml"
687#else
688#define GDB_CORE_XML "power-core.xml"
689#endif
pbrook56aebc82008-10-11 17:55:29 +0000690
691static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
bellard9e62fd72004-01-05 22:49:06 +0000692{
pbrook56aebc82008-10-11 17:55:29 +0000693 if (n < 32) {
694 /* gprs */
695 GET_REGL(env->gpr[n]);
696 } else if (n < 64) {
697 /* fprs */
aurel32e571cb42009-01-24 15:07:42 +0000698 if (gdb_has_xml)
699 return 0;
aurel328d4acf92008-11-30 16:23:18 +0000700 stfq_p(mem_buf, env->fpr[n-32]);
pbrook56aebc82008-10-11 17:55:29 +0000701 return 8;
702 } else {
703 switch (n) {
704 case 64: GET_REGL(env->nip);
705 case 65: GET_REGL(env->msr);
706 case 66:
707 {
708 uint32_t cr = 0;
709 int i;
710 for (i = 0; i < 8; i++)
711 cr |= env->crf[i] << (32 - ((i + 1) * 4));
712 GET_REG32(cr);
713 }
714 case 67: GET_REGL(env->lr);
715 case 68: GET_REGL(env->ctr);
aurel323d7b4172008-10-21 11:28:46 +0000716 case 69: GET_REGL(env->xer);
aurel32e571cb42009-01-24 15:07:42 +0000717 case 70:
718 {
719 if (gdb_has_xml)
720 return 0;
721 GET_REG32(0); /* fpscr */
722 }
pbrook56aebc82008-10-11 17:55:29 +0000723 }
bellard9e62fd72004-01-05 22:49:06 +0000724 }
pbrook56aebc82008-10-11 17:55:29 +0000725 return 0;
bellard9e62fd72004-01-05 22:49:06 +0000726}
727
pbrook56aebc82008-10-11 17:55:29 +0000728static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellard9e62fd72004-01-05 22:49:06 +0000729{
pbrook56aebc82008-10-11 17:55:29 +0000730 if (n < 32) {
731 /* gprs */
732 env->gpr[n] = ldtul_p(mem_buf);
733 return sizeof(target_ulong);
734 } else if (n < 64) {
735 /* fprs */
aurel32e571cb42009-01-24 15:07:42 +0000736 if (gdb_has_xml)
737 return 0;
aurel328d4acf92008-11-30 16:23:18 +0000738 env->fpr[n-32] = ldfq_p(mem_buf);
pbrook56aebc82008-10-11 17:55:29 +0000739 return 8;
740 } else {
741 switch (n) {
742 case 64:
743 env->nip = ldtul_p(mem_buf);
744 return sizeof(target_ulong);
745 case 65:
746 ppc_store_msr(env, ldtul_p(mem_buf));
747 return sizeof(target_ulong);
748 case 66:
749 {
750 uint32_t cr = ldl_p(mem_buf);
751 int i;
752 for (i = 0; i < 8; i++)
753 env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
754 return 4;
755 }
756 case 67:
757 env->lr = ldtul_p(mem_buf);
758 return sizeof(target_ulong);
759 case 68:
760 env->ctr = ldtul_p(mem_buf);
761 return sizeof(target_ulong);
762 case 69:
aurel323d7b4172008-10-21 11:28:46 +0000763 env->xer = ldtul_p(mem_buf);
764 return sizeof(target_ulong);
pbrook56aebc82008-10-11 17:55:29 +0000765 case 70:
766 /* fpscr */
aurel32e571cb42009-01-24 15:07:42 +0000767 if (gdb_has_xml)
768 return 0;
pbrook56aebc82008-10-11 17:55:29 +0000769 return 4;
770 }
bellard9e62fd72004-01-05 22:49:06 +0000771 }
pbrook56aebc82008-10-11 17:55:29 +0000772 return 0;
bellarde95c8d52004-09-30 22:22:08 +0000773}
pbrook56aebc82008-10-11 17:55:29 +0000774
bellarde95c8d52004-09-30 22:22:08 +0000775#elif defined (TARGET_SPARC)
bellarde95c8d52004-09-30 22:22:08 +0000776
pbrook56aebc82008-10-11 17:55:29 +0000777#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
778#define NUM_CORE_REGS 86
779#else
blueswir15a377912009-01-13 16:28:01 +0000780#define NUM_CORE_REGS 72
pbrook56aebc82008-10-11 17:55:29 +0000781#endif
782
783#ifdef TARGET_ABI32
784#define GET_REGA(val) GET_REG32(val)
785#else
786#define GET_REGA(val) GET_REGL(val)
787#endif
788
789static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
790{
791 if (n < 8) {
792 /* g0..g7 */
793 GET_REGA(env->gregs[n]);
bellarde95c8d52004-09-30 22:22:08 +0000794 }
pbrook56aebc82008-10-11 17:55:29 +0000795 if (n < 32) {
796 /* register window */
797 GET_REGA(env->regwptr[n - 8]);
bellarde95c8d52004-09-30 22:22:08 +0000798 }
pbrook56aebc82008-10-11 17:55:29 +0000799#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
800 if (n < 64) {
801 /* fprs */
802 GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
bellarde95c8d52004-09-30 22:22:08 +0000803 }
804 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
pbrook56aebc82008-10-11 17:55:29 +0000805 switch (n) {
806 case 64: GET_REGA(env->y);
807 case 65: GET_REGA(GET_PSR(env));
808 case 66: GET_REGA(env->wim);
809 case 67: GET_REGA(env->tbr);
810 case 68: GET_REGA(env->pc);
811 case 69: GET_REGA(env->npc);
812 case 70: GET_REGA(env->fsr);
813 case 71: GET_REGA(0); /* csr */
blueswir15a377912009-01-13 16:28:01 +0000814 default: GET_REGA(0);
bellard34751872005-07-02 14:31:34 +0000815 }
bellard34751872005-07-02 14:31:34 +0000816#else
pbrook56aebc82008-10-11 17:55:29 +0000817 if (n < 64) {
818 /* f0-f31 */
819 GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
bellard34751872005-07-02 14:31:34 +0000820 }
pbrook56aebc82008-10-11 17:55:29 +0000821 if (n < 80) {
822 /* f32-f62 (double width, even numbers only) */
823 uint64_t val;
824
825 val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
826 val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
827 GET_REG64(val);
828 }
829 switch (n) {
830 case 80: GET_REGL(env->pc);
831 case 81: GET_REGL(env->npc);
832 case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
blueswir117d996e2007-07-07 20:53:22 +0000833 ((env->asi & 0xff) << 24) |
834 ((env->pstate & 0xfff) << 8) |
835 GET_CWP64(env));
pbrook56aebc82008-10-11 17:55:29 +0000836 case 83: GET_REGL(env->fsr);
837 case 84: GET_REGL(env->fprs);
838 case 85: GET_REGL(env->y);
839 }
bellard34751872005-07-02 14:31:34 +0000840#endif
pbrook56aebc82008-10-11 17:55:29 +0000841 return 0;
bellarde95c8d52004-09-30 22:22:08 +0000842}
843
pbrook56aebc82008-10-11 17:55:29 +0000844static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellarde95c8d52004-09-30 22:22:08 +0000845{
pbrook56aebc82008-10-11 17:55:29 +0000846#if defined(TARGET_ABI32)
847 abi_ulong tmp;
848
849 tmp = ldl_p(mem_buf);
blueswir196d19122008-06-07 08:03:05 +0000850#else
pbrook56aebc82008-10-11 17:55:29 +0000851 target_ulong tmp;
852
853 tmp = ldtul_p(mem_buf);
blueswir196d19122008-06-07 08:03:05 +0000854#endif
bellarde95c8d52004-09-30 22:22:08 +0000855
pbrook56aebc82008-10-11 17:55:29 +0000856 if (n < 8) {
857 /* g0..g7 */
858 env->gregs[n] = tmp;
859 } else if (n < 32) {
860 /* register window */
861 env->regwptr[n - 8] = tmp;
bellarde95c8d52004-09-30 22:22:08 +0000862 }
pbrook56aebc82008-10-11 17:55:29 +0000863#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
864 else if (n < 64) {
865 /* fprs */
866 *((uint32_t *)&env->fpr[n - 32]) = tmp;
867 } else {
868 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
869 switch (n) {
870 case 64: env->y = tmp; break;
871 case 65: PUT_PSR(env, tmp); break;
872 case 66: env->wim = tmp; break;
873 case 67: env->tbr = tmp; break;
874 case 68: env->pc = tmp; break;
875 case 69: env->npc = tmp; break;
876 case 70: env->fsr = tmp; break;
877 default: return 0;
878 }
bellarde95c8d52004-09-30 22:22:08 +0000879 }
pbrook56aebc82008-10-11 17:55:29 +0000880 return 4;
bellard34751872005-07-02 14:31:34 +0000881#else
pbrook56aebc82008-10-11 17:55:29 +0000882 else if (n < 64) {
883 /* f0-f31 */
pbrook56aebc82008-10-11 17:55:29 +0000884 env->fpr[n] = ldfl_p(mem_buf);
885 return 4;
886 } else if (n < 80) {
887 /* f32-f62 (double width, even numbers only) */
888 *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
889 *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
890 } else {
891 switch (n) {
892 case 80: env->pc = tmp; break;
893 case 81: env->npc = tmp; break;
894 case 82:
895 PUT_CCR(env, tmp >> 32);
896 env->asi = (tmp >> 24) & 0xff;
897 env->pstate = (tmp >> 8) & 0xfff;
898 PUT_CWP64(env, tmp & 0xff);
899 break;
900 case 83: env->fsr = tmp; break;
901 case 84: env->fprs = tmp; break;
902 case 85: env->y = tmp; break;
903 default: return 0;
904 }
bellard34751872005-07-02 14:31:34 +0000905 }
pbrook56aebc82008-10-11 17:55:29 +0000906 return 8;
bellard34751872005-07-02 14:31:34 +0000907#endif
bellard9e62fd72004-01-05 22:49:06 +0000908}
bellard1fddef42005-04-17 19:16:13 +0000909#elif defined (TARGET_ARM)
pbrook56aebc82008-10-11 17:55:29 +0000910
911/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
912 whatever the target description contains. Due to a historical mishap
913 the FPA registers appear in between core integer regs and the CPSR.
914 We hack round this by giving the FPA regs zero size when talking to a
915 newer gdb. */
916#define NUM_CORE_REGS 26
917#define GDB_CORE_XML "arm-core.xml"
918
919static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
bellard1fddef42005-04-17 19:16:13 +0000920{
pbrook56aebc82008-10-11 17:55:29 +0000921 if (n < 16) {
922 /* Core integer register. */
923 GET_REG32(env->regs[n]);
924 }
925 if (n < 24) {
926 /* FPA registers. */
927 if (gdb_has_xml)
928 return 0;
929 memset(mem_buf, 0, 12);
930 return 12;
931 }
932 switch (n) {
933 case 24:
934 /* FPA status register. */
935 if (gdb_has_xml)
936 return 0;
937 GET_REG32(0);
938 case 25:
939 /* CPSR */
940 GET_REG32(cpsr_read(env));
941 }
942 /* Unknown register. */
943 return 0;
bellard1fddef42005-04-17 19:16:13 +0000944}
945
pbrook56aebc82008-10-11 17:55:29 +0000946static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellard1fddef42005-04-17 19:16:13 +0000947{
pbrook56aebc82008-10-11 17:55:29 +0000948 uint32_t tmp;
bellard1fddef42005-04-17 19:16:13 +0000949
pbrook56aebc82008-10-11 17:55:29 +0000950 tmp = ldl_p(mem_buf);
951
952 /* Mask out low bit of PC to workaround gdb bugs. This will probably
953 cause problems if we ever implement the Jazelle DBX extensions. */
954 if (n == 15)
955 tmp &= ~1;
956
957 if (n < 16) {
958 /* Core integer register. */
959 env->regs[n] = tmp;
960 return 4;
961 }
962 if (n < 24) { /* 16-23 */
963 /* FPA registers (ignored). */
964 if (gdb_has_xml)
965 return 0;
966 return 12;
967 }
968 switch (n) {
969 case 24:
970 /* FPA status register (ignored). */
971 if (gdb_has_xml)
972 return 0;
973 return 4;
974 case 25:
975 /* CPSR */
976 cpsr_write (env, tmp, 0xffffffff);
977 return 4;
978 }
979 /* Unknown register. */
980 return 0;
bellard1fddef42005-04-17 19:16:13 +0000981}
pbrook56aebc82008-10-11 17:55:29 +0000982
pbrooke6e59062006-10-22 00:18:54 +0000983#elif defined (TARGET_M68K)
pbrook56aebc82008-10-11 17:55:29 +0000984
985#define NUM_CORE_REGS 18
986
987#define GDB_CORE_XML "cf-core.xml"
988
989static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
pbrooke6e59062006-10-22 00:18:54 +0000990{
pbrook56aebc82008-10-11 17:55:29 +0000991 if (n < 8) {
992 /* D0-D7 */
993 GET_REG32(env->dregs[n]);
994 } else if (n < 16) {
995 /* A0-A7 */
996 GET_REG32(env->aregs[n - 8]);
997 } else {
998 switch (n) {
999 case 16: GET_REG32(env->sr);
1000 case 17: GET_REG32(env->pc);
1001 }
pbrooke6e59062006-10-22 00:18:54 +00001002 }
pbrook56aebc82008-10-11 17:55:29 +00001003 /* FP registers not included here because they vary between
1004 ColdFire and m68k. Use XML bits for these. */
1005 return 0;
pbrooke6e59062006-10-22 00:18:54 +00001006}
1007
pbrook56aebc82008-10-11 17:55:29 +00001008static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
pbrooke6e59062006-10-22 00:18:54 +00001009{
pbrook56aebc82008-10-11 17:55:29 +00001010 uint32_t tmp;
pbrooke6e59062006-10-22 00:18:54 +00001011
pbrook56aebc82008-10-11 17:55:29 +00001012 tmp = ldl_p(mem_buf);
1013
1014 if (n < 8) {
1015 /* D0-D7 */
1016 env->dregs[n] = tmp;
Kazu Hiratab3d6b952010-01-14 09:08:00 -08001017 } else if (n < 16) {
pbrook56aebc82008-10-11 17:55:29 +00001018 /* A0-A7 */
1019 env->aregs[n - 8] = tmp;
1020 } else {
1021 switch (n) {
1022 case 16: env->sr = tmp; break;
1023 case 17: env->pc = tmp; break;
1024 default: return 0;
1025 }
pbrooke6e59062006-10-22 00:18:54 +00001026 }
pbrook56aebc82008-10-11 17:55:29 +00001027 return 4;
pbrooke6e59062006-10-22 00:18:54 +00001028}
bellard6f970bd2005-12-05 19:55:19 +00001029#elif defined (TARGET_MIPS)
pbrook56aebc82008-10-11 17:55:29 +00001030
1031#define NUM_CORE_REGS 73
1032
1033static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
bellard6f970bd2005-12-05 19:55:19 +00001034{
pbrook56aebc82008-10-11 17:55:29 +00001035 if (n < 32) {
1036 GET_REGL(env->active_tc.gpr[n]);
1037 }
1038 if (env->CP0_Config1 & (1 << CP0C1_FP)) {
1039 if (n >= 38 && n < 70) {
ths7ac256b2007-10-25 21:30:37 +00001040 if (env->CP0_Status & (1 << CP0St_FR))
pbrook56aebc82008-10-11 17:55:29 +00001041 GET_REGL(env->active_fpu.fpr[n - 38].d);
ths7ac256b2007-10-25 21:30:37 +00001042 else
pbrook56aebc82008-10-11 17:55:29 +00001043 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
1044 }
1045 switch (n) {
1046 case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
1047 case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
1048 }
1049 }
1050 switch (n) {
1051 case 32: GET_REGL((int32_t)env->CP0_Status);
1052 case 33: GET_REGL(env->active_tc.LO[0]);
1053 case 34: GET_REGL(env->active_tc.HI[0]);
1054 case 35: GET_REGL(env->CP0_BadVAddr);
1055 case 36: GET_REGL((int32_t)env->CP0_Cause);
Nathan Froydff1d1972009-12-08 08:06:30 -08001056 case 37: GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16));
pbrook56aebc82008-10-11 17:55:29 +00001057 case 72: GET_REGL(0); /* fp */
1058 case 89: GET_REGL((int32_t)env->CP0_PRid);
1059 }
1060 if (n >= 73 && n <= 88) {
1061 /* 16 embedded regs. */
1062 GET_REGL(0);
1063 }
ths36d23952007-02-28 22:37:42 +00001064
pbrook56aebc82008-10-11 17:55:29 +00001065 return 0;
bellard6f970bd2005-12-05 19:55:19 +00001066}
1067
ths8e33c082006-12-11 19:22:27 +00001068/* convert MIPS rounding mode in FCR31 to IEEE library */
1069static unsigned int ieee_rm[] =
1070 {
1071 float_round_nearest_even,
1072 float_round_to_zero,
1073 float_round_up,
1074 float_round_down
1075 };
1076#define RESTORE_ROUNDING_MODE \
thsf01be152008-09-18 11:57:27 +00001077 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
ths8e33c082006-12-11 19:22:27 +00001078
pbrook56aebc82008-10-11 17:55:29 +00001079static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellard6f970bd2005-12-05 19:55:19 +00001080{
pbrook56aebc82008-10-11 17:55:29 +00001081 target_ulong tmp;
bellard6f970bd2005-12-05 19:55:19 +00001082
pbrook56aebc82008-10-11 17:55:29 +00001083 tmp = ldtul_p(mem_buf);
bellard6f970bd2005-12-05 19:55:19 +00001084
pbrook56aebc82008-10-11 17:55:29 +00001085 if (n < 32) {
1086 env->active_tc.gpr[n] = tmp;
1087 return sizeof(target_ulong);
1088 }
1089 if (env->CP0_Config1 & (1 << CP0C1_FP)
1090 && n >= 38 && n < 73) {
1091 if (n < 70) {
ths7ac256b2007-10-25 21:30:37 +00001092 if (env->CP0_Status & (1 << CP0St_FR))
pbrook56aebc82008-10-11 17:55:29 +00001093 env->active_fpu.fpr[n - 38].d = tmp;
ths7ac256b2007-10-25 21:30:37 +00001094 else
pbrook56aebc82008-10-11 17:55:29 +00001095 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1096 }
1097 switch (n) {
1098 case 70:
1099 env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1100 /* set rounding mode */
1101 RESTORE_ROUNDING_MODE;
ths8e33c082006-12-11 19:22:27 +00001102#ifndef CONFIG_SOFTFLOAT
pbrook56aebc82008-10-11 17:55:29 +00001103 /* no floating point exception for native float */
1104 SET_FP_ENABLE(env->active_fpu.fcr31, 0);
ths8e33c082006-12-11 19:22:27 +00001105#endif
pbrook56aebc82008-10-11 17:55:29 +00001106 break;
1107 case 71: env->active_fpu.fcr0 = tmp; break;
1108 }
1109 return sizeof(target_ulong);
1110 }
1111 switch (n) {
1112 case 32: env->CP0_Status = tmp; break;
1113 case 33: env->active_tc.LO[0] = tmp; break;
1114 case 34: env->active_tc.HI[0] = tmp; break;
1115 case 35: env->CP0_BadVAddr = tmp; break;
1116 case 36: env->CP0_Cause = tmp; break;
Nathan Froydff1d1972009-12-08 08:06:30 -08001117 case 37:
1118 env->active_tc.PC = tmp & ~(target_ulong)1;
1119 if (tmp & 1) {
1120 env->hflags |= MIPS_HFLAG_M16;
1121 } else {
1122 env->hflags &= ~(MIPS_HFLAG_M16);
1123 }
1124 break;
pbrook56aebc82008-10-11 17:55:29 +00001125 case 72: /* fp, ignored */ break;
1126 default:
1127 if (n > 89)
1128 return 0;
1129 /* Other registers are readonly. Ignore writes. */
1130 break;
1131 }
1132
1133 return sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +00001134}
bellardfdf9b3e2006-04-27 21:07:38 +00001135#elif defined (TARGET_SH4)
ths6ef99fc2007-05-13 16:36:24 +00001136
1137/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
pbrook56aebc82008-10-11 17:55:29 +00001138/* FIXME: We should use XML for this. */
ths6ef99fc2007-05-13 16:36:24 +00001139
pbrook56aebc82008-10-11 17:55:29 +00001140#define NUM_CORE_REGS 59
1141
1142static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
bellardfdf9b3e2006-04-27 21:07:38 +00001143{
pbrook56aebc82008-10-11 17:55:29 +00001144 if (n < 8) {
1145 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1146 GET_REGL(env->gregs[n + 16]);
1147 } else {
1148 GET_REGL(env->gregs[n]);
1149 }
1150 } else if (n < 16) {
takasi-y@ops.dti.ne.jpe192a452010-02-18 00:53:29 +09001151 GET_REGL(env->gregs[n]);
pbrook56aebc82008-10-11 17:55:29 +00001152 } else if (n >= 25 && n < 41) {
1153 GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1154 } else if (n >= 43 && n < 51) {
1155 GET_REGL(env->gregs[n - 43]);
1156 } else if (n >= 51 && n < 59) {
1157 GET_REGL(env->gregs[n - (51 - 16)]);
1158 }
1159 switch (n) {
1160 case 16: GET_REGL(env->pc);
1161 case 17: GET_REGL(env->pr);
1162 case 18: GET_REGL(env->gbr);
1163 case 19: GET_REGL(env->vbr);
1164 case 20: GET_REGL(env->mach);
1165 case 21: GET_REGL(env->macl);
1166 case 22: GET_REGL(env->sr);
1167 case 23: GET_REGL(env->fpul);
1168 case 24: GET_REGL(env->fpscr);
1169 case 41: GET_REGL(env->ssr);
1170 case 42: GET_REGL(env->spc);
1171 }
bellardfdf9b3e2006-04-27 21:07:38 +00001172
pbrook56aebc82008-10-11 17:55:29 +00001173 return 0;
bellardfdf9b3e2006-04-27 21:07:38 +00001174}
1175
pbrook56aebc82008-10-11 17:55:29 +00001176static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellardfdf9b3e2006-04-27 21:07:38 +00001177{
pbrook56aebc82008-10-11 17:55:29 +00001178 uint32_t tmp;
bellardfdf9b3e2006-04-27 21:07:38 +00001179
pbrook56aebc82008-10-11 17:55:29 +00001180 tmp = ldl_p(mem_buf);
1181
1182 if (n < 8) {
1183 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1184 env->gregs[n + 16] = tmp;
1185 } else {
1186 env->gregs[n] = tmp;
1187 }
1188 return 4;
1189 } else if (n < 16) {
takasi-y@ops.dti.ne.jpe192a452010-02-18 00:53:29 +09001190 env->gregs[n] = tmp;
pbrook56aebc82008-10-11 17:55:29 +00001191 return 4;
1192 } else if (n >= 25 && n < 41) {
1193 env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
takasi-y@ops.dti.ne.jpe192a452010-02-18 00:53:29 +09001194 return 4;
pbrook56aebc82008-10-11 17:55:29 +00001195 } else if (n >= 43 && n < 51) {
1196 env->gregs[n - 43] = tmp;
1197 return 4;
1198 } else if (n >= 51 && n < 59) {
1199 env->gregs[n - (51 - 16)] = tmp;
1200 return 4;
1201 }
1202 switch (n) {
takasi-y@ops.dti.ne.jpe192a452010-02-18 00:53:29 +09001203 case 16: env->pc = tmp; break;
1204 case 17: env->pr = tmp; break;
1205 case 18: env->gbr = tmp; break;
1206 case 19: env->vbr = tmp; break;
1207 case 20: env->mach = tmp; break;
1208 case 21: env->macl = tmp; break;
1209 case 22: env->sr = tmp; break;
1210 case 23: env->fpul = tmp; break;
1211 case 24: env->fpscr = tmp; break;
1212 case 41: env->ssr = tmp; break;
1213 case 42: env->spc = tmp; break;
pbrook56aebc82008-10-11 17:55:29 +00001214 default: return 0;
1215 }
1216
1217 return 4;
bellardfdf9b3e2006-04-27 21:07:38 +00001218}
Edgar E. Iglesiasd74d6a92009-05-20 20:16:31 +02001219#elif defined (TARGET_MICROBLAZE)
1220
1221#define NUM_CORE_REGS (32 + 5)
1222
1223static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1224{
1225 if (n < 32) {
1226 GET_REG32(env->regs[n]);
1227 } else {
1228 GET_REG32(env->sregs[n - 32]);
1229 }
1230 return 0;
1231}
1232
1233static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1234{
1235 uint32_t tmp;
1236
1237 if (n > NUM_CORE_REGS)
1238 return 0;
1239
1240 tmp = ldl_p(mem_buf);
1241
1242 if (n < 32) {
1243 env->regs[n] = tmp;
1244 } else {
1245 env->sregs[n - 32] = tmp;
1246 }
1247 return 4;
1248}
thsf1ccf902007-10-08 13:16:14 +00001249#elif defined (TARGET_CRIS)
1250
pbrook56aebc82008-10-11 17:55:29 +00001251#define NUM_CORE_REGS 49
1252
Edgar E. Iglesias4a0b59f2010-02-20 19:51:56 +01001253static int
1254read_register_crisv10(CPUState *env, uint8_t *mem_buf, int n)
1255{
1256 if (n < 15) {
1257 GET_REG32(env->regs[n]);
1258 }
1259
1260 if (n == 15) {
1261 GET_REG32(env->pc);
1262 }
1263
1264 if (n < 32) {
1265 switch (n) {
1266 case 16:
1267 GET_REG8(env->pregs[n - 16]);
1268 break;
1269 case 17:
1270 GET_REG8(env->pregs[n - 16]);
1271 break;
1272 case 20:
1273 case 21:
1274 GET_REG16(env->pregs[n - 16]);
1275 break;
1276 default:
1277 if (n >= 23) {
1278 GET_REG32(env->pregs[n - 16]);
1279 }
1280 break;
1281 }
1282 }
1283 return 0;
1284}
1285
pbrook56aebc82008-10-11 17:55:29 +00001286static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
thsf1ccf902007-10-08 13:16:14 +00001287{
pbrook56aebc82008-10-11 17:55:29 +00001288 uint8_t srs;
1289
Edgar E. Iglesias4a0b59f2010-02-20 19:51:56 +01001290 if (env->pregs[PR_VR] < 32)
1291 return read_register_crisv10(env, mem_buf, n);
1292
pbrook56aebc82008-10-11 17:55:29 +00001293 srs = env->pregs[PR_SRS];
1294 if (n < 16) {
1295 GET_REG32(env->regs[n]);
1296 }
1297
1298 if (n >= 21 && n < 32) {
1299 GET_REG32(env->pregs[n - 16]);
1300 }
1301 if (n >= 33 && n < 49) {
1302 GET_REG32(env->sregs[srs][n - 33]);
1303 }
1304 switch (n) {
1305 case 16: GET_REG8(env->pregs[0]);
1306 case 17: GET_REG8(env->pregs[1]);
1307 case 18: GET_REG32(env->pregs[2]);
1308 case 19: GET_REG8(srs);
1309 case 20: GET_REG16(env->pregs[4]);
1310 case 32: GET_REG32(env->pc);
1311 }
1312
1313 return 0;
thsf1ccf902007-10-08 13:16:14 +00001314}
1315
pbrook56aebc82008-10-11 17:55:29 +00001316static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
thsf1ccf902007-10-08 13:16:14 +00001317{
pbrook56aebc82008-10-11 17:55:29 +00001318 uint32_t tmp;
thsf1ccf902007-10-08 13:16:14 +00001319
pbrook56aebc82008-10-11 17:55:29 +00001320 if (n > 49)
1321 return 0;
thsf1ccf902007-10-08 13:16:14 +00001322
pbrook56aebc82008-10-11 17:55:29 +00001323 tmp = ldl_p(mem_buf);
thsf1ccf902007-10-08 13:16:14 +00001324
pbrook56aebc82008-10-11 17:55:29 +00001325 if (n < 16) {
1326 env->regs[n] = tmp;
1327 }
thsf1ccf902007-10-08 13:16:14 +00001328
edgar_igld7b69672008-10-11 19:32:21 +00001329 if (n >= 21 && n < 32) {
1330 env->pregs[n - 16] = tmp;
1331 }
1332
1333 /* FIXME: Should support function regs be writable? */
pbrook56aebc82008-10-11 17:55:29 +00001334 switch (n) {
1335 case 16: return 1;
1336 case 17: return 1;
edgar_igld7b69672008-10-11 19:32:21 +00001337 case 18: env->pregs[PR_PID] = tmp; break;
pbrook56aebc82008-10-11 17:55:29 +00001338 case 19: return 1;
1339 case 20: return 2;
1340 case 32: env->pc = tmp; break;
1341 }
thsf1ccf902007-10-08 13:16:14 +00001342
pbrook56aebc82008-10-11 17:55:29 +00001343 return 4;
thsf1ccf902007-10-08 13:16:14 +00001344}
aurel3219bf5172008-12-07 23:26:32 +00001345#elif defined (TARGET_ALPHA)
1346
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001347#define NUM_CORE_REGS 67
aurel3219bf5172008-12-07 23:26:32 +00001348
1349static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1350{
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001351 uint64_t val;
1352 CPU_DoubleU d;
aurel3219bf5172008-12-07 23:26:32 +00001353
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001354 switch (n) {
1355 case 0 ... 30:
1356 val = env->ir[n];
1357 break;
1358 case 32 ... 62:
1359 d.d = env->fir[n - 32];
1360 val = d.ll;
1361 break;
1362 case 63:
1363 val = cpu_alpha_load_fpcr(env);
1364 break;
1365 case 64:
1366 val = env->pc;
1367 break;
1368 case 66:
1369 val = env->unique;
1370 break;
1371 case 31:
1372 case 65:
1373 /* 31 really is the zero register; 65 is unassigned in the
1374 gdb protocol, but is still required to occupy 8 bytes. */
1375 val = 0;
1376 break;
1377 default:
1378 return 0;
aurel3219bf5172008-12-07 23:26:32 +00001379 }
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001380 GET_REGL(val);
aurel3219bf5172008-12-07 23:26:32 +00001381}
1382
1383static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1384{
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001385 target_ulong tmp = ldtul_p(mem_buf);
1386 CPU_DoubleU d;
aurel3219bf5172008-12-07 23:26:32 +00001387
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001388 switch (n) {
1389 case 0 ... 30:
aurel3219bf5172008-12-07 23:26:32 +00001390 env->ir[n] = tmp;
Richard Henderson7c5a90d2009-12-31 11:54:01 -08001391 break;
1392 case 32 ... 62:
1393 d.ll = tmp;
1394 env->fir[n - 32] = d.d;
1395 break;
1396 case 63:
1397 cpu_alpha_store_fpcr(env, tmp);
1398 break;
1399 case 64:
1400 env->pc = tmp;
1401 break;
1402 case 66:
1403 env->unique = tmp;
1404 break;
1405 case 31:
1406 case 65:
1407 /* 31 really is the zero register; 65 is unassigned in the
1408 gdb protocol, but is still required to occupy 8 bytes. */
1409 break;
1410 default:
1411 return 0;
aurel3219bf5172008-12-07 23:26:32 +00001412 }
aurel3219bf5172008-12-07 23:26:32 +00001413 return 8;
1414}
Alexander Grafafcb0e42009-12-05 12:44:29 +01001415#elif defined (TARGET_S390X)
1416
1417#define NUM_CORE_REGS S390_NUM_TOTAL_REGS
1418
1419static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1420{
1421 switch (n) {
1422 case S390_PSWM_REGNUM: GET_REGL(env->psw.mask); break;
1423 case S390_PSWA_REGNUM: GET_REGL(env->psw.addr); break;
1424 case S390_R0_REGNUM ... S390_R15_REGNUM:
1425 GET_REGL(env->regs[n-S390_R0_REGNUM]); break;
1426 case S390_A0_REGNUM ... S390_A15_REGNUM:
1427 GET_REG32(env->aregs[n-S390_A0_REGNUM]); break;
1428 case S390_FPC_REGNUM: GET_REG32(env->fpc); break;
1429 case S390_F0_REGNUM ... S390_F15_REGNUM:
1430 /* XXX */
1431 break;
1432 case S390_PC_REGNUM: GET_REGL(env->psw.addr); break;
1433 case S390_CC_REGNUM: GET_REG32(env->cc); break;
1434 }
1435
1436 return 0;
1437}
1438
1439static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1440{
1441 target_ulong tmpl;
1442 uint32_t tmp32;
1443 int r = 8;
1444 tmpl = ldtul_p(mem_buf);
1445 tmp32 = ldl_p(mem_buf);
1446
1447 switch (n) {
1448 case S390_PSWM_REGNUM: env->psw.mask = tmpl; break;
1449 case S390_PSWA_REGNUM: env->psw.addr = tmpl; break;
1450 case S390_R0_REGNUM ... S390_R15_REGNUM:
1451 env->regs[n-S390_R0_REGNUM] = tmpl; break;
1452 case S390_A0_REGNUM ... S390_A15_REGNUM:
1453 env->aregs[n-S390_A0_REGNUM] = tmp32; r=4; break;
1454 case S390_FPC_REGNUM: env->fpc = tmp32; r=4; break;
1455 case S390_F0_REGNUM ... S390_F15_REGNUM:
1456 /* XXX */
1457 break;
1458 case S390_PC_REGNUM: env->psw.addr = tmpl; break;
1459 case S390_CC_REGNUM: env->cc = tmp32; r=4; break;
1460 }
1461
1462 return r;
1463}
bellard1fddef42005-04-17 19:16:13 +00001464#else
pbrook56aebc82008-10-11 17:55:29 +00001465
1466#define NUM_CORE_REGS 0
1467
1468static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
bellard6da41ea2004-01-04 15:48:38 +00001469{
1470 return 0;
1471}
1472
pbrook56aebc82008-10-11 17:55:29 +00001473static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
bellard6da41ea2004-01-04 15:48:38 +00001474{
pbrook56aebc82008-10-11 17:55:29 +00001475 return 0;
bellard6da41ea2004-01-04 15:48:38 +00001476}
1477
1478#endif
bellardb4608c02003-06-27 17:34:32 +00001479
pbrook56aebc82008-10-11 17:55:29 +00001480static int num_g_regs = NUM_CORE_REGS;
1481
1482#ifdef GDB_CORE_XML
1483/* Encode data using the encoding for 'x' packets. */
1484static int memtox(char *buf, const char *mem, int len)
1485{
1486 char *p = buf;
1487 char c;
1488
1489 while (len--) {
1490 c = *(mem++);
1491 switch (c) {
1492 case '#': case '$': case '*': case '}':
1493 *(p++) = '}';
1494 *(p++) = c ^ 0x20;
1495 break;
1496 default:
1497 *(p++) = c;
1498 break;
1499 }
1500 }
1501 return p - buf;
1502}
1503
aurel323faf7782008-12-07 23:26:17 +00001504static const char *get_feature_xml(const char *p, const char **newp)
pbrook56aebc82008-10-11 17:55:29 +00001505{
1506 extern const char *const xml_builtin[][2];
1507 size_t len;
1508 int i;
1509 const char *name;
1510 static char target_xml[1024];
1511
1512 len = 0;
1513 while (p[len] && p[len] != ':')
1514 len++;
1515 *newp = p + len;
1516
1517 name = NULL;
1518 if (strncmp(p, "target.xml", len) == 0) {
1519 /* Generate the XML description for this CPU. */
1520 if (!target_xml[0]) {
1521 GDBRegisterState *r;
1522
blueswir15b3715b2008-10-25 11:18:12 +00001523 snprintf(target_xml, sizeof(target_xml),
1524 "<?xml version=\"1.0\"?>"
1525 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1526 "<target>"
1527 "<xi:include href=\"%s\"/>",
1528 GDB_CORE_XML);
pbrook56aebc82008-10-11 17:55:29 +00001529
aliguori880a7572008-11-18 20:30:24 +00001530 for (r = first_cpu->gdb_regs; r; r = r->next) {
blueswir12dc766d2009-04-13 16:06:19 +00001531 pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1532 pstrcat(target_xml, sizeof(target_xml), r->xml);
1533 pstrcat(target_xml, sizeof(target_xml), "\"/>");
pbrook56aebc82008-10-11 17:55:29 +00001534 }
blueswir12dc766d2009-04-13 16:06:19 +00001535 pstrcat(target_xml, sizeof(target_xml), "</target>");
pbrook56aebc82008-10-11 17:55:29 +00001536 }
1537 return target_xml;
1538 }
1539 for (i = 0; ; i++) {
1540 name = xml_builtin[i][0];
1541 if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1542 break;
1543 }
1544 return name ? xml_builtin[i][1] : NULL;
1545}
1546#endif
1547
1548static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1549{
1550 GDBRegisterState *r;
1551
1552 if (reg < NUM_CORE_REGS)
1553 return cpu_gdb_read_register(env, mem_buf, reg);
1554
1555 for (r = env->gdb_regs; r; r = r->next) {
1556 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1557 return r->get_reg(env, mem_buf, reg - r->base_reg);
1558 }
1559 }
1560 return 0;
1561}
1562
1563static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1564{
1565 GDBRegisterState *r;
1566
1567 if (reg < NUM_CORE_REGS)
1568 return cpu_gdb_write_register(env, mem_buf, reg);
1569
1570 for (r = env->gdb_regs; r; r = r->next) {
1571 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1572 return r->set_reg(env, mem_buf, reg - r->base_reg);
1573 }
1574 }
1575 return 0;
1576}
1577
1578/* Register a supplemental set of CPU registers. If g_pos is nonzero it
1579 specifies the first register number and these registers are included in
1580 a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1581 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1582 */
1583
1584void gdb_register_coprocessor(CPUState * env,
1585 gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1586 int num_regs, const char *xml, int g_pos)
1587{
1588 GDBRegisterState *s;
1589 GDBRegisterState **p;
1590 static int last_reg = NUM_CORE_REGS;
1591
1592 s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1593 s->base_reg = last_reg;
1594 s->num_regs = num_regs;
1595 s->get_reg = get_reg;
1596 s->set_reg = set_reg;
1597 s->xml = xml;
1598 p = &env->gdb_regs;
1599 while (*p) {
1600 /* Check for duplicates. */
1601 if (strcmp((*p)->xml, xml) == 0)
1602 return;
1603 p = &(*p)->next;
1604 }
1605 /* Add to end of list. */
1606 last_reg += num_regs;
1607 *p = s;
1608 if (g_pos) {
1609 if (g_pos != s->base_reg) {
1610 fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1611 "Expected %d got %d\n", xml, g_pos, s->base_reg);
1612 } else {
1613 num_g_regs = last_reg;
1614 }
1615 }
1616}
1617
aliguoria1d1bb32008-11-18 20:07:32 +00001618#ifndef CONFIG_USER_ONLY
1619static const int xlat_gdb_type[] = {
1620 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE,
1621 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ,
1622 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1623};
1624#endif
1625
aliguori880a7572008-11-18 20:30:24 +00001626static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
aliguoria1d1bb32008-11-18 20:07:32 +00001627{
aliguori880a7572008-11-18 20:30:24 +00001628 CPUState *env;
1629 int err = 0;
1630
aliguorie22a25c2009-03-12 20:12:48 +00001631 if (kvm_enabled())
1632 return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1633
aliguoria1d1bb32008-11-18 20:07:32 +00001634 switch (type) {
1635 case GDB_BREAKPOINT_SW:
1636 case GDB_BREAKPOINT_HW:
aliguori880a7572008-11-18 20:30:24 +00001637 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1638 err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1639 if (err)
1640 break;
1641 }
1642 return err;
aliguoria1d1bb32008-11-18 20:07:32 +00001643#ifndef CONFIG_USER_ONLY
1644 case GDB_WATCHPOINT_WRITE:
1645 case GDB_WATCHPOINT_READ:
1646 case GDB_WATCHPOINT_ACCESS:
aliguori880a7572008-11-18 20:30:24 +00001647 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1648 err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1649 NULL);
1650 if (err)
1651 break;
1652 }
1653 return err;
aliguoria1d1bb32008-11-18 20:07:32 +00001654#endif
1655 default:
1656 return -ENOSYS;
1657 }
1658}
1659
aliguori880a7572008-11-18 20:30:24 +00001660static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
aliguoria1d1bb32008-11-18 20:07:32 +00001661{
aliguori880a7572008-11-18 20:30:24 +00001662 CPUState *env;
1663 int err = 0;
1664
aliguorie22a25c2009-03-12 20:12:48 +00001665 if (kvm_enabled())
1666 return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1667
aliguoria1d1bb32008-11-18 20:07:32 +00001668 switch (type) {
1669 case GDB_BREAKPOINT_SW:
1670 case GDB_BREAKPOINT_HW:
aliguori880a7572008-11-18 20:30:24 +00001671 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1672 err = cpu_breakpoint_remove(env, addr, BP_GDB);
1673 if (err)
1674 break;
1675 }
1676 return err;
aliguoria1d1bb32008-11-18 20:07:32 +00001677#ifndef CONFIG_USER_ONLY
1678 case GDB_WATCHPOINT_WRITE:
1679 case GDB_WATCHPOINT_READ:
1680 case GDB_WATCHPOINT_ACCESS:
aliguori880a7572008-11-18 20:30:24 +00001681 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1682 err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1683 if (err)
1684 break;
1685 }
1686 return err;
aliguoria1d1bb32008-11-18 20:07:32 +00001687#endif
1688 default:
1689 return -ENOSYS;
1690 }
1691}
1692
aliguori880a7572008-11-18 20:30:24 +00001693static void gdb_breakpoint_remove_all(void)
aliguoria1d1bb32008-11-18 20:07:32 +00001694{
aliguori880a7572008-11-18 20:30:24 +00001695 CPUState *env;
1696
aliguorie22a25c2009-03-12 20:12:48 +00001697 if (kvm_enabled()) {
1698 kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1699 return;
1700 }
1701
aliguori880a7572008-11-18 20:30:24 +00001702 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1703 cpu_breakpoint_remove_all(env, BP_GDB);
aliguoria1d1bb32008-11-18 20:07:32 +00001704#ifndef CONFIG_USER_ONLY
aliguori880a7572008-11-18 20:30:24 +00001705 cpu_watchpoint_remove_all(env, BP_GDB);
aliguoria1d1bb32008-11-18 20:07:32 +00001706#endif
aliguori880a7572008-11-18 20:30:24 +00001707 }
aliguoria1d1bb32008-11-18 20:07:32 +00001708}
1709
aurel32fab9d282009-04-08 21:29:37 +00001710static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1711{
1712#if defined(TARGET_I386)
Avi Kivity4c0960c2009-08-17 23:19:53 +03001713 cpu_synchronize_state(s->c_cpu);
aurel32fab9d282009-04-08 21:29:37 +00001714 s->c_cpu->eip = pc;
aurel32fab9d282009-04-08 21:29:37 +00001715#elif defined (TARGET_PPC)
1716 s->c_cpu->nip = pc;
1717#elif defined (TARGET_SPARC)
1718 s->c_cpu->pc = pc;
1719 s->c_cpu->npc = pc + 4;
1720#elif defined (TARGET_ARM)
1721 s->c_cpu->regs[15] = pc;
1722#elif defined (TARGET_SH4)
1723 s->c_cpu->pc = pc;
1724#elif defined (TARGET_MIPS)
Nathan Froydff1d1972009-12-08 08:06:30 -08001725 s->c_cpu->active_tc.PC = pc & ~(target_ulong)1;
1726 if (pc & 1) {
1727 s->c_cpu->hflags |= MIPS_HFLAG_M16;
1728 } else {
1729 s->c_cpu->hflags &= ~(MIPS_HFLAG_M16);
1730 }
Edgar E. Iglesiasd74d6a92009-05-20 20:16:31 +02001731#elif defined (TARGET_MICROBLAZE)
1732 s->c_cpu->sregs[SR_PC] = pc;
aurel32fab9d282009-04-08 21:29:37 +00001733#elif defined (TARGET_CRIS)
1734 s->c_cpu->pc = pc;
1735#elif defined (TARGET_ALPHA)
1736 s->c_cpu->pc = pc;
Alexander Grafafcb0e42009-12-05 12:44:29 +01001737#elif defined (TARGET_S390X)
1738 cpu_synchronize_state(s->c_cpu);
1739 s->c_cpu->psw.addr = pc;
aurel32fab9d282009-04-08 21:29:37 +00001740#endif
1741}
1742
Nathan Froyd1e9fa732009-06-03 11:33:08 -07001743static inline int gdb_id(CPUState *env)
1744{
Juan Quintela2f7bb872009-07-27 16:13:24 +02001745#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL)
Nathan Froyd1e9fa732009-06-03 11:33:08 -07001746 return env->host_tid;
1747#else
1748 return env->cpu_index + 1;
1749#endif
1750}
1751
1752static CPUState *find_cpu(uint32_t thread_id)
1753{
1754 CPUState *env;
1755
1756 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1757 if (gdb_id(env) == thread_id) {
1758 return env;
1759 }
1760 }
1761
1762 return NULL;
1763}
1764
aliguori880a7572008-11-18 20:30:24 +00001765static int gdb_handle_packet(GDBState *s, const char *line_buf)
bellardb4608c02003-06-27 17:34:32 +00001766{
aliguori880a7572008-11-18 20:30:24 +00001767 CPUState *env;
bellardb4608c02003-06-27 17:34:32 +00001768 const char *p;
Nathan Froyd1e9fa732009-06-03 11:33:08 -07001769 uint32_t thread;
1770 int ch, reg_size, type, res;
pbrook56aebc82008-10-11 17:55:29 +00001771 char buf[MAX_PACKET_LENGTH];
1772 uint8_t mem_buf[MAX_PACKET_LENGTH];
1773 uint8_t *registers;
bellard9d9754a2006-06-25 15:32:37 +00001774 target_ulong addr, len;
ths3b46e622007-09-17 08:09:54 +00001775
bellard858693c2004-03-31 18:52:07 +00001776#ifdef DEBUG_GDB
1777 printf("command='%s'\n", line_buf);
bellard4c3a88a2003-07-26 12:06:08 +00001778#endif
bellard858693c2004-03-31 18:52:07 +00001779 p = line_buf;
1780 ch = *p++;
1781 switch(ch) {
1782 case '?':
bellard1fddef42005-04-17 19:16:13 +00001783 /* TODO: Make this return the correct value for user-mode. */
aurel32ca587a82008-12-18 22:44:13 +00001784 snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
Nathan Froyd1e9fa732009-06-03 11:33:08 -07001785 gdb_id(s->c_cpu));
bellard858693c2004-03-31 18:52:07 +00001786 put_packet(s, buf);
edgar_igl7d03f822008-05-17 18:58:29 +00001787 /* Remove all the breakpoints when this query is issued,
1788 * because gdb is doing and initial connect and the state
1789 * should be cleaned up.
1790 */
aliguori880a7572008-11-18 20:30:24 +00001791 gdb_breakpoint_remove_all();
bellard858693c2004-03-31 18:52:07 +00001792 break;
1793 case 'c':
1794 if (*p != '\0') {
bellard9d9754a2006-06-25 15:32:37 +00001795 addr = strtoull(p, (char **)&p, 16);
aurel32fab9d282009-04-08 21:29:37 +00001796 gdb_set_cpu_pc(s, addr);
bellard858693c2004-03-31 18:52:07 +00001797 }
aurel32ca587a82008-12-18 22:44:13 +00001798 s->signal = 0;
edgar_iglba70a622008-03-14 06:10:42 +00001799 gdb_continue(s);
bellard41625032005-04-24 10:07:11 +00001800 return RS_IDLE;
edgar_igl1f487ee2008-05-17 22:20:53 +00001801 case 'C':
aurel32ca587a82008-12-18 22:44:13 +00001802 s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1803 if (s->signal == -1)
1804 s->signal = 0;
edgar_igl1f487ee2008-05-17 22:20:53 +00001805 gdb_continue(s);
1806 return RS_IDLE;
Jan Kiszkadd32aa12009-06-27 09:53:51 +02001807 case 'v':
1808 if (strncmp(p, "Cont", 4) == 0) {
1809 int res_signal, res_thread;
1810
1811 p += 4;
1812 if (*p == '?') {
1813 put_packet(s, "vCont;c;C;s;S");
1814 break;
1815 }
1816 res = 0;
1817 res_signal = 0;
1818 res_thread = 0;
1819 while (*p) {
1820 int action, signal;
1821
1822 if (*p++ != ';') {
1823 res = 0;
1824 break;
1825 }
1826 action = *p++;
1827 signal = 0;
1828 if (action == 'C' || action == 'S') {
1829 signal = strtoul(p, (char **)&p, 16);
1830 } else if (action != 'c' && action != 's') {
1831 res = 0;
1832 break;
1833 }
1834 thread = 0;
1835 if (*p == ':') {
1836 thread = strtoull(p+1, (char **)&p, 16);
1837 }
1838 action = tolower(action);
1839 if (res == 0 || (res == 'c' && action == 's')) {
1840 res = action;
1841 res_signal = signal;
1842 res_thread = thread;
1843 }
1844 }
1845 if (res) {
1846 if (res_thread != -1 && res_thread != 0) {
1847 env = find_cpu(res_thread);
1848 if (env == NULL) {
1849 put_packet(s, "E22");
1850 break;
1851 }
1852 s->c_cpu = env;
1853 }
1854 if (res == 's') {
1855 cpu_single_step(s->c_cpu, sstep_flags);
1856 }
1857 s->signal = res_signal;
1858 gdb_continue(s);
1859 return RS_IDLE;
1860 }
1861 break;
1862 } else {
1863 goto unknown_command;
1864 }
edgar_igl7d03f822008-05-17 18:58:29 +00001865 case 'k':
1866 /* Kill the target */
1867 fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1868 exit(0);
1869 case 'D':
1870 /* Detach packet */
aliguori880a7572008-11-18 20:30:24 +00001871 gdb_breakpoint_remove_all();
Daniel Gutson7ea06da2010-02-26 14:13:50 -03001872 gdb_syscall_mode = GDB_SYS_DISABLED;
edgar_igl7d03f822008-05-17 18:58:29 +00001873 gdb_continue(s);
1874 put_packet(s, "OK");
1875 break;
bellard858693c2004-03-31 18:52:07 +00001876 case 's':
1877 if (*p != '\0') {
ths8fac5802007-07-12 10:05:07 +00001878 addr = strtoull(p, (char **)&p, 16);
aurel32fab9d282009-04-08 21:29:37 +00001879 gdb_set_cpu_pc(s, addr);
bellard858693c2004-03-31 18:52:07 +00001880 }
aliguori880a7572008-11-18 20:30:24 +00001881 cpu_single_step(s->c_cpu, sstep_flags);
edgar_iglba70a622008-03-14 06:10:42 +00001882 gdb_continue(s);
bellard41625032005-04-24 10:07:11 +00001883 return RS_IDLE;
pbrooka2d1eba2007-01-28 03:10:55 +00001884 case 'F':
1885 {
1886 target_ulong ret;
1887 target_ulong err;
1888
1889 ret = strtoull(p, (char **)&p, 16);
1890 if (*p == ',') {
1891 p++;
1892 err = strtoull(p, (char **)&p, 16);
1893 } else {
1894 err = 0;
1895 }
1896 if (*p == ',')
1897 p++;
1898 type = *p;
1899 if (gdb_current_syscall_cb)
aliguori880a7572008-11-18 20:30:24 +00001900 gdb_current_syscall_cb(s->c_cpu, ret, err);
pbrooka2d1eba2007-01-28 03:10:55 +00001901 if (type == 'C') {
1902 put_packet(s, "T02");
1903 } else {
edgar_iglba70a622008-03-14 06:10:42 +00001904 gdb_continue(s);
pbrooka2d1eba2007-01-28 03:10:55 +00001905 }
1906 }
1907 break;
bellard858693c2004-03-31 18:52:07 +00001908 case 'g':
Avi Kivity4c0960c2009-08-17 23:19:53 +03001909 cpu_synchronize_state(s->g_cpu);
pbrook56aebc82008-10-11 17:55:29 +00001910 len = 0;
1911 for (addr = 0; addr < num_g_regs; addr++) {
aliguori880a7572008-11-18 20:30:24 +00001912 reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
pbrook56aebc82008-10-11 17:55:29 +00001913 len += reg_size;
1914 }
1915 memtohex(buf, mem_buf, len);
bellard858693c2004-03-31 18:52:07 +00001916 put_packet(s, buf);
1917 break;
1918 case 'G':
Avi Kivity4c0960c2009-08-17 23:19:53 +03001919 cpu_synchronize_state(s->g_cpu);
pbrook56aebc82008-10-11 17:55:29 +00001920 registers = mem_buf;
bellard858693c2004-03-31 18:52:07 +00001921 len = strlen(p) / 2;
1922 hextomem((uint8_t *)registers, p, len);
pbrook56aebc82008-10-11 17:55:29 +00001923 for (addr = 0; addr < num_g_regs && len > 0; addr++) {
aliguori880a7572008-11-18 20:30:24 +00001924 reg_size = gdb_write_register(s->g_cpu, registers, addr);
pbrook56aebc82008-10-11 17:55:29 +00001925 len -= reg_size;
1926 registers += reg_size;
1927 }
bellard858693c2004-03-31 18:52:07 +00001928 put_packet(s, "OK");
1929 break;
1930 case 'm':
bellard9d9754a2006-06-25 15:32:37 +00001931 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001932 if (*p == ',')
1933 p++;
bellard9d9754a2006-06-25 15:32:37 +00001934 len = strtoull(p, NULL, 16);
aliguori880a7572008-11-18 20:30:24 +00001935 if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
bellard6f970bd2005-12-05 19:55:19 +00001936 put_packet (s, "E14");
1937 } else {
1938 memtohex(buf, mem_buf, len);
1939 put_packet(s, buf);
1940 }
bellard858693c2004-03-31 18:52:07 +00001941 break;
1942 case 'M':
bellard9d9754a2006-06-25 15:32:37 +00001943 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001944 if (*p == ',')
1945 p++;
bellard9d9754a2006-06-25 15:32:37 +00001946 len = strtoull(p, (char **)&p, 16);
bellardb328f872005-01-17 22:03:16 +00001947 if (*p == ':')
bellard858693c2004-03-31 18:52:07 +00001948 p++;
1949 hextomem(mem_buf, p, len);
aliguori880a7572008-11-18 20:30:24 +00001950 if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
bellard905f20b2005-04-26 21:09:55 +00001951 put_packet(s, "E14");
bellard858693c2004-03-31 18:52:07 +00001952 else
1953 put_packet(s, "OK");
1954 break;
pbrook56aebc82008-10-11 17:55:29 +00001955 case 'p':
1956 /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1957 This works, but can be very slow. Anything new enough to
1958 understand XML also knows how to use this properly. */
1959 if (!gdb_has_xml)
1960 goto unknown_command;
1961 addr = strtoull(p, (char **)&p, 16);
aliguori880a7572008-11-18 20:30:24 +00001962 reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
pbrook56aebc82008-10-11 17:55:29 +00001963 if (reg_size) {
1964 memtohex(buf, mem_buf, reg_size);
1965 put_packet(s, buf);
1966 } else {
1967 put_packet(s, "E14");
1968 }
1969 break;
1970 case 'P':
1971 if (!gdb_has_xml)
1972 goto unknown_command;
1973 addr = strtoull(p, (char **)&p, 16);
1974 if (*p == '=')
1975 p++;
1976 reg_size = strlen(p) / 2;
1977 hextomem(mem_buf, p, reg_size);
aliguori880a7572008-11-18 20:30:24 +00001978 gdb_write_register(s->g_cpu, mem_buf, addr);
pbrook56aebc82008-10-11 17:55:29 +00001979 put_packet(s, "OK");
1980 break;
bellard858693c2004-03-31 18:52:07 +00001981 case 'Z':
bellard858693c2004-03-31 18:52:07 +00001982 case 'z':
1983 type = strtoul(p, (char **)&p, 16);
1984 if (*p == ',')
1985 p++;
bellard9d9754a2006-06-25 15:32:37 +00001986 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001987 if (*p == ',')
1988 p++;
bellard9d9754a2006-06-25 15:32:37 +00001989 len = strtoull(p, (char **)&p, 16);
aliguoria1d1bb32008-11-18 20:07:32 +00001990 if (ch == 'Z')
aliguori880a7572008-11-18 20:30:24 +00001991 res = gdb_breakpoint_insert(addr, len, type);
aliguoria1d1bb32008-11-18 20:07:32 +00001992 else
aliguori880a7572008-11-18 20:30:24 +00001993 res = gdb_breakpoint_remove(addr, len, type);
aliguoria1d1bb32008-11-18 20:07:32 +00001994 if (res >= 0)
1995 put_packet(s, "OK");
1996 else if (res == -ENOSYS)
pbrook0f459d12008-06-09 00:20:13 +00001997 put_packet(s, "");
aliguoria1d1bb32008-11-18 20:07:32 +00001998 else
1999 put_packet(s, "E22");
bellard858693c2004-03-31 18:52:07 +00002000 break;
aliguori880a7572008-11-18 20:30:24 +00002001 case 'H':
2002 type = *p++;
2003 thread = strtoull(p, (char **)&p, 16);
2004 if (thread == -1 || thread == 0) {
2005 put_packet(s, "OK");
2006 break;
2007 }
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002008 env = find_cpu(thread);
aliguori880a7572008-11-18 20:30:24 +00002009 if (env == NULL) {
2010 put_packet(s, "E22");
2011 break;
2012 }
2013 switch (type) {
2014 case 'c':
2015 s->c_cpu = env;
2016 put_packet(s, "OK");
2017 break;
2018 case 'g':
2019 s->g_cpu = env;
2020 put_packet(s, "OK");
2021 break;
2022 default:
2023 put_packet(s, "E22");
2024 break;
2025 }
2026 break;
2027 case 'T':
2028 thread = strtoull(p, (char **)&p, 16);
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002029 env = find_cpu(thread);
2030
2031 if (env != NULL) {
2032 put_packet(s, "OK");
2033 } else {
aliguori880a7572008-11-18 20:30:24 +00002034 put_packet(s, "E22");
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002035 }
aliguori880a7572008-11-18 20:30:24 +00002036 break;
pbrook978efd62006-06-17 18:30:42 +00002037 case 'q':
edgar_igl60897d32008-05-09 08:25:14 +00002038 case 'Q':
2039 /* parse any 'q' packets here */
2040 if (!strcmp(p,"qemu.sstepbits")) {
2041 /* Query Breakpoint bit definitions */
blueswir1363a37d2008-08-21 17:58:08 +00002042 snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
2043 SSTEP_ENABLE,
2044 SSTEP_NOIRQ,
2045 SSTEP_NOTIMER);
edgar_igl60897d32008-05-09 08:25:14 +00002046 put_packet(s, buf);
2047 break;
2048 } else if (strncmp(p,"qemu.sstep",10) == 0) {
2049 /* Display or change the sstep_flags */
2050 p += 10;
2051 if (*p != '=') {
2052 /* Display current setting */
blueswir1363a37d2008-08-21 17:58:08 +00002053 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
edgar_igl60897d32008-05-09 08:25:14 +00002054 put_packet(s, buf);
2055 break;
2056 }
2057 p++;
2058 type = strtoul(p, (char **)&p, 16);
2059 sstep_flags = type;
2060 put_packet(s, "OK");
2061 break;
aliguori880a7572008-11-18 20:30:24 +00002062 } else if (strcmp(p,"C") == 0) {
2063 /* "Current thread" remains vague in the spec, so always return
2064 * the first CPU (gdb returns the first thread). */
2065 put_packet(s, "QC1");
2066 break;
2067 } else if (strcmp(p,"fThreadInfo") == 0) {
2068 s->query_cpu = first_cpu;
2069 goto report_cpuinfo;
2070 } else if (strcmp(p,"sThreadInfo") == 0) {
2071 report_cpuinfo:
2072 if (s->query_cpu) {
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002073 snprintf(buf, sizeof(buf), "m%x", gdb_id(s->query_cpu));
aliguori880a7572008-11-18 20:30:24 +00002074 put_packet(s, buf);
2075 s->query_cpu = s->query_cpu->next_cpu;
2076 } else
2077 put_packet(s, "l");
2078 break;
2079 } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
2080 thread = strtoull(p+16, (char **)&p, 16);
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002081 env = find_cpu(thread);
2082 if (env != NULL) {
Avi Kivity4c0960c2009-08-17 23:19:53 +03002083 cpu_synchronize_state(env);
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002084 len = snprintf((char *)mem_buf, sizeof(mem_buf),
2085 "CPU#%d [%s]", env->cpu_index,
2086 env->halted ? "halted " : "running");
2087 memtohex(buf, mem_buf, len);
2088 put_packet(s, buf);
2089 }
aliguori880a7572008-11-18 20:30:24 +00002090 break;
edgar_igl60897d32008-05-09 08:25:14 +00002091 }
blueswir10b8a9882009-03-07 10:51:36 +00002092#ifdef CONFIG_USER_ONLY
edgar_igl60897d32008-05-09 08:25:14 +00002093 else if (strncmp(p, "Offsets", 7) == 0) {
aliguori880a7572008-11-18 20:30:24 +00002094 TaskState *ts = s->c_cpu->opaque;
pbrook978efd62006-06-17 18:30:42 +00002095
blueswir1363a37d2008-08-21 17:58:08 +00002096 snprintf(buf, sizeof(buf),
2097 "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
2098 ";Bss=" TARGET_ABI_FMT_lx,
2099 ts->info->code_offset,
2100 ts->info->data_offset,
2101 ts->info->data_offset);
pbrook978efd62006-06-17 18:30:42 +00002102 put_packet(s, buf);
2103 break;
2104 }
blueswir10b8a9882009-03-07 10:51:36 +00002105#else /* !CONFIG_USER_ONLY */
aliguori8a34a0f2009-03-05 23:01:55 +00002106 else if (strncmp(p, "Rcmd,", 5) == 0) {
2107 int len = strlen(p + 5);
2108
2109 if ((len % 2) != 0) {
2110 put_packet(s, "E01");
2111 break;
2112 }
2113 hextomem(mem_buf, p + 5, len);
2114 len = len / 2;
2115 mem_buf[len++] = 0;
2116 qemu_chr_read(s->mon_chr, mem_buf, len);
2117 put_packet(s, "OK");
2118 break;
2119 }
blueswir10b8a9882009-03-07 10:51:36 +00002120#endif /* !CONFIG_USER_ONLY */
pbrook56aebc82008-10-11 17:55:29 +00002121 if (strncmp(p, "Supported", 9) == 0) {
blueswir15b3715b2008-10-25 11:18:12 +00002122 snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
pbrook56aebc82008-10-11 17:55:29 +00002123#ifdef GDB_CORE_XML
blueswir12dc766d2009-04-13 16:06:19 +00002124 pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
pbrook56aebc82008-10-11 17:55:29 +00002125#endif
2126 put_packet(s, buf);
2127 break;
2128 }
2129#ifdef GDB_CORE_XML
2130 if (strncmp(p, "Xfer:features:read:", 19) == 0) {
2131 const char *xml;
2132 target_ulong total_len;
2133
2134 gdb_has_xml = 1;
2135 p += 19;
aliguori880a7572008-11-18 20:30:24 +00002136 xml = get_feature_xml(p, &p);
pbrook56aebc82008-10-11 17:55:29 +00002137 if (!xml) {
blueswir15b3715b2008-10-25 11:18:12 +00002138 snprintf(buf, sizeof(buf), "E00");
pbrook56aebc82008-10-11 17:55:29 +00002139 put_packet(s, buf);
2140 break;
2141 }
2142
2143 if (*p == ':')
2144 p++;
2145 addr = strtoul(p, (char **)&p, 16);
2146 if (*p == ',')
2147 p++;
2148 len = strtoul(p, (char **)&p, 16);
2149
2150 total_len = strlen(xml);
2151 if (addr > total_len) {
blueswir15b3715b2008-10-25 11:18:12 +00002152 snprintf(buf, sizeof(buf), "E00");
pbrook56aebc82008-10-11 17:55:29 +00002153 put_packet(s, buf);
2154 break;
2155 }
2156 if (len > (MAX_PACKET_LENGTH - 5) / 2)
2157 len = (MAX_PACKET_LENGTH - 5) / 2;
2158 if (len < total_len - addr) {
2159 buf[0] = 'm';
2160 len = memtox(buf + 1, xml + addr, len);
2161 } else {
2162 buf[0] = 'l';
2163 len = memtox(buf + 1, xml + addr, total_len - addr);
2164 }
2165 put_packet_binary(s, buf, len + 1);
2166 break;
2167 }
2168#endif
2169 /* Unrecognised 'q' command. */
2170 goto unknown_command;
2171
bellard858693c2004-03-31 18:52:07 +00002172 default:
pbrook56aebc82008-10-11 17:55:29 +00002173 unknown_command:
bellard858693c2004-03-31 18:52:07 +00002174 /* put empty packet */
2175 buf[0] = '\0';
2176 put_packet(s, buf);
2177 break;
2178 }
2179 return RS_IDLE;
2180}
2181
aliguori880a7572008-11-18 20:30:24 +00002182void gdb_set_stop_cpu(CPUState *env)
2183{
2184 gdbserver_state->c_cpu = env;
2185 gdbserver_state->g_cpu = env;
2186}
2187
bellard1fddef42005-04-17 19:16:13 +00002188#ifndef CONFIG_USER_ONLY
aliguori9781e042009-01-22 17:15:29 +00002189static void gdb_vm_state_change(void *opaque, int running, int reason)
bellard858693c2004-03-31 18:52:07 +00002190{
aliguori880a7572008-11-18 20:30:24 +00002191 GDBState *s = gdbserver_state;
2192 CPUState *env = s->c_cpu;
bellard858693c2004-03-31 18:52:07 +00002193 char buf[256];
aliguorid6fc1b32008-11-18 19:55:44 +00002194 const char *type;
bellard858693c2004-03-31 18:52:07 +00002195 int ret;
2196
aliguori9781e042009-01-22 17:15:29 +00002197 if (running || (reason != EXCP_DEBUG && reason != EXCP_INTERRUPT) ||
aliguori36556b22009-03-28 18:05:53 +00002198 s->state == RS_INACTIVE || s->state == RS_SYSCALL)
pbrooka2d1eba2007-01-28 03:10:55 +00002199 return;
2200
bellard858693c2004-03-31 18:52:07 +00002201 /* disable single step if it was enable */
aliguori880a7572008-11-18 20:30:24 +00002202 cpu_single_step(env, 0);
bellard858693c2004-03-31 18:52:07 +00002203
bellarde80cfcf2004-12-19 23:18:01 +00002204 if (reason == EXCP_DEBUG) {
aliguori880a7572008-11-18 20:30:24 +00002205 if (env->watchpoint_hit) {
2206 switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
aliguoria1d1bb32008-11-18 20:07:32 +00002207 case BP_MEM_READ:
aliguorid6fc1b32008-11-18 19:55:44 +00002208 type = "r";
2209 break;
aliguoria1d1bb32008-11-18 20:07:32 +00002210 case BP_MEM_ACCESS:
aliguorid6fc1b32008-11-18 19:55:44 +00002211 type = "a";
2212 break;
2213 default:
2214 type = "";
2215 break;
2216 }
aliguori880a7572008-11-18 20:30:24 +00002217 snprintf(buf, sizeof(buf),
2218 "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002219 GDB_SIGNAL_TRAP, gdb_id(env), type,
aliguori880a7572008-11-18 20:30:24 +00002220 env->watchpoint_hit->vaddr);
pbrook6658ffb2007-03-16 23:58:11 +00002221 put_packet(s, buf);
aliguori880a7572008-11-18 20:30:24 +00002222 env->watchpoint_hit = NULL;
pbrook6658ffb2007-03-16 23:58:11 +00002223 return;
2224 }
aliguori880a7572008-11-18 20:30:24 +00002225 tb_flush(env);
aurel32ca587a82008-12-18 22:44:13 +00002226 ret = GDB_SIGNAL_TRAP;
bellardbbeb7b52006-04-23 18:42:15 +00002227 } else {
aliguori9781e042009-01-22 17:15:29 +00002228 ret = GDB_SIGNAL_INT;
bellardbbeb7b52006-04-23 18:42:15 +00002229 }
Nathan Froyd1e9fa732009-06-03 11:33:08 -07002230 snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, gdb_id(env));
bellard858693c2004-03-31 18:52:07 +00002231 put_packet(s, buf);
2232}
bellard1fddef42005-04-17 19:16:13 +00002233#endif
bellard858693c2004-03-31 18:52:07 +00002234
pbrooka2d1eba2007-01-28 03:10:55 +00002235/* Send a gdb syscall request.
2236 This accepts limited printf-style format specifiers, specifically:
pbrooka87295e2007-05-26 15:09:38 +00002237 %x - target_ulong argument printed in hex.
2238 %lx - 64-bit argument printed in hex.
2239 %s - string pointer (target_ulong) and length (int) pair. */
blueswir17ccfb2e2008-09-14 06:45:34 +00002240void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
pbrooka2d1eba2007-01-28 03:10:55 +00002241{
2242 va_list va;
2243 char buf[256];
2244 char *p;
2245 target_ulong addr;
pbrooka87295e2007-05-26 15:09:38 +00002246 uint64_t i64;
pbrooka2d1eba2007-01-28 03:10:55 +00002247 GDBState *s;
2248
aliguori880a7572008-11-18 20:30:24 +00002249 s = gdbserver_state;
pbrooka2d1eba2007-01-28 03:10:55 +00002250 if (!s)
2251 return;
2252 gdb_current_syscall_cb = cb;
2253 s->state = RS_SYSCALL;
2254#ifndef CONFIG_USER_ONLY
2255 vm_stop(EXCP_DEBUG);
2256#endif
2257 s->state = RS_IDLE;
2258 va_start(va, fmt);
2259 p = buf;
2260 *(p++) = 'F';
2261 while (*fmt) {
2262 if (*fmt == '%') {
2263 fmt++;
2264 switch (*fmt++) {
2265 case 'x':
2266 addr = va_arg(va, target_ulong);
blueswir1363a37d2008-08-21 17:58:08 +00002267 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
pbrooka2d1eba2007-01-28 03:10:55 +00002268 break;
pbrooka87295e2007-05-26 15:09:38 +00002269 case 'l':
2270 if (*(fmt++) != 'x')
2271 goto bad_format;
2272 i64 = va_arg(va, uint64_t);
blueswir1363a37d2008-08-21 17:58:08 +00002273 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
pbrooka87295e2007-05-26 15:09:38 +00002274 break;
pbrooka2d1eba2007-01-28 03:10:55 +00002275 case 's':
2276 addr = va_arg(va, target_ulong);
blueswir1363a37d2008-08-21 17:58:08 +00002277 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
2278 addr, va_arg(va, int));
pbrooka2d1eba2007-01-28 03:10:55 +00002279 break;
2280 default:
pbrooka87295e2007-05-26 15:09:38 +00002281 bad_format:
pbrooka2d1eba2007-01-28 03:10:55 +00002282 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2283 fmt - 1);
2284 break;
2285 }
2286 } else {
2287 *(p++) = *(fmt++);
2288 }
2289 }
pbrook8a93e022007-08-06 13:19:15 +00002290 *p = 0;
pbrooka2d1eba2007-01-28 03:10:55 +00002291 va_end(va);
2292 put_packet(s, buf);
2293#ifdef CONFIG_USER_ONLY
aliguori880a7572008-11-18 20:30:24 +00002294 gdb_handlesig(s->c_cpu, 0);
pbrooka2d1eba2007-01-28 03:10:55 +00002295#else
aurel323098dba2009-03-07 21:28:24 +00002296 cpu_exit(s->c_cpu);
pbrooka2d1eba2007-01-28 03:10:55 +00002297#endif
2298}
2299
bellard6a00d602005-11-21 23:25:50 +00002300static void gdb_read_byte(GDBState *s, int ch)
bellard858693c2004-03-31 18:52:07 +00002301{
2302 int i, csum;
ths60fe76f2007-12-16 03:02:09 +00002303 uint8_t reply;
bellard858693c2004-03-31 18:52:07 +00002304
bellard1fddef42005-04-17 19:16:13 +00002305#ifndef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +00002306 if (s->last_packet_len) {
2307 /* Waiting for a response to the last packet. If we see the start
2308 of a new command then abandon the previous response. */
2309 if (ch == '-') {
2310#ifdef DEBUG_GDB
2311 printf("Got NACK, retransmitting\n");
2312#endif
thsffe8ab82007-12-16 03:16:05 +00002313 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
pbrook4046d912007-01-28 01:53:16 +00002314 }
2315#ifdef DEBUG_GDB
2316 else if (ch == '+')
2317 printf("Got ACK\n");
2318 else
2319 printf("Got '%c' when expecting ACK/NACK\n", ch);
2320#endif
2321 if (ch == '+' || ch == '$')
2322 s->last_packet_len = 0;
2323 if (ch != '$')
2324 return;
2325 }
bellard858693c2004-03-31 18:52:07 +00002326 if (vm_running) {
2327 /* when the CPU is running, we cannot do anything except stop
2328 it when receiving a char */
2329 vm_stop(EXCP_INTERRUPT);
ths5fafdf22007-09-16 21:08:06 +00002330 } else
bellard1fddef42005-04-17 19:16:13 +00002331#endif
bellard41625032005-04-24 10:07:11 +00002332 {
bellard858693c2004-03-31 18:52:07 +00002333 switch(s->state) {
2334 case RS_IDLE:
2335 if (ch == '$') {
2336 s->line_buf_index = 0;
2337 s->state = RS_GETLINE;
bellard4c3a88a2003-07-26 12:06:08 +00002338 }
2339 break;
bellard858693c2004-03-31 18:52:07 +00002340 case RS_GETLINE:
2341 if (ch == '#') {
2342 s->state = RS_CHKSUM1;
2343 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2344 s->state = RS_IDLE;
2345 } else {
2346 s->line_buf[s->line_buf_index++] = ch;
2347 }
2348 break;
2349 case RS_CHKSUM1:
2350 s->line_buf[s->line_buf_index] = '\0';
2351 s->line_csum = fromhex(ch) << 4;
2352 s->state = RS_CHKSUM2;
2353 break;
2354 case RS_CHKSUM2:
2355 s->line_csum |= fromhex(ch);
2356 csum = 0;
2357 for(i = 0; i < s->line_buf_index; i++) {
2358 csum += s->line_buf[i];
2359 }
2360 if (s->line_csum != (csum & 0xff)) {
ths60fe76f2007-12-16 03:02:09 +00002361 reply = '-';
2362 put_buffer(s, &reply, 1);
bellard858693c2004-03-31 18:52:07 +00002363 s->state = RS_IDLE;
2364 } else {
ths60fe76f2007-12-16 03:02:09 +00002365 reply = '+';
2366 put_buffer(s, &reply, 1);
aliguori880a7572008-11-18 20:30:24 +00002367 s->state = gdb_handle_packet(s, s->line_buf);
bellard858693c2004-03-31 18:52:07 +00002368 }
bellardb4608c02003-06-27 17:34:32 +00002369 break;
pbrooka2d1eba2007-01-28 03:10:55 +00002370 default:
2371 abort();
bellardb4608c02003-06-27 17:34:32 +00002372 }
2373 }
bellard858693c2004-03-31 18:52:07 +00002374}
2375
bellard1fddef42005-04-17 19:16:13 +00002376#ifdef CONFIG_USER_ONLY
2377int
aurel32ca587a82008-12-18 22:44:13 +00002378gdb_queuesig (void)
2379{
2380 GDBState *s;
2381
2382 s = gdbserver_state;
2383
2384 if (gdbserver_fd < 0 || s->fd < 0)
2385 return 0;
2386 else
2387 return 1;
2388}
2389
2390int
bellard1fddef42005-04-17 19:16:13 +00002391gdb_handlesig (CPUState *env, int sig)
2392{
2393 GDBState *s;
2394 char buf[256];
2395 int n;
2396
aliguori880a7572008-11-18 20:30:24 +00002397 s = gdbserver_state;
edgar_igl1f487ee2008-05-17 22:20:53 +00002398 if (gdbserver_fd < 0 || s->fd < 0)
2399 return sig;
bellard1fddef42005-04-17 19:16:13 +00002400
2401 /* disable single step if it was enabled */
2402 cpu_single_step(env, 0);
2403 tb_flush(env);
2404
2405 if (sig != 0)
2406 {
aurel32ca587a82008-12-18 22:44:13 +00002407 snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
bellard1fddef42005-04-17 19:16:13 +00002408 put_packet(s, buf);
2409 }
edgar_igl1f487ee2008-05-17 22:20:53 +00002410 /* put_packet() might have detected that the peer terminated the
2411 connection. */
2412 if (s->fd < 0)
2413 return sig;
bellard1fddef42005-04-17 19:16:13 +00002414
bellard1fddef42005-04-17 19:16:13 +00002415 sig = 0;
2416 s->state = RS_IDLE;
bellard41625032005-04-24 10:07:11 +00002417 s->running_state = 0;
2418 while (s->running_state == 0) {
bellard1fddef42005-04-17 19:16:13 +00002419 n = read (s->fd, buf, 256);
2420 if (n > 0)
2421 {
2422 int i;
2423
2424 for (i = 0; i < n; i++)
bellard6a00d602005-11-21 23:25:50 +00002425 gdb_read_byte (s, buf[i]);
bellard1fddef42005-04-17 19:16:13 +00002426 }
2427 else if (n == 0 || errno != EAGAIN)
2428 {
2429 /* XXX: Connection closed. Should probably wait for annother
2430 connection before continuing. */
2431 return sig;
2432 }
bellard41625032005-04-24 10:07:11 +00002433 }
edgar_igl1f487ee2008-05-17 22:20:53 +00002434 sig = s->signal;
2435 s->signal = 0;
bellard1fddef42005-04-17 19:16:13 +00002436 return sig;
2437}
bellarde9009672005-04-26 20:42:36 +00002438
2439/* Tell the remote gdb that the process has exited. */
2440void gdb_exit(CPUState *env, int code)
2441{
2442 GDBState *s;
2443 char buf[4];
2444
aliguori880a7572008-11-18 20:30:24 +00002445 s = gdbserver_state;
edgar_igl1f487ee2008-05-17 22:20:53 +00002446 if (gdbserver_fd < 0 || s->fd < 0)
2447 return;
bellarde9009672005-04-26 20:42:36 +00002448
2449 snprintf(buf, sizeof(buf), "W%02x", code);
2450 put_packet(s, buf);
2451}
2452
aurel32ca587a82008-12-18 22:44:13 +00002453/* Tell the remote gdb that the process has exited due to SIG. */
2454void gdb_signalled(CPUState *env, int sig)
2455{
2456 GDBState *s;
2457 char buf[4];
2458
2459 s = gdbserver_state;
2460 if (gdbserver_fd < 0 || s->fd < 0)
2461 return;
2462
2463 snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2464 put_packet(s, buf);
2465}
bellard1fddef42005-04-17 19:16:13 +00002466
aliguori880a7572008-11-18 20:30:24 +00002467static void gdb_accept(void)
bellard858693c2004-03-31 18:52:07 +00002468{
2469 GDBState *s;
2470 struct sockaddr_in sockaddr;
2471 socklen_t len;
2472 int val, fd;
2473
2474 for(;;) {
2475 len = sizeof(sockaddr);
2476 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2477 if (fd < 0 && errno != EINTR) {
2478 perror("accept");
2479 return;
2480 } else if (fd >= 0) {
Kevin Wolf40ff6d72009-12-02 12:24:42 +01002481#ifndef _WIN32
2482 fcntl(fd, F_SETFD, FD_CLOEXEC);
2483#endif
bellard858693c2004-03-31 18:52:07 +00002484 break;
2485 }
2486 }
2487
2488 /* set short latency */
2489 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00002490 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
ths3b46e622007-09-17 08:09:54 +00002491
aliguori880a7572008-11-18 20:30:24 +00002492 s = qemu_mallocz(sizeof(GDBState));
aliguori880a7572008-11-18 20:30:24 +00002493 s->c_cpu = first_cpu;
2494 s->g_cpu = first_cpu;
bellard858693c2004-03-31 18:52:07 +00002495 s->fd = fd;
pbrook56aebc82008-10-11 17:55:29 +00002496 gdb_has_xml = 0;
bellard858693c2004-03-31 18:52:07 +00002497
aliguori880a7572008-11-18 20:30:24 +00002498 gdbserver_state = s;
pbrooka2d1eba2007-01-28 03:10:55 +00002499
bellard858693c2004-03-31 18:52:07 +00002500 fcntl(fd, F_SETFL, O_NONBLOCK);
bellard858693c2004-03-31 18:52:07 +00002501}
2502
2503static int gdbserver_open(int port)
2504{
2505 struct sockaddr_in sockaddr;
2506 int fd, val, ret;
2507
2508 fd = socket(PF_INET, SOCK_STREAM, 0);
2509 if (fd < 0) {
2510 perror("socket");
2511 return -1;
2512 }
Kevin Wolf40ff6d72009-12-02 12:24:42 +01002513#ifndef _WIN32
2514 fcntl(fd, F_SETFD, FD_CLOEXEC);
2515#endif
bellard858693c2004-03-31 18:52:07 +00002516
2517 /* allow fast reuse */
2518 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00002519 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
bellard858693c2004-03-31 18:52:07 +00002520
2521 sockaddr.sin_family = AF_INET;
2522 sockaddr.sin_port = htons(port);
2523 sockaddr.sin_addr.s_addr = 0;
2524 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2525 if (ret < 0) {
2526 perror("bind");
2527 return -1;
2528 }
2529 ret = listen(fd, 0);
2530 if (ret < 0) {
2531 perror("listen");
2532 return -1;
2533 }
bellard858693c2004-03-31 18:52:07 +00002534 return fd;
2535}
2536
2537int gdbserver_start(int port)
2538{
2539 gdbserver_fd = gdbserver_open(port);
2540 if (gdbserver_fd < 0)
2541 return -1;
2542 /* accept connections */
aliguori880a7572008-11-18 20:30:24 +00002543 gdb_accept();
bellardb4608c02003-06-27 17:34:32 +00002544 return 0;
2545}
aurel322b1319c2008-12-18 22:44:04 +00002546
2547/* Disable gdb stub for child processes. */
2548void gdbserver_fork(CPUState *env)
2549{
2550 GDBState *s = gdbserver_state;
edgar_igl9f6164d2009-01-07 10:22:28 +00002551 if (gdbserver_fd < 0 || s->fd < 0)
aurel322b1319c2008-12-18 22:44:04 +00002552 return;
2553 close(s->fd);
2554 s->fd = -1;
2555 cpu_breakpoint_remove_all(env, BP_GDB);
2556 cpu_watchpoint_remove_all(env, BP_GDB);
2557}
pbrook4046d912007-01-28 01:53:16 +00002558#else
thsaa1f17c2007-07-11 22:48:58 +00002559static int gdb_chr_can_receive(void *opaque)
pbrook4046d912007-01-28 01:53:16 +00002560{
pbrook56aebc82008-10-11 17:55:29 +00002561 /* We can handle an arbitrarily large amount of data.
2562 Pick the maximum packet size, which is as good as anything. */
2563 return MAX_PACKET_LENGTH;
pbrook4046d912007-01-28 01:53:16 +00002564}
2565
thsaa1f17c2007-07-11 22:48:58 +00002566static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
pbrook4046d912007-01-28 01:53:16 +00002567{
pbrook4046d912007-01-28 01:53:16 +00002568 int i;
2569
2570 for (i = 0; i < size; i++) {
aliguori880a7572008-11-18 20:30:24 +00002571 gdb_read_byte(gdbserver_state, buf[i]);
pbrook4046d912007-01-28 01:53:16 +00002572 }
2573}
2574
2575static void gdb_chr_event(void *opaque, int event)
2576{
2577 switch (event) {
Amit Shahb6b8df52009-10-07 18:31:16 +05302578 case CHR_EVENT_OPENED:
pbrook4046d912007-01-28 01:53:16 +00002579 vm_stop(EXCP_INTERRUPT);
pbrook56aebc82008-10-11 17:55:29 +00002580 gdb_has_xml = 0;
pbrook4046d912007-01-28 01:53:16 +00002581 break;
2582 default:
2583 break;
2584 }
2585}
2586
aliguori8a34a0f2009-03-05 23:01:55 +00002587static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2588{
2589 char buf[MAX_PACKET_LENGTH];
2590
2591 buf[0] = 'O';
2592 if (len > (MAX_PACKET_LENGTH/2) - 1)
2593 len = (MAX_PACKET_LENGTH/2) - 1;
2594 memtohex(buf + 1, (uint8_t *)msg, len);
2595 put_packet(s, buf);
2596}
2597
2598static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2599{
2600 const char *p = (const char *)buf;
2601 int max_sz;
2602
2603 max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2604 for (;;) {
2605 if (len <= max_sz) {
2606 gdb_monitor_output(gdbserver_state, p, len);
2607 break;
2608 }
2609 gdb_monitor_output(gdbserver_state, p, max_sz);
2610 p += max_sz;
2611 len -= max_sz;
2612 }
2613 return len;
2614}
2615
aliguori59030a82009-04-05 18:43:41 +00002616#ifndef _WIN32
2617static void gdb_sigterm_handler(int signal)
2618{
2619 if (vm_running)
2620 vm_stop(EXCP_INTERRUPT);
2621}
2622#endif
2623
2624int gdbserver_start(const char *device)
pbrook4046d912007-01-28 01:53:16 +00002625{
2626 GDBState *s;
aliguori59030a82009-04-05 18:43:41 +00002627 char gdbstub_device_name[128];
aliguori36556b22009-03-28 18:05:53 +00002628 CharDriverState *chr = NULL;
2629 CharDriverState *mon_chr;
pbrook4046d912007-01-28 01:53:16 +00002630
aliguori59030a82009-04-05 18:43:41 +00002631 if (!device)
2632 return -1;
2633 if (strcmp(device, "none") != 0) {
2634 if (strstart(device, "tcp:", NULL)) {
2635 /* enforce required TCP attributes */
2636 snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2637 "%s,nowait,nodelay,server", device);
2638 device = gdbstub_device_name;
aliguori36556b22009-03-28 18:05:53 +00002639 }
aliguori59030a82009-04-05 18:43:41 +00002640#ifndef _WIN32
2641 else if (strcmp(device, "stdio") == 0) {
2642 struct sigaction act;
pbrookcfc34752007-02-22 01:48:01 +00002643
aliguori59030a82009-04-05 18:43:41 +00002644 memset(&act, 0, sizeof(act));
2645 act.sa_handler = gdb_sigterm_handler;
2646 sigaction(SIGINT, &act, NULL);
2647 }
2648#endif
2649 chr = qemu_chr_open("gdb", device, NULL);
aliguori36556b22009-03-28 18:05:53 +00002650 if (!chr)
2651 return -1;
2652
2653 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2654 gdb_chr_event, NULL);
pbrookcfc34752007-02-22 01:48:01 +00002655 }
2656
aliguori36556b22009-03-28 18:05:53 +00002657 s = gdbserver_state;
2658 if (!s) {
2659 s = qemu_mallocz(sizeof(GDBState));
2660 gdbserver_state = s;
pbrook4046d912007-01-28 01:53:16 +00002661
aliguori36556b22009-03-28 18:05:53 +00002662 qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2663
2664 /* Initialize a monitor terminal for gdb */
2665 mon_chr = qemu_mallocz(sizeof(*mon_chr));
2666 mon_chr->chr_write = gdb_monitor_write;
2667 monitor_init(mon_chr, 0);
2668 } else {
2669 if (s->chr)
2670 qemu_chr_close(s->chr);
2671 mon_chr = s->mon_chr;
2672 memset(s, 0, sizeof(GDBState));
2673 }
aliguori880a7572008-11-18 20:30:24 +00002674 s->c_cpu = first_cpu;
2675 s->g_cpu = first_cpu;
pbrook4046d912007-01-28 01:53:16 +00002676 s->chr = chr;
aliguori36556b22009-03-28 18:05:53 +00002677 s->state = chr ? RS_IDLE : RS_INACTIVE;
2678 s->mon_chr = mon_chr;
aliguori8a34a0f2009-03-05 23:01:55 +00002679
pbrook4046d912007-01-28 01:53:16 +00002680 return 0;
2681}
2682#endif