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bellardfc01f7e2003-06-30 10:03:06 +00001/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
bellard67b915a2004-03-31 23:37:16 +000027/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
bellard85571bc2004-11-07 18:04:02 +000033#include <limits.h>
bellard8a7ddc32004-03-31 19:00:16 +000034#include <time.h>
bellard67b915a2004-03-31 23:37:16 +000035#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
bellard7d3505c2004-05-12 19:32:15 +000039#include <sys/stat.h>
bellardfb065182004-11-09 23:09:44 +000040#include "audio/audio.h"
bellard67b915a2004-03-31 23:37:16 +000041
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
bellard40c3bac2004-04-04 12:56:28 +000045#ifndef O_BINARY
46#define O_BINARY 0
47#endif
bellard67b915a2004-03-31 23:37:16 +000048
49#ifdef _WIN32
bellard57d1a2b2004-08-03 21:15:11 +000050#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
bellard67b915a2004-03-31 23:37:16 +000060#endif
bellard8a7ddc32004-03-31 19:00:16 +000061
bellardea2384d2004-08-01 21:59:26 +000062#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
bellard16f62432004-02-25 23:25:55 +000073#include "cpu.h"
bellard1fddef42005-04-17 19:16:13 +000074#include "gdbstub.h"
bellard16f62432004-02-25 23:25:55 +000075
bellardea2384d2004-08-01 21:59:26 +000076#endif /* !defined(QEMU_TOOL) */
77
bellard67b915a2004-03-31 23:37:16 +000078#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
bellard24236862006-04-30 21:28:36 +000085#ifndef MIN
86#define MIN(a, b) (((a) < (b)) ? (a) : (b))
87#endif
88#ifndef MAX
89#define MAX(a, b) (((a) > (b)) ? (a) : (b))
90#endif
91
bellard33e39632003-07-06 17:15:21 +000092/* vl.c */
bellard80cabfa2004-03-14 12:20:30 +000093uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
bellard313aa562003-08-10 21:52:11 +000094
bellard80cabfa2004-03-14 12:20:30 +000095void hw_error(const char *fmt, ...);
96
bellard80cabfa2004-03-14 12:20:30 +000097extern const char *bios_dir;
98
99void pstrcpy(char *buf, int buf_size, const char *str);
100char *pstrcat(char *buf, int buf_size, const char *s);
bellard82c643f2004-07-14 17:28:13 +0000101int strstart(const char *str, const char *val, const char **ptr);
bellardc4b1fcc2004-03-14 21:44:30 +0000102
bellard8a7ddc32004-03-31 19:00:16 +0000103extern int vm_running;
104
bellard0bd48852005-11-11 00:00:47 +0000105typedef struct vm_change_state_entry VMChangeStateEntry;
106typedef void VMChangeStateHandler(void *opaque, int running);
bellard8a7ddc32004-03-31 19:00:16 +0000107typedef void VMStopHandler(void *opaque, int reason);
108
bellard0bd48852005-11-11 00:00:47 +0000109VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
110 void *opaque);
111void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
112
bellard8a7ddc32004-03-31 19:00:16 +0000113int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
114void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
115
116void vm_start(void);
117void vm_stop(int reason);
118
bellardbb0c6722004-06-20 12:37:32 +0000119typedef void QEMUResetHandler(void *opaque);
120
121void qemu_register_reset(QEMUResetHandler *func, void *opaque);
122void qemu_system_reset_request(void);
123void qemu_system_shutdown_request(void);
bellard34751872005-07-02 14:31:34 +0000124void qemu_system_powerdown_request(void);
125#if !defined(TARGET_SPARC)
126// Please implement a power failure function to signal the OS
127#define qemu_system_powerdown() do{}while(0)
128#else
129void qemu_system_powerdown(void);
130#endif
bellardbb0c6722004-06-20 12:37:32 +0000131
bellardea2384d2004-08-01 21:59:26 +0000132void main_loop_wait(int timeout);
133
bellard0ced6582004-05-23 21:06:12 +0000134extern int ram_size;
135extern int bios_size;
bellardee22c2f2004-06-03 12:49:50 +0000136extern int rtc_utc;
bellard1f042752004-06-05 13:46:47 +0000137extern int cirrus_vga_enabled;
bellard28b9b5a2004-06-21 16:46:35 +0000138extern int graphic_width;
139extern int graphic_height;
140extern int graphic_depth;
bellard3d11d0e2004-12-12 16:56:30 +0000141extern const char *keyboard_layout;
bellardd993e022005-02-10 22:00:06 +0000142extern int kqemu_allowed;
bellarda09db212005-04-30 16:10:35 +0000143extern int win2k_install_hack;
bellardbb36d472005-11-05 14:22:28 +0000144extern int usb_enabled;
bellard6a00d602005-11-21 23:25:50 +0000145extern int smp_cpus;
bellard0ced6582004-05-23 21:06:12 +0000146
147/* XXX: make it dynamic */
148#if defined (TARGET_PPC)
bellardd5295252005-07-03 14:00:51 +0000149#define BIOS_SIZE ((512 + 32) * 1024)
bellard6af0bf92005-07-02 14:58:51 +0000150#elif defined(TARGET_MIPS)
151#define BIOS_SIZE (128 * 1024)
bellard0ced6582004-05-23 21:06:12 +0000152#else
bellard7587cf42004-06-20 13:43:27 +0000153#define BIOS_SIZE ((256 + 64) * 1024)
bellard0ced6582004-05-23 21:06:12 +0000154#endif
bellardaaaa7df2004-04-26 20:56:53 +0000155
bellard63066f42004-06-03 18:45:02 +0000156/* keyboard/mouse support */
157
158#define MOUSE_EVENT_LBUTTON 0x01
159#define MOUSE_EVENT_RBUTTON 0x02
160#define MOUSE_EVENT_MBUTTON 0x04
161
162typedef void QEMUPutKBDEvent(void *opaque, int keycode);
163typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
164
165void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
bellard09b26c52006-04-12 21:09:08 +0000166void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
bellard63066f42004-06-03 18:45:02 +0000167
168void kbd_put_keycode(int keycode);
169void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
bellard09b26c52006-04-12 21:09:08 +0000170int kbd_mouse_is_absolute(void);
bellard63066f42004-06-03 18:45:02 +0000171
bellard82c643f2004-07-14 17:28:13 +0000172/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
173 constants) */
174#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
175#define QEMU_KEY_BACKSPACE 0x007f
176#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
177#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
178#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
179#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
180#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
181#define QEMU_KEY_END QEMU_KEY_ESC1(4)
182#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
183#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
184#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
185
186#define QEMU_KEY_CTRL_UP 0xe400
187#define QEMU_KEY_CTRL_DOWN 0xe401
188#define QEMU_KEY_CTRL_LEFT 0xe402
189#define QEMU_KEY_CTRL_RIGHT 0xe403
190#define QEMU_KEY_CTRL_HOME 0xe404
191#define QEMU_KEY_CTRL_END 0xe405
192#define QEMU_KEY_CTRL_PAGEUP 0xe406
193#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
194
195void kbd_put_keysym(int keysym);
196
bellardc4b1fcc2004-03-14 21:44:30 +0000197/* async I/O support */
198
199typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
200typedef int IOCanRWHandler(void *opaque);
bellard7c9d8e02005-11-15 22:16:05 +0000201typedef void IOHandler(void *opaque);
bellardc4b1fcc2004-03-14 21:44:30 +0000202
bellard7c9d8e02005-11-15 22:16:05 +0000203int qemu_set_fd_handler2(int fd,
204 IOCanRWHandler *fd_read_poll,
205 IOHandler *fd_read,
206 IOHandler *fd_write,
207 void *opaque);
208int qemu_set_fd_handler(int fd,
209 IOHandler *fd_read,
210 IOHandler *fd_write,
211 void *opaque);
bellard8a7ddc32004-03-31 19:00:16 +0000212
bellardf3311102006-04-12 20:21:17 +0000213/* Polling handling */
214
215/* return TRUE if no sleep should be done afterwards */
216typedef int PollingFunc(void *opaque);
217
218int qemu_add_polling_cb(PollingFunc *func, void *opaque);
219void qemu_del_polling_cb(PollingFunc *func, void *opaque);
220
bellard82c643f2004-07-14 17:28:13 +0000221/* character device */
222
223#define CHR_EVENT_BREAK 0 /* serial break char */
bellardea2384d2004-08-01 21:59:26 +0000224#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
bellard82c643f2004-07-14 17:28:13 +0000225
bellard2122c512005-11-10 23:58:33 +0000226
227
228#define CHR_IOCTL_SERIAL_SET_PARAMS 1
229typedef struct {
230 int speed;
231 int parity;
232 int data_bits;
233 int stop_bits;
234} QEMUSerialSetParams;
235
236#define CHR_IOCTL_SERIAL_SET_BREAK 2
237
238#define CHR_IOCTL_PP_READ_DATA 3
239#define CHR_IOCTL_PP_WRITE_DATA 4
240#define CHR_IOCTL_PP_READ_CONTROL 5
241#define CHR_IOCTL_PP_WRITE_CONTROL 6
242#define CHR_IOCTL_PP_READ_STATUS 7
243
bellard82c643f2004-07-14 17:28:13 +0000244typedef void IOEventHandler(void *opaque, int event);
245
246typedef struct CharDriverState {
247 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
248 void (*chr_add_read_handler)(struct CharDriverState *s,
249 IOCanRWHandler *fd_can_read,
250 IOReadHandler *fd_read, void *opaque);
bellard2122c512005-11-10 23:58:33 +0000251 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
bellard82c643f2004-07-14 17:28:13 +0000252 IOEventHandler *chr_event;
bellardeb45f5f2004-09-18 19:33:09 +0000253 void (*chr_send_event)(struct CharDriverState *chr, int event);
bellardf3311102006-04-12 20:21:17 +0000254 void (*chr_close)(struct CharDriverState *chr);
bellard82c643f2004-07-14 17:28:13 +0000255 void *opaque;
256} CharDriverState;
257
258void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
259int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
bellardea2384d2004-08-01 21:59:26 +0000260void qemu_chr_send_event(CharDriverState *s, int event);
bellard82c643f2004-07-14 17:28:13 +0000261void qemu_chr_add_read_handler(CharDriverState *s,
262 IOCanRWHandler *fd_can_read,
263 IOReadHandler *fd_read, void *opaque);
264void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
bellard2122c512005-11-10 23:58:33 +0000265int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
bellardf8d179e2005-11-08 22:30:36 +0000266
bellard82c643f2004-07-14 17:28:13 +0000267/* consoles */
268
269typedef struct DisplayState DisplayState;
270typedef struct TextConsole TextConsole;
271
pbrook95219892006-04-09 01:06:34 +0000272typedef void (*vga_hw_update_ptr)(void *);
273typedef void (*vga_hw_invalidate_ptr)(void *);
274typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
bellard82c643f2004-07-14 17:28:13 +0000275
pbrook95219892006-04-09 01:06:34 +0000276TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
277 vga_hw_invalidate_ptr invalidate,
278 vga_hw_screen_dump_ptr screen_dump,
279 void *opaque);
280void vga_hw_update(void);
281void vga_hw_invalidate(void);
282void vga_hw_screen_dump(const char *filename);
283
284int is_graphic_console(void);
bellard82c643f2004-07-14 17:28:13 +0000285CharDriverState *text_console_init(DisplayState *ds);
286void console_select(unsigned int index);
287
bellard8d11df92004-08-24 21:13:40 +0000288/* serial ports */
289
290#define MAX_SERIAL_PORTS 4
291
292extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
293
bellard6508fe52005-01-15 12:02:56 +0000294/* parallel ports */
295
296#define MAX_PARALLEL_PORTS 3
297
298extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
299
bellard7c9d8e02005-11-15 22:16:05 +0000300/* VLANs support */
301
302typedef struct VLANClientState VLANClientState;
303
304struct VLANClientState {
305 IOReadHandler *fd_read;
pbrookd861b052006-02-04 22:15:28 +0000306 /* Packets may still be sent if this returns zero. It's used to
307 rate-limit the slirp code. */
308 IOCanRWHandler *fd_can_read;
bellard7c9d8e02005-11-15 22:16:05 +0000309 void *opaque;
310 struct VLANClientState *next;
311 struct VLANState *vlan;
312 char info_str[256];
313};
314
315typedef struct VLANState {
316 int id;
317 VLANClientState *first_client;
318 struct VLANState *next;
319} VLANState;
320
321VLANState *qemu_find_vlan(int id);
322VLANClientState *qemu_new_vlan_client(VLANState *vlan,
pbrookd861b052006-02-04 22:15:28 +0000323 IOReadHandler *fd_read,
324 IOCanRWHandler *fd_can_read,
325 void *opaque);
326int qemu_can_send_packet(VLANClientState *vc);
bellard7c9d8e02005-11-15 22:16:05 +0000327void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
pbrookd861b052006-02-04 22:15:28 +0000328void qemu_handler_true(void *opaque);
bellard7c9d8e02005-11-15 22:16:05 +0000329
330void do_info_network(void);
331
bellard7fb843f2006-02-01 23:06:55 +0000332/* TAP win32 */
333int tap_win32_init(VLANState *vlan, const char *ifname);
334void tap_win32_poll(void);
335
bellard7c9d8e02005-11-15 22:16:05 +0000336/* NIC info */
bellardc20709a2004-04-21 23:27:19 +0000337
338#define MAX_NICS 8
339
bellard7c9d8e02005-11-15 22:16:05 +0000340typedef struct NICInfo {
bellardc20709a2004-04-21 23:27:19 +0000341 uint8_t macaddr[6];
pbrooka41b2ff2006-02-05 04:14:41 +0000342 const char *model;
bellard7c9d8e02005-11-15 22:16:05 +0000343 VLANState *vlan;
344} NICInfo;
bellardc20709a2004-04-21 23:27:19 +0000345
346extern int nb_nics;
bellard7c9d8e02005-11-15 22:16:05 +0000347extern NICInfo nd_table[MAX_NICS];
bellardc20709a2004-04-21 23:27:19 +0000348
bellard8a7ddc32004-03-31 19:00:16 +0000349/* timers */
350
351typedef struct QEMUClock QEMUClock;
352typedef struct QEMUTimer QEMUTimer;
353typedef void QEMUTimerCB(void *opaque);
354
355/* The real time clock should be used only for stuff which does not
356 change the virtual machine state, as it is run even if the virtual
bellard69b91032004-05-18 23:05:28 +0000357 machine is stopped. The real time clock has a frequency of 1000
bellard8a7ddc32004-03-31 19:00:16 +0000358 Hz. */
359extern QEMUClock *rt_clock;
360
bellarde80cfcf2004-12-19 23:18:01 +0000361/* The virtual clock is only run during the emulation. It is stopped
bellard8a7ddc32004-03-31 19:00:16 +0000362 when the virtual machine is stopped. Virtual timers use a high
363 precision clock, usually cpu cycles (use ticks_per_sec). */
364extern QEMUClock *vm_clock;
365
366int64_t qemu_get_clock(QEMUClock *clock);
367
368QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
369void qemu_free_timer(QEMUTimer *ts);
370void qemu_del_timer(QEMUTimer *ts);
371void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
372int qemu_timer_pending(QEMUTimer *ts);
373
374extern int64_t ticks_per_sec;
375extern int pit_min_timer_count;
376
377void cpu_enable_ticks(void);
378void cpu_disable_ticks(void);
379
380/* VM Load/Save */
381
382typedef FILE QEMUFile;
383
384void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
385void qemu_put_byte(QEMUFile *f, int v);
386void qemu_put_be16(QEMUFile *f, unsigned int v);
387void qemu_put_be32(QEMUFile *f, unsigned int v);
388void qemu_put_be64(QEMUFile *f, uint64_t v);
389int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
390int qemu_get_byte(QEMUFile *f);
391unsigned int qemu_get_be16(QEMUFile *f);
392unsigned int qemu_get_be32(QEMUFile *f);
393uint64_t qemu_get_be64(QEMUFile *f);
394
395static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
396{
397 qemu_put_be64(f, *pv);
398}
399
400static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
401{
402 qemu_put_be32(f, *pv);
403}
404
405static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
406{
407 qemu_put_be16(f, *pv);
408}
409
410static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
411{
412 qemu_put_byte(f, *pv);
413}
414
415static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
416{
417 *pv = qemu_get_be64(f);
418}
419
420static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
421{
422 *pv = qemu_get_be32(f);
423}
424
425static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
426{
427 *pv = qemu_get_be16(f);
428}
429
430static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
431{
432 *pv = qemu_get_byte(f);
433}
434
bellardc27004e2005-01-03 23:35:10 +0000435#if TARGET_LONG_BITS == 64
436#define qemu_put_betl qemu_put_be64
437#define qemu_get_betl qemu_get_be64
438#define qemu_put_betls qemu_put_be64s
439#define qemu_get_betls qemu_get_be64s
440#else
441#define qemu_put_betl qemu_put_be32
442#define qemu_get_betl qemu_get_be32
443#define qemu_put_betls qemu_put_be32s
444#define qemu_get_betls qemu_get_be32s
445#endif
446
bellard8a7ddc32004-03-31 19:00:16 +0000447int64_t qemu_ftell(QEMUFile *f);
448int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
449
450typedef void SaveStateHandler(QEMUFile *f, void *opaque);
451typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
452
453int qemu_loadvm(const char *filename);
454int qemu_savevm(const char *filename);
455int register_savevm(const char *idstr,
456 int instance_id,
457 int version_id,
458 SaveStateHandler *save_state,
459 LoadStateHandler *load_state,
460 void *opaque);
461void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
462void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
bellardc4b1fcc2004-03-14 21:44:30 +0000463
bellard6a00d602005-11-21 23:25:50 +0000464void cpu_save(QEMUFile *f, void *opaque);
465int cpu_load(QEMUFile *f, void *opaque, int version_id);
466
bellardfc01f7e2003-06-30 10:03:06 +0000467/* block.c */
468typedef struct BlockDriverState BlockDriverState;
bellardea2384d2004-08-01 21:59:26 +0000469typedef struct BlockDriver BlockDriver;
bellardfc01f7e2003-06-30 10:03:06 +0000470
bellardea2384d2004-08-01 21:59:26 +0000471extern BlockDriver bdrv_raw;
472extern BlockDriver bdrv_cow;
473extern BlockDriver bdrv_qcow;
474extern BlockDriver bdrv_vmdk;
bellard3c565212004-09-29 21:29:14 +0000475extern BlockDriver bdrv_cloop;
bellard585d0ed2004-12-12 11:24:44 +0000476extern BlockDriver bdrv_dmg;
bellarda8753c32005-04-26 21:34:00 +0000477extern BlockDriver bdrv_bochs;
bellard6a0f9e82005-04-27 20:17:58 +0000478extern BlockDriver bdrv_vpc;
bellardde167e42005-04-28 21:15:08 +0000479extern BlockDriver bdrv_vvfat;
bellardea2384d2004-08-01 21:59:26 +0000480
481void bdrv_init(void);
482BlockDriver *bdrv_find_format(const char *format_name);
483int bdrv_create(BlockDriver *drv,
484 const char *filename, int64_t size_in_sectors,
485 const char *backing_file, int flags);
bellardc4b1fcc2004-03-14 21:44:30 +0000486BlockDriverState *bdrv_new(const char *device_name);
487void bdrv_delete(BlockDriverState *bs);
488int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
bellardea2384d2004-08-01 21:59:26 +0000489int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
490 BlockDriver *drv);
bellardfc01f7e2003-06-30 10:03:06 +0000491void bdrv_close(BlockDriverState *bs);
492int bdrv_read(BlockDriverState *bs, int64_t sector_num,
493 uint8_t *buf, int nb_sectors);
494int bdrv_write(BlockDriverState *bs, int64_t sector_num,
495 const uint8_t *buf, int nb_sectors);
496void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
bellard33e39632003-07-06 17:15:21 +0000497int bdrv_commit(BlockDriverState *bs);
bellard77fef8c2004-02-16 22:05:46 +0000498void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
bellardfc01f7e2003-06-30 10:03:06 +0000499
bellardc4b1fcc2004-03-14 21:44:30 +0000500#define BDRV_TYPE_HD 0
501#define BDRV_TYPE_CDROM 1
502#define BDRV_TYPE_FLOPPY 2
bellard46d47672004-11-16 01:45:27 +0000503#define BIOS_ATA_TRANSLATION_AUTO 0
504#define BIOS_ATA_TRANSLATION_NONE 1
505#define BIOS_ATA_TRANSLATION_LBA 2
bellardc4b1fcc2004-03-14 21:44:30 +0000506
507void bdrv_set_geometry_hint(BlockDriverState *bs,
508 int cyls, int heads, int secs);
509void bdrv_set_type_hint(BlockDriverState *bs, int type);
bellard46d47672004-11-16 01:45:27 +0000510void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
bellardc4b1fcc2004-03-14 21:44:30 +0000511void bdrv_get_geometry_hint(BlockDriverState *bs,
512 int *pcyls, int *pheads, int *psecs);
513int bdrv_get_type_hint(BlockDriverState *bs);
bellard46d47672004-11-16 01:45:27 +0000514int bdrv_get_translation_hint(BlockDriverState *bs);
bellardc4b1fcc2004-03-14 21:44:30 +0000515int bdrv_is_removable(BlockDriverState *bs);
516int bdrv_is_read_only(BlockDriverState *bs);
517int bdrv_is_inserted(BlockDriverState *bs);
518int bdrv_is_locked(BlockDriverState *bs);
519void bdrv_set_locked(BlockDriverState *bs, int locked);
520void bdrv_set_change_cb(BlockDriverState *bs,
521 void (*change_cb)(void *opaque), void *opaque);
bellardea2384d2004-08-01 21:59:26 +0000522void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
bellardc4b1fcc2004-03-14 21:44:30 +0000523void bdrv_info(void);
524BlockDriverState *bdrv_find(const char *name);
bellard82c643f2004-07-14 17:28:13 +0000525void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
bellardea2384d2004-08-01 21:59:26 +0000526int bdrv_is_encrypted(BlockDriverState *bs);
527int bdrv_set_key(BlockDriverState *bs, const char *key);
528void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
529 void *opaque);
530const char *bdrv_get_device_name(BlockDriverState *bs);
bellardc4b1fcc2004-03-14 21:44:30 +0000531
bellardea2384d2004-08-01 21:59:26 +0000532int qcow_get_cluster_size(BlockDriverState *bs);
533int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
534 const uint8_t *buf);
535
536#ifndef QEMU_TOOL
bellard54fa5af2005-06-05 14:50:39 +0000537
538typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
539 int boot_device,
540 DisplayState *ds, const char **fd_filename, int snapshot,
541 const char *kernel_filename, const char *kernel_cmdline,
542 const char *initrd_filename);
543
544typedef struct QEMUMachine {
545 const char *name;
546 const char *desc;
547 QEMUMachineInitFunc *init;
548 struct QEMUMachine *next;
549} QEMUMachine;
550
551int qemu_register_machine(QEMUMachine *m);
552
553typedef void SetIRQFunc(void *opaque, int irq_num, int level);
bellard3de388f2005-07-02 18:11:44 +0000554typedef void IRQRequestFunc(void *opaque, int level);
bellard54fa5af2005-06-05 14:50:39 +0000555
bellard26aa7d72004-04-28 22:26:05 +0000556/* ISA bus */
557
558extern target_phys_addr_t isa_mem_base;
559
560typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
561typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
562
563int register_ioport_read(int start, int length, int size,
564 IOPortReadFunc *func, void *opaque);
565int register_ioport_write(int start, int length, int size,
566 IOPortWriteFunc *func, void *opaque);
bellard69b91032004-05-18 23:05:28 +0000567void isa_unassign_ioport(int start, int length);
568
569/* PCI bus */
570
bellard69b91032004-05-18 23:05:28 +0000571extern target_phys_addr_t pci_mem_base;
572
bellard46e50e92004-06-21 19:43:00 +0000573typedef struct PCIBus PCIBus;
bellard69b91032004-05-18 23:05:28 +0000574typedef struct PCIDevice PCIDevice;
575
576typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
577 uint32_t address, uint32_t data, int len);
578typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
579 uint32_t address, int len);
580typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
581 uint32_t addr, uint32_t size, int type);
582
583#define PCI_ADDRESS_SPACE_MEM 0x00
584#define PCI_ADDRESS_SPACE_IO 0x01
585#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
586
587typedef struct PCIIORegion {
bellard5768f5a2004-05-20 12:47:45 +0000588 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
bellard69b91032004-05-18 23:05:28 +0000589 uint32_t size;
590 uint8_t type;
591 PCIMapIORegionFunc *map_func;
592} PCIIORegion;
593
bellard8a8696a2004-06-03 14:06:32 +0000594#define PCI_ROM_SLOT 6
595#define PCI_NUM_REGIONS 7
bellard69b91032004-05-18 23:05:28 +0000596struct PCIDevice {
597 /* PCI config space */
598 uint8_t config[256];
599
600 /* the following fields are read only */
bellard46e50e92004-06-21 19:43:00 +0000601 PCIBus *bus;
bellard69b91032004-05-18 23:05:28 +0000602 int devfn;
603 char name[64];
bellard8a8696a2004-06-03 14:06:32 +0000604 PCIIORegion io_regions[PCI_NUM_REGIONS];
bellard69b91032004-05-18 23:05:28 +0000605
606 /* do not access the following fields */
607 PCIConfigReadFunc *config_read;
608 PCIConfigWriteFunc *config_write;
bellard5768f5a2004-05-20 12:47:45 +0000609 int irq_index;
bellard69b91032004-05-18 23:05:28 +0000610};
611
bellard46e50e92004-06-21 19:43:00 +0000612PCIDevice *pci_register_device(PCIBus *bus, const char *name,
613 int instance_size, int devfn,
bellard69b91032004-05-18 23:05:28 +0000614 PCIConfigReadFunc *config_read,
615 PCIConfigWriteFunc *config_write);
616
617void pci_register_io_region(PCIDevice *pci_dev, int region_num,
618 uint32_t size, int type,
619 PCIMapIORegionFunc *map_func);
620
bellard5768f5a2004-05-20 12:47:45 +0000621void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
622
623uint32_t pci_default_read_config(PCIDevice *d,
624 uint32_t address, int len);
625void pci_default_write_config(PCIDevice *d,
626 uint32_t address, uint32_t val, int len);
bellard30ca2aa2004-10-03 13:56:00 +0000627void generic_pci_save(QEMUFile* f, void *opaque);
628int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
bellard5768f5a2004-05-20 12:47:45 +0000629
bellard9995c512004-05-23 19:09:22 +0000630extern struct PIIX3State *piix3_state;
631
bellard46e50e92004-06-21 19:43:00 +0000632PCIBus *i440fx_init(void);
633void piix3_init(PCIBus *bus);
bellard69b91032004-05-18 23:05:28 +0000634void pci_bios_init(void);
bellard5768f5a2004-05-20 12:47:45 +0000635void pci_info(void);
bellard26aa7d72004-04-28 22:26:05 +0000636
bellard77d4bc32004-05-26 22:13:53 +0000637/* temporary: will be moved in platform specific file */
bellard54fa5af2005-06-05 14:50:39 +0000638void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
bellard46e50e92004-06-21 19:43:00 +0000639PCIBus *pci_prep_init(void);
bellard54fa5af2005-06-05 14:50:39 +0000640PCIBus *pci_grackle_init(uint32_t base);
bellard46e50e92004-06-21 19:43:00 +0000641PCIBus *pci_pmac_init(void);
bellard83469012005-07-23 14:27:54 +0000642PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
bellard77d4bc32004-05-26 22:13:53 +0000643
pbrooka41b2ff2006-02-05 04:14:41 +0000644void pci_nic_init(PCIBus *bus, NICInfo *nd);
645
bellard28b9b5a2004-06-21 16:46:35 +0000646/* openpic.c */
647typedef struct openpic_t openpic_t;
bellard54fa5af2005-06-05 14:50:39 +0000648void openpic_set_irq(void *opaque, int n_IRQ, int level);
bellard7668a272005-11-23 21:13:45 +0000649openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
650 CPUState **envp);
bellard28b9b5a2004-06-21 16:46:35 +0000651
bellard54fa5af2005-06-05 14:50:39 +0000652/* heathrow_pic.c */
653typedef struct HeathrowPICS HeathrowPICS;
654void heathrow_pic_set_irq(void *opaque, int num, int level);
655HeathrowPICS *heathrow_pic_init(int *pmem_index);
656
bellard6a36d842005-12-18 20:34:32 +0000657#ifdef HAS_AUDIO
658struct soundhw {
659 const char *name;
660 const char *descr;
661 int enabled;
662 int isa;
663 union {
664 int (*init_isa) (AudioState *s);
665 int (*init_pci) (PCIBus *bus, AudioState *s);
666 } init;
667};
668
669extern struct soundhw soundhw[];
670#endif
671
bellard313aa562003-08-10 21:52:11 +0000672/* vga.c */
673
bellard4fa0f5d2004-02-06 19:47:52 +0000674#define VGA_RAM_SIZE (4096 * 1024)
bellard313aa562003-08-10 21:52:11 +0000675
bellard82c643f2004-07-14 17:28:13 +0000676struct DisplayState {
bellard313aa562003-08-10 21:52:11 +0000677 uint8_t *data;
678 int linesize;
679 int depth;
bellard82c643f2004-07-14 17:28:13 +0000680 int width;
681 int height;
bellard24236862006-04-30 21:28:36 +0000682 void *opaque;
683
bellard313aa562003-08-10 21:52:11 +0000684 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
685 void (*dpy_resize)(struct DisplayState *s, int w, int h);
686 void (*dpy_refresh)(struct DisplayState *s);
bellard24236862006-04-30 21:28:36 +0000687 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
bellard82c643f2004-07-14 17:28:13 +0000688};
bellard313aa562003-08-10 21:52:11 +0000689
690static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
691{
692 s->dpy_update(s, x, y, w, h);
693}
694
695static inline void dpy_resize(DisplayState *s, int w, int h)
696{
697 s->dpy_resize(s, w, h);
698}
699
bellard46e50e92004-06-21 19:43:00 +0000700int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
bellardd5295252005-07-03 14:00:51 +0000701 unsigned long vga_ram_offset, int vga_ram_size,
702 unsigned long vga_bios_offset, int vga_bios_size);
bellard313aa562003-08-10 21:52:11 +0000703
bellardd6bfa222004-06-05 10:32:30 +0000704/* cirrus_vga.c */
bellard46e50e92004-06-21 19:43:00 +0000705void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
bellardd6bfa222004-06-05 10:32:30 +0000706 unsigned long vga_ram_offset, int vga_ram_size);
bellardd6bfa222004-06-05 10:32:30 +0000707void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
708 unsigned long vga_ram_offset, int vga_ram_size);
709
bellard313aa562003-08-10 21:52:11 +0000710/* sdl.c */
bellardd63d3072004-10-03 13:29:03 +0000711void sdl_display_init(DisplayState *ds, int full_screen);
bellard313aa562003-08-10 21:52:11 +0000712
bellardda4dbf72005-03-02 22:22:43 +0000713/* cocoa.m */
714void cocoa_display_init(DisplayState *ds, int full_screen);
715
bellard24236862006-04-30 21:28:36 +0000716/* vnc.c */
717void vnc_display_init(DisplayState *ds, int display);
718
bellard5391d802003-11-11 13:48:59 +0000719/* ide.c */
720#define MAX_DISKS 4
721
722extern BlockDriverState *bs_table[MAX_DISKS];
723
bellard69b91032004-05-18 23:05:28 +0000724void isa_ide_init(int iobase, int iobase2, int irq,
725 BlockDriverState *hd0, BlockDriverState *hd1);
bellard54fa5af2005-06-05 14:50:39 +0000726void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
727 int secondary_ide_enabled);
bellard46e50e92004-06-21 19:43:00 +0000728void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
bellard28b9b5a2004-06-21 16:46:35 +0000729int pmac_ide_init (BlockDriverState **hd_table,
bellard54fa5af2005-06-05 14:50:39 +0000730 SetIRQFunc *set_irq, void *irq_opaque, int irq);
bellard5391d802003-11-11 13:48:59 +0000731
bellard1d14ffa2005-10-30 18:58:22 +0000732/* es1370.c */
bellardc0fe3822005-11-05 18:55:28 +0000733int es1370_init (PCIBus *bus, AudioState *s);
bellard1d14ffa2005-10-30 18:58:22 +0000734
bellardfb065182004-11-09 23:09:44 +0000735/* sb16.c */
bellardc0fe3822005-11-05 18:55:28 +0000736int SB16_init (AudioState *s);
bellardfb065182004-11-09 23:09:44 +0000737
738/* adlib.c */
bellardc0fe3822005-11-05 18:55:28 +0000739int Adlib_init (AudioState *s);
bellardfb065182004-11-09 23:09:44 +0000740
741/* gus.c */
bellardc0fe3822005-11-05 18:55:28 +0000742int GUS_init (AudioState *s);
bellard27503322003-11-13 01:46:15 +0000743
744/* dma.c */
bellard85571bc2004-11-07 18:04:02 +0000745typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
bellard27503322003-11-13 01:46:15 +0000746int DMA_get_channel_mode (int nchan);
bellard85571bc2004-11-07 18:04:02 +0000747int DMA_read_memory (int nchan, void *buf, int pos, int size);
748int DMA_write_memory (int nchan, void *buf, int pos, int size);
bellard27503322003-11-13 01:46:15 +0000749void DMA_hold_DREQ (int nchan);
750void DMA_release_DREQ (int nchan);
bellard16f62432004-02-25 23:25:55 +0000751void DMA_schedule(int nchan);
bellard27503322003-11-13 01:46:15 +0000752void DMA_run (void);
bellard28b9b5a2004-06-21 16:46:35 +0000753void DMA_init (int high_page_enable);
bellard27503322003-11-13 01:46:15 +0000754void DMA_register_channel (int nchan,
bellard85571bc2004-11-07 18:04:02 +0000755 DMA_transfer_handler transfer_handler,
756 void *opaque);
bellard7138fcf2004-01-05 00:02:28 +0000757/* fdc.c */
758#define MAX_FD 2
759extern BlockDriverState *fd_table[MAX_FD];
760
bellardbaca51f2004-03-19 23:05:34 +0000761typedef struct fdctrl_t fdctrl_t;
762
763fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
764 uint32_t io_base,
765 BlockDriverState **fds);
766int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
bellard7138fcf2004-01-05 00:02:28 +0000767
bellard80cabfa2004-03-14 12:20:30 +0000768/* ne2000.c */
769
bellard7c9d8e02005-11-15 22:16:05 +0000770void isa_ne2000_init(int base, int irq, NICInfo *nd);
771void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
bellard80cabfa2004-03-14 12:20:30 +0000772
pbrooka41b2ff2006-02-05 04:14:41 +0000773/* rtl8139.c */
774
775void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
776
bellard80cabfa2004-03-14 12:20:30 +0000777/* pckbd.c */
778
bellard80cabfa2004-03-14 12:20:30 +0000779void kbd_init(void);
780
781/* mc146818rtc.c */
782
bellard8a7ddc32004-03-31 19:00:16 +0000783typedef struct RTCState RTCState;
bellard80cabfa2004-03-14 12:20:30 +0000784
bellard8a7ddc32004-03-31 19:00:16 +0000785RTCState *rtc_init(int base, int irq);
786void rtc_set_memory(RTCState *s, int addr, int val);
787void rtc_set_date(RTCState *s, const struct tm *tm);
bellard80cabfa2004-03-14 12:20:30 +0000788
789/* serial.c */
790
bellardc4b1fcc2004-03-14 21:44:30 +0000791typedef struct SerialState SerialState;
bellarde5d13e22005-11-23 21:11:49 +0000792SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
793 int base, int irq, CharDriverState *chr);
794SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
795 target_ulong base, int it_shift,
796 int irq, CharDriverState *chr);
bellard80cabfa2004-03-14 12:20:30 +0000797
bellard6508fe52005-01-15 12:02:56 +0000798/* parallel.c */
799
800typedef struct ParallelState ParallelState;
801ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
802
bellard80cabfa2004-03-14 12:20:30 +0000803/* i8259.c */
804
bellard3de388f2005-07-02 18:11:44 +0000805typedef struct PicState2 PicState2;
806extern PicState2 *isa_pic;
bellard80cabfa2004-03-14 12:20:30 +0000807void pic_set_irq(int irq, int level);
bellard54fa5af2005-06-05 14:50:39 +0000808void pic_set_irq_new(void *opaque, int irq, int level);
bellard3de388f2005-07-02 18:11:44 +0000809PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
bellardd592d302005-07-23 19:05:37 +0000810void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
811 void *alt_irq_opaque);
bellard3de388f2005-07-02 18:11:44 +0000812int pic_read_irq(PicState2 *s);
813void pic_update_irq(PicState2 *s);
814uint32_t pic_intack_read(PicState2 *s);
bellardc20709a2004-04-21 23:27:19 +0000815void pic_info(void);
bellard4a0fb71e2004-05-21 11:39:07 +0000816void irq_info(void);
bellard80cabfa2004-03-14 12:20:30 +0000817
bellardc27004e2005-01-03 23:35:10 +0000818/* APIC */
bellardd592d302005-07-23 19:05:37 +0000819typedef struct IOAPICState IOAPICState;
820
bellardc27004e2005-01-03 23:35:10 +0000821int apic_init(CPUState *env);
822int apic_get_interrupt(CPUState *env);
bellardd592d302005-07-23 19:05:37 +0000823IOAPICState *ioapic_init(void);
824void ioapic_set_irq(void *opaque, int vector, int level);
bellardc27004e2005-01-03 23:35:10 +0000825
bellard80cabfa2004-03-14 12:20:30 +0000826/* i8254.c */
827
828#define PIT_FREQ 1193182
829
bellardec844b92004-05-03 23:18:25 +0000830typedef struct PITState PITState;
bellard80cabfa2004-03-14 12:20:30 +0000831
bellardec844b92004-05-03 23:18:25 +0000832PITState *pit_init(int base, int irq);
833void pit_set_gate(PITState *pit, int channel, int val);
834int pit_get_gate(PITState *pit, int channel);
bellardfd06c372006-04-24 21:58:30 +0000835int pit_get_initial_count(PITState *pit, int channel);
836int pit_get_mode(PITState *pit, int channel);
bellardec844b92004-05-03 23:18:25 +0000837int pit_get_out(PITState *pit, int channel, int64_t current_time);
bellard80cabfa2004-03-14 12:20:30 +0000838
bellardfd06c372006-04-24 21:58:30 +0000839/* pcspk.c */
840void pcspk_init(PITState *);
841int pcspk_audio_init(AudioState *);
842
bellard6515b202006-05-03 22:02:44 +0000843/* acpi.c */
844extern int acpi_enabled;
845void piix4_pm_init(PCIBus *bus);
846void acpi_bios_init(void);
847
bellard80cabfa2004-03-14 12:20:30 +0000848/* pc.c */
bellard54fa5af2005-06-05 14:50:39 +0000849extern QEMUMachine pc_machine;
bellard3dbbdc22005-11-06 18:20:37 +0000850extern QEMUMachine isapc_machine;
bellard80cabfa2004-03-14 12:20:30 +0000851
bellard6a00d602005-11-21 23:25:50 +0000852void ioport_set_a20(int enable);
853int ioport_get_a20(void);
854
bellard26aa7d72004-04-28 22:26:05 +0000855/* ppc.c */
bellard54fa5af2005-06-05 14:50:39 +0000856extern QEMUMachine prep_machine;
857extern QEMUMachine core99_machine;
858extern QEMUMachine heathrow_machine;
859
bellard6af0bf92005-07-02 14:58:51 +0000860/* mips_r4k.c */
861extern QEMUMachine mips_machine;
862
bellard27c7ca72006-04-27 21:32:09 +0000863/* shix.c */
864extern QEMUMachine shix_machine;
865
bellard8cc43fe2004-05-26 23:29:15 +0000866#ifdef TARGET_PPC
867ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
868#endif
bellard64201202004-05-26 22:55:16 +0000869void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
bellard77d4bc32004-05-26 22:13:53 +0000870
871extern CPUWriteMemoryFunc *PPC_io_write[];
872extern CPUReadMemoryFunc *PPC_io_read[];
bellard54fa5af2005-06-05 14:50:39 +0000873void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
bellard26aa7d72004-04-28 22:26:05 +0000874
bellarde95c8d52004-09-30 22:22:08 +0000875/* sun4m.c */
bellard54fa5af2005-06-05 14:50:39 +0000876extern QEMUMachine sun4m_machine;
bellarde80cfcf2004-12-19 23:18:01 +0000877uint32_t iommu_translate(uint32_t addr);
bellardba3c64f2005-12-05 20:31:52 +0000878void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
bellarde95c8d52004-09-30 22:22:08 +0000879
880/* iommu.c */
bellarde80cfcf2004-12-19 23:18:01 +0000881void *iommu_init(uint32_t addr);
882uint32_t iommu_translate_local(void *opaque, uint32_t addr);
bellarde95c8d52004-09-30 22:22:08 +0000883
884/* lance.c */
bellard7c9d8e02005-11-15 22:16:05 +0000885void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
bellarde95c8d52004-09-30 22:22:08 +0000886
887/* tcx.c */
pbrook95219892006-04-09 01:06:34 +0000888void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
bellard6f7e9ae2005-03-13 09:43:36 +0000889 unsigned long vram_offset, int vram_size, int width, int height);
bellarde95c8d52004-09-30 22:22:08 +0000890
bellarde80cfcf2004-12-19 23:18:01 +0000891/* slavio_intctl.c */
892void *slavio_intctl_init();
bellardba3c64f2005-12-05 20:31:52 +0000893void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
bellarde80cfcf2004-12-19 23:18:01 +0000894void slavio_pic_info(void *opaque);
895void slavio_irq_info(void *opaque);
896void slavio_pic_set_irq(void *opaque, int irq, int level);
bellardba3c64f2005-12-05 20:31:52 +0000897void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
bellarde95c8d52004-09-30 22:22:08 +0000898
bellard5fe141f2006-04-23 17:12:42 +0000899/* loader.c */
900int get_image_size(const char *filename);
901int load_image(const char *filename, uint8_t *addr);
bellard9ee3c022006-04-26 22:05:26 +0000902int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
bellarde80cfcf2004-12-19 23:18:01 +0000903int load_aout(const char *filename, uint8_t *addr);
bellard8d5f07f2004-10-04 21:23:09 +0000904
bellarde80cfcf2004-12-19 23:18:01 +0000905/* slavio_timer.c */
bellardba3c64f2005-12-05 20:31:52 +0000906void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
bellarde80cfcf2004-12-19 23:18:01 +0000907
908/* slavio_serial.c */
909SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
910void slavio_serial_ms_kbd_init(int base, int irq);
bellarde95c8d52004-09-30 22:22:08 +0000911
bellard34751872005-07-02 14:31:34 +0000912/* slavio_misc.c */
913void *slavio_misc_init(uint32_t base, int irq);
914void slavio_set_power_fail(void *opaque, int power_failing);
915
bellard6f7e9ae2005-03-13 09:43:36 +0000916/* esp.c */
917void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
918
bellard34751872005-07-02 14:31:34 +0000919/* sun4u.c */
920extern QEMUMachine sun4u_machine;
921
bellard64201202004-05-26 22:55:16 +0000922/* NVRAM helpers */
923#include "hw/m48t59.h"
924
925void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
926uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
927void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
928uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
929void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
930uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
931void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
932 const unsigned char *str, uint32_t max);
933int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
934void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
935 uint32_t start, uint32_t count);
936int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
937 const unsigned char *arch,
938 uint32_t RAM_size, int boot_device,
939 uint32_t kernel_image, uint32_t kernel_size,
bellard28b9b5a2004-06-21 16:46:35 +0000940 const char *cmdline,
bellard64201202004-05-26 22:55:16 +0000941 uint32_t initrd_image, uint32_t initrd_size,
bellard28b9b5a2004-06-21 16:46:35 +0000942 uint32_t NVRAM_image,
943 int width, int height, int depth);
bellard64201202004-05-26 22:55:16 +0000944
bellard63066f42004-06-03 18:45:02 +0000945/* adb.c */
946
947#define MAX_ADB_DEVICES 16
948
bellarde2733d22004-06-21 22:46:10 +0000949#define ADB_MAX_OUT_LEN 16
950
bellard63066f42004-06-03 18:45:02 +0000951typedef struct ADBDevice ADBDevice;
952
bellarde2733d22004-06-21 22:46:10 +0000953/* buf = NULL means polling */
954typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
955 const uint8_t *buf, int len);
bellard12c28fed2004-07-12 20:26:20 +0000956typedef int ADBDeviceReset(ADBDevice *d);
957
bellard63066f42004-06-03 18:45:02 +0000958struct ADBDevice {
959 struct ADBBusState *bus;
960 int devaddr;
961 int handler;
bellarde2733d22004-06-21 22:46:10 +0000962 ADBDeviceRequest *devreq;
bellard12c28fed2004-07-12 20:26:20 +0000963 ADBDeviceReset *devreset;
bellard63066f42004-06-03 18:45:02 +0000964 void *opaque;
965};
966
967typedef struct ADBBusState {
968 ADBDevice devices[MAX_ADB_DEVICES];
969 int nb_devices;
bellarde2733d22004-06-21 22:46:10 +0000970 int poll_index;
bellard63066f42004-06-03 18:45:02 +0000971} ADBBusState;
972
bellarde2733d22004-06-21 22:46:10 +0000973int adb_request(ADBBusState *s, uint8_t *buf_out,
974 const uint8_t *buf, int len);
975int adb_poll(ADBBusState *s, uint8_t *buf_out);
bellard63066f42004-06-03 18:45:02 +0000976
977ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
bellarde2733d22004-06-21 22:46:10 +0000978 ADBDeviceRequest *devreq,
bellard12c28fed2004-07-12 20:26:20 +0000979 ADBDeviceReset *devreset,
bellard63066f42004-06-03 18:45:02 +0000980 void *opaque);
981void adb_kbd_init(ADBBusState *bus);
982void adb_mouse_init(ADBBusState *bus);
983
984/* cuda.c */
985
986extern ADBBusState adb_bus;
bellard54fa5af2005-06-05 14:50:39 +0000987int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
bellard63066f42004-06-03 18:45:02 +0000988
bellardbb36d472005-11-05 14:22:28 +0000989#include "hw/usb.h"
990
bellarda594cfb2005-11-06 16:13:29 +0000991/* usb ports of the VM */
992
993#define MAX_VM_USB_PORTS 8
994
995extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
996extern USBDevice *vm_usb_hub;
997
998void do_usb_add(const char *devname);
999void do_usb_del(const char *devname);
1000void usb_info(void);
1001
bellardb5ff1b32005-11-26 10:38:39 +00001002/* integratorcp.c */
pbrook40f137e2006-02-20 00:33:36 +00001003extern QEMUMachine integratorcp926_machine;
1004extern QEMUMachine integratorcp1026_machine;
bellardb5ff1b32005-11-26 10:38:39 +00001005
pbrookcdbdb642006-04-09 01:32:52 +00001006/* versatilepb.c */
1007extern QEMUMachine versatilepb_machine;
pbrook16406952006-04-27 23:15:07 +00001008extern QEMUMachine versatileab_machine;
pbrookcdbdb642006-04-09 01:32:52 +00001009
bellarddaa57962005-11-26 10:14:03 +00001010/* ps2.c */
1011void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1012void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1013void ps2_write_mouse(void *, int val);
1014void ps2_write_keyboard(void *, int val);
1015uint32_t ps2_read_data(void *);
1016void ps2_queue(void *, int b);
pbrookf94f5d72006-02-08 04:42:17 +00001017void ps2_keyboard_set_translation(void *opaque, int mode);
bellarddaa57962005-11-26 10:14:03 +00001018
bellard80337b62005-12-04 18:54:21 +00001019/* smc91c111.c */
1020void smc91c111_init(NICInfo *, uint32_t, void *, int);
1021
pbrookbdd50032006-02-06 04:11:15 +00001022/* pl110.c */
pbrook95219892006-04-09 01:06:34 +00001023void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
pbrookbdd50032006-02-06 04:11:15 +00001024
pbrookcdbdb642006-04-09 01:32:52 +00001025/* pl011.c */
1026void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1027
1028/* pl050.c */
1029void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1030
1031/* pl080.c */
1032void *pl080_init(uint32_t base, void *pic, int irq);
1033
1034/* pl190.c */
1035void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1036
1037/* arm-timer.c */
1038void sp804_init(uint32_t base, void *pic, int irq);
1039void icp_pit_init(uint32_t base, void *pic, int irq);
1040
pbrook16406952006-04-27 23:15:07 +00001041/* arm_boot.c */
1042
1043void arm_load_kernel(int ram_size, const char *kernel_filename,
1044 const char *kernel_cmdline, const char *initrd_filename,
1045 int board_id);
1046
bellard27c7ca72006-04-27 21:32:09 +00001047/* sh7750.c */
1048struct SH7750State;
1049
pbrook008a8812006-04-27 22:32:36 +00001050struct SH7750State *sh7750_init(CPUState * cpu);
bellard27c7ca72006-04-27 21:32:09 +00001051
1052typedef struct {
1053 /* The callback will be triggered if any of the designated lines change */
1054 uint16_t portamask_trigger;
1055 uint16_t portbmask_trigger;
1056 /* Return 0 if no action was taken */
1057 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1058 uint16_t * periph_pdtra,
1059 uint16_t * periph_portdira,
1060 uint16_t * periph_pdtrb,
1061 uint16_t * periph_portdirb);
1062} sh7750_io_device;
1063
1064int sh7750_register_io_device(struct SH7750State *s,
1065 sh7750_io_device * device);
1066/* tc58128.c */
1067int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1068
bellardea2384d2004-08-01 21:59:26 +00001069#endif /* defined(QEMU_TOOL) */
1070
bellardc4b1fcc2004-03-14 21:44:30 +00001071/* monitor.c */
bellard82c643f2004-07-14 17:28:13 +00001072void monitor_init(CharDriverState *hd, int show_banner);
bellardea2384d2004-08-01 21:59:26 +00001073void term_puts(const char *str);
1074void term_vprintf(const char *fmt, va_list ap);
bellard40c3bac2004-04-04 12:56:28 +00001075void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
bellardc4b1fcc2004-03-14 21:44:30 +00001076void term_flush(void);
1077void term_print_help(void);
bellardea2384d2004-08-01 21:59:26 +00001078void monitor_readline(const char *prompt, int is_password,
1079 char *buf, int buf_size);
1080
1081/* readline.c */
1082typedef void ReadLineFunc(void *opaque, const char *str);
1083
1084extern int completion_index;
1085void add_completion(const char *str);
1086void readline_handle_byte(int ch);
1087void readline_find_completion(const char *cmdline);
1088const char *readline_get_history(unsigned int index);
1089void readline_start(const char *prompt, int is_password,
1090 ReadLineFunc *readline_func, void *opaque);
bellardc4b1fcc2004-03-14 21:44:30 +00001091
bellard5e6ad6f2005-08-21 09:30:40 +00001092void kqemu_record_dump(void);
1093
bellardfc01f7e2003-06-30 10:03:06 +00001094#endif /* VL_H */