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bellard64201202004-05-26 22:55:16 +00001/*
j_mayer3cbee152007-10-28 23:42:18 +00002 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
ths5fafdf22007-09-16 21:08:06 +00003 *
j_mayer47103572007-03-30 09:38:04 +00004 * Copyright (c) 2004-2007 Fabrice Bellard
j_mayer3cbee152007-10-28 23:42:18 +00005 * Copyright (c) 2007 Jocelyn Mayer
ths5fafdf22007-09-16 21:08:06 +00006 *
bellard64201202004-05-26 22:55:16 +00007 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
Alexander Graf915cd3a2010-02-09 17:37:03 +010024 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
bellard64201202004-05-26 22:55:16 +000047 */
Markus Armbrustera8d25322019-05-23 16:35:08 +020048
Peter Maydell0d755902016-01-26 18:16:58 +000049#include "qemu/osdep.h"
Paolo Bonzini2c65db52020-10-28 07:36:57 -040050#include "qemu/datadir.h"
BALATON Zoltancfb47bf2022-10-28 13:56:23 +020051#include "qemu/units.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010052#include "qapi/error.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010053#include "hw/ppc/ppc.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020054#include "hw/qdev-properties.h"
BALATON Zoltan443f07b2022-10-28 13:56:27 +020055#include "hw/nvram/mac_nvram.h"
BALATON Zoltancfb47bf2022-10-28 13:56:23 +020056#include "hw/boards.h"
57#include "hw/pci-host/uninorth.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010058#include "hw/input/adb.h"
59#include "hw/ppc/mac_dbdma.h"
Andreas Färberbaec1912013-01-23 23:03:54 +000060#include "hw/pci/pci.h"
Paolo Bonzini1422e322012-10-24 08:43:34 +020061#include "net/net.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010062#include "sysemu/sysemu.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010063#include "hw/nvram/fw_cfg.h"
64#include "hw/char/escc.h"
Mark Cave-Aylande1218e42018-02-28 20:32:37 +000065#include "hw/misc/macio/macio.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010066#include "hw/ppc/openpic.h"
Andreas Färberbaec1912013-01-23 23:03:54 +000067#include "hw/loader.h"
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +010068#include "hw/fw-path-provider.h"
Blue Swirlca20cf32009-09-20 14:58:02 +000069#include "elf.h"
Markus Armbrusterc5254362015-12-17 17:35:09 +010070#include "qemu/error-report.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010071#include "sysemu/kvm.h"
Markus Armbruster71e8a912019-08-12 07:23:38 +020072#include "sysemu/reset.h"
Alexander Grafdc333cd2010-02-09 17:37:05 +010073#include "kvm_ppc.h"
Alexander Grafa2236d42010-02-09 17:37:08 +010074#include "hw/usb.h"
Andreas Färberbaec1912013-01-23 23:03:54 +000075#include "hw/sysbus.h"
Laurent Vivier5283c272017-02-10 10:27:22 +010076#include "trace.h"
bellard267002c2004-06-03 18:46:20 +000077
thse4bcb142007-12-02 04:51:10 +000078#define MAX_IDE_BUS 2
blueswir1006f3a42009-02-08 15:59:36 +000079#define CFG_ADDR 0xf0000510
Mark Cave-Ayland78abf932024-03-04 07:35:48 +000080#define TBFREQ (25UL * 1000UL * 1000UL)
Benjamin Herrenschmidt3c062282017-09-17 18:15:42 +010081#define CLOCKFREQ (900UL * 1000UL * 1000UL)
BALATON Zoltan9d1c1282014-04-17 19:04:44 +020082#define BUSFREQ (100UL * 1000UL * 1000UL)
thse4bcb142007-12-02 04:51:10 +000083
Mark Cave-Ayland53ecf092017-05-01 14:43:33 +010084#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
85
BALATON Zoltan3d0031c2022-10-28 13:56:26 +020086#define PROM_FILENAME "openbios-ppc"
BALATON Zoltan31a6f352020-10-16 01:47:17 +020087#define PROM_BASE 0xfff00000
88#define PROM_SIZE (1 * MiB)
bellard0aa6a4a2005-06-05 15:11:17 +000089
BALATON Zoltan3d0031c2022-10-28 13:56:26 +020090#define KERNEL_LOAD_ADDR 0x01000000
91#define KERNEL_GAP 0x00100000
92
BALATON Zoltancfb47bf2022-10-28 13:56:23 +020093#define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99")
94typedef struct Core99MachineState Core99MachineState;
95DECLARE_INSTANCE_CHECKER(Core99MachineState, CORE99_MACHINE,
96 TYPE_CORE99_MACHINE)
97
BALATON Zoltan53cb5522022-10-28 13:56:30 +020098typedef enum {
99 CORE99_VIA_CONFIG_CUDA = 0,
100 CORE99_VIA_CONFIG_PMU,
101 CORE99_VIA_CONFIG_PMU_ADB
102} Core99ViaConfig;
BALATON Zoltancfb47bf2022-10-28 13:56:23 +0200103
104struct Core99MachineState {
105 /*< private >*/
106 MachineState parent;
107
BALATON Zoltan53cb5522022-10-28 13:56:30 +0200108 Core99ViaConfig via_config;
BALATON Zoltancfb47bf2022-10-28 13:56:23 +0200109};
110
Gongleiddcd5532014-12-03 19:04:02 +0000111static void fw_cfg_boot_set(void *opaque, const char *boot_device,
112 Error **errp)
blueswir1513f7892009-03-08 09:51:29 +0000113{
Gabriel L. Somlo48779e52015-06-08 14:10:45 -0400114 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
blueswir1513f7892009-03-08 09:51:29 +0000115}
116
Aurelien Jarno409dbce2010-03-14 21:20:59 +0100117static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
118{
119 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
120}
121
Andreas Färber1bba0dc2012-02-08 03:03:33 +0100122static void ppc_core99_reset(void *opaque)
123{
Andreas Färber66809882012-05-04 17:30:25 +0200124 PowerPCCPU *cpu = opaque;
Andreas Färber1bba0dc2012-02-08 03:03:33 +0100125
Andreas Färber66809882012-05-04 17:30:25 +0200126 cpu_reset(CPU(cpu));
Alexander Graf20f649d2013-04-04 18:45:07 +0200127 /* 970 CPUs want to get their initial IP as part of their boot protocol */
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200128 cpu->env.nip = PROM_BASE + 0x100;
Andreas Färber1bba0dc2012-02-08 03:03:33 +0100129}
130
j_mayer3cbee152007-10-28 23:42:18 +0000131/* PowerPC Mac99 hardware initialisation */
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300132static void ppc_core99_init(MachineState *machine)
bellard64201202004-05-26 22:55:16 +0000133{
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100134 Core99MachineState *core99_machine = CORE99_MACHINE(machine);
Thomas Huth053b7082023-05-12 14:40:20 +0200135 MachineClass *mc = MACHINE_GET_CLASS(machine);
Andreas Färber8f8204e2012-05-04 17:29:07 +0200136 PowerPCCPU *cpu = NULL;
Andreas Färbere2684c02012-03-14 01:38:23 +0100137 CPUPPCState *env = NULL;
Paul Brook5cea8592009-05-30 00:52:44 +0100138 char *filename;
Greg Kurz99293012018-11-27 14:06:22 +0100139 IrqLines *openpic_irqs;
BALATON Zoltan6120dc82022-10-28 13:56:20 +0200140 int i, j, k, ppc_boot_device, machine_arch, bios_size = -1;
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200141 const char *bios_name = machine->firmware ?: PROM_FILENAME;
Igor Mammedova5b5de02020-02-19 11:09:34 -0500142 MemoryRegion *bios = g_new(MemoryRegion, 1);
BALATON Zoltan6120dc82022-10-28 13:56:20 +0200143 hwaddr kernel_base = 0, initrd_base = 0, cmdline_base = 0;
144 long kernel_size = 0, initrd_size = 0;
bellard46e50e92004-06-21 19:43:00 +0000145 PCIBus *pci_bus;
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100146 bool has_pmu, has_adb;
BALATON Zoltan18e03832022-10-28 13:56:22 +0200147 Object *macio;
Andreas Färber07a74842013-01-23 23:04:01 +0000148 MACIOIDEState *macio_ide;
Andreas Färber293c8672013-01-23 23:04:05 +0000149 BusState *adb_bus;
j_mayer3cbee152007-10-28 23:42:18 +0000150 MacIONVRAMState *nvr;
Gerd Hoffmannf455e982009-08-28 15:47:03 +0200151 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
blueswir1006f3a42009-02-08 15:59:36 +0000152 void *fw_cfg;
Alexander Grafd0b72632012-12-08 05:17:14 +0100153 SysBusDevice *s;
BALATON Zoltan18e03832022-10-28 13:56:22 +0200154 DeviceState *dev, *pic_dev, *uninorth_pci_dev;
Mark Cave-Ayland6ce97b22020-12-29 17:56:16 +0000155 DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
Alexander Graf261265c2014-07-11 03:24:39 +0200156 hwaddr nvram_addr = 0xFFF04000;
BALATON Zoltan6b924ab2022-10-28 13:56:19 +0200157 uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ;
bellard64201202004-05-26 22:55:16 +0000158
bellardc68ea702005-11-21 23:33:12 +0000159 /* init CPUs */
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200160 for (i = 0; i < machine->smp.cpus; i++) {
Igor Mammedov9dff4c02017-10-09 21:50:52 +0200161 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
Andreas Färber8f8204e2012-05-04 17:29:07 +0200162 env = &cpu->env;
163
j_mayere9df0142007-04-09 22:45:36 +0000164 /* Set time-base frequency to 100 Mhz */
Alexander Graf536d8cd2013-06-29 17:34:58 +0200165 cpu_ppc_tb_init(env, TBFREQ);
Andreas Färber66809882012-05-04 17:30:25 +0200166 qemu_register_reset(ppc_core99_reset, cpu);
j_mayere9df0142007-04-09 22:45:36 +0000167 }
bellardc68ea702005-11-21 23:33:12 +0000168
bellard64201202004-05-26 22:55:16 +0000169 /* allocate RAM */
Philippe Mathieu-Daudé03b35422021-04-06 10:48:42 +0200170 if (machine->ram_size > 2 * GiB) {
171 error_report("RAM size more than 2 GiB is not supported");
172 exit(1);
173 }
Igor Mammedova5b5de02020-02-19 11:09:34 -0500174 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
blueswir1864c1362009-02-05 20:20:29 +0000175
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200176 /* allocate and load firmware ROM */
177 memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
Markus Armbrusterf8ed85a2015-09-11 16:51:43 +0200178 &error_fatal);
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200179 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
Hu Taoe206ad42014-07-21 17:30:17 +0800180
Paul Brook5cea8592009-05-30 00:52:44 +0100181 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
Paul Brook5cea8592009-05-30 00:52:44 +0100182 if (filename) {
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200183 /* Load OpenBIOS (ELF) */
Liam Merwick4366e1d2019-01-15 12:18:03 +0000184 bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
Aleksandar Markovic6cdda0f2020-01-26 23:55:04 +0100185 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
Blue Swirlca20cf32009-09-20 14:58:02 +0000186
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200187 if (bios_size <= 0) {
188 /* or load binary ROM image */
189 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
190 }
Anthony Liguori7267c092011-08-20 22:09:37 -0500191 g_free(filename);
Paul Brook5cea8592009-05-30 00:52:44 +0100192 }
BALATON Zoltan31a6f352020-10-16 01:47:17 +0200193 if (bios_size < 0 || bios_size > PROM_SIZE) {
Markus Armbrusterc5254362015-12-17 17:35:09 +0100194 error_report("could not load PowerPC bios '%s'", bios_name);
bellard64201202004-05-26 22:55:16 +0000195 exit(1);
196 }
ths3b46e622007-09-17 08:09:54 +0000197
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200198 if (machine->kernel_filename) {
BALATON Zoltan6120dc82022-10-28 13:56:20 +0200199 int bswap_needed = 0;
Blue Swirlca20cf32009-09-20 14:58:02 +0000200
201#ifdef BSWAP_NEEDED
202 bswap_needed = 1;
Blue Swirlca20cf32009-09-20 14:58:02 +0000203#endif
bellardb6b8bd12004-06-21 16:55:53 +0000204 kernel_base = KERNEL_LOAD_ADDR;
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200205 kernel_size = load_elf(machine->kernel_filename, NULL,
BALATON Zoltan617160c2020-07-05 19:22:11 +0200206 translate_kernel_address, NULL, NULL, NULL,
207 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
BALATON Zoltancc537e12022-10-28 13:56:29 +0200208 if (kernel_size < 0) {
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200209 kernel_size = load_aout(machine->kernel_filename, kernel_base,
210 machine->ram_size - kernel_base,
211 bswap_needed, TARGET_PAGE_SIZE);
BALATON Zoltancc537e12022-10-28 13:56:29 +0200212 }
213 if (kernel_size < 0) {
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200214 kernel_size = load_image_targphys(machine->kernel_filename,
blueswir1513f7892009-03-08 09:51:29 +0000215 kernel_base,
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200216 machine->ram_size - kernel_base);
BALATON Zoltancc537e12022-10-28 13:56:29 +0200217 }
bellardb6b8bd12004-06-21 16:55:53 +0000218 if (kernel_size < 0) {
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200219 error_report("could not load kernel '%s'",
220 machine->kernel_filename);
bellardb6b8bd12004-06-21 16:55:53 +0000221 exit(1);
222 }
223 /* load initrd */
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200224 if (machine->initrd_filename) {
Kamil Rytarowski39d96842017-09-11 22:16:10 +0200225 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200226 initrd_size = load_image_targphys(machine->initrd_filename,
227 initrd_base,
228 machine->ram_size - initrd_base);
bellardb6b8bd12004-06-21 16:55:53 +0000229 if (initrd_size < 0) {
Markus Armbrusterc5254362015-12-17 17:35:09 +0100230 error_report("could not load initial ram disk '%s'",
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200231 machine->initrd_filename);
bellardb6b8bd12004-06-21 16:55:53 +0000232 exit(1);
233 }
Kamil Rytarowski39d96842017-09-11 22:16:10 +0200234 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
bellardb6b8bd12004-06-21 16:55:53 +0000235 } else {
Kamil Rytarowski39d96842017-09-11 22:16:10 +0200236 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
bellardb6b8bd12004-06-21 16:55:53 +0000237 }
balrog6ac0e822007-10-31 01:54:04 +0000238 ppc_boot_device = 'm';
bellardb6b8bd12004-06-21 16:55:53 +0000239 } else {
j_mayer28c5af52007-11-11 01:50:45 +0000240 ppc_boot_device = '\0';
241 /* We consider that NewWorld PowerMac never have any floppy drive
242 * For now, OHW cannot boot from the network.
243 */
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200244 for (i = 0; machine->boot_config.order[i] != '\0'; i++) {
245 if (machine->boot_config.order[i] >= 'c' &&
246 machine->boot_config.order[i] <= 'f') {
247 ppc_boot_device = machine->boot_config.order[i];
j_mayer28c5af52007-11-11 01:50:45 +0000248 break;
j_mayer0d913fd2007-11-11 14:44:28 +0000249 }
j_mayer28c5af52007-11-11 01:50:45 +0000250 }
251 if (ppc_boot_device == '\0') {
Alistair Francis6f76b812018-02-03 09:43:10 +0100252 error_report("No valid boot device for Mac99 machine");
j_mayer28c5af52007-11-11 01:50:45 +0000253 exit(1);
254 }
bellardb6b8bd12004-06-21 16:55:53 +0000255 }
bellard64201202004-05-26 22:55:16 +0000256
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200257 openpic_irqs = g_new0(IrqLines, machine->smp.cpus);
BALATON Zoltan18e03832022-10-28 13:56:22 +0200258 dev = DEVICE(cpu);
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200259 for (i = 0; i < machine->smp.cpus; i++) {
j_mayer3cbee152007-10-28 23:42:18 +0000260 /* Mac99 IRQ connection between OpenPIC outputs pins
261 * and PowerPC input pins
262 */
263 switch (PPC_INPUT(env)) {
264 case PPC_FLAGS_INPUT_6xx:
Greg Kurz99293012018-11-27 14:06:22 +0100265 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200266 qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
Greg Kurz99293012018-11-27 14:06:22 +0100267 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200268 qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
Greg Kurz99293012018-11-27 14:06:22 +0100269 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200270 qdev_get_gpio_in(dev, PPC6xx_INPUT_MCP);
j_mayer3cbee152007-10-28 23:42:18 +0000271 /* Not connected ? */
Greg Kurz99293012018-11-27 14:06:22 +0100272 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
j_mayer3cbee152007-10-28 23:42:18 +0000273 /* Check this */
Greg Kurz99293012018-11-27 14:06:22 +0100274 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200275 qdev_get_gpio_in(dev, PPC6xx_INPUT_HRESET);
j_mayer3cbee152007-10-28 23:42:18 +0000276 break;
277#if defined(TARGET_PPC64)
278 case PPC_FLAGS_INPUT_970:
Greg Kurz99293012018-11-27 14:06:22 +0100279 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200280 qdev_get_gpio_in(dev, PPC970_INPUT_INT);
Greg Kurz99293012018-11-27 14:06:22 +0100281 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200282 qdev_get_gpio_in(dev, PPC970_INPUT_INT);
Greg Kurz99293012018-11-27 14:06:22 +0100283 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200284 qdev_get_gpio_in(dev, PPC970_INPUT_MCP);
j_mayer3cbee152007-10-28 23:42:18 +0000285 /* Not connected ? */
Greg Kurz99293012018-11-27 14:06:22 +0100286 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
j_mayer3cbee152007-10-28 23:42:18 +0000287 /* Check this */
Greg Kurz99293012018-11-27 14:06:22 +0100288 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
BALATON Zoltan18e03832022-10-28 13:56:22 +0200289 qdev_get_gpio_in(dev, PPC970_INPUT_HRESET);
j_mayer3cbee152007-10-28 23:42:18 +0000290 break;
291#endif /* defined(TARGET_PPC64) */
292 default:
Markus Armbrusterc5254362015-12-17 17:35:09 +0100293 error_report("Bus model not supported on mac99 machine");
j_mayerdd37a5e2007-04-16 07:41:07 +0000294 exit(1);
295 }
bellard64201202004-05-26 22:55:16 +0000296 }
Alexander Grafd0b72632012-12-08 05:17:14 +0100297
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200298 /* UniN init */
299 s = SYS_BUS_DEVICE(qdev_new(TYPE_UNI_NORTH));
300 sysbus_realize_and_unref(s, &error_fatal);
301 memory_region_add_subregion(get_system_memory(), 0xf8000000,
302 sysbus_mmio_get_region(s, 0));
303
Alexander Graf0f921192010-02-09 17:37:02 +0100304 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200305 machine_arch = ARCH_MAC99_U3;
Alexander Graf0f921192010-02-09 17:37:02 +0100306 /* 970 gets a U3 bus */
Mark Cave-Ayland8ce3f742018-03-06 20:30:57 +0000307 /* Uninorth AGP bus */
BALATON Zoltan18e03832022-10-28 13:56:22 +0200308 uninorth_pci_dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
309 s = SYS_BUS_DEVICE(uninorth_pci_dev);
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200310 sysbus_realize_and_unref(s, &error_fatal);
311 sysbus_mmio_map(s, 0, 0xf0800000);
312 sysbus_mmio_map(s, 1, 0xf0c00000);
Mark Cave-Ayland8ce3f742018-03-06 20:30:57 +0000313 /* PCI hole */
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200314 memory_region_add_subregion(get_system_memory(), 0x80000000,
Mark Cave-Ayland8ce3f742018-03-06 20:30:57 +0000315 sysbus_mmio_get_region(s, 2));
Mark Cave-Aylande226efb2018-03-06 20:30:59 +0000316 /* Register 8 MB of ISA IO space */
317 memory_region_add_subregion(get_system_memory(), 0xf2000000,
318 sysbus_mmio_get_region(s, 3));
Alexander Graf0f921192010-02-09 17:37:02 +0100319 } else {
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200320 machine_arch = ARCH_MAC99;
Mark Cave-Ayland7b193182018-03-06 20:30:56 +0000321 /* Use values found on a real PowerMac */
322 /* Uninorth AGP bus */
Mark Cave-Ayland6ce97b22020-12-29 17:56:16 +0000323 uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
324 s = SYS_BUS_DEVICE(uninorth_agp_dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200325 sysbus_realize_and_unref(s, &error_fatal);
Mark Cave-Ayland7b193182018-03-06 20:30:56 +0000326 sysbus_mmio_map(s, 0, 0xf0800000);
327 sysbus_mmio_map(s, 1, 0xf0c00000);
328
329 /* Uninorth internal bus */
Mark Cave-Ayland6ce97b22020-12-29 17:56:16 +0000330 uninorth_internal_dev = qdev_new(
331 TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
332 s = SYS_BUS_DEVICE(uninorth_internal_dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200333 sysbus_realize_and_unref(s, &error_fatal);
Mark Cave-Ayland7b193182018-03-06 20:30:56 +0000334 sysbus_mmio_map(s, 0, 0xf4800000);
335 sysbus_mmio_map(s, 1, 0xf4c00000);
336
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200337 /* Uninorth main bus - this must be last to make it the default */
BALATON Zoltan18e03832022-10-28 13:56:22 +0200338 uninorth_pci_dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
339 qdev_prop_set_uint32(uninorth_pci_dev, "ofw-addr", 0xf2000000);
340 s = SYS_BUS_DEVICE(uninorth_pci_dev);
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200341 sysbus_realize_and_unref(s, &error_fatal);
342 sysbus_mmio_map(s, 0, 0xf2800000);
343 sysbus_mmio_map(s, 1, 0xf2c00000);
Mark Cave-Ayland7b193182018-03-06 20:30:56 +0000344 /* PCI hole */
BALATON Zoltan50c496d272022-10-28 13:56:21 +0200345 memory_region_add_subregion(get_system_memory(), 0x80000000,
Mark Cave-Ayland7b193182018-03-06 20:30:56 +0000346 sysbus_mmio_get_region(s, 2));
Mark Cave-Aylande226efb2018-03-06 20:30:59 +0000347 /* Register 8 MB of ISA IO space */
348 memory_region_add_subregion(get_system_memory(), 0xf2000000,
349 sysbus_mmio_get_region(s, 3));
Alexander Graf0f921192010-02-09 17:37:02 +0100350 }
Alexander Grafcaae6c92014-07-13 22:29:02 +0200351
Alexander Graf72f1f972015-11-11 22:49:41 +0000352 machine->usb |= defaults_enabled() && !machine->usb_disabled;
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100353 has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
354 has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
355 core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
Alexander Graf72f1f972015-11-11 22:49:41 +0000356
Mark Cave-Ayland0f4b5412018-03-06 20:30:50 +0000357 /* init basic PC hardware */
BALATON Zoltan18e03832022-10-28 13:56:22 +0200358 pci_bus = PCI_HOST_BRIDGE(uninorth_pci_dev)->bus;
Mark Cave-Ayland0f4b5412018-03-06 20:30:50 +0000359
Mark Cave-Ayland343bd852018-02-28 20:32:33 +0000360 /* MacIO */
BALATON Zoltan18e03832022-10-28 13:56:22 +0200361 macio = OBJECT(pci_new(-1, TYPE_NEWWORLD_MACIO));
Andreas Färber07a74842013-01-23 23:04:01 +0000362 dev = DEVICE(macio);
Alexander Grafb9812892014-07-13 22:31:53 +0200363 qdev_prop_set_uint64(dev, "frequency", tbfreq);
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100364 qdev_prop_set_bit(dev, "has-pmu", has_pmu);
365 qdev_prop_set_bit(dev, "has-adb", has_adb);
Mark Cave-Ayland348b8d12020-10-13 12:49:20 +0100366
BALATON Zoltan18e03832022-10-28 13:56:22 +0200367 dev = DEVICE(object_resolve_path_component(macio, "escc"));
368 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
369 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
Mark Cave-Ayland348b8d12020-10-13 12:49:20 +0100370
BALATON Zoltan18e03832022-10-28 13:56:22 +0200371 pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal);
Andreas Färber07a74842013-01-23 23:04:01 +0000372
BALATON Zoltan18e03832022-10-28 13:56:22 +0200373 pic_dev = DEVICE(object_resolve_path_component(macio, "pic"));
Mark Cave-Ayland6ce97b22020-12-29 17:56:16 +0000374 for (i = 0; i < 4; i++) {
BALATON Zoltan18e03832022-10-28 13:56:22 +0200375 qdev_connect_gpio_out(uninorth_pci_dev, i,
Mark Cave-Ayland6ce97b22020-12-29 17:56:16 +0000376 qdev_get_gpio_in(pic_dev, 0x1b + i));
377 }
378
379 /* TODO: additional PCI buses only wired up for 32-bit machines */
380 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
381 /* Uninorth AGP bus */
382 for (i = 0; i < 4; i++) {
383 qdev_connect_gpio_out(uninorth_agp_dev, i,
384 qdev_get_gpio_in(pic_dev, 0x1b + i));
385 }
386
387 /* Uninorth internal bus */
388 for (i = 0; i < 4; i++) {
389 qdev_connect_gpio_out(uninorth_internal_dev, i,
390 qdev_get_gpio_in(pic_dev, 0x1b + i));
391 }
392 }
393
Mark Cave-Ayland7e4d62d2020-12-29 17:56:17 +0000394 /* OpenPIC */
395 s = SYS_BUS_DEVICE(pic_dev);
396 k = 0;
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200397 for (i = 0; i < machine->smp.cpus; i++) {
Mark Cave-Ayland7e4d62d2020-12-29 17:56:17 +0000398 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
399 sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
400 }
401 }
402 g_free(openpic_irqs);
403
Andreas Färber07a74842013-01-23 23:04:01 +0000404 /* We only emulate 2 out of 3 IDE controllers for now */
John Snowd8f94e12014-10-01 14:19:27 -0400405 ide_drive_get(hd, ARRAY_SIZE(hd));
BALATON Zoltana0bb2a52014-06-24 00:03:48 +0200406
BALATON Zoltan18e03832022-10-28 13:56:22 +0200407 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]"));
Andreas Färber07a74842013-01-23 23:04:01 +0000408 macio_ide_init_drives(macio_ide, hd);
409
BALATON Zoltan18e03832022-10-28 13:56:22 +0200410 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]"));
Andreas Färber07a74842013-01-23 23:04:01 +0000411 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
pbrook0d92ed32006-05-21 16:30:15 +0000412
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100413 if (has_adb) {
Mark Cave-Aylandd811d612018-06-12 17:44:02 +0100414 if (has_pmu) {
BALATON Zoltan18e03832022-10-28 13:56:22 +0200415 dev = DEVICE(object_resolve_path_component(macio, "pmu"));
Mark Cave-Aylandd811d612018-06-12 17:44:02 +0100416 } else {
BALATON Zoltan18e03832022-10-28 13:56:22 +0200417 dev = DEVICE(object_resolve_path_component(macio, "cuda"));
Mark Cave-Aylandd811d612018-06-12 17:44:02 +0100418 }
419
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100420 adb_bus = qdev_get_child_bus(dev, "adb.0");
Markus Armbruster3e80f692020-06-10 07:31:58 +0200421 dev = qdev_new(TYPE_ADB_KEYBOARD);
Markus Armbruster3e80f692020-06-10 07:31:58 +0200422 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
Mark Cave-Aylandd811d612018-06-12 17:44:02 +0100423
Markus Armbruster3e80f692020-06-10 07:31:58 +0200424 dev = qdev_new(TYPE_ADB_MOUSE);
Markus Armbruster3e80f692020-06-10 07:31:58 +0200425 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100426 }
Andreas Färber45fa67f2013-01-23 23:04:02 +0000427
Marcel Apfelbaum59a04192015-01-06 15:29:17 +0200428 if (machine->usb) {
Gerd Hoffmannafb9a602012-03-07 15:06:32 +0100429 pci_create_simple(pci_bus, -1, "pci-ohci");
Markus Armbrusterc86580b2015-02-04 13:28:14 +0100430
zhlcindy@gmail.com094b2872012-09-02 19:25:28 +0000431 /* U3 needs to use USB for input because Linux doesn't support via-cuda
432 on PPC64 */
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100433 if (!has_adb || machine_arch == ARCH_MAC99_U3) {
Paolo Bonzini2dd2f2e2024-02-23 13:44:02 +0100434 USBBus *usb_bus;
Markus Armbrusterc86580b2015-02-04 13:28:14 +0100435
Paolo Bonzini2dd2f2e2024-02-23 13:44:02 +0100436 usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
437 &error_abort));
Markus Armbrusterc86580b2015-02-04 13:28:14 +0100438 usb_create_simple(usb_bus, "usb-kbd");
439 usb_create_simple(usb_bus, "usb-mouse");
zhlcindy@gmail.com094b2872012-09-02 19:25:28 +0000440 }
Alexander Grafa2236d42010-02-09 17:37:08 +0100441 }
442
BALATON Zoltana0bb2a52014-06-24 00:03:48 +0200443 pci_vga_init(pci_bus);
444
445 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
bellardb6b8bd12004-06-21 16:55:53 +0000446 graphic_depth = 15;
BALATON Zoltana0bb2a52014-06-24 00:03:48 +0200447 }
448
David Woodhouse36b69682023-10-23 09:37:19 +0100449 pci_init_nic_devices(pci_bus, mc->default_nic);
blueswir14f3f2382009-02-08 16:01:01 +0000450
j_mayer3cbee152007-10-28 23:42:18 +0000451 /* The NewWorld NVRAM is not located in the MacIO device */
Marc-André Lureau8e3b0cb2022-03-23 19:57:22 +0400452 if (kvm_enabled() && qemu_real_host_page_size() > 4096) {
Alexander Graf261265c2014-07-11 03:24:39 +0200453 /* We can't combine read-write and read-only in a single page, so
454 move the NVRAM out of ROM again for KVM */
455 nvram_addr = 0xFFE00000;
456 }
Markus Armbruster3e80f692020-06-10 07:31:58 +0200457 dev = qdev_new(TYPE_MACIO_NVRAM);
BALATON Zoltan458586f2022-10-28 13:56:28 +0200458 qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE);
Andreas Färber95ed3b72013-01-23 23:04:00 +0000459 qdev_prop_set_uint32(dev, "it_shift", 1);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200460 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
Alexander Graf261265c2014-07-11 03:24:39 +0200461 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
Andreas Färber95ed3b72013-01-23 23:04:00 +0000462 nvr = MACIO_NVRAM(dev);
BALATON Zoltan458586f2022-10-28 13:56:28 +0200463 pmac_format_nvram_partition(nvr, MACIO_NVRAM_SIZE);
bellardb6b8bd12004-06-21 16:55:53 +0000464 /* No PCI init: the BIOS will do it */
bellard0aa6a4a2005-06-05 15:11:17 +0000465
Markus Armbruster3e80f692020-06-10 07:31:58 +0200466 dev = qdev_new(TYPE_FW_CFG_MEM);
Mark Cave-Ayland74887ed2018-08-10 11:27:57 +0100467 fw_cfg = FW_CFG(dev);
468 qdev_prop_set_uint32(dev, "data_width", 1);
469 qdev_prop_set_bit(dev, "dma_enabled", false);
BALATON Zoltan4db48472023-01-04 22:59:37 +0100470 object_property_add_child(OBJECT(machine), TYPE_FW_CFG, OBJECT(fw_cfg));
Mark Cave-Ayland74887ed2018-08-10 11:27:57 +0100471 s = SYS_BUS_DEVICE(dev);
Markus Armbruster3c6ef472020-06-10 07:32:34 +0200472 sysbus_realize_and_unref(s, &error_fatal);
Mark Cave-Ayland74887ed2018-08-10 11:27:57 +0100473 sysbus_mmio_map(s, 0, CFG_ADDR);
474 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
475
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200476 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
Like Xufe6b6342019-05-19 04:54:22 +0800477 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200478 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
Alexander Graf0f921192010-02-09 17:37:02 +0100479 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
blueswir1513f7892009-03-08 09:51:29 +0000480 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
481 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200482 if (machine->kernel_cmdline) {
Alexander Grafb9e17a32011-06-15 23:27:19 +0200483 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
BALATON Zoltancc4a1402022-10-28 13:56:17 +0200484 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
485 machine->kernel_cmdline);
blueswir1513f7892009-03-08 09:51:29 +0000486 } else {
487 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
488 }
489 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
490 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
491 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
Blue Swirl10696b42009-08-08 10:47:15 +0000492
493 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
494 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
495 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
496
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100497 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
498
Alexander Graf45024f02010-08-03 15:22:42 +0200499 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
Alexander Grafdc333cd2010-02-09 17:37:05 +0100500 if (kvm_enabled()) {
Alexander Graf45024f02010-08-03 15:22:42 +0200501 uint8_t *hypercall;
502
Anthony Liguori7267c092011-08-20 22:09:37 -0500503 hypercall = g_malloc(16);
Alexander Graf45024f02010-08-03 15:22:42 +0200504 kvmppc_get_hypercall(env, hypercall, 16);
505 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
506 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
Alexander Grafdc333cd2010-02-09 17:37:05 +0100507 }
Alexander Grafcaae6c92014-07-13 22:29:02 +0200508 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
Alexander Grafa1014f22013-06-23 00:22:50 +0200509 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
BALATON Zoltan9d1c1282014-04-17 19:04:44 +0200510 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
511 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
Alexander Graf261265c2014-07-11 03:24:39 +0200512 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
Alexander Grafdc333cd2010-02-09 17:37:05 +0100513
Mark Cave-Ayland53ecf092017-05-01 14:43:33 +0100514 /* MacOS NDRV VGA driver */
515 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
516 if (filename) {
Peter Maydell97768742018-12-14 13:30:50 +0000517 gchar *ndrv_file;
518 gsize ndrv_size;
Mark Cave-Ayland53ecf092017-05-01 14:43:33 +0100519
Peter Maydell97768742018-12-14 13:30:50 +0000520 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
Mark Cave-Ayland53ecf092017-05-01 14:43:33 +0100521 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
522 }
523 g_free(filename);
524 }
525
blueswir1513f7892009-03-08 09:51:29 +0000526 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
j_mayeraae93662007-11-24 02:56:36 +0000527}
bellard0aa6a4a2005-06-05 15:11:17 +0000528
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100529/*
530 * Implementation of an interface to adjust firmware path
531 * for the bootindex property handling.
532 */
533static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
534 DeviceState *dev)
535{
536 PCIDevice *pci;
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100537 MACIOIDEState *macio_ide;
538
539 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
540 pci = PCI_DEVICE(dev);
541 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
542 }
543
544 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
545 macio_ide = MACIO_IDE(dev);
546 return g_strdup_printf("ata-3@%x", macio_ide->addr);
547 }
548
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100549 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
Mark Cave-Ayland31bc6fa2019-03-07 21:20:58 +0000550 return g_strdup("disk");
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100551 }
552
553 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
554 return g_strdup("cdrom");
555 }
556
557 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
558 return g_strdup("disk");
559 }
560
561 return NULL;
562}
Eric Augerdc0ca802019-03-04 11:13:33 +0100563static int core99_kvm_type(MachineState *machine, const char *arg)
Alexander Graf277c7a42014-07-24 10:46:47 +0200564{
565 /* Always force PR KVM */
566 return 2;
567}
568
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200569static void core99_machine_class_init(ObjectClass *oc, void *data)
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500570{
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200571 MachineClass *mc = MACHINE_CLASS(oc);
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100572 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200573
Tejas Vipin9d906ad2024-08-05 12:31:50 +0530574 mc->desc = "Mac99 based PowerMac";
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200575 mc->init = ppc_core99_init;
Markus Armbruster20598392017-02-15 11:05:40 +0100576 mc->block_default_type = IF_IDE;
Peter Maydell83234b82021-12-17 17:57:12 +0100577 /* SMP is not supported currently */
578 mc->max_cpus = 1;
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200579 mc->default_boot_order = "cd";
Mark Cave-Ayland32327942018-07-03 20:10:43 +0100580 mc->default_display = "std";
Thomas Huth053b7082023-05-12 14:40:20 +0200581 mc->default_nic = "sungem";
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200582 mc->kvm_type = core99_kvm_type;
Igor Mammedov9dff4c02017-10-09 21:50:52 +0200583#ifdef TARGET_PPC64
584 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
585#else
586 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
587#endif
Igor Mammedova5b5de02020-02-19 11:09:34 -0500588 mc->default_ram_id = "ppc_core99.ram";
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100589 mc->ignore_boot_device_suffixes = true;
590 fwc->get_dev_path = core99_fw_dev_path;
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500591}
592
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100593static char *core99_get_via_config(Object *obj, Error **errp)
594{
595 Core99MachineState *cms = CORE99_MACHINE(obj);
596
597 switch (cms->via_config) {
598 default:
599 case CORE99_VIA_CONFIG_CUDA:
600 return g_strdup("cuda");
601
602 case CORE99_VIA_CONFIG_PMU:
603 return g_strdup("pmu");
604
605 case CORE99_VIA_CONFIG_PMU_ADB:
606 return g_strdup("pmu-adb");
607 }
608}
609
610static void core99_set_via_config(Object *obj, const char *value, Error **errp)
611{
612 Core99MachineState *cms = CORE99_MACHINE(obj);
613
614 if (!strcmp(value, "cuda")) {
615 cms->via_config = CORE99_VIA_CONFIG_CUDA;
616 } else if (!strcmp(value, "pmu")) {
617 cms->via_config = CORE99_VIA_CONFIG_PMU;
618 } else if (!strcmp(value, "pmu-adb")) {
619 cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
620 } else {
621 error_setg(errp, "Invalid via value");
622 error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
623 }
624}
625
Mark Cave-Ayland06fe3a52018-06-12 17:43:56 +0100626static void core99_instance_init(Object *obj)
627{
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100628 Core99MachineState *cms = CORE99_MACHINE(obj);
629
630 /* Default via_config is CORE99_VIA_CONFIG_CUDA */
631 cms->via_config = CORE99_VIA_CONFIG_CUDA;
632 object_property_add_str(obj, "via", core99_get_via_config,
Markus Armbrusterd2623122020-05-05 17:29:22 +0200633 core99_set_via_config);
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100634 object_property_set_description(obj, "via",
635 "Set VIA configuration. "
Markus Armbruster7eecec72020-05-05 17:29:15 +0200636 "Valid values are cuda, pmu and pmu-adb");
Mark Cave-Aylandf1114c12018-06-12 17:43:57 +0100637
Mark Cave-Ayland06fe3a52018-06-12 17:43:56 +0100638 return;
639}
640
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200641static const TypeInfo core99_machine_info = {
Eduardo Habkostc0f36512015-08-20 14:54:34 -0700642 .name = MACHINE_TYPE_NAME("mac99"),
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200643 .parent = TYPE_MACHINE,
644 .class_init = core99_machine_class_init,
Mark Cave-Ayland06fe3a52018-06-12 17:43:56 +0100645 .instance_init = core99_instance_init,
Mark Cave-Ayland5d19be62018-08-29 17:59:11 +0100646 .instance_size = sizeof(Core99MachineState),
647 .interfaces = (InterfaceInfo[]) {
648 { TYPE_FW_PATH_PROVIDER },
649 { }
650 },
Marcel Apfelbaumb1c2fb92015-01-06 15:29:15 +0200651};
652
653static void mac_machine_register_types(void)
654{
655 type_register_static(&core99_machine_info);
656}
657
658type_init(mac_machine_register_types)