blob: fe56f05616a04c8400ac01e5cd1290125e0c1078 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright : STMicroelectronics 2018
*/
/ {
aliases {
gpio0 = &gpioa;
gpio1 = &gpiob;
gpio2 = &gpioc;
gpio3 = &gpiod;
gpio4 = &gpioe;
gpio5 = &gpiof;
gpio6 = &gpiog;
gpio7 = &gpioh;
gpio8 = &gpioi;
gpio9 = &gpioj;
gpio10 = &gpiok;
gpio25 = &gpioz;
pinctrl0 = &pinctrl;
pinctrl1 = &pinctrl_z;
};
binman: binman {
multiple-images;
};
clocks {
bootph-all;
};
/* need PSCI for sysreset during board_f */
psci {
bootph-some-ram;
};
reboot {
bootph-all;
compatible = "syscon-reboot";
regmap = <&rcc>;
offset = <0x404>;
mask = <0x1>;
};
soc {
bootph-all;
ddr: ddr@5a003000 {
bootph-all;
compatible = "st,stm32mp1-ddr";
reg = <0x5a003000 0x550
0x5a004000 0x234>;
status = "okay";
};
};
};
&bsec {
bootph-all;
};
&clk_csi {
bootph-all;
};
&clk_hsi {
bootph-all;
};
&clk_hse {
bootph-all;
};
&clk_lsi {
bootph-all;
};
&clk_lse {
bootph-all;
};
&cpu0_opp_table {
bootph-pre-ram;
opp-650000000 {
bootph-pre-ram;
};
opp-800000000 {
bootph-pre-ram;
};
};
&gpioa {
bootph-all;
};
&gpiob {
bootph-all;
};
&gpioc {
bootph-all;
};
&gpiod {
bootph-all;
};
&gpioe {
bootph-all;
};
&gpiof {
bootph-all;
};
&gpiog {
bootph-all;
};
&gpioh {
bootph-all;
};
&gpioi {
bootph-all;
};
&gpioj {
bootph-all;
};
&gpiok {
bootph-all;
};
&gpioz {
bootph-all;
};
&iwdg2 {
bootph-all;
};
/* pre-reloc probe = reserve video frame buffer in video_reserve() */
&ltdc {
bootph-some-ram;
};
/* temp = waiting kernel update */
&m4_rproc {
resets = <&rcc MCU_R>,
<&rcc MCU_HOLD_BOOT_R>;
reset-names = "mcu_rst", "hold_boot";
};
&pinctrl {
bootph-all;
};
&pinctrl_z {
bootph-all;
};
&pwr_regulators {
bootph-all;
};
&rcc {
bootph-all;
#address-cells = <1>;
#size-cells = <0>;
};
&usart1 {
resets = <&rcc USART1_R>;
};
&usart2 {
resets = <&rcc USART2_R>;
};
&usart3 {
resets = <&rcc USART3_R>;
};
&uart4 {
resets = <&rcc UART4_R>;
};
&uart5 {
resets = <&rcc UART5_R>;
};
&usart6 {
resets = <&rcc USART6_R>;
};
&uart7 {
resets = <&rcc UART7_R>;
};
&uart8{
resets = <&rcc UART8_R>;
};
#if defined(CONFIG_STM32MP15X_STM32IMAGE)
&binman {
u-boot-stm32 {
filename = "u-boot.stm32";
mkimage {
args = "-T stm32image -a 0xc0100000 -e 0xc0100000";
u-boot {
};
};
};
};
#endif
#if defined(CONFIG_SPL)
&binman {
spl-stm32 {
filename = "u-boot-spl.stm32";
mkimage {
args = "-T stm32image -a 0x2ffc2500 -e 0x2ffc2500";
u-boot-spl {
no-write-symbols;
};
};
};
};
#endif