blob: 0ae9f91fbe8a38bc7c9aebf19bb3bfc949192f9e [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot for the GR Peach board
*
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
#include "r7s72100-gr-peach.dts"
/ {
aliases {
spi0 = &rpc;
};
soc {
bootph-all;
};
leds {
led1 {
label = "peach:bottom:red";
};
led-red {
label = "peach:tri:red";
gpios = <&port6 13 GPIO_ACTIVE_HIGH>;
};
led-green {
label = "peach:tri:green";
gpios = <&port6 14 GPIO_ACTIVE_HIGH>;
};
led-blue {
label = "peach:tri:blue";
gpios = <&port6 15 GPIO_ACTIVE_HIGH>;
};
};
reg_usbhs0_vbus: regulator-usbhs0-vbus {
compatible = "regulator-fixed";
regulator-name = "usbhs0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&port4 1 GPIO_ACTIVE_LOW>;
};
rpc: spi@ee200000 {
compatible = "renesas,r7s72100-rpc-if";
reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
bank-width = <2>;
num-cs = <1>;
status = "okay";
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <0>;
flash0: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
reg = <0>;
status = "okay";
};
};
};
&ostm0 {
bootph-all;
};
&pinctrl {
bootph-all;
};
&scif2 {
bootph-all;
clock = <66666666>; /* ToDo: Replace by DM clock driver */
};
&scif2_pins {
bootph-all;
};
&usbhs0 {
vbus-supply = <&reg_usbhs0_vbus>;
status = "okay";
};