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<section id="skiboot-6-0-10">
<span id="id1"></span><h1>skiboot-6.0.10<a class="headerlink" href="#skiboot-6-0-10" title="Link to this heading"></a></h1>
<p>skiboot 6.0.10 was released on Wednesday October 31st, 2018. It replaces
<a class="reference internal" href="skiboot-6.0.9.html#skiboot-6-0-9"><span class="std std-ref">skiboot-6.0.9</span></a> as the current stable release in the 6.0.x series.</p>
<p>It is recommended that 6.0.10 be used instead of any previous 6.0.x version
due to the bug fixes it contains.</p>
<p>The bug fixes are:</p>
<ul>
<li><p>Recognise signed VERSION partition</p></li>
<li><p>hdata/i2c: Skip unknown device type</p>
<p>Do not add unknown I2C devices to device tree.</p>
</li>
<li><p>hdata/i2c: Make SPD workaround more workaroundy</p>
<p>We have a hack in the I2C device parser to fix up entries generated by
hostboot for the DIMM SPD devices. For some reason they get reported as
128Kbit EEPROMs which is bad since those have a different I2C interface
to an actual SPD device.</p>
<p>Oddly enough, the FSP also gets this wrong in a slightly different way.
In the FSP case they are reported as a at24c04 (4Kbit) EEPROM, which
also has a different I2C interface.</p>
<p>To fix both these problems for any eeprom we find on that bus to have
the compatible string of “spd”.</p>
</li>
<li><p>hdata/i2c: Add whitelisting for Host I2C devices</p>
<p>Many of the devices that we get information about through HDAT are for
use by firmware rather than the host operating system. This patch adds
a boolean flag to hdat_i2c_info structure that indicates whether devices
with a given purpose should be reserved for use inside of OPAL (or some
other firmware component, such as the OCC).</p>
</li>
<li><p>Add fast-reboot property to /ibm,opal DT node</p>
<p>this means that if it’s permanently disabled on boot, the test suite can
pick that up and not try a fast reboot test.</p>
</li>
<li><p>libflash: Add ipmi-hiomap (currently for Witherspoon only)</p>
<p>ipmi-hiomap implements the PNOR access control protocol formerly known
as “the mbox protocol” but uses IPMI instead of the AST LPC mailbox as a
transport. As there is no-longer any mailbox involved in this alternate
implementation the old protocol name is quite misleading, and so it has
been renamed to “the hiomap protoocol” (Host I/O Mapping protocol). The
same commands and events are used though this client-side implementation
assumes v2 of the protocol is supported by the BMC.</p>
</li>
<li><p>AMI BMC: use 0x3a as OEM command</p>
<p>The 0x3a OEM command is for IBM commands, while 0x32 was for AMI ones.
Sometime in the P8 timeframe, AMI BMCs were changed to listen for our
commands on either 0x32 or 0x3a. Since 0x3a is the direction forward,
we’ll use that, as P9 machines with AMI BMCs probably also want these
to work, and let’s not bet that 0x32 will continue to be okay.</p>
</li>
<li><p>astbmc: Set romulus BMC type to OpenBMC</p></li>
<li><p>Fixes to bulid with GCC8</p></li>
<li><p>phb4/capp: Use link width to allocate STQ engines to CAPP</p>
<p>Update phb4_init_capp_regs() to allocates STQ Engines to CAPP/PEC2
based on link width instead of always assuming it to x8.</p>
<p>Also re-factor the function slightly to evaluate the link-width only
once and cache it so that it can also be used to allocate DMA read
engines.</p>
</li>
<li><p>phb4/capp: Update the expected Eye-catcher for CAPP ucode lid</p>
<p>Currently on a FSP based P9 system load_capp_code() expects CAPP ucode
lid header to have eye-catcher magic of ‘CAPPPSLL’. However skiboot
currently supports CAPP ucode only lids that have a eye-catcher magic
of ‘CAPPLIDH’. This prevents skiboot from loading the ucode with this
error message:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">CAPP</span><span class="p">:</span> <span class="n">ucode</span> <span class="n">header</span> <span class="n">invalid</span>
</pre></div>
</div>
<p>We fix this issue by updating load_capp_ucode() to use the eye-catcher
value of ‘CAPPLIDH’ instead of ‘CAPPPSLL’.</p>
</li>
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