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| <section id="skiboot-5-9-rc3"> |
| <span id="id1"></span><h1>skiboot-5.9-rc3<a class="headerlink" href="#skiboot-5-9-rc3" title="Link to this heading">¶</a></h1> |
| <p>skiboot v5.9-rc3 was released on Wednesday October 18th 2017. It is the third |
| release candidate of skiboot 5.9, which will become the new stable release |
| of skiboot following the 5.8 release, first released August 31st 2017.</p> |
| <p>skiboot v5.9-rc3 contains all bug fixes as of <a class="reference internal" href="skiboot-5.4.8.html#skiboot-5-4-8"><span class="std std-ref">skiboot-5.4.8</span></a> |
| and <a class="reference internal" href="skiboot-5.1.21.html#skiboot-5-1-21"><span class="std std-ref">skiboot-5.1.21</span></a> (the currently maintained stable releases). We |
| do not currently expect to do any 5.8.x stable releases.</p> |
| <p>For how the skiboot stable releases work, see <a class="reference internal" href="../process/stable-skiboot-rules.html#stable-rules"><span class="std std-ref">Skiboot stable tree rules and releases</span></a> for details.</p> |
| <p>The current plan is to cut the final 5.9 by October 20th, with skiboot 5.9 |
| being for all POWER8 and POWER9 platforms in op-build v1.20 (Due October 18th). |
| This release will be targetted to early POWER9 systems.</p> |
| <p>Over <a class="reference internal" href="skiboot-5.9-rc2.html#skiboot-5-9-rc2"><span class="std std-ref">skiboot-5.9-rc2</span></a>, we have the following changes:</p> |
| <ul> |
| <li><p>Improvements to vpd device tree entries</p> |
| <p>Previously we would miss some properties</p> |
| </li> |
| <li><p>Revert “npu2: Add vendor cap for IRQ testing”</p> |
| <p>This reverts commit 9817c9e29b6fe00daa3a0e4420e69a97c90eb373 which seems to |
| break setting the PCI dev flag and the link number in the PCIe vendor |
| specific config space. This leads to the device driver attempting to |
| re-init the DL when it shouldn’t which can cause HMI’s.</p> |
| </li> |
| <li><p>hw/imc: Fix IMC Catalog load for DD2.X processors</p></li> |
| <li><p>cpu: Add OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED</p> |
| <p>Add a new CPU reinit flag, “TM Suspend Disabled”, which requests that |
| CPUs be configured so that TM (Transactional Memory) suspend mode is |
| disabled.</p> |
| <p>Currently this always fails, because skiboot has no way to query the |
| state. A future hostboot change will add a mechanism for skiboot to |
| determine the status and return an appropriate error code.</p> |
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