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   <section id="opal-bmc-interactions">
 <h1>OPAL &lt;–&gt; BMC interactions<a class="headerlink" href="#opal-bmc-interactions" title="Link to this heading">¶</a></h1>
 <p>This document provides information about some of the user-visible interactions
 that skiboot performs with the BMC.</p>
 <section id="ipmi-sensors">
 <h2>IPMI sensors<a class="headerlink" href="#ipmi-sensors" title="Link to this heading">¶</a></h2>
 <p>OPAL will interact with a few IPMI sensors during the boot process. These
 are:</p>
 <blockquote>
 <div><ul class="simple">
 <li><p>Boot Count [type 0xc3: OEM reserved]</p></li>
 <li><p>FW Boot progress [type 0x0f: System Firmware Progress]</p></li>
 </ul>
 </div></blockquote>
 <p>Boot Count: assertion type. When OPAL reaches a late stage of boot, it sets the
 boot count sensor to 0x02. This is intended to allow the BMC detect a failed
 or aborted boot, for switching to a known-good firmware image.</p>
 <p>FW Boot Progress: assertion type. During boot, skiboot will update this sensor
 to one of the IPMI-defined progress codes. The codes use by skiboot are:</p>
 <blockquote>
 <div><ul class="simple">
 <li><dl class="simple">
 <dt>PCI Resource configuration (0x01)</dt><dd><ul>
 <li><p>asserted as the PCI devices have been probed and resources allocated</p></li>
 </ul>
 </dd>
 </dl>
 </li>
 <li><dl class="simple">
 <dt>Motherboard init (0x14)</dt><dd><ul>
 <li><p>asserted as the platform-specific components have been initialised</p></li>
 </ul>
 </dd>
 </dl>
 </li>
 <li><dl class="simple">
 <dt>OS boot (0x13)</dt><dd><ul>
 <li><p>asserted after skiboot has loaded the PAYLOAD image, and is about to
 boot it.</p></li>
 </ul>
 </dd>
 </dl>
 </li>
 </ul>
 </div></blockquote>
 </section>
 <section id="chassis-control-messages">
 <h2>Chassis control messages<a class="headerlink" href="#chassis-control-messages" title="Link to this heading">¶</a></h2>
 <p>OPAL uses chassis control messages to instruct the BMC to remove power from
 the host. These messages are sent during graceful reboot and shutdown processes
 initiated by the host.</p>
 <p>For a BMC-initiated graceful power-down (or reboot), the BMC is expected to send
 an OEM-defined SEL message, using a SMS_ATN to trigger a BMC-to-host
 notification. This SEL has a type of 0xc0, and command of 0x04. The data0 field
 of the SEL indicates shutdown (0x0) or reboot (0x1).</p>
 </section>
 <section id="watchdog-support">
 <h2>Watchdog support<a class="headerlink" href="#watchdog-support" title="Link to this heading">¶</a></h2>
 <p>OPAL supports a BMC watchdog during the boot process. This will be disabled
 before entering the OS.</p>
 </section>
 <section id="real-time-clock">
 <h2>Real-time clock<a class="headerlink" href="#real-time-clock" title="Link to this heading">¶</a></h2>
 <p>On platforms where a real-time-clock is not available, skiboot may use the
 IPMI SEL Time as a real-time-clock device.</p>
 </section>
 <section id="sbe-validation">
 <h2>SBE validation<a class="headerlink" href="#sbe-validation" title="Link to this heading">¶</a></h2>
 <p>On some P8 platforms with an AMI or SMC BMC (ie. astbmc) SBE validation is done
 by a tool on the BMC. This is done to inspect the SBE and detect if a malicious
 host has written to the SBE, especially in multi-tenant
 “Bare-Metal-As-A-Service” scenarios.</p>
 <p>To complicate this the SBE validation occurs at host-runtime and reads the SBE
 SEEPROM over I2C using the FSI master which will conflict with anything the
 host may be doing at the same time. To avoid this Skiboot will pause boot until
 the validation is complete.
 If SBE validation is required the BMC will communicate this to Skiboot by
 setting an IPMI System Boot Option with OEM parameter 0x62. When this flag is
 set Skiboot will pause and wait for the validation to complete and the flag to
 be cleared. This ensures the validation completes before the execution is passed
 to Petitboot and the host operating system and any conflicts could occur. During
 this process Skiboot will print:</p>
 <div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">SBE</span> <span class="n">validation</span> <span class="n">required</span><span class="p">,</span> <span class="n">waiting</span> <span class="k">for</span> <span class="n">completion</span>
 <span class="n">System</span> <span class="n">will</span> <span class="n">be</span> <span class="n">powered</span> <span class="n">off</span> <span class="k">if</span> <span class="n">validation</span> <span class="n">fails</span>
 </pre></div>
 </div>
 <p>to the console with an update every minute until complete.</p>
 <p>Unfortunately the validation performed by the BMC leaves the SBE in a bad
 state. Once the validation is complete Skiboot will reboot to reset everything
 to a good state and normal booting can resume. No such reboot is required if
 the flag is not set and validation doesn’t occur.</p>
 </section>
 </section>


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 <li><a class="reference internal" href="#">OPAL &lt;–&gt; BMC interactions</a><ul>
 <li><a class="reference internal" href="#ipmi-sensors">IPMI sensors</a></li>
 <li><a class="reference internal" href="#chassis-control-messages">Chassis control messages</a></li>
 <li><a class="reference internal" href="#watchdog-support">Watchdog support</a></li>
 <li><a class="reference internal" href="#real-time-clock">Real-time clock</a></li>
 <li><a class="reference internal" href="#sbe-validation">SBE validation</a></li>
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	<section id="opal-bmc-interactions">
	<h1>OPAL <–> BMC interactions<a class="headerlink" href="#opal-bmc-interactions" title="Link to this heading">¶</a></h1>
	<p>This document provides information about some of the user-visible interactions
	that skiboot performs with the BMC.</p>
	<section id="ipmi-sensors">
	<h2>IPMI sensors<a class="headerlink" href="#ipmi-sensors" title="Link to this heading">¶</a></h2>
	<p>OPAL will interact with a few IPMI sensors during the boot process. These
	are:</p>
	<blockquote>
	<div><ul class="simple">
	<li><p>Boot Count [type 0xc3: OEM reserved]</p></li>
	<li><p>FW Boot progress [type 0x0f: System Firmware Progress]</p></li>
	</ul>
	</div></blockquote>
	<p>Boot Count: assertion type. When OPAL reaches a late stage of boot, it sets the
	boot count sensor to 0x02. This is intended to allow the BMC detect a failed
	or aborted boot, for switching to a known-good firmware image.</p>
	<p>FW Boot Progress: assertion type. During boot, skiboot will update this sensor
	to one of the IPMI-defined progress codes. The codes use by skiboot are:</p>
	<blockquote>
	<div><ul class="simple">
	<li><dl class="simple">
	<dt>PCI Resource configuration (0x01)</dt><dd><ul>
	<li><p>asserted as the PCI devices have been probed and resources allocated</p></li>
	</ul>
	</dd>
	</dl>
	</li>
	<li><dl class="simple">
	<dt>Motherboard init (0x14)</dt><dd><ul>
	<li><p>asserted as the platform-specific components have been initialised</p></li>
	</ul>
	</dd>
	</dl>
	</li>
	<li><dl class="simple">
	<dt>OS boot (0x13)</dt><dd><ul>
	<li><p>asserted after skiboot has loaded the PAYLOAD image, and is about to
	boot it.</p></li>
	</ul>
	</dd>
	</dl>
	</li>
	</ul>
	</div></blockquote>
	</section>
	<section id="chassis-control-messages">
	<h2>Chassis control messages<a class="headerlink" href="#chassis-control-messages" title="Link to this heading">¶</a></h2>
	<p>OPAL uses chassis control messages to instruct the BMC to remove power from
	the host. These messages are sent during graceful reboot and shutdown processes
	initiated by the host.</p>
	<p>For a BMC-initiated graceful power-down (or reboot), the BMC is expected to send
	an OEM-defined SEL message, using a SMS_ATN to trigger a BMC-to-host
	notification. This SEL has a type of 0xc0, and command of 0x04. The data0 field
	of the SEL indicates shutdown (0x0) or reboot (0x1).</p>
	</section>
	<section id="watchdog-support">
	<h2>Watchdog support<a class="headerlink" href="#watchdog-support" title="Link to this heading">¶</a></h2>
	<p>OPAL supports a BMC watchdog during the boot process. This will be disabled
	before entering the OS.</p>
	</section>
	<section id="real-time-clock">
	<h2>Real-time clock<a class="headerlink" href="#real-time-clock" title="Link to this heading">¶</a></h2>
	<p>On platforms where a real-time-clock is not available, skiboot may use the
	IPMI SEL Time as a real-time-clock device.</p>
	</section>
	<section id="sbe-validation">
	<h2>SBE validation<a class="headerlink" href="#sbe-validation" title="Link to this heading">¶</a></h2>
	<p>On some P8 platforms with an AMI or SMC BMC (ie. astbmc) SBE validation is done
	by a tool on the BMC. This is done to inspect the SBE and detect if a malicious
	host has written to the SBE, especially in multi-tenant
	“Bare-Metal-As-A-Service” scenarios.</p>
	<p>To complicate this the SBE validation occurs at host-runtime and reads the SBE
	SEEPROM over I2C using the FSI master which will conflict with anything the
	host may be doing at the same time. To avoid this Skiboot will pause boot until
	the validation is complete.
	If SBE validation is required the BMC will communicate this to Skiboot by
	setting an IPMI System Boot Option with OEM parameter 0x62. When this flag is
	set Skiboot will pause and wait for the validation to complete and the flag to
	be cleared. This ensures the validation completes before the execution is passed
	to Petitboot and the host operating system and any conflicts could occur. During
	this process Skiboot will print:</p>
	<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">SBE</span> <span class="n">validation</span> <span class="n">required</span><span class="p">,</span> <span class="n">waiting</span> <span class="k">for</span> <span class="n">completion</span>
	<span class="n">System</span> <span class="n">will</span> <span class="n">be</span> <span class="n">powered</span> <span class="n">off</span> <span class="k">if</span> <span class="n">validation</span> <span class="n">fails</span>
	</pre></div>
	</div>
	<p>to the console with an update every minute until complete.</p>
	<p>Unfortunately the validation performed by the BMC leaves the SBE in a bad
	state. Once the validation is complete Skiboot will reboot to reset everything
	to a good state and normal booting can resume. No such reboot is required if
	the flag is not set and validation doesn’t occur.</p>
	</section>
	</section>


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	<ul>
	<li><a class="reference internal" href="#">OPAL <–> BMC interactions</a><ul>
	<li><a class="reference internal" href="#ipmi-sensors">IPMI sensors</a></li>
	<li><a class="reference internal" href="#chassis-control-messages">Chassis control messages</a></li>
	<li><a class="reference internal" href="#watchdog-support">Watchdog support</a></li>
	<li><a class="reference internal" href="#real-time-clock">Real-time clock</a></li>
	<li><a class="reference internal" href="#sbe-validation">SBE validation</a></li>
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