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| <td class="headerCovTableEntryLo">0.0 %</td> |
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| <td class="headerValue">2025-06-27 16:54:26</td> |
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| <td class="headerCovTableEntryLo">0.0 %</td> |
| <td class="headerCovTableEntry">1</td> |
| <td class="headerCovTableEntry">0</td> |
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| <pre class="sourceHeading"> Branch data Line data Source code</pre> |
| <pre class="source"> |
| <span id="L1"><span class="lineNum"> 1</span> : : // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later</span> |
| <span id="L2"><span class="lineNum"> 2</span> : : /* Copyright 2013-2019 IBM Corp. */</span> |
| <span id="L3"><span class="lineNum"> 3</span> : : </span> |
| <span id="L4"><span class="lineNum"> 4</span> : : #ifndef __PCI_H</span> |
| <span id="L5"><span class="lineNum"> 5</span> : : #define __PCI_H</span> |
| <span id="L6"><span class="lineNum"> 6</span> : : </span> |
| <span id="L7"><span class="lineNum"> 7</span> : : #include <opal.h></span> |
| <span id="L8"><span class="lineNum"> 8</span> : : #include <device.h></span> |
| <span id="L9"><span class="lineNum"> 9</span> : : #include <lock.h></span> |
| <span id="L10"><span class="lineNum"> 10</span> : : #include <bitmap.h></span> |
| <span id="L11"><span class="lineNum"> 11</span> : : #include <ccan/list/list.h></span> |
| <span id="L12"><span class="lineNum"> 12</span> : : </span> |
| <span id="L13"><span class="lineNum"> 13</span> : : #define PCITRACE(_p, _bdfn, fmt, a...) \</span> |
| <span id="L14"><span class="lineNum"> 14</span> : : prlog(PR_TRACE, "PHB#%04x:%02x:%02x.%x " fmt, \</span> |
| <span id="L15"><span class="lineNum"> 15</span> : : (_p)->opal_id, \</span> |
| <span id="L16"><span class="lineNum"> 16</span> : : PCI_BUS_NUM(_bdfn), \</span> |
| <span id="L17"><span class="lineNum"> 17</span> : : PCI_DEV(_bdfn), PCI_FUNC(_bdfn), ## a)</span> |
| <span id="L18"><span class="lineNum"> 18</span> : : #define PCIDBG(_p, _bdfn, fmt, a...) \</span> |
| <span id="L19"><span class="lineNum"> 19</span> : : prlog(PR_DEBUG, "PHB#%04x:%02x:%02x.%x " fmt, \</span> |
| <span id="L20"><span class="lineNum"> 20</span> : : (_p)->opal_id, \</span> |
| <span id="L21"><span class="lineNum"> 21</span> : : PCI_BUS_NUM(_bdfn), \</span> |
| <span id="L22"><span class="lineNum"> 22</span> : : PCI_DEV(_bdfn), PCI_FUNC(_bdfn), ## a)</span> |
| <span id="L23"><span class="lineNum"> 23</span> : : #define PCINOTICE(_p, _bdfn, fmt, a...) \</span> |
| <span id="L24"><span class="lineNum"> 24</span> : : prlog(PR_NOTICE, "PHB#%04x:%02x:%02x.%x " fmt, \</span> |
| <span id="L25"><span class="lineNum"> 25</span> : : (_p)->opal_id, \</span> |
| <span id="L26"><span class="lineNum"> 26</span> : : PCI_BUS_NUM(_bdfn), \</span> |
| <span id="L27"><span class="lineNum"> 27</span> : : PCI_DEV(_bdfn), PCI_FUNC(_bdfn), ## a)</span> |
| <span id="L28"><span class="lineNum"> 28</span> : : #define PCIERR(_p, _bdfn, fmt, a...) \</span> |
| <span id="L29"><span class="lineNum"> 29</span> : : prlog(PR_ERR, "PHB#%04x:%02x:%02x.%x " fmt, \</span> |
| <span id="L30"><span class="lineNum"> 30</span> : : (_p)->opal_id, \</span> |
| <span id="L31"><span class="lineNum"> 31</span> : : PCI_BUS_NUM(_bdfn), \</span> |
| <span id="L32"><span class="lineNum"> 32</span> : : PCI_DEV(_bdfn), PCI_FUNC(_bdfn), ## a)</span> |
| <span id="L33"><span class="lineNum"> 33</span> : : </span> |
| <span id="L34"><span class="lineNum"> 34</span> : : struct pci_device;</span> |
| <span id="L35"><span class="lineNum"> 35</span> : : struct pci_cfg_reg_filter;</span> |
| <span id="L36"><span class="lineNum"> 36</span> : : </span> |
| <span id="L37"><span class="lineNum"> 37</span> : : typedef int64_t (*pci_cfg_reg_func)(void *dev,</span> |
| <span id="L38"><span class="lineNum"> 38</span> : : struct pci_cfg_reg_filter *pcrf,</span> |
| <span id="L39"><span class="lineNum"> 39</span> : : uint32_t offset, uint32_t len,</span> |
| <span id="L40"><span class="lineNum"> 40</span> : : uint32_t *data, bool write);</span> |
| <span id="L41"><span class="lineNum"> 41</span> : : typedef void (*pci_cap_free_data_func)(void *data);</span> |
| <span id="L42"><span class="lineNum"> 42</span> : : struct pci_cfg_reg_filter {</span> |
| <span id="L43"><span class="lineNum"> 43</span> : : uint32_t flags;</span> |
| <span id="L44"><span class="lineNum"> 44</span> : : #define PCI_REG_FLAG_READ 0x1</span> |
| <span id="L45"><span class="lineNum"> 45</span> : : #define PCI_REG_FLAG_WRITE 0x2</span> |
| <span id="L46"><span class="lineNum"> 46</span> : : #define PCI_REG_FLAG_MASK 0x3</span> |
| <span id="L47"><span class="lineNum"> 47</span> : : uint32_t start;</span> |
| <span id="L48"><span class="lineNum"> 48</span> : : uint32_t len;</span> |
| <span id="L49"><span class="lineNum"> 49</span> : : uint8_t *data;</span> |
| <span id="L50"><span class="lineNum"> 50</span> : : pci_cfg_reg_func func;</span> |
| <span id="L51"><span class="lineNum"> 51</span> : : struct list_node link;</span> |
| <span id="L52"><span class="lineNum"> 52</span> : : };</span> |
| <span id="L53"><span class="lineNum"> 53</span> : : </span> |
| <span id="L54"><span class="lineNum"> 54</span> : : /*</span> |
| <span id="L55"><span class="lineNum"> 55</span> : : * While this might not be necessary in the long run, the existing</span> |
| <span id="L56"><span class="lineNum"> 56</span> : : * Linux kernels expect us to provide a device-tree that contains</span> |
| <span id="L57"><span class="lineNum"> 57</span> : : * a representation of all PCI devices below the host bridge. Thus</span> |
| <span id="L58"><span class="lineNum"> 58</span> : : * we need to perform a bus scan. We don't need to assign MMIO/IO</span> |
| <span id="L59"><span class="lineNum"> 59</span> : : * resources, but we do need to assign bus numbers in a way that</span> |
| <span id="L60"><span class="lineNum"> 60</span> : : * is going to be compatible with the HW constraints for PE filtering</span> |
| <span id="L61"><span class="lineNum"> 61</span> : : * that is naturally aligned power of twos for ranges below a bridge.</span> |
| <span id="L62"><span class="lineNum"> 62</span> : : *</span> |
| <span id="L63"><span class="lineNum"> 63</span> : : * Thus the structure pci_device is used for the tracking of the</span> |
| <span id="L64"><span class="lineNum"> 64</span> : : * detected devices and the later generation of the device-tree.</span> |
| <span id="L65"><span class="lineNum"> 65</span> : : *</span> |
| <span id="L66"><span class="lineNum"> 66</span> : : * We do not keep a separate structure for a bus, however a device</span> |
| <span id="L67"><span class="lineNum"> 67</span> : : * can have children in which case a device is a bridge.</span> |
| <span id="L68"><span class="lineNum"> 68</span> : : *</span> |
| <span id="L69"><span class="lineNum"> 69</span> : : * Because this is likely to change, we avoid putting too much</span> |
| <span id="L70"><span class="lineNum"> 70</span> : : * information in that structure nor relying on it for anything</span> |
| <span id="L71"><span class="lineNum"> 71</span> : : * else but the construction of the flat device-tree.</span> |
| <span id="L72"><span class="lineNum"> 72</span> : : */</span> |
| <span id="L73"><span class="lineNum"> 73</span> : : struct pci_device {</span> |
| <span id="L74"><span class="lineNum"> 74</span> : : uint16_t bdfn;</span> |
| <span id="L75"><span class="lineNum"> 75</span> : : bool is_bridge;</span> |
| <span id="L76"><span class="lineNum"> 76</span> : : bool is_multifunction;</span> |
| <span id="L77"><span class="lineNum"> 77</span> : : bool is_vf;</span> |
| <span id="L78"><span class="lineNum"> 78</span> : : uint8_t dev_type; /* PCIE */</span> |
| <span id="L79"><span class="lineNum"> 79</span> : : uint8_t primary_bus;</span> |
| <span id="L80"><span class="lineNum"> 80</span> : : uint8_t secondary_bus;</span> |
| <span id="L81"><span class="lineNum"> 81</span> : : uint8_t subordinate_bus;</span> |
| <span id="L82"><span class="lineNum"> 82</span> : : uint32_t scan_map;</span> |
| <span id="L83"><span class="lineNum"> 83</span> : : </span> |
| <span id="L84"><span class="lineNum"> 84</span> : : uint32_t vdid;</span> |
| <span id="L85"><span class="lineNum"> 85</span> : : uint32_t sub_vdid;</span> |
| <span id="L86"><span class="lineNum"> 86</span> : : #define PCI_VENDOR_ID(x) ((x) & 0xFFFF)</span> |
| <span id="L87"><span class="lineNum"> 87</span> : : #define PCI_DEVICE_ID(x) ((x) >> 16)</span> |
| <span id="L88"><span class="lineNum"> 88</span> : : uint32_t class;</span> |
| <span id="L89"><span class="lineNum"> 89</span> : : uint64_t cap_list;</span> |
| <span id="L90"><span class="lineNum"> 90</span> : : struct {</span> |
| <span id="L91"><span class="lineNum"> 91</span> : : uint32_t pos;</span> |
| <span id="L92"><span class="lineNum"> 92</span> : : void *data;</span> |
| <span id="L93"><span class="lineNum"> 93</span> : : pci_cap_free_data_func free_func;</span> |
| <span id="L94"><span class="lineNum"> 94</span> : : } cap[64];</span> |
| <span id="L95"><span class="lineNum"> 95</span> : : uint32_t mps; /* Max payload size capability */</span> |
| <span id="L96"><span class="lineNum"> 96</span> : : </span> |
| <span id="L97"><span class="lineNum"> 97</span> : : uint32_t pcrf_start;</span> |
| <span id="L98"><span class="lineNum"> 98</span> : : uint32_t pcrf_end;</span> |
| <span id="L99"><span class="lineNum"> 99</span> : : struct list_head pcrf;</span> |
| <span id="L100"><span class="lineNum"> 100</span> : : </span> |
| <span id="L101"><span class="lineNum"> 101</span> : : /*</span> |
| <span id="L102"><span class="lineNum"> 102</span> : : * Relaxed ordering is a feature which allows PCIe devices accessing GPU</span> |
| <span id="L103"><span class="lineNum"> 103</span> : : * memory to bypass the normal PCIe ordering rules to increase</span> |
| <span id="L104"><span class="lineNum"> 104</span> : : * performance. It is enabled on a per-PEC basis so every device on a</span> |
| <span id="L105"><span class="lineNum"> 105</span> : : * PEC must support it before we can enable it.</span> |
| <span id="L106"><span class="lineNum"> 106</span> : : */</span> |
| <span id="L107"><span class="lineNum"> 107</span> : : bool allow_relaxed_ordering;</span> |
| <span id="L108"><span class="lineNum"> 108</span> : : </span> |
| <span id="L109"><span class="lineNum"> 109</span> : : struct dt_node *dn;</span> |
| <span id="L110"><span class="lineNum"> 110</span> : : struct pci_slot *slot;</span> |
| <span id="L111"><span class="lineNum"> 111</span> : : struct pci_device *parent;</span> |
| <span id="L112"><span class="lineNum"> 112</span> : : struct phb *phb;</span> |
| <span id="L113"><span class="lineNum"> 113</span> : : struct list_head children;</span> |
| <span id="L114"><span class="lineNum"> 114</span> : : struct list_node link;</span> |
| <span id="L115"><span class="lineNum"> 115</span> : : };</span> |
| <span id="L116"><span class="lineNum"> 116</span> : : </span> |
| <span id="L117"><span class="lineNum"> 117</span> : : static inline void pci_set_cap(struct pci_device *pd, int id, int pos,</span> |
| <span id="L118"><span class="lineNum"> 118</span> : : void *data, pci_cap_free_data_func free_func,</span> |
| <span id="L119"><span class="lineNum"> 119</span> : : bool ext)</span> |
| <span id="L120"><span class="lineNum"> 120</span> : : {</span> |
| <span id="L121"><span class="lineNum"> 121</span> : : if (!ext) {</span> |
| <span id="L122"><span class="lineNum"> 122</span> : : pd->cap_list |= (0x1ul << id);</span> |
| <span id="L123"><span class="lineNum"> 123</span> : : pd->cap[id].pos = pos;</span> |
| <span id="L124"><span class="lineNum"> 124</span> : : pd->cap[id].data = data;</span> |
| <span id="L125"><span class="lineNum"> 125</span> : : pd->cap[id].free_func = free_func;</span> |
| <span id="L126"><span class="lineNum"> 126</span> : : } else {</span> |
| <span id="L127"><span class="lineNum"> 127</span> : : pd->cap_list |= (0x1ul << (id + 32));</span> |
| <span id="L128"><span class="lineNum"> 128</span> : : pd->cap[id + 32].pos = pos;</span> |
| <span id="L129"><span class="lineNum"> 129</span> : : pd->cap[id + 32].data = data;</span> |
| <span id="L130"><span class="lineNum"> 130</span> : : pd->cap[id + 32].free_func = free_func;</span> |
| <span id="L131"><span class="lineNum"> 131</span> : : }</span> |
| <span id="L132"><span class="lineNum"> 132</span> : : }</span> |
| <span id="L133"><span class="lineNum"> 133</span> : : </span> |
| <span id="L134"><span class="lineNum"> 134</span> : : static inline bool pci_has_cap(struct pci_device *pd,</span> |
| <span id="L135"><span class="lineNum"> 135</span> : : int id, bool ext)</span> |
| <span id="L136"><span class="lineNum"> 136</span> : : {</span> |
| <span id="L137"><span class="lineNum"> 137</span> : : if (!ext)</span> |
| <span id="L138"><span class="lineNum"> 138</span> : : return !!(pd->cap_list & (0x1ul << id));</span> |
| <span id="L139"><span class="lineNum"> 139</span> : : else</span> |
| <span id="L140"><span class="lineNum"> 140</span> : : return !!(pd->cap_list & (0x1ul << (id + 32)));</span> |
| <span id="L141"><span class="lineNum"> 141</span> : : }</span> |
| <span id="L142"><span class="lineNum"> 142</span> : : </span> |
| <span id="L143"><span class="lineNum"> 143</span> : : static inline int pci_cap(struct pci_device *pd,</span> |
| <span id="L144"><span class="lineNum"> 144</span> : : int id, bool ext)</span> |
| <span id="L145"><span class="lineNum"> 145</span> : : {</span> |
| <span id="L146"><span class="lineNum"> 146</span> : : if (!ext)</span> |
| <span id="L147"><span class="lineNum"> 147</span> : : return pd->cap[id].pos;</span> |
| <span id="L148"><span class="lineNum"> 148</span> : : else</span> |
| <span id="L149"><span class="lineNum"> 149</span> : : return pd->cap[id + 32].pos;</span> |
| <span id="L150"><span class="lineNum"> 150</span> : : }</span> |
| <span id="L151"><span class="lineNum"> 151</span> : : </span> |
| <span id="L152"><span class="lineNum"> 152</span> : : static inline void *pci_cap_data(struct pci_device *pd, int id, bool ext)</span> |
| <span id="L153"><span class="lineNum"> 153</span> : : {</span> |
| <span id="L154"><span class="lineNum"> 154</span> : : if (!ext)</span> |
| <span id="L155"><span class="lineNum"> 155</span> : : return pd->cap[id].data;</span> |
| <span id="L156"><span class="lineNum"> 156</span> : : else</span> |
| <span id="L157"><span class="lineNum"> 157</span> : : return pd->cap[id + 32].data;</span> |
| <span id="L158"><span class="lineNum"> 158</span> : : }</span> |
| <span id="L159"><span class="lineNum"> 159</span> : : </span> |
| <span id="L160"><span class="lineNum"> 160</span> : : /*</span> |
| <span id="L161"><span class="lineNum"> 161</span> : : * When generating the device-tree, we need to keep track of</span> |
| <span id="L162"><span class="lineNum"> 162</span> : : * the LSI mapping & swizzle it. This state structure is</span> |
| <span id="L163"><span class="lineNum"> 163</span> : : * passed by the PHB to pci_add_nodes() and will be used</span> |
| <span id="L164"><span class="lineNum"> 164</span> : : * internally.</span> |
| <span id="L165"><span class="lineNum"> 165</span> : : *</span> |
| <span id="L166"><span class="lineNum"> 166</span> : : * We assume that the interrupt parent (PIC) #address-cells</span> |
| <span id="L167"><span class="lineNum"> 167</span> : : * is 0 and #interrupt-cells has a max value of 2.</span> |
| <span id="L168"><span class="lineNum"> 168</span> : : */</span> |
| <span id="L169"><span class="lineNum"> 169</span> : : struct pci_lsi_state {</span> |
| <span id="L170"><span class="lineNum"> 170</span> : : #define MAX_INT_SIZE 2</span> |
| <span id="L171"><span class="lineNum"> 171</span> : : uint32_t int_size; /* #cells */</span> |
| <span id="L172"><span class="lineNum"> 172</span> : : uint32_t int_val[4][MAX_INT_SIZE]; /* INTA...INTD */</span> |
| <span id="L173"><span class="lineNum"> 173</span> : : uint32_t int_parent[4];</span> |
| <span id="L174"><span class="lineNum"> 174</span> : : };</span> |
| <span id="L175"><span class="lineNum"> 175</span> : : </span> |
| <span id="L176"><span class="lineNum"> 176</span> : : /*</span> |
| <span id="L177"><span class="lineNum"> 177</span> : : * NOTE: All PCI functions return negative OPAL error codes</span> |
| <span id="L178"><span class="lineNum"> 178</span> : : *</span> |
| <span id="L179"><span class="lineNum"> 179</span> : : * In addition, some functions may return a positive timeout</span> |
| <span id="L180"><span class="lineNum"> 180</span> : : * value or some other state information, see the description</span> |
| <span id="L181"><span class="lineNum"> 181</span> : : * of individual functions. If nothing is specified, it's</span> |
| <span id="L182"><span class="lineNum"> 182</span> : : * just an error code or 0 (success).</span> |
| <span id="L183"><span class="lineNum"> 183</span> : : *</span> |
| <span id="L184"><span class="lineNum"> 184</span> : : * Functions that operate asynchronously will return a positive</span> |
| <span id="L185"><span class="lineNum"> 185</span> : : * delay value and will require the ->poll() op to be called after</span> |
| <span id="L186"><span class="lineNum"> 186</span> : : * that delay. ->poll() will then return success, a negative error</span> |
| <span id="L187"><span class="lineNum"> 187</span> : : * code, or another delay.</span> |
| <span id="L188"><span class="lineNum"> 188</span> : : *</span> |
| <span id="L189"><span class="lineNum"> 189</span> : : * Note: If an asynchronous function returns 0, it has completed</span> |
| <span id="L190"><span class="lineNum"> 190</span> : : * successfully and does not require a call to ->poll(). Similarly</span> |
| <span id="L191"><span class="lineNum"> 191</span> : : * if ->poll() is called while no operation is in progress, it will</span> |
| <span id="L192"><span class="lineNum"> 192</span> : : * simply return 0 (success)</span> |
| <span id="L193"><span class="lineNum"> 193</span> : : *</span> |
| <span id="L194"><span class="lineNum"> 194</span> : : * Note that all functions except ->lock() itself assume that the</span> |
| <span id="L195"><span class="lineNum"> 195</span> : : * caller is holding the PHB lock.</span> |
| <span id="L196"><span class="lineNum"> 196</span> : : *</span> |
| <span id="L197"><span class="lineNum"> 197</span> : : * TODO: Add more interfaces to control things like link width</span> |
| <span id="L198"><span class="lineNum"> 198</span> : : * reduction for power savings etc...</span> |
| <span id="L199"><span class="lineNum"> 199</span> : : */</span> |
| <span id="L200"><span class="lineNum"> 200</span> : : </span> |
| <span id="L201"><span class="lineNum"> 201</span> : : struct phb;</span> |
| <span id="L202"><span class="lineNum"> 202</span> : : extern int last_phb_id;</span> |
| <span id="L203"><span class="lineNum"> 203</span> : : </span> |
| <span id="L204"><span class="lineNum"> 204</span> : : struct phb_ops {</span> |
| <span id="L205"><span class="lineNum"> 205</span> : : /*</span> |
| <span id="L206"><span class="lineNum"> 206</span> : : * Config space ops</span> |
| <span id="L207"><span class="lineNum"> 207</span> : : */</span> |
| <span id="L208"><span class="lineNum"> 208</span> : : int64_t (*cfg_read8)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L209"><span class="lineNum"> 209</span> : : uint32_t offset, uint8_t *data);</span> |
| <span id="L210"><span class="lineNum"> 210</span> : : int64_t (*cfg_read16)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L211"><span class="lineNum"> 211</span> : : uint32_t offset, uint16_t *data);</span> |
| <span id="L212"><span class="lineNum"> 212</span> : : int64_t (*cfg_read32)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L213"><span class="lineNum"> 213</span> : : uint32_t offset, uint32_t *data);</span> |
| <span id="L214"><span class="lineNum"> 214</span> : : int64_t (*cfg_write8)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L215"><span class="lineNum"> 215</span> : : uint32_t offset, uint8_t data);</span> |
| <span id="L216"><span class="lineNum"> 216</span> : : int64_t (*cfg_write16)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L217"><span class="lineNum"> 217</span> : : uint32_t offset, uint16_t data);</span> |
| <span id="L218"><span class="lineNum"> 218</span> : : int64_t (*cfg_write32)(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L219"><span class="lineNum"> 219</span> : : uint32_t offset, uint32_t data);</span> |
| <span id="L220"><span class="lineNum"> 220</span> : : </span> |
| <span id="L221"><span class="lineNum"> 221</span> : : int64_t (*get_reserved_pe_number)(struct phb *phb);</span> |
| <span id="L222"><span class="lineNum"> 222</span> : : </span> |
| <span id="L223"><span class="lineNum"> 223</span> : : /*</span> |
| <span id="L224"><span class="lineNum"> 224</span> : : * Device init method is called after a device has been detected</span> |
| <span id="L225"><span class="lineNum"> 225</span> : : * and before probing further. It can alter things like scan_map</span> |
| <span id="L226"><span class="lineNum"> 226</span> : : * for bridge ports etc...</span> |
| <span id="L227"><span class="lineNum"> 227</span> : : */</span> |
| <span id="L228"><span class="lineNum"> 228</span> : : int (*device_init)(struct phb *phb, struct pci_device *device,</span> |
| <span id="L229"><span class="lineNum"> 229</span> : : void *data);</span> |
| <span id="L230"><span class="lineNum"> 230</span> : : void (*device_remove)(struct phb *phb, struct pci_device *pd);</span> |
| <span id="L231"><span class="lineNum"> 231</span> : : </span> |
| <span id="L232"><span class="lineNum"> 232</span> : : /* PHB final fixup is called after PCI probing is completed */</span> |
| <span id="L233"><span class="lineNum"> 233</span> : : void (*phb_final_fixup)(struct phb *phb);</span> |
| <span id="L234"><span class="lineNum"> 234</span> : : </span> |
| <span id="L235"><span class="lineNum"> 235</span> : : /*</span> |
| <span id="L236"><span class="lineNum"> 236</span> : : * EEH methods</span> |
| <span id="L237"><span class="lineNum"> 237</span> : : *</span> |
| <span id="L238"><span class="lineNum"> 238</span> : : * The various arguments are identical to the corresponding</span> |
| <span id="L239"><span class="lineNum"> 239</span> : : * OPAL functions</span> |
| <span id="L240"><span class="lineNum"> 240</span> : : */</span> |
| <span id="L241"><span class="lineNum"> 241</span> : : int64_t (*eeh_freeze_status)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L242"><span class="lineNum"> 242</span> : : uint8_t *freeze_state,</span> |
| <span id="L243"><span class="lineNum"> 243</span> : : uint16_t *pci_error_type,</span> |
| <span id="L244"><span class="lineNum"> 244</span> : : uint16_t *severity);</span> |
| <span id="L245"><span class="lineNum"> 245</span> : : int64_t (*eeh_freeze_clear)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L246"><span class="lineNum"> 246</span> : : uint64_t eeh_action_token);</span> |
| <span id="L247"><span class="lineNum"> 247</span> : : int64_t (*eeh_freeze_set)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L248"><span class="lineNum"> 248</span> : : uint64_t eeh_action_token);</span> |
| <span id="L249"><span class="lineNum"> 249</span> : : int64_t (*err_inject)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L250"><span class="lineNum"> 250</span> : : uint32_t type, uint32_t func, uint64_t addr,</span> |
| <span id="L251"><span class="lineNum"> 251</span> : : uint64_t mask);</span> |
| <span id="L252"><span class="lineNum"> 252</span> : : int64_t (*get_diag_data2)(struct phb *phb, void *diag_buffer,</span> |
| <span id="L253"><span class="lineNum"> 253</span> : : uint64_t diag_buffer_len);</span> |
| <span id="L254"><span class="lineNum"> 254</span> : : int64_t (*next_error)(struct phb *phb, uint64_t *first_frozen_pe,</span> |
| <span id="L255"><span class="lineNum"> 255</span> : : uint16_t *pci_error_type, uint16_t *severity);</span> |
| <span id="L256"><span class="lineNum"> 256</span> : : </span> |
| <span id="L257"><span class="lineNum"> 257</span> : : /*</span> |
| <span id="L258"><span class="lineNum"> 258</span> : : * Other IODA methods</span> |
| <span id="L259"><span class="lineNum"> 259</span> : : *</span> |
| <span id="L260"><span class="lineNum"> 260</span> : : * The various arguments are identical to the corresponding</span> |
| <span id="L261"><span class="lineNum"> 261</span> : : * OPAL functions</span> |
| <span id="L262"><span class="lineNum"> 262</span> : : */</span> |
| <span id="L263"><span class="lineNum"> 263</span> : : int64_t (*pci_reinit)(struct phb *phb, uint64_t scope, uint64_t data);</span> |
| <span id="L264"><span class="lineNum"> 264</span> : : int64_t (*phb_mmio_enable)(struct phb *phb, uint16_t window_type,</span> |
| <span id="L265"><span class="lineNum"> 265</span> : : uint16_t window_num, uint16_t enable);</span> |
| <span id="L266"><span class="lineNum"> 266</span> : : </span> |
| <span id="L267"><span class="lineNum"> 267</span> : : int64_t (*set_phb_mem_window)(struct phb *phb, uint16_t window_type,</span> |
| <span id="L268"><span class="lineNum"> 268</span> : : uint16_t window_num, uint64_t addr,</span> |
| <span id="L269"><span class="lineNum"> 269</span> : : uint64_t pci_addr, uint64_t size);</span> |
| <span id="L270"><span class="lineNum"> 270</span> : : </span> |
| <span id="L271"><span class="lineNum"> 271</span> : : int64_t (*map_pe_mmio_window)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L272"><span class="lineNum"> 272</span> : : uint16_t window_type, uint16_t window_num,</span> |
| <span id="L273"><span class="lineNum"> 273</span> : : uint16_t segment_num);</span> |
| <span id="L274"><span class="lineNum"> 274</span> : : </span> |
| <span id="L275"><span class="lineNum"> 275</span> : : int64_t (*set_pe)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L276"><span class="lineNum"> 276</span> : : uint64_t bus_dev_func, uint8_t bus_compare,</span> |
| <span id="L277"><span class="lineNum"> 277</span> : : uint8_t dev_compare, uint8_t func_compare,</span> |
| <span id="L278"><span class="lineNum"> 278</span> : : uint8_t pe_action);</span> |
| <span id="L279"><span class="lineNum"> 279</span> : : </span> |
| <span id="L280"><span class="lineNum"> 280</span> : : int64_t (*set_peltv)(struct phb *phb, uint32_t parent_pe,</span> |
| <span id="L281"><span class="lineNum"> 281</span> : : uint32_t child_pe, uint8_t state);</span> |
| <span id="L282"><span class="lineNum"> 282</span> : : </span> |
| <span id="L283"><span class="lineNum"> 283</span> : : int64_t (*map_pe_dma_window)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L284"><span class="lineNum"> 284</span> : : uint16_t window_id, uint16_t tce_levels,</span> |
| <span id="L285"><span class="lineNum"> 285</span> : : uint64_t tce_table_addr,</span> |
| <span id="L286"><span class="lineNum"> 286</span> : : uint64_t tce_table_size,</span> |
| <span id="L287"><span class="lineNum"> 287</span> : : uint64_t tce_page_size);</span> |
| <span id="L288"><span class="lineNum"> 288</span> : : </span> |
| <span id="L289"><span class="lineNum"> 289</span> : : int64_t (*map_pe_dma_window_real)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L290"><span class="lineNum"> 290</span> : : uint16_t dma_window_number,</span> |
| <span id="L291"><span class="lineNum"> 291</span> : : uint64_t pci_start_addr,</span> |
| <span id="L292"><span class="lineNum"> 292</span> : : uint64_t pci_mem_size);</span> |
| <span id="L293"><span class="lineNum"> 293</span> : : </span> |
| <span id="L294"><span class="lineNum"> 294</span> : : int64_t (*set_option)(struct phb *phb, enum OpalPhbOption opt,</span> |
| <span id="L295"><span class="lineNum"> 295</span> : : uint64_t setting);</span> |
| <span id="L296"><span class="lineNum"> 296</span> : : int64_t (*get_option)(struct phb *phb, enum OpalPhbOption opt,</span> |
| <span id="L297"><span class="lineNum"> 297</span> : : __be64 *setting);</span> |
| <span id="L298"><span class="lineNum"> 298</span> : : </span> |
| <span id="L299"><span class="lineNum"> 299</span> : : int64_t (*set_xive_pe)(struct phb *phb, uint64_t pe_number,</span> |
| <span id="L300"><span class="lineNum"> 300</span> : : uint32_t xive_num);</span> |
| <span id="L301"><span class="lineNum"> 301</span> : : </span> |
| <span id="L302"><span class="lineNum"> 302</span> : : int64_t (*get_msi_32)(struct phb *phb, uint64_t mve_number,</span> |
| <span id="L303"><span class="lineNum"> 303</span> : : uint32_t xive_num, uint8_t msi_range,</span> |
| <span id="L304"><span class="lineNum"> 304</span> : : uint32_t *msi_address, uint32_t *message_data);</span> |
| <span id="L305"><span class="lineNum"> 305</span> : : </span> |
| <span id="L306"><span class="lineNum"> 306</span> : : int64_t (*get_msi_64)(struct phb *phb, uint64_t mve_number,</span> |
| <span id="L307"><span class="lineNum"> 307</span> : : uint32_t xive_num, uint8_t msi_range,</span> |
| <span id="L308"><span class="lineNum"> 308</span> : : uint64_t *msi_address, uint32_t *message_data);</span> |
| <span id="L309"><span class="lineNum"> 309</span> : : </span> |
| <span id="L310"><span class="lineNum"> 310</span> : : int64_t (*ioda_reset)(struct phb *phb, bool purge);</span> |
| <span id="L311"><span class="lineNum"> 311</span> : : </span> |
| <span id="L312"><span class="lineNum"> 312</span> : : int64_t (*papr_errinjct_reset)(struct phb *phb);</span> |
| <span id="L313"><span class="lineNum"> 313</span> : : </span> |
| <span id="L314"><span class="lineNum"> 314</span> : : /*</span> |
| <span id="L315"><span class="lineNum"> 315</span> : : * IODA2 PCI interfaces</span> |
| <span id="L316"><span class="lineNum"> 316</span> : : */</span> |
| <span id="L317"><span class="lineNum"> 317</span> : : int64_t (*pci_msi_eoi)(struct phb *phb, uint32_t hwirq);</span> |
| <span id="L318"><span class="lineNum"> 318</span> : : </span> |
| <span id="L319"><span class="lineNum"> 319</span> : : /* TCE Kill abstraction */</span> |
| <span id="L320"><span class="lineNum"> 320</span> : : int64_t (*tce_kill)(struct phb *phb, uint32_t kill_type,</span> |
| <span id="L321"><span class="lineNum"> 321</span> : : uint64_t pe_number, uint32_t tce_size,</span> |
| <span id="L322"><span class="lineNum"> 322</span> : : uint64_t dma_addr, uint32_t npages);</span> |
| <span id="L323"><span class="lineNum"> 323</span> : : </span> |
| <span id="L324"><span class="lineNum"> 324</span> : : /* Put phb in capi mode or pcie mode */</span> |
| <span id="L325"><span class="lineNum"> 325</span> : : int64_t (*set_capi_mode)(struct phb *phb, uint64_t mode,</span> |
| <span id="L326"><span class="lineNum"> 326</span> : : uint64_t pe_number);</span> |
| <span id="L327"><span class="lineNum"> 327</span> : : </span> |
| <span id="L328"><span class="lineNum"> 328</span> : : int64_t (*set_capp_recovery)(struct phb *phb);</span> |
| <span id="L329"><span class="lineNum"> 329</span> : : </span> |
| <span id="L330"><span class="lineNum"> 330</span> : : /* PCI peer-to-peer setup */</span> |
| <span id="L331"><span class="lineNum"> 331</span> : : void (*set_p2p)(struct phb *phb, uint64_t mode, uint64_t flags,</span> |
| <span id="L332"><span class="lineNum"> 332</span> : : uint16_t pe_number);</span> |
| <span id="L333"><span class="lineNum"> 333</span> : : </span> |
| <span id="L334"><span class="lineNum"> 334</span> : : /* Get/set PBCQ Tunnel BAR register */</span> |
| <span id="L335"><span class="lineNum"> 335</span> : : void (*get_tunnel_bar)(struct phb *phb, uint64_t *addr);</span> |
| <span id="L336"><span class="lineNum"> 336</span> : : int64_t (*set_tunnel_bar)(struct phb *phb, uint64_t addr);</span> |
| <span id="L337"><span class="lineNum"> 337</span> : : };</span> |
| <span id="L338"><span class="lineNum"> 338</span> : : </span> |
| <span id="L339"><span class="lineNum"> 339</span> : : enum phb_type {</span> |
| <span id="L340"><span class="lineNum"> 340</span> : : phb_type_pci,</span> |
| <span id="L341"><span class="lineNum"> 341</span> : : phb_type_pcix_v1,</span> |
| <span id="L342"><span class="lineNum"> 342</span> : : phb_type_pcix_v2,</span> |
| <span id="L343"><span class="lineNum"> 343</span> : : phb_type_pcie_v1,</span> |
| <span id="L344"><span class="lineNum"> 344</span> : : phb_type_pcie_v2,</span> |
| <span id="L345"><span class="lineNum"> 345</span> : : phb_type_pcie_v3,</span> |
| <span id="L346"><span class="lineNum"> 346</span> : : phb_type_pcie_v4,</span> |
| <span id="L347"><span class="lineNum"> 347</span> : : phb_type_npu_v2,</span> |
| <span id="L348"><span class="lineNum"> 348</span> : : phb_type_npu_v2_opencapi,</span> |
| <span id="L349"><span class="lineNum"> 349</span> : : phb_type_pau_opencapi,</span> |
| <span id="L350"><span class="lineNum"> 350</span> : : };</span> |
| <span id="L351"><span class="lineNum"> 351</span> : : </span> |
| <span id="L352"><span class="lineNum"> 352</span> : : /* Generic PCI NVRAM flags */</span> |
| <span id="L353"><span class="lineNum"> 353</span> : : extern bool verbose_eeh;</span> |
| <span id="L354"><span class="lineNum"> 354</span> : : extern bool pci_tracing;</span> |
| <span id="L355"><span class="lineNum"> 355</span> : : </span> |
| <span id="L356"><span class="lineNum"> 356</span> : : void pci_nvram_init(void);</span> |
| <span id="L357"><span class="lineNum"> 357</span> : : </span> |
| <span id="L358"><span class="lineNum"> 358</span> : : struct phb {</span> |
| <span id="L359"><span class="lineNum"> 359</span> : : struct dt_node *dt_node;</span> |
| <span id="L360"><span class="lineNum"> 360</span> : : int opal_id;</span> |
| <span id="L361"><span class="lineNum"> 361</span> : : uint32_t scan_map;</span> |
| <span id="L362"><span class="lineNum"> 362</span> : : enum phb_type phb_type;</span> |
| <span id="L363"><span class="lineNum"> 363</span> : : struct lock lock;</span> |
| <span id="L364"><span class="lineNum"> 364</span> : : struct list_head devices;</span> |
| <span id="L365"><span class="lineNum"> 365</span> : : struct list_head virt_devices;</span> |
| <span id="L366"><span class="lineNum"> 366</span> : : const struct phb_ops *ops;</span> |
| <span id="L367"><span class="lineNum"> 367</span> : : struct pci_lsi_state lstate;</span> |
| <span id="L368"><span class="lineNum"> 368</span> : : uint32_t mps;</span> |
| <span id="L369"><span class="lineNum"> 369</span> : : bitmap_t *filter_map;</span> |
| <span id="L370"><span class="lineNum"> 370</span> : : </span> |
| <span id="L371"><span class="lineNum"> 371</span> : : /* PCI-X only slot info, for PCI-E this is in the RC bridge */</span> |
| <span id="L372"><span class="lineNum"> 372</span> : : struct pci_slot *slot;</span> |
| <span id="L373"><span class="lineNum"> 373</span> : : </span> |
| <span id="L374"><span class="lineNum"> 374</span> : : /* Base location code used to generate the children one */</span> |
| <span id="L375"><span class="lineNum"> 375</span> : : const char *base_loc_code;</span> |
| <span id="L376"><span class="lineNum"> 376</span> : : </span> |
| <span id="L377"><span class="lineNum"> 377</span> : : /* Additional data the platform might need to attach */</span> |
| <span id="L378"><span class="lineNum"> 378</span> : : void *platform_data;</span> |
| <span id="L379"><span class="lineNum"> 379</span> : : };</span> |
| <span id="L380"><span class="lineNum"> 380</span> : : </span> |
| <span id="L381"><span class="lineNum"> 381</span> : : static inline void phb_lock(struct phb *phb)</span> |
| <span id="L382"><span class="lineNum"> 382</span> : : {</span> |
| <span id="L383"><span class="lineNum"> 383</span> : : lock(&phb->lock);</span> |
| <span id="L384"><span class="lineNum"> 384</span> : : }</span> |
| <span id="L385"><span class="lineNum"> 385</span> : : </span> |
| <span id="L386"><span class="lineNum"> 386</span> : : static inline bool phb_try_lock(struct phb *phb)</span> |
| <span id="L387"><span class="lineNum"> 387</span> : : {</span> |
| <span id="L388"><span class="lineNum"> 388</span> : : return try_lock(&phb->lock);</span> |
| <span id="L389"><span class="lineNum"> 389</span> : : }</span> |
| <span id="L390"><span class="lineNum"> 390</span> : : </span> |
| <span id="L391"><span class="lineNum"> 391</span> : : static inline void phb_unlock(struct phb *phb)</span> |
| <span id="L392"><span class="lineNum"> 392</span> : : {</span> |
| <span id="L393"><span class="lineNum"> 393</span> : : unlock(&phb->lock);</span> |
| <span id="L394"><span class="lineNum"> 394</span> : : }</span> |
| <span id="L395"><span class="lineNum"> 395</span> : : </span> |
| <span id="L396"><span class="lineNum"> 396</span> : : bool pci_check_clear_freeze(struct phb *phb);</span> |
| <span id="L397"><span class="lineNum"> 397</span> : : </span> |
| <span id="L398"><span class="lineNum"> 398</span> : : /* Config space ops wrappers */</span> |
| <span id="L399"><span class="lineNum"> 399</span> :<span class="tlaUNC tlaBgUNC"> 0 : static inline int64_t pci_cfg_read8(struct phb *phb, uint32_t bdfn,</span></span> |
| <span id="L400"><span class="lineNum"> 400</span> : : uint32_t offset, uint8_t *data)</span> |
| <span id="L401"><span class="lineNum"> 401</span> : : {</span> |
| <span id="L402"><span class="lineNum"> 402</span> :<span class="tlaUNC"> 0 : return phb->ops->cfg_read8(phb, bdfn, offset, data);</span></span> |
| <span id="L403"><span class="lineNum"> 403</span> : : }</span> |
| <span id="L404"><span class="lineNum"> 404</span> : : </span> |
| <span id="L405"><span class="lineNum"> 405</span> : : static inline int64_t pci_cfg_read16(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L406"><span class="lineNum"> 406</span> : : uint32_t offset, uint16_t *data)</span> |
| <span id="L407"><span class="lineNum"> 407</span> : : {</span> |
| <span id="L408"><span class="lineNum"> 408</span> : : return phb->ops->cfg_read16(phb, bdfn, offset, data);</span> |
| <span id="L409"><span class="lineNum"> 409</span> : : }</span> |
| <span id="L410"><span class="lineNum"> 410</span> : : </span> |
| <span id="L411"><span class="lineNum"> 411</span> : : static inline int64_t pci_cfg_read32(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L412"><span class="lineNum"> 412</span> : : uint32_t offset, uint32_t *data)</span> |
| <span id="L413"><span class="lineNum"> 413</span> : : {</span> |
| <span id="L414"><span class="lineNum"> 414</span> : : return phb->ops->cfg_read32(phb, bdfn, offset, data);</span> |
| <span id="L415"><span class="lineNum"> 415</span> : : }</span> |
| <span id="L416"><span class="lineNum"> 416</span> : : </span> |
| <span id="L417"><span class="lineNum"> 417</span> : : static inline int64_t pci_cfg_write8(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L418"><span class="lineNum"> 418</span> : : uint32_t offset, uint8_t data)</span> |
| <span id="L419"><span class="lineNum"> 419</span> : : {</span> |
| <span id="L420"><span class="lineNum"> 420</span> : : return phb->ops->cfg_write8(phb, bdfn, offset, data);</span> |
| <span id="L421"><span class="lineNum"> 421</span> : : }</span> |
| <span id="L422"><span class="lineNum"> 422</span> : : </span> |
| <span id="L423"><span class="lineNum"> 423</span> : : static inline int64_t pci_cfg_write16(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L424"><span class="lineNum"> 424</span> : : uint32_t offset, uint16_t data)</span> |
| <span id="L425"><span class="lineNum"> 425</span> : : {</span> |
| <span id="L426"><span class="lineNum"> 426</span> : : return phb->ops->cfg_write16(phb, bdfn, offset, data);</span> |
| <span id="L427"><span class="lineNum"> 427</span> : : }</span> |
| <span id="L428"><span class="lineNum"> 428</span> : : </span> |
| <span id="L429"><span class="lineNum"> 429</span> : : static inline int64_t pci_cfg_write32(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L430"><span class="lineNum"> 430</span> : : uint32_t offset, uint32_t data)</span> |
| <span id="L431"><span class="lineNum"> 431</span> : : {</span> |
| <span id="L432"><span class="lineNum"> 432</span> : : return phb->ops->cfg_write32(phb, bdfn, offset, data);</span> |
| <span id="L433"><span class="lineNum"> 433</span> : : }</span> |
| <span id="L434"><span class="lineNum"> 434</span> : : </span> |
| <span id="L435"><span class="lineNum"> 435</span> : : /* Utilities */</span> |
| <span id="L436"><span class="lineNum"> 436</span> : : extern void pci_remove_bus(struct phb *phb, struct list_head *list);</span> |
| <span id="L437"><span class="lineNum"> 437</span> : : extern uint8_t pci_scan_bus(struct phb *phb, uint8_t bus, uint8_t max_bus,</span> |
| <span id="L438"><span class="lineNum"> 438</span> : : struct list_head *list, struct pci_device *parent,</span> |
| <span id="L439"><span class="lineNum"> 439</span> : : bool scan_downstream);</span> |
| <span id="L440"><span class="lineNum"> 440</span> : : extern void pci_add_device_nodes(struct phb *phb,</span> |
| <span id="L441"><span class="lineNum"> 441</span> : : struct list_head *list,</span> |
| <span id="L442"><span class="lineNum"> 442</span> : : struct dt_node *parent_node,</span> |
| <span id="L443"><span class="lineNum"> 443</span> : : struct pci_lsi_state *lstate,</span> |
| <span id="L444"><span class="lineNum"> 444</span> : : uint8_t swizzle);</span> |
| <span id="L445"><span class="lineNum"> 445</span> : : extern int64_t pci_find_cap(struct phb *phb, uint16_t bdfn, uint8_t cap);</span> |
| <span id="L446"><span class="lineNum"> 446</span> : : extern int64_t pci_find_ecap(struct phb *phb, uint16_t bdfn, uint16_t cap,</span> |
| <span id="L447"><span class="lineNum"> 447</span> : : uint8_t *version);</span> |
| <span id="L448"><span class="lineNum"> 448</span> : : extern void pci_init_capabilities(struct phb *phb, struct pci_device *pd);</span> |
| <span id="L449"><span class="lineNum"> 449</span> : : extern bool pci_wait_crs(struct phb *phb, uint16_t bdfn, uint32_t *out_vdid);</span> |
| <span id="L450"><span class="lineNum"> 450</span> : : extern void pci_restore_slot_bus_configs(struct pci_slot *slot);</span> |
| <span id="L451"><span class="lineNum"> 451</span> : : extern void pci_device_init(struct phb *phb, struct pci_device *pd);</span> |
| <span id="L452"><span class="lineNum"> 452</span> : : extern struct pci_device *pci_walk_dev(struct phb *phb,</span> |
| <span id="L453"><span class="lineNum"> 453</span> : : struct pci_device *pd,</span> |
| <span id="L454"><span class="lineNum"> 454</span> : : int (*cb)(struct phb *,</span> |
| <span id="L455"><span class="lineNum"> 455</span> : : struct pci_device *,</span> |
| <span id="L456"><span class="lineNum"> 456</span> : : void *),</span> |
| <span id="L457"><span class="lineNum"> 457</span> : : void *userdata);</span> |
| <span id="L458"><span class="lineNum"> 458</span> : : extern struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn);</span> |
| <span id="L459"><span class="lineNum"> 459</span> : : extern void pci_restore_bridge_buses(struct phb *phb, struct pci_device *pd);</span> |
| <span id="L460"><span class="lineNum"> 460</span> : : extern struct pci_cfg_reg_filter *pci_find_cfg_reg_filter(struct pci_device *pd,</span> |
| <span id="L461"><span class="lineNum"> 461</span> : : uint32_t start, uint32_t len);</span> |
| <span id="L462"><span class="lineNum"> 462</span> : : extern int64_t pci_handle_cfg_filters(struct phb *phb, uint32_t bdfn,</span> |
| <span id="L463"><span class="lineNum"> 463</span> : : uint32_t offset, uint32_t len,</span> |
| <span id="L464"><span class="lineNum"> 464</span> : : uint32_t *data, bool write);</span> |
| <span id="L465"><span class="lineNum"> 465</span> : : extern struct pci_cfg_reg_filter *pci_add_cfg_reg_filter(struct pci_device *pd,</span> |
| <span id="L466"><span class="lineNum"> 466</span> : : uint32_t start, uint32_t len,</span> |
| <span id="L467"><span class="lineNum"> 467</span> : : uint32_t flags, pci_cfg_reg_func func);</span> |
| <span id="L468"><span class="lineNum"> 468</span> : : </span> |
| <span id="L469"><span class="lineNum"> 469</span> : : /* Manage PHBs */</span> |
| <span id="L470"><span class="lineNum"> 470</span> : : #define OPAL_DYNAMIC_PHB_ID (~0)</span> |
| <span id="L471"><span class="lineNum"> 471</span> : : extern int64_t pci_register_phb(struct phb *phb, int opal_id);</span> |
| <span id="L472"><span class="lineNum"> 472</span> : : extern int64_t pci_unregister_phb(struct phb *phb);</span> |
| <span id="L473"><span class="lineNum"> 473</span> : : extern struct phb *pci_get_phb(uint64_t phb_id);</span> |
| <span id="L474"><span class="lineNum"> 474</span> : : </span> |
| <span id="L475"><span class="lineNum"> 475</span> : : static inline struct phb *__pci_next_phb_idx(uint64_t *phb_id) {</span> |
| <span id="L476"><span class="lineNum"> 476</span> : : struct phb *phb = NULL;</span> |
| <span id="L477"><span class="lineNum"> 477</span> : : while (phb == NULL && *phb_id <= last_phb_id) {</span> |
| <span id="L478"><span class="lineNum"> 478</span> : : phb = pci_get_phb((*phb_id)++);</span> |
| <span id="L479"><span class="lineNum"> 479</span> : : }</span> |
| <span id="L480"><span class="lineNum"> 480</span> : : return phb;</span> |
| <span id="L481"><span class="lineNum"> 481</span> : : }</span> |
| <span id="L482"><span class="lineNum"> 482</span> : : </span> |
| <span id="L483"><span class="lineNum"> 483</span> : : #define for_each_phb(phb) \</span> |
| <span id="L484"><span class="lineNum"> 484</span> : : for (uint64_t __phb_idx = 0; \</span> |
| <span id="L485"><span class="lineNum"> 485</span> : : (phb = __pci_next_phb_idx(&__phb_idx)) ; )</span> |
| <span id="L486"><span class="lineNum"> 486</span> : : </span> |
| <span id="L487"><span class="lineNum"> 487</span> : : /* Device tree */</span> |
| <span id="L488"><span class="lineNum"> 488</span> : : extern void pci_std_swizzle_irq_map(struct dt_node *dt_node,</span> |
| <span id="L489"><span class="lineNum"> 489</span> : : struct pci_device *pd,</span> |
| <span id="L490"><span class="lineNum"> 490</span> : : struct pci_lsi_state *lstate,</span> |
| <span id="L491"><span class="lineNum"> 491</span> : : uint8_t swizzle);</span> |
| <span id="L492"><span class="lineNum"> 492</span> : : </span> |
| <span id="L493"><span class="lineNum"> 493</span> : : /* Initialize all PCI slots */</span> |
| <span id="L494"><span class="lineNum"> 494</span> : : extern void pci_init_slots(void);</span> |
| <span id="L495"><span class="lineNum"> 495</span> : : extern int64_t pci_reset(void);</span> |
| <span id="L496"><span class="lineNum"> 496</span> : : </span> |
| <span id="L497"><span class="lineNum"> 497</span> : : extern void opal_pci_eeh_set_evt(uint64_t phb_id);</span> |
| <span id="L498"><span class="lineNum"> 498</span> : : extern void opal_pci_eeh_clear_evt(uint64_t phb_id);</span> |
| <span id="L499"><span class="lineNum"> 499</span> : : </span> |
| <span id="L500"><span class="lineNum"> 500</span> : : #endif /* __PCI_H */</span> |
| </pre> |
| </td> |
| </tr> |
| </table> |
| <br> |
| |
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| <tr><td class="versionInfo">Generated by: <a href="https://github.com//linux-test-project/lcov" target="_parent">LCOV version 2.0-1</a></td></tr> |
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