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| <td width="10%" class="headerItem">Current view:</td> |
| <td width="10%" class="headerValue"><a href="../index.html">top level</a> - <a href="index.html">hdata</a> - spira.c<span style="font-size: 80%;"> (source / <a href="spira.c.func-c.html">functions</a>)</span></td> |
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| <td width="5%" class="headerCovTableHead">Coverage</td> |
| <td width="5%" class="headerCovTableHead" title="Covered + Uncovered code">Total</td> |
| <td width="5%" class="headerCovTableHead" title="Exercised code only">Hit</td> |
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| <td class="headerItem">Test:</td> |
| <td class="headerValue">skiboot.info</td> |
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| <td class="headerItem">Lines:</td> |
| <td class="headerCovTableEntryLo">46.7 %</td> |
| <td class="headerCovTableEntry">767</td> |
| <td class="headerCovTableEntry">358</td> |
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| <td class="headerItem">Test Date:</td> |
| <td class="headerValue">2025-06-27 16:54:26</td> |
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| <td class="headerItem">Functions:</td> |
| <td class="headerCovTableEntryMed">77.8 %</td> |
| <td class="headerCovTableEntry">36</td> |
| <td class="headerCovTableEntry">28</td> |
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| <td class="headerCovTableEntryHi">-</td> |
| <td class="headerCovTableEntry">0</td> |
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| <pre class="sourceHeading"> Branch data Line data Source code</pre> |
| <pre class="source"> |
| <span id="L1"><span class="lineNum"> 1</span> : : // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later</span> |
| <span id="L2"><span class="lineNum"> 2</span> : : /* Copyright 2013-2019 IBM Corp. */</span> |
| <span id="L3"><span class="lineNum"> 3</span> : : </span> |
| <span id="L4"><span class="lineNum"> 4</span> : : #include <inttypes.h></span> |
| <span id="L5"><span class="lineNum"> 5</span> : : #include <device.h></span> |
| <span id="L6"><span class="lineNum"> 6</span> : : #include <cpu.h></span> |
| <span id="L7"><span class="lineNum"> 7</span> : : #include <vpd.h></span> |
| <span id="L8"><span class="lineNum"> 8</span> : : #include <interrupts.h></span> |
| <span id="L9"><span class="lineNum"> 9</span> : : #include <ccan/str/str.h></span> |
| <span id="L10"><span class="lineNum"> 10</span> : : #include <chip.h></span> |
| <span id="L11"><span class="lineNum"> 11</span> : : #include <opal-dump.h></span> |
| <span id="L12"><span class="lineNum"> 12</span> : : #include <fsp-attn.h></span> |
| <span id="L13"><span class="lineNum"> 13</span> : : #include <fsp-leds.h></span> |
| <span id="L14"><span class="lineNum"> 14</span> : : #include <skiboot.h></span> |
| <span id="L15"><span class="lineNum"> 15</span> : : #include <vas.h></span> |
| <span id="L16"><span class="lineNum"> 16</span> : : </span> |
| <span id="L17"><span class="lineNum"> 17</span> : : #include "hdata.h"</span> |
| <span id="L18"><span class="lineNum"> 18</span> : : #include "hostservices.h"</span> |
| <span id="L19"><span class="lineNum"> 19</span> : : #include "naca.h"</span> |
| <span id="L20"><span class="lineNum"> 20</span> : : #include "spira.h"</span> |
| <span id="L21"><span class="lineNum"> 21</span> : : </span> |
| <span id="L22"><span class="lineNum"> 22</span> : : /* Processor Initialization structure, contains</span> |
| <span id="L23"><span class="lineNum"> 23</span> : : * the initial NIA and MSR values for the entry</span> |
| <span id="L24"><span class="lineNum"> 24</span> : : * point</span> |
| <span id="L25"><span class="lineNum"> 25</span> : : *</span> |
| <span id="L26"><span class="lineNum"> 26</span> : : * Note: It appears to be ignoring the entry point</span> |
| <span id="L27"><span class="lineNum"> 27</span> : : * and always going to 0x180</span> |
| <span id="L28"><span class="lineNum"> 28</span> : : */</span> |
| <span id="L29"><span class="lineNum"> 29</span> : : </span> |
| <span id="L30"><span class="lineNum"> 30</span> : : static int cpu_type;</span> |
| <span id="L31"><span class="lineNum"> 31</span> : : </span> |
| <span id="L32"><span class="lineNum"> 32</span> : : extern struct proc_init_data proc_init_data;</span> |
| <span id="L33"><span class="lineNum"> 33</span> : : </span> |
| <span id="L34"><span class="lineNum"> 34</span> : : __section(".procin.data") struct proc_init_data proc_init_data = {</span> |
| <span id="L35"><span class="lineNum"> 35</span> : : .hdr = HDIF_SIMPLE_HDR("PROCIN", 1, struct proc_init_data),</span> |
| <span id="L36"><span class="lineNum"> 36</span> : : .regs_ptr = HDIF_IDATA_PTR(offsetof(struct proc_init_data, regs), 0x10),</span> |
| <span id="L37"><span class="lineNum"> 37</span> : : .regs = {</span> |
| <span id="L38"><span class="lineNum"> 38</span> : : .nia = CPU_TO_BE64(0x180),</span> |
| <span id="L39"><span class="lineNum"> 39</span> : : .msr = CPU_TO_BE64(MSR_SF | MSR_HV),</span> |
| <span id="L40"><span class="lineNum"> 40</span> : : },</span> |
| <span id="L41"><span class="lineNum"> 41</span> : : };</span> |
| <span id="L42"><span class="lineNum"> 42</span> : : </span> |
| <span id="L43"><span class="lineNum"> 43</span> : : extern struct cpu_ctl_init_data cpu_ctl_init_data;</span> |
| <span id="L44"><span class="lineNum"> 44</span> : : extern struct sp_addr_table cpu_ctl_spat_area;</span> |
| <span id="L45"><span class="lineNum"> 45</span> : : extern struct sp_attn_area cpu_ctl_sp_attn_area1;</span> |
| <span id="L46"><span class="lineNum"> 46</span> : : extern struct sp_attn_area cpu_ctl_sp_attn_area2;</span> |
| <span id="L47"><span class="lineNum"> 47</span> : : extern struct hsr_data_area cpu_ctl_hsr_area;</span> |
| <span id="L48"><span class="lineNum"> 48</span> : : </span> |
| <span id="L49"><span class="lineNum"> 49</span> : : /*</span> |
| <span id="L50"><span class="lineNum"> 50</span> : : * cpuctrl.data begins at CPU_CTL_OFF - cpu_ctl_init_data is located there.</span> |
| <span id="L51"><span class="lineNum"> 51</span> : : * + sizeof(struct cpu_ctl_init_data) - cpu_ctl_spat_area</span> |
| <span id="L52"><span class="lineNum"> 52</span> : : * + sizeof(struct sp_addr_table) - cpu_ctl_sp_attn_area1</span> |
| <span id="L53"><span class="lineNum"> 53</span> : : * + sizeof(struct sp_attn_area) - cpu_ctl_sp_attn_area2</span> |
| <span id="L54"><span class="lineNum"> 54</span> : : * + sizeof(struct sp_attn_area) - cpu_ctl_hsr_area</span> |
| <span id="L55"><span class="lineNum"> 55</span> : : *</span> |
| <span id="L56"><span class="lineNum"> 56</span> : : * Can't use CPU_TO_BE64 directly on the labels as a constant initialiser.</span> |
| <span id="L57"><span class="lineNum"> 57</span> : : *</span> |
| <span id="L58"><span class="lineNum"> 58</span> : : * CPU_CTL_INIT_DATA_OFF is offset from 0, the others are addressed from the</span> |
| <span id="L59"><span class="lineNum"> 59</span> : : * relocated address (+SKIBOOT_BASE)</span> |
| <span id="L60"><span class="lineNum"> 60</span> : : */</span> |
| <span id="L61"><span class="lineNum"> 61</span> : : #define CPU_CTL_INIT_DATA_OFF (CPU_CTL_OFF)</span> |
| <span id="L62"><span class="lineNum"> 62</span> : : #define CPU_CTL_SPAT_AREA_OFF (CPU_CTL_INIT_DATA_OFF + sizeof(struct cpu_ctl_init_data) + SKIBOOT_BASE)</span> |
| <span id="L63"><span class="lineNum"> 63</span> : : #define CPU_CTL_SP_ATTN_AREA1_OFF (ALIGN_UP((CPU_CTL_SPAT_AREA_OFF + sizeof(struct sp_addr_table)), ATTN_AREA_SZ))</span> |
| <span id="L64"><span class="lineNum"> 64</span> : : #define CPU_CTL_SP_ATTN_AREA2_OFF (CPU_CTL_SP_ATTN_AREA1_OFF + sizeof(struct sp_attn_area))</span> |
| <span id="L65"><span class="lineNum"> 65</span> : : #define CPU_CTL_HSR_AREA_OFF (CPU_CTL_SP_ATTN_AREA2_OFF + sizeof(struct sp_attn_area))</span> |
| <span id="L66"><span class="lineNum"> 66</span> : : </span> |
| <span id="L67"><span class="lineNum"> 67</span> : : __section(".cpuctrl.data") struct hsr_data_area cpu_ctl_hsr_area;</span> |
| <span id="L68"><span class="lineNum"> 68</span> : : __section(".cpuctrl.data") struct sp_attn_area cpu_ctl_sp_attn_area2;</span> |
| <span id="L69"><span class="lineNum"> 69</span> : : __section(".cpuctrl.data") struct sp_attn_area cpu_ctl_sp_attn_area1;</span> |
| <span id="L70"><span class="lineNum"> 70</span> : : __section(".cpuctrl.data") struct sp_addr_table cpu_ctl_spat_area;</span> |
| <span id="L71"><span class="lineNum"> 71</span> : : </span> |
| <span id="L72"><span class="lineNum"> 72</span> : : __section(".cpuctrl.data") struct cpu_ctl_init_data cpu_ctl_init_data = {</span> |
| <span id="L73"><span class="lineNum"> 73</span> : : .hdr = HDIF_SIMPLE_HDR(CPU_CTL_HDIF_SIG, 2, struct cpu_ctl_init_data),</span> |
| <span id="L74"><span class="lineNum"> 74</span> : : .cpu_ctl = HDIF_IDATA_PTR(offsetof(struct cpu_ctl_init_data, cpu_ctl_lt),</span> |
| <span id="L75"><span class="lineNum"> 75</span> : : sizeof(struct cpu_ctl_legacy_table)),</span> |
| <span id="L76"><span class="lineNum"> 76</span> : : .cpu_ctl_lt = {</span> |
| <span id="L77"><span class="lineNum"> 77</span> : : .spat = {</span> |
| <span id="L78"><span class="lineNum"> 78</span> : : .addr = CPU_TO_BE64(CPU_CTL_SPAT_AREA_OFF),</span> |
| <span id="L79"><span class="lineNum"> 79</span> : : .size = CPU_TO_BE64(sizeof(struct sp_addr_table)),</span> |
| <span id="L80"><span class="lineNum"> 80</span> : : },</span> |
| <span id="L81"><span class="lineNum"> 81</span> : : .sp_attn_area1 = {</span> |
| <span id="L82"><span class="lineNum"> 82</span> : : .addr = CPU_TO_BE64(CPU_CTL_SP_ATTN_AREA1_OFF),</span> |
| <span id="L83"><span class="lineNum"> 83</span> : : .size = CPU_TO_BE64(sizeof(struct sp_attn_area)),</span> |
| <span id="L84"><span class="lineNum"> 84</span> : : },</span> |
| <span id="L85"><span class="lineNum"> 85</span> : : .sp_attn_area2 = {</span> |
| <span id="L86"><span class="lineNum"> 86</span> : : .addr = CPU_TO_BE64(CPU_CTL_SP_ATTN_AREA2_OFF),</span> |
| <span id="L87"><span class="lineNum"> 87</span> : : .size = CPU_TO_BE64(sizeof(struct sp_attn_area)),</span> |
| <span id="L88"><span class="lineNum"> 88</span> : : },</span> |
| <span id="L89"><span class="lineNum"> 89</span> : : .hsr_area = {</span> |
| <span id="L90"><span class="lineNum"> 90</span> : : .addr = CPU_TO_BE64(CPU_CTL_HSR_AREA_OFF),</span> |
| <span id="L91"><span class="lineNum"> 91</span> : : .size = CPU_TO_BE64(sizeof(struct hsr_data_area)),</span> |
| <span id="L92"><span class="lineNum"> 92</span> : : },</span> |
| <span id="L93"><span class="lineNum"> 93</span> : : },</span> |
| <span id="L94"><span class="lineNum"> 94</span> : : };</span> |
| <span id="L95"><span class="lineNum"> 95</span> : : </span> |
| <span id="L96"><span class="lineNum"> 96</span> : : /* Populate MDST table</span> |
| <span id="L97"><span class="lineNum"> 97</span> : : *</span> |
| <span id="L98"><span class="lineNum"> 98</span> : : * Note that we only pass sapphire console buffer here so that we can</span> |
| <span id="L99"><span class="lineNum"> 99</span> : : * capture early failure logs. Later dump component (fsp_dump_mdst_init)</span> |
| <span id="L100"><span class="lineNum"> 100</span> : : * creates new table with all the memory sections we are interested and</span> |
| <span id="L101"><span class="lineNum"> 101</span> : : * sends updated table to FSP via MBOX.</span> |
| <span id="L102"><span class="lineNum"> 102</span> : : *</span> |
| <span id="L103"><span class="lineNum"> 103</span> : : * To help the FSP distinguishing between TCE tokens and actual physical</span> |
| <span id="L104"><span class="lineNum"> 104</span> : : * addresses, we set the top bit to 1 on physical addresses</span> |
| <span id="L105"><span class="lineNum"> 105</span> : : */</span> |
| <span id="L106"><span class="lineNum"> 106</span> : : </span> |
| <span id="L107"><span class="lineNum"> 107</span> : : extern struct mdst_table init_mdst_table[];</span> |
| <span id="L108"><span class="lineNum"> 108</span> : : </span> |
| <span id="L109"><span class="lineNum"> 109</span> : : __section(".mdst.data") struct mdst_table init_mdst_table[2] = {</span> |
| <span id="L110"><span class="lineNum"> 110</span> : : {</span> |
| <span id="L111"><span class="lineNum"> 111</span> : : .addr = CPU_TO_BE64(INMEM_CON_START | HRMOR_BIT),</span> |
| <span id="L112"><span class="lineNum"> 112</span> : : .data_region = DUMP_REGION_CONSOLE,</span> |
| <span id="L113"><span class="lineNum"> 113</span> : : .dump_type = DUMP_TYPE_SYSDUMP,</span> |
| <span id="L114"><span class="lineNum"> 114</span> : : .size = CPU_TO_BE32(INMEM_CON_LEN),</span> |
| <span id="L115"><span class="lineNum"> 115</span> : : },</span> |
| <span id="L116"><span class="lineNum"> 116</span> : : {</span> |
| <span id="L117"><span class="lineNum"> 117</span> : : .addr = CPU_TO_BE64(HBRT_CON_START | HRMOR_BIT),</span> |
| <span id="L118"><span class="lineNum"> 118</span> : : .data_region = DUMP_REGION_HBRT_LOG,</span> |
| <span id="L119"><span class="lineNum"> 119</span> : : .dump_type = DUMP_TYPE_SYSDUMP,</span> |
| <span id="L120"><span class="lineNum"> 120</span> : : .size = CPU_TO_BE32(HBRT_CON_LEN),</span> |
| <span id="L121"><span class="lineNum"> 121</span> : : },</span> |
| <span id="L122"><span class="lineNum"> 122</span> : : };</span> |
| <span id="L123"><span class="lineNum"> 123</span> : : </span> |
| <span id="L124"><span class="lineNum"> 124</span> : : /* The Hypervisor SPIRA-H Structure */</span> |
| <span id="L125"><span class="lineNum"> 125</span> : : __section(".spirah.data") struct spirah spirah = {</span> |
| <span id="L126"><span class="lineNum"> 126</span> : : .hdr = HDIF_SIMPLE_HDR(SPIRAH_HDIF_SIG, SPIRAH_VERSION, struct spirah),</span> |
| <span id="L127"><span class="lineNum"> 127</span> : : .ntuples_ptr = HDIF_IDATA_PTR(offsetof(struct spirah, ntuples),</span> |
| <span id="L128"><span class="lineNum"> 128</span> : : sizeof(struct spirah_ntuples)),</span> |
| <span id="L129"><span class="lineNum"> 129</span> : : .ntuples = {</span> |
| <span id="L130"><span class="lineNum"> 130</span> : : .array_hdr = {</span> |
| <span id="L131"><span class="lineNum"> 131</span> : : .offset = CPU_TO_BE32(HDIF_ARRAY_OFFSET),</span> |
| <span id="L132"><span class="lineNum"> 132</span> : : .ecnt = CPU_TO_BE32(SPIRAH_NTUPLES_COUNT),</span> |
| <span id="L133"><span class="lineNum"> 133</span> : : .esize</span> |
| <span id="L134"><span class="lineNum"> 134</span> : : = CPU_TO_BE32(sizeof(struct spira_ntuple)),</span> |
| <span id="L135"><span class="lineNum"> 135</span> : : .eactsz = CPU_TO_BE32(0x18),</span> |
| <span id="L136"><span class="lineNum"> 136</span> : : },</span> |
| <span id="L137"><span class="lineNum"> 137</span> : : /* Host Data Areas */</span> |
| <span id="L138"><span class="lineNum"> 138</span> : : .hs_data_area = {</span> |
| <span id="L139"><span class="lineNum"> 139</span> : : .addr = CPU_TO_BE64(SPIRA_HEAP_BASE),</span> |
| <span id="L140"><span class="lineNum"> 140</span> : : .alloc_cnt = CPU_TO_BE16(1),</span> |
| <span id="L141"><span class="lineNum"> 141</span> : : .alloc_len = CPU_TO_BE32(SPIRA_HEAP_SIZE),</span> |
| <span id="L142"><span class="lineNum"> 142</span> : : },</span> |
| <span id="L143"><span class="lineNum"> 143</span> : : /* We only populate some n-tuples */</span> |
| <span id="L144"><span class="lineNum"> 144</span> : : .proc_init = {</span> |
| <span id="L145"><span class="lineNum"> 145</span> : : .addr = CPU_TO_BE64(PROCIN_OFF),</span> |
| <span id="L146"><span class="lineNum"> 146</span> : : .alloc_cnt = CPU_TO_BE16(1),</span> |
| <span id="L147"><span class="lineNum"> 147</span> : : .act_cnt = CPU_TO_BE16(1),</span> |
| <span id="L148"><span class="lineNum"> 148</span> : : .alloc_len</span> |
| <span id="L149"><span class="lineNum"> 149</span> : : = CPU_TO_BE32(sizeof(struct proc_init_data)),</span> |
| <span id="L150"><span class="lineNum"> 150</span> : : },</span> |
| <span id="L151"><span class="lineNum"> 151</span> : : .cpu_ctrl = {</span> |
| <span id="L152"><span class="lineNum"> 152</span> : : .addr = CPU_TO_BE64(CPU_CTL_INIT_DATA_OFF),</span> |
| <span id="L153"><span class="lineNum"> 153</span> : : .alloc_cnt = CPU_TO_BE16(1),</span> |
| <span id="L154"><span class="lineNum"> 154</span> : : .act_cnt = CPU_TO_BE16(1),</span> |
| <span id="L155"><span class="lineNum"> 155</span> : : .alloc_len =</span> |
| <span id="L156"><span class="lineNum"> 156</span> : : CPU_TO_BE32(sizeof(cpu_ctl_init_data)),</span> |
| <span id="L157"><span class="lineNum"> 157</span> : : },</span> |
| <span id="L158"><span class="lineNum"> 158</span> : : .mdump_src = {</span> |
| <span id="L159"><span class="lineNum"> 159</span> : : .addr = CPU_TO_BE64(MDST_TABLE_OFF),</span> |
| <span id="L160"><span class="lineNum"> 160</span> : : .alloc_cnt = CPU_TO_BE16(MDST_TABLE_SIZE / sizeof(struct mdst_table)),</span> |
| <span id="L161"><span class="lineNum"> 161</span> : : .act_cnt = CPU_TO_BE16(ARRAY_SIZE(init_mdst_table)),</span> |
| <span id="L162"><span class="lineNum"> 162</span> : : .alloc_len = CPU_TO_BE32(sizeof(struct mdst_table)),</span> |
| <span id="L163"><span class="lineNum"> 163</span> : : .act_len = CPU_TO_BE32(sizeof(struct mdst_table)),</span> |
| <span id="L164"><span class="lineNum"> 164</span> : : },</span> |
| <span id="L165"><span class="lineNum"> 165</span> : : .mdump_dst = {</span> |
| <span id="L166"><span class="lineNum"> 166</span> : : .addr = CPU_TO_BE64(MDDT_TABLE_OFF),</span> |
| <span id="L167"><span class="lineNum"> 167</span> : : .alloc_cnt = CPU_TO_BE16(MDDT_TABLE_SIZE / sizeof(struct mddt_table)),</span> |
| <span id="L168"><span class="lineNum"> 168</span> : : .act_cnt = CPU_TO_BE16(0),</span> |
| <span id="L169"><span class="lineNum"> 169</span> : : .alloc_len = CPU_TO_BE32(sizeof(struct mddt_table)),</span> |
| <span id="L170"><span class="lineNum"> 170</span> : : .act_len = CPU_TO_BE32(sizeof(struct mddt_table)),</span> |
| <span id="L171"><span class="lineNum"> 171</span> : : },</span> |
| <span id="L172"><span class="lineNum"> 172</span> : : .mdump_res = {</span> |
| <span id="L173"><span class="lineNum"> 173</span> : : .addr = CPU_TO_BE64(MDRT_TABLE_BASE),</span> |
| <span id="L174"><span class="lineNum"> 174</span> : : .alloc_cnt = CPU_TO_BE16(MDRT_TABLE_SIZE / sizeof(struct mdrt_table)),</span> |
| <span id="L175"><span class="lineNum"> 175</span> : : /*</span> |
| <span id="L176"><span class="lineNum"> 176</span> : : * XXX: Ideally hostboot should use allocated count and</span> |
| <span id="L177"><span class="lineNum"> 177</span> : : * length. But looks like hostboot uses actual count</span> |
| <span id="L178"><span class="lineNum"> 178</span> : : * and length to get MDRT table size. And post dump</span> |
| <span id="L179"><span class="lineNum"> 179</span> : : * hostboot will update act_cnt. Hence update both</span> |
| <span id="L180"><span class="lineNum"> 180</span> : : * alloc_cnt and act_cnt.</span> |
| <span id="L181"><span class="lineNum"> 181</span> : : */</span> |
| <span id="L182"><span class="lineNum"> 182</span> : : .act_cnt = CPU_TO_BE16(MDRT_TABLE_SIZE / sizeof(struct mdrt_table)),</span> |
| <span id="L183"><span class="lineNum"> 183</span> : : .alloc_len = CPU_TO_BE32(sizeof(struct mdrt_table)),</span> |
| <span id="L184"><span class="lineNum"> 184</span> : : .act_len = CPU_TO_BE32(sizeof(struct mdrt_table)),</span> |
| <span id="L185"><span class="lineNum"> 185</span> : : },</span> |
| <span id="L186"><span class="lineNum"> 186</span> : : .proc_dump_area = {</span> |
| <span id="L187"><span class="lineNum"> 187</span> : : .addr = CPU_TO_BE64(PROC_DUMP_AREA_OFF),</span> |
| <span id="L188"><span class="lineNum"> 188</span> : : .alloc_cnt = CPU_TO_BE16(1),</span> |
| <span id="L189"><span class="lineNum"> 189</span> : : .act_cnt = CPU_TO_BE16(1),</span> |
| <span id="L190"><span class="lineNum"> 190</span> : : .alloc_len = CPU_TO_BE32(sizeof(struct proc_dump_area)),</span> |
| <span id="L191"><span class="lineNum"> 191</span> : : .act_len = CPU_TO_BE32(sizeof(struct proc_dump_area)),</span> |
| <span id="L192"><span class="lineNum"> 192</span> : : },</span> |
| <span id="L193"><span class="lineNum"> 193</span> : : },</span> |
| <span id="L194"><span class="lineNum"> 194</span> : : };</span> |
| <span id="L195"><span class="lineNum"> 195</span> : : </span> |
| <span id="L196"><span class="lineNum"> 196</span> : : /* The service processor SPIRA-S structure */</span> |
| <span id="L197"><span class="lineNum"> 197</span> : : struct spiras *skiboot_constant_addr spiras;</span> |
| <span id="L198"><span class="lineNum"> 198</span> : : </span> |
| <span id="L199"><span class="lineNum"> 199</span> : : /* Overridden for testing. */</span> |
| <span id="L200"><span class="lineNum"> 200</span> : : #ifndef spira_check_ptr</span> |
| <span id="L201"><span class="lineNum"> 201</span> : : bool spira_check_ptr(const void *ptr, const char *file, unsigned int line)</span> |
| <span id="L202"><span class="lineNum"> 202</span> : : {</span> |
| <span id="L203"><span class="lineNum"> 203</span> : : if (!ptr)</span> |
| <span id="L204"><span class="lineNum"> 204</span> : : return false;</span> |
| <span id="L205"><span class="lineNum"> 205</span> : : if (((unsigned long)ptr) >= SPIRA_HEAP_BASE &&</span> |
| <span id="L206"><span class="lineNum"> 206</span> : : ((unsigned long)ptr) < (SPIRA_HEAP_BASE + SPIRA_HEAP_SIZE))</span> |
| <span id="L207"><span class="lineNum"> 207</span> : : return true;</span> |
| <span id="L208"><span class="lineNum"> 208</span> : : </span> |
| <span id="L209"><span class="lineNum"> 209</span> : : prerror("SPIRA: Bad pointer %p at %s line %d\n", ptr, file, line);</span> |
| <span id="L210"><span class="lineNum"> 210</span> : : return false;</span> |
| <span id="L211"><span class="lineNum"> 211</span> : : }</span> |
| <span id="L212"><span class="lineNum"> 212</span> : : #endif</span> |
| <span id="L213"><span class="lineNum"> 213</span> : : </span> |
| <span id="L214"><span class="lineNum"> 214</span> :<span class="tlaGNC tlaBgGNC"> 216 : struct HDIF_common_hdr *__get_hdif(struct spira_ntuple *n, const char id[],</span></span> |
| <span id="L215"><span class="lineNum"> 215</span> : : const char *file, int line)</span> |
| <span id="L216"><span class="lineNum"> 216</span> : : {</span> |
| <span id="L217"><span class="lineNum"> 217</span> :<span class="tlaGNC"> 216 : struct HDIF_common_hdr *h = ntuple_addr(n);</span></span> |
| <span id="L218"><span class="lineNum"> 218</span> : : u16 act_cnt, alloc_cnt;</span> |
| <span id="L219"><span class="lineNum"> 219</span> : : u32 act_len, alloc_len;</span> |
| <span id="L220"><span class="lineNum"> 220</span> : : </span> |
| <span id="L221"><span class="lineNum"> 221</span> :<span class="tlaGNC"> 216 : if (!spira_check_ptr(h, file, line))</span></span> |
| <span id="L222"><span class="lineNum"> 222</span> :<span class="tlaGNC"> 1 : return NULL;</span></span> |
| <span id="L223"><span class="lineNum"> 223</span> : : </span> |
| <span id="L224"><span class="lineNum"> 224</span> :<span class="tlaGNC"> 215 : act_cnt = be16_to_cpu(n->act_cnt);</span></span> |
| <span id="L225"><span class="lineNum"> 225</span> :<span class="tlaGNC"> 215 : alloc_cnt = be16_to_cpu(n->alloc_cnt);</span></span> |
| <span id="L226"><span class="lineNum"> 226</span> : : </span> |
| <span id="L227"><span class="lineNum"> 227</span> :<span class="tlaGNC"> 215 : if (act_cnt > alloc_cnt) {</span></span> |
| <span id="L228"><span class="lineNum"> 228</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: bad ntuple, act_cnt > alloc_cnt (%u > %u)\n",</span></span> |
| <span id="L229"><span class="lineNum"> 229</span> : : act_cnt, alloc_cnt);</span> |
| <span id="L230"><span class="lineNum"> 230</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L231"><span class="lineNum"> 231</span> : : }</span> |
| <span id="L232"><span class="lineNum"> 232</span> : : </span> |
| <span id="L233"><span class="lineNum"> 233</span> :<span class="tlaGNC tlaBgGNC"> 215 : act_len = be32_to_cpu(n->act_len);</span></span> |
| <span id="L234"><span class="lineNum"> 234</span> :<span class="tlaGNC"> 215 : alloc_len = be32_to_cpu(n->alloc_len);</span></span> |
| <span id="L235"><span class="lineNum"> 235</span> : : </span> |
| <span id="L236"><span class="lineNum"> 236</span> :<span class="tlaGNC"> 215 : if (act_len > alloc_len) {</span></span> |
| <span id="L237"><span class="lineNum"> 237</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: bad ntuple, act_len > alloc_len (%u > %u)\n",</span></span> |
| <span id="L238"><span class="lineNum"> 238</span> : : act_len, alloc_len);</span> |
| <span id="L239"><span class="lineNum"> 239</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L240"><span class="lineNum"> 240</span> : : }</span> |
| <span id="L241"><span class="lineNum"> 241</span> : : </span> |
| <span id="L242"><span class="lineNum"> 242</span> :<span class="tlaGNC tlaBgGNC"> 215 : if (!HDIF_check(h, id)) {</span></span> |
| <span id="L243"><span class="lineNum"> 243</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: bad tuple %p: expected %s at %s line %d\n",</span></span> |
| <span id="L244"><span class="lineNum"> 244</span> : : h, id, file, line);</span> |
| <span id="L245"><span class="lineNum"> 245</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L246"><span class="lineNum"> 246</span> : : }</span> |
| <span id="L247"><span class="lineNum"> 247</span> :<span class="tlaGNC tlaBgGNC"> 215 : return h;</span></span> |
| <span id="L248"><span class="lineNum"> 248</span> : : }</span> |
| <span id="L249"><span class="lineNum"> 249</span> : : </span> |
| <span id="L250"><span class="lineNum"> 250</span> :<span class="tlaGNC"> 25 : uint32_t get_xscom_id(const struct sppcrd_chip_info *cinfo)</span></span> |
| <span id="L251"><span class="lineNum"> 251</span> : : {</span> |
| <span id="L252"><span class="lineNum"> 252</span> :<span class="tlaGNC"> 25 : if (proc_gen <= proc_gen_p9)</span></span> |
| <span id="L253"><span class="lineNum"> 253</span> :<span class="tlaGNC"> 25 : return be32_to_cpu(cinfo->xscom_id);</span></span> |
| <span id="L254"><span class="lineNum"> 254</span> : : </span> |
| <span id="L255"><span class="lineNum"> 255</span> : : /* On P10 use Processor fabric topology id for chip id */</span> |
| <span id="L256"><span class="lineNum"> 256</span> :<span class="tlaUNC tlaBgUNC"> 0 : return (uint32_t)(cinfo->fab_topology_id);</span></span> |
| <span id="L257"><span class="lineNum"> 257</span> : : }</span> |
| <span id="L258"><span class="lineNum"> 258</span> : : </span> |
| <span id="L259"><span class="lineNum"> 259</span> :<span class="tlaGNC tlaBgGNC"> 2 : static struct dt_node *add_xscom_node(uint64_t base,</span></span> |
| <span id="L260"><span class="lineNum"> 260</span> : : const struct sppcrd_chip_info *cinfo)</span> |
| <span id="L261"><span class="lineNum"> 261</span> : : {</span> |
| <span id="L262"><span class="lineNum"> 262</span> : : struct dt_node *node;</span> |
| <span id="L263"><span class="lineNum"> 263</span> : : uint64_t addr, size;</span> |
| <span id="L264"><span class="lineNum"> 264</span> : : uint64_t freq;</span> |
| <span id="L265"><span class="lineNum"> 265</span> :<span class="tlaGNC"> 2 : uint32_t hw_id = get_xscom_id(cinfo);</span></span> |
| <span id="L266"><span class="lineNum"> 266</span> :<span class="tlaGNC"> 2 : uint32_t proc_chip_id = be32_to_cpu(cinfo->proc_chip_id);</span></span> |
| <span id="L267"><span class="lineNum"> 267</span> : : </span> |
| <span id="L268"><span class="lineNum"> 268</span> :<span class="tlaGNC"> 2 : switch (proc_gen) {</span></span> |
| <span id="L269"><span class="lineNum"> 269</span> :<span class="tlaGNC"> 2 : case proc_gen_p8:</span></span> |
| <span id="L270"><span class="lineNum"> 270</span> : : /* On P8 all the chip SCOMs share single region */</span> |
| <span id="L271"><span class="lineNum"> 271</span> :<span class="tlaGNC"> 2 : addr = base | ((uint64_t)hw_id << PPC_BITLSHIFT(28));</span></span> |
| <span id="L272"><span class="lineNum"> 272</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L273"><span class="lineNum"> 273</span> :<span class="tlaUNC tlaBgUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L274"><span class="lineNum"> 274</span> : : /* On P9 we need to put the chip ID in the natural powerbus</span> |
| <span id="L275"><span class="lineNum"> 275</span> : : * position.</span> |
| <span id="L276"><span class="lineNum"> 276</span> : : */</span> |
| <span id="L277"><span class="lineNum"> 277</span> :<span class="tlaUNC"> 0 : addr = base | (((uint64_t)hw_id) << 42);</span></span> |
| <span id="L278"><span class="lineNum"> 278</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L279"><span class="lineNum"> 279</span> :<span class="tlaUNC"> 0 : case proc_gen_p10:</span></span> |
| <span id="L280"><span class="lineNum"> 280</span> : : case proc_gen_p11:</span> |
| <span id="L281"><span class="lineNum"> 281</span> : : default:</span> |
| <span id="L282"><span class="lineNum"> 282</span> : : /* Use Primary topology table index for xscom address */</span> |
| <span id="L283"><span class="lineNum"> 283</span> :<span class="tlaUNC"> 0 : addr = base | (((uint64_t)cinfo->topology_id_table[cinfo->primary_topology_loc]) << 44);</span></span> |
| <span id="L284"><span class="lineNum"> 284</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L285"><span class="lineNum"> 285</span> : : };</span> |
| <span id="L286"><span class="lineNum"> 286</span> : : </span> |
| <span id="L287"><span class="lineNum"> 287</span> :<span class="tlaGNC tlaBgGNC"> 2 : size = (u64)1 << PPC_BITLSHIFT(28);</span></span> |
| <span id="L288"><span class="lineNum"> 288</span> : : </span> |
| <span id="L289"><span class="lineNum"> 289</span> :<span class="tlaGNC"> 2 : prlog(PR_INFO, "XSCOM: Found HW ID 0x%x (PCID 0x%x) @ 0x%llx\n",</span></span> |
| <span id="L290"><span class="lineNum"> 290</span> : : hw_id, proc_chip_id, (long long)addr);</span> |
| <span id="L291"><span class="lineNum"> 291</span> : : </span> |
| <span id="L292"><span class="lineNum"> 292</span> :<span class="tlaGNC"> 2 : node = dt_new_addr(dt_root, "xscom", addr);</span></span> |
| <span id="L293"><span class="lineNum"> 293</span> :<span class="tlaGNC"> 2 : assert(node);</span></span> |
| <span id="L294"><span class="lineNum"> 294</span> : : </span> |
| <span id="L295"><span class="lineNum"> 295</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(node, "ibm,chip-id", hw_id);</span></span> |
| <span id="L296"><span class="lineNum"> 296</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(node, "ibm,proc-chip-id", proc_chip_id);</span></span> |
| <span id="L297"><span class="lineNum"> 297</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(node, "#address-cells", 1);</span></span> |
| <span id="L298"><span class="lineNum"> 298</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(node, "#size-cells", 1);</span></span> |
| <span id="L299"><span class="lineNum"> 299</span> :<span class="tlaGNC"> 2 : dt_add_property(node, "scom-controller", NULL, 0);</span></span> |
| <span id="L300"><span class="lineNum"> 300</span> : : </span> |
| <span id="L301"><span class="lineNum"> 301</span> :<span class="tlaGNC"> 2 : switch(proc_gen) {</span></span> |
| <span id="L302"><span class="lineNum"> 302</span> :<span class="tlaGNC"> 2 : case proc_gen_p8:</span></span> |
| <span id="L303"><span class="lineNum"> 303</span> :<span class="tlaGNC"> 2 : dt_add_property_strings(node, "compatible",</span></span> |
| <span id="L304"><span class="lineNum"> 304</span> : : "ibm,xscom", "ibm,power8-xscom");</span> |
| <span id="L305"><span class="lineNum"> 305</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L306"><span class="lineNum"> 306</span> :<span class="tlaUNC tlaBgUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L307"><span class="lineNum"> 307</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(node, "compatible",</span></span> |
| <span id="L308"><span class="lineNum"> 308</span> : : "ibm,xscom", "ibm,power9-xscom");</span> |
| <span id="L309"><span class="lineNum"> 309</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L310"><span class="lineNum"> 310</span> :<span class="tlaUNC"> 0 : case proc_gen_p10:</span></span> |
| <span id="L311"><span class="lineNum"> 311</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(node, "compatible",</span></span> |
| <span id="L312"><span class="lineNum"> 312</span> : : "ibm,xscom", "ibm,power10-xscom");</span> |
| <span id="L313"><span class="lineNum"> 313</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L314"><span class="lineNum"> 314</span> :<span class="tlaUNC"> 0 : case proc_gen_p11:</span></span> |
| <span id="L315"><span class="lineNum"> 315</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(node, "compatible",</span></span> |
| <span id="L316"><span class="lineNum"> 316</span> : : "ibm,xscom", "ibm,power11-xscom");</span> |
| <span id="L317"><span class="lineNum"> 317</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L318"><span class="lineNum"> 318</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L319"><span class="lineNum"> 319</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(node, "compatible", "ibm,xscom");</span></span> |
| <span id="L320"><span class="lineNum"> 320</span> : : }</span> |
| <span id="L321"><span class="lineNum"> 321</span> :<span class="tlaGNC tlaBgGNC"> 2 : dt_add_property_u64s(node, "reg", addr, size);</span></span> |
| <span id="L322"><span class="lineNum"> 322</span> : : </span> |
| <span id="L323"><span class="lineNum"> 323</span> : : /*</span> |
| <span id="L324"><span class="lineNum"> 324</span> : : * The bus-frequency of the xscom node is actually the PIB/PCB</span> |
| <span id="L325"><span class="lineNum"> 325</span> : : * frequency. It is derived from the nest-clock via a 4:1 divider</span> |
| <span id="L326"><span class="lineNum"> 326</span> : : */</span> |
| <span id="L327"><span class="lineNum"> 327</span> :<span class="tlaGNC"> 2 : freq = dt_prop_get_u64_def(dt_root, "nest-frequency", 0);</span></span> |
| <span id="L328"><span class="lineNum"> 328</span> :<span class="tlaGNC"> 2 : freq /= 4;</span></span> |
| <span id="L329"><span class="lineNum"> 329</span> :<span class="tlaGNC"> 2 : if (freq)</span></span> |
| <span id="L330"><span class="lineNum"> 330</span> :<span class="tlaGNC"> 2 : dt_add_property_u64(node, "bus-frequency", freq);</span></span> |
| <span id="L331"><span class="lineNum"> 331</span> : : </span> |
| <span id="L332"><span class="lineNum"> 332</span> :<span class="tlaGNC"> 2 : return node;</span></span> |
| <span id="L333"><span class="lineNum"> 333</span> : : }</span> |
| <span id="L334"><span class="lineNum"> 334</span> : : </span> |
| <span id="L335"><span class="lineNum"> 335</span> : : /*</span> |
| <span id="L336"><span class="lineNum"> 336</span> : : * Given a xscom@ node this will return a pointer into the SPPCRD</span> |
| <span id="L337"><span class="lineNum"> 337</span> : : * structure corresponding to that node</span> |
| <span id="L338"><span class="lineNum"> 338</span> : : */</span> |
| <span id="L339"><span class="lineNum"> 339</span> : : #define GET_HDIF_HDR -1</span> |
| <span id="L340"><span class="lineNum"> 340</span> :<span class="tlaUNC tlaBgUNC"> 0 : static const void *xscom_to_pcrd(struct dt_node *xscom, int idata_index)</span></span> |
| <span id="L341"><span class="lineNum"> 341</span> : : {</span> |
| <span id="L342"><span class="lineNum"> 342</span> :<span class="tlaUNC"> 0 : struct spira_ntuple *t = &spiras->ntuples.proc_chip;</span></span> |
| <span id="L343"><span class="lineNum"> 343</span> : : const struct HDIF_common_hdr *hdif;</span> |
| <span id="L344"><span class="lineNum"> 344</span> : : const void *idata;</span> |
| <span id="L345"><span class="lineNum"> 345</span> : : unsigned int size;</span> |
| <span id="L346"><span class="lineNum"> 346</span> : : uint32_t i;</span> |
| <span id="L347"><span class="lineNum"> 347</span> : : void *base;</span> |
| <span id="L348"><span class="lineNum"> 348</span> : : </span> |
| <span id="L349"><span class="lineNum"> 349</span> :<span class="tlaUNC"> 0 : i = dt_prop_get_u32_def(xscom, DT_PRIVATE "sppcrd-index", 0xffffffff);</span></span> |
| <span id="L350"><span class="lineNum"> 350</span> :<span class="tlaUNC"> 0 : if (i == 0xffffffff)</span></span> |
| <span id="L351"><span class="lineNum"> 351</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L352"><span class="lineNum"> 352</span> : : </span> |
| <span id="L353"><span class="lineNum"> 353</span> :<span class="tlaUNC"> 0 : base = get_hdif(t, "SPPCRD");</span></span> |
| <span id="L354"><span class="lineNum"> 354</span> :<span class="tlaUNC"> 0 : assert(base);</span></span> |
| <span id="L355"><span class="lineNum"> 355</span> :<span class="tlaUNC"> 0 : assert(i < be16_to_cpu(t->act_cnt));</span></span> |
| <span id="L356"><span class="lineNum"> 356</span> : : </span> |
| <span id="L357"><span class="lineNum"> 357</span> :<span class="tlaUNC"> 0 : hdif = base + i * be32_to_cpu(t->alloc_len);</span></span> |
| <span id="L358"><span class="lineNum"> 358</span> :<span class="tlaUNC"> 0 : assert(hdif);</span></span> |
| <span id="L359"><span class="lineNum"> 359</span> : : </span> |
| <span id="L360"><span class="lineNum"> 360</span> :<span class="tlaUNC"> 0 : if (idata_index == GET_HDIF_HDR)</span></span> |
| <span id="L361"><span class="lineNum"> 361</span> :<span class="tlaUNC"> 0 : return hdif;</span></span> |
| <span id="L362"><span class="lineNum"> 362</span> : : </span> |
| <span id="L363"><span class="lineNum"> 363</span> :<span class="tlaUNC"> 0 : idata = HDIF_get_idata(hdif, idata_index, &size);</span></span> |
| <span id="L364"><span class="lineNum"> 364</span> :<span class="tlaUNC"> 0 : if (!idata || !size)</span></span> |
| <span id="L365"><span class="lineNum"> 365</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L366"><span class="lineNum"> 366</span> : : </span> |
| <span id="L367"><span class="lineNum"> 367</span> :<span class="tlaUNC"> 0 : return idata;</span></span> |
| <span id="L368"><span class="lineNum"> 368</span> : : }</span> |
| <span id="L369"><span class="lineNum"> 369</span> : : </span> |
| <span id="L370"><span class="lineNum"> 370</span> :<span class="tlaGNC tlaBgGNC"> 6 : struct dt_node *find_xscom_for_chip(uint32_t chip_id)</span></span> |
| <span id="L371"><span class="lineNum"> 371</span> : : {</span> |
| <span id="L372"><span class="lineNum"> 372</span> : : struct dt_node *node;</span> |
| <span id="L373"><span class="lineNum"> 373</span> : : uint32_t id;</span> |
| <span id="L374"><span class="lineNum"> 374</span> : : </span> |
| <span id="L375"><span class="lineNum"> 375</span> :<span class="tlaGNC"> 9 : dt_for_each_compatible(dt_root, node, "ibm,xscom") {</span></span> |
| <span id="L376"><span class="lineNum"> 376</span> :<span class="tlaGNC"> 9 : id = dt_get_chip_id(node);</span></span> |
| <span id="L377"><span class="lineNum"> 377</span> :<span class="tlaGNC"> 9 : if (id == chip_id)</span></span> |
| <span id="L378"><span class="lineNum"> 378</span> :<span class="tlaGNC"> 6 : return node;</span></span> |
| <span id="L379"><span class="lineNum"> 379</span> : : }</span> |
| <span id="L380"><span class="lineNum"> 380</span> : : </span> |
| <span id="L381"><span class="lineNum"> 381</span> :<span class="tlaUNC tlaBgUNC"> 0 : return NULL;</span></span> |
| <span id="L382"><span class="lineNum"> 382</span> : : }</span> |
| <span id="L383"><span class="lineNum"> 383</span> : : </span> |
| <span id="L384"><span class="lineNum"> 384</span> :<span class="tlaGNC tlaBgGNC"> 2 : static void add_psihb_node(struct dt_node *np)</span></span> |
| <span id="L385"><span class="lineNum"> 385</span> : : {</span> |
| <span id="L386"><span class="lineNum"> 386</span> : : u32 psi_scom, psi_slen;</span> |
| <span id="L387"><span class="lineNum"> 387</span> : : const char *psi_comp;</span> |
| <span id="L388"><span class="lineNum"> 388</span> : : </span> |
| <span id="L389"><span class="lineNum"> 389</span> : : /*</span> |
| <span id="L390"><span class="lineNum"> 390</span> : : * We add a few things under XSCOM that aren't added</span> |
| <span id="L391"><span class="lineNum"> 391</span> : : * by any other HDAT path</span> |
| <span id="L392"><span class="lineNum"> 392</span> : : */</span> |
| <span id="L393"><span class="lineNum"> 393</span> : : </span> |
| <span id="L394"><span class="lineNum"> 394</span> : : /* PSI host bridge */</span> |
| <span id="L395"><span class="lineNum"> 395</span> :<span class="tlaGNC"> 2 : switch(proc_gen) {</span></span> |
| <span id="L396"><span class="lineNum"> 396</span> :<span class="tlaGNC"> 2 : case proc_gen_p8:</span></span> |
| <span id="L397"><span class="lineNum"> 397</span> :<span class="tlaGNC"> 2 : psi_scom = 0x2010900;</span></span> |
| <span id="L398"><span class="lineNum"> 398</span> :<span class="tlaGNC"> 2 : psi_slen = 0x20;</span></span> |
| <span id="L399"><span class="lineNum"> 399</span> :<span class="tlaGNC"> 2 : psi_comp = "ibm,power8-psihb-x";</span></span> |
| <span id="L400"><span class="lineNum"> 400</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L401"><span class="lineNum"> 401</span> :<span class="tlaUNC tlaBgUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L402"><span class="lineNum"> 402</span> :<span class="tlaUNC"> 0 : psi_scom = 0x5012900;</span></span> |
| <span id="L403"><span class="lineNum"> 403</span> :<span class="tlaUNC"> 0 : psi_slen = 0x100;</span></span> |
| <span id="L404"><span class="lineNum"> 404</span> :<span class="tlaUNC"> 0 : psi_comp = "ibm,power9-psihb-x";</span></span> |
| <span id="L405"><span class="lineNum"> 405</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L406"><span class="lineNum"> 406</span> :<span class="tlaUNC"> 0 : case proc_gen_p10:</span></span> |
| <span id="L407"><span class="lineNum"> 407</span> : : case proc_gen_p11:</span> |
| <span id="L408"><span class="lineNum"> 408</span> :<span class="tlaUNC"> 0 : psi_scom = 0x3011d00;</span></span> |
| <span id="L409"><span class="lineNum"> 409</span> :<span class="tlaUNC"> 0 : psi_slen = 0x100;</span></span> |
| <span id="L410"><span class="lineNum"> 410</span> :<span class="tlaUNC"> 0 : psi_comp = "ibm,power10-psihb-x";</span></span> |
| <span id="L411"><span class="lineNum"> 411</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L412"><span class="lineNum"> 412</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L413"><span class="lineNum"> 413</span> :<span class="tlaUNC"> 0 : psi_comp = NULL;</span></span> |
| <span id="L414"><span class="lineNum"> 414</span> : : }</span> |
| <span id="L415"><span class="lineNum"> 415</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (psi_comp) {</span></span> |
| <span id="L416"><span class="lineNum"> 416</span> : : struct dt_node *psi_np;</span> |
| <span id="L417"><span class="lineNum"> 417</span> : : </span> |
| <span id="L418"><span class="lineNum"> 418</span> :<span class="tlaGNC"> 2 : psi_np = dt_new_addr(np, "psihb", psi_scom);</span></span> |
| <span id="L419"><span class="lineNum"> 419</span> :<span class="tlaGNC"> 2 : if (!psi_np)</span></span> |
| <span id="L420"><span class="lineNum"> 420</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L421"><span class="lineNum"> 421</span> : : </span> |
| <span id="L422"><span class="lineNum"> 422</span> :<span class="tlaGNC tlaBgGNC"> 2 : dt_add_property_cells(psi_np, "reg", psi_scom, psi_slen);</span></span> |
| <span id="L423"><span class="lineNum"> 423</span> :<span class="tlaGNC"> 2 : dt_add_property_strings(psi_np, "compatible", psi_comp,</span></span> |
| <span id="L424"><span class="lineNum"> 424</span> : : "ibm,psihb-x");</span> |
| <span id="L425"><span class="lineNum"> 425</span> : : }</span> |
| <span id="L426"><span class="lineNum"> 426</span> : : }</span> |
| <span id="L427"><span class="lineNum"> 427</span> : : </span> |
| <span id="L428"><span class="lineNum"> 428</span> :<span class="tlaUNC tlaBgUNC"> 0 : static void add_xive_node(struct dt_node *np)</span></span> |
| <span id="L429"><span class="lineNum"> 429</span> : : {</span> |
| <span id="L430"><span class="lineNum"> 430</span> : : struct dt_node *xive;</span> |
| <span id="L431"><span class="lineNum"> 431</span> : : const char *comp;</span> |
| <span id="L432"><span class="lineNum"> 432</span> : : u32 scom, slen;</span> |
| <span id="L433"><span class="lineNum"> 433</span> : : </span> |
| <span id="L434"><span class="lineNum"> 434</span> :<span class="tlaUNC"> 0 : switch (proc_gen) {</span></span> |
| <span id="L435"><span class="lineNum"> 435</span> :<span class="tlaUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L436"><span class="lineNum"> 436</span> :<span class="tlaUNC"> 0 : scom = 0x5013000;</span></span> |
| <span id="L437"><span class="lineNum"> 437</span> :<span class="tlaUNC"> 0 : slen = 0x300;</span></span> |
| <span id="L438"><span class="lineNum"> 438</span> :<span class="tlaUNC"> 0 : comp = "ibm,power9-xive-x";</span></span> |
| <span id="L439"><span class="lineNum"> 439</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L440"><span class="lineNum"> 440</span> :<span class="tlaUNC"> 0 : case proc_gen_p10:</span></span> |
| <span id="L441"><span class="lineNum"> 441</span> : : case proc_gen_p11:</span> |
| <span id="L442"><span class="lineNum"> 442</span> :<span class="tlaUNC"> 0 : scom = 0x2010800;</span></span> |
| <span id="L443"><span class="lineNum"> 443</span> :<span class="tlaUNC"> 0 : slen = 0x400;</span></span> |
| <span id="L444"><span class="lineNum"> 444</span> :<span class="tlaUNC"> 0 : comp = "ibm,power10-xive-x";</span></span> |
| <span id="L445"><span class="lineNum"> 445</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L446"><span class="lineNum"> 446</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L447"><span class="lineNum"> 447</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L448"><span class="lineNum"> 448</span> : : }</span> |
| <span id="L449"><span class="lineNum"> 449</span> : : </span> |
| <span id="L450"><span class="lineNum"> 450</span> :<span class="tlaUNC"> 0 : xive = dt_new_addr(np, "xive", scom);</span></span> |
| <span id="L451"><span class="lineNum"> 451</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(xive, "reg", scom, slen);</span></span> |
| <span id="L452"><span class="lineNum"> 452</span> :<span class="tlaUNC"> 0 : dt_add_property_string(xive, "compatible", comp);</span></span> |
| <span id="L453"><span class="lineNum"> 453</span> : : </span> |
| <span id="L454"><span class="lineNum"> 454</span> : : /* HACK: required for simics */</span> |
| <span id="L455"><span class="lineNum"> 455</span> :<span class="tlaUNC"> 0 : dt_add_property(xive, "force-assign-bars", NULL, 0);</span></span> |
| <span id="L456"><span class="lineNum"> 456</span> : : }</span> |
| <span id="L457"><span class="lineNum"> 457</span> : : </span> |
| <span id="L458"><span class="lineNum"> 458</span> :<span class="tlaUNC"> 0 : static void add_vas_node(struct dt_node *np, int idx)</span></span> |
| <span id="L459"><span class="lineNum"> 459</span> : : {</span> |
| <span id="L460"><span class="lineNum"> 460</span> : : struct dt_node *vas;</span> |
| <span id="L461"><span class="lineNum"> 461</span> : : const char *comp;</span> |
| <span id="L462"><span class="lineNum"> 462</span> : : uint64_t base_addr;</span> |
| <span id="L463"><span class="lineNum"> 463</span> : : </span> |
| <span id="L464"><span class="lineNum"> 464</span> :<span class="tlaUNC"> 0 : if (proc_gen == proc_gen_p9) {</span></span> |
| <span id="L465"><span class="lineNum"> 465</span> :<span class="tlaUNC"> 0 : base_addr = P9_VAS_SCOM_BASE_ADDR;</span></span> |
| <span id="L466"><span class="lineNum"> 466</span> :<span class="tlaUNC"> 0 : comp = "ibm,power9-vas-x";</span></span> |
| <span id="L467"><span class="lineNum"> 467</span> : : } else {</span> |
| <span id="L468"><span class="lineNum"> 468</span> :<span class="tlaUNC"> 0 : base_addr = VAS_SCOM_BASE_ADDR;</span></span> |
| <span id="L469"><span class="lineNum"> 469</span> :<span class="tlaUNC"> 0 : comp = "ibm,power10-vas-x";</span></span> |
| <span id="L470"><span class="lineNum"> 470</span> : : }</span> |
| <span id="L471"><span class="lineNum"> 471</span> : : </span> |
| <span id="L472"><span class="lineNum"> 472</span> :<span class="tlaUNC"> 0 : vas = dt_new_addr(np, "vas", base_addr);</span></span> |
| <span id="L473"><span class="lineNum"> 473</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(vas, "reg", base_addr, 0x300);</span></span> |
| <span id="L474"><span class="lineNum"> 474</span> :<span class="tlaUNC"> 0 : dt_add_property_string(vas, "compatible", comp);</span></span> |
| <span id="L475"><span class="lineNum"> 475</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(vas, "ibm,vas-id", idx);</span></span> |
| <span id="L476"><span class="lineNum"> 476</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L477"><span class="lineNum"> 477</span> : : </span> |
| <span id="L478"><span class="lineNum"> 478</span> :<span class="tlaUNC"> 0 : static void add_ecid_data(const struct HDIF_common_hdr *hdr,</span></span> |
| <span id="L479"><span class="lineNum"> 479</span> : : struct dt_node *xscom)</span> |
| <span id="L480"><span class="lineNum"> 480</span> : : {</span> |
| <span id="L481"><span class="lineNum"> 481</span> : : char wafer_id[11];</span> |
| <span id="L482"><span class="lineNum"> 482</span> : : uint8_t tmp;</span> |
| <span id="L483"><span class="lineNum"> 483</span> : : int i;</span> |
| <span id="L484"><span class="lineNum"> 484</span> :<span class="tlaUNC"> 0 : uint32_t size = 0;</span></span> |
| <span id="L485"><span class="lineNum"> 485</span> : : struct sppcrd_ecid *ecid;</span> |
| <span id="L486"><span class="lineNum"> 486</span> : : const struct HDIF_array_hdr *ec_hdr;</span> |
| <span id="L487"><span class="lineNum"> 487</span> : : </span> |
| <span id="L488"><span class="lineNum"> 488</span> :<span class="tlaUNC"> 0 : ec_hdr = HDIF_get_idata(hdr, SPPCRD_IDATA_EC_LEVEL, &size);</span></span> |
| <span id="L489"><span class="lineNum"> 489</span> :<span class="tlaUNC"> 0 : if (!ec_hdr || !size)</span></span> |
| <span id="L490"><span class="lineNum"> 490</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L491"><span class="lineNum"> 491</span> : : </span> |
| <span id="L492"><span class="lineNum"> 492</span> :<span class="tlaUNC"> 0 : ecid = (void *)ec_hdr + be32_to_cpu(ec_hdr->offset);</span></span> |
| <span id="L493"><span class="lineNum"> 493</span> :<span class="tlaUNC"> 0 : dt_add_property_u64s(xscom, "ecid", be64_to_cpu(ecid->low),</span></span> |
| <span id="L494"><span class="lineNum"> 494</span> : : be64_to_cpu(ecid->high));</span> |
| <span id="L495"><span class="lineNum"> 495</span> : : </span> |
| <span id="L496"><span class="lineNum"> 496</span> : : /*</span> |
| <span id="L497"><span class="lineNum"> 497</span> : : * bits 4:63 of ECID data contains wafter ID data (ten 6 bit fields</span> |
| <span id="L498"><span class="lineNum"> 498</span> : : * each containing a code).</span> |
| <span id="L499"><span class="lineNum"> 499</span> : : */</span> |
| <span id="L500"><span class="lineNum"> 500</span> :<span class="tlaUNC"> 0 : for (i = 0; i < 10; i++) {</span></span> |
| <span id="L501"><span class="lineNum"> 501</span> :<span class="tlaUNC"> 0 : tmp = (u8)((be64_to_cpu(ecid->low) >> (i * 6)) & 0x3f);</span></span> |
| <span id="L502"><span class="lineNum"> 502</span> :<span class="tlaUNC"> 0 : if (tmp <= 9)</span></span> |
| <span id="L503"><span class="lineNum"> 503</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = tmp + '0';</span></span> |
| <span id="L504"><span class="lineNum"> 504</span> :<span class="tlaUNC"> 0 : else if (tmp >= 0xA && tmp <= 0x23)</span></span> |
| <span id="L505"><span class="lineNum"> 505</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = tmp + '0' + 7;</span></span> |
| <span id="L506"><span class="lineNum"> 506</span> :<span class="tlaUNC"> 0 : else if (tmp == 0x3D)</span></span> |
| <span id="L507"><span class="lineNum"> 507</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = '-';</span></span> |
| <span id="L508"><span class="lineNum"> 508</span> :<span class="tlaUNC"> 0 : else if (tmp == 0x3E)</span></span> |
| <span id="L509"><span class="lineNum"> 509</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = '.';</span></span> |
| <span id="L510"><span class="lineNum"> 510</span> :<span class="tlaUNC"> 0 : else if (tmp == 0x3F)</span></span> |
| <span id="L511"><span class="lineNum"> 511</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = ' ';</span></span> |
| <span id="L512"><span class="lineNum"> 512</span> : : else /* Unknown code */</span> |
| <span id="L513"><span class="lineNum"> 513</span> :<span class="tlaUNC"> 0 : wafer_id[9 - i] = tmp + '0';</span></span> |
| <span id="L514"><span class="lineNum"> 514</span> : : }</span> |
| <span id="L515"><span class="lineNum"> 515</span> :<span class="tlaUNC"> 0 : wafer_id[10] = '\0';</span></span> |
| <span id="L516"><span class="lineNum"> 516</span> :<span class="tlaUNC"> 0 : dt_add_property_nstr(xscom, "wafer-id", wafer_id, 10);</span></span> |
| <span id="L517"><span class="lineNum"> 517</span> : : </span> |
| <span id="L518"><span class="lineNum"> 518</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(xscom, "wafer-location",</span></span> |
| <span id="L519"><span class="lineNum"> 519</span> : : (u32)((be64_to_cpu(ecid->high) >> 56) & 0xff),</span> |
| <span id="L520"><span class="lineNum"> 520</span> : : (u32)((be64_to_cpu(ecid->high) >> 48) & 0xff));</span> |
| <span id="L521"><span class="lineNum"> 521</span> : : }</span> |
| <span id="L522"><span class="lineNum"> 522</span> : : </span> |
| <span id="L523"><span class="lineNum"> 523</span> :<span class="tlaGNC tlaBgGNC"> 2 : static void add_xscom_add_pcia_assoc(struct dt_node *np, uint32_t pcid)</span></span> |
| <span id="L524"><span class="lineNum"> 524</span> : : {</span> |
| <span id="L525"><span class="lineNum"> 525</span> : : const struct HDIF_common_hdr *hdr;</span> |
| <span id="L526"><span class="lineNum"> 526</span> : : u32 size;</span> |
| <span id="L527"><span class="lineNum"> 527</span> : : </span> |
| <span id="L528"><span class="lineNum"> 528</span> : : </span> |
| <span id="L529"><span class="lineNum"> 529</span> : : /*</span> |
| <span id="L530"><span class="lineNum"> 530</span> : : * The SPPCRD doesn't contain all the affinity data, we have</span> |
| <span id="L531"><span class="lineNum"> 531</span> : : * to dig it out of a core. I assume this is so that node</span> |
| <span id="L532"><span class="lineNum"> 532</span> : : * affinity can be different for groups of cores within the</span> |
| <span id="L533"><span class="lineNum"> 533</span> : : * chip, but for now we are going to ignore that</span> |
| <span id="L534"><span class="lineNum"> 534</span> : : */</span> |
| <span id="L535"><span class="lineNum"> 535</span> :<span class="tlaGNC"> 2 : hdr = get_hdif(&spiras->ntuples.pcia, SPPCIA_HDIF_SIG);</span></span> |
| <span id="L536"><span class="lineNum"> 536</span> :<span class="tlaGNC"> 2 : if (!hdr)</span></span> |
| <span id="L537"><span class="lineNum"> 537</span> :<span class="tlaGNC"> 2 : return;</span></span> |
| <span id="L538"><span class="lineNum"> 538</span> : : </span> |
| <span id="L539"><span class="lineNum"> 539</span> :<span class="tlaGNC"> 5 : for_each_pcia(spiras, hdr) {</span></span> |
| <span id="L540"><span class="lineNum"> 540</span> : : const struct sppcia_core_unique *id;</span> |
| <span id="L541"><span class="lineNum"> 541</span> : : </span> |
| <span id="L542"><span class="lineNum"> 542</span> :<span class="tlaGNC"> 5 : id = HDIF_get_idata(hdr, SPPCIA_IDATA_CORE_UNIQUE, &size);</span></span> |
| <span id="L543"><span class="lineNum"> 543</span> :<span class="tlaGNC"> 5 : if (!id || size < sizeof(*id))</span></span> |
| <span id="L544"><span class="lineNum"> 544</span> :<span class="tlaGNC"> 3 : continue;</span></span> |
| <span id="L545"><span class="lineNum"> 545</span> : : </span> |
| <span id="L546"><span class="lineNum"> 546</span> :<span class="tlaGNC"> 5 : if (be32_to_cpu(id->proc_chip_id) != pcid)</span></span> |
| <span id="L547"><span class="lineNum"> 547</span> :<span class="tlaGNC"> 3 : continue;</span></span> |
| <span id="L548"><span class="lineNum"> 548</span> : : </span> |
| <span id="L549"><span class="lineNum"> 549</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,ccm-node-id",</span></span> |
| <span id="L550"><span class="lineNum"> 550</span> : : be32_to_cpu(id->ccm_node_id));</span> |
| <span id="L551"><span class="lineNum"> 551</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,hw-card-id",</span></span> |
| <span id="L552"><span class="lineNum"> 552</span> : : be32_to_cpu(id->hw_card_id));</span> |
| <span id="L553"><span class="lineNum"> 553</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,hw-module-id",</span></span> |
| <span id="L554"><span class="lineNum"> 554</span> : : be32_to_cpu(id->hw_module_id));</span> |
| <span id="L555"><span class="lineNum"> 555</span> :<span class="tlaGNC"> 2 : if (!dt_find_property(np, "ibm,dbob-id"))</span></span> |
| <span id="L556"><span class="lineNum"> 556</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_cells(np, "ibm,dbob-id",</span></span> |
| <span id="L557"><span class="lineNum"> 557</span> : : be32_to_cpu(id->drawer_book_octant_blade_id));</span> |
| <span id="L558"><span class="lineNum"> 558</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (proc_gen < proc_gen_p9) {</span></span> |
| <span id="L559"><span class="lineNum"> 559</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,mem-interleave-scope",</span></span> |
| <span id="L560"><span class="lineNum"> 560</span> : : be32_to_cpu(id->memory_interleaving_scope));</span> |
| <span id="L561"><span class="lineNum"> 561</span> : : }</span> |
| <span id="L562"><span class="lineNum"> 562</span> :<span class="tlaGNC"> 2 : return;</span></span> |
| <span id="L563"><span class="lineNum"> 563</span> : : }</span> |
| <span id="L564"><span class="lineNum"> 564</span> : : }</span> |
| <span id="L565"><span class="lineNum"> 565</span> : : </span> |
| <span id="L566"><span class="lineNum"> 566</span> :<span class="tlaGNC"> 1 : static bool add_xscom_sppcrd(uint64_t xscom_base)</span></span> |
| <span id="L567"><span class="lineNum"> 567</span> : : {</span> |
| <span id="L568"><span class="lineNum"> 568</span> : : const struct HDIF_common_hdr *hdif;</span> |
| <span id="L569"><span class="lineNum"> 569</span> : : unsigned int i, vpd_sz;</span> |
| <span id="L570"><span class="lineNum"> 570</span> : : const void *vpd;</span> |
| <span id="L571"><span class="lineNum"> 571</span> : : struct dt_node *np, *vpd_node;</span> |
| <span id="L572"><span class="lineNum"> 572</span> : : </span> |
| <span id="L573"><span class="lineNum"> 573</span> :<span class="tlaGNC"> 33 : for_each_ntuple_idx(&spiras->ntuples.proc_chip, hdif, i,</span></span> |
| <span id="L574"><span class="lineNum"> 574</span> : : SPPCRD_HDIF_SIG) {</span> |
| <span id="L575"><span class="lineNum"> 575</span> : : const struct sppcrd_chip_info *cinfo;</span> |
| <span id="L576"><span class="lineNum"> 576</span> :<span class="tlaGNC"> 32 : const struct spira_fru_id *fru_id = NULL;</span></span> |
| <span id="L577"><span class="lineNum"> 577</span> : : unsigned int csize;</span> |
| <span id="L578"><span class="lineNum"> 578</span> : : u32 ve, version;</span> |
| <span id="L579"><span class="lineNum"> 579</span> : : </span> |
| <span id="L580"><span class="lineNum"> 580</span> :<span class="tlaGNC"> 32 : cinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO, &csize);</span></span> |
| <span id="L581"><span class="lineNum"> 581</span> :<span class="tlaGNC"> 32 : if (!CHECK_SPPTR(cinfo)) {</span></span> |
| <span id="L582"><span class="lineNum"> 582</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("XSCOM: Bad ChipID data %d\n", i);</span></span> |
| <span id="L583"><span class="lineNum"> 583</span> :<span class="tlaGNC tlaBgGNC"> 30 : continue;</span></span> |
| <span id="L584"><span class="lineNum"> 584</span> : : }</span> |
| <span id="L585"><span class="lineNum"> 585</span> : : </span> |
| <span id="L586"><span class="lineNum"> 586</span> :<span class="tlaGNC"> 32 : ve = be32_to_cpu(cinfo->verif_exist_flags) & CHIP_VERIFY_MASK;</span></span> |
| <span id="L587"><span class="lineNum"> 587</span> :<span class="tlaGNC"> 32 : ve >>= CHIP_VERIFY_SHIFT;</span></span> |
| <span id="L588"><span class="lineNum"> 588</span> :<span class="tlaGNC"> 32 : if (ve == CHIP_VERIFY_NOT_INSTALLED ||</span></span> |
| <span id="L589"><span class="lineNum"> 589</span> : : ve == CHIP_VERIFY_UNUSABLE)</span> |
| <span id="L590"><span class="lineNum"> 590</span> :<span class="tlaGNC"> 30 : continue;</span></span> |
| <span id="L591"><span class="lineNum"> 591</span> : : </span> |
| <span id="L592"><span class="lineNum"> 592</span> : : /* Create the XSCOM node */</span> |
| <span id="L593"><span class="lineNum"> 593</span> :<span class="tlaGNC"> 2 : np = add_xscom_node(xscom_base, cinfo);</span></span> |
| <span id="L594"><span class="lineNum"> 594</span> :<span class="tlaGNC"> 2 : if (!np)</span></span> |
| <span id="L595"><span class="lineNum"> 595</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L596"><span class="lineNum"> 596</span> : : </span> |
| <span id="L597"><span class="lineNum"> 597</span> : : </span> |
| <span id="L598"><span class="lineNum"> 598</span> :<span class="tlaGNC tlaBgGNC"> 2 : dt_add_property_cells(np, DT_PRIVATE "sppcrd-index", i);</span></span> |
| <span id="L599"><span class="lineNum"> 599</span> : : </span> |
| <span id="L600"><span class="lineNum"> 600</span> :<span class="tlaGNC"> 2 : version = be16_to_cpu(hdif->version);</span></span> |
| <span id="L601"><span class="lineNum"> 601</span> : : </span> |
| <span id="L602"><span class="lineNum"> 602</span> : : /* Version 0A has additional OCC related stuff */</span> |
| <span id="L603"><span class="lineNum"> 603</span> :<span class="tlaGNC"> 2 : if (version >= 0x000a) {</span></span> |
| <span id="L604"><span class="lineNum"> 604</span> :<span class="tlaGNC"> 2 : if (!dt_find_property(np, "ibm,dbob-id"))</span></span> |
| <span id="L605"><span class="lineNum"> 605</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,dbob-id",</span></span> |
| <span id="L606"><span class="lineNum"> 606</span> : : be32_to_cpu(cinfo->dbob_id));</span> |
| <span id="L607"><span class="lineNum"> 607</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(np, "ibm,occ-functional-state",</span></span> |
| <span id="L608"><span class="lineNum"> 608</span> : : be32_to_cpu(cinfo->occ_state));</span> |
| <span id="L609"><span class="lineNum"> 609</span> : : }</span> |
| <span id="L610"><span class="lineNum"> 610</span> : : </span> |
| <span id="L611"><span class="lineNum"> 611</span> : : /* Add chip VPD */</span> |
| <span id="L612"><span class="lineNum"> 612</span> :<span class="tlaGNC"> 2 : vpd_node = dt_add_vpd_node(hdif, SPPCRD_IDATA_FRU_ID,</span></span> |
| <span id="L613"><span class="lineNum"> 613</span> : : SPPCRD_IDATA_KW_VPD);</span> |
| <span id="L614"><span class="lineNum"> 614</span> :<span class="tlaGNC"> 2 : if (vpd_node)</span></span> |
| <span id="L615"><span class="lineNum"> 615</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(vpd_node, "ibm,chip-id",</span></span> |
| <span id="L616"><span class="lineNum"> 616</span> : : get_xscom_id(cinfo));</span> |
| <span id="L617"><span class="lineNum"> 617</span> : : </span> |
| <span id="L618"><span class="lineNum"> 618</span> :<span class="tlaGNC"> 2 : fru_id = HDIF_get_idata(hdif, SPPCRD_IDATA_FRU_ID, NULL);</span></span> |
| <span id="L619"><span class="lineNum"> 619</span> :<span class="tlaGNC"> 2 : if (fru_id)</span></span> |
| <span id="L620"><span class="lineNum"> 620</span> :<span class="tlaGNC"> 2 : slca_vpd_add_loc_code(np, be16_to_cpu(fru_id->slca_index));</span></span> |
| <span id="L621"><span class="lineNum"> 621</span> : : </span> |
| <span id="L622"><span class="lineNum"> 622</span> : : /* Add module VPD on version A and later */</span> |
| <span id="L623"><span class="lineNum"> 623</span> :<span class="tlaGNC"> 2 : if (version >= 0x000a) {</span></span> |
| <span id="L624"><span class="lineNum"> 624</span> :<span class="tlaGNC"> 2 : vpd = HDIF_get_idata(hdif, SPPCRD_IDATA_MODULE_VPD,</span></span> |
| <span id="L625"><span class="lineNum"> 625</span> : : &vpd_sz);</span> |
| <span id="L626"><span class="lineNum"> 626</span> :<span class="tlaGNC"> 2 : if (CHECK_SPPTR(vpd)) {</span></span> |
| <span id="L627"><span class="lineNum"> 627</span> :<span class="tlaGNC"> 2 : dt_add_property(np, "ibm,module-vpd", vpd,</span></span> |
| <span id="L628"><span class="lineNum"> 628</span> : : vpd_sz);</span> |
| <span id="L629"><span class="lineNum"> 629</span> :<span class="tlaGNC"> 2 : vpd_data_parse(np, vpd, vpd_sz);</span></span> |
| <span id="L630"><span class="lineNum"> 630</span> :<span class="tlaGNC"> 2 : if (vpd_node)</span></span> |
| <span id="L631"><span class="lineNum"> 631</span> :<span class="tlaGNC"> 2 : dt_add_proc_vendor(vpd_node, vpd, vpd_sz);</span></span> |
| <span id="L632"><span class="lineNum"> 632</span> : : }</span> |
| <span id="L633"><span class="lineNum"> 633</span> : : }</span> |
| <span id="L634"><span class="lineNum"> 634</span> : : </span> |
| <span id="L635"><span class="lineNum"> 635</span> : : /*</span> |
| <span id="L636"><span class="lineNum"> 636</span> : : * Extract additional associativity information from</span> |
| <span id="L637"><span class="lineNum"> 637</span> : : * the core data. Pick one core on that chip</span> |
| <span id="L638"><span class="lineNum"> 638</span> : : */</span> |
| <span id="L639"><span class="lineNum"> 639</span> :<span class="tlaGNC"> 2 : add_xscom_add_pcia_assoc(np, be32_to_cpu(cinfo->proc_chip_id));</span></span> |
| <span id="L640"><span class="lineNum"> 640</span> : : </span> |
| <span id="L641"><span class="lineNum"> 641</span> : : /* Add PSI Host bridge */</span> |
| <span id="L642"><span class="lineNum"> 642</span> :<span class="tlaGNC"> 2 : add_psihb_node(np);</span></span> |
| <span id="L643"><span class="lineNum"> 643</span> : : </span> |
| <span id="L644"><span class="lineNum"> 644</span> :<span class="tlaGNC"> 2 : if (proc_gen >= proc_gen_p9) {</span></span> |
| <span id="L645"><span class="lineNum"> 645</span> :<span class="tlaUNC tlaBgUNC"> 0 : add_xive_node(np);</span></span> |
| <span id="L646"><span class="lineNum"> 646</span> :<span class="tlaUNC"> 0 : parse_i2c_devs(hdif, SPPCRD_IDATA_HOST_I2C, np);</span></span> |
| <span id="L647"><span class="lineNum"> 647</span> :<span class="tlaUNC"> 0 : add_vas_node(np, i);</span></span> |
| <span id="L648"><span class="lineNum"> 648</span> :<span class="tlaUNC"> 0 : add_ecid_data(hdif, np);</span></span> |
| <span id="L649"><span class="lineNum"> 649</span> : : </span> |
| <span id="L650"><span class="lineNum"> 650</span> :<span class="tlaUNC"> 0 : if (be32_to_cpu(cinfo->verif_exist_flags) & CHIP_VERIFY_MASTER_PROC)</span></span> |
| <span id="L651"><span class="lineNum"> 651</span> :<span class="tlaUNC"> 0 : dt_add_property(np, "primary", NULL, 0);</span></span> |
| <span id="L652"><span class="lineNum"> 652</span> : : }</span> |
| <span id="L653"><span class="lineNum"> 653</span> : : </span> |
| <span id="L654"><span class="lineNum"> 654</span> : : /*</span> |
| <span id="L655"><span class="lineNum"> 655</span> : : * Add sw checkstop scom address (ibm,sw-checkstop-fir)</span> |
| <span id="L656"><span class="lineNum"> 656</span> : : *</span> |
| <span id="L657"><span class="lineNum"> 657</span> : : * The latest HDAT versions have sw checkstop scom address</span> |
| <span id="L658"><span class="lineNum"> 658</span> : : * info. But not sure from which version onwards (at least</span> |
| <span id="L659"><span class="lineNum"> 659</span> : : * HDAT spec do not mention that explicitly). Hence use the</span> |
| <span id="L660"><span class="lineNum"> 660</span> : : * sppcrd struct size returned by HDIF_get_idata to figure out</span> |
| <span id="L661"><span class="lineNum"> 661</span> : : * whether it contains sw checkstop scom address info. Also</span> |
| <span id="L662"><span class="lineNum"> 662</span> : : * check if sw_xstop_fir_scom address is non-zero.</span> |
| <span id="L663"><span class="lineNum"> 663</span> : : */</span> |
| <span id="L664"><span class="lineNum"> 664</span> :<span class="tlaGNC tlaBgGNC"> 2 : if ((csize >= (offsetof(struct sppcrd_chip_info,</span></span> |
| <span id="L665"><span class="lineNum"> 665</span> :<span class="tlaUNC tlaBgUNC"> 0 : sw_xstop_fir_bitpos) + 1)) &&</span></span> |
| <span id="L666"><span class="lineNum"> 666</span> :<span class="tlaUNC"> 0 : cinfo->sw_xstop_fir_scom) {</span></span> |
| <span id="L667"><span class="lineNum"> 667</span> :<span class="tlaUNC"> 0 : uint8_t fir_bit = cinfo->sw_xstop_fir_bitpos;</span></span> |
| <span id="L668"><span class="lineNum"> 668</span> : : </span> |
| <span id="L669"><span class="lineNum"> 669</span> :<span class="tlaUNC"> 0 : if (!dt_find_property(dt_root, "ibm,sw-checkstop-fir"))</span></span> |
| <span id="L670"><span class="lineNum"> 670</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dt_root,</span></span> |
| <span id="L671"><span class="lineNum"> 671</span> : : "ibm,sw-checkstop-fir",</span> |
| <span id="L672"><span class="lineNum"> 672</span> : : be32_to_cpu(cinfo->sw_xstop_fir_scom),</span> |
| <span id="L673"><span class="lineNum"> 673</span> : : fir_bit);</span> |
| <span id="L674"><span class="lineNum"> 674</span> : : }</span> |
| <span id="L675"><span class="lineNum"> 675</span> : : </span> |
| <span id="L676"><span class="lineNum"> 676</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (proc_gen >= proc_gen_p10) {</span></span> |
| <span id="L677"><span class="lineNum"> 677</span> :<span class="tlaUNC tlaBgUNC"> 0 : uint8_t primary_loc = cinfo->primary_topology_loc;</span></span> |
| <span id="L678"><span class="lineNum"> 678</span> : : </span> |
| <span id="L679"><span class="lineNum"> 679</span> :<span class="tlaUNC"> 0 : if (primary_loc >= CHIP_MAX_TOPOLOGY_ENTRIES) {</span></span> |
| <span id="L680"><span class="lineNum"> 680</span> :<span class="tlaUNC"> 0 : prerror("XSCOM: Invalid primary topology index %d\n",</span></span> |
| <span id="L681"><span class="lineNum"> 681</span> : : primary_loc);</span> |
| <span id="L682"><span class="lineNum"> 682</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L683"><span class="lineNum"> 683</span> : : }</span> |
| <span id="L684"><span class="lineNum"> 684</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(np, "ibm,primary-topology-index",</span></span> |
| <span id="L685"><span class="lineNum"> 685</span> : : cinfo->topology_id_table[primary_loc]);</span> |
| <span id="L686"><span class="lineNum"> 686</span> : : }</span> |
| <span id="L687"><span class="lineNum"> 687</span> : : }</span> |
| <span id="L688"><span class="lineNum"> 688</span> : : </span> |
| <span id="L689"><span class="lineNum"> 689</span> :<span class="tlaGNC tlaBgGNC"> 1 : return i > 0;</span></span> |
| <span id="L690"><span class="lineNum"> 690</span> : : }</span> |
| <span id="L691"><span class="lineNum"> 691</span> : : </span> |
| <span id="L692"><span class="lineNum"> 692</span> :<span class="tlaGNC"> 1 : static void add_xscom(void)</span></span> |
| <span id="L693"><span class="lineNum"> 693</span> : : {</span> |
| <span id="L694"><span class="lineNum"> 694</span> : : const void *ms_vpd;</span> |
| <span id="L695"><span class="lineNum"> 695</span> : : const struct msvpd_pmover_bsr_synchro *pmbs;</span> |
| <span id="L696"><span class="lineNum"> 696</span> : : unsigned int size;</span> |
| <span id="L697"><span class="lineNum"> 697</span> : : uint64_t xscom_base;</span> |
| <span id="L698"><span class="lineNum"> 698</span> : : </span> |
| <span id="L699"><span class="lineNum"> 699</span> :<span class="tlaGNC"> 1 : ms_vpd = get_hdif(&spiras->ntuples.ms_vpd, MSVPD_HDIF_SIG);</span></span> |
| <span id="L700"><span class="lineNum"> 700</span> :<span class="tlaGNC"> 1 : if (!ms_vpd) {</span></span> |
| <span id="L701"><span class="lineNum"> 701</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("XSCOM: Can't find MS VPD\n");</span></span> |
| <span id="L702"><span class="lineNum"> 702</span> :<span class="tlaGNC tlaBgGNC"> 1 : return;</span></span> |
| <span id="L703"><span class="lineNum"> 703</span> : : }</span> |
| <span id="L704"><span class="lineNum"> 704</span> : : </span> |
| <span id="L705"><span class="lineNum"> 705</span> :<span class="tlaGNC"> 1 : pmbs = HDIF_get_idata(ms_vpd, MSVPD_IDATA_PMOVER_SYNCHRO, &size);</span></span> |
| <span id="L706"><span class="lineNum"> 706</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(pmbs) || size < sizeof(*pmbs)) {</span></span> |
| <span id="L707"><span class="lineNum"> 707</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("XSCOM: absent or bad PMBS size %u @ %p\n", size, pmbs);</span></span> |
| <span id="L708"><span class="lineNum"> 708</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L709"><span class="lineNum"> 709</span> : : }</span> |
| <span id="L710"><span class="lineNum"> 710</span> : : </span> |
| <span id="L711"><span class="lineNum"> 711</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (!(be32_to_cpu(pmbs->flags) & MSVPD_PMS_FLAG_XSCOMBASE_VALID)) {</span></span> |
| <span id="L712"><span class="lineNum"> 712</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("XSCOM: No XSCOM base in PMBS, using default\n");</span></span> |
| <span id="L713"><span class="lineNum"> 713</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L714"><span class="lineNum"> 714</span> : : }</span> |
| <span id="L715"><span class="lineNum"> 715</span> : : </span> |
| <span id="L716"><span class="lineNum"> 716</span> :<span class="tlaGNC tlaBgGNC"> 1 : xscom_base = be64_to_cpu(pmbs->xscom_addr);</span></span> |
| <span id="L717"><span class="lineNum"> 717</span> : : </span> |
| <span id="L718"><span class="lineNum"> 718</span> : : /* Get rid of the top bits */</span> |
| <span id="L719"><span class="lineNum"> 719</span> :<span class="tlaGNC"> 1 : xscom_base = cleanup_addr(xscom_base);</span></span> |
| <span id="L720"><span class="lineNum"> 720</span> : : </span> |
| <span id="L721"><span class="lineNum"> 721</span> : : /* First, try the new proc_chip ntuples for chip data */</span> |
| <span id="L722"><span class="lineNum"> 722</span> :<span class="tlaGNC"> 1 : if (add_xscom_sppcrd(xscom_base))</span></span> |
| <span id="L723"><span class="lineNum"> 723</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L724"><span class="lineNum"> 724</span> : : }</span> |
| <span id="L725"><span class="lineNum"> 725</span> : : </span> |
| <span id="L726"><span class="lineNum"> 726</span> :<span class="tlaGNC"> 2 : static void add_chiptod_node(unsigned int chip_id, int flags)</span></span> |
| <span id="L727"><span class="lineNum"> 727</span> : : {</span> |
| <span id="L728"><span class="lineNum"> 728</span> : : struct dt_node *node, *xscom_node;</span> |
| <span id="L729"><span class="lineNum"> 729</span> : : const char *compat_str;</span> |
| <span id="L730"><span class="lineNum"> 730</span> : : uint32_t addr, len;</span> |
| <span id="L731"><span class="lineNum"> 731</span> : : </span> |
| <span id="L732"><span class="lineNum"> 732</span> :<span class="tlaGNC"> 2 : if ((flags & CHIPTOD_ID_FLAGS_STATUS_MASK) !=</span></span> |
| <span id="L733"><span class="lineNum"> 733</span> : : CHIPTOD_ID_FLAGS_STATUS_OK)</span> |
| <span id="L734"><span class="lineNum"> 734</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L735"><span class="lineNum"> 735</span> : : </span> |
| <span id="L736"><span class="lineNum"> 736</span> :<span class="tlaGNC tlaBgGNC"> 2 : xscom_node = find_xscom_for_chip(chip_id);</span></span> |
| <span id="L737"><span class="lineNum"> 737</span> :<span class="tlaGNC"> 2 : if (!xscom_node) {</span></span> |
| <span id="L738"><span class="lineNum"> 738</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("CHIPTOD: No xscom for chiptod %d?\n", chip_id);</span></span> |
| <span id="L739"><span class="lineNum"> 739</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L740"><span class="lineNum"> 740</span> : : }</span> |
| <span id="L741"><span class="lineNum"> 741</span> : : </span> |
| <span id="L742"><span class="lineNum"> 742</span> :<span class="tlaGNC tlaBgGNC"> 2 : addr = 0x40000;</span></span> |
| <span id="L743"><span class="lineNum"> 743</span> :<span class="tlaGNC"> 2 : len = 0x34;</span></span> |
| <span id="L744"><span class="lineNum"> 744</span> : : </span> |
| <span id="L745"><span class="lineNum"> 745</span> :<span class="tlaGNC"> 2 : switch(proc_gen) {</span></span> |
| <span id="L746"><span class="lineNum"> 746</span> :<span class="tlaGNC"> 2 : case proc_gen_p8:</span></span> |
| <span id="L747"><span class="lineNum"> 747</span> :<span class="tlaGNC"> 2 : compat_str = "ibm,power8-chiptod";</span></span> |
| <span id="L748"><span class="lineNum"> 748</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L749"><span class="lineNum"> 749</span> :<span class="tlaUNC tlaBgUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L750"><span class="lineNum"> 750</span> :<span class="tlaUNC"> 0 : compat_str = "ibm,power9-chiptod";</span></span> |
| <span id="L751"><span class="lineNum"> 751</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L752"><span class="lineNum"> 752</span> :<span class="tlaUNC"> 0 : case proc_gen_p10:</span></span> |
| <span id="L753"><span class="lineNum"> 753</span> :<span class="tlaUNC"> 0 : compat_str = "ibm,power10-chiptod";</span></span> |
| <span id="L754"><span class="lineNum"> 754</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L755"><span class="lineNum"> 755</span> :<span class="tlaUNC"> 0 : case proc_gen_p11:</span></span> |
| <span id="L756"><span class="lineNum"> 756</span> :<span class="tlaUNC"> 0 : compat_str = "ibm,power11-chiptod";</span></span> |
| <span id="L757"><span class="lineNum"> 757</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L758"><span class="lineNum"> 758</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L759"><span class="lineNum"> 759</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L760"><span class="lineNum"> 760</span> : : }</span> |
| <span id="L761"><span class="lineNum"> 761</span> : : </span> |
| <span id="L762"><span class="lineNum"> 762</span> :<span class="tlaGNC tlaBgGNC"> 2 : prlog(PR_DEBUG, "CHIPTOD: Found on chip 0x%x %s\n", chip_id,</span></span> |
| <span id="L763"><span class="lineNum"> 763</span> : : (flags & CHIPTOD_ID_FLAGS_PRIMARY) ? "[primary]" :</span> |
| <span id="L764"><span class="lineNum"> 764</span> : : ((flags & CHIPTOD_ID_FLAGS_SECONDARY) ? "[secondary]" : ""));</span> |
| <span id="L765"><span class="lineNum"> 765</span> : : </span> |
| <span id="L766"><span class="lineNum"> 766</span> :<span class="tlaGNC"> 2 : node = dt_new_addr(xscom_node, "chiptod", addr);</span></span> |
| <span id="L767"><span class="lineNum"> 767</span> :<span class="tlaGNC"> 2 : if (!node)</span></span> |
| <span id="L768"><span class="lineNum"> 768</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L769"><span class="lineNum"> 769</span> : : </span> |
| <span id="L770"><span class="lineNum"> 770</span> :<span class="tlaGNC tlaBgGNC"> 2 : dt_add_property_cells(node, "reg", addr, len);</span></span> |
| <span id="L771"><span class="lineNum"> 771</span> :<span class="tlaGNC"> 2 : dt_add_property_strings(node, "compatible", "ibm,power-chiptod",</span></span> |
| <span id="L772"><span class="lineNum"> 772</span> : : compat_str);</span> |
| <span id="L773"><span class="lineNum"> 773</span> : : </span> |
| <span id="L774"><span class="lineNum"> 774</span> :<span class="tlaGNC"> 2 : if (flags & CHIPTOD_ID_FLAGS_PRIMARY)</span></span> |
| <span id="L775"><span class="lineNum"> 775</span> :<span class="tlaGNC"> 1 : dt_add_property(node, "primary", NULL, 0);</span></span> |
| <span id="L776"><span class="lineNum"> 776</span> :<span class="tlaGNC"> 2 : if (flags & CHIPTOD_ID_FLAGS_SECONDARY)</span></span> |
| <span id="L777"><span class="lineNum"> 777</span> :<span class="tlaGNC"> 1 : dt_add_property(node, "secondary", NULL, 0);</span></span> |
| <span id="L778"><span class="lineNum"> 778</span> : : }</span> |
| <span id="L779"><span class="lineNum"> 779</span> : : </span> |
| <span id="L780"><span class="lineNum"> 780</span> :<span class="tlaGNC"> 1 : static bool add_chiptod(void)</span></span> |
| <span id="L781"><span class="lineNum"> 781</span> : : {</span> |
| <span id="L782"><span class="lineNum"> 782</span> : : const void *hdif;</span> |
| <span id="L783"><span class="lineNum"> 783</span> : : unsigned int i;</span> |
| <span id="L784"><span class="lineNum"> 784</span> :<span class="tlaGNC"> 1 : bool found = false;</span></span> |
| <span id="L785"><span class="lineNum"> 785</span> : : </span> |
| <span id="L786"><span class="lineNum"> 786</span> : : /*</span> |
| <span id="L787"><span class="lineNum"> 787</span> : : * Locate Proc Chip ID structures in SPIRA</span> |
| <span id="L788"><span class="lineNum"> 788</span> : : */</span> |
| <span id="L789"><span class="lineNum"> 789</span> :<span class="tlaGNC"> 1 : if (!get_hdif(&spiras->ntuples.proc_chip, SPPCRD_HDIF_SIG))</span></span> |
| <span id="L790"><span class="lineNum"> 790</span> :<span class="tlaUNC tlaBgUNC"> 0 : return found;</span></span> |
| <span id="L791"><span class="lineNum"> 791</span> : : </span> |
| <span id="L792"><span class="lineNum"> 792</span> :<span class="tlaGNC tlaBgGNC"> 33 : for_each_ntuple_idx(&spiras->ntuples.proc_chip, hdif, i,</span></span> |
| <span id="L793"><span class="lineNum"> 793</span> : : SPPCRD_HDIF_SIG) {</span> |
| <span id="L794"><span class="lineNum"> 794</span> : : const struct sppcrd_chip_info *cinfo;</span> |
| <span id="L795"><span class="lineNum"> 795</span> : : const struct sppcrd_chip_tod *tinfo;</span> |
| <span id="L796"><span class="lineNum"> 796</span> : : unsigned int size;</span> |
| <span id="L797"><span class="lineNum"> 797</span> : : u32 ve, flags;</span> |
| <span id="L798"><span class="lineNum"> 798</span> : : </span> |
| <span id="L799"><span class="lineNum"> 799</span> :<span class="tlaGNC"> 32 : cinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO, NULL);</span></span> |
| <span id="L800"><span class="lineNum"> 800</span> :<span class="tlaGNC"> 32 : if (!CHECK_SPPTR(cinfo)) {</span></span> |
| <span id="L801"><span class="lineNum"> 801</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("CHIPTOD: Bad ChipID data %d\n", i);</span></span> |
| <span id="L802"><span class="lineNum"> 802</span> :<span class="tlaGNC tlaBgGNC"> 30 : continue;</span></span> |
| <span id="L803"><span class="lineNum"> 803</span> : : }</span> |
| <span id="L804"><span class="lineNum"> 804</span> : : </span> |
| <span id="L805"><span class="lineNum"> 805</span> :<span class="tlaGNC"> 32 : ve = be32_to_cpu(cinfo->verif_exist_flags) & CHIP_VERIFY_MASK;</span></span> |
| <span id="L806"><span class="lineNum"> 806</span> :<span class="tlaGNC"> 32 : ve >>= CHIP_VERIFY_SHIFT;</span></span> |
| <span id="L807"><span class="lineNum"> 807</span> :<span class="tlaGNC"> 32 : if (ve == CHIP_VERIFY_NOT_INSTALLED ||</span></span> |
| <span id="L808"><span class="lineNum"> 808</span> : : ve == CHIP_VERIFY_UNUSABLE)</span> |
| <span id="L809"><span class="lineNum"> 809</span> :<span class="tlaGNC"> 30 : continue;</span></span> |
| <span id="L810"><span class="lineNum"> 810</span> : : </span> |
| <span id="L811"><span class="lineNum"> 811</span> :<span class="tlaGNC"> 2 : tinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_TOD, &size);</span></span> |
| <span id="L812"><span class="lineNum"> 812</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(tinfo)) {</span></span> |
| <span id="L813"><span class="lineNum"> 813</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("CHIPTOD: Bad TOD data %d\n", i);</span></span> |
| <span id="L814"><span class="lineNum"> 814</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L815"><span class="lineNum"> 815</span> : : }</span> |
| <span id="L816"><span class="lineNum"> 816</span> : : </span> |
| <span id="L817"><span class="lineNum"> 817</span> :<span class="tlaGNC tlaBgGNC"> 2 : flags = be32_to_cpu(tinfo->flags);</span></span> |
| <span id="L818"><span class="lineNum"> 818</span> : : </span> |
| <span id="L819"><span class="lineNum"> 819</span> : : /* The FSP may strip the chiptod info from HDAT; if we find</span> |
| <span id="L820"><span class="lineNum"> 820</span> : : * a zero-ed out entry, assume that the chiptod is</span> |
| <span id="L821"><span class="lineNum"> 821</span> : : * present, but we don't have any primary/secondary info. In</span> |
| <span id="L822"><span class="lineNum"> 822</span> : : * this case, pick chip zero as the master.</span> |
| <span id="L823"><span class="lineNum"> 823</span> : : */</span> |
| <span id="L824"><span class="lineNum"> 824</span> :<span class="tlaGNC"> 2 : if (!size) {</span></span> |
| <span id="L825"><span class="lineNum"> 825</span> :<span class="tlaUNC tlaBgUNC"> 0 : flags = CHIPTOD_ID_FLAGS_STATUS_OK;</span></span> |
| <span id="L826"><span class="lineNum"> 826</span> :<span class="tlaUNC"> 0 : if (be32_to_cpu(cinfo->xscom_id) == 0x0)</span></span> |
| <span id="L827"><span class="lineNum"> 827</span> :<span class="tlaUNC"> 0 : flags |= CHIPTOD_ID_FLAGS_PRIMARY;</span></span> |
| <span id="L828"><span class="lineNum"> 828</span> : : }</span> |
| <span id="L829"><span class="lineNum"> 829</span> : : </span> |
| <span id="L830"><span class="lineNum"> 830</span> :<span class="tlaGNC tlaBgGNC"> 2 : add_chiptod_node(get_xscom_id(cinfo), flags);</span></span> |
| <span id="L831"><span class="lineNum"> 831</span> :<span class="tlaGNC"> 2 : found = true;</span></span> |
| <span id="L832"><span class="lineNum"> 832</span> : : }</span> |
| <span id="L833"><span class="lineNum"> 833</span> :<span class="tlaGNC"> 1 : return found;</span></span> |
| <span id="L834"><span class="lineNum"> 834</span> : : }</span> |
| <span id="L835"><span class="lineNum"> 835</span> : : </span> |
| <span id="L836"><span class="lineNum"> 836</span> :<span class="tlaGNC"> 2 : static void add_nx_node(u32 gcid)</span></span> |
| <span id="L837"><span class="lineNum"> 837</span> : : {</span> |
| <span id="L838"><span class="lineNum"> 838</span> : : struct dt_node *nx;</span> |
| <span id="L839"><span class="lineNum"> 839</span> : : u32 addr;</span> |
| <span id="L840"><span class="lineNum"> 840</span> : : u32 size;</span> |
| <span id="L841"><span class="lineNum"> 841</span> : : struct dt_node *xscom;</span> |
| <span id="L842"><span class="lineNum"> 842</span> : : </span> |
| <span id="L843"><span class="lineNum"> 843</span> :<span class="tlaGNC"> 2 : xscom = find_xscom_for_chip(gcid);</span></span> |
| <span id="L844"><span class="lineNum"> 844</span> :<span class="tlaGNC"> 2 : if (xscom == NULL) {</span></span> |
| <span id="L845"><span class="lineNum"> 845</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("NX%d: did not found xscom node.\n", gcid);</span></span> |
| <span id="L846"><span class="lineNum"> 846</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L847"><span class="lineNum"> 847</span> : : }</span> |
| <span id="L848"><span class="lineNum"> 848</span> : : </span> |
| <span id="L849"><span class="lineNum"> 849</span> : : /*</span> |
| <span id="L850"><span class="lineNum"> 850</span> : : * The NX register space is relatively self contained on P7+ but</span> |
| <span id="L851"><span class="lineNum"> 851</span> : : * a bit more messy on P8. However it's all contained within the</span> |
| <span id="L852"><span class="lineNum"> 852</span> : : * PB chiplet port 1 so we'll stick to that in the "reg" property</span> |
| <span id="L853"><span class="lineNum"> 853</span> : : * and let the NX "driver" deal with the details.</span> |
| <span id="L854"><span class="lineNum"> 854</span> : : */</span> |
| <span id="L855"><span class="lineNum"> 855</span> :<span class="tlaGNC tlaBgGNC"> 2 : addr = 0x2010000;</span></span> |
| <span id="L856"><span class="lineNum"> 856</span> :<span class="tlaGNC"> 2 : size = 0x0004000;</span></span> |
| <span id="L857"><span class="lineNum"> 857</span> : : </span> |
| <span id="L858"><span class="lineNum"> 858</span> :<span class="tlaGNC"> 2 : nx = dt_new_addr(xscom, "nx", addr);</span></span> |
| <span id="L859"><span class="lineNum"> 859</span> :<span class="tlaGNC"> 2 : if (!nx)</span></span> |
| <span id="L860"><span class="lineNum"> 860</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L861"><span class="lineNum"> 861</span> : : </span> |
| <span id="L862"><span class="lineNum"> 862</span> :<span class="tlaGNC tlaBgGNC"> 2 : switch (proc_gen) {</span></span> |
| <span id="L863"><span class="lineNum"> 863</span> :<span class="tlaGNC"> 2 : case proc_gen_p8:</span></span> |
| <span id="L864"><span class="lineNum"> 864</span> :<span class="tlaGNC"> 2 : dt_add_property_strings(nx, "compatible", "ibm,power-nx",</span></span> |
| <span id="L865"><span class="lineNum"> 865</span> : : "ibm,power8-nx");</span> |
| <span id="L866"><span class="lineNum"> 866</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L867"><span class="lineNum"> 867</span> :<span class="tlaUNC tlaBgUNC"> 0 : case proc_gen_p9:</span></span> |
| <span id="L868"><span class="lineNum"> 868</span> : : case proc_gen_p10:</span> |
| <span id="L869"><span class="lineNum"> 869</span> : : case proc_gen_p11:</span> |
| <span id="L870"><span class="lineNum"> 870</span> : : /* POWER9 NX is not software compatible with P8 NX */</span> |
| <span id="L871"><span class="lineNum"> 871</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(nx, "compatible", "ibm,power9-nx");</span></span> |
| <span id="L872"><span class="lineNum"> 872</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L873"><span class="lineNum"> 873</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L874"><span class="lineNum"> 874</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L875"><span class="lineNum"> 875</span> : : }</span> |
| <span id="L876"><span class="lineNum"> 876</span> : : </span> |
| <span id="L877"><span class="lineNum"> 877</span> :<span class="tlaGNC tlaBgGNC"> 2 : dt_add_property_cells(nx, "reg", addr, size);</span></span> |
| <span id="L878"><span class="lineNum"> 878</span> : : }</span> |
| <span id="L879"><span class="lineNum"> 879</span> : : </span> |
| <span id="L880"><span class="lineNum"> 880</span> :<span class="tlaGNC"> 1 : static void add_nx(void)</span></span> |
| <span id="L881"><span class="lineNum"> 881</span> : : {</span> |
| <span id="L882"><span class="lineNum"> 882</span> : : unsigned int i;</span> |
| <span id="L883"><span class="lineNum"> 883</span> : : void *hdif;</span> |
| <span id="L884"><span class="lineNum"> 884</span> : : </span> |
| <span id="L885"><span class="lineNum"> 885</span> :<span class="tlaGNC"> 33 : for_each_ntuple_idx(&spiras->ntuples.proc_chip, hdif, i,</span></span> |
| <span id="L886"><span class="lineNum"> 886</span> : : SPPCRD_HDIF_SIG) {</span> |
| <span id="L887"><span class="lineNum"> 887</span> : : const struct sppcrd_chip_info *cinfo;</span> |
| <span id="L888"><span class="lineNum"> 888</span> : : u32 ve;</span> |
| <span id="L889"><span class="lineNum"> 889</span> : : </span> |
| <span id="L890"><span class="lineNum"> 890</span> :<span class="tlaGNC"> 32 : cinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO, NULL);</span></span> |
| <span id="L891"><span class="lineNum"> 891</span> :<span class="tlaGNC"> 32 : if (!CHECK_SPPTR(cinfo)) {</span></span> |
| <span id="L892"><span class="lineNum"> 892</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("NX: Bad ChipID data %d\n", i);</span></span> |
| <span id="L893"><span class="lineNum"> 893</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L894"><span class="lineNum"> 894</span> : : }</span> |
| <span id="L895"><span class="lineNum"> 895</span> : : </span> |
| <span id="L896"><span class="lineNum"> 896</span> :<span class="tlaGNC tlaBgGNC"> 32 : ve = be32_to_cpu(cinfo->verif_exist_flags) & CHIP_VERIFY_MASK;</span></span> |
| <span id="L897"><span class="lineNum"> 897</span> :<span class="tlaGNC"> 32 : ve >>= CHIP_VERIFY_SHIFT;</span></span> |
| <span id="L898"><span class="lineNum"> 898</span> :<span class="tlaGNC"> 32 : if (ve == CHIP_VERIFY_NOT_INSTALLED ||</span></span> |
| <span id="L899"><span class="lineNum"> 899</span> : : ve == CHIP_VERIFY_UNUSABLE)</span> |
| <span id="L900"><span class="lineNum"> 900</span> :<span class="tlaGNC"> 30 : continue;</span></span> |
| <span id="L901"><span class="lineNum"> 901</span> : : </span> |
| <span id="L902"><span class="lineNum"> 902</span> :<span class="tlaGNC"> 2 : if (cinfo->nx_state)</span></span> |
| <span id="L903"><span class="lineNum"> 903</span> :<span class="tlaGNC"> 2 : add_nx_node(get_xscom_id(cinfo));</span></span> |
| <span id="L904"><span class="lineNum"> 904</span> : : }</span> |
| <span id="L905"><span class="lineNum"> 905</span> :<span class="tlaGNC"> 1 : }</span></span> |
| <span id="L906"><span class="lineNum"> 906</span> : : </span> |
| <span id="L907"><span class="lineNum"> 907</span> :<span class="tlaGNC"> 1 : static void add_nmmu(void)</span></span> |
| <span id="L908"><span class="lineNum"> 908</span> : : {</span> |
| <span id="L909"><span class="lineNum"> 909</span> : : struct dt_node *xscom, *nmmu;</span> |
| <span id="L910"><span class="lineNum"> 910</span> : : u32 scom1, scom2;</span> |
| <span id="L911"><span class="lineNum"> 911</span> : : u32 chip_id;</span> |
| <span id="L912"><span class="lineNum"> 912</span> : : </span> |
| <span id="L913"><span class="lineNum"> 913</span> : : /* Nest MMU only exists on POWER9 or later */</span> |
| <span id="L914"><span class="lineNum"> 914</span> :<span class="tlaGNC"> 1 : if (proc_gen < proc_gen_p9)</span></span> |
| <span id="L915"><span class="lineNum"> 915</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L916"><span class="lineNum"> 916</span> : : </span> |
| <span id="L917"><span class="lineNum"> 917</span> :<span class="tlaUNC tlaBgUNC"> 0 : if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11) {</span></span> |
| <span id="L918"><span class="lineNum"> 918</span> :<span class="tlaUNC"> 0 : scom1 = 0x2010c40;</span></span> |
| <span id="L919"><span class="lineNum"> 919</span> :<span class="tlaUNC"> 0 : scom2 = 0x3010c40;</span></span> |
| <span id="L920"><span class="lineNum"> 920</span> : : } else</span> |
| <span id="L921"><span class="lineNum"> 921</span> :<span class="tlaUNC"> 0 : scom1 = 0x5012c40;</span></span> |
| <span id="L922"><span class="lineNum"> 922</span> : : </span> |
| <span id="L923"><span class="lineNum"> 923</span> :<span class="tlaUNC"> 0 : dt_for_each_compatible(dt_root, xscom, "ibm,xscom") {</span></span> |
| <span id="L924"><span class="lineNum"> 924</span> :<span class="tlaUNC"> 0 : nmmu = dt_new_addr(xscom, "nmmu", scom1);</span></span> |
| <span id="L925"><span class="lineNum"> 925</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(nmmu, "compatible", "ibm,power9-nest-mmu");</span></span> |
| <span id="L926"><span class="lineNum"> 926</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(nmmu, "reg", scom1, 0x20);</span></span> |
| <span id="L927"><span class="lineNum"> 927</span> : : </span> |
| <span id="L928"><span class="lineNum"> 928</span> : : /*</span> |
| <span id="L929"><span class="lineNum"> 929</span> : : * P10 has a second nMMU, a.k.a "south" nMMU.</span> |
| <span id="L930"><span class="lineNum"> 930</span> : : * It exists only on P1 and P3</span> |
| <span id="L931"><span class="lineNum"> 931</span> : : */</span> |
| <span id="L932"><span class="lineNum"> 932</span> :<span class="tlaUNC"> 0 : if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11) {</span></span> |
| <span id="L933"><span class="lineNum"> 933</span> : : </span> |
| <span id="L934"><span class="lineNum"> 934</span> :<span class="tlaUNC"> 0 : chip_id = __dt_get_chip_id(xscom);</span></span> |
| <span id="L935"><span class="lineNum"> 935</span> :<span class="tlaUNC"> 0 : if (chip_id != 2 && chip_id != 6)</span></span> |
| <span id="L936"><span class="lineNum"> 936</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L937"><span class="lineNum"> 937</span> : : </span> |
| <span id="L938"><span class="lineNum"> 938</span> :<span class="tlaUNC"> 0 : nmmu = dt_new_addr(xscom, "nmmu", scom2);</span></span> |
| <span id="L939"><span class="lineNum"> 939</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(nmmu, "compatible", "ibm,power9-nest-mmu");</span></span> |
| <span id="L940"><span class="lineNum"> 940</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(nmmu, "reg", scom2, 0x20);</span></span> |
| <span id="L941"><span class="lineNum"> 941</span> : : }</span> |
| <span id="L942"><span class="lineNum"> 942</span> : : }</span> |
| <span id="L943"><span class="lineNum"> 943</span> : : }</span> |
| <span id="L944"><span class="lineNum"> 944</span> : : </span> |
| <span id="L945"><span class="lineNum"> 945</span> :<span class="tlaUNC"> 0 : static void dt_init_secureboot_node(const struct iplparams_sysparams *sysparams)</span></span> |
| <span id="L946"><span class="lineNum"> 946</span> : : {</span> |
| <span id="L947"><span class="lineNum"> 947</span> : : struct dt_node *node;</span> |
| <span id="L948"><span class="lineNum"> 948</span> : : u16 sys_sec_setting;</span> |
| <span id="L949"><span class="lineNum"> 949</span> : : u16 hw_key_hash_size;</span> |
| <span id="L950"><span class="lineNum"> 950</span> : : u16 host_fw_key_clear;</span> |
| <span id="L951"><span class="lineNum"> 951</span> : : </span> |
| <span id="L952"><span class="lineNum"> 952</span> :<span class="tlaUNC"> 0 : node = dt_new(dt_root, "ibm,secureboot");</span></span> |
| <span id="L953"><span class="lineNum"> 953</span> :<span class="tlaUNC"> 0 : assert(node);</span></span> |
| <span id="L954"><span class="lineNum"> 954</span> : : </span> |
| <span id="L955"><span class="lineNum"> 955</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(node, "compatible",</span></span> |
| <span id="L956"><span class="lineNum"> 956</span> : : "ibm,secureboot", "ibm,secureboot-v2");</span> |
| <span id="L957"><span class="lineNum"> 957</span> : : </span> |
| <span id="L958"><span class="lineNum"> 958</span> :<span class="tlaUNC"> 0 : sys_sec_setting = be16_to_cpu(sysparams->sys_sec_setting);</span></span> |
| <span id="L959"><span class="lineNum"> 959</span> :<span class="tlaUNC"> 0 : if (sys_sec_setting & SEC_CONTAINER_SIG_CHECKING)</span></span> |
| <span id="L960"><span class="lineNum"> 960</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "secure-enabled", NULL, 0);</span></span> |
| <span id="L961"><span class="lineNum"> 961</span> :<span class="tlaUNC"> 0 : if (sys_sec_setting & SEC_HASHES_EXTENDED_TO_TPM)</span></span> |
| <span id="L962"><span class="lineNum"> 962</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "trusted-enabled", NULL, 0);</span></span> |
| <span id="L963"><span class="lineNum"> 963</span> :<span class="tlaUNC"> 0 : if (sys_sec_setting & PHYSICAL_PRESENCE_ASSERTED)</span></span> |
| <span id="L964"><span class="lineNum"> 964</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "physical-presence-asserted", NULL, 0);</span></span> |
| <span id="L965"><span class="lineNum"> 965</span> : : </span> |
| <span id="L966"><span class="lineNum"> 966</span> :<span class="tlaUNC"> 0 : host_fw_key_clear = be16_to_cpu(sysparams->host_fw_key_clear);</span></span> |
| <span id="L967"><span class="lineNum"> 967</span> :<span class="tlaUNC"> 0 : if (host_fw_key_clear & KEY_CLEAR_OS_KEYS)</span></span> |
| <span id="L968"><span class="lineNum"> 968</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "clear-os-keys", NULL, 0);</span></span> |
| <span id="L969"><span class="lineNum"> 969</span> :<span class="tlaUNC"> 0 : if (host_fw_key_clear & KEY_CLEAR_MFG)</span></span> |
| <span id="L970"><span class="lineNum"> 970</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "clear-mfg-keys", NULL, 0);</span></span> |
| <span id="L971"><span class="lineNum"> 971</span> :<span class="tlaUNC"> 0 : if (host_fw_key_clear & KEY_CLEAR_ALL)</span></span> |
| <span id="L972"><span class="lineNum"> 972</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "clear-all-keys", NULL, 0);</span></span> |
| <span id="L973"><span class="lineNum"> 973</span> : : </span> |
| <span id="L974"><span class="lineNum"> 974</span> :<span class="tlaUNC"> 0 : hw_key_hash_size = be16_to_cpu(sysparams->hw_key_hash_size);</span></span> |
| <span id="L975"><span class="lineNum"> 975</span> : : </span> |
| <span id="L976"><span class="lineNum"> 976</span> : : /* Prevent hw-key-hash buffer overflow by truncating hw-key-hash-size if</span> |
| <span id="L977"><span class="lineNum"> 977</span> : : * it is bigger than the hw-key-hash buffer.</span> |
| <span id="L978"><span class="lineNum"> 978</span> : : * Secure boot will be enforced later in skiboot, if the hw-key-hash-size</span> |
| <span id="L979"><span class="lineNum"> 979</span> : : * was not supposed to be SYSPARAMS_HW_KEY_HASH_MAX.</span> |
| <span id="L980"><span class="lineNum"> 980</span> : : */</span> |
| <span id="L981"><span class="lineNum"> 981</span> :<span class="tlaUNC"> 0 : if (hw_key_hash_size > SYSPARAMS_HW_KEY_HASH_MAX) {</span></span> |
| <span id="L982"><span class="lineNum"> 982</span> :<span class="tlaUNC"> 0 : prlog(PR_ERR, "IPLPARAMS: hw-key-hash-size=%d too big, "</span></span> |
| <span id="L983"><span class="lineNum"> 983</span> : : "truncating to %d\n", hw_key_hash_size,</span> |
| <span id="L984"><span class="lineNum"> 984</span> : : SYSPARAMS_HW_KEY_HASH_MAX);</span> |
| <span id="L985"><span class="lineNum"> 985</span> :<span class="tlaUNC"> 0 : hw_key_hash_size = SYSPARAMS_HW_KEY_HASH_MAX;</span></span> |
| <span id="L986"><span class="lineNum"> 986</span> : : }</span> |
| <span id="L987"><span class="lineNum"> 987</span> : : </span> |
| <span id="L988"><span class="lineNum"> 988</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "hw-key-hash", sysparams->hw_key_hash,</span></span> |
| <span id="L989"><span class="lineNum"> 989</span> : : hw_key_hash_size);</span> |
| <span id="L990"><span class="lineNum"> 990</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "hw-key-hash-size", hw_key_hash_size);</span></span> |
| <span id="L991"><span class="lineNum"> 991</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L992"><span class="lineNum"> 992</span> : : </span> |
| <span id="L993"><span class="lineNum"> 993</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void opal_dump_add_mpipl_boot(const struct iplparams_iplparams *p)</span></span> |
| <span id="L994"><span class="lineNum"> 994</span> : : {</span> |
| <span id="L995"><span class="lineNum"> 995</span> :<span class="tlaGNC"> 1 : u32 mdrt_cnt = be16_to_cpu(spirah.ntuples.mdump_res.act_cnt);</span></span> |
| <span id="L996"><span class="lineNum"> 996</span> :<span class="tlaGNC"> 1 : u32 mdrt_max_cnt = MDRT_TABLE_SIZE / sizeof(struct mdrt_table);</span></span> |
| <span id="L997"><span class="lineNum"> 997</span> : : struct dt_node *dump_node;</span> |
| <span id="L998"><span class="lineNum"> 998</span> : : </span> |
| <span id="L999"><span class="lineNum"> 999</span> :<span class="tlaGNC"> 1 : dump_node = dt_find_by_path(opal_node, "dump");</span></span> |
| <span id="L1000"><span class="lineNum"> 1000</span> :<span class="tlaGNC"> 1 : if (!dump_node)</span></span> |
| <span id="L1001"><span class="lineNum"> 1001</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L1002"><span class="lineNum"> 1002</span> : : </span> |
| <span id="L1003"><span class="lineNum"> 1003</span> : : /* Check boot params to detect MPIPL boot or not */</span> |
| <span id="L1004"><span class="lineNum"> 1004</span> :<span class="tlaUNC tlaBgUNC"> 0 : if (p->cec_ipl_maj_type != IPLPARAMS_MAJ_TYPE_REIPL)</span></span> |
| <span id="L1005"><span class="lineNum"> 1005</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1006"><span class="lineNum"> 1006</span> : : </span> |
| <span id="L1007"><span class="lineNum"> 1007</span> : : /*</span> |
| <span id="L1008"><span class="lineNum"> 1008</span> : : * On FSP system we get minor type as post dump IPL and on BMC system</span> |
| <span id="L1009"><span class="lineNum"> 1009</span> : : * we get platform reboot. Hence lets check for both values.</span> |
| <span id="L1010"><span class="lineNum"> 1010</span> : : */</span> |
| <span id="L1011"><span class="lineNum"> 1011</span> :<span class="tlaUNC"> 0 : if (p->cec_ipl_min_type != IPLPARAMS_MIN_TYPE_POST_DUMP &&</span></span> |
| <span id="L1012"><span class="lineNum"> 1012</span> :<span class="tlaUNC"> 0 : p->cec_ipl_min_type != IPLPARAMS_MIN_TYPE_PLAT_REBOOT) {</span></span> |
| <span id="L1013"><span class="lineNum"> 1013</span> :<span class="tlaUNC"> 0 : prlog(PR_NOTICE, "DUMP: Non MPIPL reboot "</span></span> |
| <span id="L1014"><span class="lineNum"> 1014</span> : : "[minor type = 0x%x]\n", p->cec_ipl_min_type);</span> |
| <span id="L1015"><span class="lineNum"> 1015</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1016"><span class="lineNum"> 1016</span> : : }</span> |
| <span id="L1017"><span class="lineNum"> 1017</span> : : </span> |
| <span id="L1018"><span class="lineNum"> 1018</span> :<span class="tlaUNC"> 0 : if (be16_to_cpu(p->cec_ipl_attrib) != IPLPARAMS_ATTRIB_MEM_PRESERVE) {</span></span> |
| <span id="L1019"><span class="lineNum"> 1019</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "DUMP: Memory not preserved\n");</span></span> |
| <span id="L1020"><span class="lineNum"> 1020</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1021"><span class="lineNum"> 1021</span> : : }</span> |
| <span id="L1022"><span class="lineNum"> 1022</span> : : </span> |
| <span id="L1023"><span class="lineNum"> 1023</span> :<span class="tlaUNC"> 0 : if (mdrt_cnt == 0 || mdrt_cnt >= mdrt_max_cnt) {</span></span> |
| <span id="L1024"><span class="lineNum"> 1024</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "DUMP: Invalid MDRT count : %x\n", mdrt_cnt);</span></span> |
| <span id="L1025"><span class="lineNum"> 1025</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1026"><span class="lineNum"> 1026</span> : : }</span> |
| <span id="L1027"><span class="lineNum"> 1027</span> : : </span> |
| <span id="L1028"><span class="lineNum"> 1028</span> :<span class="tlaUNC"> 0 : prlog(PR_NOTICE, "DUMP: Dump found, MDRT count = 0x%x\n", mdrt_cnt);</span></span> |
| <span id="L1029"><span class="lineNum"> 1029</span> : : </span> |
| <span id="L1030"><span class="lineNum"> 1030</span> :<span class="tlaUNC"> 0 : dt_add_property(dump_node, "mpipl-boot", NULL, 0);</span></span> |
| <span id="L1031"><span class="lineNum"> 1031</span> : : }</span> |
| <span id="L1032"><span class="lineNum"> 1032</span> : : </span> |
| <span id="L1033"><span class="lineNum"> 1033</span> :<span class="tlaUNC"> 0 : static void add_opal_dump_node(void)</span></span> |
| <span id="L1034"><span class="lineNum"> 1034</span> : : {</span> |
| <span id="L1035"><span class="lineNum"> 1035</span> : : __be64 fw_load_area[4];</span> |
| <span id="L1036"><span class="lineNum"> 1036</span> : : struct dt_node *node;</span> |
| <span id="L1037"><span class="lineNum"> 1037</span> : : </span> |
| <span id="L1038"><span class="lineNum"> 1038</span> :<span class="tlaUNC"> 0 : opal_node = dt_new_check(dt_root, "ibm,opal");</span></span> |
| <span id="L1039"><span class="lineNum"> 1039</span> :<span class="tlaUNC"> 0 : node = dt_new(opal_node, "dump");</span></span> |
| <span id="L1040"><span class="lineNum"> 1040</span> :<span class="tlaUNC"> 0 : assert(node);</span></span> |
| <span id="L1041"><span class="lineNum"> 1041</span> :<span class="tlaUNC"> 0 : dt_add_property_string(node, "compatible", "ibm,opal-dump");</span></span> |
| <span id="L1042"><span class="lineNum"> 1042</span> : : </span> |
| <span id="L1043"><span class="lineNum"> 1043</span> :<span class="tlaUNC"> 0 : fw_load_area[0] = cpu_to_be64((u64)KERNEL_LOAD_BASE);</span></span> |
| <span id="L1044"><span class="lineNum"> 1044</span> :<span class="tlaUNC"> 0 : fw_load_area[1] = cpu_to_be64(KERNEL_LOAD_SIZE);</span></span> |
| <span id="L1045"><span class="lineNum"> 1045</span> :<span class="tlaUNC"> 0 : fw_load_area[2] = cpu_to_be64((u64)INITRAMFS_LOAD_BASE);</span></span> |
| <span id="L1046"><span class="lineNum"> 1046</span> :<span class="tlaUNC"> 0 : fw_load_area[3] = cpu_to_be64(INITRAMFS_LOAD_SIZE);</span></span> |
| <span id="L1047"><span class="lineNum"> 1047</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "fw-load-area", fw_load_area, sizeof(fw_load_area));</span></span> |
| <span id="L1048"><span class="lineNum"> 1048</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L1049"><span class="lineNum"> 1049</span> : : </span> |
| <span id="L1050"><span class="lineNum"> 1050</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void add_iplparams_sys_params(const void *iplp, struct dt_node *node)</span></span> |
| <span id="L1051"><span class="lineNum"> 1051</span> : : {</span> |
| <span id="L1052"><span class="lineNum"> 1052</span> : : const struct iplparams_sysparams *p;</span> |
| <span id="L1053"><span class="lineNum"> 1053</span> :<span class="tlaGNC"> 1 : const struct HDIF_common_hdr *hdif = iplp;</span></span> |
| <span id="L1054"><span class="lineNum"> 1054</span> :<span class="tlaGNC"> 1 : u16 version = be16_to_cpu(hdif->version);</span></span> |
| <span id="L1055"><span class="lineNum"> 1055</span> :<span class="tlaGNC"> 1 : const char *vendor = NULL;</span></span> |
| <span id="L1056"><span class="lineNum"> 1056</span> : : u32 sys_attributes;</span> |
| <span id="L1057"><span class="lineNum"> 1057</span> : : u64 bus_speed;</span> |
| <span id="L1058"><span class="lineNum"> 1058</span> : : </span> |
| <span id="L1059"><span class="lineNum"> 1059</span> :<span class="tlaGNC"> 1 : p = HDIF_get_idata(iplp, IPLPARAMS_SYSPARAMS, NULL);</span></span> |
| <span id="L1060"><span class="lineNum"> 1060</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(p)) {</span></span> |
| <span id="L1061"><span class="lineNum"> 1061</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("IPLPARAMS: No SYS Parameters\n");</span></span> |
| <span id="L1062"><span class="lineNum"> 1062</span> : : /* Create a generic compatible property */</span> |
| <span id="L1063"><span class="lineNum"> 1063</span> :<span class="tlaUNC"> 0 : dt_add_property_string(dt_root, "compatible", "ibm,powernv");</span></span> |
| <span id="L1064"><span class="lineNum"> 1064</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1065"><span class="lineNum"> 1065</span> : : }</span> |
| <span id="L1066"><span class="lineNum"> 1066</span> : : </span> |
| <span id="L1067"><span class="lineNum"> 1067</span> :<span class="tlaGNC tlaBgGNC"> 1 : node = dt_new(node, "sys-params");</span></span> |
| <span id="L1068"><span class="lineNum"> 1068</span> :<span class="tlaGNC"> 1 : assert(node);</span></span> |
| <span id="L1069"><span class="lineNum"> 1069</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#address-cells", 0);</span></span> |
| <span id="L1070"><span class="lineNum"> 1070</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#size-cells", 0);</span></span> |
| <span id="L1071"><span class="lineNum"> 1071</span> : : </span> |
| <span id="L1072"><span class="lineNum"> 1072</span> :<span class="tlaGNC"> 1 : dt_add_property_nstr(node, "ibm,sys-model", p->sys_model, 4);</span></span> |
| <span id="L1073"><span class="lineNum"> 1073</span> : : </span> |
| <span id="L1074"><span class="lineNum"> 1074</span> : : /*</span> |
| <span id="L1075"><span class="lineNum"> 1075</span> : : * Compatible has up to three entries:</span> |
| <span id="L1076"><span class="lineNum"> 1076</span> : : * "ibm,powernv", the system family and system type.</span> |
| <span id="L1077"><span class="lineNum"> 1077</span> : : *</span> |
| <span id="L1078"><span class="lineNum"> 1078</span> : : * On P9 and above the family and type strings come from the HDAT</span> |
| <span id="L1079"><span class="lineNum"> 1079</span> : : * directly. On P8 we find it from the system ID numbers.</span> |
| <span id="L1080"><span class="lineNum"> 1080</span> : : */</span> |
| <span id="L1081"><span class="lineNum"> 1081</span> :<span class="tlaGNC"> 1 : if (proc_gen >= proc_gen_p9) {</span></span> |
| <span id="L1082"><span class="lineNum"> 1082</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_strings(dt_root, "compatible", "ibm,powernv",</span></span> |
| <span id="L1083"><span class="lineNum"> 1083</span> : : p->sys_family_str, p->sys_type_str);</span> |
| <span id="L1084"><span class="lineNum"> 1084</span> : : </span> |
| <span id="L1085"><span class="lineNum"> 1085</span> :<span class="tlaUNC"> 0 : prlog(PR_INFO, "IPLPARAMS: v0x70 Platform family/type: %s/%s\n",</span></span> |
| <span id="L1086"><span class="lineNum"> 1086</span> : : p->sys_family_str, p->sys_type_str);</span> |
| <span id="L1087"><span class="lineNum"> 1087</span> : : } else {</span> |
| <span id="L1088"><span class="lineNum"> 1088</span> :<span class="tlaGNC tlaBgGNC"> 1 : u32 sys_type = be32_to_cpu(p->system_type);</span></span> |
| <span id="L1089"><span class="lineNum"> 1089</span> : : const char *sys_family;</span> |
| <span id="L1090"><span class="lineNum"> 1090</span> : : </span> |
| <span id="L1091"><span class="lineNum"> 1091</span> :<span class="tlaGNC"> 1 : switch (sys_type >> 28) {</span></span> |
| <span id="L1092"><span class="lineNum"> 1092</span> :<span class="tlaUNC tlaBgUNC"> 0 : case 0:</span></span> |
| <span id="L1093"><span class="lineNum"> 1093</span> :<span class="tlaUNC"> 0 : sys_family = "ibm,squadrons";</span></span> |
| <span id="L1094"><span class="lineNum"> 1094</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1095"><span class="lineNum"> 1095</span> :<span class="tlaUNC"> 0 : case 1:</span></span> |
| <span id="L1096"><span class="lineNum"> 1096</span> :<span class="tlaUNC"> 0 : sys_family = "ibm,eclipz";</span></span> |
| <span id="L1097"><span class="lineNum"> 1097</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1098"><span class="lineNum"> 1098</span> :<span class="tlaUNC"> 0 : case 2:</span></span> |
| <span id="L1099"><span class="lineNum"> 1099</span> :<span class="tlaUNC"> 0 : sys_family = "ibm,apollo";</span></span> |
| <span id="L1100"><span class="lineNum"> 1100</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1101"><span class="lineNum"> 1101</span> :<span class="tlaGNC tlaBgGNC"> 1 : case 3:</span></span> |
| <span id="L1102"><span class="lineNum"> 1102</span> :<span class="tlaGNC"> 1 : sys_family = "ibm,firenze";</span></span> |
| <span id="L1103"><span class="lineNum"> 1103</span> :<span class="tlaGNC"> 1 : break;</span></span> |
| <span id="L1104"><span class="lineNum"> 1104</span> :<span class="tlaUNC tlaBgUNC"> 0 : default:</span></span> |
| <span id="L1105"><span class="lineNum"> 1105</span> :<span class="tlaUNC"> 0 : sys_family = NULL;</span></span> |
| <span id="L1106"><span class="lineNum"> 1106</span> :<span class="tlaUNC"> 0 : prerror("IPLPARAMS: Unknown system family\n");</span></span> |
| <span id="L1107"><span class="lineNum"> 1107</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1108"><span class="lineNum"> 1108</span> : : }</span> |
| <span id="L1109"><span class="lineNum"> 1109</span> : : </span> |
| <span id="L1110"><span class="lineNum"> 1110</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_add_property_strings(dt_root, "compatible", "ibm,powernv",</span></span> |
| <span id="L1111"><span class="lineNum"> 1111</span> : : sys_family);</span> |
| <span id="L1112"><span class="lineNum"> 1112</span> :<span class="tlaGNC"> 1 : prlog(PR_INFO,</span></span> |
| <span id="L1113"><span class="lineNum"> 1113</span> : : "IPLPARAMS: Legacy platform family: %s"</span> |
| <span id="L1114"><span class="lineNum"> 1114</span> : : " (sys_type=0x%08x)\n", sys_family, sys_type);</span> |
| <span id="L1115"><span class="lineNum"> 1115</span> : : }</span> |
| <span id="L1116"><span class="lineNum"> 1116</span> : : </span> |
| <span id="L1117"><span class="lineNum"> 1117</span> : : /* Grab nest frequency when available */</span> |
| <span id="L1118"><span class="lineNum"> 1118</span> :<span class="tlaGNC"> 1 : if (version >= 0x005b) {</span></span> |
| <span id="L1119"><span class="lineNum"> 1119</span> :<span class="tlaGNC"> 1 : u64 freq = be32_to_cpu(p->nest_freq_mhz);</span></span> |
| <span id="L1120"><span class="lineNum"> 1120</span> : : </span> |
| <span id="L1121"><span class="lineNum"> 1121</span> :<span class="tlaGNC"> 1 : freq *= 1000000;</span></span> |
| <span id="L1122"><span class="lineNum"> 1122</span> :<span class="tlaGNC"> 1 : dt_add_property_u64(dt_root, "nest-frequency", freq);</span></span> |
| <span id="L1123"><span class="lineNum"> 1123</span> : : }</span> |
| <span id="L1124"><span class="lineNum"> 1124</span> : : </span> |
| <span id="L1125"><span class="lineNum"> 1125</span> : : /* Grab ABC bus speed */</span> |
| <span id="L1126"><span class="lineNum"> 1126</span> :<span class="tlaGNC"> 1 : bus_speed = be32_to_cpu(p->abc_bus_speed);</span></span> |
| <span id="L1127"><span class="lineNum"> 1127</span> :<span class="tlaGNC"> 1 : if (bus_speed)</span></span> |
| <span id="L1128"><span class="lineNum"> 1128</span> :<span class="tlaGNC"> 1 : dt_add_property_u64(node, "abc-bus-freq-mhz", bus_speed);</span></span> |
| <span id="L1129"><span class="lineNum"> 1129</span> : : </span> |
| <span id="L1130"><span class="lineNum"> 1130</span> : : /* Grab WXYZ bus speed */</span> |
| <span id="L1131"><span class="lineNum"> 1131</span> :<span class="tlaGNC"> 1 : bus_speed = be32_to_cpu(p->wxyz_bus_speed);</span></span> |
| <span id="L1132"><span class="lineNum"> 1132</span> :<span class="tlaGNC"> 1 : if (bus_speed)</span></span> |
| <span id="L1133"><span class="lineNum"> 1133</span> :<span class="tlaGNC"> 1 : dt_add_property_u64(node, "wxyz-bus-freq-mhz", bus_speed);</span></span> |
| <span id="L1134"><span class="lineNum"> 1134</span> : : </span> |
| <span id="L1135"><span class="lineNum"> 1135</span> :<span class="tlaGNC"> 1 : if (version >= 0x5f)</span></span> |
| <span id="L1136"><span class="lineNum"> 1136</span> :<span class="tlaGNC"> 1 : vendor = p->sys_vendor;</span></span> |
| <span id="L1137"><span class="lineNum"> 1137</span> : : </span> |
| <span id="L1138"><span class="lineNum"> 1138</span> : : /* Workaround a bug where we have NULL vendor */</span> |
| <span id="L1139"><span class="lineNum"> 1139</span> :<span class="tlaGNC"> 1 : if (!vendor || vendor[0] == '\0')</span></span> |
| <span id="L1140"><span class="lineNum"> 1140</span> :<span class="tlaGNC"> 1 : vendor = "IBM";</span></span> |
| <span id="L1141"><span class="lineNum"> 1141</span> : : </span> |
| <span id="L1142"><span class="lineNum"> 1142</span> :<span class="tlaGNC"> 1 : dt_add_property_string(dt_root, "vendor", vendor);</span></span> |
| <span id="L1143"><span class="lineNum"> 1143</span> : : </span> |
| <span id="L1144"><span class="lineNum"> 1144</span> :<span class="tlaGNC"> 1 : sys_attributes = be32_to_cpu(p->sys_attributes);</span></span> |
| <span id="L1145"><span class="lineNum"> 1145</span> :<span class="tlaGNC"> 1 : if (sys_attributes & SYS_ATTR_RISK_LEVEL)</span></span> |
| <span id="L1146"><span class="lineNum"> 1146</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property(node, "elevated-risk-level", NULL, 0);</span></span> |
| <span id="L1147"><span class="lineNum"> 1147</span> : : </span> |
| <span id="L1148"><span class="lineNum"> 1148</span> : : /* Populate OPAL dump node */</span> |
| <span id="L1149"><span class="lineNum"> 1149</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (sys_attributes & SYS_ATTR_MPIPL_SUPPORTED)</span></span> |
| <span id="L1150"><span class="lineNum"> 1150</span> :<span class="tlaUNC tlaBgUNC"> 0 : add_opal_dump_node();</span></span> |
| <span id="L1151"><span class="lineNum"> 1151</span> : : </span> |
| <span id="L1152"><span class="lineNum"> 1152</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (version >= 0x60 && proc_gen >= proc_gen_p9)</span></span> |
| <span id="L1153"><span class="lineNum"> 1153</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_init_secureboot_node(p);</span></span> |
| <span id="L1154"><span class="lineNum"> 1154</span> : : }</span> |
| <span id="L1155"><span class="lineNum"> 1155</span> : : </span> |
| <span id="L1156"><span class="lineNum"> 1156</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void add_iplparams_ipl_params(const void *iplp, struct dt_node *node)</span></span> |
| <span id="L1157"><span class="lineNum"> 1157</span> : : {</span> |
| <span id="L1158"><span class="lineNum"> 1158</span> : : const struct iplparams_iplparams *p;</span> |
| <span id="L1159"><span class="lineNum"> 1159</span> : : struct dt_node *led_node;</span> |
| <span id="L1160"><span class="lineNum"> 1160</span> : : </span> |
| <span id="L1161"><span class="lineNum"> 1161</span> :<span class="tlaGNC"> 1 : p = HDIF_get_idata(iplp, IPLPARAMS_IPLPARAMS, NULL);</span></span> |
| <span id="L1162"><span class="lineNum"> 1162</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(p)) {</span></span> |
| <span id="L1163"><span class="lineNum"> 1163</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("IPLPARAMS: No IPL Parameters\n");</span></span> |
| <span id="L1164"><span class="lineNum"> 1164</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1165"><span class="lineNum"> 1165</span> : : }</span> |
| <span id="L1166"><span class="lineNum"> 1166</span> : : </span> |
| <span id="L1167"><span class="lineNum"> 1167</span> :<span class="tlaGNC tlaBgGNC"> 1 : node = dt_new(node, "ipl-params");</span></span> |
| <span id="L1168"><span class="lineNum"> 1168</span> :<span class="tlaGNC"> 1 : assert(node);</span></span> |
| <span id="L1169"><span class="lineNum"> 1169</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#address-cells", 0);</span></span> |
| <span id="L1170"><span class="lineNum"> 1170</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#size-cells", 0);</span></span> |
| <span id="L1171"><span class="lineNum"> 1171</span> : : </span> |
| <span id="L1172"><span class="lineNum"> 1172</span> : : /* On an ASM initiated factory reset, this bit will be set</span> |
| <span id="L1173"><span class="lineNum"> 1173</span> : : * and the FSP expects the firmware to reset the PCI bus</span> |
| <span id="L1174"><span class="lineNum"> 1174</span> : : * numbers and respond with a Power Down (CE,4D,02) message</span> |
| <span id="L1175"><span class="lineNum"> 1175</span> : : */</span> |
| <span id="L1176"><span class="lineNum"> 1176</span> :<span class="tlaGNC"> 1 : if (be32_to_cpu(p->other_attrib) & IPLPARAMS_OATTR_RST_PCI_BUSNO)</span></span> |
| <span id="L1177"><span class="lineNum"> 1177</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_cells(node, "pci-busno-reset-ipl", 1);</span></span> |
| <span id="L1178"><span class="lineNum"> 1178</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_add_property_strings(node, "cec-ipl-side",</span></span> |
| <span id="L1179"><span class="lineNum"> 1179</span> : : (p->ipl_side & IPLPARAMS_CEC_FW_IPL_SIDE_TEMP) ?</span> |
| <span id="L1180"><span class="lineNum"> 1180</span> : : "temp" : "perm");</span> |
| <span id="L1181"><span class="lineNum"> 1181</span> :<span class="tlaGNC"> 1 : if (proc_gen >= proc_gen_p9) {</span></span> |
| <span id="L1182"><span class="lineNum"> 1182</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_strings(node, "sp-ipl-side",</span></span> |
| <span id="L1183"><span class="lineNum"> 1183</span> : : (p->ipl_side & IPLPARAMS_FSP_FW_IPL_SIDE_TEMP) ?</span> |
| <span id="L1184"><span class="lineNum"> 1184</span> : : "temp" : "perm");</span> |
| <span id="L1185"><span class="lineNum"> 1185</span> : : } else {</span> |
| <span id="L1186"><span class="lineNum"> 1186</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_add_property_strings(node, "fsp-ipl-side",</span></span> |
| <span id="L1187"><span class="lineNum"> 1187</span> : : (p->ipl_side & IPLPARAMS_FSP_FW_IPL_SIDE_TEMP) ?</span> |
| <span id="L1188"><span class="lineNum"> 1188</span> : : "temp" : "perm");</span> |
| <span id="L1189"><span class="lineNum"> 1189</span> : : }</span> |
| <span id="L1190"><span class="lineNum"> 1190</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "os-ipl-mode", p->os_ipl_mode);</span></span> |
| <span id="L1191"><span class="lineNum"> 1191</span> :<span class="tlaGNC"> 1 : dt_add_property_strings(node, "cec-major-type",</span></span> |
| <span id="L1192"><span class="lineNum"> 1192</span> : : p->cec_ipl_maj_type ? "hot" : "cold");</span> |
| <span id="L1193"><span class="lineNum"> 1193</span> : : </span> |
| <span id="L1194"><span class="lineNum"> 1194</span> : : /* Add LED type info under '/ibm,opal/led' node */</span> |
| <span id="L1195"><span class="lineNum"> 1195</span> :<span class="tlaGNC"> 1 : led_node = dt_find_by_path(opal_node, DT_PROPERTY_LED_NODE);</span></span> |
| <span id="L1196"><span class="lineNum"> 1196</span> :<span class="tlaGNC"> 1 : assert(led_node);</span></span> |
| <span id="L1197"><span class="lineNum"> 1197</span> : : </span> |
| <span id="L1198"><span class="lineNum"> 1198</span> :<span class="tlaGNC"> 1 : if (be32_to_cpu(p->other_attrib) & IPLPARAMS_OATRR_LIGHT_PATH)</span></span> |
| <span id="L1199"><span class="lineNum"> 1199</span> :<span class="tlaGNC"> 1 : dt_add_property_strings(led_node, DT_PROPERTY_LED_MODE,</span></span> |
| <span id="L1200"><span class="lineNum"> 1200</span> : : LED_MODE_LIGHT_PATH);</span> |
| <span id="L1201"><span class="lineNum"> 1201</span> : : else</span> |
| <span id="L1202"><span class="lineNum"> 1202</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_strings(led_node, DT_PROPERTY_LED_MODE,</span></span> |
| <span id="L1203"><span class="lineNum"> 1203</span> : : LED_MODE_GUIDING_LIGHT);</span> |
| <span id="L1204"><span class="lineNum"> 1204</span> : : </span> |
| <span id="L1205"><span class="lineNum"> 1205</span> : : /* Populate opal dump result table */</span> |
| <span id="L1206"><span class="lineNum"> 1206</span> :<span class="tlaGNC tlaBgGNC"> 1 : opal_dump_add_mpipl_boot(p);</span></span> |
| <span id="L1207"><span class="lineNum"> 1207</span> : : }</span> |
| <span id="L1208"><span class="lineNum"> 1208</span> : : </span> |
| <span id="L1209"><span class="lineNum"> 1209</span> :<span class="tlaGNC"> 1 : static void add_iplparams_serials(const void *iplp, struct dt_node *node)</span></span> |
| <span id="L1210"><span class="lineNum"> 1210</span> : : {</span> |
| <span id="L1211"><span class="lineNum"> 1211</span> : : const struct iplparms_serial *ipser;</span> |
| <span id="L1212"><span class="lineNum"> 1212</span> : : struct dt_node *ser_node;</span> |
| <span id="L1213"><span class="lineNum"> 1213</span> : : int count, i;</span> |
| <span id="L1214"><span class="lineNum"> 1214</span> : : </span> |
| <span id="L1215"><span class="lineNum"> 1215</span> :<span class="tlaGNC"> 1 : count = HDIF_get_iarray_size(iplp, IPLPARMS_IDATA_SERIAL);</span></span> |
| <span id="L1216"><span class="lineNum"> 1216</span> :<span class="tlaGNC"> 1 : if (count <= 0)</span></span> |
| <span id="L1217"><span class="lineNum"> 1217</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L1218"><span class="lineNum"> 1218</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_INFO, "IPLPARAMS: %d serial ports in array\n", count);</span></span> |
| <span id="L1219"><span class="lineNum"> 1219</span> : : </span> |
| <span id="L1220"><span class="lineNum"> 1220</span> :<span class="tlaGNC"> 1 : node = dt_new(node, "fsp-serial");</span></span> |
| <span id="L1221"><span class="lineNum"> 1221</span> :<span class="tlaGNC"> 1 : assert(node);</span></span> |
| <span id="L1222"><span class="lineNum"> 1222</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#address-cells", 1);</span></span> |
| <span id="L1223"><span class="lineNum"> 1223</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(node, "#size-cells", 0);</span></span> |
| <span id="L1224"><span class="lineNum"> 1224</span> : : </span> |
| <span id="L1225"><span class="lineNum"> 1225</span> :<span class="tlaGNC"> 2 : for (i = 0; i < count; i++) {</span></span> |
| <span id="L1226"><span class="lineNum"> 1226</span> : : u16 rsrc_id;</span> |
| <span id="L1227"><span class="lineNum"> 1227</span> :<span class="tlaGNC"> 1 : ipser = HDIF_get_iarray_item(iplp, IPLPARMS_IDATA_SERIAL,</span></span> |
| <span id="L1228"><span class="lineNum"> 1228</span> : : i, NULL);</span> |
| <span id="L1229"><span class="lineNum"> 1229</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(ipser))</span></span> |
| <span id="L1230"><span class="lineNum"> 1230</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L1231"><span class="lineNum"> 1231</span> :<span class="tlaGNC tlaBgGNC"> 1 : rsrc_id = be16_to_cpu(ipser->rsrc_id);</span></span> |
| <span id="L1232"><span class="lineNum"> 1232</span> :<span class="tlaGNC"> 1 : prlog(PR_INFO, "IPLPARAMS: Serial %d rsrc: %04x loc: %s\n",</span></span> |
| <span id="L1233"><span class="lineNum"> 1233</span> : : i, rsrc_id, ipser->loc_code);</span> |
| <span id="L1234"><span class="lineNum"> 1234</span> :<span class="tlaGNC"> 1 : ser_node = dt_new_addr(node, "serial", rsrc_id);</span></span> |
| <span id="L1235"><span class="lineNum"> 1235</span> :<span class="tlaGNC"> 1 : if (!ser_node)</span></span> |
| <span id="L1236"><span class="lineNum"> 1236</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L1237"><span class="lineNum"> 1237</span> : : </span> |
| <span id="L1238"><span class="lineNum"> 1238</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_add_property_cells(ser_node, "reg", rsrc_id);</span></span> |
| <span id="L1239"><span class="lineNum"> 1239</span> :<span class="tlaGNC"> 1 : dt_add_property_nstr(ser_node, "ibm,loc-code",</span></span> |
| <span id="L1240"><span class="lineNum"> 1240</span> :<span class="tlaGNC"> 1 : ipser->loc_code, LOC_CODE_SIZE);</span></span> |
| <span id="L1241"><span class="lineNum"> 1241</span> :<span class="tlaGNC"> 1 : dt_add_property_string(ser_node, "compatible",</span></span> |
| <span id="L1242"><span class="lineNum"> 1242</span> : : "ibm,fsp-serial");</span> |
| <span id="L1243"><span class="lineNum"> 1243</span> : : /* XXX handle CALLHOME flag ? */</span> |
| <span id="L1244"><span class="lineNum"> 1244</span> : : }</span> |
| <span id="L1245"><span class="lineNum"> 1245</span> : : }</span> |
| <span id="L1246"><span class="lineNum"> 1246</span> : : </span> |
| <span id="L1247"><span class="lineNum"> 1247</span> : : /*</span> |
| <span id="L1248"><span class="lineNum"> 1248</span> : : * Check for platform dump, if present populate DT</span> |
| <span id="L1249"><span class="lineNum"> 1249</span> : : */</span> |
| <span id="L1250"><span class="lineNum"> 1250</span> :<span class="tlaGNC"> 1 : static void add_iplparams_platform_dump(const void *iplp, struct dt_node *node)</span></span> |
| <span id="L1251"><span class="lineNum"> 1251</span> : : {</span> |
| <span id="L1252"><span class="lineNum"> 1252</span> : : const struct iplparams_dump *ipl_dump;</span> |
| <span id="L1253"><span class="lineNum"> 1253</span> : : </span> |
| <span id="L1254"><span class="lineNum"> 1254</span> :<span class="tlaGNC"> 1 : ipl_dump = HDIF_get_idata(iplp, IPLPARAMS_PLATFORM_DUMP, NULL);</span></span> |
| <span id="L1255"><span class="lineNum"> 1255</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(ipl_dump))</span></span> |
| <span id="L1256"><span class="lineNum"> 1256</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L1257"><span class="lineNum"> 1257</span> : : </span> |
| <span id="L1258"><span class="lineNum"> 1258</span> :<span class="tlaGNC tlaBgGNC"> 1 : node = dt_new(node, "platform-dump");</span></span> |
| <span id="L1259"><span class="lineNum"> 1259</span> :<span class="tlaGNC"> 1 : assert(node);</span></span> |
| <span id="L1260"><span class="lineNum"> 1260</span> : : </span> |
| <span id="L1261"><span class="lineNum"> 1261</span> :<span class="tlaGNC"> 1 : if (be32_to_cpu(ipl_dump->dump_id)) {</span></span> |
| <span id="L1262"><span class="lineNum"> 1262</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_cells(node, "dump-id",</span></span> |
| <span id="L1263"><span class="lineNum"> 1263</span> : : be32_to_cpu(ipl_dump->dump_id));</span> |
| <span id="L1264"><span class="lineNum"> 1264</span> :<span class="tlaUNC"> 0 : dt_add_property_u64(node, "total-size",</span></span> |
| <span id="L1265"><span class="lineNum"> 1265</span> :<span class="tlaUNC"> 0 : be64_to_cpu(ipl_dump->act_dump_sz));</span></span> |
| <span id="L1266"><span class="lineNum"> 1266</span> :<span class="tlaUNC"> 0 : dt_add_property_u64(node, "hw-dump-size",</span></span> |
| <span id="L1267"><span class="lineNum"> 1267</span> :<span class="tlaUNC"> 0 : be32_to_cpu(ipl_dump->act_hw_dump_sz));</span></span> |
| <span id="L1268"><span class="lineNum"> 1268</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "plog-id",</span></span> |
| <span id="L1269"><span class="lineNum"> 1269</span> : : be32_to_cpu(ipl_dump->plid));</span> |
| <span id="L1270"><span class="lineNum"> 1270</span> : : }</span> |
| <span id="L1271"><span class="lineNum"> 1271</span> : : }</span> |
| <span id="L1272"><span class="lineNum"> 1272</span> : : </span> |
| <span id="L1273"><span class="lineNum"> 1273</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void add_iplparams_features(const struct HDIF_common_hdr *iplp)</span></span> |
| <span id="L1274"><span class="lineNum"> 1274</span> : : {</span> |
| <span id="L1275"><span class="lineNum"> 1275</span> : : const struct iplparams_feature *feature;</span> |
| <span id="L1276"><span class="lineNum"> 1276</span> : : const struct HDIF_array_hdr *array;</span> |
| <span id="L1277"><span class="lineNum"> 1277</span> : : struct dt_node *fw_features;</span> |
| <span id="L1278"><span class="lineNum"> 1278</span> : : unsigned int count, i;</span> |
| <span id="L1279"><span class="lineNum"> 1279</span> : : char name[65];</span> |
| <span id="L1280"><span class="lineNum"> 1280</span> : : </span> |
| <span id="L1281"><span class="lineNum"> 1281</span> :<span class="tlaGNC"> 1 : array = HDIF_get_iarray(iplp, IPLPARAMS_FEATURES, &count);</span></span> |
| <span id="L1282"><span class="lineNum"> 1282</span> :<span class="tlaGNC"> 1 : if (!array || !count)</span></span> |
| <span id="L1283"><span class="lineNum"> 1283</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L1284"><span class="lineNum"> 1284</span> : : </span> |
| <span id="L1285"><span class="lineNum"> 1285</span> :<span class="tlaUNC tlaBgUNC"> 0 : opal_node = dt_new_check(dt_root, "ibm,opal");</span></span> |
| <span id="L1286"><span class="lineNum"> 1286</span> :<span class="tlaUNC"> 0 : fw_features = dt_new(opal_node, "fw-features");</span></span> |
| <span id="L1287"><span class="lineNum"> 1287</span> :<span class="tlaUNC"> 0 : if (!fw_features)</span></span> |
| <span id="L1288"><span class="lineNum"> 1288</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1289"><span class="lineNum"> 1289</span> : : </span> |
| <span id="L1290"><span class="lineNum"> 1290</span> :<span class="tlaUNC"> 0 : HDIF_iarray_for_each(array, i, feature) {</span></span> |
| <span id="L1291"><span class="lineNum"> 1291</span> : : struct dt_node *n;</span> |
| <span id="L1292"><span class="lineNum"> 1292</span> : : uint64_t flags;</span> |
| <span id="L1293"><span class="lineNum"> 1293</span> : : </span> |
| <span id="L1294"><span class="lineNum"> 1294</span> : : /* the name field isn't necessarily null terminated */</span> |
| <span id="L1295"><span class="lineNum"> 1295</span> : : BUILD_ASSERT(sizeof(name) > sizeof(feature->name));</span> |
| <span id="L1296"><span class="lineNum"> 1296</span> :<span class="tlaUNC"> 0 : strncpy(name, feature->name, sizeof(name)-1);</span></span> |
| <span id="L1297"><span class="lineNum"> 1297</span> :<span class="tlaUNC"> 0 : name[sizeof(name)-1] = '\0';</span></span> |
| <span id="L1298"><span class="lineNum"> 1298</span> :<span class="tlaUNC"> 0 : flags = be64_to_cpu(feature->flags);</span></span> |
| <span id="L1299"><span class="lineNum"> 1299</span> : : </span> |
| <span id="L1300"><span class="lineNum"> 1300</span> :<span class="tlaUNC"> 0 : if (strlen(name) == 0) {</span></span> |
| <span id="L1301"><span class="lineNum"> 1301</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "IPLPARAMS: FW feature name is NULL\n");</span></span> |
| <span id="L1302"><span class="lineNum"> 1302</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1303"><span class="lineNum"> 1303</span> : : }</span> |
| <span id="L1304"><span class="lineNum"> 1304</span> : : </span> |
| <span id="L1305"><span class="lineNum"> 1305</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "IPLPARAMS: FW feature %s = %016"PRIx64"\n",</span></span> |
| <span id="L1306"><span class="lineNum"> 1306</span> : : name, flags);</span> |
| <span id="L1307"><span class="lineNum"> 1307</span> : : </span> |
| <span id="L1308"><span class="lineNum"> 1308</span> : : /* get rid of tm-suspend-mode-enabled being disabled */</span> |
| <span id="L1309"><span class="lineNum"> 1309</span> :<span class="tlaUNC"> 0 : if (strcmp(name, "tm-suspend-mode-enabled") == 0)</span></span> |
| <span id="L1310"><span class="lineNum"> 1310</span> :<span class="tlaUNC"> 0 : strcpy(name, "tm-suspend-mode");</span></span> |
| <span id="L1311"><span class="lineNum"> 1311</span> : : </span> |
| <span id="L1312"><span class="lineNum"> 1312</span> :<span class="tlaUNC"> 0 : n = dt_new(fw_features, name);</span></span> |
| <span id="L1313"><span class="lineNum"> 1313</span> : : </span> |
| <span id="L1314"><span class="lineNum"> 1314</span> : : /*</span> |
| <span id="L1315"><span class="lineNum"> 1315</span> : : * This is a bit overkill, but we'll want seperate properties</span> |
| <span id="L1316"><span class="lineNum"> 1316</span> : : * for each flag bit(s).</span> |
| <span id="L1317"><span class="lineNum"> 1317</span> : : */</span> |
| <span id="L1318"><span class="lineNum"> 1318</span> :<span class="tlaUNC"> 0 : if (flags & PPC_BIT(0))</span></span> |
| <span id="L1319"><span class="lineNum"> 1319</span> :<span class="tlaUNC"> 0 : dt_add_property(n, "enabled", NULL, 0);</span></span> |
| <span id="L1320"><span class="lineNum"> 1320</span> : : else</span> |
| <span id="L1321"><span class="lineNum"> 1321</span> :<span class="tlaUNC"> 0 : dt_add_property(n, "disabled", NULL, 0);</span></span> |
| <span id="L1322"><span class="lineNum"> 1322</span> : : }</span> |
| <span id="L1323"><span class="lineNum"> 1323</span> : : }</span> |
| <span id="L1324"><span class="lineNum"> 1324</span> : : </span> |
| <span id="L1325"><span class="lineNum"> 1325</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void add_iplparams(void)</span></span> |
| <span id="L1326"><span class="lineNum"> 1326</span> : : {</span> |
| <span id="L1327"><span class="lineNum"> 1327</span> : : struct dt_node *iplp_node;</span> |
| <span id="L1328"><span class="lineNum"> 1328</span> : : const void *ipl_parms;</span> |
| <span id="L1329"><span class="lineNum"> 1329</span> : : </span> |
| <span id="L1330"><span class="lineNum"> 1330</span> :<span class="tlaGNC"> 1 : ipl_parms = get_hdif(&spiras->ntuples.ipl_parms, "IPLPMS");</span></span> |
| <span id="L1331"><span class="lineNum"> 1331</span> :<span class="tlaGNC"> 1 : if (!ipl_parms) {</span></span> |
| <span id="L1332"><span class="lineNum"> 1332</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("IPLPARAMS: Cannot find IPL Parms in SPIRA\n");</span></span> |
| <span id="L1333"><span class="lineNum"> 1333</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1334"><span class="lineNum"> 1334</span> : : }</span> |
| <span id="L1335"><span class="lineNum"> 1335</span> : : </span> |
| <span id="L1336"><span class="lineNum"> 1336</span> :<span class="tlaGNC tlaBgGNC"> 1 : iplp_node = dt_new(dt_root, "ipl-params");</span></span> |
| <span id="L1337"><span class="lineNum"> 1337</span> :<span class="tlaGNC"> 1 : assert(iplp_node);</span></span> |
| <span id="L1338"><span class="lineNum"> 1338</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(iplp_node, "#address-cells", 0);</span></span> |
| <span id="L1339"><span class="lineNum"> 1339</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(iplp_node, "#size-cells", 0);</span></span> |
| <span id="L1340"><span class="lineNum"> 1340</span> : : </span> |
| <span id="L1341"><span class="lineNum"> 1341</span> :<span class="tlaGNC"> 1 : add_iplparams_sys_params(ipl_parms, iplp_node);</span></span> |
| <span id="L1342"><span class="lineNum"> 1342</span> :<span class="tlaGNC"> 1 : add_iplparams_ipl_params(ipl_parms, iplp_node);</span></span> |
| <span id="L1343"><span class="lineNum"> 1343</span> :<span class="tlaGNC"> 1 : add_iplparams_serials(ipl_parms, iplp_node);</span></span> |
| <span id="L1344"><span class="lineNum"> 1344</span> :<span class="tlaGNC"> 1 : add_iplparams_platform_dump(ipl_parms, iplp_node);</span></span> |
| <span id="L1345"><span class="lineNum"> 1345</span> :<span class="tlaGNC"> 1 : add_iplparams_features(ipl_parms);</span></span> |
| <span id="L1346"><span class="lineNum"> 1346</span> : : }</span> |
| <span id="L1347"><span class="lineNum"> 1347</span> : : </span> |
| <span id="L1348"><span class="lineNum"> 1348</span> : : /* Various structure contain a "proc_chip_id" which is an arbitrary</span> |
| <span id="L1349"><span class="lineNum"> 1349</span> : : * numbering used by HDAT to reference chips, which doesn't correspond</span> |
| <span id="L1350"><span class="lineNum"> 1350</span> : : * to the HW IDs. We want to use the HW IDs everywhere in the DT so</span> |
| <span id="L1351"><span class="lineNum"> 1351</span> : : * we convert using this.</span> |
| <span id="L1352"><span class="lineNum"> 1352</span> : : */</span> |
| <span id="L1353"><span class="lineNum"> 1353</span> :<span class="tlaGNC"> 17 : uint32_t pcid_to_chip_id(uint32_t proc_chip_id)</span></span> |
| <span id="L1354"><span class="lineNum"> 1354</span> : : {</span> |
| <span id="L1355"><span class="lineNum"> 1355</span> : : unsigned int i;</span> |
| <span id="L1356"><span class="lineNum"> 1356</span> : : const void *hdif;</span> |
| <span id="L1357"><span class="lineNum"> 1357</span> : : </span> |
| <span id="L1358"><span class="lineNum"> 1358</span> : : /* First, try the proc_chip ntuples for chip data */</span> |
| <span id="L1359"><span class="lineNum"> 1359</span> :<span class="tlaGNC"> 22 : for_each_ntuple_idx(&spiras->ntuples.proc_chip, hdif, i,</span></span> |
| <span id="L1360"><span class="lineNum"> 1360</span> : : SPPCRD_HDIF_SIG) {</span> |
| <span id="L1361"><span class="lineNum"> 1361</span> : : const struct sppcrd_chip_info *cinfo;</span> |
| <span id="L1362"><span class="lineNum"> 1362</span> : : </span> |
| <span id="L1363"><span class="lineNum"> 1363</span> :<span class="tlaGNC"> 22 : cinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO,</span></span> |
| <span id="L1364"><span class="lineNum"> 1364</span> : : NULL);</span> |
| <span id="L1365"><span class="lineNum"> 1365</span> :<span class="tlaGNC"> 22 : if (!CHECK_SPPTR(cinfo)) {</span></span> |
| <span id="L1366"><span class="lineNum"> 1366</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("XSCOM: Bad ChipID data %d\n", i);</span></span> |
| <span id="L1367"><span class="lineNum"> 1367</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1368"><span class="lineNum"> 1368</span> : : }</span> |
| <span id="L1369"><span class="lineNum"> 1369</span> :<span class="tlaGNC tlaBgGNC"> 22 : if (proc_chip_id == be32_to_cpu(cinfo->proc_chip_id))</span></span> |
| <span id="L1370"><span class="lineNum"> 1370</span> :<span class="tlaGNC"> 17 : return get_xscom_id(cinfo);</span></span> |
| <span id="L1371"><span class="lineNum"> 1371</span> : : }</span> |
| <span id="L1372"><span class="lineNum"> 1372</span> : : </span> |
| <span id="L1373"><span class="lineNum"> 1373</span> : : /* Not found, what to do ? Assert ? For now return a number</span> |
| <span id="L1374"><span class="lineNum"> 1374</span> : : * guaranteed to not exist</span> |
| <span id="L1375"><span class="lineNum"> 1375</span> : : */</span> |
| <span id="L1376"><span class="lineNum"> 1376</span> :<span class="tlaUNC tlaBgUNC"> 0 : return (uint32_t)-1;</span></span> |
| <span id="L1377"><span class="lineNum"> 1377</span> : : }</span> |
| <span id="L1378"><span class="lineNum"> 1378</span> : : </span> |
| <span id="L1379"><span class="lineNum"> 1379</span> :<span class="tlaUNC"> 0 : uint32_t pcid_to_topology_idx(uint32_t proc_chip_id)</span></span> |
| <span id="L1380"><span class="lineNum"> 1380</span> : : {</span> |
| <span id="L1381"><span class="lineNum"> 1381</span> : : unsigned int i;</span> |
| <span id="L1382"><span class="lineNum"> 1382</span> : : const void *hdif;</span> |
| <span id="L1383"><span class="lineNum"> 1383</span> : : </span> |
| <span id="L1384"><span class="lineNum"> 1384</span> : : /* First, try the proc_chip ntuples for chip data */</span> |
| <span id="L1385"><span class="lineNum"> 1385</span> :<span class="tlaUNC"> 0 : for_each_ntuple_idx(&spiras->ntuples.proc_chip, hdif, i,</span></span> |
| <span id="L1386"><span class="lineNum"> 1386</span> : : SPPCRD_HDIF_SIG) {</span> |
| <span id="L1387"><span class="lineNum"> 1387</span> : : const struct sppcrd_chip_info *cinfo;</span> |
| <span id="L1388"><span class="lineNum"> 1388</span> : : </span> |
| <span id="L1389"><span class="lineNum"> 1389</span> :<span class="tlaUNC"> 0 : cinfo = HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO, NULL);</span></span> |
| <span id="L1390"><span class="lineNum"> 1390</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(cinfo)) {</span></span> |
| <span id="L1391"><span class="lineNum"> 1391</span> :<span class="tlaUNC"> 0 : prerror("XSCOM: Bad ChipID data %d\n", i);</span></span> |
| <span id="L1392"><span class="lineNum"> 1392</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1393"><span class="lineNum"> 1393</span> : : }</span> |
| <span id="L1394"><span class="lineNum"> 1394</span> :<span class="tlaUNC"> 0 : if (proc_chip_id == be32_to_cpu(cinfo->proc_chip_id)) {</span></span> |
| <span id="L1395"><span class="lineNum"> 1395</span> :<span class="tlaUNC"> 0 : if (proc_gen <= proc_gen_p9)</span></span> |
| <span id="L1396"><span class="lineNum"> 1396</span> :<span class="tlaUNC"> 0 : return get_xscom_id(cinfo);</span></span> |
| <span id="L1397"><span class="lineNum"> 1397</span> : : else</span> |
| <span id="L1398"><span class="lineNum"> 1398</span> :<span class="tlaUNC"> 0 : return ((u32)cinfo->topology_id_table[cinfo->primary_topology_loc]);</span></span> |
| <span id="L1399"><span class="lineNum"> 1399</span> : : }</span> |
| <span id="L1400"><span class="lineNum"> 1400</span> : : }</span> |
| <span id="L1401"><span class="lineNum"> 1401</span> : : </span> |
| <span id="L1402"><span class="lineNum"> 1402</span> : : /* Not found, what to do ? Assert ? For now return a number</span> |
| <span id="L1403"><span class="lineNum"> 1403</span> : : * guaranteed to not exist</span> |
| <span id="L1404"><span class="lineNum"> 1404</span> : : */</span> |
| <span id="L1405"><span class="lineNum"> 1405</span> :<span class="tlaUNC"> 0 : return (uint32_t)-1;</span></span> |
| <span id="L1406"><span class="lineNum"> 1406</span> : : }</span> |
| <span id="L1407"><span class="lineNum"> 1407</span> : : /* Create '/ibm,opal/led' node */</span> |
| <span id="L1408"><span class="lineNum"> 1408</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void dt_init_led_node(void)</span></span> |
| <span id="L1409"><span class="lineNum"> 1409</span> : : {</span> |
| <span id="L1410"><span class="lineNum"> 1410</span> : : struct dt_node *led_node;</span> |
| <span id="L1411"><span class="lineNum"> 1411</span> : : </span> |
| <span id="L1412"><span class="lineNum"> 1412</span> : : /* Create /ibm,opal node, if its not created already */</span> |
| <span id="L1413"><span class="lineNum"> 1413</span> :<span class="tlaGNC"> 1 : if (!opal_node) {</span></span> |
| <span id="L1414"><span class="lineNum"> 1414</span> :<span class="tlaGNC"> 1 : opal_node = dt_new(dt_root, "ibm,opal");</span></span> |
| <span id="L1415"><span class="lineNum"> 1415</span> :<span class="tlaGNC"> 1 : assert(opal_node);</span></span> |
| <span id="L1416"><span class="lineNum"> 1416</span> : : }</span> |
| <span id="L1417"><span class="lineNum"> 1417</span> : : </span> |
| <span id="L1418"><span class="lineNum"> 1418</span> : : /* Crete LED parent node */</span> |
| <span id="L1419"><span class="lineNum"> 1419</span> :<span class="tlaGNC"> 1 : led_node = dt_new(opal_node, DT_PROPERTY_LED_NODE);</span></span> |
| <span id="L1420"><span class="lineNum"> 1420</span> :<span class="tlaGNC"> 1 : assert(led_node);</span></span> |
| <span id="L1421"><span class="lineNum"> 1421</span> :<span class="tlaGNC"> 1 : }</span></span> |
| <span id="L1422"><span class="lineNum"> 1422</span> : : </span> |
| <span id="L1423"><span class="lineNum"> 1423</span> :<span class="tlaGNC"> 1 : static void hostservices_parse(void)</span></span> |
| <span id="L1424"><span class="lineNum"> 1424</span> : : {</span> |
| <span id="L1425"><span class="lineNum"> 1425</span> : : struct HDIF_common_hdr *hs_hdr;</span> |
| <span id="L1426"><span class="lineNum"> 1426</span> : : const void *dt_blob;</span> |
| <span id="L1427"><span class="lineNum"> 1427</span> : : unsigned int size;</span> |
| <span id="L1428"><span class="lineNum"> 1428</span> : : unsigned int ntuples_size;</span> |
| <span id="L1429"><span class="lineNum"> 1429</span> : : </span> |
| <span id="L1430"><span class="lineNum"> 1430</span> : : /* Deprecated on P9 */</span> |
| <span id="L1431"><span class="lineNum"> 1431</span> :<span class="tlaGNC"> 1 : if (proc_gen >= proc_gen_p9)</span></span> |
| <span id="L1432"><span class="lineNum"> 1432</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L1433"><span class="lineNum"> 1433</span> : : </span> |
| <span id="L1434"><span class="lineNum"> 1434</span> :<span class="tlaGNC tlaBgGNC"> 1 : ntuples_size = sizeof(struct HDIF_array_hdr) + </span></span> |
| <span id="L1435"><span class="lineNum"> 1435</span> :<span class="tlaGNC"> 1 : be32_to_cpu(spiras->ntuples.array_hdr.ecnt) *</span></span> |
| <span id="L1436"><span class="lineNum"> 1436</span> : : sizeof(struct spira_ntuple);</span> |
| <span id="L1437"><span class="lineNum"> 1437</span> : : </span> |
| <span id="L1438"><span class="lineNum"> 1438</span> :<span class="tlaGNC"> 1 : if (offsetof(struct spiras_ntuples, hs_data) >= ntuples_size) {</span></span> |
| <span id="L1439"><span class="lineNum"> 1439</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: No host services data found\n");</span></span> |
| <span id="L1440"><span class="lineNum"> 1440</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1441"><span class="lineNum"> 1441</span> : : }</span> |
| <span id="L1442"><span class="lineNum"> 1442</span> : : </span> |
| <span id="L1443"><span class="lineNum"> 1443</span> :<span class="tlaGNC tlaBgGNC"> 1 : hs_hdr = get_hdif(&spiras->ntuples.hs_data, HSERV_HDIF_SIG);</span></span> |
| <span id="L1444"><span class="lineNum"> 1444</span> :<span class="tlaGNC"> 1 : if (!hs_hdr) {</span></span> |
| <span id="L1445"><span class="lineNum"> 1445</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: No host services data found\n");</span></span> |
| <span id="L1446"><span class="lineNum"> 1446</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1447"><span class="lineNum"> 1447</span> : : }</span> |
| <span id="L1448"><span class="lineNum"> 1448</span> : : </span> |
| <span id="L1449"><span class="lineNum"> 1449</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_blob = HDIF_get_idata(hs_hdr, 0, &size);</span></span> |
| <span id="L1450"><span class="lineNum"> 1450</span> :<span class="tlaGNC"> 1 : if (!dt_blob) {</span></span> |
| <span id="L1451"><span class="lineNum"> 1451</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("SPIRA: No host services idata found\n");</span></span> |
| <span id="L1452"><span class="lineNum"> 1452</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L1453"><span class="lineNum"> 1453</span> : : }</span> |
| <span id="L1454"><span class="lineNum"> 1454</span> :<span class="tlaGNC tlaBgGNC"> 1 : hservices_from_hdat(dt_blob, size);</span></span> |
| <span id="L1455"><span class="lineNum"> 1455</span> : : }</span> |
| <span id="L1456"><span class="lineNum"> 1456</span> : : </span> |
| <span id="L1457"><span class="lineNum"> 1457</span> :<span class="tlaGNC"> 1 : static void add_stop_levels(void)</span></span> |
| <span id="L1458"><span class="lineNum"> 1458</span> : : {</span> |
| <span id="L1459"><span class="lineNum"> 1459</span> :<span class="tlaGNC"> 1 : struct spira_ntuple *t = &spiras->ntuples.proc_chip;</span></span> |
| <span id="L1460"><span class="lineNum"> 1460</span> : : struct HDIF_common_hdr *hdif;</span> |
| <span id="L1461"><span class="lineNum"> 1461</span> :<span class="tlaGNC"> 1 : u32 stop_levels = ~0;</span></span> |
| <span id="L1462"><span class="lineNum"> 1462</span> :<span class="tlaGNC"> 1 : bool valid = false;</span></span> |
| <span id="L1463"><span class="lineNum"> 1463</span> : : int i;</span> |
| <span id="L1464"><span class="lineNum"> 1464</span> : : </span> |
| <span id="L1465"><span class="lineNum"> 1465</span> :<span class="tlaGNC"> 1 : if (proc_gen < proc_gen_p9)</span></span> |
| <span id="L1466"><span class="lineNum"> 1466</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L1467"><span class="lineNum"> 1467</span> : : </span> |
| <span id="L1468"><span class="lineNum"> 1468</span> : : /*</span> |
| <span id="L1469"><span class="lineNum"> 1469</span> : : * OPAL only exports a single set of flags to indicate the supported</span> |
| <span id="L1470"><span class="lineNum"> 1470</span> : : * STOP modes while the HDAT descibes the support top levels *per chip*</span> |
| <span id="L1471"><span class="lineNum"> 1471</span> : : * We parse the list of chips to find a common set of STOP levels to</span> |
| <span id="L1472"><span class="lineNum"> 1472</span> : : * export.</span> |
| <span id="L1473"><span class="lineNum"> 1473</span> : : */</span> |
| <span id="L1474"><span class="lineNum"> 1474</span> :<span class="tlaUNC tlaBgUNC"> 0 : for_each_ntuple_idx(t, hdif, i, SPPCRD_HDIF_SIG) {</span></span> |
| <span id="L1475"><span class="lineNum"> 1475</span> : : unsigned int size;</span> |
| <span id="L1476"><span class="lineNum"> 1476</span> : : const struct sppcrd_chip_info *cinfo =</span> |
| <span id="L1477"><span class="lineNum"> 1477</span> :<span class="tlaUNC"> 0 : HDIF_get_idata(hdif, SPPCRD_IDATA_CHIP_INFO, &size);</span></span> |
| <span id="L1478"><span class="lineNum"> 1478</span> : : u32 ve, chip_levels;</span> |
| <span id="L1479"><span class="lineNum"> 1479</span> : : </span> |
| <span id="L1480"><span class="lineNum"> 1480</span> :<span class="tlaUNC"> 0 : if (!cinfo)</span></span> |
| <span id="L1481"><span class="lineNum"> 1481</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1482"><span class="lineNum"> 1482</span> : : </span> |
| <span id="L1483"><span class="lineNum"> 1483</span> : : /*</span> |
| <span id="L1484"><span class="lineNum"> 1484</span> : : * If the chip info field is too small then assume we have no</span> |
| <span id="L1485"><span class="lineNum"> 1485</span> : : * STOP level information.</span> |
| <span id="L1486"><span class="lineNum"> 1486</span> : : */</span> |
| <span id="L1487"><span class="lineNum"> 1487</span> :<span class="tlaUNC"> 0 : if (size < 0x44) {</span></span> |
| <span id="L1488"><span class="lineNum"> 1488</span> :<span class="tlaUNC"> 0 : stop_levels = 0;</span></span> |
| <span id="L1489"><span class="lineNum"> 1489</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1490"><span class="lineNum"> 1490</span> : : }</span> |
| <span id="L1491"><span class="lineNum"> 1491</span> : : </span> |
| <span id="L1492"><span class="lineNum"> 1492</span> :<span class="tlaUNC"> 0 : ve = be32_to_cpu(cinfo->verif_exist_flags) & CPU_ID_VERIFY_MASK;</span></span> |
| <span id="L1493"><span class="lineNum"> 1493</span> :<span class="tlaUNC"> 0 : ve >>= CPU_ID_VERIFY_SHIFT;</span></span> |
| <span id="L1494"><span class="lineNum"> 1494</span> :<span class="tlaUNC"> 0 : if (ve == CHIP_VERIFY_NOT_INSTALLED ||</span></span> |
| <span id="L1495"><span class="lineNum"> 1495</span> : : ve == CHIP_VERIFY_UNUSABLE)</span> |
| <span id="L1496"><span class="lineNum"> 1496</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1497"><span class="lineNum"> 1497</span> : : </span> |
| <span id="L1498"><span class="lineNum"> 1498</span> :<span class="tlaUNC"> 0 : chip_levels = be32_to_cpu(cinfo->stop_levels);</span></span> |
| <span id="L1499"><span class="lineNum"> 1499</span> : : </span> |
| <span id="L1500"><span class="lineNum"> 1500</span> :<span class="tlaUNC"> 0 : prlog(PR_INSANE, "CHIP[%x] supported STOP mask 0x%.8x\n",</span></span> |
| <span id="L1501"><span class="lineNum"> 1501</span> : : be32_to_cpu(cinfo->proc_chip_id), chip_levels);</span> |
| <span id="L1502"><span class="lineNum"> 1502</span> : : </span> |
| <span id="L1503"><span class="lineNum"> 1503</span> :<span class="tlaUNC"> 0 : stop_levels &= chip_levels;</span></span> |
| <span id="L1504"><span class="lineNum"> 1504</span> :<span class="tlaUNC"> 0 : valid = true;</span></span> |
| <span id="L1505"><span class="lineNum"> 1505</span> : : }</span> |
| <span id="L1506"><span class="lineNum"> 1506</span> : : </span> |
| <span id="L1507"><span class="lineNum"> 1507</span> :<span class="tlaUNC"> 0 : if (!valid)</span></span> |
| <span id="L1508"><span class="lineNum"> 1508</span> :<span class="tlaUNC"> 0 : stop_levels = 0;</span></span> |
| <span id="L1509"><span class="lineNum"> 1509</span> : : </span> |
| <span id="L1510"><span class="lineNum"> 1510</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dt_new_check(opal_node, "power-mgt"),</span></span> |
| <span id="L1511"><span class="lineNum"> 1511</span> : : "ibm,enabled-stop-levels", stop_levels);</span> |
| <span id="L1512"><span class="lineNum"> 1512</span> : : }</span> |
| <span id="L1513"><span class="lineNum"> 1513</span> : : </span> |
| <span id="L1514"><span class="lineNum"> 1514</span> : : #define NPU_BASE 0x5011000</span> |
| <span id="L1515"><span class="lineNum"> 1515</span> : : #define NPU_SIZE 0x2c</span> |
| <span id="L1516"><span class="lineNum"> 1516</span> : : #define NPU_INDIRECT0 0x8000000009010c3fULL</span> |
| <span id="L1517"><span class="lineNum"> 1517</span> : : #define NPU_INDIRECT1 0x800000000c010c3fULL</span> |
| <span id="L1518"><span class="lineNum"> 1518</span> : : </span> |
| <span id="L1519"><span class="lineNum"> 1519</span> :<span class="tlaUNC"> 0 : static void add_npu(struct dt_node *xscom, const struct HDIF_array_hdr *links,</span></span> |
| <span id="L1520"><span class="lineNum"> 1520</span> : : int npu_index)</span> |
| <span id="L1521"><span class="lineNum"> 1521</span> : : {</span> |
| <span id="L1522"><span class="lineNum"> 1522</span> : : const struct sppcrd_smp_link *link;</span> |
| <span id="L1523"><span class="lineNum"> 1523</span> : : struct dt_node *npu;</span> |
| <span id="L1524"><span class="lineNum"> 1524</span> : : int group_target[6]; /* Tracks the PCI slot targeted each link group */</span> |
| <span id="L1525"><span class="lineNum"> 1525</span> :<span class="tlaUNC"> 0 : int group_count = 0;</span></span> |
| <span id="L1526"><span class="lineNum"> 1526</span> :<span class="tlaUNC"> 0 : int link_count = 0;</span></span> |
| <span id="L1527"><span class="lineNum"> 1527</span> : : uint32_t size, chip_id;</span> |
| <span id="L1528"><span class="lineNum"> 1528</span> : : int i;</span> |
| <span id="L1529"><span class="lineNum"> 1529</span> : : </span> |
| <span id="L1530"><span class="lineNum"> 1530</span> :<span class="tlaUNC"> 0 : size = be32_to_cpu(links->esize);</span></span> |
| <span id="L1531"><span class="lineNum"> 1531</span> :<span class="tlaUNC"> 0 : chip_id = dt_get_chip_id(xscom);</span></span> |
| <span id="L1532"><span class="lineNum"> 1532</span> : : </span> |
| <span id="L1533"><span class="lineNum"> 1533</span> :<span class="tlaUNC"> 0 : memset(group_target, 0, sizeof(group_target));</span></span> |
| <span id="L1534"><span class="lineNum"> 1534</span> : : </span> |
| <span id="L1535"><span class="lineNum"> 1535</span> :<span class="tlaUNC"> 0 : npu = dt_new_addr(xscom, "npu", NPU_BASE);</span></span> |
| <span id="L1536"><span class="lineNum"> 1536</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE);</span></span> |
| <span id="L1537"><span class="lineNum"> 1537</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(npu, "#size-cells", 0);</span></span> |
| <span id="L1538"><span class="lineNum"> 1538</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(npu, "#address-cells", 1);</span></span> |
| <span id="L1539"><span class="lineNum"> 1539</span> : : </span> |
| <span id="L1540"><span class="lineNum"> 1540</span> :<span class="tlaUNC"> 0 : dt_add_property_strings(npu, "compatible", "ibm,power9-npu");</span></span> |
| <span id="L1541"><span class="lineNum"> 1541</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(npu, "ibm,npu-index", npu_index);</span></span> |
| <span id="L1542"><span class="lineNum"> 1542</span> : : </span> |
| <span id="L1543"><span class="lineNum"> 1543</span> :<span class="tlaUNC"> 0 : HDIF_iarray_for_each(links, i, link) {</span></span> |
| <span id="L1544"><span class="lineNum"> 1544</span> :<span class="tlaUNC"> 0 : uint16_t slot_id = be16_to_cpu(link->pci_slot_idx);</span></span> |
| <span id="L1545"><span class="lineNum"> 1545</span> :<span class="tlaUNC"> 0 : uint32_t link_id = be32_to_cpu(link->link_id);</span></span> |
| <span id="L1546"><span class="lineNum"> 1546</span> :<span class="tlaUNC"> 0 : uint64_t speed = 0, nvlink_speed = 0;</span></span> |
| <span id="L1547"><span class="lineNum"> 1547</span> : : struct dt_node *node;</span> |
| <span id="L1548"><span class="lineNum"> 1548</span> : : </span> |
| <span id="L1549"><span class="lineNum"> 1549</span> : : /*</span> |
| <span id="L1550"><span class="lineNum"> 1550</span> : : * Only add a link node if this link is targeted at a</span> |
| <span id="L1551"><span class="lineNum"> 1551</span> : : * GPU device.</span> |
| <span id="L1552"><span class="lineNum"> 1552</span> : : *</span> |
| <span id="L1553"><span class="lineNum"> 1553</span> : : * If we ever activate it for an opencapi device, we</span> |
| <span id="L1554"><span class="lineNum"> 1554</span> : : * should revisit the link definitions hard-coded</span> |
| <span id="L1555"><span class="lineNum"> 1555</span> : : * on ZZ.</span> |
| <span id="L1556"><span class="lineNum"> 1556</span> : : */</span> |
| <span id="L1557"><span class="lineNum"> 1557</span> :<span class="tlaUNC"> 0 : if (be32_to_cpu(link->usage) != SMP_LINK_USE_GPU)</span></span> |
| <span id="L1558"><span class="lineNum"> 1558</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1559"><span class="lineNum"> 1559</span> : : </span> |
| <span id="L1560"><span class="lineNum"> 1560</span> : : /*</span> |
| <span id="L1561"><span class="lineNum"> 1561</span> : : * XXX: The link_id that we get from HDAT is essentially an</span> |
| <span id="L1562"><span class="lineNum"> 1562</span> : : * arbitrary ID number so we can't use it as the reg for the</span> |
| <span id="L1563"><span class="lineNum"> 1563</span> : : * link node.</span> |
| <span id="L1564"><span class="lineNum"> 1564</span> : : *</span> |
| <span id="L1565"><span class="lineNum"> 1565</span> : : * a) There's a 1-1 mapping between entries in the SMP link</span> |
| <span id="L1566"><span class="lineNum"> 1566</span> : : * structure and the NPU links.</span> |
| <span id="L1567"><span class="lineNum"> 1567</span> : : *</span> |
| <span id="L1568"><span class="lineNum"> 1568</span> : : * b) The SMP link array contains them in ascending order.</span> |
| <span id="L1569"><span class="lineNum"> 1569</span> : : *</span> |
| <span id="L1570"><span class="lineNum"> 1570</span> : : * We have some assurances that b) is correct, but if we get</span> |
| <span id="L1571"><span class="lineNum"> 1571</span> : : * broken link numbering it's something to watch for.</span> |
| <span id="L1572"><span class="lineNum"> 1572</span> : : *</span> |
| <span id="L1573"><span class="lineNum"> 1573</span> : : * If we every have actual A-Bus (SMP) link info in here</span> |
| <span id="L1574"><span class="lineNum"> 1574</span> : : * this is going to break.</span> |
| <span id="L1575"><span class="lineNum"> 1575</span> : : */</span> |
| <span id="L1576"><span class="lineNum"> 1576</span> : : </span> |
| <span id="L1577"><span class="lineNum"> 1577</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "NPU: %04x:%d: Link (%d) targets slot %u\n",</span></span> |
| <span id="L1578"><span class="lineNum"> 1578</span> : : chip_id, link_count, link_count, slot_id);</span> |
| <span id="L1579"><span class="lineNum"> 1579</span> : : </span> |
| <span id="L1580"><span class="lineNum"> 1580</span> :<span class="tlaUNC"> 0 : if (link_count >= 6) {</span></span> |
| <span id="L1581"><span class="lineNum"> 1581</span> :<span class="tlaUNC"> 0 : prerror("NPU: %04x:%d: Ignoring extra link (max 6)\n",</span></span> |
| <span id="L1582"><span class="lineNum"> 1582</span> : : chip_id, link_count);</span> |
| <span id="L1583"><span class="lineNum"> 1583</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1584"><span class="lineNum"> 1584</span> : : }</span> |
| <span id="L1585"><span class="lineNum"> 1585</span> : : </span> |
| <span id="L1586"><span class="lineNum"> 1586</span> :<span class="tlaUNC"> 0 : node = dt_new_addr(npu, "link", link_count);</span></span> |
| <span id="L1587"><span class="lineNum"> 1587</span> :<span class="tlaUNC"> 0 : if (!node) {</span></span> |
| <span id="L1588"><span class="lineNum"> 1588</span> :<span class="tlaUNC"> 0 : prerror("NPU: %04x:%d: Creating link node failed\n",</span></span> |
| <span id="L1589"><span class="lineNum"> 1589</span> : : chip_id, link_count);</span> |
| <span id="L1590"><span class="lineNum"> 1590</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1591"><span class="lineNum"> 1591</span> : : }</span> |
| <span id="L1592"><span class="lineNum"> 1592</span> : : </span> |
| <span id="L1593"><span class="lineNum"> 1593</span> :<span class="tlaUNC"> 0 : dt_add_property_string(node, "compatible", "ibm,npu-link");</span></span> |
| <span id="L1594"><span class="lineNum"> 1594</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "reg", link_count);</span></span> |
| <span id="L1595"><span class="lineNum"> 1595</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,npu-link-index", link_count);</span></span> |
| <span id="L1596"><span class="lineNum"> 1596</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,workbook-link-id", link_id);</span></span> |
| <span id="L1597"><span class="lineNum"> 1597</span> : : </span> |
| <span id="L1598"><span class="lineNum"> 1598</span> :<span class="tlaUNC"> 0 : dt_add_property_u64s(node, "ibm,npu-phy",</span></span> |
| <span id="L1599"><span class="lineNum"> 1599</span> : : link_count < 3 ? NPU_INDIRECT0 : NPU_INDIRECT1);</span> |
| <span id="L1600"><span class="lineNum"> 1600</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,npu-lane-mask",</span></span> |
| <span id="L1601"><span class="lineNum"> 1601</span> : : be32_to_cpu(link->lane_mask));</span> |
| <span id="L1602"><span class="lineNum"> 1602</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,npu-brick-id",</span></span> |
| <span id="L1603"><span class="lineNum"> 1603</span> : : be32_to_cpu(link->brick_id));</span> |
| <span id="L1604"><span class="lineNum"> 1604</span> : : </span> |
| <span id="L1605"><span class="lineNum"> 1605</span> :<span class="tlaUNC"> 0 : link_count++;</span></span> |
| <span id="L1606"><span class="lineNum"> 1606</span> : : </span> |
| <span id="L1607"><span class="lineNum"> 1607</span> : : /*</span> |
| <span id="L1608"><span class="lineNum"> 1608</span> : : * Add the group details if this is an NVlink.</span> |
| <span id="L1609"><span class="lineNum"> 1609</span> : : *</span> |
| <span id="L1610"><span class="lineNum"> 1610</span> : : * TODO: Cable card stuff.</span> |
| <span id="L1611"><span class="lineNum"> 1611</span> : : */</span> |
| <span id="L1612"><span class="lineNum"> 1612</span> :<span class="tlaUNC"> 0 : if (slot_id) {</span></span> |
| <span id="L1613"><span class="lineNum"> 1613</span> : : struct dt_node *slot;</span> |
| <span id="L1614"><span class="lineNum"> 1614</span> : : const char *name;</span> |
| <span id="L1615"><span class="lineNum"> 1615</span> : : int group;</span> |
| <span id="L1616"><span class="lineNum"> 1616</span> : : </span> |
| <span id="L1617"><span class="lineNum"> 1617</span> : : /*</span> |
| <span id="L1618"><span class="lineNum"> 1618</span> : : * Search the existing groups for one targeting</span> |
| <span id="L1619"><span class="lineNum"> 1619</span> : : * this PCI slot</span> |
| <span id="L1620"><span class="lineNum"> 1620</span> : : */</span> |
| <span id="L1621"><span class="lineNum"> 1621</span> :<span class="tlaUNC"> 0 : for (group = 0; group < group_count; group++)</span></span> |
| <span id="L1622"><span class="lineNum"> 1622</span> :<span class="tlaUNC"> 0 : if (group_target[group] == slot_id)</span></span> |
| <span id="L1623"><span class="lineNum"> 1623</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1624"><span class="lineNum"> 1624</span> : : </span> |
| <span id="L1625"><span class="lineNum"> 1625</span> : : /* no group, make a new one */</span> |
| <span id="L1626"><span class="lineNum"> 1626</span> :<span class="tlaUNC"> 0 : if (group == group_count) {</span></span> |
| <span id="L1627"><span class="lineNum"> 1627</span> :<span class="tlaUNC"> 0 : group_target[group] = slot_id;</span></span> |
| <span id="L1628"><span class="lineNum"> 1628</span> :<span class="tlaUNC"> 0 : group_count++;</span></span> |
| <span id="L1629"><span class="lineNum"> 1629</span> : : }</span> |
| <span id="L1630"><span class="lineNum"> 1630</span> : : </span> |
| <span id="L1631"><span class="lineNum"> 1631</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,npu-group-id", group);</span></span> |
| <span id="L1632"><span class="lineNum"> 1632</span> : : </span> |
| <span id="L1633"><span class="lineNum"> 1633</span> :<span class="tlaUNC"> 0 : slot = find_slot_entry_node(dt_root, slot_id);</span></span> |
| <span id="L1634"><span class="lineNum"> 1634</span> :<span class="tlaUNC"> 0 : if (!slot) {</span></span> |
| <span id="L1635"><span class="lineNum"> 1635</span> :<span class="tlaUNC"> 0 : prerror("NPU: %04x:%d: Unable find node for targeted PCIe slot\n",</span></span> |
| <span id="L1636"><span class="lineNum"> 1636</span> : : chip_id, link_count - 1);</span> |
| <span id="L1637"><span class="lineNum"> 1637</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1638"><span class="lineNum"> 1638</span> : : }</span> |
| <span id="L1639"><span class="lineNum"> 1639</span> : : </span> |
| <span id="L1640"><span class="lineNum"> 1640</span> : : /*</span> |
| <span id="L1641"><span class="lineNum"> 1641</span> : : * The slot_id points to a node that indicates that</span> |
| <span id="L1642"><span class="lineNum"> 1642</span> : : * this GPU should appear under the slot. Grab the</span> |
| <span id="L1643"><span class="lineNum"> 1643</span> : : * slot-label from the parent node that represents</span> |
| <span id="L1644"><span class="lineNum"> 1644</span> : : * the actual slot.</span> |
| <span id="L1645"><span class="lineNum"> 1645</span> : : */</span> |
| <span id="L1646"><span class="lineNum"> 1646</span> :<span class="tlaUNC"> 0 : name = dt_prop_get_def(slot->parent, "ibm,slot-label",</span></span> |
| <span id="L1647"><span class="lineNum"> 1647</span> : : (char *)"<SLOT NAME MISSING>");</span> |
| <span id="L1648"><span class="lineNum"> 1648</span> : : </span> |
| <span id="L1649"><span class="lineNum"> 1649</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "NPU: %04x:%d: Target slot %s\n",</span></span> |
| <span id="L1650"><span class="lineNum"> 1650</span> : : chip_id, link_count - 1, name);</span> |
| <span id="L1651"><span class="lineNum"> 1651</span> : : </span> |
| <span id="L1652"><span class="lineNum"> 1652</span> :<span class="tlaUNC"> 0 : dt_add_property_string(node, "ibm,slot-label", name);</span></span> |
| <span id="L1653"><span class="lineNum"> 1653</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,pcie-slot",</span></span> |
| <span id="L1654"><span class="lineNum"> 1654</span> : : slot->phandle);</span> |
| <span id="L1655"><span class="lineNum"> 1655</span> : : }</span> |
| <span id="L1656"><span class="lineNum"> 1656</span> : : </span> |
| <span id="L1657"><span class="lineNum"> 1657</span> : : /* Newer fields which might not be populated */</span> |
| <span id="L1658"><span class="lineNum"> 1658</span> :<span class="tlaUNC"> 0 : if (size <= 0x24)</span></span> |
| <span id="L1659"><span class="lineNum"> 1659</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1660"><span class="lineNum"> 1660</span> : : </span> |
| <span id="L1661"><span class="lineNum"> 1661</span> :<span class="tlaUNC"> 0 : switch (link->link_speed) {</span></span> |
| <span id="L1662"><span class="lineNum"> 1662</span> :<span class="tlaUNC"> 0 : case 0: /* 20Gbps */</span></span> |
| <span id="L1663"><span class="lineNum"> 1663</span> :<span class="tlaUNC"> 0 : speed = 20000000000ul;</span></span> |
| <span id="L1664"><span class="lineNum"> 1664</span> :<span class="tlaUNC"> 0 : nvlink_speed = 0x3;</span></span> |
| <span id="L1665"><span class="lineNum"> 1665</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1666"><span class="lineNum"> 1666</span> :<span class="tlaUNC"> 0 : case 1: /* 25Gbps */</span></span> |
| <span id="L1667"><span class="lineNum"> 1667</span> :<span class="tlaUNC"> 0 : speed = 25000000000ul;</span></span> |
| <span id="L1668"><span class="lineNum"> 1668</span> :<span class="tlaUNC"> 0 : nvlink_speed = 0x9;</span></span> |
| <span id="L1669"><span class="lineNum"> 1669</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1670"><span class="lineNum"> 1670</span> :<span class="tlaUNC"> 0 : case 2: /* 25.78125 Gbps */</span></span> |
| <span id="L1671"><span class="lineNum"> 1671</span> :<span class="tlaUNC"> 0 : nvlink_speed = 0x8;</span></span> |
| <span id="L1672"><span class="lineNum"> 1672</span> :<span class="tlaUNC"> 0 : speed = 25781250000ul;</span></span> |
| <span id="L1673"><span class="lineNum"> 1673</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L1674"><span class="lineNum"> 1674</span> : : }</span> |
| <span id="L1675"><span class="lineNum"> 1675</span> : : </span> |
| <span id="L1676"><span class="lineNum"> 1676</span> : : /* ibm,link-speed is in bps and nvidia,link-speed is ~magic~ */</span> |
| <span id="L1677"><span class="lineNum"> 1677</span> :<span class="tlaUNC"> 0 : dt_add_property_u64s(node, "ibm,link-speed", speed);</span></span> |
| <span id="L1678"><span class="lineNum"> 1678</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "nvidia,link-speed", nvlink_speed);</span></span> |
| <span id="L1679"><span class="lineNum"> 1679</span> : : </span> |
| <span id="L1680"><span class="lineNum"> 1680</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, DT_PRIVATE "occ-flag-pos",</span></span> |
| <span id="L1681"><span class="lineNum"> 1681</span> : : PPC_BIT(link->occ_flag_bit));</span> |
| <span id="L1682"><span class="lineNum"> 1682</span> : : }</span> |
| <span id="L1683"><span class="lineNum"> 1683</span> : : </span> |
| <span id="L1684"><span class="lineNum"> 1684</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(npu, "ibm,npu-links", link_count);</span></span> |
| <span id="L1685"><span class="lineNum"> 1685</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L1686"><span class="lineNum"> 1686</span> : : </span> |
| <span id="L1687"><span class="lineNum"> 1687</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void add_npus(void)</span></span> |
| <span id="L1688"><span class="lineNum"> 1688</span> : : {</span> |
| <span id="L1689"><span class="lineNum"> 1689</span> : : struct dt_node *xscom;</span> |
| <span id="L1690"><span class="lineNum"> 1690</span> :<span class="tlaGNC"> 1 : int npu_index = 0;</span></span> |
| <span id="L1691"><span class="lineNum"> 1691</span> : : </span> |
| <span id="L1692"><span class="lineNum"> 1692</span> : : /* Only consult HDAT for npu2 */</span> |
| <span id="L1693"><span class="lineNum"> 1693</span> :<span class="tlaGNC"> 1 : if (cpu_type != PVR_TYPE_P9)</span></span> |
| <span id="L1694"><span class="lineNum"> 1694</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L1695"><span class="lineNum"> 1695</span> : : </span> |
| <span id="L1696"><span class="lineNum"> 1696</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_for_each_compatible(dt_root, xscom, "ibm,xscom") {</span></span> |
| <span id="L1697"><span class="lineNum"> 1697</span> : : const struct HDIF_array_hdr *links;</span> |
| <span id="L1698"><span class="lineNum"> 1698</span> : : </span> |
| <span id="L1699"><span class="lineNum"> 1699</span> :<span class="tlaUNC"> 0 : links = xscom_to_pcrd(xscom, SPPCRD_IDATA_SMP_LINK);</span></span> |
| <span id="L1700"><span class="lineNum"> 1700</span> :<span class="tlaUNC"> 0 : if (!links) {</span></span> |
| <span id="L1701"><span class="lineNum"> 1701</span> :<span class="tlaUNC"> 0 : prerror("NPU: Unable to find matching SPPCRD for %s\n",</span></span> |
| <span id="L1702"><span class="lineNum"> 1702</span> : : xscom->name);</span> |
| <span id="L1703"><span class="lineNum"> 1703</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1704"><span class="lineNum"> 1704</span> : : }</span> |
| <span id="L1705"><span class="lineNum"> 1705</span> : : </span> |
| <span id="L1706"><span class="lineNum"> 1706</span> : : /* should never happen, but stranger things have */</span> |
| <span id="L1707"><span class="lineNum"> 1707</span> :<span class="tlaUNC"> 0 : if (!dt_find_by_name(dt_root, "ibm,pcie-slots")) {</span></span> |
| <span id="L1708"><span class="lineNum"> 1708</span> :<span class="tlaUNC"> 0 : prerror("PCIe slot information missing, can't add npu");</span></span> |
| <span id="L1709"><span class="lineNum"> 1709</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L1710"><span class="lineNum"> 1710</span> : : }</span> |
| <span id="L1711"><span class="lineNum"> 1711</span> : : </span> |
| <span id="L1712"><span class="lineNum"> 1712</span> : : /* some hostboots will give us an empty array */</span> |
| <span id="L1713"><span class="lineNum"> 1713</span> :<span class="tlaUNC"> 0 : if (be32_to_cpu(links->ecnt))</span></span> |
| <span id="L1714"><span class="lineNum"> 1714</span> :<span class="tlaUNC"> 0 : add_npu(xscom, links, npu_index++);</span></span> |
| <span id="L1715"><span class="lineNum"> 1715</span> : : }</span> |
| <span id="L1716"><span class="lineNum"> 1716</span> : : }</span> |
| <span id="L1717"><span class="lineNum"> 1717</span> : : </span> |
| <span id="L1718"><span class="lineNum"> 1718</span> : : /*</span> |
| <span id="L1719"><span class="lineNum"> 1719</span> : : * SPIRA-S is initialized and provided by boot firmware. Check the SPIRA-S</span> |
| <span id="L1720"><span class="lineNum"> 1720</span> : : * signature to confirm it was provided.</span> |
| <span id="L1721"><span class="lineNum"> 1721</span> : : */</span> |
| <span id="L1722"><span class="lineNum"> 1722</span> :<span class="tlaGNC tlaBgGNC"> 1 : static bool find_spiras(void)</span></span> |
| <span id="L1723"><span class="lineNum"> 1723</span> : : {</span> |
| <span id="L1724"><span class="lineNum"> 1724</span> : : #if !defined(TEST)</span> |
| <span id="L1725"><span class="lineNum"> 1725</span> : : spiras = (struct spiras *)SPIRA_HEAP_BASE;</span> |
| <span id="L1726"><span class="lineNum"> 1726</span> : : #endif</span> |
| <span id="L1727"><span class="lineNum"> 1727</span> : : </span> |
| <span id="L1728"><span class="lineNum"> 1728</span> : : /* Validate SPIRA-S signature */</span> |
| <span id="L1729"><span class="lineNum"> 1729</span> :<span class="tlaGNC"> 1 : if (!spiras)</span></span> |
| <span id="L1730"><span class="lineNum"> 1730</span> :<span class="tlaUNC tlaBgUNC"> 0 : return false;</span></span> |
| <span id="L1731"><span class="lineNum"> 1731</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (!HDIF_check(&spiras->hdr, SPIRAS_HDIF_SIG))</span></span> |
| <span id="L1732"><span class="lineNum"> 1732</span> :<span class="tlaUNC tlaBgUNC"> 0 : return false;</span></span> |
| <span id="L1733"><span class="lineNum"> 1733</span> : : </span> |
| <span id="L1734"><span class="lineNum"> 1734</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_DEBUG, "SPIRA-S found.\n");</span></span> |
| <span id="L1735"><span class="lineNum"> 1735</span> :<span class="tlaGNC"> 1 : return true;</span></span> |
| <span id="L1736"><span class="lineNum"> 1736</span> : : }</span> |
| <span id="L1737"><span class="lineNum"> 1737</span> : : </span> |
| <span id="L1738"><span class="lineNum"> 1738</span> : : /*</span> |
| <span id="L1739"><span class="lineNum"> 1739</span> : : * All the data structure addresses are relative to payload base. Hence adjust</span> |
| <span id="L1740"><span class="lineNum"> 1740</span> : : * structures that are needed to capture OPAL dump during MPIPL.</span> |
| <span id="L1741"><span class="lineNum"> 1741</span> : : */</span> |
| <span id="L1742"><span class="lineNum"> 1742</span> :<span class="tlaGNC"> 1 : static void update_spirah_addr(void)</span></span> |
| <span id="L1743"><span class="lineNum"> 1743</span> : : {</span> |
| <span id="L1744"><span class="lineNum"> 1744</span> : : #if !defined(TEST)</span> |
| <span id="L1745"><span class="lineNum"> 1745</span> : : if (proc_gen < proc_gen_p9)</span> |
| <span id="L1746"><span class="lineNum"> 1746</span> : : return;</span> |
| <span id="L1747"><span class="lineNum"> 1747</span> : : </span> |
| <span id="L1748"><span class="lineNum"> 1748</span> : : naca.spirah_addr = CPU_TO_BE64(SPIRAH_OFF);</span> |
| <span id="L1749"><span class="lineNum"> 1749</span> : : naca.spira_addr = 0;</span> |
| <span id="L1750"><span class="lineNum"> 1750</span> : : spirah.ntuples.hs_data_area.addr = CPU_TO_BE64(SPIRA_HEAP_BASE - SKIBOOT_BASE);</span> |
| <span id="L1751"><span class="lineNum"> 1751</span> : : spirah.ntuples.mdump_res.addr = CPU_TO_BE64(MDRT_TABLE_BASE - SKIBOOT_BASE);</span> |
| <span id="L1752"><span class="lineNum"> 1752</span> : : #endif</span> |
| <span id="L1753"><span class="lineNum"> 1753</span> :<span class="tlaGNC"> 1 : }</span></span> |
| <span id="L1754"><span class="lineNum"> 1754</span> : : </span> |
| <span id="L1755"><span class="lineNum"> 1755</span> :<span class="tlaGNC"> 1 : int parse_hdat(bool is_opal)</span></span> |
| <span id="L1756"><span class="lineNum"> 1756</span> : : {</span> |
| <span id="L1757"><span class="lineNum"> 1757</span> :<span class="tlaGNC"> 1 : cpu_type = PVR_TYPE(mfspr(SPR_PVR));</span></span> |
| <span id="L1758"><span class="lineNum"> 1758</span> : : </span> |
| <span id="L1759"><span class="lineNum"> 1759</span> :<span class="tlaGNC"> 1 : prlog(PR_DEBUG, "Parsing HDAT...\n");</span></span> |
| <span id="L1760"><span class="lineNum"> 1760</span> : : </span> |
| <span id="L1761"><span class="lineNum"> 1761</span> :<span class="tlaGNC"> 1 : if (!find_spiras()) {</span></span> |
| <span id="L1762"><span class="lineNum"> 1762</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_ERR, "SPIRA-S not found.\n");</span></span> |
| <span id="L1763"><span class="lineNum"> 1763</span> :<span class="tlaUNC"> 0 : return -1;</span></span> |
| <span id="L1764"><span class="lineNum"> 1764</span> : : }</span> |
| <span id="L1765"><span class="lineNum"> 1765</span> : : </span> |
| <span id="L1766"><span class="lineNum"> 1766</span> :<span class="tlaGNC tlaBgGNC"> 1 : update_spirah_addr();</span></span> |
| <span id="L1767"><span class="lineNum"> 1767</span> : : </span> |
| <span id="L1768"><span class="lineNum"> 1768</span> : : /*</span> |
| <span id="L1769"><span class="lineNum"> 1769</span> : : * Basic DT root stuff</span> |
| <span id="L1770"><span class="lineNum"> 1770</span> : : */</span> |
| <span id="L1771"><span class="lineNum"> 1771</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(dt_root, "#address-cells", 2);</span></span> |
| <span id="L1772"><span class="lineNum"> 1772</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(dt_root, "#size-cells", 2);</span></span> |
| <span id="L1773"><span class="lineNum"> 1773</span> : : </span> |
| <span id="L1774"><span class="lineNum"> 1774</span> :<span class="tlaGNC"> 1 : if (proc_gen < proc_gen_p9)</span></span> |
| <span id="L1775"><span class="lineNum"> 1775</span> :<span class="tlaGNC"> 1 : dt_add_property_string(dt_root, "lid-type", is_opal ? "opal" : "phyp");</span></span> |
| <span id="L1776"><span class="lineNum"> 1776</span> : : </span> |
| <span id="L1777"><span class="lineNum"> 1777</span> : : /* Add any BMCs and enable the LPC UART */</span> |
| <span id="L1778"><span class="lineNum"> 1778</span> :<span class="tlaGNC"> 1 : bmc_parse();</span></span> |
| <span id="L1779"><span class="lineNum"> 1779</span> : : </span> |
| <span id="L1780"><span class="lineNum"> 1780</span> : : /* Create and populate /vpd node */</span> |
| <span id="L1781"><span class="lineNum"> 1781</span> :<span class="tlaGNC"> 1 : dt_init_vpd_node();</span></span> |
| <span id="L1782"><span class="lineNum"> 1782</span> : : </span> |
| <span id="L1783"><span class="lineNum"> 1783</span> : : /* Create /ibm,opal/led node */</span> |
| <span id="L1784"><span class="lineNum"> 1784</span> :<span class="tlaGNC"> 1 : dt_init_led_node();</span></span> |
| <span id="L1785"><span class="lineNum"> 1785</span> : : </span> |
| <span id="L1786"><span class="lineNum"> 1786</span> : : /* Parse PCIA */</span> |
| <span id="L1787"><span class="lineNum"> 1787</span> :<span class="tlaGNC"> 1 : if (!pcia_parse())</span></span> |
| <span id="L1788"><span class="lineNum"> 1788</span> :<span class="tlaUNC tlaBgUNC"> 0 : return -1;</span></span> |
| <span id="L1789"><span class="lineNum"> 1789</span> : : </span> |
| <span id="L1790"><span class="lineNum"> 1790</span> : : /* IPL params */</span> |
| <span id="L1791"><span class="lineNum"> 1791</span> :<span class="tlaGNC tlaBgGNC"> 1 : add_iplparams();</span></span> |
| <span id="L1792"><span class="lineNum"> 1792</span> : : </span> |
| <span id="L1793"><span class="lineNum"> 1793</span> : : /* Add XSCOM node (must be before chiptod, IO and FSP) */</span> |
| <span id="L1794"><span class="lineNum"> 1794</span> :<span class="tlaGNC"> 1 : add_xscom();</span></span> |
| <span id="L1795"><span class="lineNum"> 1795</span> : : </span> |
| <span id="L1796"><span class="lineNum"> 1796</span> : : /* Parse MS VPD */</span> |
| <span id="L1797"><span class="lineNum"> 1797</span> :<span class="tlaGNC"> 1 : memory_parse();</span></span> |
| <span id="L1798"><span class="lineNum"> 1798</span> : : </span> |
| <span id="L1799"><span class="lineNum"> 1799</span> : : /* Add any FSPs */</span> |
| <span id="L1800"><span class="lineNum"> 1800</span> :<span class="tlaGNC"> 1 : fsp_parse();</span></span> |
| <span id="L1801"><span class="lineNum"> 1801</span> : : </span> |
| <span id="L1802"><span class="lineNum"> 1802</span> : : /* Add ChipTOD's */</span> |
| <span id="L1803"><span class="lineNum"> 1803</span> :<span class="tlaGNC"> 1 : if (!add_chiptod())</span></span> |
| <span id="L1804"><span class="lineNum"> 1804</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("CHIPTOD: No ChipTOD found !\n");</span></span> |
| <span id="L1805"><span class="lineNum"> 1805</span> : : </span> |
| <span id="L1806"><span class="lineNum"> 1806</span> : : /* Add NX */</span> |
| <span id="L1807"><span class="lineNum"> 1807</span> :<span class="tlaGNC tlaBgGNC"> 1 : add_nx();</span></span> |
| <span id="L1808"><span class="lineNum"> 1808</span> : : </span> |
| <span id="L1809"><span class="lineNum"> 1809</span> : : /* Add nest mmu */</span> |
| <span id="L1810"><span class="lineNum"> 1810</span> :<span class="tlaGNC"> 1 : add_nmmu();</span></span> |
| <span id="L1811"><span class="lineNum"> 1811</span> : : </span> |
| <span id="L1812"><span class="lineNum"> 1812</span> : : /* Add IO HUBs and/or PHBs */</span> |
| <span id="L1813"><span class="lineNum"> 1813</span> :<span class="tlaGNC"> 1 : io_parse();</span></span> |
| <span id="L1814"><span class="lineNum"> 1814</span> : : </span> |
| <span id="L1815"><span class="lineNum"> 1815</span> : : /* Add NPU nodes */</span> |
| <span id="L1816"><span class="lineNum"> 1816</span> :<span class="tlaGNC"> 1 : add_npus();</span></span> |
| <span id="L1817"><span class="lineNum"> 1817</span> : : </span> |
| <span id="L1818"><span class="lineNum"> 1818</span> : : /* Parse VPD */</span> |
| <span id="L1819"><span class="lineNum"> 1819</span> :<span class="tlaGNC"> 1 : vpd_parse();</span></span> |
| <span id="L1820"><span class="lineNum"> 1820</span> : : </span> |
| <span id="L1821"><span class="lineNum"> 1821</span> : : /* Host services information. */</span> |
| <span id="L1822"><span class="lineNum"> 1822</span> :<span class="tlaGNC"> 1 : hostservices_parse();</span></span> |
| <span id="L1823"><span class="lineNum"> 1823</span> : : </span> |
| <span id="L1824"><span class="lineNum"> 1824</span> : : /* Parse System Attention Indicator inforamtion */</span> |
| <span id="L1825"><span class="lineNum"> 1825</span> :<span class="tlaGNC"> 1 : slca_dt_add_sai_node();</span></span> |
| <span id="L1826"><span class="lineNum"> 1826</span> : : </span> |
| <span id="L1827"><span class="lineNum"> 1827</span> :<span class="tlaGNC"> 1 : add_stop_levels();</span></span> |
| <span id="L1828"><span class="lineNum"> 1828</span> : : </span> |
| <span id="L1829"><span class="lineNum"> 1829</span> : : /* Parse node secure and trusted boot data */</span> |
| <span id="L1830"><span class="lineNum"> 1830</span> :<span class="tlaGNC"> 1 : if (proc_gen >= proc_gen_p9)</span></span> |
| <span id="L1831"><span class="lineNum"> 1831</span> :<span class="tlaUNC tlaBgUNC"> 0 : node_stb_parse();</span></span> |
| <span id="L1832"><span class="lineNum"> 1832</span> : : </span> |
| <span id="L1833"><span class="lineNum"> 1833</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_DEBUG, "Parsing HDAT...done\n");</span></span> |
| <span id="L1834"><span class="lineNum"> 1834</span> : : </span> |
| <span id="L1835"><span class="lineNum"> 1835</span> :<span class="tlaGNC"> 1 : return 0;</span></span> |
| <span id="L1836"><span class="lineNum"> 1836</span> : : }</span> |
| </pre> |
| </td> |
| </tr> |
| </table> |
| <br> |
| |
| <table width="100%" border=0 cellspacing=0 cellpadding=0> |
| <tr><td class="ruler"><img src="../glass.png" width=3 height=3 alt=""></td></tr> |
| <tr><td class="versionInfo">Generated by: <a href="https://github.com//linux-test-project/lcov" target="_parent">LCOV version 2.0-1</a></td></tr> |
| </table> |
| <br> |
| |
| </body> |
| </html> |
