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| <td class="headerCovTableEntryLo">36.3 %</td> |
| <td class="headerCovTableEntry">421</td> |
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| <td class="headerValue">2025-06-27 16:54:26</td> |
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| <td class="headerCovTableEntryLo">68.4 %</td> |
| <td class="headerCovTableEntry">19</td> |
| <td class="headerCovTableEntry">13</td> |
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| <pre class="sourceHeading"> Branch data Line data Source code</pre> |
| <pre class="source"> |
| <span id="L1"><span class="lineNum"> 1</span> : : // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later</span> |
| <span id="L2"><span class="lineNum"> 2</span> : : /* Copyright 2013-2019 IBM Corp. */</span> |
| <span id="L3"><span class="lineNum"> 3</span> : : </span> |
| <span id="L4"><span class="lineNum"> 4</span> : : #include <cpu.h></span> |
| <span id="L5"><span class="lineNum"> 5</span> : : #include <device.h></span> |
| <span id="L6"><span class="lineNum"> 6</span> : : #include <vpd.h></span> |
| <span id="L7"><span class="lineNum"> 7</span> : : #include <ccan/str/str.h></span> |
| <span id="L8"><span class="lineNum"> 8</span> : : #include <libfdt/libfdt.h></span> |
| <span id="L9"><span class="lineNum"> 9</span> : : #include <mem_region.h></span> |
| <span id="L10"><span class="lineNum"> 10</span> : : #include <types.h></span> |
| <span id="L11"><span class="lineNum"> 11</span> : : #include <inttypes.h></span> |
| <span id="L12"><span class="lineNum"> 12</span> : : #include <processor.h></span> |
| <span id="L13"><span class="lineNum"> 13</span> : : </span> |
| <span id="L14"><span class="lineNum"> 14</span> : : #include "spira.h"</span> |
| <span id="L15"><span class="lineNum"> 15</span> : : #include "hdata.h"</span> |
| <span id="L16"><span class="lineNum"> 16</span> : : </span> |
| <span id="L17"><span class="lineNum"> 17</span> : : struct HDIF_ram_area_id {</span> |
| <span id="L18"><span class="lineNum"> 18</span> : : __be16 id;</span> |
| <span id="L19"><span class="lineNum"> 19</span> : : #define RAM_AREA_INSTALLED 0x8000</span> |
| <span id="L20"><span class="lineNum"> 20</span> : : #define RAM_AREA_FUNCTIONAL 0x4000</span> |
| <span id="L21"><span class="lineNum"> 21</span> : : __be16 flags;</span> |
| <span id="L22"><span class="lineNum"> 22</span> : : __be32 dimm_id;</span> |
| <span id="L23"><span class="lineNum"> 23</span> : : __be32 speed;</span> |
| <span id="L24"><span class="lineNum"> 24</span> : : } __packed;</span> |
| <span id="L25"><span class="lineNum"> 25</span> : : </span> |
| <span id="L26"><span class="lineNum"> 26</span> : : struct HDIF_ram_area_size {</span> |
| <span id="L27"><span class="lineNum"> 27</span> : : __be32 reserved1;</span> |
| <span id="L28"><span class="lineNum"> 28</span> : : __be32 mb;</span> |
| <span id="L29"><span class="lineNum"> 29</span> : : } __packed;</span> |
| <span id="L30"><span class="lineNum"> 30</span> : : </span> |
| <span id="L31"><span class="lineNum"> 31</span> : : struct HDIF_ms_area_address_range {</span> |
| <span id="L32"><span class="lineNum"> 32</span> : : __be64 start;</span> |
| <span id="L33"><span class="lineNum"> 33</span> : : __be64 end;</span> |
| <span id="L34"><span class="lineNum"> 34</span> : : __be32 chip;</span> |
| <span id="L35"><span class="lineNum"> 35</span> : : __be32 mirror_attr;</span> |
| <span id="L36"><span class="lineNum"> 36</span> : : __be64 mirror_start;</span> |
| <span id="L37"><span class="lineNum"> 37</span> : : __be32 controller_id;</span> |
| <span id="L38"><span class="lineNum"> 38</span> : : __be32 phys_attr;</span> |
| <span id="L39"><span class="lineNum"> 39</span> : : } __packed;</span> |
| <span id="L40"><span class="lineNum"> 40</span> : : #define PHYS_ATTR_TYPE_MASK 0xff000000</span> |
| <span id="L41"><span class="lineNum"> 41</span> : : #define PHYS_ATTR_TYPE_STD 0</span> |
| <span id="L42"><span class="lineNum"> 42</span> : : #define PHYS_ATTR_TYPE_NVDIMM 1</span> |
| <span id="L43"><span class="lineNum"> 43</span> : : #define PHYS_ATTR_TYPE_MRAM 2</span> |
| <span id="L44"><span class="lineNum"> 44</span> : : #define PHYS_ATTR_TYPE_PCM 3</span> |
| <span id="L45"><span class="lineNum"> 45</span> : : </span> |
| <span id="L46"><span class="lineNum"> 46</span> : : #define PHYS_ATTR_STATUS_MASK 0x00ff0000</span> |
| <span id="L47"><span class="lineNum"> 47</span> : : /*</span> |
| <span id="L48"><span class="lineNum"> 48</span> : : * The values here are mutually exclusive. I have no idea why anyone</span> |
| <span id="L49"><span class="lineNum"> 49</span> : : * decided encoding these are flags rather than sequential numbers was</span> |
| <span id="L50"><span class="lineNum"> 50</span> : : * a good idea, but here we are.</span> |
| <span id="L51"><span class="lineNum"> 51</span> : : */</span> |
| <span id="L52"><span class="lineNum"> 52</span> : : #define PHYS_ATTR_STATUS_CANT_SAVE 0x01</span> |
| <span id="L53"><span class="lineNum"> 53</span> : : #define PHYS_ATTR_STATUS_SAVE_FAILED 0x02</span> |
| <span id="L54"><span class="lineNum"> 54</span> : : #define PHYS_ATTR_STATUS_SAVED 0x04</span> |
| <span id="L55"><span class="lineNum"> 55</span> : : #define PHYS_ATTR_STATUS_NOT_SAVED 0x08</span> |
| <span id="L56"><span class="lineNum"> 56</span> : : #define PHYS_ATTR_STATUS_ENCRYPTED 0x10</span> |
| <span id="L57"><span class="lineNum"> 57</span> : : #define PHYS_ATTR_STATUS_ERR_DETECTED 0x40</span> |
| <span id="L58"><span class="lineNum"> 58</span> : : #define PHYS_ATTR_STATUS_MEM_INVALID 0xff</span> |
| <span id="L59"><span class="lineNum"> 59</span> : : </span> |
| <span id="L60"><span class="lineNum"> 60</span> : : /* Memory Controller ID for Nimbus P9 systems */</span> |
| <span id="L61"><span class="lineNum"> 61</span> : : #define MS_CONTROLLER_MCBIST_ID(id) GETFIELD(PPC_BITMASK32(0, 1), id)</span> |
| <span id="L62"><span class="lineNum"> 62</span> : : #define MS_CONTROLLER_MCS_ID(id) GETFIELD(PPC_BITMASK32(4, 7), id)</span> |
| <span id="L63"><span class="lineNum"> 63</span> : : #define MS_CONTROLLER_MCA_ID(id) GETFIELD(PPC_BITMASK32(8, 15), id)</span> |
| <span id="L64"><span class="lineNum"> 64</span> : : </span> |
| <span id="L65"><span class="lineNum"> 65</span> : : /* Memory Controller ID for P9 AXONE systems */</span> |
| <span id="L66"><span class="lineNum"> 66</span> : : #define MS_CONTROLLER_MC_ID(id) GETFIELD(PPC_BITMASK32(0, 1), id)</span> |
| <span id="L67"><span class="lineNum"> 67</span> : : #define MS_CONTROLLER_MI_ID(id) GETFIELD(PPC_BITMASK32(4, 7), id)</span> |
| <span id="L68"><span class="lineNum"> 68</span> : : #define MS_CONTROLLER_MCC_ID(id) GETFIELD(PPC_BITMASK32(8, 15), id)</span> |
| <span id="L69"><span class="lineNum"> 69</span> : : #define MS_CONTROLLER_OMI_ID(id) GETFIELD(PPC_BITMASK32(16, 31), id)</span> |
| <span id="L70"><span class="lineNum"> 70</span> : : </span> |
| <span id="L71"><span class="lineNum"> 71</span> : : struct HDIF_ms_area_id {</span> |
| <span id="L72"><span class="lineNum"> 72</span> : : __be16 id;</span> |
| <span id="L73"><span class="lineNum"> 73</span> : : #define MS_PTYPE_RISER_CARD 0x8000</span> |
| <span id="L74"><span class="lineNum"> 74</span> : : #define MS_PTYPE_MEM_CARD 0x4000</span> |
| <span id="L75"><span class="lineNum"> 75</span> : : #define MS_PTYPE_CEC_FRU 0x2000</span> |
| <span id="L76"><span class="lineNum"> 76</span> : : #define MS_PTYPE_HYBRID_CARD 0x1000</span> |
| <span id="L77"><span class="lineNum"> 77</span> : : __be16 parent_type;</span> |
| <span id="L78"><span class="lineNum"> 78</span> : : #define MS_AREA_INSTALLED 0x8000</span> |
| <span id="L79"><span class="lineNum"> 79</span> : : #define MS_AREA_FUNCTIONAL 0x4000</span> |
| <span id="L80"><span class="lineNum"> 80</span> : : #define MS_AREA_SHARED 0x2000</span> |
| <span id="L81"><span class="lineNum"> 81</span> : : __be16 flags;</span> |
| <span id="L82"><span class="lineNum"> 82</span> : : __be16 share_id;</span> |
| <span id="L83"><span class="lineNum"> 83</span> : : } __packed;</span> |
| <span id="L84"><span class="lineNum"> 84</span> : : </span> |
| <span id="L85"><span class="lineNum"> 85</span> : : </span> |
| <span id="L86"><span class="lineNum"> 86</span> : : // FIXME: it should be 9, current HDATs are broken</span> |
| <span id="L87"><span class="lineNum"> 87</span> : : #define MSAREA_IDATA_MMIO_IDX 8</span> |
| <span id="L88"><span class="lineNum"> 88</span> : : struct HDIF_ms_area_ocmb_mmio {</span> |
| <span id="L89"><span class="lineNum"> 89</span> : : __be64 range_start;</span> |
| <span id="L90"><span class="lineNum"> 90</span> : : __be64 range_end;</span> |
| <span id="L91"><span class="lineNum"> 91</span> : : __be32 controller_id;</span> |
| <span id="L92"><span class="lineNum"> 92</span> : : __be32 proc_chip_id;</span> |
| <span id="L93"><span class="lineNum"> 93</span> : : __be64 hbrt_id;</span> |
| <span id="L94"><span class="lineNum"> 94</span> : : #define OCMB_SCOM_8BYTE_ACCESS PPC_BIT(0)</span> |
| <span id="L95"><span class="lineNum"> 95</span> : : #define OCMB_SCOM_4BYTE_ACCESS PPC_BIT(1)</span> |
| <span id="L96"><span class="lineNum"> 96</span> : : __be64 flags;</span> |
| <span id="L97"><span class="lineNum"> 97</span> : : } __packed;</span> |
| <span id="L98"><span class="lineNum"> 98</span> : : </span> |
| <span id="L99"><span class="lineNum"> 99</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void append_chip_id(struct dt_node *mem, u32 id)</span></span> |
| <span id="L100"><span class="lineNum"> 100</span> : : {</span> |
| <span id="L101"><span class="lineNum"> 101</span> : : struct dt_property *prop;</span> |
| <span id="L102"><span class="lineNum"> 102</span> : : size_t len, i;</span> |
| <span id="L103"><span class="lineNum"> 103</span> : : </span> |
| <span id="L104"><span class="lineNum"> 104</span> :<span class="tlaGNC"> 1 : prop = __dt_find_property(mem, "ibm,chip-id");</span></span> |
| <span id="L105"><span class="lineNum"> 105</span> :<span class="tlaGNC"> 1 : if (!prop)</span></span> |
| <span id="L106"><span class="lineNum"> 106</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L107"><span class="lineNum"> 107</span> :<span class="tlaGNC"> 1 : len = prop->len >> 2;</span></span> |
| <span id="L108"><span class="lineNum"> 108</span> : : </span> |
| <span id="L109"><span class="lineNum"> 109</span> : : /* Check if it exists already */</span> |
| <span id="L110"><span class="lineNum"> 110</span> :<span class="tlaGNC"> 1 : for (i = 0; i < len; i++) {</span></span> |
| <span id="L111"><span class="lineNum"> 111</span> :<span class="tlaGNC"> 1 : if (dt_property_get_cell(prop, i) == id)</span></span> |
| <span id="L112"><span class="lineNum"> 112</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L113"><span class="lineNum"> 113</span> : : }</span> |
| <span id="L114"><span class="lineNum"> 114</span> : : </span> |
| <span id="L115"><span class="lineNum"> 115</span> : : /* Add it to the list */</span> |
| <span id="L116"><span class="lineNum"> 116</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_resize_property(&prop, (len + 1) << 2);</span></span> |
| <span id="L117"><span class="lineNum"> 117</span> :<span class="tlaUNC"> 0 : dt_property_set_cell(prop, len, id);</span></span> |
| <span id="L118"><span class="lineNum"> 118</span> : : }</span> |
| <span id="L119"><span class="lineNum"> 119</span> : : </span> |
| <span id="L120"><span class="lineNum"> 120</span> :<span class="tlaUNC"> 0 : static void update_status(struct dt_node *mem, uint32_t status)</span></span> |
| <span id="L121"><span class="lineNum"> 121</span> : : {</span> |
| <span id="L122"><span class="lineNum"> 122</span> :<span class="tlaUNC"> 0 : switch (status) {</span></span> |
| <span id="L123"><span class="lineNum"> 123</span> :<span class="tlaUNC"> 0 : case PHYS_ATTR_STATUS_CANT_SAVE:</span></span> |
| <span id="L124"><span class="lineNum"> 124</span> :<span class="tlaUNC"> 0 : if (!dt_find_property(mem, "save-trigged-unarmed"))</span></span> |
| <span id="L125"><span class="lineNum"> 125</span> :<span class="tlaUNC"> 0 : dt_add_property(mem, "save-trigger-unarmed", NULL, 0);</span></span> |
| <span id="L126"><span class="lineNum"> 126</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L127"><span class="lineNum"> 127</span> : : </span> |
| <span id="L128"><span class="lineNum"> 128</span> :<span class="tlaUNC"> 0 : case PHYS_ATTR_STATUS_SAVE_FAILED:</span></span> |
| <span id="L129"><span class="lineNum"> 129</span> :<span class="tlaUNC"> 0 : if (!dt_find_property(mem, "save-failed"))</span></span> |
| <span id="L130"><span class="lineNum"> 130</span> :<span class="tlaUNC"> 0 : dt_add_property(mem, "save-failed", NULL, 0);</span></span> |
| <span id="L131"><span class="lineNum"> 131</span> : : </span> |
| <span id="L132"><span class="lineNum"> 132</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L133"><span class="lineNum"> 133</span> : : </span> |
| <span id="L134"><span class="lineNum"> 134</span> :<span class="tlaUNC"> 0 : case PHYS_ATTR_STATUS_MEM_INVALID:</span></span> |
| <span id="L135"><span class="lineNum"> 135</span> :<span class="tlaUNC"> 0 : if (dt_find_property(mem, "save-trigged-unarmed"))</span></span> |
| <span id="L136"><span class="lineNum"> 136</span> :<span class="tlaUNC"> 0 : dt_add_property_string(mem, "status",</span></span> |
| <span id="L137"><span class="lineNum"> 137</span> : : "disabled-memory-invalid");</span> |
| <span id="L138"><span class="lineNum"> 138</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L139"><span class="lineNum"> 139</span> : : }</span> |
| <span id="L140"><span class="lineNum"> 140</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L141"><span class="lineNum"> 141</span> : : </span> |
| <span id="L142"><span class="lineNum"> 142</span> :<span class="tlaGNC tlaBgGNC"> 2 : static bool add_address_range(struct dt_node *root,</span></span> |
| <span id="L143"><span class="lineNum"> 143</span> : : const struct HDIF_ms_area_id *id,</span> |
| <span id="L144"><span class="lineNum"> 144</span> : : const struct HDIF_ms_area_address_range *arange,</span> |
| <span id="L145"><span class="lineNum"> 145</span> : : uint32_t mem_type, uint32_t mem_status)</span> |
| <span id="L146"><span class="lineNum"> 146</span> : : {</span> |
| <span id="L147"><span class="lineNum"> 147</span> :<span class="tlaGNC"> 2 : const char *compat = NULL, *dev_type = NULL, *name = NULL;</span></span> |
| <span id="L148"><span class="lineNum"> 148</span> : : struct dt_node *mem;</span> |
| <span id="L149"><span class="lineNum"> 149</span> : : u32 chip_id;</span> |
| <span id="L150"><span class="lineNum"> 150</span> : : u64 reg[2];</span> |
| <span id="L151"><span class="lineNum"> 151</span> : : </span> |
| <span id="L152"><span class="lineNum"> 152</span> :<span class="tlaGNC"> 2 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></span> |
| <span id="L153"><span class="lineNum"> 153</span> : : </span> |
| <span id="L154"><span class="lineNum"> 154</span> :<span class="tlaGNC"> 2 : prlog(PR_DEBUG, " Range: 0x%016llx..0x%016llx "</span></span> |
| <span id="L155"><span class="lineNum"> 155</span> : : "on Chip 0x%x mattr: 0x%x pattr: 0x%x status:0x%x\n",</span> |
| <span id="L156"><span class="lineNum"> 156</span> : : (long long)be64_to_cpu(arange->start),</span> |
| <span id="L157"><span class="lineNum"> 157</span> : : (long long)be64_to_cpu(arange->end),</span> |
| <span id="L158"><span class="lineNum"> 158</span> : : chip_id, be32_to_cpu(arange->mirror_attr),</span> |
| <span id="L159"><span class="lineNum"> 159</span> : : mem_type, mem_status);</span> |
| <span id="L160"><span class="lineNum"> 160</span> : : </span> |
| <span id="L161"><span class="lineNum"> 161</span> : : /* reg contains start and length */</span> |
| <span id="L162"><span class="lineNum"> 162</span> :<span class="tlaGNC"> 2 : reg[0] = cleanup_addr(be64_to_cpu(arange->start));</span></span> |
| <span id="L163"><span class="lineNum"> 163</span> :<span class="tlaGNC"> 2 : reg[1] = cleanup_addr(be64_to_cpu(arange->end)) - reg[0];</span></span> |
| <span id="L164"><span class="lineNum"> 164</span> : : </span> |
| <span id="L165"><span class="lineNum"> 165</span> :<span class="tlaGNC"> 2 : switch (mem_type) {</span></span> |
| <span id="L166"><span class="lineNum"> 166</span> :<span class="tlaGNC"> 2 : case PHYS_ATTR_TYPE_STD:</span></span> |
| <span id="L167"><span class="lineNum"> 167</span> :<span class="tlaGNC"> 2 : name = "memory";</span></span> |
| <span id="L168"><span class="lineNum"> 168</span> :<span class="tlaGNC"> 2 : dev_type = "memory";</span></span> |
| <span id="L169"><span class="lineNum"> 169</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L170"><span class="lineNum"> 170</span> : : </span> |
| <span id="L171"><span class="lineNum"> 171</span> :<span class="tlaUNC tlaBgUNC"> 0 : case PHYS_ATTR_TYPE_NVDIMM:</span></span> |
| <span id="L172"><span class="lineNum"> 172</span> : : case PHYS_ATTR_TYPE_MRAM:</span> |
| <span id="L173"><span class="lineNum"> 173</span> : : case PHYS_ATTR_TYPE_PCM:</span> |
| <span id="L174"><span class="lineNum"> 174</span> : : /* fall through */</span> |
| <span id="L175"><span class="lineNum"> 175</span> :<span class="tlaUNC"> 0 : name = "nvdimm";</span></span> |
| <span id="L176"><span class="lineNum"> 176</span> :<span class="tlaUNC"> 0 : compat = "pmem-region";</span></span> |
| <span id="L177"><span class="lineNum"> 177</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L178"><span class="lineNum"> 178</span> : : </span> |
| <span id="L179"><span class="lineNum"> 179</span> : : /*</span> |
| <span id="L180"><span class="lineNum"> 180</span> : : * Future memory types could be volatile or non-volatile. Bail if don't</span> |
| <span id="L181"><span class="lineNum"> 181</span> : : * recognise the type so we don't end up trashing data accidently.</span> |
| <span id="L182"><span class="lineNum"> 182</span> : : */</span> |
| <span id="L183"><span class="lineNum"> 183</span> :<span class="tlaUNC"> 0 : default:</span></span> |
| <span id="L184"><span class="lineNum"> 184</span> :<span class="tlaUNC"> 0 : return false;</span></span> |
| <span id="L185"><span class="lineNum"> 185</span> : : }</span> |
| <span id="L186"><span class="lineNum"> 186</span> : : </span> |
| <span id="L187"><span class="lineNum"> 187</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (be16_to_cpu(id->flags) & MS_AREA_SHARED) {</span></span> |
| <span id="L188"><span class="lineNum"> 188</span> :<span class="tlaGNC"> 2 : mem = dt_find_by_name_addr(dt_root, name, reg[0]);</span></span> |
| <span id="L189"><span class="lineNum"> 189</span> :<span class="tlaGNC"> 2 : if (mem) {</span></span> |
| <span id="L190"><span class="lineNum"> 190</span> :<span class="tlaGNC"> 1 : append_chip_id(mem, chip_id);</span></span> |
| <span id="L191"><span class="lineNum"> 191</span> :<span class="tlaGNC"> 1 : if (mem_type == PHYS_ATTR_TYPE_NVDIMM)</span></span> |
| <span id="L192"><span class="lineNum"> 192</span> :<span class="tlaUNC tlaBgUNC"> 0 : update_status(mem, mem_status);</span></span> |
| <span id="L193"><span class="lineNum"> 193</span> :<span class="tlaGNC tlaBgGNC"> 1 : return true;</span></span> |
| <span id="L194"><span class="lineNum"> 194</span> : : }</span> |
| <span id="L195"><span class="lineNum"> 195</span> : : }</span> |
| <span id="L196"><span class="lineNum"> 196</span> : : </span> |
| <span id="L197"><span class="lineNum"> 197</span> :<span class="tlaGNC"> 1 : mem = dt_new_addr(root, name, reg[0]);</span></span> |
| <span id="L198"><span class="lineNum"> 198</span> :<span class="tlaGNC"> 1 : if (compat)</span></span> |
| <span id="L199"><span class="lineNum"> 199</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_string(mem, "compatible", compat);</span></span> |
| <span id="L200"><span class="lineNum"> 200</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (dev_type)</span></span> |
| <span id="L201"><span class="lineNum"> 201</span> :<span class="tlaGNC"> 1 : dt_add_property_string(mem, "device_type", dev_type);</span></span> |
| <span id="L202"><span class="lineNum"> 202</span> : : </span> |
| <span id="L203"><span class="lineNum"> 203</span> : : /* add in the nvdimm backup status flags */</span> |
| <span id="L204"><span class="lineNum"> 204</span> :<span class="tlaGNC"> 1 : if (mem_type == PHYS_ATTR_TYPE_NVDIMM)</span></span> |
| <span id="L205"><span class="lineNum"> 205</span> :<span class="tlaUNC tlaBgUNC"> 0 : update_status(mem, mem_status);</span></span> |
| <span id="L206"><span class="lineNum"> 206</span> : : </span> |
| <span id="L207"><span class="lineNum"> 207</span> : : /* common properties */</span> |
| <span id="L208"><span class="lineNum"> 208</span> : : </span> |
| <span id="L209"><span class="lineNum"> 209</span> :<span class="tlaGNC tlaBgGNC"> 1 : dt_add_property_u64s(mem, "reg", reg[0], reg[1]);</span></span> |
| <span id="L210"><span class="lineNum"> 210</span> :<span class="tlaGNC"> 1 : dt_add_property_cells(mem, "ibm,chip-id", chip_id);</span></span> |
| <span id="L211"><span class="lineNum"> 211</span> :<span class="tlaGNC"> 1 : return true;</span></span> |
| <span id="L212"><span class="lineNum"> 212</span> : : }</span> |
| <span id="L213"><span class="lineNum"> 213</span> : : </span> |
| <span id="L214"><span class="lineNum"> 214</span> :<span class="tlaGNC"> 2 : static u32 add_chip_id_to_ram_area(const struct HDIF_common_hdr *msarea,</span></span> |
| <span id="L215"><span class="lineNum"> 215</span> : : struct dt_node *ram_area)</span> |
| <span id="L216"><span class="lineNum"> 216</span> : : {</span> |
| <span id="L217"><span class="lineNum"> 217</span> : : const struct HDIF_array_hdr *arr;</span> |
| <span id="L218"><span class="lineNum"> 218</span> : : const struct HDIF_ms_area_address_range *arange;</span> |
| <span id="L219"><span class="lineNum"> 219</span> : : unsigned int size;</span> |
| <span id="L220"><span class="lineNum"> 220</span> : : u32 chip_id;</span> |
| <span id="L221"><span class="lineNum"> 221</span> : : </span> |
| <span id="L222"><span class="lineNum"> 222</span> : : /* Safe to assume pointers are valid here. */</span> |
| <span id="L223"><span class="lineNum"> 223</span> :<span class="tlaGNC"> 2 : arr = HDIF_get_idata(msarea, 4, &size);</span></span> |
| <span id="L224"><span class="lineNum"> 224</span> :<span class="tlaGNC"> 2 : arange = (void *)arr + be32_to_cpu(arr->offset);</span></span> |
| <span id="L225"><span class="lineNum"> 225</span> :<span class="tlaGNC"> 2 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></span> |
| <span id="L226"><span class="lineNum"> 226</span> :<span class="tlaGNC"> 2 : dt_add_property_cells(ram_area, "ibm,chip-id", chip_id);</span></span> |
| <span id="L227"><span class="lineNum"> 227</span> : : </span> |
| <span id="L228"><span class="lineNum"> 228</span> :<span class="tlaGNC"> 2 : return chip_id;</span></span> |
| <span id="L229"><span class="lineNum"> 229</span> : : }</span> |
| <span id="L230"><span class="lineNum"> 230</span> : : </span> |
| <span id="L231"><span class="lineNum"> 231</span> :<span class="tlaGNC"> 2 : static void add_bus_freq_to_ram_area(struct dt_node *ram_node, u32 chip_id)</span></span> |
| <span id="L232"><span class="lineNum"> 232</span> : : {</span> |
| <span id="L233"><span class="lineNum"> 233</span> : : const struct sppcia_cpu_timebase *timebase;</span> |
| <span id="L234"><span class="lineNum"> 234</span> :<span class="tlaGNC"> 2 : bool got_pcia = false;</span></span> |
| <span id="L235"><span class="lineNum"> 235</span> : : const void *pcia;</span> |
| <span id="L236"><span class="lineNum"> 236</span> : : u64 freq;</span> |
| <span id="L237"><span class="lineNum"> 237</span> : : u32 size;</span> |
| <span id="L238"><span class="lineNum"> 238</span> : : </span> |
| <span id="L239"><span class="lineNum"> 239</span> :<span class="tlaGNC"> 2 : pcia = get_hdif(&spiras->ntuples.pcia, SPPCIA_HDIF_SIG);</span></span> |
| <span id="L240"><span class="lineNum"> 240</span> :<span class="tlaGNC"> 2 : if (!pcia) {</span></span> |
| <span id="L241"><span class="lineNum"> 241</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_WARNING, "HDAT: Failed to add memory bus frequency "</span></span> |
| <span id="L242"><span class="lineNum"> 242</span> : : "as PCIA does not exist\n");</span> |
| <span id="L243"><span class="lineNum"> 243</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L244"><span class="lineNum"> 244</span> : : }</span> |
| <span id="L245"><span class="lineNum"> 245</span> : : </span> |
| <span id="L246"><span class="lineNum"> 246</span> :<span class="tlaGNC tlaBgGNC"> 2 : for_each_pcia(spiras, pcia) {</span></span> |
| <span id="L247"><span class="lineNum"> 247</span> : : const struct sppcia_core_unique *id;</span> |
| <span id="L248"><span class="lineNum"> 248</span> : : </span> |
| <span id="L249"><span class="lineNum"> 249</span> :<span class="tlaGNC"> 2 : id = HDIF_get_idata(pcia, SPPCIA_IDATA_CORE_UNIQUE, &size);</span></span> |
| <span id="L250"><span class="lineNum"> 250</span> :<span class="tlaGNC"> 2 : if (!id || size < sizeof(*id)) {</span></span> |
| <span id="L251"><span class="lineNum"> 251</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_WARNING, "HDAT: Bad id size %u @ %p\n", size, id);</span></span> |
| <span id="L252"><span class="lineNum"> 252</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L253"><span class="lineNum"> 253</span> : : }</span> |
| <span id="L254"><span class="lineNum"> 254</span> : : </span> |
| <span id="L255"><span class="lineNum"> 255</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (chip_id == pcid_to_chip_id(be32_to_cpu(id->proc_chip_id))) {</span></span> |
| <span id="L256"><span class="lineNum"> 256</span> :<span class="tlaGNC"> 2 : got_pcia = true;</span></span> |
| <span id="L257"><span class="lineNum"> 257</span> :<span class="tlaGNC"> 2 : break;</span></span> |
| <span id="L258"><span class="lineNum"> 258</span> : : }</span> |
| <span id="L259"><span class="lineNum"> 259</span> : : }</span> |
| <span id="L260"><span class="lineNum"> 260</span> : : </span> |
| <span id="L261"><span class="lineNum"> 261</span> :<span class="tlaGNC"> 2 : if (got_pcia == false)</span></span> |
| <span id="L262"><span class="lineNum"> 262</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L263"><span class="lineNum"> 263</span> : : </span> |
| <span id="L264"><span class="lineNum"> 264</span> :<span class="tlaGNC tlaBgGNC"> 2 : timebase = HDIF_get_idata(pcia, SPPCIA_IDATA_TIMEBASE, &size);</span></span> |
| <span id="L265"><span class="lineNum"> 265</span> :<span class="tlaGNC"> 2 : if (!timebase || size < sizeof(*timebase)) {</span></span> |
| <span id="L266"><span class="lineNum"> 266</span> : : /**</span> |
| <span id="L267"><span class="lineNum"> 267</span> : : * @fwts-label HDATBadTimebaseSize</span> |
| <span id="L268"><span class="lineNum"> 268</span> : : * @fwts-advice HDAT described an invalid size for timebase,</span> |
| <span id="L269"><span class="lineNum"> 269</span> : : * which means there's a disagreement between HDAT and OPAL.</span> |
| <span id="L270"><span class="lineNum"> 270</span> : : * This is most certainly a firmware bug.</span> |
| <span id="L271"><span class="lineNum"> 271</span> : : */</span> |
| <span id="L272"><span class="lineNum"> 272</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_ERR, "HDAT: Bad timebase size %u @ %p\n", size,</span></span> |
| <span id="L273"><span class="lineNum"> 273</span> : : timebase);</span> |
| <span id="L274"><span class="lineNum"> 274</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L275"><span class="lineNum"> 275</span> : : }</span> |
| <span id="L276"><span class="lineNum"> 276</span> : : </span> |
| <span id="L277"><span class="lineNum"> 277</span> :<span class="tlaGNC tlaBgGNC"> 2 : freq = ((u64)be32_to_cpu(timebase->memory_bus_frequency)) * 1000000ul;</span></span> |
| <span id="L278"><span class="lineNum"> 278</span> :<span class="tlaGNC"> 2 : dt_add_property_u64(ram_node, "ibm,memory-bus-frequency", freq);</span></span> |
| <span id="L279"><span class="lineNum"> 279</span> : : }</span> |
| <span id="L280"><span class="lineNum"> 280</span> : : </span> |
| <span id="L281"><span class="lineNum"> 281</span> :<span class="tlaGNC"> 2 : static void add_size_to_ram_area(struct dt_node *ram_node,</span></span> |
| <span id="L282"><span class="lineNum"> 282</span> : : const struct HDIF_common_hdr *ramarea)</span> |
| <span id="L283"><span class="lineNum"> 283</span> : : {</span> |
| <span id="L284"><span class="lineNum"> 284</span> : : char str[16];</span> |
| <span id="L285"><span class="lineNum"> 285</span> : : const struct HDIF_ram_area_size *ram_area_sz;</span> |
| <span id="L286"><span class="lineNum"> 286</span> : : </span> |
| <span id="L287"><span class="lineNum"> 287</span> : : /* DIMM size */</span> |
| <span id="L288"><span class="lineNum"> 288</span> :<span class="tlaGNC"> 2 : ram_area_sz = HDIF_get_idata(ramarea, 3, NULL);</span></span> |
| <span id="L289"><span class="lineNum"> 289</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(ram_area_sz))</span></span> |
| <span id="L290"><span class="lineNum"> 290</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L291"><span class="lineNum"> 291</span> : : </span> |
| <span id="L292"><span class="lineNum"> 292</span> :<span class="tlaGNC tlaBgGNC"> 2 : memset(str, 0, 16);</span></span> |
| <span id="L293"><span class="lineNum"> 293</span> :<span class="tlaGNC"> 2 : snprintf(str, 16, "%d", be32_to_cpu(ram_area_sz->mb));</span></span> |
| <span id="L294"><span class="lineNum"> 294</span> :<span class="tlaGNC"> 2 : dt_add_property_string(ram_node, "size", str);</span></span> |
| <span id="L295"><span class="lineNum"> 295</span> : : }</span> |
| <span id="L296"><span class="lineNum"> 296</span> : : </span> |
| <span id="L297"><span class="lineNum"> 297</span> :<span class="tlaGNC"> 2 : static void vpd_add_ram_area(const struct HDIF_common_hdr *msarea)</span></span> |
| <span id="L298"><span class="lineNum"> 298</span> : : {</span> |
| <span id="L299"><span class="lineNum"> 299</span> : : unsigned int i;</span> |
| <span id="L300"><span class="lineNum"> 300</span> : : unsigned int ram_sz;</span> |
| <span id="L301"><span class="lineNum"> 301</span> : : const struct HDIF_common_hdr *ramarea;</span> |
| <span id="L302"><span class="lineNum"> 302</span> : : const struct HDIF_child_ptr *ramptr;</span> |
| <span id="L303"><span class="lineNum"> 303</span> : : const struct HDIF_ram_area_id *ram_id;</span> |
| <span id="L304"><span class="lineNum"> 304</span> : : struct dt_node *ram_node;</span> |
| <span id="L305"><span class="lineNum"> 305</span> : : u32 chip_id;</span> |
| <span id="L306"><span class="lineNum"> 306</span> : : const void *vpd_blob;</span> |
| <span id="L307"><span class="lineNum"> 307</span> : : </span> |
| <span id="L308"><span class="lineNum"> 308</span> :<span class="tlaGNC"> 2 : ramptr = HDIF_child_arr(msarea, 0);</span></span> |
| <span id="L309"><span class="lineNum"> 309</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(ramptr)) {</span></span> |
| <span id="L310"><span class="lineNum"> 310</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS AREA: No RAM area at %p\n", msarea);</span></span> |
| <span id="L311"><span class="lineNum"> 311</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L312"><span class="lineNum"> 312</span> : : }</span> |
| <span id="L313"><span class="lineNum"> 313</span> : : </span> |
| <span id="L314"><span class="lineNum"> 314</span> :<span class="tlaGNC tlaBgGNC"> 4 : for (i = 0; i < be32_to_cpu(ramptr->count); i++) {</span></span> |
| <span id="L315"><span class="lineNum"> 315</span> :<span class="tlaGNC"> 2 : ramarea = HDIF_child(msarea, ramptr, i, "RAM ");</span></span> |
| <span id="L316"><span class="lineNum"> 316</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(ramarea))</span></span> |
| <span id="L317"><span class="lineNum"> 317</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L318"><span class="lineNum"> 318</span> : : </span> |
| <span id="L319"><span class="lineNum"> 319</span> :<span class="tlaGNC tlaBgGNC"> 2 : ram_id = HDIF_get_idata(ramarea, 2, &ram_sz);</span></span> |
| <span id="L320"><span class="lineNum"> 320</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(ram_id))</span></span> |
| <span id="L321"><span class="lineNum"> 321</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L322"><span class="lineNum"> 322</span> : : </span> |
| <span id="L323"><span class="lineNum"> 323</span> : : /* Don't add VPD for non-existent RAM */</span> |
| <span id="L324"><span class="lineNum"> 324</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (!(be16_to_cpu(ram_id->flags) & RAM_AREA_INSTALLED))</span></span> |
| <span id="L325"><span class="lineNum"> 325</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L326"><span class="lineNum"> 326</span> : : </span> |
| <span id="L327"><span class="lineNum"> 327</span> :<span class="tlaGNC tlaBgGNC"> 2 : ram_node = dt_add_vpd_node(ramarea, 0, 1);</span></span> |
| <span id="L328"><span class="lineNum"> 328</span> :<span class="tlaGNC"> 2 : if (!ram_node)</span></span> |
| <span id="L329"><span class="lineNum"> 329</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L330"><span class="lineNum"> 330</span> : : </span> |
| <span id="L331"><span class="lineNum"> 331</span> :<span class="tlaGNC tlaBgGNC"> 2 : chip_id = add_chip_id_to_ram_area(msarea, ram_node);</span></span> |
| <span id="L332"><span class="lineNum"> 332</span> :<span class="tlaGNC"> 2 : add_bus_freq_to_ram_area(ram_node, chip_id);</span></span> |
| <span id="L333"><span class="lineNum"> 333</span> : : </span> |
| <span id="L334"><span class="lineNum"> 334</span> :<span class="tlaGNC"> 2 : if (ram_sz >= offsetof(struct HDIF_ram_area_id, speed)) {</span></span> |
| <span id="L335"><span class="lineNum"> 335</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property_cells(ram_node, "frequency",</span></span> |
| <span id="L336"><span class="lineNum"> 336</span> : : be32_to_cpu(ram_id->speed)*1000000);</span> |
| <span id="L337"><span class="lineNum"> 337</span> : : }</span> |
| <span id="L338"><span class="lineNum"> 338</span> : : </span> |
| <span id="L339"><span class="lineNum"> 339</span> :<span class="tlaGNC tlaBgGNC"> 2 : vpd_blob = HDIF_get_idata(ramarea, 1, &ram_sz);</span></span> |
| <span id="L340"><span class="lineNum"> 340</span> : : </span> |
| <span id="L341"><span class="lineNum"> 341</span> : : /* DIMM size */</span> |
| <span id="L342"><span class="lineNum"> 342</span> :<span class="tlaGNC"> 2 : add_size_to_ram_area(ram_node, ramarea);</span></span> |
| <span id="L343"><span class="lineNum"> 343</span> : : /*</span> |
| <span id="L344"><span class="lineNum"> 344</span> : : * For direct-attached memory we have a DDR "Serial</span> |
| <span id="L345"><span class="lineNum"> 345</span> : : * Presence Detection" blob rather than an IBM keyword</span> |
| <span id="L346"><span class="lineNum"> 346</span> : : * blob.</span> |
| <span id="L347"><span class="lineNum"> 347</span> : : */</span> |
| <span id="L348"><span class="lineNum"> 348</span> :<span class="tlaGNC"> 2 : if (!vpd_valid(vpd_blob, ram_sz))</span></span> |
| <span id="L349"><span class="lineNum"> 349</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_property(ram_node, "spd", vpd_blob, ram_sz);</span></span> |
| <span id="L350"><span class="lineNum"> 350</span> : : }</span> |
| <span id="L351"><span class="lineNum"> 351</span> : : }</span> |
| <span id="L352"><span class="lineNum"> 352</span> : : </span> |
| <span id="L353"><span class="lineNum"> 353</span> :<span class="tlaUNC"> 0 : static void vpd_parse_spd(struct dt_node *dimm, const char *spd, u32 size)</span></span> |
| <span id="L354"><span class="lineNum"> 354</span> : : {</span> |
| <span id="L355"><span class="lineNum"> 355</span> : : __be16 *vendor;</span> |
| <span id="L356"><span class="lineNum"> 356</span> : : __be32 *sn;</span> |
| <span id="L357"><span class="lineNum"> 357</span> : : </span> |
| <span id="L358"><span class="lineNum"> 358</span> : : /* SPD is too small */</span> |
| <span id="L359"><span class="lineNum"> 359</span> :<span class="tlaUNC"> 0 : if (size < 512) {</span></span> |
| <span id="L360"><span class="lineNum"> 360</span> :<span class="tlaUNC"> 0 : prlog(PR_WARNING, "MSVPD: Invalid SPD size. "</span></span> |
| <span id="L361"><span class="lineNum"> 361</span> : : "Expected 512 bytes, got %d\n", size);</span> |
| <span id="L362"><span class="lineNum"> 362</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L363"><span class="lineNum"> 363</span> : : }</span> |
| <span id="L364"><span class="lineNum"> 364</span> : : </span> |
| <span id="L365"><span class="lineNum"> 365</span> : : /* Supports DDR4 format pasing only */</span> |
| <span id="L366"><span class="lineNum"> 366</span> :<span class="tlaUNC"> 0 : if (spd[0x2] < 0xc) {</span></span> |
| <span id="L367"><span class="lineNum"> 367</span> :<span class="tlaUNC"> 0 : prlog(PR_WARNING,</span></span> |
| <span id="L368"><span class="lineNum"> 368</span> : : "MSVPD: SPD format (%x) not supported\n", spd[0x2]);</span> |
| <span id="L369"><span class="lineNum"> 369</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L370"><span class="lineNum"> 370</span> : : }</span> |
| <span id="L371"><span class="lineNum"> 371</span> : : </span> |
| <span id="L372"><span class="lineNum"> 372</span> :<span class="tlaUNC"> 0 : dt_add_property_string(dimm, "device_type", "memory-dimm-ddr4");</span></span> |
| <span id="L373"><span class="lineNum"> 373</span> : : </span> |
| <span id="L374"><span class="lineNum"> 374</span> : : /* DRAM device type */</span> |
| <span id="L375"><span class="lineNum"> 375</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "memory-id", spd[0x2]);</span></span> |
| <span id="L376"><span class="lineNum"> 376</span> : : </span> |
| <span id="L377"><span class="lineNum"> 377</span> : : /* Module revision code */</span> |
| <span id="L378"><span class="lineNum"> 378</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "product-version", spd[0x15d]);</span></span> |
| <span id="L379"><span class="lineNum"> 379</span> : : </span> |
| <span id="L380"><span class="lineNum"> 380</span> : : /* Serial number */</span> |
| <span id="L381"><span class="lineNum"> 381</span> :<span class="tlaUNC"> 0 : sn = (__be32 *)&spd[0x145];</span></span> |
| <span id="L382"><span class="lineNum"> 382</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "serial-number", be32_to_cpu(*sn));</span></span> |
| <span id="L383"><span class="lineNum"> 383</span> : : </span> |
| <span id="L384"><span class="lineNum"> 384</span> : : /* Part number */</span> |
| <span id="L385"><span class="lineNum"> 385</span> :<span class="tlaUNC"> 0 : dt_add_property_nstr(dimm, "part-number", &spd[0x149], 20);</span></span> |
| <span id="L386"><span class="lineNum"> 386</span> : : </span> |
| <span id="L387"><span class="lineNum"> 387</span> : : /* Module manufacturer ID */</span> |
| <span id="L388"><span class="lineNum"> 388</span> :<span class="tlaUNC"> 0 : vendor = (__be16 *)&spd[0x140];</span></span> |
| <span id="L389"><span class="lineNum"> 389</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "manufacturer-id", be16_to_cpu(*vendor));</span></span> |
| <span id="L390"><span class="lineNum"> 390</span> : : }</span> |
| <span id="L391"><span class="lineNum"> 391</span> : : </span> |
| <span id="L392"><span class="lineNum"> 392</span> :<span class="tlaUNC"> 0 : static void add_dimm_info(struct dt_node *parent,</span></span> |
| <span id="L393"><span class="lineNum"> 393</span> : : const struct HDIF_common_hdr *msarea)</span> |
| <span id="L394"><span class="lineNum"> 394</span> : : {</span> |
| <span id="L395"><span class="lineNum"> 395</span> : : unsigned int i, size;</span> |
| <span id="L396"><span class="lineNum"> 396</span> : : const struct HDIF_child_ptr *ramptr;</span> |
| <span id="L397"><span class="lineNum"> 397</span> : : const struct HDIF_common_hdr *ramarea;</span> |
| <span id="L398"><span class="lineNum"> 398</span> : : const struct spira_fru_id *fru_id;</span> |
| <span id="L399"><span class="lineNum"> 399</span> : : const struct HDIF_ram_area_id *ram_id;</span> |
| <span id="L400"><span class="lineNum"> 400</span> : : const struct HDIF_ram_area_size *ram_area_sz;</span> |
| <span id="L401"><span class="lineNum"> 401</span> : : struct dt_node *dimm;</span> |
| <span id="L402"><span class="lineNum"> 402</span> : : const void *vpd_blob;</span> |
| <span id="L403"><span class="lineNum"> 403</span> : : </span> |
| <span id="L404"><span class="lineNum"> 404</span> :<span class="tlaUNC"> 0 : ramptr = HDIF_child_arr(msarea, 0);</span></span> |
| <span id="L405"><span class="lineNum"> 405</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(ramptr)) {</span></span> |
| <span id="L406"><span class="lineNum"> 406</span> :<span class="tlaUNC"> 0 : prerror("MS AREA: No RAM area at %p\n", msarea);</span></span> |
| <span id="L407"><span class="lineNum"> 407</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L408"><span class="lineNum"> 408</span> : : }</span> |
| <span id="L409"><span class="lineNum"> 409</span> : : </span> |
| <span id="L410"><span class="lineNum"> 410</span> :<span class="tlaUNC"> 0 : for (i = 0; i < be32_to_cpu(ramptr->count); i++) {</span></span> |
| <span id="L411"><span class="lineNum"> 411</span> :<span class="tlaUNC"> 0 : ramarea = HDIF_child(msarea, ramptr, i, "RAM ");</span></span> |
| <span id="L412"><span class="lineNum"> 412</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(ramarea))</span></span> |
| <span id="L413"><span class="lineNum"> 413</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L414"><span class="lineNum"> 414</span> : : </span> |
| <span id="L415"><span class="lineNum"> 415</span> :<span class="tlaUNC"> 0 : fru_id = HDIF_get_idata(ramarea, 0, NULL);</span></span> |
| <span id="L416"><span class="lineNum"> 416</span> :<span class="tlaUNC"> 0 : if (!fru_id)</span></span> |
| <span id="L417"><span class="lineNum"> 417</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L418"><span class="lineNum"> 418</span> : : </span> |
| <span id="L419"><span class="lineNum"> 419</span> : : /* Use Resource ID to add dimm node */</span> |
| <span id="L420"><span class="lineNum"> 420</span> :<span class="tlaUNC"> 0 : dimm = dt_find_by_name_addr(parent, "dimm",</span></span> |
| <span id="L421"><span class="lineNum"> 421</span> :<span class="tlaUNC"> 0 : be16_to_cpu(fru_id->rsrc_id));</span></span> |
| <span id="L422"><span class="lineNum"> 422</span> :<span class="tlaUNC"> 0 : if (dimm)</span></span> |
| <span id="L423"><span class="lineNum"> 423</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L424"><span class="lineNum"> 424</span> :<span class="tlaUNC"> 0 : dimm= dt_new_addr(parent, "dimm", be16_to_cpu(fru_id->rsrc_id));</span></span> |
| <span id="L425"><span class="lineNum"> 425</span> :<span class="tlaUNC"> 0 : assert(dimm);</span></span> |
| <span id="L426"><span class="lineNum"> 426</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "reg", be16_to_cpu(fru_id->rsrc_id));</span></span> |
| <span id="L427"><span class="lineNum"> 427</span> : : </span> |
| <span id="L428"><span class="lineNum"> 428</span> : : /* Add location code */</span> |
| <span id="L429"><span class="lineNum"> 429</span> :<span class="tlaUNC"> 0 : slca_vpd_add_loc_code(dimm, be16_to_cpu(fru_id->slca_index));</span></span> |
| <span id="L430"><span class="lineNum"> 430</span> : : </span> |
| <span id="L431"><span class="lineNum"> 431</span> : : /* DIMM size */</span> |
| <span id="L432"><span class="lineNum"> 432</span> :<span class="tlaUNC"> 0 : ram_area_sz = HDIF_get_idata(ramarea, 3, NULL);</span></span> |
| <span id="L433"><span class="lineNum"> 433</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(ram_area_sz))</span></span> |
| <span id="L434"><span class="lineNum"> 434</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L435"><span class="lineNum"> 435</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dimm, "size", be32_to_cpu(ram_area_sz->mb));</span></span> |
| <span id="L436"><span class="lineNum"> 436</span> : : </span> |
| <span id="L437"><span class="lineNum"> 437</span> : : /* DIMM state */</span> |
| <span id="L438"><span class="lineNum"> 438</span> :<span class="tlaUNC"> 0 : ram_id = HDIF_get_idata(ramarea, 2, NULL);</span></span> |
| <span id="L439"><span class="lineNum"> 439</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(ram_id))</span></span> |
| <span id="L440"><span class="lineNum"> 440</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L441"><span class="lineNum"> 441</span> : : </span> |
| <span id="L442"><span class="lineNum"> 442</span> :<span class="tlaUNC"> 0 : if ((be16_to_cpu(ram_id->flags) & RAM_AREA_INSTALLED) &&</span></span> |
| <span id="L443"><span class="lineNum"> 443</span> :<span class="tlaUNC"> 0 : (be16_to_cpu(ram_id->flags) & RAM_AREA_FUNCTIONAL))</span></span> |
| <span id="L444"><span class="lineNum"> 444</span> :<span class="tlaUNC"> 0 : dt_add_property_string(dimm, "status", "okay");</span></span> |
| <span id="L445"><span class="lineNum"> 445</span> : : else</span> |
| <span id="L446"><span class="lineNum"> 446</span> :<span class="tlaUNC"> 0 : dt_add_property_string(dimm, "status", "disabled");</span></span> |
| <span id="L447"><span class="lineNum"> 447</span> : : </span> |
| <span id="L448"><span class="lineNum"> 448</span> :<span class="tlaUNC"> 0 : vpd_blob = HDIF_get_idata(ramarea, 1, &size);</span></span> |
| <span id="L449"><span class="lineNum"> 449</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(vpd_blob))</span></span> |
| <span id="L450"><span class="lineNum"> 450</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L451"><span class="lineNum"> 451</span> :<span class="tlaUNC"> 0 : if (vpd_valid(vpd_blob, size))</span></span> |
| <span id="L452"><span class="lineNum"> 452</span> :<span class="tlaUNC"> 0 : vpd_data_parse(dimm, vpd_blob, size);</span></span> |
| <span id="L453"><span class="lineNum"> 453</span> : : else</span> |
| <span id="L454"><span class="lineNum"> 454</span> :<span class="tlaUNC"> 0 : vpd_parse_spd(dimm, vpd_blob, size);</span></span> |
| <span id="L455"><span class="lineNum"> 455</span> : : }</span> |
| <span id="L456"><span class="lineNum"> 456</span> : : }</span> |
| <span id="L457"><span class="lineNum"> 457</span> : : </span> |
| <span id="L458"><span class="lineNum"> 458</span> :<span class="tlaUNC"> 0 : static inline void dt_add_mem_reg_property(struct dt_node *node, u64 addr)</span></span> |
| <span id="L459"><span class="lineNum"> 459</span> : : {</span> |
| <span id="L460"><span class="lineNum"> 460</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "#address-cells", 1);</span></span> |
| <span id="L461"><span class="lineNum"> 461</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "#size-cells", 0);</span></span> |
| <span id="L462"><span class="lineNum"> 462</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "reg", addr);</span></span> |
| <span id="L463"><span class="lineNum"> 463</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L464"><span class="lineNum"> 464</span> : : </span> |
| <span id="L465"><span class="lineNum"> 465</span> :<span class="tlaUNC"> 0 : static void add_memory_controller_p9n(const struct HDIF_common_hdr *msarea,</span></span> |
| <span id="L466"><span class="lineNum"> 466</span> : : const struct HDIF_ms_area_address_range *arange)</span> |
| <span id="L467"><span class="lineNum"> 467</span> : : {</span> |
| <span id="L468"><span class="lineNum"> 468</span> : : uint32_t chip_id;</span> |
| <span id="L469"><span class="lineNum"> 469</span> : : uint32_t controller_id, mcbist_id, mcs_id, mca_id;</span> |
| <span id="L470"><span class="lineNum"> 470</span> : : struct dt_node *xscom, *mcbist, *mcs, *mca;</span> |
| <span id="L471"><span class="lineNum"> 471</span> : : </span> |
| <span id="L472"><span class="lineNum"> 472</span> :<span class="tlaUNC"> 0 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></span> |
| <span id="L473"><span class="lineNum"> 473</span> :<span class="tlaUNC"> 0 : controller_id = be32_to_cpu(arange->controller_id);</span></span> |
| <span id="L474"><span class="lineNum"> 474</span> :<span class="tlaUNC"> 0 : xscom = find_xscom_for_chip(chip_id);</span></span> |
| <span id="L475"><span class="lineNum"> 475</span> :<span class="tlaUNC"> 0 : if (!xscom) {</span></span> |
| <span id="L476"><span class="lineNum"> 476</span> :<span class="tlaUNC"> 0 : prlog(PR_WARNING,</span></span> |
| <span id="L477"><span class="lineNum"> 477</span> : : "MS AREA: Can't find XSCOM for chip %d\n", chip_id);</span> |
| <span id="L478"><span class="lineNum"> 478</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L479"><span class="lineNum"> 479</span> : : }</span> |
| <span id="L480"><span class="lineNum"> 480</span> : : </span> |
| <span id="L481"><span class="lineNum"> 481</span> :<span class="tlaUNC"> 0 : mcbist_id = MS_CONTROLLER_MCBIST_ID(controller_id);</span></span> |
| <span id="L482"><span class="lineNum"> 482</span> :<span class="tlaUNC"> 0 : mcbist = dt_find_by_name_addr(xscom, "mcbist", mcbist_id);</span></span> |
| <span id="L483"><span class="lineNum"> 483</span> :<span class="tlaUNC"> 0 : if (!mcbist) {</span></span> |
| <span id="L484"><span class="lineNum"> 484</span> :<span class="tlaUNC"> 0 : mcbist = dt_new_addr(xscom, "mcbist", mcbist_id);</span></span> |
| <span id="L485"><span class="lineNum"> 485</span> :<span class="tlaUNC"> 0 : assert(mcbist);</span></span> |
| <span id="L486"><span class="lineNum"> 486</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(mcbist, "#address-cells", 1);</span></span> |
| <span id="L487"><span class="lineNum"> 487</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(mcbist, "#size-cells", 0);</span></span> |
| <span id="L488"><span class="lineNum"> 488</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(mcbist, "reg", mcbist_id, 0);</span></span> |
| <span id="L489"><span class="lineNum"> 489</span> : : }</span> |
| <span id="L490"><span class="lineNum"> 490</span> : : </span> |
| <span id="L491"><span class="lineNum"> 491</span> :<span class="tlaUNC"> 0 : mcs_id = MS_CONTROLLER_MCS_ID(controller_id);</span></span> |
| <span id="L492"><span class="lineNum"> 492</span> :<span class="tlaUNC"> 0 : mcs = dt_find_by_name_addr(mcbist, "mcs", mcs_id);</span></span> |
| <span id="L493"><span class="lineNum"> 493</span> :<span class="tlaUNC"> 0 : if (!mcs) {</span></span> |
| <span id="L494"><span class="lineNum"> 494</span> :<span class="tlaUNC"> 0 : mcs = dt_new_addr(mcbist, "mcs", mcs_id);</span></span> |
| <span id="L495"><span class="lineNum"> 495</span> :<span class="tlaUNC"> 0 : assert(mcs);</span></span> |
| <span id="L496"><span class="lineNum"> 496</span> :<span class="tlaUNC"> 0 : dt_add_mem_reg_property(mcs, mcs_id);</span></span> |
| <span id="L497"><span class="lineNum"> 497</span> : : }</span> |
| <span id="L498"><span class="lineNum"> 498</span> : : </span> |
| <span id="L499"><span class="lineNum"> 499</span> :<span class="tlaUNC"> 0 : mca_id = MS_CONTROLLER_MCA_ID(controller_id);</span></span> |
| <span id="L500"><span class="lineNum"> 500</span> :<span class="tlaUNC"> 0 : mca = dt_find_by_name_addr(mcs, "mca", mca_id);</span></span> |
| <span id="L501"><span class="lineNum"> 501</span> :<span class="tlaUNC"> 0 : if (!mca) {</span></span> |
| <span id="L502"><span class="lineNum"> 502</span> :<span class="tlaUNC"> 0 : mca = dt_new_addr(mcs, "mca", mca_id);</span></span> |
| <span id="L503"><span class="lineNum"> 503</span> :<span class="tlaUNC"> 0 : assert(mca);</span></span> |
| <span id="L504"><span class="lineNum"> 504</span> :<span class="tlaUNC"> 0 : dt_add_mem_reg_property(mca, mca_id);</span></span> |
| <span id="L505"><span class="lineNum"> 505</span> : : }</span> |
| <span id="L506"><span class="lineNum"> 506</span> : : </span> |
| <span id="L507"><span class="lineNum"> 507</span> :<span class="tlaUNC"> 0 : add_dimm_info(mca, msarea);</span></span> |
| <span id="L508"><span class="lineNum"> 508</span> : : }</span> |
| <span id="L509"><span class="lineNum"> 509</span> : : </span> |
| <span id="L510"><span class="lineNum"> 510</span> :<span class="tlaGNC tlaBgGNC"> 2 : static void add_memory_buffer_mmio(const struct HDIF_common_hdr *msarea)</span></span> |
| <span id="L511"><span class="lineNum"> 511</span> : : {</span> |
| <span id="L512"><span class="lineNum"> 512</span> : : const struct HDIF_ms_area_ocmb_mmio *mmio;</span> |
| <span id="L513"><span class="lineNum"> 513</span> :<span class="tlaGNC"> 2 : uint64_t min_addr = ~0ull, hbrt_id = 0;</span></span> |
| <span id="L514"><span class="lineNum"> 514</span> : : const struct HDIF_array_hdr *array;</span> |
| <span id="L515"><span class="lineNum"> 515</span> :<span class="tlaGNC"> 2 : unsigned int i, count, ranges = 0;</span></span> |
| <span id="L516"><span class="lineNum"> 516</span> : : struct dt_node *membuf;</span> |
| <span id="L517"><span class="lineNum"> 517</span> : : beint64_t *reg, *flags;</span> |
| <span id="L518"><span class="lineNum"> 518</span> : : </span> |
| <span id="L519"><span class="lineNum"> 519</span> :<span class="tlaGNC"> 2 : if (proc_gen <= proc_gen_p9 && PVR_TYPE(mfspr(SPR_PVR)) != PVR_TYPE_P9P)</span></span> |
| <span id="L520"><span class="lineNum"> 520</span> :<span class="tlaGNC"> 2 : return;</span></span> |
| <span id="L521"><span class="lineNum"> 521</span> : : </span> |
| <span id="L522"><span class="lineNum"> 522</span> :<span class="tlaUNC tlaBgUNC"> 0 : if (be16_to_cpu(msarea->version) < 0x50) {</span></span> |
| <span id="L523"><span class="lineNum"> 523</span> :<span class="tlaUNC"> 0 : prlog(PR_WARNING, "MS AREA: Inconsistent MSAREA version %x for P9P system",</span></span> |
| <span id="L524"><span class="lineNum"> 524</span> : : be16_to_cpu(msarea->version));</span> |
| <span id="L525"><span class="lineNum"> 525</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L526"><span class="lineNum"> 526</span> : : }</span> |
| <span id="L527"><span class="lineNum"> 527</span> : : </span> |
| <span id="L528"><span class="lineNum"> 528</span> :<span class="tlaUNC"> 0 : array = HDIF_get_iarray(msarea, MSAREA_IDATA_MMIO_IDX, &count);</span></span> |
| <span id="L529"><span class="lineNum"> 529</span> :<span class="tlaUNC"> 0 : if (!array || count <= 0) {</span></span> |
| <span id="L530"><span class="lineNum"> 530</span> :<span class="tlaUNC"> 0 : prerror("MS AREA: No OCMB MMIO array at MS Area %p\n", msarea);</span></span> |
| <span id="L531"><span class="lineNum"> 531</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L532"><span class="lineNum"> 532</span> : : }</span> |
| <span id="L533"><span class="lineNum"> 533</span> : : </span> |
| <span id="L534"><span class="lineNum"> 534</span> :<span class="tlaUNC"> 0 : reg = zalloc(count * 2 * sizeof(*reg));</span></span> |
| <span id="L535"><span class="lineNum"> 535</span> :<span class="tlaUNC"> 0 : flags = zalloc(count * sizeof(*flags));</span></span> |
| <span id="L536"><span class="lineNum"> 536</span> : : </span> |
| <span id="L537"><span class="lineNum"> 537</span> : : /* grab the hbrt id from the first range. */</span> |
| <span id="L538"><span class="lineNum"> 538</span> :<span class="tlaUNC"> 0 : HDIF_iarray_for_each(array, i, mmio) {</span></span> |
| <span id="L539"><span class="lineNum"> 539</span> :<span class="tlaUNC"> 0 : hbrt_id = be64_to_cpu(mmio->hbrt_id);</span></span> |
| <span id="L540"><span class="lineNum"> 540</span> :<span class="tlaUNC"> 0 : break;</span></span> |
| <span id="L541"><span class="lineNum"> 541</span> : : }</span> |
| <span id="L542"><span class="lineNum"> 542</span> : : </span> |
| <span id="L543"><span class="lineNum"> 543</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "Adding memory buffer MMIO ranges for %"PRIx64"\n",</span></span> |
| <span id="L544"><span class="lineNum"> 544</span> : : hbrt_id);</span> |
| <span id="L545"><span class="lineNum"> 545</span> : : </span> |
| <span id="L546"><span class="lineNum"> 546</span> :<span class="tlaUNC"> 0 : HDIF_iarray_for_each(array, i, mmio) {</span></span> |
| <span id="L547"><span class="lineNum"> 547</span> : : uint64_t start, end;</span> |
| <span id="L548"><span class="lineNum"> 548</span> : : </span> |
| <span id="L549"><span class="lineNum"> 549</span> :<span class="tlaUNC"> 0 : if (hbrt_id != be64_to_cpu(mmio->hbrt_id)) {</span></span> |
| <span id="L550"><span class="lineNum"> 550</span> :<span class="tlaUNC"> 0 : prerror("HBRT ID mismatch!\n");</span></span> |
| <span id="L551"><span class="lineNum"> 551</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L552"><span class="lineNum"> 552</span> : : }</span> |
| <span id="L553"><span class="lineNum"> 553</span> : : </span> |
| <span id="L554"><span class="lineNum"> 554</span> :<span class="tlaUNC"> 0 : start = cleanup_addr(be64_to_cpu(mmio->range_start));</span></span> |
| <span id="L555"><span class="lineNum"> 555</span> :<span class="tlaUNC"> 0 : end = cleanup_addr(be64_to_cpu(mmio->range_end));</span></span> |
| <span id="L556"><span class="lineNum"> 556</span> :<span class="tlaUNC"> 0 : if (start < min_addr)</span></span> |
| <span id="L557"><span class="lineNum"> 557</span> :<span class="tlaUNC"> 0 : min_addr = start;</span></span> |
| <span id="L558"><span class="lineNum"> 558</span> : : </span> |
| <span id="L559"><span class="lineNum"> 559</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, " %"PRIx64" - [%016"PRIx64"-%016"PRIx64")\n",</span></span> |
| <span id="L560"><span class="lineNum"> 560</span> : : hbrt_id, start, end);</span> |
| <span id="L561"><span class="lineNum"> 561</span> : : </span> |
| <span id="L562"><span class="lineNum"> 562</span> :<span class="tlaUNC"> 0 : reg[2 * ranges ] = cpu_to_be64(start);</span></span> |
| <span id="L563"><span class="lineNum"> 563</span> :<span class="tlaUNC"> 0 : reg[2 * ranges + 1] = cpu_to_be64(end - start + 1);</span></span> |
| <span id="L564"><span class="lineNum"> 564</span> :<span class="tlaUNC"> 0 : flags[ranges] = mmio->flags; /* both are BE */</span></span> |
| <span id="L565"><span class="lineNum"> 565</span> :<span class="tlaUNC"> 0 : ranges++;</span></span> |
| <span id="L566"><span class="lineNum"> 566</span> : : }</span> |
| <span id="L567"><span class="lineNum"> 567</span> : : </span> |
| <span id="L568"><span class="lineNum"> 568</span> :<span class="tlaUNC"> 0 : membuf = dt_find_by_name_addr(dt_root, "memory-buffer", min_addr);</span></span> |
| <span id="L569"><span class="lineNum"> 569</span> :<span class="tlaUNC"> 0 : if (membuf) {</span></span> |
| <span id="L570"><span class="lineNum"> 570</span> :<span class="tlaUNC"> 0 : prerror("attempted to duplicate %s\n", membuf->name);</span></span> |
| <span id="L571"><span class="lineNum"> 571</span> :<span class="tlaUNC"> 0 : goto out;</span></span> |
| <span id="L572"><span class="lineNum"> 572</span> : : }</span> |
| <span id="L573"><span class="lineNum"> 573</span> : : </span> |
| <span id="L574"><span class="lineNum"> 574</span> :<span class="tlaUNC"> 0 : membuf = dt_new_addr(dt_root, "memory-buffer", min_addr);</span></span> |
| <span id="L575"><span class="lineNum"> 575</span> :<span class="tlaUNC"> 0 : assert(membuf);</span></span> |
| <span id="L576"><span class="lineNum"> 576</span> : : </span> |
| <span id="L577"><span class="lineNum"> 577</span> :<span class="tlaUNC"> 0 : dt_add_property_string(membuf, "compatible", "ibm,explorer");</span></span> |
| <span id="L578"><span class="lineNum"> 578</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(membuf, "ibm,chip-id", hbrt_id);</span></span> |
| <span id="L579"><span class="lineNum"> 579</span> : : </span> |
| <span id="L580"><span class="lineNum"> 580</span> : : /*</span> |
| <span id="L581"><span class="lineNum"> 581</span> : : * FIXME: We should probably be sorting the address ranges based</span> |
| <span id="L582"><span class="lineNum"> 582</span> : : * on the starting address.</span> |
| <span id="L583"><span class="lineNum"> 583</span> : : */</span> |
| <span id="L584"><span class="lineNum"> 584</span> :<span class="tlaUNC"> 0 : dt_add_property(membuf, "reg", reg, sizeof(*reg) * 2 * ranges);</span></span> |
| <span id="L585"><span class="lineNum"> 585</span> :<span class="tlaUNC"> 0 : dt_add_property(membuf, "flags", flags, sizeof(*flags) * ranges);</span></span> |
| <span id="L586"><span class="lineNum"> 586</span> : : </span> |
| <span id="L587"><span class="lineNum"> 587</span> :<span class="tlaUNC"> 0 : out:</span></span> |
| <span id="L588"><span class="lineNum"> 588</span> :<span class="tlaUNC"> 0 : free(flags);</span></span> |
| <span id="L589"><span class="lineNum"> 589</span> :<span class="tlaUNC"> 0 : free(reg);</span></span> |
| <span id="L590"><span class="lineNum"> 590</span> : : }</span> |
| <span id="L591"><span class="lineNum"> 591</span> : : </span> |
| <span id="L592"><span class="lineNum"> 592</span> :<span class="tlaGNC tlaBgGNC"> 2 : static void add_memory_controller(const struct HDIF_common_hdr *msarea,</span></span> |
| <span id="L593"><span class="lineNum"> 593</span> : : const struct HDIF_ms_area_address_range *arange)</span> |
| <span id="L594"><span class="lineNum"> 594</span> : : {</span> |
| <span id="L595"><span class="lineNum"> 595</span> :<span class="tlaGNC"> 2 : const uint32_t version = PVR_TYPE(mfspr(SPR_PVR));</span></span> |
| <span id="L596"><span class="lineNum"> 596</span> : : /*</span> |
| <span id="L597"><span class="lineNum"> 597</span> : : * Memory hierarchy may change between processor version. Presently</span> |
| <span id="L598"><span class="lineNum"> 598</span> : : * it's only creating memory hierarchy for P9 (Nimbus) and P9P (Axone).</span> |
| <span id="L599"><span class="lineNum"> 599</span> : : */</span> |
| <span id="L600"><span class="lineNum"> 600</span> : : </span> |
| <span id="L601"><span class="lineNum"> 601</span> :<span class="tlaGNC"> 2 : if (version == PVR_TYPE_P9)</span></span> |
| <span id="L602"><span class="lineNum"> 602</span> :<span class="tlaUNC tlaBgUNC"> 0 : return add_memory_controller_p9n(msarea, arange);</span></span> |
| <span id="L603"><span class="lineNum"> 603</span> :<span class="tlaGNC tlaBgGNC"> 2 : else if (version == PVR_TYPE_P9P)</span></span> |
| <span id="L604"><span class="lineNum"> 604</span> :<span class="tlaUNC tlaBgUNC"> 0 : return; //return add_memory_controller_p9p(msarea, arange);</span></span> |
| <span id="L605"><span class="lineNum"> 605</span> : : else</span> |
| <span id="L606"><span class="lineNum"> 606</span> :<span class="tlaGNC tlaBgGNC"> 2 : return;</span></span> |
| <span id="L607"><span class="lineNum"> 607</span> : : }</span> |
| <span id="L608"><span class="lineNum"> 608</span> : : </span> |
| <span id="L609"><span class="lineNum"> 609</span> :<span class="tlaGNC"> 1 : static void get_msareas(struct dt_node *root,</span></span> |
| <span id="L610"><span class="lineNum"> 610</span> : : const struct HDIF_common_hdr *ms_vpd)</span> |
| <span id="L611"><span class="lineNum"> 611</span> : : {</span> |
| <span id="L612"><span class="lineNum"> 612</span> : : unsigned int i;</span> |
| <span id="L613"><span class="lineNum"> 613</span> : : const struct HDIF_child_ptr *msptr;</span> |
| <span id="L614"><span class="lineNum"> 614</span> : : </span> |
| <span id="L615"><span class="lineNum"> 615</span> : : /* First childptr refers to msareas. */</span> |
| <span id="L616"><span class="lineNum"> 616</span> :<span class="tlaGNC"> 1 : msptr = HDIF_child_arr(ms_vpd, MSVPD_CHILD_MS_AREAS);</span></span> |
| <span id="L617"><span class="lineNum"> 617</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(msptr)) {</span></span> |
| <span id="L618"><span class="lineNum"> 618</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: no children at %p\n", ms_vpd);</span></span> |
| <span id="L619"><span class="lineNum"> 619</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L620"><span class="lineNum"> 620</span> : : }</span> |
| <span id="L621"><span class="lineNum"> 621</span> : : </span> |
| <span id="L622"><span class="lineNum"> 622</span> :<span class="tlaGNC tlaBgGNC"> 3 : for (i = 0; i < be32_to_cpu(msptr->count); i++) {</span></span> |
| <span id="L623"><span class="lineNum"> 623</span> : : const struct HDIF_common_hdr *msarea;</span> |
| <span id="L624"><span class="lineNum"> 624</span> : : const struct HDIF_array_hdr *arr;</span> |
| <span id="L625"><span class="lineNum"> 625</span> : : const struct HDIF_ms_area_address_range *arange;</span> |
| <span id="L626"><span class="lineNum"> 626</span> : : const struct HDIF_ms_area_id *id;</span> |
| <span id="L627"><span class="lineNum"> 627</span> : : const void *fruid;</span> |
| <span id="L628"><span class="lineNum"> 628</span> : : unsigned int size, j, offset;</span> |
| <span id="L629"><span class="lineNum"> 629</span> : : u16 flags;</span> |
| <span id="L630"><span class="lineNum"> 630</span> : : </span> |
| <span id="L631"><span class="lineNum"> 631</span> :<span class="tlaGNC"> 2 : msarea = HDIF_child(ms_vpd, msptr, i, "MSAREA");</span></span> |
| <span id="L632"><span class="lineNum"> 632</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(msarea))</span></span> |
| <span id="L633"><span class="lineNum"> 633</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L634"><span class="lineNum"> 634</span> : : </span> |
| <span id="L635"><span class="lineNum"> 635</span> :<span class="tlaGNC tlaBgGNC"> 2 : id = HDIF_get_idata(msarea, 2, &size);</span></span> |
| <span id="L636"><span class="lineNum"> 636</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(id))</span></span> |
| <span id="L637"><span class="lineNum"> 637</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L638"><span class="lineNum"> 638</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (size < sizeof(*id)) {</span></span> |
| <span id="L639"><span class="lineNum"> 639</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: %p msarea #%i id size too small!\n",</span></span> |
| <span id="L640"><span class="lineNum"> 640</span> : : ms_vpd, i);</span> |
| <span id="L641"><span class="lineNum"> 641</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L642"><span class="lineNum"> 642</span> : : }</span> |
| <span id="L643"><span class="lineNum"> 643</span> : : </span> |
| <span id="L644"><span class="lineNum"> 644</span> :<span class="tlaGNC tlaBgGNC"> 2 : flags = be16_to_cpu(id->flags);</span></span> |
| <span id="L645"><span class="lineNum"> 645</span> :<span class="tlaGNC"> 2 : prlog(PR_DEBUG, "MS VPD: %p, area %i: %s %s %s\n",</span></span> |
| <span id="L646"><span class="lineNum"> 646</span> : : ms_vpd, i,</span> |
| <span id="L647"><span class="lineNum"> 647</span> : : flags & MS_AREA_INSTALLED ?</span> |
| <span id="L648"><span class="lineNum"> 648</span> : : "installed" : "not installed",</span> |
| <span id="L649"><span class="lineNum"> 649</span> : : flags & MS_AREA_FUNCTIONAL ?</span> |
| <span id="L650"><span class="lineNum"> 650</span> : : "functional" : "not functional",</span> |
| <span id="L651"><span class="lineNum"> 651</span> : : flags & MS_AREA_SHARED ?</span> |
| <span id="L652"><span class="lineNum"> 652</span> : : "shared" : "not shared");</span> |
| <span id="L653"><span class="lineNum"> 653</span> : : </span> |
| <span id="L654"><span class="lineNum"> 654</span> :<span class="tlaGNC"> 2 : if ((flags & (MS_AREA_INSTALLED|MS_AREA_FUNCTIONAL))</span></span> |
| <span id="L655"><span class="lineNum"> 655</span> : : != (MS_AREA_INSTALLED|MS_AREA_FUNCTIONAL))</span> |
| <span id="L656"><span class="lineNum"> 656</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L657"><span class="lineNum"> 657</span> : : </span> |
| <span id="L658"><span class="lineNum"> 658</span> :<span class="tlaGNC tlaBgGNC"> 2 : arr = HDIF_get_idata(msarea, 4, &size);</span></span> |
| <span id="L659"><span class="lineNum"> 659</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(arr))</span></span> |
| <span id="L660"><span class="lineNum"> 660</span> :<span class="tlaUNC tlaBgUNC"> 0 : continue;</span></span> |
| <span id="L661"><span class="lineNum"> 661</span> : : </span> |
| <span id="L662"><span class="lineNum"> 662</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (size < sizeof(*arr)) {</span></span> |
| <span id="L663"><span class="lineNum"> 663</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: %p msarea #%i arr size too small!\n",</span></span> |
| <span id="L664"><span class="lineNum"> 664</span> : : ms_vpd, i);</span> |
| <span id="L665"><span class="lineNum"> 665</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L666"><span class="lineNum"> 666</span> : : }</span> |
| <span id="L667"><span class="lineNum"> 667</span> : : </span> |
| <span id="L668"><span class="lineNum"> 668</span> :<span class="tlaGNC tlaBgGNC"> 2 : offset = offsetof(struct HDIF_ms_area_address_range, mirror_start);</span></span> |
| <span id="L669"><span class="lineNum"> 669</span> :<span class="tlaGNC"> 2 : if (be32_to_cpu(arr->eactsz) < offset) {</span></span> |
| <span id="L670"><span class="lineNum"> 670</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: %p msarea #%i arange size too small!\n",</span></span> |
| <span id="L671"><span class="lineNum"> 671</span> : : ms_vpd, i);</span> |
| <span id="L672"><span class="lineNum"> 672</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L673"><span class="lineNum"> 673</span> : : }</span> |
| <span id="L674"><span class="lineNum"> 674</span> : : </span> |
| <span id="L675"><span class="lineNum"> 675</span> :<span class="tlaGNC tlaBgGNC"> 2 : fruid = HDIF_get_idata(msarea, 0, &size);</span></span> |
| <span id="L676"><span class="lineNum"> 676</span> :<span class="tlaGNC"> 2 : if (!CHECK_SPPTR(fruid))</span></span> |
| <span id="L677"><span class="lineNum"> 677</span> :<span class="tlaUNC tlaBgUNC"> 0 : return;</span></span> |
| <span id="L678"><span class="lineNum"> 678</span> : : </span> |
| <span id="L679"><span class="lineNum"> 679</span> : : /* Add Raiser card VPD */</span> |
| <span id="L680"><span class="lineNum"> 680</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (be16_to_cpu(id->parent_type) & MS_PTYPE_RISER_CARD)</span></span> |
| <span id="L681"><span class="lineNum"> 681</span> :<span class="tlaUNC tlaBgUNC"> 0 : dt_add_vpd_node(msarea, 0, 1);</span></span> |
| <span id="L682"><span class="lineNum"> 682</span> : : </span> |
| <span id="L683"><span class="lineNum"> 683</span> : : /* Add RAM Area VPD */</span> |
| <span id="L684"><span class="lineNum"> 684</span> :<span class="tlaGNC tlaBgGNC"> 2 : vpd_add_ram_area(msarea);</span></span> |
| <span id="L685"><span class="lineNum"> 685</span> : : </span> |
| <span id="L686"><span class="lineNum"> 686</span> :<span class="tlaGNC"> 2 : add_memory_buffer_mmio(msarea);</span></span> |
| <span id="L687"><span class="lineNum"> 687</span> : : </span> |
| <span id="L688"><span class="lineNum"> 688</span> : : /* This offset is from the arr, not the header! */</span> |
| <span id="L689"><span class="lineNum"> 689</span> :<span class="tlaGNC"> 2 : arange = (void *)arr + be32_to_cpu(arr->offset);</span></span> |
| <span id="L690"><span class="lineNum"> 690</span> :<span class="tlaGNC"> 4 : for (j = 0; j < be32_to_cpu(arr->ecnt); j++) {</span></span> |
| <span id="L691"><span class="lineNum"> 691</span> :<span class="tlaGNC"> 2 : uint32_t type = 0, status = 0;</span></span> |
| <span id="L692"><span class="lineNum"> 692</span> : : </span> |
| <span id="L693"><span class="lineNum"> 693</span> : : /*</span> |
| <span id="L694"><span class="lineNum"> 694</span> : : * Check that the required fields are present in this</span> |
| <span id="L695"><span class="lineNum"> 695</span> : : * version of the HDAT structure.</span> |
| <span id="L696"><span class="lineNum"> 696</span> : : */</span> |
| <span id="L697"><span class="lineNum"> 697</span> :<span class="tlaGNC"> 2 : offset = offsetof(struct HDIF_ms_area_address_range, controller_id);</span></span> |
| <span id="L698"><span class="lineNum"> 698</span> :<span class="tlaGNC"> 2 : if (be32_to_cpu(arr->eactsz) >= offset)</span></span> |
| <span id="L699"><span class="lineNum"> 699</span> :<span class="tlaGNC"> 2 : add_memory_controller(msarea, arange);</span></span> |
| <span id="L700"><span class="lineNum"> 700</span> : : </span> |
| <span id="L701"><span class="lineNum"> 701</span> :<span class="tlaGNC"> 2 : offset = offsetof(struct HDIF_ms_area_address_range, phys_attr);</span></span> |
| <span id="L702"><span class="lineNum"> 702</span> :<span class="tlaGNC"> 2 : if (be32_to_cpu(arr->eactsz) >= offset) {</span></span> |
| <span id="L703"><span class="lineNum"> 703</span> :<span class="tlaUNC tlaBgUNC"> 0 : uint32_t attr = be32_to_cpu(arange->phys_attr);</span></span> |
| <span id="L704"><span class="lineNum"> 704</span> : : </span> |
| <span id="L705"><span class="lineNum"> 705</span> :<span class="tlaUNC"> 0 : type = GETFIELD(PHYS_ATTR_TYPE_MASK, attr);</span></span> |
| <span id="L706"><span class="lineNum"> 706</span> :<span class="tlaUNC"> 0 : status = GETFIELD(PHYS_ATTR_STATUS_MASK, attr);</span></span> |
| <span id="L707"><span class="lineNum"> 707</span> : : }</span> |
| <span id="L708"><span class="lineNum"> 708</span> : : </span> |
| <span id="L709"><span class="lineNum"> 709</span> :<span class="tlaGNC tlaBgGNC"> 2 : if (!add_address_range(root, id, arange, type, status))</span></span> |
| <span id="L710"><span class="lineNum"> 710</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("Unable to use memory range %d from MSAREA %d\n", j, i);</span></span> |
| <span id="L711"><span class="lineNum"> 711</span> : : </span> |
| <span id="L712"><span class="lineNum"> 712</span> :<span class="tlaGNC tlaBgGNC"> 2 : arange = (void *)arange + be32_to_cpu(arr->esize);</span></span> |
| <span id="L713"><span class="lineNum"> 713</span> : : }</span> |
| <span id="L714"><span class="lineNum"> 714</span> : : }</span> |
| <span id="L715"><span class="lineNum"> 715</span> : : }</span> |
| <span id="L716"><span class="lineNum"> 716</span> : : </span> |
| <span id="L717"><span class="lineNum"> 717</span> : : static struct dt_node *dt_hb_reserves;</span> |
| <span id="L718"><span class="lineNum"> 718</span> : : </span> |
| <span id="L719"><span class="lineNum"> 719</span> :<span class="tlaUNC tlaBgUNC"> 0 : static struct dt_node *add_hb_reserve_node(const char *name, u64 start, u64 end)</span></span> |
| <span id="L720"><span class="lineNum"> 720</span> : : {</span> |
| <span id="L721"><span class="lineNum"> 721</span> : : /* label size + "ibm," + NULL */</span> |
| <span id="L722"><span class="lineNum"> 722</span> :<span class="tlaUNC"> 0 : char node_name[HB_RESERVE_MEM_LABEL_SIZE + 5] = { 0 };</span></span> |
| <span id="L723"><span class="lineNum"> 723</span> : : struct dt_node *node, *hb;</span> |
| <span id="L724"><span class="lineNum"> 724</span> : : </span> |
| <span id="L725"><span class="lineNum"> 725</span> :<span class="tlaUNC"> 0 : if (!dt_hb_reserves) {</span></span> |
| <span id="L726"><span class="lineNum"> 726</span> :<span class="tlaUNC"> 0 : hb = dt_new_check(dt_root, "ibm,hostboot");</span></span> |
| <span id="L727"><span class="lineNum"> 727</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(hb, "#size-cells", 2);</span></span> |
| <span id="L728"><span class="lineNum"> 728</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(hb, "#address-cells", 2);</span></span> |
| <span id="L729"><span class="lineNum"> 729</span> : : </span> |
| <span id="L730"><span class="lineNum"> 730</span> :<span class="tlaUNC"> 0 : dt_hb_reserves = dt_new_check(hb, "reserved-memory");</span></span> |
| <span id="L731"><span class="lineNum"> 731</span> :<span class="tlaUNC"> 0 : dt_add_property(dt_hb_reserves, "ranges", NULL, 0);</span></span> |
| <span id="L732"><span class="lineNum"> 732</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dt_hb_reserves, "#size-cells", 2);</span></span> |
| <span id="L733"><span class="lineNum"> 733</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(dt_hb_reserves, "#address-cells", 2);</span></span> |
| <span id="L734"><span class="lineNum"> 734</span> : : }</span> |
| <span id="L735"><span class="lineNum"> 735</span> : : </span> |
| <span id="L736"><span class="lineNum"> 736</span> : : /* Add "ibm," to reserved node name */</span> |
| <span id="L737"><span class="lineNum"> 737</span> :<span class="tlaUNC"> 0 : if (strncasecmp(name, "ibm", 3))</span></span> |
| <span id="L738"><span class="lineNum"> 738</span> :<span class="tlaUNC"> 0 : snprintf(node_name, 5, "ibm,");</span></span> |
| <span id="L739"><span class="lineNum"> 739</span> :<span class="tlaUNC"> 0 : strcat(node_name, name);</span></span> |
| <span id="L740"><span class="lineNum"> 740</span> : : </span> |
| <span id="L741"><span class="lineNum"> 741</span> :<span class="tlaUNC"> 0 : node = dt_new_addr(dt_hb_reserves, node_name, start);</span></span> |
| <span id="L742"><span class="lineNum"> 742</span> :<span class="tlaUNC"> 0 : if (!node) {</span></span> |
| <span id="L743"><span class="lineNum"> 743</span> :<span class="tlaUNC"> 0 : prerror("Unable to create node for %s@%llx\n",</span></span> |
| <span id="L744"><span class="lineNum"> 744</span> : : node_name, (unsigned long long) start);</span> |
| <span id="L745"><span class="lineNum"> 745</span> :<span class="tlaUNC"> 0 : return NULL;</span></span> |
| <span id="L746"><span class="lineNum"> 746</span> : : }</span> |
| <span id="L747"><span class="lineNum"> 747</span> : : </span> |
| <span id="L748"><span class="lineNum"> 748</span> :<span class="tlaUNC"> 0 : dt_add_property_u64s(node, "reg", start, end - start + 1);</span></span> |
| <span id="L749"><span class="lineNum"> 749</span> : : </span> |
| <span id="L750"><span class="lineNum"> 750</span> :<span class="tlaUNC"> 0 : return node;</span></span> |
| <span id="L751"><span class="lineNum"> 751</span> : : }</span> |
| <span id="L752"><span class="lineNum"> 752</span> : : </span> |
| <span id="L753"><span class="lineNum"> 753</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void get_hb_reserved_mem(struct HDIF_common_hdr *ms_vpd)</span></span> |
| <span id="L754"><span class="lineNum"> 754</span> : : {</span> |
| <span id="L755"><span class="lineNum"> 755</span> : : const struct msvpd_hb_reserved_mem *hb_resv_mem;</span> |
| <span id="L756"><span class="lineNum"> 756</span> : : u64 start_addr, end_addr, label_size;</span> |
| <span id="L757"><span class="lineNum"> 757</span> : : struct dt_node *node;</span> |
| <span id="L758"><span class="lineNum"> 758</span> : : int count, i;</span> |
| <span id="L759"><span class="lineNum"> 759</span> : : char label[HB_RESERVE_MEM_LABEL_SIZE + 1];</span> |
| <span id="L760"><span class="lineNum"> 760</span> : : </span> |
| <span id="L761"><span class="lineNum"> 761</span> : : /*</span> |
| <span id="L762"><span class="lineNum"> 762</span> : : * XXX: Reservation names only exist on P9 and on P7/8 we get the</span> |
| <span id="L763"><span class="lineNum"> 763</span> : : * reserved ranges through the hostboot mini-FDT instead.</span> |
| <span id="L764"><span class="lineNum"> 764</span> : : */</span> |
| <span id="L765"><span class="lineNum"> 765</span> :<span class="tlaGNC"> 1 : if (proc_gen < proc_gen_p9)</span></span> |
| <span id="L766"><span class="lineNum"> 766</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L767"><span class="lineNum"> 767</span> : : </span> |
| <span id="L768"><span class="lineNum"> 768</span> :<span class="tlaUNC tlaBgUNC"> 0 : count = HDIF_get_iarray_size(ms_vpd, MSVPD_IDATA_HB_RESERVED_MEM);</span></span> |
| <span id="L769"><span class="lineNum"> 769</span> :<span class="tlaUNC"> 0 : if (count <= 0) {</span></span> |
| <span id="L770"><span class="lineNum"> 770</span> :<span class="tlaUNC"> 0 : prerror("MS VPD: No hostboot reserved memory found\n");</span></span> |
| <span id="L771"><span class="lineNum"> 771</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L772"><span class="lineNum"> 772</span> : : }</span> |
| <span id="L773"><span class="lineNum"> 773</span> : : </span> |
| <span id="L774"><span class="lineNum"> 774</span> :<span class="tlaUNC"> 0 : for (i = 0; i < count; i++) {</span></span> |
| <span id="L775"><span class="lineNum"> 775</span> :<span class="tlaUNC"> 0 : hb_resv_mem = HDIF_get_iarray_item(ms_vpd,</span></span> |
| <span id="L776"><span class="lineNum"> 776</span> : : MSVPD_IDATA_HB_RESERVED_MEM,</span> |
| <span id="L777"><span class="lineNum"> 777</span> : : i, NULL);</span> |
| <span id="L778"><span class="lineNum"> 778</span> :<span class="tlaUNC"> 0 : if (!CHECK_SPPTR(hb_resv_mem))</span></span> |
| <span id="L779"><span class="lineNum"> 779</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L780"><span class="lineNum"> 780</span> : : </span> |
| <span id="L781"><span class="lineNum"> 781</span> :<span class="tlaUNC"> 0 : label_size = be32_to_cpu(hb_resv_mem->label_size);</span></span> |
| <span id="L782"><span class="lineNum"> 782</span> :<span class="tlaUNC"> 0 : start_addr = be64_to_cpu(hb_resv_mem->start_addr);</span></span> |
| <span id="L783"><span class="lineNum"> 783</span> :<span class="tlaUNC"> 0 : end_addr = be64_to_cpu(hb_resv_mem->end_addr);</span></span> |
| <span id="L784"><span class="lineNum"> 784</span> : : </span> |
| <span id="L785"><span class="lineNum"> 785</span> : : /* Zero length regions are a normal, but should be ignored */</span> |
| <span id="L786"><span class="lineNum"> 786</span> :<span class="tlaUNC"> 0 : if (start_addr - end_addr == 0) {</span></span> |
| <span id="L787"><span class="lineNum"> 787</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "MEM: Ignoring zero length range\n");</span></span> |
| <span id="L788"><span class="lineNum"> 788</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L789"><span class="lineNum"> 789</span> : : }</span> |
| <span id="L790"><span class="lineNum"> 790</span> : : </span> |
| <span id="L791"><span class="lineNum"> 791</span> : : /*</span> |
| <span id="L792"><span class="lineNum"> 792</span> : : * Workaround broken HDAT reserve regions which are</span> |
| <span id="L793"><span class="lineNum"> 793</span> : : * bigger than 512MB</span> |
| <span id="L794"><span class="lineNum"> 794</span> : : */</span> |
| <span id="L795"><span class="lineNum"> 795</span> :<span class="tlaUNC"> 0 : if ((end_addr - start_addr) > 0x20000000) {</span></span> |
| <span id="L796"><span class="lineNum"> 796</span> :<span class="tlaUNC"> 0 : prlog(PR_ERR, "MEM: Ignoring Bad HDAT reserve: too big\n");</span></span> |
| <span id="L797"><span class="lineNum"> 797</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L798"><span class="lineNum"> 798</span> : : }</span> |
| <span id="L799"><span class="lineNum"> 799</span> : : </span> |
| <span id="L800"><span class="lineNum"> 800</span> : : /* remove the HRMOR bypass bit */</span> |
| <span id="L801"><span class="lineNum"> 801</span> :<span class="tlaUNC"> 0 : start_addr &= ~HRMOR_BIT;</span></span> |
| <span id="L802"><span class="lineNum"> 802</span> :<span class="tlaUNC"> 0 : end_addr &= ~HRMOR_BIT;</span></span> |
| <span id="L803"><span class="lineNum"> 803</span> :<span class="tlaUNC"> 0 : if (label_size > HB_RESERVE_MEM_LABEL_SIZE)</span></span> |
| <span id="L804"><span class="lineNum"> 804</span> :<span class="tlaUNC"> 0 : label_size = HB_RESERVE_MEM_LABEL_SIZE;</span></span> |
| <span id="L805"><span class="lineNum"> 805</span> : : </span> |
| <span id="L806"><span class="lineNum"> 806</span> :<span class="tlaUNC"> 0 : memset(label, 0, HB_RESERVE_MEM_LABEL_SIZE + 1);</span></span> |
| <span id="L807"><span class="lineNum"> 807</span> :<span class="tlaUNC"> 0 : memcpy(label, hb_resv_mem->label, label_size);</span></span> |
| <span id="L808"><span class="lineNum"> 808</span> :<span class="tlaUNC"> 0 : label[label_size] = '\0';</span></span> |
| <span id="L809"><span class="lineNum"> 809</span> : : </span> |
| <span id="L810"><span class="lineNum"> 810</span> : : /* Unnamed reservations are always broken. Ignore them. */</span> |
| <span id="L811"><span class="lineNum"> 811</span> :<span class="tlaUNC"> 0 : if (strlen(label) == 0)</span></span> |
| <span id="L812"><span class="lineNum"> 812</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L813"><span class="lineNum"> 813</span> : : </span> |
| <span id="L814"><span class="lineNum"> 814</span> :<span class="tlaUNC"> 0 : prlog(PR_DEBUG, "MEM: Reserve '%s' %#" PRIx64 "-%#" PRIx64 " (type/inst=0x%08x)\n",</span></span> |
| <span id="L815"><span class="lineNum"> 815</span> : : label, start_addr, end_addr, be32_to_cpu(hb_resv_mem->type_instance));</span> |
| <span id="L816"><span class="lineNum"> 816</span> : : </span> |
| <span id="L817"><span class="lineNum"> 817</span> :<span class="tlaUNC"> 0 : node = add_hb_reserve_node(label, start_addr, end_addr);</span></span> |
| <span id="L818"><span class="lineNum"> 818</span> :<span class="tlaUNC"> 0 : if (!node) {</span></span> |
| <span id="L819"><span class="lineNum"> 819</span> :<span class="tlaUNC"> 0 : prerror("unable to add node?\n");</span></span> |
| <span id="L820"><span class="lineNum"> 820</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L821"><span class="lineNum"> 821</span> : : }</span> |
| <span id="L822"><span class="lineNum"> 822</span> : : </span> |
| <span id="L823"><span class="lineNum"> 823</span> : : /* the three low bytes of type_instance is the instance data */</span> |
| <span id="L824"><span class="lineNum"> 824</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(node, "ibm,prd-instance",</span></span> |
| <span id="L825"><span class="lineNum"> 825</span> : : (be32_to_cpu(hb_resv_mem->type_instance) & 0xffffff));</span> |
| <span id="L826"><span class="lineNum"> 826</span> : : </span> |
| <span id="L827"><span class="lineNum"> 827</span> : : /*</span> |
| <span id="L828"><span class="lineNum"> 828</span> : : * Most reservations are used by HBRT itself so we should leave</span> |
| <span id="L829"><span class="lineNum"> 829</span> : : * the label as-is. The exception is hbrt-code-image which is</span> |
| <span id="L830"><span class="lineNum"> 830</span> : : * used by opal-prd to locate the HBRT image. Older versions</span> |
| <span id="L831"><span class="lineNum"> 831</span> : : * of opal-prd expect this to be "ibm,hbrt-code-image" so make</span> |
| <span id="L832"><span class="lineNum"> 832</span> : : * sure the prefix is there.</span> |
| <span id="L833"><span class="lineNum"> 833</span> : : */</span> |
| <span id="L834"><span class="lineNum"> 834</span> :<span class="tlaUNC"> 0 : if (!strcmp(label, "hbrt-code-image"))</span></span> |
| <span id="L835"><span class="lineNum"> 835</span> :<span class="tlaUNC"> 0 : strcpy(label, "ibm,hbrt-code-image");</span></span> |
| <span id="L836"><span class="lineNum"> 836</span> :<span class="tlaUNC"> 0 : dt_add_property_string(node, "ibm,prd-label", label);</span></span> |
| <span id="L837"><span class="lineNum"> 837</span> : : }</span> |
| <span id="L838"><span class="lineNum"> 838</span> : : }</span> |
| <span id="L839"><span class="lineNum"> 839</span> : : </span> |
| <span id="L840"><span class="lineNum"> 840</span> :<span class="tlaGNC tlaBgGNC"> 1 : static void parse_trace_reservations(struct HDIF_common_hdr *ms_vpd)</span></span> |
| <span id="L841"><span class="lineNum"> 841</span> : : {</span> |
| <span id="L842"><span class="lineNum"> 842</span> : : unsigned int size;</span> |
| <span id="L843"><span class="lineNum"> 843</span> : : int count, i;</span> |
| <span id="L844"><span class="lineNum"> 844</span> : : </span> |
| <span id="L845"><span class="lineNum"> 845</span> : : /*</span> |
| <span id="L846"><span class="lineNum"> 846</span> : : * The trace arrays are only setup when hostboot is explicitly</span> |
| <span id="L847"><span class="lineNum"> 847</span> : : * configured to enable them. We need to check and gracefully handle</span> |
| <span id="L848"><span class="lineNum"> 848</span> : : * when they're not present.</span> |
| <span id="L849"><span class="lineNum"> 849</span> : : */</span> |
| <span id="L850"><span class="lineNum"> 850</span> : : </span> |
| <span id="L851"><span class="lineNum"> 851</span> :<span class="tlaGNC"> 1 : if (!HDIF_get_idata(ms_vpd, MSVPD_IDATA_TRACE_AREAS, &size) || !size) {</span></span> |
| <span id="L852"><span class="lineNum"> 852</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_DEBUG, "MS VPD: No trace areas found\n");</span></span> |
| <span id="L853"><span class="lineNum"> 853</span> :<span class="tlaGNC tlaBgGNC"> 1 : return;</span></span> |
| <span id="L854"><span class="lineNum"> 854</span> : : }</span> |
| <span id="L855"><span class="lineNum"> 855</span> : : </span> |
| <span id="L856"><span class="lineNum"> 856</span> :<span class="tlaGNC"> 1 : count = HDIF_get_iarray_size(ms_vpd, MSVPD_IDATA_TRACE_AREAS);</span></span> |
| <span id="L857"><span class="lineNum"> 857</span> :<span class="tlaGNC"> 1 : if (count <= 0) {</span></span> |
| <span id="L858"><span class="lineNum"> 858</span> :<span class="tlaGNC"> 1 : prlog(PR_DEBUG, "MS VPD: No trace areas found\n");</span></span> |
| <span id="L859"><span class="lineNum"> 859</span> :<span class="tlaGNC"> 1 : return;</span></span> |
| <span id="L860"><span class="lineNum"> 860</span> : : }</span> |
| <span id="L861"><span class="lineNum"> 861</span> : : </span> |
| <span id="L862"><span class="lineNum"> 862</span> :<span class="tlaUNC tlaBgUNC"> 0 : prlog(PR_INFO, "MS VPD: Found %d trace areas\n", count);</span></span> |
| <span id="L863"><span class="lineNum"> 863</span> : : </span> |
| <span id="L864"><span class="lineNum"> 864</span> :<span class="tlaUNC"> 0 : for (i = 0; i < count; i++) {</span></span> |
| <span id="L865"><span class="lineNum"> 865</span> : : const struct msvpd_trace *trace_area;</span> |
| <span id="L866"><span class="lineNum"> 866</span> : : struct dt_node *node;</span> |
| <span id="L867"><span class="lineNum"> 867</span> : : u64 start, end;</span> |
| <span id="L868"><span class="lineNum"> 868</span> : : </span> |
| <span id="L869"><span class="lineNum"> 869</span> :<span class="tlaUNC"> 0 : trace_area = HDIF_get_iarray_item(ms_vpd,</span></span> |
| <span id="L870"><span class="lineNum"> 870</span> : : MSVPD_IDATA_TRACE_AREAS, i, &size);</span> |
| <span id="L871"><span class="lineNum"> 871</span> : : </span> |
| <span id="L872"><span class="lineNum"> 872</span> :<span class="tlaUNC"> 0 : if (!trace_area)</span></span> |
| <span id="L873"><span class="lineNum"> 873</span> :<span class="tlaUNC"> 0 : return; /* shouldn't happen */</span></span> |
| <span id="L874"><span class="lineNum"> 874</span> : : </span> |
| <span id="L875"><span class="lineNum"> 875</span> :<span class="tlaUNC"> 0 : start = be64_to_cpu(trace_area->start) & ~HRMOR_BIT;</span></span> |
| <span id="L876"><span class="lineNum"> 876</span> :<span class="tlaUNC"> 0 : end = be64_to_cpu(trace_area->end) & ~HRMOR_BIT;</span></span> |
| <span id="L877"><span class="lineNum"> 877</span> : : </span> |
| <span id="L878"><span class="lineNum"> 878</span> :<span class="tlaUNC"> 0 : prlog(PR_INFO,</span></span> |
| <span id="L879"><span class="lineNum"> 879</span> : : "MS VPD: Trace area: 0x%.16"PRIx64"-0x%.16"PRIx64"\n",</span> |
| <span id="L880"><span class="lineNum"> 880</span> : : start, end);</span> |
| <span id="L881"><span class="lineNum"> 881</span> : : </span> |
| <span id="L882"><span class="lineNum"> 882</span> :<span class="tlaUNC"> 0 : node = add_hb_reserve_node("trace-area", start, end);</span></span> |
| <span id="L883"><span class="lineNum"> 883</span> :<span class="tlaUNC"> 0 : if (!node) {</span></span> |
| <span id="L884"><span class="lineNum"> 884</span> :<span class="tlaUNC"> 0 : prerror("MEM: Unable to reserve trace area %p-%p\n",</span></span> |
| <span id="L885"><span class="lineNum"> 885</span> : : (void *) start, (void *) end);</span> |
| <span id="L886"><span class="lineNum"> 886</span> :<span class="tlaUNC"> 0 : continue;</span></span> |
| <span id="L887"><span class="lineNum"> 887</span> : : }</span> |
| <span id="L888"><span class="lineNum"> 888</span> : : </span> |
| <span id="L889"><span class="lineNum"> 889</span> :<span class="tlaUNC"> 0 : dt_add_property(node, "no-map", NULL, 0);</span></span> |
| <span id="L890"><span class="lineNum"> 890</span> : : }</span> |
| <span id="L891"><span class="lineNum"> 891</span> : : }</span> |
| <span id="L892"><span class="lineNum"> 892</span> : : </span> |
| <span id="L893"><span class="lineNum"> 893</span> :<span class="tlaGNC tlaBgGNC"> 1 : static bool __memory_parse(struct dt_node *root)</span></span> |
| <span id="L894"><span class="lineNum"> 894</span> : : {</span> |
| <span id="L895"><span class="lineNum"> 895</span> : : struct HDIF_common_hdr *ms_vpd;</span> |
| <span id="L896"><span class="lineNum"> 896</span> : : const struct msvpd_ms_addr_config *msac;</span> |
| <span id="L897"><span class="lineNum"> 897</span> : : const struct msvpd_total_config_ms *tcms;</span> |
| <span id="L898"><span class="lineNum"> 898</span> : : unsigned int size;</span> |
| <span id="L899"><span class="lineNum"> 899</span> : : </span> |
| <span id="L900"><span class="lineNum"> 900</span> :<span class="tlaGNC"> 1 : ms_vpd = get_hdif(&spiras->ntuples.ms_vpd, MSVPD_HDIF_SIG);</span></span> |
| <span id="L901"><span class="lineNum"> 901</span> :<span class="tlaGNC"> 1 : if (!ms_vpd) {</span></span> |
| <span id="L902"><span class="lineNum"> 902</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: invalid\n");</span></span> |
| <span id="L903"><span class="lineNum"> 903</span> :<span class="tlaUNC"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0000);</span></span> |
| <span id="L904"><span class="lineNum"> 904</span> :<span class="tlaUNC"> 0 : return false;</span></span> |
| <span id="L905"><span class="lineNum"> 905</span> : : }</span> |
| <span id="L906"><span class="lineNum"> 906</span> :<span class="tlaGNC tlaBgGNC"> 1 : if (be32_to_cpu(spiras->ntuples.ms_vpd.act_len) < sizeof(*ms_vpd)) {</span></span> |
| <span id="L907"><span class="lineNum"> 907</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: invalid size %u\n",</span></span> |
| <span id="L908"><span class="lineNum"> 908</span> : : be32_to_cpu(spiras->ntuples.ms_vpd.act_len));</span> |
| <span id="L909"><span class="lineNum"> 909</span> :<span class="tlaUNC"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0001);</span></span> |
| <span id="L910"><span class="lineNum"> 910</span> :<span class="tlaUNC"> 0 : return false;</span></span> |
| <span id="L911"><span class="lineNum"> 911</span> : : }</span> |
| <span id="L912"><span class="lineNum"> 912</span> : : </span> |
| <span id="L913"><span class="lineNum"> 913</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_DEBUG, "MS VPD: is at %p\n", ms_vpd);</span></span> |
| <span id="L914"><span class="lineNum"> 914</span> : : </span> |
| <span id="L915"><span class="lineNum"> 915</span> :<span class="tlaGNC"> 1 : msac = HDIF_get_idata(ms_vpd, MSVPD_IDATA_MS_ADDR_CONFIG, &size);</span></span> |
| <span id="L916"><span class="lineNum"> 916</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(msac) ||</span></span> |
| <span id="L917"><span class="lineNum"> 917</span> :<span class="tlaGNC"> 1 : size < offsetof(struct msvpd_ms_addr_config, max_possible_ms_address)) {</span></span> |
| <span id="L918"><span class="lineNum"> 918</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: bad msac size %u @ %p\n", size, msac);</span></span> |
| <span id="L919"><span class="lineNum"> 919</span> :<span class="tlaUNC"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0002);</span></span> |
| <span id="L920"><span class="lineNum"> 920</span> :<span class="tlaUNC"> 0 : return false;</span></span> |
| <span id="L921"><span class="lineNum"> 921</span> : : }</span> |
| <span id="L922"><span class="lineNum"> 922</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_DEBUG, "MS VPD: MSAC is at %p\n", msac);</span></span> |
| <span id="L923"><span class="lineNum"> 923</span> : : </span> |
| <span id="L924"><span class="lineNum"> 924</span> :<span class="tlaGNC"> 1 : dt_add_property_u64(dt_root, DT_PRIVATE "maxmem",</span></span> |
| <span id="L925"><span class="lineNum"> 925</span> :<span class="tlaGNC"> 1 : be64_to_cpu(msac->max_configured_ms_address));</span></span> |
| <span id="L926"><span class="lineNum"> 926</span> : : </span> |
| <span id="L927"><span class="lineNum"> 927</span> :<span class="tlaGNC"> 1 : tcms = HDIF_get_idata(ms_vpd, MSVPD_IDATA_TOTAL_CONFIG_MS, &size);</span></span> |
| <span id="L928"><span class="lineNum"> 928</span> :<span class="tlaGNC"> 1 : if (!CHECK_SPPTR(tcms) || size < sizeof(*tcms)) {</span></span> |
| <span id="L929"><span class="lineNum"> 929</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: Bad tcms size %u @ %p\n", size, tcms);</span></span> |
| <span id="L930"><span class="lineNum"> 930</span> :<span class="tlaUNC"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0003);</span></span> |
| <span id="L931"><span class="lineNum"> 931</span> :<span class="tlaUNC"> 0 : return false;</span></span> |
| <span id="L932"><span class="lineNum"> 932</span> : : }</span> |
| <span id="L933"><span class="lineNum"> 933</span> :<span class="tlaGNC tlaBgGNC"> 1 : prlog(PR_DEBUG, "MS VPD: TCMS is at %p\n", tcms);</span></span> |
| <span id="L934"><span class="lineNum"> 934</span> : : </span> |
| <span id="L935"><span class="lineNum"> 935</span> :<span class="tlaGNC"> 1 : prlog(PR_DEBUG, "MS VPD: Maximum configured address: 0x%llx\n",</span></span> |
| <span id="L936"><span class="lineNum"> 936</span> : : (long long)be64_to_cpu(msac->max_configured_ms_address));</span> |
| <span id="L937"><span class="lineNum"> 937</span> :<span class="tlaGNC"> 1 : prlog(PR_DEBUG, "MS VPD: Maximum possible address: 0x%llx\n",</span></span> |
| <span id="L938"><span class="lineNum"> 938</span> : : (long long)be64_to_cpu(msac->max_possible_ms_address));</span> |
| <span id="L939"><span class="lineNum"> 939</span> : : </span> |
| <span id="L940"><span class="lineNum"> 940</span> :<span class="tlaGNC"> 1 : get_msareas(root, ms_vpd);</span></span> |
| <span id="L941"><span class="lineNum"> 941</span> : : </span> |
| <span id="L942"><span class="lineNum"> 942</span> :<span class="tlaGNC"> 1 : get_hb_reserved_mem(ms_vpd);</span></span> |
| <span id="L943"><span class="lineNum"> 943</span> : : </span> |
| <span id="L944"><span class="lineNum"> 944</span> :<span class="tlaGNC"> 1 : parse_trace_reservations(ms_vpd);</span></span> |
| <span id="L945"><span class="lineNum"> 945</span> : : </span> |
| <span id="L946"><span class="lineNum"> 946</span> :<span class="tlaGNC"> 1 : prlog(PR_INFO, "MS VPD: Total MB of RAM: 0x%llx\n",</span></span> |
| <span id="L947"><span class="lineNum"> 947</span> : : (long long)be64_to_cpu(tcms->total_in_mb));</span> |
| <span id="L948"><span class="lineNum"> 948</span> : : </span> |
| <span id="L949"><span class="lineNum"> 949</span> :<span class="tlaGNC"> 1 : return true;</span></span> |
| <span id="L950"><span class="lineNum"> 950</span> : : }</span> |
| <span id="L951"><span class="lineNum"> 951</span> : : </span> |
| <span id="L952"><span class="lineNum"> 952</span> :<span class="tlaGNC"> 1 : void memory_parse(void)</span></span> |
| <span id="L953"><span class="lineNum"> 953</span> : : {</span> |
| <span id="L954"><span class="lineNum"> 954</span> :<span class="tlaGNC"> 1 : if (!__memory_parse(dt_root)) {</span></span> |
| <span id="L955"><span class="lineNum"> 955</span> :<span class="tlaUNC tlaBgUNC"> 0 : prerror("MS VPD: Failed memory init !\n");</span></span> |
| <span id="L956"><span class="lineNum"> 956</span> :<span class="tlaUNC"> 0 : abort();</span></span> |
| <span id="L957"><span class="lineNum"> 957</span> : : }</span> |
| <span id="L958"><span class="lineNum"> 958</span> :<span class="tlaGNC tlaBgGNC"> 1 : }</span></span> |
| </pre> |
| </td> |
| </tr> |
| </table> |
| <br> |
| |
| <table width="100%" border=0 cellspacing=0 cellpadding=0> |
| <tr><td class="ruler"><img src="../glass.png" width=3 height=3 alt=""></td></tr> |
| <tr><td class="versionInfo">Generated by: <a href="https://github.com//linux-test-project/lcov" target="_parent">LCOV version 2.0-1</a></td></tr> |
| </table> |
| <br> |
| |
| </body> |
| </html> |
