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| <td width="10%" class="headerItem">Current view:</td> |
| <td width="10%" class="headerValue"><a href="../index.html">top level</a> - <a href="index.html">core</a> - pci-quirk.c<span style="font-size: 80%;"> (source / <a href="pci-quirk.c.func-c.html">functions</a>)</span></td> |
| <td width="5%"></td> |
| <td width="5%"></td> |
| <td width="5%" class="headerCovTableHead">Coverage</td> |
| <td width="5%" class="headerCovTableHead" title="Covered + Uncovered code">Total</td> |
| <td width="5%" class="headerCovTableHead" title="Exercised code only">Hit</td> |
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| <td class="headerItem">Test:</td> |
| <td class="headerValue">skiboot.info</td> |
| <td></td> |
| <td class="headerItem">Lines:</td> |
| <td class="headerCovTableEntryLo">13.3 %</td> |
| <td class="headerCovTableEntry">60</td> |
| <td class="headerCovTableEntry">8</td> |
| </tr> |
| <tr> |
| <td class="headerItem">Test Date:</td> |
| <td class="headerValue">2025-06-27 16:54:26</td> |
| <td></td> |
| <td class="headerItem">Functions:</td> |
| <td class="headerCovTableEntryLo">20.0 %</td> |
| <td class="headerCovTableEntry">5</td> |
| <td class="headerCovTableEntry">1</td> |
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| <td class="headerItem">Branches:</td> |
| <td class="headerCovTableEntryHi">-</td> |
| <td class="headerCovTableEntry">0</td> |
| <td class="headerCovTableEntry">0</td> |
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| <pre class="sourceHeading"> Branch data Line data Source code</pre> |
| <pre class="source"> |
| <span id="L1"><span class="lineNum"> 1</span> : : // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later</span> |
| <span id="L2"><span class="lineNum"> 2</span> : : /*</span> |
| <span id="L3"><span class="lineNum"> 3</span> : : * Deal with PCI device quirks</span> |
| <span id="L4"><span class="lineNum"> 4</span> : : *</span> |
| <span id="L5"><span class="lineNum"> 5</span> : : * Copyright 2017-2018 IBM Corp.</span> |
| <span id="L6"><span class="lineNum"> 6</span> : : */</span> |
| <span id="L7"><span class="lineNum"> 7</span> : : </span> |
| <span id="L8"><span class="lineNum"> 8</span> : : #define pr_fmt(fmt) "PCI-QUIRK: " fmt</span> |
| <span id="L9"><span class="lineNum"> 9</span> : : </span> |
| <span id="L10"><span class="lineNum"> 10</span> : : #include <skiboot.h></span> |
| <span id="L11"><span class="lineNum"> 11</span> : : #include <pci.h></span> |
| <span id="L12"><span class="lineNum"> 12</span> : : #include <pci-cfg.h></span> |
| <span id="L13"><span class="lineNum"> 13</span> : : #include <pci-quirk.h></span> |
| <span id="L14"><span class="lineNum"> 14</span> : : #include <platform.h></span> |
| <span id="L15"><span class="lineNum"> 15</span> : : #include <ast.h></span> |
| <span id="L16"><span class="lineNum"> 16</span> : : </span> |
| <span id="L17"><span class="lineNum"> 17</span> :<span class="tlaUNC tlaBgUNC"> 0 : static int64_t cfg_block_filter(void *dev __unused,</span></span> |
| <span id="L18"><span class="lineNum"> 18</span> : : struct pci_cfg_reg_filter *pcrf __unused,</span> |
| <span id="L19"><span class="lineNum"> 19</span> : : uint32_t offset __unused, uint32_t len,</span> |
| <span id="L20"><span class="lineNum"> 20</span> : : uint32_t *data, bool write)</span> |
| <span id="L21"><span class="lineNum"> 21</span> : : {</span> |
| <span id="L22"><span class="lineNum"> 22</span> :<span class="tlaUNC"> 0 : if (write)</span></span> |
| <span id="L23"><span class="lineNum"> 23</span> :<span class="tlaUNC"> 0 : return OPAL_SUCCESS;</span></span> |
| <span id="L24"><span class="lineNum"> 24</span> : : </span> |
| <span id="L25"><span class="lineNum"> 25</span> :<span class="tlaUNC"> 0 : switch (len) {</span></span> |
| <span id="L26"><span class="lineNum"> 26</span> :<span class="tlaUNC"> 0 : case 4:</span></span> |
| <span id="L27"><span class="lineNum"> 27</span> :<span class="tlaUNC"> 0 : *data = 0x0;</span></span> |
| <span id="L28"><span class="lineNum"> 28</span> :<span class="tlaUNC"> 0 : return OPAL_SUCCESS;</span></span> |
| <span id="L29"><span class="lineNum"> 29</span> :<span class="tlaUNC"> 0 : case 2:</span></span> |
| <span id="L30"><span class="lineNum"> 30</span> :<span class="tlaUNC"> 0 : *((uint16_t *)data) = 0x0;</span></span> |
| <span id="L31"><span class="lineNum"> 31</span> :<span class="tlaUNC"> 0 : return OPAL_SUCCESS;</span></span> |
| <span id="L32"><span class="lineNum"> 32</span> :<span class="tlaUNC"> 0 : case 1:</span></span> |
| <span id="L33"><span class="lineNum"> 33</span> :<span class="tlaUNC"> 0 : *((uint8_t *)data) = 0x0;</span></span> |
| <span id="L34"><span class="lineNum"> 34</span> :<span class="tlaUNC"> 0 : return OPAL_SUCCESS;</span></span> |
| <span id="L35"><span class="lineNum"> 35</span> : : }</span> |
| <span id="L36"><span class="lineNum"> 36</span> : : </span> |
| <span id="L37"><span class="lineNum"> 37</span> :<span class="tlaUNC"> 0 : return OPAL_PARAMETER; /* should never happen */</span></span> |
| <span id="L38"><span class="lineNum"> 38</span> : : }</span> |
| <span id="L39"><span class="lineNum"> 39</span> : : </span> |
| <span id="L40"><span class="lineNum"> 40</span> : : /* blocks config accesses to registers in the range: [start, end] */</span> |
| <span id="L41"><span class="lineNum"> 41</span> : : #define BLOCK_CFG_RANGE(pd, start, end) \</span> |
| <span id="L42"><span class="lineNum"> 42</span> : : pci_add_cfg_reg_filter(pd, start, end - start + 1, \</span> |
| <span id="L43"><span class="lineNum"> 43</span> : : PCI_REG_FLAG_WRITE | PCI_REG_FLAG_READ, \</span> |
| <span id="L44"><span class="lineNum"> 44</span> : : cfg_block_filter);</span> |
| <span id="L45"><span class="lineNum"> 45</span> : : </span> |
| <span id="L46"><span class="lineNum"> 46</span> :<span class="tlaUNC"> 0 : static void quirk_microsemi_gen4_sw(struct phb *phb, struct pci_device *pd)</span></span> |
| <span id="L47"><span class="lineNum"> 47</span> : : {</span> |
| <span id="L48"><span class="lineNum"> 48</span> : : uint8_t data;</span> |
| <span id="L49"><span class="lineNum"> 49</span> : : bool frozen;</span> |
| <span id="L50"><span class="lineNum"> 50</span> : : int offset;</span> |
| <span id="L51"><span class="lineNum"> 51</span> : : int start;</span> |
| <span id="L52"><span class="lineNum"> 52</span> : : </span> |
| <span id="L53"><span class="lineNum"> 53</span> :<span class="tlaUNC"> 0 : pci_check_clear_freeze(phb);</span></span> |
| <span id="L54"><span class="lineNum"> 54</span> : : </span> |
| <span id="L55"><span class="lineNum"> 55</span> : : /*</span> |
| <span id="L56"><span class="lineNum"> 56</span> : : * Reading from 0xff should trigger a UR on the affected switches.</span> |
| <span id="L57"><span class="lineNum"> 57</span> : : * If we don't get a freeze then we don't need the workaround</span> |
| <span id="L58"><span class="lineNum"> 58</span> : : */</span> |
| <span id="L59"><span class="lineNum"> 59</span> :<span class="tlaUNC"> 0 : pci_cfg_read8(phb, pd->bdfn, 0xff, &data);</span></span> |
| <span id="L60"><span class="lineNum"> 60</span> :<span class="tlaUNC"> 0 : frozen = pci_check_clear_freeze(phb);</span></span> |
| <span id="L61"><span class="lineNum"> 61</span> :<span class="tlaUNC"> 0 : if (!frozen)</span></span> |
| <span id="L62"><span class="lineNum"> 62</span> :<span class="tlaUNC"> 0 : return;</span></span> |
| <span id="L63"><span class="lineNum"> 63</span> : : </span> |
| <span id="L64"><span class="lineNum"> 64</span> :<span class="tlaUNC"> 0 : for (start = -1, offset = 0; offset < 4096; offset++) {</span></span> |
| <span id="L65"><span class="lineNum"> 65</span> :<span class="tlaUNC"> 0 : pci_cfg_read8(phb, pd->bdfn, offset, &data);</span></span> |
| <span id="L66"><span class="lineNum"> 66</span> :<span class="tlaUNC"> 0 : frozen = pci_check_clear_freeze(phb);</span></span> |
| <span id="L67"><span class="lineNum"> 67</span> : : </span> |
| <span id="L68"><span class="lineNum"> 68</span> :<span class="tlaUNC"> 0 : if (start < 0 && frozen) { /* new UR range */</span></span> |
| <span id="L69"><span class="lineNum"> 69</span> :<span class="tlaUNC"> 0 : start = offset;</span></span> |
| <span id="L70"><span class="lineNum"> 70</span> :<span class="tlaUNC"> 0 : } else if (start >= 0 && !frozen) { /* end of range */</span></span> |
| <span id="L71"><span class="lineNum"> 71</span> :<span class="tlaUNC"> 0 : BLOCK_CFG_RANGE(pd, start, offset - 1);</span></span> |
| <span id="L72"><span class="lineNum"> 72</span> :<span class="tlaUNC"> 0 : PCINOTICE(phb, pd->bdfn, "Applied UR workaround to [%03x..%03x]\n", start, offset - 1);</span></span> |
| <span id="L73"><span class="lineNum"> 73</span> : : </span> |
| <span id="L74"><span class="lineNum"> 74</span> :<span class="tlaUNC"> 0 : start = -1;</span></span> |
| <span id="L75"><span class="lineNum"> 75</span> : : }</span> |
| <span id="L76"><span class="lineNum"> 76</span> : : }</span> |
| <span id="L77"><span class="lineNum"> 77</span> : : </span> |
| <span id="L78"><span class="lineNum"> 78</span> : : /* range lasted until the end of config space */</span> |
| <span id="L79"><span class="lineNum"> 79</span> :<span class="tlaUNC"> 0 : if (start >= 0) {</span></span> |
| <span id="L80"><span class="lineNum"> 80</span> :<span class="tlaUNC"> 0 : BLOCK_CFG_RANGE(pd, start, 0xfff);</span></span> |
| <span id="L81"><span class="lineNum"> 81</span> :<span class="tlaUNC"> 0 : PCINOTICE(phb, pd->bdfn, "Applied UR workaround to [%03x..fff]\n", start);</span></span> |
| <span id="L82"><span class="lineNum"> 82</span> : : }</span> |
| <span id="L83"><span class="lineNum"> 83</span> : : }</span> |
| <span id="L84"><span class="lineNum"> 84</span> : : </span> |
| <span id="L85"><span class="lineNum"> 85</span> :<span class="tlaUNC"> 0 : static void quirk_astbmc_vga(struct phb *phb __unused,</span></span> |
| <span id="L86"><span class="lineNum"> 86</span> : : struct pci_device *pd)</span> |
| <span id="L87"><span class="lineNum"> 87</span> : : {</span> |
| <span id="L88"><span class="lineNum"> 88</span> :<span class="tlaUNC"> 0 : struct dt_node *np = pd->dn;</span></span> |
| <span id="L89"><span class="lineNum"> 89</span> : : uint32_t revision, mcr_configuration, mcr_scu_mpll, mcr_scu_strap;</span> |
| <span id="L90"><span class="lineNum"> 90</span> : : </span> |
| <span id="L91"><span class="lineNum"> 91</span> :<span class="tlaUNC"> 0 : if (ast_sio_is_enabled()) {</span></span> |
| <span id="L92"><span class="lineNum"> 92</span> :<span class="tlaUNC"> 0 : revision = ast_ahb_readl(SCU_REVISION_ID);</span></span> |
| <span id="L93"><span class="lineNum"> 93</span> :<span class="tlaUNC"> 0 : mcr_configuration = ast_ahb_readl(MCR_CONFIGURATION);</span></span> |
| <span id="L94"><span class="lineNum"> 94</span> :<span class="tlaUNC"> 0 : mcr_scu_mpll = ast_ahb_readl(MCR_SCU_MPLL);</span></span> |
| <span id="L95"><span class="lineNum"> 95</span> :<span class="tlaUNC"> 0 : mcr_scu_strap = ast_ahb_readl(MCR_SCU_STRAP);</span></span> |
| <span id="L96"><span class="lineNum"> 96</span> : : } else {</span> |
| <span id="L97"><span class="lineNum"> 97</span> : : /* Previously we would warn, now SIO disabled by design */</span> |
| <span id="L98"><span class="lineNum"> 98</span> :<span class="tlaUNC"> 0 : prlog(PR_INFO, "Assumed platform default parameters for %s\n",</span></span> |
| <span id="L99"><span class="lineNum"> 99</span> : : __func__);</span> |
| <span id="L100"><span class="lineNum"> 100</span> :<span class="tlaUNC"> 0 : revision = bmc_platform->hw->scu_revision_id;</span></span> |
| <span id="L101"><span class="lineNum"> 101</span> :<span class="tlaUNC"> 0 : mcr_configuration = bmc_platform->hw->mcr_configuration;</span></span> |
| <span id="L102"><span class="lineNum"> 102</span> :<span class="tlaUNC"> 0 : mcr_scu_mpll = bmc_platform->hw->mcr_scu_mpll;</span></span> |
| <span id="L103"><span class="lineNum"> 103</span> :<span class="tlaUNC"> 0 : mcr_scu_strap = bmc_platform->hw->mcr_scu_strap;</span></span> |
| <span id="L104"><span class="lineNum"> 104</span> : : }</span> |
| <span id="L105"><span class="lineNum"> 105</span> : : </span> |
| <span id="L106"><span class="lineNum"> 106</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(np, "aspeed,scu-revision-id", revision);</span></span> |
| <span id="L107"><span class="lineNum"> 107</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(np, "aspeed,mcr-configuration", mcr_configuration);</span></span> |
| <span id="L108"><span class="lineNum"> 108</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(np, "aspeed,mcr-scu-mpll", mcr_scu_mpll);</span></span> |
| <span id="L109"><span class="lineNum"> 109</span> :<span class="tlaUNC"> 0 : dt_add_property_cells(np, "aspeed,mcr-scu-strap", mcr_scu_strap);</span></span> |
| <span id="L110"><span class="lineNum"> 110</span> :<span class="tlaUNC"> 0 : }</span></span> |
| <span id="L111"><span class="lineNum"> 111</span> : : </span> |
| <span id="L112"><span class="lineNum"> 112</span> : : /* Quirks are: {fixup function, vendor ID, (device ID or PCI_ANY_ID)} */</span> |
| <span id="L113"><span class="lineNum"> 113</span> : : static const struct pci_quirk quirk_table[] = {</span> |
| <span id="L114"><span class="lineNum"> 114</span> : : /* ASPEED 2400 VGA device */</span> |
| <span id="L115"><span class="lineNum"> 115</span> : : { 0x1a03, 0x2000, &quirk_astbmc_vga },</span> |
| <span id="L116"><span class="lineNum"> 116</span> : : { 0x11f8, 0x4052, &quirk_microsemi_gen4_sw },</span> |
| <span id="L117"><span class="lineNum"> 117</span> : : { 0, 0, NULL }</span> |
| <span id="L118"><span class="lineNum"> 118</span> : : };</span> |
| <span id="L119"><span class="lineNum"> 119</span> : : </span> |
| <span id="L120"><span class="lineNum"> 120</span> :<span class="tlaGNC tlaBgGNC"> 4 : static void __pci_handle_quirk(struct phb *phb, struct pci_device *pd,</span></span> |
| <span id="L121"><span class="lineNum"> 121</span> : : const struct pci_quirk *quirks)</span> |
| <span id="L122"><span class="lineNum"> 122</span> : : {</span> |
| <span id="L123"><span class="lineNum"> 123</span> :<span class="tlaGNC"> 8 : while (quirks->vendor_id) {</span></span> |
| <span id="L124"><span class="lineNum"> 124</span> :<span class="tlaGNC"> 4 : if (quirks->vendor_id == PCI_VENDOR_ID(pd->vdid) &&</span></span> |
| <span id="L125"><span class="lineNum"> 125</span> :<span class="tlaGNC"> 2 : (quirks->device_id == PCI_ANY_ID ||</span></span> |
| <span id="L126"><span class="lineNum"> 126</span> :<span class="tlaGNC"> 2 : quirks->device_id == PCI_DEVICE_ID(pd->vdid)))</span></span> |
| <span id="L127"><span class="lineNum"> 127</span> :<span class="tlaGNC"> 1 : quirks->fixup(phb, pd);</span></span> |
| <span id="L128"><span class="lineNum"> 128</span> :<span class="tlaGNC"> 4 : quirks++;</span></span> |
| <span id="L129"><span class="lineNum"> 129</span> : : }</span> |
| <span id="L130"><span class="lineNum"> 130</span> :<span class="tlaGNC"> 4 : }</span></span> |
| <span id="L131"><span class="lineNum"> 131</span> : : </span> |
| <span id="L132"><span class="lineNum"> 132</span> :<span class="tlaUNC tlaBgUNC"> 0 : void pci_handle_quirk(struct phb *phb, struct pci_device *pd)</span></span> |
| <span id="L133"><span class="lineNum"> 133</span> : : {</span> |
| <span id="L134"><span class="lineNum"> 134</span> :<span class="tlaUNC"> 0 : __pci_handle_quirk(phb, pd, quirk_table);</span></span> |
| <span id="L135"><span class="lineNum"> 135</span> :<span class="tlaUNC"> 0 : }</span></span> |
| </pre> |
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