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qemu / qemu / fbcbbf4e80a57298c605f4a2b486280d70c69d00 / target-mips / op_helper.c
  1. 599bc5e target-mips: Implement FCR31's R/W bitmask and related functionalities by Aleksandar Markovic · 9 years ago
  2. 8755208 target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> by Aleksandar Markovic · 9 years ago
  3. af39bc8 softfloat: Implement run-time-configurable meaning of signaling NaN bit by Aleksandar Markovic · 9 years ago
  4. 9be3859 coccinelle: Remove unnecessary variables for function return value by Eduardo Habkost · 9 years ago
  5. 63c9155 cpu: move exec-all.h inclusion out of cpu.h by Paolo Bonzini · 9 years ago
  6. cb8d4c8 Fix some typos found by codespell by Stefan Weil · 9 years ago
  7. d96391c target-mips: Fix RDHWR exception host PC by James Hogan · 9 years ago
  8. f6d4dd8 target-mips: add MAAR, MAARI register by Yongbok Kim · 9 years ago
  9. 0d74a22 target-mips: make ITC Configuration Tags accessible to the CPU by Leon Alrae · 9 years ago
  10. 01bc435 target-mips: implement R6 multi-threading by Yongbok Kim · 9 years ago
  11. c684822 mips: Clean up includes by Peter Maydell · 9 years ago
  12. 1aa56f6 target-mips: silence NaNs for cvt.s.d and cvt.d.s by Aurelien Jarno · 9 years ago
  13. f93c3a8 target-mips: flush QEMU TLB when disabling 64-bit addressing by Leon Alrae · 9 years ago
  14. b00c721 target-mips: add PC, XNP reg numbers to RDHWR by Yongbok Kim · 9 years ago
  15. 9c708c7 target-mips: improve exception handling by Pavel Dovgaluk · 10 years ago
  16. cdfcad7 target-mips: Fix RDHWR on CP0.Count by Alex Smith · 10 years ago
  17. 97ed5cc tlb: Add "ifetch" argument to cpu_mmu_index() by Benjamin Herrenschmidt · 10 years ago
  18. c855701 target-mips: Use CPU_LOG_INT for logging related to interrupts by Richard Henderson · 10 years ago
  19. da52a4d target-mips: fix offset calculation for Interrupts by Yongbok Kim · 10 years ago
  20. fe87c2b target-mips: correct DERET instruction by Leon Alrae · 10 years ago
  21. 6a973e6 target-mips: fix ASID synchronisation for MIPS MT by Aurelien Jarno · 10 years ago
  22. e117f52 target-mips: add CP0.PageGrain.ELPA support by Leon Alrae · 10 years ago
  23. cd0d45c target-mips: support Page Frame Number Extension field by Leon Alrae · 10 years ago
  24. 284b731 target-mips: extend selected CP0 registers to 64-bits in MIPS32 by Leon Alrae · 10 years ago
  25. ce9782f target-mips: add ERETNC instruction and Config5.LLB bit by Leon Alrae · 10 years ago
  26. adc370a target-mips: Misaligned memory accesses for MSA by Yongbok Kim · 10 years ago
  27. 7c979af target-mips: add Config5.FRE support allowing Status.FR=0 emulation by Leon Alrae · 10 years ago
  28. 6489dd2 target-mips: ll and lld cause AdEL exception for unaligned address by Leon Alrae · 10 years ago
  29. 1535300 target-mips: Don't use _raw load/store accessors by Peter Maydell · 10 years ago
  30. bb962386 target-mips: Add missing calls to synchronise SoftFloat status by Maciej W. Rozycki · 10 years ago
  31. 1d725ae target-mips: Also apply the CP0.Status mask to MTTC0 by Maciej W. Rozycki · 10 years ago
  32. 90f12d7 target-mips: Fix CP0.Config3.ISAOnExc write accesses by Maciej W. Rozycki · 10 years ago
  33. 81a423e target-mips: Correct the writes to Status and Cause registers via gdbstub by Maciej W. Rozycki · 10 years ago
  34. f88f79e target-mips: Correct the handling of writes to CP0.Status for MIPSr6 by Maciej W. Rozycki · 10 years ago
  35. 8fc605b target-mips: Restore the order of helpers by Maciej W. Rozycki · 10 years ago
  36. 51fdea9 target-mips: Remove unused `FLOAT_OP' macro by Maciej W. Rozycki · 10 years ago
  37. 2b09f94 target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers by Maciej W. Rozycki · 10 years ago
  38. f768587 target-mips: add MSA MI10 format instructions by Yongbok Kim · 10 years ago
  39. b7651e9 target-mips: remove duplicated mips/ieee mapping function by Yongbok Kim · 10 years ago
  40. e97a391 target-mips: add MSA defines and data structure by Yongbok Kim · 10 years ago
  41. ba801af target-mips: add restrictions for possible values in registers by Leon Alrae · 11 years ago
  42. aea1409 target-mips: add BadInstr and BadInstrP support by Leon Alrae · 11 years ago
  43. 9456c2f target-mips: add TLBINV support by Leon Alrae · 11 years ago
  44. 7207c7f target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} by Leon Alrae · 11 years ago
  45. 2fb58b7 target-mips: add RI and XI fields to TLB entry by Leon Alrae · 11 years ago
  46. 74dda987 target-mips: add ULL suffix in bitswap to avoid compiler warning by Leon Alrae · 10 years ago
  47. b808a1a target-mips/op_helper.c: Remove unused do_lbu() function by Peter Maydell · 10 years ago
  48. 3f49388 target-mips: add new Floating Point Comparison instructions by Yongbok Kim · 11 years ago
  49. e7f16ab target-mips: add new Floating Point instructions by Leon Alrae · 11 years ago
  50. 15eacb9 target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions by Yongbok Kim · 11 years ago
  51. eddedd5 target-mips: Ignore unassigned accesses with KVM by James Hogan · 11 years ago
  52. d279279 target-mips: implement UserLocal Register by Petar Jovanovic · 11 years ago
  53. f08b617 softmmu: introduce cpu_ldst.h by Paolo Bonzini · 11 years ago
  54. 0f590e74 softmmu: commonize helper definitions by Paolo Bonzini · 11 years ago
  55. d94f0a8 softmmu: move ALIGNED_ONLY to cpu.h by Paolo Bonzini · 11 years ago
  56. 93e2232 softmmu: make do_unaligned_access a method of CPU by Paolo Bonzini · 11 years ago
  57. 2ef6175 tcg: Invert the inclusion of helper.h by Richard Henderson · 11 years ago
  58. f45cb2f target-mips: Avoid shifting left into sign bit by Peter Maydell · 11 years ago
  59. 00c8cb0 cputlb: Change tlb_flush() argument to CPUState by Andreas Färber · 12 years ago
  60. a47dddd exec: Change cpu_abort() argument to CPUState by Andreas Färber · 12 years ago
  61. 3f38f30 translate-all: Change cpu_restore_state() argument to CPUState by Andreas Färber · 12 years ago
  62. 5638d18 cpu-exec: Change cpu_loop_exit() argument to CPUState by Andreas Färber · 12 years ago
  63. d5a11fe exec: Change tlb_fill() argument to CPUState by Andreas Färber · 12 years ago
  64. 2710342 cpu: Move exception_index field from CPU_COMMON to CPUState by Andreas Färber · 12 years ago
  65. 7510454 cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook by Andreas Färber · 12 years ago
  66. 736d120 target-mips: add user-mode FR switch support for MIPS32r5 by Petar Jovanovic · 11 years ago
  67. b4dd99a target-mips: add support for CP0_Config5 by Petar Jovanovic · 11 years ago
  68. b4160af target-mips: add support for CP0_Config4 by Petar Jovanovic · 11 years ago
  69. bdc4464 cpu: Use QTAILQ for CPU list by Andreas Färber · 12 years ago
  70. d2e46d5 target-mips: Remove assignment to a variable which is never used by Stefan Weil · 12 years ago
  71. 182735e cpu: Make first_cpu and next_cpu CPUState by Andreas Färber · 12 years ago
  72. c658b94 cpu: Turn cpu_unassigned_access() into a CPUState hook by Andreas Färber · 12 years ago
  73. c3affe5 cpu: Pass CPUState to cpu_interrupt() by Andreas Färber · 12 years ago
  74. d8ed887 exec: Pass CPUState to cpu_reset_interrupt() by Andreas Färber · 12 years ago
  75. 259186a cpu: Move halted and interrupt_request fields to CPUState by Andreas Färber · 12 years ago
  76. ce1dd5d target-mips: Use mul[us]2 in [D]MULT[U] insns by Richard Henderson · 12 years ago
  77. f54c35d target-mips: Unfuse {,N}M{ADD,SUB}.fmt by Richard Sandiford · 12 years ago
  78. 38d8f5c exec: Return CPUState from qemu_get_cpu() by Andreas Färber · 12 years ago
  79. 66afd1a target-mips: Clean up mips_cpu_map_tc() documentation by Andreas Färber · 12 years ago
  80. ce3960e cpu: Move nr_{cores,threads} fields to CPUState by Andreas Färber · 12 years ago
  81. e320d05 target-mips: Replace macros by inline functions by Stefan Weil · 12 years ago
  82. 0f0b939 target-mips: Use EXCP_SC rather than a magic number by 陳韋任 (Wei-Ren Chen) · 12 years ago
  83. 79eb839 target-mips: Remove semicolon from macro definition by Stefan Weil · 12 years ago
  84. 1de7afc misc: move include files to include/qemu/ by Paolo Bonzini · 12 years ago
  85. 022c62c exec: move include files to include/exec/ by Paolo Bonzini · 12 years ago
  86. a8a826a exec: refactor cpu_restore_state by Blue Swirl · 12 years ago
  87. 286d52e target-mips: don't flush extra TLB on permissions upgrade by Aurelien Jarno · 12 years ago
  88. bc3e45e target-mips: fix TLBR wrt SEGMask by Aurelien Jarno · 12 years ago
  89. fc40787 target-mips: implement unaligned loads using TCG by Aurelien Jarno · 12 years ago
  90. 18bba4d target-mips: simplify load/store microMIPS helpers by Aurelien Jarno · 12 years ago
  91. 5f7319c target-mips: restore CPU state after an FPU exception by Aurelien Jarno · 12 years ago
  92. 05993cd target-mips: use softfloat constants when possible by Aurelien Jarno · 12 years ago
  93. 4cc2e5f target-mips: cleanup float to int conversion helpers by Aurelien Jarno · 12 years ago
  94. 5dbe90b target-mips: fix FPU exceptions by Aurelien Jarno · 12 years ago
  95. 4a587b2 target-mips: keep softfloat exception set to 0 between instructions by Aurelien Jarno · 12 years ago
  96. b3d6cd4 target-mips: use the softfloat floatXX_muladd functions by Aurelien Jarno · 12 years ago
  97. a8170e5 Rename target_phys_addr_t to hwaddr by Avi Kivity · 12 years ago
  98. 6f4d6b0 target-mips: Pass MIPSCPU to mips_vpe_sleep() by Andreas Färber · 12 years ago
  99. c6679e9 target-mips: Pass MIPSCPU to mips_tc_sleep() by Andreas Färber · 12 years ago
  100. b35d77d target-mips: Pass MIPSCPU to mips_vpe_is_wfi() by Andreas Färber · 12 years ago