1. 1c8e491 target/riscv: support new isa extension detection devicetree properties by Conor Dooley · 1 year, 1 month ago
  2. 3d9981c hw/riscv: Validate cluster and NUMA node boundary by Gavin Shan · 1 year, 10 months ago
  3. 66247ed hw/riscv: Add signature dump function for spike to run ACT tests by Weiwei Li · 1 year, 11 months ago
  4. 487d73f hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() by Daniel Henrique Barboza · 2 years, 1 month ago
  5. 62c5bc3 hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel() by Daniel Henrique Barboza · 2 years, 1 month ago
  6. 4b40288 hw/riscv: change riscv_compute_fdt_addr() semantics by Daniel Henrique Barboza · 2 years, 1 month ago
  7. bc2c015 hw/riscv: split fdt address calculation from fdt load by Daniel Henrique Barboza · 2 years, 1 month ago
  8. 606a243 hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms' by Daniel Henrique Barboza · 2 years, 1 month ago
  9. 9c3ee7e hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() by Daniel Henrique Barboza · 2 years, 2 months ago
  10. fb60b48 hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id() by Daniel Henrique Barboza · 2 years, 2 months ago
  11. 5dfe237 hw/riscv/spike.c: simplify create_fdt() by Daniel Henrique Barboza · 2 years, 2 months ago
  12. 60c1f05 hw/riscv/boot.c: use MachineState in riscv_load_kernel() by Daniel Henrique Barboza · 2 years, 2 months ago
  13. 1f99146 hw/riscv/boot.c: use MachineState in riscv_load_initrd() by Daniel Henrique Barboza · 2 years, 2 months ago
  14. b1f19f2 hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() by Daniel Henrique Barboza · 2 years, 2 months ago
  15. b9a6547 hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() by Daniel Henrique Barboza · 2 years, 2 months ago
  16. c44df40 hw/riscv/spike.c: load initrd right after riscv_load_kernel() by Daniel Henrique Barboza · 2 years, 2 months ago
  17. 3139929 hw/riscv/spike: use 'fdt' from MachineState by Daniel Henrique Barboza · 2 years, 2 months ago
  18. 71d68c4 hw/riscv: spike: Decouple create_fdt() dependency to ELF loading by Bin Meng · 2 years, 2 months ago
  19. 9d3f710 hw/riscv/boot.c: introduce riscv_default_firmware_name() by Daniel Henrique Barboza · 2 years, 2 months ago
  20. a8a7f68 hw/riscv: spike: Remove the out-of-date comments by Bin Meng · 2 years, 2 months ago
  21. 1237c2d hw/char: riscv_htif: Move registers from CPUArchState to HTIFState by Bin Meng · 2 years, 2 months ago
  22. dc68824 hw/char: riscv_htif: Drop useless assignment of memory region by Bin Meng · 2 years, 2 months ago
  23. 391eafe hw/riscv: spike: Remove misleading comments by Bin Meng · 2 years, 3 months ago
  24. 719b718 hw/riscv: set machine->fdt in spike_board_init() by Daniel Henrique Barboza · 2 years, 5 months ago
  25. 6934f15 hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() by Daniel Henrique Barboza · 2 years, 7 months ago
  26. 4bcfc39 hw/riscv: Make CPU config error handling generous (virt/spike) by Tsukasa OI · 2 years, 10 months ago
  27. 58303fc hw/riscv: Don't add empty bootargs to device tree by Bin Meng · 2 years, 11 months ago
  28. 6d3b9c0 hw/riscv: spike: Add '/chosen/stdout-path' in device tree unconditionally by Bin Meng · 2 years, 11 months ago
  29. 092dc6d hw/riscv: Remove macros for ELF BIOS image names by Anup Patel · 3 years, 1 month ago
  30. 8d8897a hw/riscv: spike: Allow using binary firmware as bios by Anup Patel · 3 years, 2 months ago
  31. 11ec06f hw/riscv: spike: Use MachineState::ram and MachineClass::default_ram_id by Bin Meng · 3 years, 4 months ago
  32. b8fb878 hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT by Anup Patel · 3 years, 6 months ago
  33. cc63a18 hw/intc: Rename sifive_clint sources to riscv_aclint sources by Anup Patel · 3 years, 6 months ago
  34. 7f4c520 arch_init.h: Don't include arch_init.h unnecessarily by Peter Maydell · 3 years, 7 months ago
  35. a0acd0a hw/riscv: Use macros for BIOS image names by Bin Meng · 3 years, 10 months ago
  36. 7cfbb17 hw/riscv: Support the official CLINT DT bindings by Bin Meng · 3 years, 10 months ago
  37. 19f4ed3 hw: Do not include qemu/log.h if it is not necessary by Thomas Huth · 4 years ago
  38. d6eb39b qtest: delete superfluous inclusions of qtest.h by Chen Qun · 4 years ago
  39. 7326128 hw/riscv: Drop 'struct MemmapEntry' by Bin Meng · 4 years ago
  40. a8259b5 riscv: Pass RISCVHartArrayState by pointer by Alistair Francis · 4 years, 2 months ago
  41. 3ed2b8a hw/riscv: Use the CPU to determine if 32-bit by Alistair Francis · 4 years, 3 months ago
  42. bd62c13 hw/riscv: spike: Remove compile time XLEN checks by Alistair Francis · 4 years, 3 months ago
  43. 7893677 hw/riscv: boot: Remove compile time XLEN checks by Alistair Francis · 4 years, 3 months ago
  44. dc4d4aa riscv: spike: Remove target macro conditionals by Alistair Francis · 4 years, 3 months ago
  45. 38bc4e3 hw/riscv: Load the kernel after the firmware by Alistair Francis · 4 years, 5 months ago
  46. 70eb9f9 hw/riscv: Move riscv_htif model to hw/char by Bin Meng · 4 years, 6 months ago
  47. 406fafd hw/riscv: Move sifive_clint model to hw/intc by Bin Meng · 4 years, 6 months ago
  48. a47ef6e hw/riscv: clint: Avoid using hard-coded timebase frequency by Bin Meng · 4 years, 6 months ago
  49. a717279 hw/riscv: spike: Allow creating multiple NUMA sockets by Anup Patel · 4 years, 10 months ago
  50. 3bf03f0 hw/riscv: Allow creating multiple instances of CLINT by Anup Patel · 4 years, 10 months ago
  51. fad1443 hw/riscv: spike: Change the default bios to use generic platform image by Bin Meng · 4 years, 10 months ago
  52. 9eb8b14 hw/riscv: Modify MROM size to end at 0x10000 by Bin Meng · 4 years, 8 months ago
  53. dc144fe riscv: Add opensbi firmware dynamic support by Atish Patra · 4 years, 8 months ago
  54. 66b1205 RISC-V: Copy the fdt in dram instead of ROM by Atish Patra · 4 years, 8 months ago
  55. 43cf723 riscv: Unify Qemu's reset vector code path by Atish Patra · 4 years, 8 months ago
  56. 5325cc3 qom: Put name parameter before value / visitor parameter by Markus Armbruster · 4 years, 8 months ago
  57. 0074fce sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1 by Markus Armbruster · 4 years, 9 months ago
  58. 75a6ed8 riscv: Fix to put "riscv.hart_array" devices on sysbus by Markus Armbruster · 4 years, 9 months ago
  59. 26cd036 hw/riscv: spike: Remove deprecated ISA specific machines by Alistair Francis · 4 years, 10 months ago
  60. 31e6d70 hw/riscv/spike: Allow more than one CPUs by Anup Patel · 4 years, 10 months ago
  61. 5b8a986 hw/riscv/spike: Allow loading firmware separately using -bios option by Anup Patel · 4 years, 10 months ago
  62. e883e99 hw/riscv: Generate correct "mmu-type" for 32-bit machines by Bin Meng · 5 years ago
  63. 2ac031d Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf3' into staging by Peter Maydell · 5 years ago
  64. ea0ac7f hw: Make MachineClass::is_default a boolean type by Philippe Mathieu-Daudé · 5 years ago
  65. 5f3616c hw/riscv: Provide rdtime callback for TCG in CLINT emulation by Anup Patel · 5 years ago
  66. 6478dd7 hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() by Zhuang, Siwei (Data61, Kensington NSW) · 5 years ago
  67. 7ae0537 riscv: hw: Drop "clock-frequency" property of cpu nodes by Bin Meng · 5 years ago
  68. 24e398d riscv: hw: Remove superfluous "linux, phandle" property by Bin Meng · 5 years ago
  69. 46517dd Include sysemu/sysemu.h a lot less by Markus Armbruster · 6 years ago
  70. 650d103 Include hw/hw.h exactly where needed by Markus Armbruster · 6 years ago
  71. c447312 hw/riscv: Replace global smp variables with machine smp properties by Like Xu · 6 years ago
  72. 0ac24d5 hw/riscv: Split out the boot functions by Alistair Francis · 6 years ago
  73. cd69e3a riscv: spike: Add a generic spike machine by Alistair Francis · 6 years ago
  74. 40e46e5 riscv: Ensure the kernel start address is correctly cast by Alistair Francis · 6 years ago
  75. 4366e1d elf: Add optional function ptr to load_elf() to parse ELF notes by Liam Merwick · 6 years ago
  76. 00a014a riscv: spike: Fix memory leak in the board init by Alistair Francis · 6 years ago
  77. 7c28f4d RISC-V: Don't add NULL bootargs to device-tree by Michael Clark · 7 years ago
  78. 2f831d0 Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into staging by Peter Maydell · 6 years ago
  79. 371b74e Drop "qemu:" prefix from error_report() arguments by Mao Zhongyi · 6 years ago
  80. 117caac hw/riscv/spike: Set the soc device tree node as a simple-bus by Alistair Francis · 7 years ago
  81. 8ff62f6 spike: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  82. 5aec324 RISC-V: Mark ROM read-only after copying in code by Michael Clark · 7 years ago
  83. 8985480 RISC-V: Remove EM_RISCV ELF_MACHINE indirection by Michael Clark · 7 years ago
  84. 42b3a4b RISC-V: Remove unused class definitions by Michael Clark · 7 years ago
  85. b793898 RISC-V: Remove identity_translate from load_elf by Michael Clark · 7 years ago
  86. 2a8756e RISC-V: Replace hardcoded constants with enum values by Michael Clark · 7 years ago
  87. 9bca0ed Change references to serial_hds[] to serial_hd() by Peter Maydell · 7 years ago
  88. 5b4beba RISC-V Spike Machines by Michael Clark · 7 years ago