1. 182735e cpu: Make first_cpu and next_cpu CPUState by Andreas Färber · 12 years ago
  2. 6e42be7 cpu: Drop unnecessary dynamic casts in *_env_get_cpu() by Andreas Färber · 12 years ago
  3. 6291ad7 linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user by Peter Maydell · 11 years ago
  4. c658b94 cpu: Turn cpu_unassigned_access() into a CPUState hook by Andreas Färber · 12 years ago
  5. c643bed cpu: Change qemu_init_vcpu() argument to CPUState by Andreas Färber · 12 years ago
  6. 878096e cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks by Andreas Färber · 12 years ago
  7. 1239b47 linux-user: Save the correct resume address for MIPS signal handling by Kwok Cheung Yeung · 12 years ago
  8. d899282 target-mips: clean-up in BIT_INSV by Petar Jovanovic · 12 years ago
  9. 118d1e4 target-mips: set carry bit correctly in DSPControl register by Petar Jovanovic · 12 years ago
  10. 0ba365f target-mips: fix EXTPDP and setting up pos field in the DSPControl reg by Petar Jovanovic · 12 years ago
  11. 489ed4b target-mips: fix incorrect behaviour for EXTP by Petar Jovanovic · 12 years ago
  12. c0f5f9c target-mips: fix incorrect behaviour for INSV by Petar Jovanovic · 12 years ago
  13. 639eadb target-mips: add missing check_dspr2 for multiply instructions by Petar Jovanovic · 12 years ago
  14. 29851ee target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB by Petar Jovanovic · 12 years ago
  15. b1ca31d target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR by Petar Jovanovic · 12 years ago
  16. 8b758d0 target-mips: fix rndrashift_short_acc and code for EXTR_ instructions by Petar Jovanovic · 12 years ago
  17. 97a8ea5 cpu: Replace do_interrupt() by CPUClass::do_interrupt method by Andreas Färber · 12 years ago
  18. c3affe5 cpu: Pass CPUState to cpu_interrupt() by Andreas Färber · 12 years ago
  19. d8ed887 exec: Pass CPUState to cpu_reset_interrupt() by Andreas Färber · 12 years ago
  20. 259186a cpu: Move halted and interrupt_request fields to CPUState by Andreas Färber · 12 years ago
  21. 68473f1 mips64-linux-user: Enable 64-bit address mode and fpu by Richard Henderson · 12 years ago
  22. 084d049 mips-linux-user: Save and restore fpu and dsp from sigcontext by Richard Henderson · 12 years ago
  23. 26135ea target-mips: Fix accumulator selection for MIPS16 and microMIPS by Richard Sandiford · 12 years ago
  24. 20c334a target-mips: fix DSP overflow macro and affected routines by Petar Jovanovic · 12 years ago
  25. 806f352 gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end by Peter Maydell · 12 years ago
  26. fadf982 cpu: Introduce ENV_OFFSET macros by Andreas Färber · 12 years ago
  27. a345481 target-mips: fix for sign-issue in MULQ_W helper by Petar Jovanovic · 12 years ago
  28. 9c19eb1 target-mips: fix for incorrect multiplication with MULQ_S.PH by Petar Jovanovic · 12 years ago
  29. ce1dd5d target-mips: Use mul[us]2 in [D]MULT[U] insns by Richard Henderson · 12 years ago
  30. c05efcb cpu: Add CPUArchState pointer to CPUState by Andreas Färber · 12 years ago
  31. 78ce64f target-mips: Move TCG initialization to MIPSCPU initfn by Andreas Färber · 12 years ago
  32. c1caf1d target-mips: Introduce QOM realizefn for MIPSCPU by Andreas Färber · 12 years ago
  33. 6f0af30 target-mips: enable access to DSP ASE if implemented by Petar Jovanovic · 12 years ago
  34. f54c35d target-mips: Unfuse {,N}M{ADD,SUB}.fmt by Richard Sandiford · 12 years ago
  35. c728154 target-mips: Sign-extend the result of LWR by Richard Sandiford · 12 years ago
  36. 17e8fef target-mips: Fix signedness of loads in MIPS16 RESTOREs by Richard Sandiford · 12 years ago
  37. df6126a target-mips: implement DSP (d)append sub-class with TCG by Aurelien Jarno · 12 years ago
  38. 0a16c79 target-mips: use DSP unions for reduction add instructions by Aurelien Jarno · 12 years ago
  39. 75d012a target-mips: use DSP unions for unary DSP operators by Aurelien Jarno · 12 years ago
  40. 6de0e6c target-mips: use DSP unions for binary DSP operators by Aurelien Jarno · 12 years ago
  41. 652613a target-mips: add unions to access DSP elements by Aurelien Jarno · 12 years ago
  42. ad153f1 target-mips: generate a reserved instruction exception on CPU without DSP by Aurelien Jarno · 12 years ago
  43. d75c135 target-mips: copy insn_flags in DisasContext by Aurelien Jarno · 12 years ago
  44. f7d2072 target-mips: fix DSP loads with rd = 0 by Aurelien Jarno · 12 years ago
  45. 38d8f5c exec: Return CPUState from qemu_get_cpu() by Andreas Färber · 12 years ago
  46. 55e5c28 cpu: Move cpu_index field to CPUState by Andreas Färber · 12 years ago
  47. 66afd1a target-mips: Clean up mips_cpu_map_tc() documentation by Andreas Färber · 12 years ago
  48. ce3960e cpu: Move nr_{cores,threads} fields to CPUState by Andreas Färber · 12 years ago
  49. da1a4ce target-mips: Fix helper and tests for dot/cross-dot product instructions by Petar Jovanovic · 12 years ago
  50. e320d05 target-mips: Replace macros by inline functions by Stefan Weil · 12 years ago
  51. e1a4019 target-mips: Allow DSP access to be disabled once enabled. by Eric Johnson · 12 years ago
  52. 0f0b939 target-mips: Use EXCP_SC rather than a magic number by 陳韋任 (Wei-Ren Chen) · 12 years ago
  53. c4aaba9 target-mips: Make repl_ph to sign extend to target-long by Jovanovic, Petar · 12 years ago
  54. fe65a1f Fix my email address by Dongxue Zhang · 12 years ago
  55. 79eb839 target-mips: Remove semicolon from macro definition by Stefan Weil · 12 years ago
  56. b8abbbe target-mips: Fix for helpers for EXTR_* instructions by Petar Jovanovic · 12 years ago
  57. eec8972 target-mips: Fix incorrect reads and writes to DSPControl register by Petar Jovanovic · 12 years ago
  58. 6b4c305 fpu: move public header file to include/fpu by Paolo Bonzini · 12 years ago
  59. 1de7afc misc: move include files to include/qemu/ by Paolo Bonzini · 12 years ago
  60. 14cccb6 qom: move include files to include/qom/ by Paolo Bonzini · 12 years ago
  61. 022c62c exec: move include files to include/exec/ by Paolo Bonzini · 12 years ago
  62. 76cad71 build: kill libdis, move disassemblers to disas/ by Paolo Bonzini · 12 years ago
  63. a8a826a exec: refactor cpu_restore_state by Blue Swirl · 12 years ago
  64. 536b558 Merge branch 'master' of git.qemu-project.org:/pub/git/qemu by Blue Swirl · 12 years ago
  65. ab1103d TCG: Use gen_opc_instr_start from context instead of global variable. by Evgeny Voevodin · 12 years ago
  66. c9c99c2 TCG: Use gen_opc_icount from context instead of global variable. by Evgeny Voevodin · 12 years ago
  67. 25983ca TCG: Use gen_opc_pc from context instead of global variable. by Evgeny Voevodin · 12 years ago
  68. 19e6c50 target-mips: Fix incorrect shift for SHILO and SHILOV by Petar Jovanovic · 12 years ago
  69. 34f5606 target-mips: Fix incorrect code and test for INSV by Petar Jovanovic · 12 years ago
  70. 31abf92 target-mips: remove POOL48A from the microMIPS decoding by Aurelien Jarno · 12 years ago
  71. 211da99 target-mips: Clean up microMIPS32 major opcode by 陳韋任 (Wei-Ren Chen) · 12 years ago
  72. d132c79 target-mips: Add comments on POOL32Axf encoding by 陳韋任 (Wei-Ren Chen) · 12 years ago
  73. 92414b3 TCG: Use gen_opc_buf from context instead of global variable. by Evgeny Voevodin · 12 years ago
  74. efd7f48 TCG: Use gen_opc_ptr from context instead of global variable. by Evgeny Voevodin · 12 years ago
  75. 6801038 target-mips: fix wrong microMIPS opcode encoding by 陳韋任 (Wei-Ren Chen) · 12 years ago
  76. 7c2c3ea target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1. by Eric Johnson · 12 years ago
  77. f4359b9 disas: avoid using cpu_single_env by Blue Swirl · 12 years ago
  78. 1cfd981 target-mips: use ULL for 64 bit constants by Blue Swirl · 12 years ago
  79. 98c8a73 Merge remote-tracking branch 'afaerber/qom-cpu' into staging by Anthony Liguori · 12 years ago
  80. 286d52e target-mips: don't flush extra TLB on permissions upgrade by Aurelien Jarno · 12 years ago
  81. bc3e45e target-mips: fix TLBR wrt SEGMask by Aurelien Jarno · 12 years ago
  82. e0d002f target-mips: use deposit instead of hardcoded version by Aurelien Jarno · 12 years ago
  83. 5112718 target-mips: optimize ddiv/ddivu/div/divu with movcond by Aurelien Jarno · 12 years ago
  84. acf1246 target-mips: implement movn/movz using movcond by Aurelien Jarno · 12 years ago
  85. 2d2826b target-mips: don't use local temps for store conditional by Aurelien Jarno · 12 years ago
  86. fc40787 target-mips: implement unaligned loads using TCG by Aurelien Jarno · 12 years ago
  87. 18bba4d target-mips: simplify load/store microMIPS helpers by Aurelien Jarno · 12 years ago
  88. 3cee305 target-mips: optimize load operations by Aurelien Jarno · 12 years ago
  89. 2910c6cb target-mips: cleanup load/store operations by Aurelien Jarno · 12 years ago
  90. 5f7319c target-mips: restore CPU state after an FPU exception by Aurelien Jarno · 12 years ago
  91. 05993cd target-mips: use softfloat constants when possible by Aurelien Jarno · 12 years ago
  92. 4cc2e5f target-mips: cleanup float to int conversion helpers by Aurelien Jarno · 12 years ago
  93. 5dbe90b target-mips: fix FPU exceptions by Aurelien Jarno · 12 years ago
  94. 4a587b2 target-mips: keep softfloat exception set to 0 between instructions by Aurelien Jarno · 12 years ago
  95. b3d6cd4 target-mips: use the softfloat floatXX_muladd functions by Aurelien Jarno · 12 years ago
  96. 1e0e239 target-mips: do not save CPU state when using retranslation by Aurelien Jarno · 12 years ago
  97. 4636401 target-mips: correctly restore btarget upon exception by Aurelien Jarno · 12 years ago
  98. 40e3acc target-mips: remove #if defined(TARGET_MIPS64) in opcode enums by Aurelien Jarno · 12 years ago
  99. b30706d target-mips: Change TODO file by Jia Liu · 12 years ago
  100. af13ae0 target-mips: Add ASE DSP processors by Jia Liu · 12 years ago